diff --git a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/case.toml b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/case.toml index 036c1b0fd24a638d9f35957ff08658842cdc9529..98f1f16f58f27528416fb0a6b74d67b06c0ed1fe 100644 --- a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/case.toml +++ b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "gf180mcuD.voidwalkers-scandff.scan_dff" title = "Scan D Flip-Flop with Active-Low Reset" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "99ace8db2b9b5611c896d24f0fb95767f76f6568867a21be756c596f11345166" +sha256 = "cc82ad15dde6c3790aa2277e0b0c16487a74bfc864a207fa605cb022e15c4964" [[assets]] path = "reference/gf180mcu_voidwalkers_sc_sdffrnq_4.gds" @@ -28,18 +28,18 @@ environment = "gf180mcuD-typical-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "4dd3b36c545bf772efe7d79ce147682f337e9e9c38f353ba0ae8a129d452865b" +sha256 = "17629e273b63c5c18ed8c034c06a317115bb626e51dc82f7a5f55c70f4bafde0" [task.inputs.netlist] path = "materials/circuit.spice" format = "spice" -sha256 = "659e961943b07c6a7665d4e640a037508fc255ce66752c02ca5de94ae1d07e58" subcircuit = "gf180mcu_voidwalkers_sc_sdffrnq_4" +sha256 = "659e961943b07c6a7665d4e640a037508fc255ce66752c02ca5de94ae1d07e58" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "43d1b9312f6024b9fe2f2c55e841d741e915254ffa5d9a1e476ab406323c46dc" +sha256 = "85002e6ae68a6b3b94f271f3231beab8f86542a4543d047fe1e0c5f62997949f" [task.output] path = "output/final.gds" @@ -962,9 +962,11 @@ low59 = "V" reset89 = "V" reset99 = "V" low139 = "V" +setup_rise_q = "V" high39 = "V" high79 = "V" high119 = "V" +setup_fall_q = "V" power_w = "W" delay_data_rise = "s" slew_data_rise = "s" @@ -976,6 +978,10 @@ delay_scan_fall = "s" slew_scan_fall = "s" delay_reset_fall = "s" slew_reset_fall = "s" +delay_setup_a_rise = "s" +slew_setup_a_rise = "s" +delay_setup_a_fall = "s" +slew_setup_a_fall = "s" [task.evaluation.jobs.parameters.values] @@ -1001,11 +1007,15 @@ observations = [ "nominal:reset89", "nominal:reset99", "nominal:low139", + "nominal:setup_fall_q", ] unit = "V" direction = "minimize" aggregation = "max" + +[task.evaluation.metrics.requirement] upper = 0.33 +rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load." [[task.evaluation.metrics]] id = "high" @@ -1014,11 +1024,15 @@ observations = [ "nominal:high39", "nominal:high79", "nominal:high119", + "nominal:setup_rise_q", ] unit = "V" direction = "maximize" aggregation = "min" + +[task.evaluation.metrics.requirement] lower = 2.97 +rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load." [[task.evaluation.metrics]] id = "supply" @@ -1034,9 +1048,12 @@ baseline = [ "source_nominal:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + [[task.evaluation.metrics]] id = "propagation_delay" category = "performance" @@ -1046,6 +1063,8 @@ observations = [ "nominal:delay_scan_rise", "nominal:delay_scan_fall", "nominal:delay_reset_fall", + "nominal:delay_setup_a_rise", + "nominal:delay_setup_a_fall", ] baseline = [ "source_nominal:delay_data_rise", @@ -1053,13 +1072,22 @@ baseline = [ "source_nominal:delay_scan_rise", "source_nominal:delay_scan_fall", "source_nominal:delay_reset_fall", + "source_nominal:delay_setup_a_rise", + "source_nominal:delay_setup_a_fall", ] unit = "s" direction = "minimize" aggregation = "max" dimension = "response" normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0.0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[task.evaluation.metrics.quality_target] +value = 5.5e-10 +rationale = "Keep all declared clock/data/reset-to-Q timing observations within 550 ps at 50 fF, including the late-cycle capture exercises." [[task.evaluation.metrics]] id = "output_transition" @@ -1070,6 +1098,8 @@ observations = [ "nominal:slew_scan_rise", "nominal:slew_scan_fall", "nominal:slew_reset_fall", + "nominal:slew_setup_a_rise", + "nominal:slew_setup_a_fall", ] baseline = [ "source_nominal:slew_data_rise", @@ -1077,31 +1107,36 @@ baseline = [ "source_nominal:slew_scan_rise", "source_nominal:slew_scan_fall", "source_nominal:slew_reset_fall", + "source_nominal:slew_setup_a_rise", + "source_nominal:slew_setup_a_fall", ] unit = "s" direction = "minimize" aggregation = "max" dimension = "response" normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0.0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 175.5775 -rationale = "Scan flip-flop: clock-to-output delay 51%; output transition 17%; supply power 17%; area 15%. Each objective's weight is divided equally among its metrics." +area_target = 100.0 +rationale = "The 100 um2 area goal rewards compact latch, clock and scan-multiplexer placement. Timing 45% and area 40% expose clock/internal-node routing cost, with 10% slew and 5% power. The 550 ps target is close to the slowest source path. Fixed setup/hold exercises establish correct capture, not a characterized minimum setup or hold time." [task.evaluation.scoring.weights] -functional_area = 0.15 -propagation_delay = 0.51 -output_transition = 0.17 -supply = 0.17 +functional_area = 0.4 +propagation_delay = 0.45 +output_transition = 0.1 +supply = 0.05 [task.evaluation.pre_layout] -source_report_sha256 = "7c186efc01707e6576d7e22647bdb61c6ed569f153d08f49cbfed8c6f659cdfb" +source_report_sha256 = "134505ad949e6884fc916494c291d60ef09ed321c20a6c91aa17279ec71fff54" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a340269fb13edfad479628bd59a0b72b878e648c0740e89671cd95b64adc03ef\", \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"4c7a26df97245613922e47bdae060a40d6cb59f9c243e22d8964f97209f47011\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -1113,34 +1148,40 @@ dut = "input:netlist" [task.evaluation.pre_layout.jobs.source_nominal.outputs] waveform = "ngspice-raw" +[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] +waveform = "waveform.raw" + [task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements] +delay_data_fall = "s" +delay_data_rise = "s" +delay_reset_fall = "s" +delay_scan_fall = "s" +delay_scan_rise = "s" +delay_setup_a_fall = "s" +delay_setup_a_rise = "s" +high119 = "V" +high39 = "V" +high79 = "V" +low139 = "V" low19 = "V" low59 = "V" +power_w = "W" reset89 = "V" reset99 = "V" -low139 = "V" -high39 = "V" -high79 = "V" -high119 = "V" -power_w = "W" -delay_data_rise = "s" -slew_data_rise = "s" -delay_data_fall = "s" +setup_fall_q = "V" +setup_rise_q = "V" slew_data_fall = "s" -delay_scan_rise = "s" -slew_scan_rise = "s" -delay_scan_fall = "s" -slew_scan_fall = "s" -delay_reset_fall = "s" +slew_data_rise = "s" slew_reset_fall = "s" +slew_scan_fall = "s" +slew_scan_rise = "s" +slew_setup_a_fall = "s" +slew_setup_a_rise = "s" [task.evaluation.pre_layout.jobs.source_nominal.parameters.values] -[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] -waveform = "waveform.raw" - [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "43d1b9312f6024b9fe2f2c55e841d741e915254ffa5d9a1e476ab406323c46dc" +deck = "85002e6ae68a6b3b94f271f3231beab8f86542a4543d047fe1e0c5f62997949f" dut = "659e961943b07c6a7665d4e640a037508fc255ce66752c02ca5de94ae1d07e58" [task.evaluation.pre_layout.jobs.source_nominal.measurements.delay_data_fall] @@ -1163,6 +1204,14 @@ unit = "s" value = 5.49924e-10 unit = "s" +[task.evaluation.pre_layout.jobs.source_nominal.measurements.delay_setup_a_fall] +value = 5.492423e-10 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.delay_setup_a_rise] +value = 5.499524e-10 +unit = "s" + [task.evaluation.pre_layout.jobs.source_nominal.measurements.high119] value = 3.3 unit = "V" @@ -1188,7 +1237,7 @@ value = 3.66929e-08 unit = "V" [task.evaluation.pre_layout.jobs.source_nominal.measurements.power_w] -value = 4.187209e-05 +value = 3.956966e-05 unit = "W" [task.evaluation.pre_layout.jobs.source_nominal.measurements.reset89] @@ -1199,6 +1248,14 @@ unit = "V" value = 7.300858e-09 unit = "V" +[task.evaluation.pre_layout.jobs.source_nominal.measurements.setup_fall_q] +value = 0.0005908675 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.setup_rise_q] +value = 3.292228 +unit = "V" + [task.evaluation.pre_layout.jobs.source_nominal.measurements.slew_data_fall] value = 2.787912e-10 unit = "s" @@ -1219,11 +1276,22 @@ unit = "s" value = 3.358867e-10 unit = "s" +[task.evaluation.pre_layout.jobs.source_nominal.measurements.slew_setup_a_fall] +value = 2.787912e-10 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.slew_setup_a_rise] +value = 3.358857e-10 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +waveform = "86580f93eed2615372bb626bef61c7e4a88d5c355086b0579f97326387c8e71b" + [toolchain.backends.artifact] type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 180 @@ -1231,7 +1299,7 @@ timeout_seconds = 180 type = "klayout-docker" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" timeout_seconds = 180 support = "build/support/gf180-physical" @@ -1244,7 +1312,7 @@ support = "physical" type = "klayout-docker" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" timeout_seconds = 180 support = "build/support/gf180-physical" @@ -1257,14 +1325,14 @@ support = "physical" type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 180 [toolchain.backends.rc] type = "magic-rc-docker" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/gf180-magic" technology = "gf180mcuD.tech" tech_name = "gf180mcuD" @@ -1281,7 +1349,10 @@ support = "magic" type = "ngspice-docker" [toolchain.backends.ngspice.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/gf180-models" timeout_seconds = 240 diff --git a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/schematic.svg b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/schematic.svg index b2f8bb8ec8c0e18516c7a74e0860b2c42d4d60c8..b119aa29ba11cc51e281c402ba9905fde8c14a1f 100644 --- a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/schematic.svg +++ b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/schematic.svg @@ -1 +1,2 @@ -scan_dff{"format": "iclayout-schematic", "case_id": "gf180mcuD.voidwalkers-scandff.scan_dff", "netlist_sha256": "659e961943b07c6a7665d4e640a037508fc255ce66752c02ca5de94ae1d07e58", "project_sha256": "026355359b88d5571512ab36e7c5a600600cfa1daa05e82656b2365713aedd61", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/gf180mcuD/voidwalkers-scandff/", "sheets": ["gf180mcu_voidwalkers_sc_sdffrnq_4", "d_flip_flop_r", "mux_toplevel_nobuffer", "mux_tg", "mux_inverter"], "banks": [], "source_netlist": "tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/circuit.spice", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "PROBE[n] node names are retained; export verification uses the editor Spectre syntax encoder because its ngspice encoder rejects brackets. No Spectre simulator is required or used."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}gf180mcu_voidwalkers_sc_sdffrnq_4VDDVSSQDATACLKRNvddINPUT_1vssoutINPUT_2SELECTORBASQCLKRNVDDVDDVSSVSSnet1SVDDQBCLKARNVSSscan_dffgf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figures01 Scan select → resettable flip-flopx1mux_toplevel_nobufferx2d_flip_flop_rModels: d_flip_flop_r · mux_toplevel_nobufferd_flip_flop_rnet1DATAVDDnet3PROBE[1]CLKCLK_INVnet2net4VSSPROBE[0]VDDnet9PROBE[0]RVSSPROBE[1]net5PROBE[1]VDDnet7PROBE[3]CLK_INV_2CLKnet6net8VSSPROBE[2]VDDnet10PROBE[2]RVSSPROBE[3]PROBE[3]VDDQVSSQNCLK_INV_2CLK_INVRRNVDDVSSCLKVDDVSSQDATACLKRNd_flip_flop_rgf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figures01 Master sampling / feedbackXM11.7/0.3XM131.7/0.3XM31.7/0.3XM151.7/0.3XM20.85/0.3XM140.85/0.3XM40.85/0.3XM160.85/0.3P bulk → VDDN bulk → VSS02 Master reset latchXM61.7/0.3XM271.7/0.3XM280.85/0.3XM70.85/0.3P bulk → VDDN bulk → VSS03 Slave sampling / feedbackXM91.7/0.3XM191.7/0.3XM111.7/0.3XM211.7/0.3XM100.85/0.3XM200.85/0.3XM120.85/0.3XM220.85/0.3P bulk → VDDN bulk → VSS04 Slave reset latchXM171.7/0.3XM291.7/0.3XM300.85/0.3XM180.85/0.3P bulk → VDDN bulk → VSS05 Output buffersXM231.7/0.3XM251.7/0.3XM240.85/0.3XM260.85/0.3P bulk → VDDN bulk → VSS06 Clock and reset polarityXM51.7/0.3XM331.7/0.3XM311.7/0.3XM80.85/0.3XM340.85/0.3XM320.85/0.3P bulk → VDDN bulk → VSSModels: pfet_03v3 · nfet_03v3mux_toplevel_nobufferVDDP_GATEINOUTN_GATEVSSVDDP_GATEINOUTN_GATEVSSvddinout_invgndnet1vssINPUT_1INPUT_2outvddvddvddSELECTORnet1net1vddINPUT_1vssoutINPUT_2SELECTORmux_toplevel_nobuffergf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figures01 Scan-data selectionx1mux_inverterx2mux_tgx3mux_tgModels: mux_tg · mux_invertermux_tgP_GATEN_GATEINOUTVDDP_GATEINOUTN_GATEVSSmux_tggf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figures01 Transmission gateXM21.7/0.3XM10.85/0.3P bulk → VDDN bulk → VSSModels: nfet_03v3 · pfet_03v3mux_invertervddgndout_invinvddinout_invgndmux_invertergf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figures01 Select inverterXM21.7/0.3XM10.85/0.3P bulk → vddN bulk → gndModels: nfet_03v3 · pfet_03v3 \ No newline at end of file +scan_dff{"format":"iclayout-schematic","case_id":"gf180mcuD.voidwalkers-scandff.scan_dff","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/gf180mcuD/voidwalkers-scandff/","sheets":["gf180mcu_voidwalkers_sc_sdffrnq_4","d_flip_flop_r","mux_toplevel_nobuffer","mux_tg","mux_inverter"],"banks":[],"source_netlist":"tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/circuit.spice","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","PROBE[n] node names are retained; export verification uses the editor Spectre syntax encoder because its ngspice encoder rejects brackets. No Spectre simulator is required or used."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["gf180mcu_voidwalkers_sc_sdffrnq_4"],"scope":"main-sheet","editable_project":"tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/design/scan_dff.icproj.json"}}Main-sheet overview; 4 child sheets are available in the editable .icproj.json project. Equal net labels connect.gf180mcu_voidwalkers_sc_sdffrnq_4VDDVSSQDATACLKRNvddINPUT_1vssoutINPUT_2SELECTORVDDnet1SVDDQBCLKARNVSSscan_dffgf180mcuD · voidwalkers-scandff | W/L in µm · display rounded to 3 significant figuresx1mux_toplevel_nobufferx2d_flip_flop_r + diff --git a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/testbench.spice b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/testbench.spice index 98c658244bdcf24bca299d2a40e1ed27c4b58a7f..32794d092fd9ce58a5506b1bd31a8f4ca6176f1f 100644 --- a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/testbench.spice +++ b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/materials/testbench.spice @@ -7,12 +7,13 @@ VDD vdd 0 3.3 VCLK clk 0 PULSE(0 3.3 10n .1n .1n 10n 20n) VRN rn 0 PWL(0 0 5n 0 5.1n 3.3 85n 3.3 85.1n 0 95n 0 95.1n 3.3) VS s 0 PWL(0 0 40n 0 40.1n 3.3 80n 3.3 80.1n 0) -VA a 0 PWL(0 0 20n 0 20.1n 3.3 60n 3.3 60.1n 0 100n 0 100.1n 3.3 120n 3.3 120.1n 0) +VA a 0 PWL(0 0 20n 0 20.1n 3.3 60n 3.3 60.1n 0 100n 0 100.1n 3.3 120n 3.3 120.1n 0 149.2n 0 149.3n 3.3 150.2n 3.3 150.3n 0 169.1n 0 169.2n 3.3 170.1n 3.3 170.2n 0 180.1n 0 180.2n 3.3 189.2n 3.3 189.3n 0 190.2n 0 190.3n 3.3 200n 3.3) VB b 0 PWL(0 0 60n 0 60.1n 3.3) CLOAD q 0 50f XDUT s vdd q b clk a rn 0 gf180mcu_voidwalkers_sc_sdffrnq_4 .control -tran .01n 140n +save i(vdd) v(clk) v(q) v(rn) +tran .01n 200n meas tran low19 find v(q) at=19n meas tran high39 find v(q) at=39n meas tran low59 find v(q) at=59n @@ -21,6 +22,8 @@ meas tran reset89 find v(q) at=89n meas tran reset99 find v(q) at=99n meas tran high119 find v(q) at=119n meas tran low139 find v(q) at=139n +meas tran setup_rise_q find v(q) at=151.5n +meas tran setup_fall_q find v(q) at=191.5n * Measure effective CLK->Q arcs for functional and scan data, plus asynchronous reset. meas tran delay_data_rise trig v(clk) val=1.65 rise=1 td=100n targ v(q) val=1.65 rise=1 td=100n meas tran slew_data_rise trig v(q) val=0.66 rise=1 td=100n targ v(q) val=2.64 rise=1 td=100n @@ -32,8 +35,13 @@ meas tran delay_scan_fall trig v(clk) val=1.65 rise=1 td=40n targ v(q) val=1.65 meas tran slew_scan_fall trig v(q) val=2.64 fall=1 td=40n targ v(q) val=0.66 fall=1 td=40n meas tran delay_reset_fall trig v(rn) val=1.65 fall=1 td=80n targ v(q) val=1.65 fall=1 td=80n meas tran slew_reset_fall trig v(q) val=2.64 fall=1 td=80n targ v(q) val=0.66 fall=1 td=80n +* Exercise 0.8 ns A setup and 0.2 ns post-edge A hold around rising clock edges. +meas tran delay_setup_a_rise trig v(clk) val=1.65 rise=1 td=150n targ v(q) val=1.65 rise=1 td=150n +meas tran slew_setup_a_rise trig v(q) val=0.66 rise=1 td=150n targ v(q) val=2.64 rise=1 td=150n +meas tran delay_setup_a_fall trig v(clk) val=1.65 rise=1 td=190n targ v(q) val=1.65 fall=1 td=190n +meas tran slew_setup_a_fall trig v(q) val=2.64 fall=1 td=190n targ v(q) val=0.66 fall=1 td=190n let pwr=-3.3*i(vdd) -meas tran power_w avg pwr from=20n to=140n +meas tran power_w avg pwr from=20n to=200n write waveform.raw quit .endc diff --git a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/problem.md b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/problem.md index d90ac144c3f8c2775f805e86cd75b08f2c21b110..ab8efd2b1a99921087be76d6c462cf416f2f0e8c 100644 --- a/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/problem.md +++ b/tasks/gf180mcuD/voidwalkers-scandff/cases/scan_dff/problem.md @@ -6,29 +6,30 @@ Implement `gf180mcu_voidwalkers_sc_sdffrnq_4` in GF180MCU variant D while preser ## Inputs and Interface -The delivered files are `materials/circuit.spice` (authoritative circuit), `materials/testbench.spice` (stimuli and measurements), and this problem. Runtime task metadata supplies the same frozen constraints, evaluation conditions and output declaration. +Inputs are this description, `materials/circuit.spice` (the authoritative circuit) and `materials/testbench.spice` (stimuli and measurements). Runtime task metadata supplies consistent frozen constraints, evaluation conditions and output declarations. Ordered subcircuit and GDS interface: `S, VDD, Q, B, CLK, A, RN, VSS`. VDD/VSS: supply/return; A: functional data; B: scan data; S: select (0=A, 1=B); CLK: rising-edge clock; RN: active-low asynchronous reset; Q: stored output. -Preserve topology and total device width, channel length, multiplicity, resistor dimensions and body connections. Equivalent hierarchy, diffusion sharing and parallel-finger implementations are allowed when they pass connectivity and electrical checks. No source-model replacement, idealized internal device or changed device sizing is permitted. A dummy device remains part of the circuit even when its terminals are tied together. +Preserve topology, total device widths, channel lengths, multiplicities, resistor dimensions and body connections. Equivalent hierarchy, diffusion sharing and parallel fingers are allowed when connectivity and electrical checks pass; preserve source models and dimensions without idealizing internal devices. Retain dummy devices even when all their terminals are shorted. ## Operating Conditions -Use 3.3 V and 27 C, a 50 fF Q load and the same 50 MHz clock throughout (first rise 10 ns, rise/fall 0.1 ns, high time 10 ns). Select A initially; select B at 40.1 ns; return to A at 80.1 ns. A rises at 20.1 ns, falls at 60.1 ns, rises at 100.1 ns and falls at 120.1 ns. B rises at 60.1 ns. RN starts low, releases at 5.1 ns, asserts at 85.1 ns and releases at 95.1 ns. All data/reset transitions take 0.1 ns, as specified in the testbench. Simulate through 140 ns. +Use 3.3 V and 27 C, a 50 fF Q load and the same 50 MHz clock throughout (first rise 10 ns, rise/fall 0.1 ns, high time 10 ns). Select A initially; select B at 40.1 ns; return to A at 80.1 ns. A rises at 20.1 ns, falls at 60.1 ns, rises at 100.1 ns and falls at 120.1 ns. B rises at 60.1 ns. RN starts low, releases at 5.1 ns, asserts at 85.1 ns and releases at 95.1 ns. All data/reset transitions take 0.1 ns, as specified in the testbench. -Use the reviewed typical primitive models with statistical variation disabled. Numerical parameters in the runtime simulation jobs supply the testbench's `parameters.spice`. Follow the delivered testbench for interpolation and detailed PWL definitions. This is a nominal compact-model task; temperature/process corners, mismatch yield, noise, RF/EM and full-chip density closure are outside its qualification scope. +The testbench also checks two late-cycle A-to-Q cases at the nominal 50 MHz clock and 50 fF load. At each measured rising edge, A crosses 1.65 V 0.8 ns before the edge and makes the opposite transition 0.2 ns after it, exercising setup and hold behavior. It checks Q after the capture edge and source-pairs the corresponding clock-to-Q delay and output slew. These fixed setup/hold exercises do not measure minimum setup/hold time or establish timing signoff across corners. Simulate through 200 ns. + +Use reviewed typical primitive models with statistical variation disabled. Numerical parameters from runtime simulation jobs generate the testbench's `parameters.spice`; interpolation and detailed PWL follow the delivered deck. Scope is limited to nominal compact-model conditions, excluding temperature/process corners, mismatch yield, noise, RF/EM and full-chip density closure. ## Physical Requirements -Submit a nonempty GDS with top cell `gf180mcu_voidwalkers_sc_sdffrnq_4` and at most 10485760 bytes. Its functional bounding box must not exceed 80 by 80 um. All relevant device and routing polygons contribute, including implant/well, passive markers, contacts, vias and dummy routing. The complete layer/datatype set is: +Submit a nonempty GDS with top cell `gf180mcu_voidwalkers_sc_sdffrnq_4`, no larger than 10485760 bytes. The functional bounding box must fit within 80 × 80 um and includes relevant device and routing polygons, implants/wells, passive markers, contacts, vias and dummy routing. The complete layer/datatype set is: `[[5,0],[11,17],[11,39],[12,0],[13,17],[21,0],[22,0],[22,4],[24,0],[24,5],[30,0],[30,4],[31,0],[32,0],[33,0],[34,0],[34,3],[34,4],[34,5],[35,0],[36,0],[36,3],[36,4],[36,5],[37,0],[38,0],[40,0],[41,0],[42,0],[42,3],[42,4],[42,5],[46,0],[46,3],[46,4],[46,5],[49,0],[53,0],[53,3],[53,4],[53,5],[55,0],[62,0],[75,0],[80,5],[81,0],[81,3],[81,4],[81,5],[82,0],[86,17],[88,17],[96,1],[100,5],[100,7],[100,8],[108,5],[110,5],[110,11],[110,12],[110,13],[110,14],[110,15],[110,16],[111,5],[112,1],[115,5],[116,5],[117,5],[117,10],[118,5],[119,5],[122,5],[123,5],[124,5],[125,5],[127,5],[128,17],[137,5],[151,5],[152,5],[153,51],[166,5],[167,5],[173,5],[178,0],[183,0],[184,0],[185,0],[204,0],[210,0],[220,0],[226,0],[227,0],[241,0]]`. -Text and nonfunctional boundary layers 0/0 and 63/0 are excluded from area. Functional geometry may not be hidden on annotation layers. Pass the pinned GF180 D FEOL, BEOL, connectivity, off-grid and antenna checks without marker waivers. The stack is five metals with 1.1 um top metal and the 1 kOhm/square high-resistance poly option. Chip-level density and seal-ring closure are integration responsibilities outside this standalone block. - -LVS checks device topology, dimensions, body connections and every named top-level pin (case insensitive). Supply and substrate/well contacts must be physical. Distinct electrical nets must not be joined by touching silicided diffusion. After validity and geometry gates, extract the submitted candidate's devices and distributed interconnect resistance and capacitance. Simulations use that extracted circuit. The substrate compact-model boundary is one equipotential bulk domain with explicit well/body contacts; this does not model a distributed silicon substrate network. Unreliable extraction, absent named ports or incomplete measurements cannot establish success. +Area excludes text and nonfunctional boundary layers 0/0 and 63/0; functional geometry must remain on functional layers. Pass the fixed GF180 D FEOL, BEOL, connectivity, grid and antenna checks without waivers. Use five metal layers, the 1.1 um top-metal option and the 1 kOhm/square high-resistance poly option. Chip density and seal-ring closure belong to higher-level integration. +LVS checks topology, dimensions, body terminals and all named top-level ports, case-insensitively. Physically implement supply and substrate/well contacts; do not short different nets through adjoining silicided diffusion. After validity and geometric checks pass, extract candidate devices and distributed interconnect RC, then simulate the extracted circuit. The substrate model is one equipotential body region with explicit well/body contacts, rather than a distributed silicon-substrate network. Unreliable extraction, missing ports or incomplete measurements cannot establish success. The standard-cell functional frame has fixed height 6.35 um and width on a 0.005 um grid. Coordinates below are relative to its lower-left functional bound; global translation remains allowed. Supply rails must be continuous on metal1 and bound by LVS to the named supply. @@ -37,80 +38,55 @@ The standard-cell functional frame has fixed height 6.35 um and width on a 0.005 ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence; the quality targets below set the scoring anchors without depending on the submitted GDS. Reports retain every source/candidate pair. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_target / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Joint attainment of the electrical and area targets scores 100 points; better valid solutions may exceed 100. A feasible reference is allowed to score far below 100. Weights express quality tradeoffs rather than hard bounds. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | | --- | --- | --- | --- | --- | --- | -| `low` | Q at 19, 59, 89, 99 and 139 ns; the 89 ns sample checks asynchronous reset before the next rising clock. | V | functional check | −∞ … 0.33 | — | -| `high` | Q at 39, 79 and 119 ns, exercising functional and scan data. | V | functional check | 2.97 … +∞ | — | -| `propagation_delay` | Worst paired quality over: delay_data_rise, delay_data_fall, delay_scan_rise, delay_scan_fall, delay_reset_fall. | s | minimize / ratio | 0 … +∞ | — | -| `output_transition` | Worst paired quality over: slew_data_rise, slew_data_fall, slew_scan_rise, slew_scan_fall, slew_reset_fall. | s | minimize / ratio | 0 … +∞ | — | -| `supply` | Average VDD power over 20–140 ns. | W | minimize / ratio | 0 … +∞ | 1e-12 | +| `low` | Q at 19, 59, 89, 99 and 139 ns plus the 191.5 ns near-edge capture/hold check; the 89 ns sample checks asynchronous reset before the next rising clock. | V | functional check | −∞ … 0.33 | — | +| `high` | Q at 39, 79 and 119 ns plus the 151.5 ns near-edge capture/hold check, exercising functional and scan data. | V | functional check | 2.97 … +∞ | — | +| `propagation_delay` | Worst paired quality over the five existing data/scan/reset arcs and two additional A-data clock-to-Q arcs with 0.8 ns setup. | s | minimize / ratio | 0 … +∞ | — | +| `output_transition` | Worst paired quality over the five existing data/scan/reset arcs and the two additional A-data output-slew arcs with 0.8 ns setup. | s | minimize / ratio | 0 … +∞ | — | +| `supply` | Average VDD power over 20–200 ns, including the late-cycle timing stimuli. | W | minimize / ratio | 0 … +∞ | 1e-12 | -Area reference: **175.5775 um2**. Complete functional bounding rectangle of the declared standard-cell reference GDS: 27.65 by 6.35 um = 175.577 um2. Reference SHA-256: ffd6654d5505bf6340acbb3061ad81fab36951badda45b3bd3a8448be0fa00ab. This footprint includes the maintained explicit taps and routing. +The area scoring target is **100 um2**. It is a continuous quality goal, not a hard limit, process minimum or a percentage of the current feasibility witness. -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +- `propagation_delay`: **5.5e-10 s**. Keep all declared clock/data/reset-to-Q timing observations within 550 ps at 50 fF, including the late-cycle capture exercises. -### Standard-cell design guidance +The 100 um2 area goal rewards compact latch, clock and scan-multiplexer placement. Timing 45% and area 40% expose clock/internal-node routing cost, with 10% slew and 5% power. The 550 ps target is close to the slowest source path. Fixed setup/hold exercises establish correct capture, not a characterized minimum setup or hold time. -Plan the device rows, power rails and signal access before routing. Represent -pull-up and pull-down connectivity as transistor-edge graphs; explore compatible -Euler trails and alternative orderings to share diffusion and reduce breaks. -Choose among legal orderings using routing length, parasitic loading and signal -access, rather than diffusion sharing alone. Preserve the fixed netlist sizes, -models and connectivity; size optimization is outside this task. +Quality targets do not impose additional functional cutoffs. Metrics without an explicit target retain their same-condition source anchors. -Use the task's declared row height, grid and rail geometry. Keep local routes -compact, leave signal pins accessible, and avoid consuming extra routing layers -without benefit. Check DRC and named-port LVS, then extract the candidate and -compare both transition directions and power with the source simulation. Iterate -on measured parasitic effects rather than visual compactness alone. These are -optional techniques, not a mandated algorithm or reference placement. +The capability coefficient is **5**, independent of this task's reference-normalized score. -Adapted from Xu et al., *Standard Cell Library Design and Optimization Methodology -for ASAP7 PDK*, Sections 2–3 (https://arxiv.org/abs/1807.11396). Its FinFET sizing, -track counts and process-specific dimensions do not apply to this task. +### Standard-cell design guidance +You may plan device rows, supply rails and signal access before routing. Represent pull-up/pull-down connections as transistor-edge graphs and explore compatible Euler paths and alternative orders to share diffusion and reduce breaks. Choose a legal arrangement considering routing length, parasitics and signal access. Keep fixed netlist sizes, models and connections; do not optimize sizing. -### Score weights +Use the declared row height, grid and supply-rail geometry. Keep local routing compact and signal pins accessible, avoiding routing layers with no benefit. Check DRC and named-port LVS, then extract the candidate and compare transitions in both directions and power against source simulation; iterate using parasitic measurements. These methods are optional and do not prescribe an algorithm or reference layout. -Scan flip-flop: clock-to-output delay 51%; output transition 17%; supply power 17%; area 15%. Each objective's weight is divided equally among its metrics. +These methods refer to Sections 2–3 of Xu et al., *Standard Cell Library Design and Optimization Methodology for ASAP7 PDK* (https://arxiv.org/abs/1807.11396). Its FinFET sizing, track count and process-specific dimensions do not apply to this task. + +### Score weights | Metric | Weight | | --- | ---: | -| `functional_area` | 0.15 | -| `propagation_delay` | 0.510000000000 | -| `output_transition` | 0.170000000000 | -| `supply` | 0.170000000000 | +| `functional_area` | 0.4 | +| `propagation_delay` | 0.45 | +| `output_transition` | 0.1 | +| `supply` | 0.05 | ## Tools and Submission Solve budget: **3 hours**. -Use runtime task, resource and harness discovery to locate the delivered inputs and reviewed GF180 resources. Trusted feedback runs the declared physical and post-layout evaluation; source-only simulation is useful for design but is not acceptance. Write the final GDS to `/workspace/output/final.gds` and explicitly submit it using the harness submission interface. A generated file or successful standalone simulation alone does not complete the task. +Discover inputs and reviewed GF180 resources through the runtime task, resource and submission protocols. Trusted feedback executes the declared physical and post-layout evaluation; source simulation only assists design. Write the final GDS to `/workspace/output/final.gds` and explicitly submit through the runtime protocol. File generation or a successful standalone simulation alone does not complete the task. -Use a GDS database unit of 0.001 um, as required by the GF180MCU DRC deck. +Use a GDS database unit of 0.001 um as required by GF180MCU DRC rules. diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/case.toml b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/case.toml index 85a0a3f544ab3072d55f316162fd8c809e3aa571..961ff39bcee3271f52ce368886e8456f0dc5162c 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/case.toml +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "module_3_8_bit_SAR_ADC.part_5_analog_layout.comparator" title = "IHP AnalogAcademy comparator" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "6555f7c6a8b7a3330ccb93621458f99753c3ceadd7acab40fb9610bd64edf3c1" +sha256 = "cfc9095bb59e3408eab339880f64e488005f2861c257ea6ee942ef46a0aa85de" [[assets]] path = "reference/DIFF_COMPARATOR.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-comparator-rc-tt" [task.inputs.description] path = "problem.md" -sha256 = "c15d95f6e71753ce74b456e4f0b8ff70ab3ebd15fb6b15f7bfe261f8358f653a" format = "text" +sha256 = "2a80ec3a49eab643333d8121018e7228a1ba1dd2464a1370d8837611c7e88f3e" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "0fe0279db5d2975dec32196670118a05d0dd9a240e7f70b642c94e0a7ec80a4c" format = "spice" subcircuit = "DIFF_COMPARATOR" +sha256 = "0fe0279db5d2975dec32196670118a05d0dd9a240e7f70b642c94e0a7ec80a4c" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "daffa3508cb005a2a96651e48ec56909c94596208d48cbc099e24702f8f72221" format = "spice" +sha256 = "daffa3508cb005a2a96651e48ec56909c94596208d48cbc099e24702f8f72221" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "61d8165d7b359539cebe3a94815dcbd22cede35ca87c393e345832523f3c4c8e" format = "spice" +sha256 = "61d8165d7b359539cebe3a94815dcbd22cede35ca87c393e345832523f3c4c8e" [task.constraints] quality = [ @@ -576,7 +576,10 @@ baseline = [ "source_positive_5mv:delay_c09", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "decision_margin" @@ -618,7 +621,10 @@ observations = [ unit = "V" direction = "maximize" aggregation = "min" + +[task.evaluation.metrics.requirement] lower = 1.0 +rationale = "The clocked comparator must hold the polarity-correct 1 V differential logic decision throughout every declared decision window, matching the decision threshold used for timing." [[task.evaluation.metrics]] id = "supply_power" @@ -640,14 +646,17 @@ baseline = [ "source_positive_5mv:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "3a8ba863ecaddad4b7a01a0ac94e32a8770b03b0d7aeda98f3fcf1f88c2e56f5" +source_report_sha256 = "a394889677327cea33683d1a1d7656cb18c7cabc8363cc74d777e22d3f6f9afd" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"30c5b5b710850a636e75d962f27982d72b8b68307dd77a34df044e2a3b07d34b\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_negative_5mv] operation = "circuit.simulate" @@ -757,6 +766,9 @@ unit = "V" value = 5.722953e-05 unit = "W" +[task.evaluation.pre_layout.jobs.source_negative_5mv.output_sha256] +waveform = "2e45ec295299cba6a91602496fcf77c74a8f04ee22222d58138d5d8d6c1198b5" + [task.evaluation.pre_layout.jobs.source_negative_3mv] operation = "circuit.simulate" @@ -865,6 +877,9 @@ unit = "V" value = 5.815247e-05 unit = "W" +[task.evaluation.pre_layout.jobs.source_negative_3mv.output_sha256] +waveform = "e5129f1f45095560be335028e88030799611d03e1be05e2264b6a4972b92b76b" + [task.evaluation.pre_layout.jobs.source_positive_3mv] operation = "circuit.simulate" @@ -973,6 +988,9 @@ unit = "V" value = 5.782437e-05 unit = "W" +[task.evaluation.pre_layout.jobs.source_positive_3mv.output_sha256] +waveform = "a73ee16b6882e0ee905cd0fe3e2cb743b88f70a944da2030e20d47b3c5cd2a01" + [task.evaluation.pre_layout.jobs.source_positive_5mv] operation = "circuit.simulate" @@ -1081,11 +1099,14 @@ unit = "V" value = 5.667991e-05 unit = "W" +[task.evaluation.pre_layout.jobs.source_positive_5mv.output_sha256] +waveform = "96f7d3ea97f82f75fc54b1bf367873f9f7fce58dab855672c5b5a5c60db8836f" + [toolchain.backends.artifact] type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" [toolchain.backends.drc] @@ -1095,7 +1116,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/comparator-klayout" profile = "drc-upstream.json" @@ -1108,7 +1129,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/comparator-klayout" profile = "lvs-upstream.json" @@ -1118,7 +1139,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.rc] @@ -1128,7 +1149,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/comparator-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1143,7 +1164,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/comparator-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/schematic.svg b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/schematic.svg index 64a01b3bd7a13f946e4def79f38f6fbbc57ef241..5ed1e7c7f3b01c41a159bd40d043a157d42f3752 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/schematic.svg +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/schematic.svg @@ -1 +1,2 @@ -comparator{"format": "iclayout-schematic", "case_id": "module_3_8_bit_SAR_ADC.part_5_analog_layout.comparator", "netlist_sha256": "0fe0279db5d2975dec32196670118a05d0dd9a240e7f70b642c94e0a7ec80a4c", "project_sha256": "21dc89819dfc2d5117385f13f03f48c9854bdb20e78655b5d6ca04019c8a6784", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/IHP-AnalogAcademy/", "sheets": ["DIFF_COMPARATOR"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}DIFF_COMPARATORvbiasvddv-v+net4net1clknet2net3gndout-net2vddout+net3gndgndvddwellgndsubvddgndv+v-clkout-out+vbiascomparatorihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figures01 Clocked differential inputMM918/0.3MM1318/0.3MM18/0.2 ×4MM28/0.2 ×4MM84/0.2MM64/0.2MM74/0.2MM104/0.2P bulk → wellN bulk → sub02 Output invertersMM48/0.2MM58/0.2MM124/0.2MM114/0.2P bulk → wellN bulk → sub03 DummyMM34/0.2 ×4N bulk → sub04 Substrate contacts / repeated banksRR1A=15.4 µm²RR2A=11.4 µm²Models: sg13_lv_pmos · sg13_lv_nmos · ntap1 · ptap1 \ No newline at end of file +comparator{"format":"iclayout-schematic","case_id":"module_3_8_bit_SAR_ADC.part_5_analog_layout.comparator","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/IHP-AnalogAcademy/","sheets":["DIFF_COMPARATOR"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["DIFF_COMPARATOR"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/design/comparator.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.DIFF_COMPARATORvbiasvddv-v+net4net1clknet2net3gndout-net2vddout+net3gndgndvddwellgndsubcomparatorihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figuresMM918/0.3MM1318/0.3MM18/0.2 ×4MM28/0.2 ×4MM84/0.2MM64/0.2MM74/0.2MM104/0.2MM48/0.2MM58/0.2MM124/0.2MM114/0.2MM34/0.2 ×4RR1A=15.4 µm²RR2A=11.4 µm² + diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/problem.md b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/problem.md index 9bb35f518dd65b3c783c9461450e15b29db62586..bdb426867ff723bc5e03fbd42eb01b3d66665544 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/problem.md +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/comparator/problem.md @@ -10,9 +10,7 @@ meet the clocked decision requirements after candidate-derived RC extraction. ## Inputs and Interface -In addition to this problem, the solver receives the following declared -materials. The structured constraints -and evaluation plan are also available at runtime through `/protocol/task.json`. +In addition to this description, the solver receives the following declared materials. The runtime `/protocol/task.json` also supplies structured constraints and the evaluation plan. | Input | Purpose | |---|---| @@ -66,8 +64,7 @@ current `lvs-upstream.json` profile and strict named-port matching against `materials/circuit.cdl`; port names are matched case-insensitively, while every declared port must remain on its own conductor with the declared connectivity. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -88,57 +85,31 @@ extraction choice. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `worst_delay` | Clock falling through 0.6 V to polarity-correct output difference reaching 1 V in cycles 2–9 (trigger delays 20–90 ns; target search starts 5.75 ns later). Every cycle and input condition is paired; the worst quality is scored. | s | minimize / ratio | 0 … +∞ | — | response | | `decision_margin` | Minimum polarity*(V(OUTP)-V(OUTM)) in each 1 ns decision window, 28.75–29.75 ns through 98.75–99.75 ns; all eight cycles and four signed input conditions must pass. | V | functional check | 1.0 … +∞ | — | functional check | | `supply_power` | Mean delivered VDD power, -V(VDD)*I(VDD), over 20–100 ns, independently for each signed input condition. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **502.96 um2**. 24 expanded device instances; sum of device/contact envelopes 306.3377 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **6**; it is independent of -the reference-relative task score. +Area reference: **502.96 um2**. The expanded circuit has 24 device instances, a sum of device/contact envelopes 306.3377 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **6**, independent of this task's reference-normalized score. ### Score weights -Clocked comparators: decision delay 71.1%; supply power 18.9%; area 10%. Each objective's weight is divided equally among its metrics. +Clocked comparator: decision delay 71.1%, supply power 18.9%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -164,7 +135,4 @@ netlist produced by candidate-derived RC extraction. If the harness declares `process-feedback`, the optional command is `python -I /protocol/process_check.py`; the final evaluation remains independent. -Write the result to `/workspace/output/final.gds`, then run -`python -I /protocol/submit.py` and wait for the submission receipt. Solver -netlists, waveforms, and measurements are not accepted as substitutes for the -independent evaluator inputs. +Write the result to `/workspace/output/final.gds`, run `python -I /protocol/submit.py` and wait for a submission receipt. Solver netlists, waveforms and measurements cannot replace independent evaluator inputs. diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/case.toml b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/case.toml index ca8bce6d7dac9f88ac04281e23e3f5c6ef187239..1999590173c2499f486141cbd2cf147bbf3f1346 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/case.toml +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "module_1_bandgap_reference.part_3_layout.OTA_layout.full_OTA" title = "IHP AnalogAcademy full_OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "d02c9549e1d7ef313f774236268cc2f80b6efb6d7c764002fe118bd0a651f70f" +sha256 = "d0ffea6b17b397105057f93491c5f44dce93f8e3f7723c7202cd403569a5fd05" [[assets]] path = "reference/two_stage_OTA_layout.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-full-ota-rc-tt" [task.inputs.description] path = "problem.md" -sha256 = "ab78fb43d86ffe211d3ae76848a0459a591d1631e1c8d287659b8518a530f1a8" format = "text" +sha256 = "0c9b66663404284688d7bfd47bb08eb5a5e38cf252f336e3759e37bfe14b9cc6" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "b26120b95af66cc4075ac9d12a25444b6badbe7e2c96b50d7a1bd7a15b0cf409" format = "spice" subcircuit = "two_stage_OTA_layout" +sha256 = "b26120b95af66cc4075ac9d12a25444b6badbe7e2c96b50d7a1bd7a15b0cf409" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "2c82bb396be0377ae24ee933e5402f87edf9e5da5f2c509774e6ff5c50705a20" format = "spice" +sha256 = "2c82bb396be0377ae24ee933e5402f87edf9e5da5f2c509774e6ff5c50705a20" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "62851f9d9bf6754a4d9b70ca2d9d63a0fd6241ae5e65b289fc5e2e8882469bea" format = "spice" +sha256 = "52b7c144f113f3fd175235e912d8ee6212d541f81492122181f9aca045e48c20" [task.constraints] quality = [ @@ -402,7 +402,10 @@ baseline = [ "source_nominal:unity_gain_bandwidth", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin" @@ -419,8 +422,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -436,9 +442,12 @@ baseline = [ "source_nominal:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "output_bias" category = "performance" @@ -454,14 +463,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "3f51127da701e18e468482e3f12272f1923ec7764474fe59fa890f3ef0ed8e69" +source_report_sha256 = "f4047bdf4424327e402d0ed2d7e04501c8f1b9a1476c1ea678628845e113e903" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"46a60326db6f55e6517e1b351825550ad9e1a19b30e7ba8579189923428f2c9c\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -486,7 +498,7 @@ supply_power = "W" output_bias = "V" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "62851f9d9bf6754a4d9b70ca2d9d63a0fd6241ae5e65b289fc5e2e8882469bea" +deck = "52b7c144f113f3fd175235e912d8ee6212d541f81492122181f9aca045e48c20" dut = "2c82bb396be0377ae24ee933e5402f87edf9e5da5f2c509774e6ff5c50705a20" [task.evaluation.pre_layout.jobs.source_nominal.measurements.low_frequency_gain] @@ -509,11 +521,15 @@ unit = "W" value = 4148602.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +ac = "021787e583eef86c3e0ba57af79027a5c41acc6b2f68801af952e1db0692932f" +op = "05ea8768699ad8c4caae223037737554cb017bc21946db3300f98f65731a0996" + [toolchain.backends.artifact] type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" [toolchain.backends.drc] @@ -523,7 +539,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/full-ota-klayout-spice" profile = "drc-upstream.json" @@ -536,7 +552,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/full-ota-klayout-spice" profile = "lvs-upstream.json" @@ -549,7 +565,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/full-ota-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -561,7 +577,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -571,7 +587,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/full-ota-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/schematic.svg b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/schematic.svg index 4f76e429e6d0b452299c0110d55f9bdc977bca4a..18f1bb85681515c4c8ea86daed5f81f64d316567 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/schematic.svg +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/schematic.svg @@ -1 +1,2 @@ -full_OTA{"format": "iclayout-schematic", "case_id": "module_1_bandgap_reference.part_3_layout.OTA_layout.full_OTA", "netlist_sha256": "b26120b95af66cc4075ac9d12a25444b6badbe7e2c96b50d7a1bd7a15b0cf409", "project_sha256": "26f35c235ecc11623eb2e424d9cce66540de58982ab21bf4979d485005a4a65a", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/IHP-AnalogAcademy/", "sheets": ["two_stage_OTA_layout"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}two_stage_OTA_layoutvssvdddn4ioutvoutdn4dn3dn2vddbulkbulk1bulk4vssbulk2vddioutvddv-v+dn4vssdn2dn3v-v+vssvddioutvoutfull_OTAihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figures01 Input transconductance stageMM75.3/1.95MM13.64/3.7 ×2MM23.64/3.7 ×2MM30.72/9.75MM40.72/9.75MM7: B → bulk1MM1, MM2: B → bulkN bulk → bulk202 Output stage and Miller compensationMM975/2.08MM575/2.08CC222.3/22.3MM628.8/9.75P bulk → bulk4N bulk → bulk203 Input-pair dummiesMM83.64/3.7 ×2MM103.64/3.7 ×2MM153.64/3.7 ×2MM163.64/3.7 ×2P bulk → bulk04 Substrate contacts / repeated banksRR1A=28.1 µm²RR3A=6.96 µm²RR5A=26.8 µm²RR2A=8.56 µm²RR4A=30.3 µm²Models: sg13_lv_nmos · sg13_lv_pmos · cap_cmim · ntap1 · ptap1 \ No newline at end of file +full_OTA{"format":"iclayout-schematic","case_id":"module_1_bandgap_reference.part_3_layout.OTA_layout.full_OTA","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/IHP-AnalogAcademy/","sheets":["two_stage_OTA_layout"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["two_stage_OTA_layout"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/design/full_OTA.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.two_stage_OTA_layoutvssvdddn4ioutvoutdn4dn3dn2vddbulkbulk1bulk4vssbulk2vddioutvddv-v+dn4vssdn2dn3full_OTAihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figuresMM75.3/1.95MM13.64/3.7 ×2MM23.64/3.7 ×2MM30.72/9.75MM40.72/9.75MM7: B → bulk1MM1, MM2: B → bulkMM975/2.08MM575/2.08CC222.3/22.3MM628.8/9.75MM83.64/3.7 ×2MM103.64/3.7 ×2MM153.64/3.7 ×2MM163.64/3.7 ×2RR1A=28.1 µm²RR3A=6.96 µm²RR5A=26.8 µm²RR2A=8.56 µm²RR4A=30.3 µm² + diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/testbench.spice b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/testbench.spice index ed64451d938f472be3830e7688aafac01dd56625..874a523fa3846968bac93fc6843a6be312577f5c 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/testbench.spice +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/materials/testbench.spice @@ -23,6 +23,7 @@ let supply_power = -v(vdd)*i(VDD) let output_bias = v(vout) print supply_power output_bias write ota-op.raw all +save i(vdd) v(vdd) v(vm) v(vout) v(vp) ac dec 100 1 10meg let differential = v(vp)-v(vm) let transfer = v(vout)/differential diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/problem.md b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/problem.md index d721a4dc42a82a5955890b54b2b911241643eb33..8e1133af63d7a2fa3eea5c11edbbd35c995e5ed8 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/problem.md +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/full_OTA/problem.md @@ -11,9 +11,7 @@ AC-response limits after candidate-derived RC extraction. ## Inputs and Interface -In addition to this problem, the solver receives the following declared -materials. The structured constraints -and evaluation plan are also available at runtime through `/protocol/task.json`. +In addition to this description, the solver receives the following declared materials. The runtime `/protocol/task.json` also supplies structured constraints and the evaluation plan. | Input | Purpose | |---|---| @@ -21,8 +19,7 @@ and evaluation plan are also available at runtime through `/protocol/task.json`. | [materials/circuit.spice](materials/circuit.spice) | Pre-layout simulator netlist | | [materials/testbench.spice](materials/testbench.spice) | Nominal bias, feedback fixture, AC sweep, and measurements | -Use one external label on each distinct conductor. Internal nodes must not be -declared as external ports. +Use one external label per independent conductor; internal nodes must not be declared as external ports. | Port | Function | Nominal connection | |---|---|---| @@ -61,15 +58,9 @@ Submit a readable GDSII file with a nonempty `two_stage_OTA_layout` top cell. Th file must be at most 10 MiB (10,485,760 bytes) and must contain the complete hierarchy needed by the target cell. -The evaluator runs the pinned SG13G2 main and additional maximal DRC rules in -deep mode, with density and antenna checks disabled and no waivers. LVS uses the -current `lvs-upstream.json` profile and strict named-port matching against -`materials/circuit.cdl`; every declared port must stay on its own conductor with -the declared connectivity and device parameters. Port names are matched -case-insensitively. +Use the pinned SG13G2 main rules and additional maximal DRC rules in deep mode, with density and antenna checks disabled and no waivers. LVS uses the current `lvs-upstream.json` configuration and strictly matches named ports against `materials/circuit.cdl`, preserving each port's independent conductor, connections and device parameters; port names are case insensitive. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -90,43 +81,19 @@ requirements. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `low_frequency_gain` | AC: Value of `(db((v(vout)/(v(vp)-v(vm))))) at=1`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_gain_bandwidth` | AC: Crossing coordinate where `(db((v(vout)/(v(vp)-v(vm)))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | @@ -134,15 +101,13 @@ source condition; a group uses its worst paired quality. | `supply_power` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `output_bias` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | -Area reference: **2936.48 um2**. 24 expanded device instances; sum of device/contact envelopes 1887.1830 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **6**; it is independent of -the reference-relative task score. +Area reference: **2936.48 um2**. The expanded circuit has 24 device instances, a sum of device/contact envelopes 1887.1830 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **6**, independent of this task's reference-normalized score. ### Score weights -Small-signal OTAs: gain 27%; bandwidth 22.5%; phase margin 22.5%; operating points 4.5%; power 13.5%; area 10%. Each objective's weight is divided equally among its metrics. +Small-signal OTAs: gain 27%, bandwidth 22.5%, phase margin 22.5%, operating points 4.5%, power 13.5%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -157,12 +122,7 @@ Small-signal OTAs: gain 27%; bandwidth 22.5%; phase margin 22.5%; operating poin Solve budget: **3 hours**. -Runtime environment and support resources are declared in -`/protocol/resources.json` and `/protocol/harness.json`; the working directory is -`/workspace`. KLayout performs artifact, DRC, LVS, and geometry checks; Magic -performs RC extraction; ngspice runs the supplied deck with the reviewed SG13G2 -models. The evaluator provides the tool and PDK resources named by the case -toolchain. +See `/protocol/resources.json` and `/protocol/harness.json` for runtime and supporting resources; the working directory is `/workspace`. KLayout checks files, DRC, LVS and geometry, Magic extracts RC, and ngspice runs decks with reviewed SG13G2 models. The evaluator supplies tools and PDK specified by the contract toolchain. For pre-layout simulation, use `materials/circuit.spice` as `dut.spice` beside the supplied testbench, with the model paths and settings exposed by the runtime @@ -171,7 +131,4 @@ candidate-derived extracted netlist. If the harness declares `process-feedback`, the optional command is `python -I /protocol/process_check.py`; the final evaluation remains independent. -Write the result to `/workspace/output/final.gds`, then run -`python -I /protocol/submit.py` and wait for the submission receipt. Solver -netlists, waveforms, and measurements are not accepted as substitutes for the -independent evaluator inputs. +Write the result to `/workspace/output/final.gds`, run `python -I /protocol/submit.py` and wait for a submission receipt. Solver netlists, waveforms and measurements cannot replace independent evaluator inputs. diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/case.toml b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/case.toml index fb71f7bf750aa9f554d879678528444072c00dd4..e05f4a235b92669c7a2556fe6e3a28538ba9efb9 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/case.toml +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "module_1_bandgap_reference.part_3_layout.OTA_layout.input_pair" title = "IHP AnalogAcademy input_pair" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "be0b3098da9309ede946b43b9bda1188c5f8a717d0d558693d32b98ae726e0f2" +sha256 = "1d79d6b9e0810b86b030f483c69745ef084caf776a9fc1670b627162b8022b53" [[assets]] path = "reference/input_common_centroid.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-input-pair-rc-tt" [task.inputs.description] path = "problem.md" -sha256 = "b91a95f0f2879d8d309b2b9a6a9b918bf174b21a49a70f096d8843ffb8351d77" format = "text" +sha256 = "919e94d5dd3388d5d8517fe86cc3ccefe065f4a413559c1882acd8f80b550057" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "25456f0316c22ee5586ad3e306f0d513fd35e48f32ee67ce9cb0dc373d306f3d" format = "spice" subcircuit = "input_common_centroid" +sha256 = "25456f0316c22ee5586ad3e306f0d513fd35e48f32ee67ce9cb0dc373d306f3d" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "cde9a2075fbac6afcf32fd02baf847398de1e9d179b3d3a87762534adfd8bd2b" format = "spice" +sha256 = "cde9a2075fbac6afcf32fd02baf847398de1e9d179b3d3a87762534adfd8bd2b" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "0ce316136b95395971965c7760a711d8431e8c1d4294a074b658520442e11dde" format = "spice" +sha256 = "72c2f7c4f272b1797d936a09ff51ce7d2715f0569d4bd11f6d31d23e9f64b4b0" [task.constraints] quality = [ @@ -397,7 +397,10 @@ baseline = [ "source_nominal:differential_gain", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "differential_gain_high" @@ -413,7 +416,10 @@ baseline = [ "source_nominal:differential_gain_high", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "tail_voltage" @@ -446,8 +452,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "drain_balance" @@ -479,14 +488,17 @@ baseline = [ "source_nominal:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "f82335367c588d196a9e3634129a29b2b3e98a9f67b5fa984c53f940f2253886" +source_report_sha256 = "50fc5cbecb2735b61f960996a3f839f1d5a8e3519184a6ed6cf48f4bea467f3c" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"868b87913ea2ceaa4e2650d73a934158d54aae1ad194f3713dc37b8c89b75884\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -517,7 +529,7 @@ differential_gain = "V/V" differential_gain_high = "V/V" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "0ce316136b95395971965c7760a711d8431e8c1d4294a074b658520442e11dde" +deck = "72c2f7c4f272b1797d936a09ff51ce7d2715f0569d4bd11f6d31d23e9f64b4b0" dut = "cde9a2075fbac6afcf32fd02baf847398de1e9d179b3d3a87762534adfd8bd2b" [task.evaluation.pre_layout.jobs.source_nominal.measurements.common_drain] @@ -544,6 +556,10 @@ unit = "W" value = 1.192980871489 unit = "V" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +ac = "0360aae789606dbd608b542c97e489bea026c36d2f0dc5727c579843eb85e2fd" +op = "af65808f45ca9d302127bba58fdc0289a4b74f113b7d1a3c5b729bf713988aae" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -556,7 +572,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -567,7 +583,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -580,7 +596,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -593,7 +609,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -605,7 +621,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -615,7 +631,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/input-pair-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/schematic.svg b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/schematic.svg index 76659ffa37a8e2d03513d90844d6e2c2eff3f951..2f66491cc84fb7ef3c502d50049de86003477c80 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/schematic.svg +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/schematic.svg @@ -1 +1,2 @@ -input_pair{"format": "iclayout-schematic", "case_id": "module_1_bandgap_reference.part_3_layout.OTA_layout.input_pair", "netlist_sha256": "25456f0316c22ee5586ad3e306f0d513fd35e48f32ee67ce9cb0dc373d306f3d", "project_sha256": "07dfb33d329567ae24c68ca8d5d485de151f54c5bfb5a0c1eb7b711a5c600d8e", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/IHP-AnalogAcademy/", "sheets": ["input_common_centroid"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}input_common_centroiddn4dn3tailvddvddbulkdn3v-dn4v+tailv-v+vdddn3dn4tailinput_pairihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figures01 PMOS differential input pairMM13.64/3.7 ×2MM23.64/3.7 ×2P bulk → bulk02 Input-pair dummiesMM83.64/3.7 ×2MM103.64/3.7 ×2MM153.64/3.7 ×2MM163.64/3.7 ×2P bulk → bulk03 Substrate contacts / repeated banksRR1A=442 µm²Models: sg13_lv_pmos · ntap1 \ No newline at end of file +input_pair{"format":"iclayout-schematic","case_id":"module_1_bandgap_reference.part_3_layout.OTA_layout.input_pair","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/IHP-AnalogAcademy/","sheets":["input_common_centroid"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["input_common_centroid"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/design/input_pair.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.input_common_centroiddn4dn3tailvddvddbulkdn3v-dn4v+tailinput_pairihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figuresMM13.64/3.7 ×2MM23.64/3.7 ×2MM83.64/3.7 ×2MM103.64/3.7 ×2MM153.64/3.7 ×2MM163.64/3.7 ×2RR1A=442 µm² + diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/testbench.spice b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/testbench.spice index 2659a86841bc7db2cf5fc2f0aed8efa6e935c1bd..a423f6868deef150e88b7e4ad1c3cd114f5769a8 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/testbench.spice +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/materials/testbench.spice @@ -25,6 +25,7 @@ let common_drain = (v(dn3)+v(dn4))/2 let supply_power = -v(vdd)*i(VDD) print tail_voltage drain_balance common_drain supply_power write input-op.raw all +save i(vdd) v(dn3) v(dn4) v(tail) v(vdd) v(vm) v(vp) ac dec 40 1 1g let differential_gain = (v(dn3)-v(dn4))/(v(vp)-v(vm)) let differential_gain_abs = abs(differential_gain) diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/problem.md b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/problem.md index e9b4d80c7d9156c578d11cef290a3ae7f7756eb9..d9bdc0195ac1a44b7de04b5b2a36161bd8629ec4 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/problem.md +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/input_pair/problem.md @@ -11,9 +11,7 @@ candidate-derived RC extraction. ## Inputs and Interface -In addition to this problem, the solver receives the following declared -materials. The structured constraints -and evaluation plan are also available at runtime through `/protocol/task.json`. +In addition to this description, the solver receives the following declared materials. The runtime `/protocol/task.json` also supplies structured constraints and the evaluation plan. | Input | Purpose | |---|---| @@ -21,8 +19,7 @@ and evaluation plan are also available at runtime through `/protocol/task.json`. | [materials/circuit.spice](materials/circuit.spice) | Pre-layout simulator netlist | | [materials/testbench.spice](materials/testbench.spice) | Bias, load, AC sweep, and public measurement expressions | -Use one external label on each distinct conductor. Internal nodes must not be -declared as external ports. +Use one external label per independent conductor; internal nodes must not be declared as external ports. | Port | Function | Nominal connection | |---|---|---| @@ -36,8 +33,7 @@ The extraction port order is `v- v+ vdd dn3 dn4 tail`. ## Operating Conditions -The pre-layout and candidate-derived simulations use the supplied deck and the -same nominal model and parameter values. +Source and candidate extracted circuits use the supplied decks with identical nominal models and parameters. | Parameter | Setting | |---|---| @@ -60,15 +56,9 @@ Submit a readable GDSII file with a nonempty `input_common_centroid` top cell. The file must be at most 10 MiB (10,485,760 bytes) and must contain the complete hierarchy needed by the target cell. -The evaluator runs the pinned SG13G2 main and additional maximal DRC rules in -deep mode, with density and antenna checks disabled and no waivers. LVS uses the -current `lvs-upstream.json` profile and strict named-port matching against -`materials/circuit.cdl`; every declared port must stay on its own conductor -with the declared connectivity and device parameters. Port names are matched -case-insensitively. +Use the pinned SG13G2 main rules and additional maximal DRC rules in deep mode, with density and antenna checks disabled and no waivers. LVS uses the current `lvs-upstream.json` configuration and strictly matches named ports against `materials/circuit.cdl`, preserving each port's independent conductor, connections and device parameters; port names are case insensitive. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -87,43 +77,19 @@ noise are outside the declared scope. The finite source tap is used only in sour ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `differential_gain` | AC: Value of `(abs(((v(dn3)-v(dn4))/(v(vp)-v(vm))))) at=1meg`. | V/V | maximize / ratio | 0 … +∞ | — | response | | `differential_gain_high` | AC: Value of `(abs(((v(dn3)-v(dn4))/(v(vp)-v(vm))))) at=100meg`. | V/V | maximize / ratio | 0 … +∞ | — | response | @@ -132,11 +98,9 @@ source condition; a group uses its worst paired quality. | `drain_balance` | DC operating point: `v(dn3)-v(dn4)`. | V | target / target | −∞ … +∞ | 1.2 | bias | | `supply_power` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **1236.14 um2**. 13 expanded device instances; sum of device/contact envelopes 778.4891 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **3**; it is independent of -the reference-relative task score. +Area reference: **1236.14 um2**. The expanded circuit has 13 device instances, a sum of device/contact envelopes 778.4891 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **3**, independent of this task's reference-normalized score. ### Score weights @@ -156,22 +120,8 @@ Local gain stages: signal transfer 44.7%; balance and linearity 22.4%; operating Solve budget: **3 hours**. -Runtime environment and support resources are declared in -`/protocol/resources.json` and `/protocol/harness.json`; the working directory is -`/workspace`. KLayout performs artifact, DRC, LVS, and geometry checks; Magic -performs RC extraction; ngspice runs the supplied deck with the reviewed SG13G2 -models. The evaluator provides the tool and PDK resources named by the case -toolchain. - -For pre-layout simulation, use `materials/circuit.spice` as `dut.spice` beside -the supplied testbench. The evaluator generates `parameters.spice` from the -per-job values in `/protocol/task.json` and supplies the model paths and settings -through the runtime resource bundle. For the submitted layout, the evaluator -supplies the candidate-derived extracted netlist. If the harness declares -`process-feedback`, the optional command is -`python -I /protocol/process_check.py`; the final evaluation remains independent. - -Write the result to `/workspace/output/final.gds`, then run -`python -I /protocol/submit.py` and wait for the submission receipt. Solver -netlists, waveforms, and measurements are not accepted as substitutes for the -independent evaluator inputs. +See `/protocol/resources.json` and `/protocol/harness.json` for runtime and supporting resources; the working directory is `/workspace`. KLayout checks files, DRC, LVS and geometry, Magic extracts RC, and ngspice runs decks with reviewed SG13G2 models. The evaluator supplies tools and PDK specified by the contract toolchain. + +For source simulation, place `materials/circuit.spice` as `dut.spice` beside the testbench. The evaluator generates `parameters.spice` from per-job parameters in `/protocol/task.json`, supplying model paths and settings through the resource bundle; candidate evaluation uses its extracted netlist. If `process-feedback` is declared, run `python -I /protocol/process_check.py`; final evaluation is independent. + +Write the result to `/workspace/output/final.gds`, run `python -I /protocol/submit.py` and wait for a submission receipt. Solver netlists, waveforms and measurements cannot replace independent evaluator inputs. diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/case.toml b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/case.toml index a21fd5145d260fd9c768296bf9ec1a6a9e1fd50d..9ef4ff585aa17b26ff018408dd7f4ce446b25976 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/case.toml +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "module_1_bandgap_reference.part_3_layout.OTA_layout.output_stage" title = "IHP AnalogAcademy output_stage" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "dac4dbead6434a4bb345826211848b873d70a2725654491aadd7a64609c69684" +sha256 = "a222ca439e61eb4ffe4f5f25b56e7f0d2d68236645ecc284c85941c824b0af50" [[assets]] path = "reference/output_stage.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-output-stage-rc-tt" [task.inputs.description] path = "problem.md" -sha256 = "129a8b29c8a92c2d912e0d6ffb5c09efc3d2c10b286e45c3bd53b0376f2c9b1a" format = "text" +sha256 = "066f5d5d0f2de3d2df97eff3f68bf5a9c76d47e980e1747ebe3c15a88a022af7" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "81620ebba529edccd1beddbcb1349c0e3e7ee58b9e3749d8235433610bd98ad5" format = "spice" subcircuit = "output_stage" +sha256 = "81620ebba529edccd1beddbcb1349c0e3e7ee58b9e3749d8235433610bd98ad5" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "d5c4009de00efbc07ad6c612fb371ef8cd7a837a49bec1a27f1d1729a2d8440d" format = "spice" +sha256 = "d5c4009de00efbc07ad6c612fb371ef8cd7a837a49bec1a27f1d1729a2d8440d" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "b857814e44bf0b95d14cd69944cbbdbc5da3b756290f76d824b26b7f73990678" format = "spice" +sha256 = "93b5c000491d8575e5b3b545fe48405e685d1412efa48b9a0551637877d1320b" [task.constraints] quality = [ @@ -393,7 +393,10 @@ baseline = [ "source_nominal:output_gain", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "output_gain_high" @@ -409,7 +412,10 @@ baseline = [ "source_nominal:output_gain_high", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "output_bias" @@ -426,8 +432,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -443,14 +452,17 @@ baseline = [ "source_nominal:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "a81b188b06daaafc0a2dc0ec69b3a9ffe9c07c41d587b1a9f0824df25ff7ab4b" +source_report_sha256 = "97d06fbb60ba8b20fd4d39cef6b75104b7d85b375d768f21ff2c08a1a824a3f5" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"9f4c9b1c265d2a44e4af063f0645ed195f02c242644afa80a28d17583b5aaae8\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -480,7 +492,7 @@ output_gain = "V/V" output_gain_high = "V/V" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "b857814e44bf0b95d14cd69944cbbdbc5da3b756290f76d824b26b7f73990678" +deck = "93b5c000491d8575e5b3b545fe48405e685d1412efa48b9a0551637877d1320b" dut = "d5c4009de00efbc07ad6c612fb371ef8cd7a837a49bec1a27f1d1729a2d8440d" [task.evaluation.pre_layout.jobs.source_nominal.measurements.output_bias] @@ -499,6 +511,10 @@ unit = "V/V" value = 4.814877853977e-05 unit = "W" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +ac = "7f3d1b944988ff00b215d75dc34da587af36b5c3c4a32f1b60fb38048a111f8e" +op = "e134a725d52c23c467cafd58e24cde7c4bd256a09b151d7bf174430d29776fdd" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -511,7 +527,7 @@ unit = "W" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -522,7 +538,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/output-stage-klayout" profile = "drc-upstream.json" @@ -535,7 +551,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/output-stage-klayout" profile = "lvs-upstream.json" @@ -548,7 +564,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/output-stage-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -560,7 +576,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -570,7 +586,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/output-stage-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/schematic.svg b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/schematic.svg index 2a55f5f1953c09fc3583eaa427b7f6ea5377789d..a3088c5a0442dddc11341ec6b806c2003734f668 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/schematic.svg +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/schematic.svg @@ -1 +1,2 @@ -output_stage{"format": "iclayout-schematic", "case_id": "module_1_bandgap_reference.part_3_layout.OTA_layout.output_stage", "netlist_sha256": "81620ebba529edccd1beddbcb1349c0e3e7ee58b9e3749d8235433610bd98ad5", "project_sha256": "5a6858dc78e07c0da2164b12de7f991e85249df80a73a91e3768a438c785a7da", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/IHP-AnalogAcademy/", "sheets": ["output_stage"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}output_stagebulk2vddbulk4vssvdddn4ioutvoutvssvddioutvoutvssdn4output_stageihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figures01 Output stage and Miller capacitorMM975/2.08MM575/2.08CC222.3/22.3MM628.8/9.75P bulk → bulk4N bulk → bulk202 Substrate contacts / repeated banksRR4A=30.3 µm²RR5A=26.8 µm²Models: sg13_lv_pmos · sg13_lv_nmos · cap_cmim · ptap1 · ntap1 \ No newline at end of file +output_stage{"format":"iclayout-schematic","case_id":"module_1_bandgap_reference.part_3_layout.OTA_layout.output_stage","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/IHP-AnalogAcademy/","sheets":["output_stage"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["output_stage"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/design/output_stage.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.output_stagebulk2vddbulk4vssvdddn4ioutvoutvssoutput_stageihp-sg13g2 · IHP-AnalogAcademy | W/L in µm · display rounded to 3 significant figuresMM975/2.08MM575/2.08CC222.3/22.3MM628.8/9.75RR4A=30.3 µm²RR5A=26.8 µm² + diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/testbench.spice b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/testbench.spice index 6dd5033376c4c649b37e193e06072f7118756fa9..d5cd22fb5a3273518d0a4a2b2e658c733b11e24a 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/testbench.spice +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/materials/testbench.spice @@ -23,6 +23,7 @@ let output_bias = v(vout) let supply_power = -v(vdd)*i(VDD) print output_bias supply_power write output-op.raw all +save i(vdd) v(dn4) v(vdd) v(vout) ac dec 40 1 1g let output_gain_signed = -v(vout)/v(dn4) let gain_magnitude = abs(output_gain_signed) diff --git a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/problem.md b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/problem.md index 1dc2b0b9bd027517d4785650980af214f272be4f..8625ff69c6407dfc4285745ed6aa46181760c84f 100644 --- a/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/problem.md +++ b/tasks/ihp-sg13g2/IHP-AnalogAcademy/cases/output_stage/problem.md @@ -11,9 +11,7 @@ output-response limits after candidate-derived RC extraction. ## Inputs and Interface -In addition to this problem, the solver receives the following declared -materials. The structured constraints -and evaluation plan are also available at runtime through `/protocol/task.json`. +In addition to this description, the solver receives the following declared materials. The runtime `/protocol/task.json` also supplies structured constraints and the evaluation plan. | Input | Purpose | |---|---| @@ -21,8 +19,7 @@ and evaluation plan are also available at runtime through `/protocol/task.json`. | [materials/circuit.spice](materials/circuit.spice) | Pre-layout simulator netlist | | [materials/testbench.spice](materials/testbench.spice) | Bias, load, AC sweep, and public measurement expressions | -Use one external label on each distinct conductor. Internal nodes must not be -declared as external ports. +Use one external label per independent conductor; internal nodes must not be declared as external ports. | Port | Function | Nominal connection | |---|---|---| @@ -40,8 +37,7 @@ replica `MM9`, long-channel NMOS pull-down `MM6`, MIM compensation capacitor ## Operating Conditions -The pre-layout and candidate-derived simulations use the supplied deck and the -same nominal model and parameter values. +Source and candidate extracted circuits use the supplied decks with identical nominal models and parameters. | Parameter | Setting | |---|---| @@ -62,15 +58,9 @@ Submit a readable GDSII file with a nonempty `output_stage` top cell. The file must be at most 10 MiB (10,485,760 bytes) and must contain the complete hierarchy needed by the target cell. -The evaluator runs the pinned SG13G2 main and additional maximal DRC rules in -deep mode, with density and antenna checks disabled and no waivers. LVS uses the -current `lvs-upstream.json` profile and strict named-port matching against -`materials/circuit.cdl`; every declared port must stay on its own conductor -with the declared connectivity and device parameters. Port names are matched -case-insensitively. +Use the pinned SG13G2 main rules and additional maximal DRC rules in deep mode, with density and antenna checks disabled and no waivers. LVS uses the current `lvs-upstream.json` configuration and strictly matches named ports against `materials/circuit.cdl`, preserving each port's independent conductor, connections and device parameters; port names are case insensitive. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -89,54 +79,28 @@ outside the declared scope. The finite source taps are used only in source calib ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_gain` | AC: Value of `(abs((-v(vout)/v(dn4)))) at=1meg`. | V/V | maximize / ratio | 0 … +∞ | — | response | | `output_gain_high` | AC: Value of `(abs((-v(vout)/v(dn4)))) at=100meg`. | V/V | maximize / ratio | 0 … +∞ | — | response | | `output_bias` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `supply_power` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **2292.35 um2**. 6 expanded device instances; sum of device/contact envelopes 1466.0063 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **4**; it is independent of -the reference-relative task score. +Area reference: **2292.35 um2**. The expanded circuit has 6 device instances, a sum of device/contact envelopes 1466.0063 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **4**, independent of this task's reference-normalized score. ### Score weights @@ -154,22 +118,8 @@ Local gain stages: signal transfer 60.7%; operating points 6.07%; power 18.2%; a Solve budget: **3 hours**. -Runtime environment and support resources are declared in -`/protocol/resources.json` and `/protocol/harness.json`; the working directory is -`/workspace`. KLayout performs artifact, DRC, LVS, and geometry checks; Magic -performs RC extraction; ngspice runs the supplied deck with the reviewed SG13G2 -models. The evaluator provides the tool and PDK resources named by the case -toolchain. - -For pre-layout simulation, use `materials/circuit.spice` as `dut.spice` beside -the supplied testbench. The evaluator generates `parameters.spice` from the -per-job values in `/protocol/task.json` and supplies the model paths and settings -through the runtime resource bundle. For the submitted layout, the evaluator -supplies the candidate-derived extracted netlist. If the harness declares -`process-feedback`, the optional command is -`python -I /protocol/process_check.py`; the final evaluation remains independent. - -Write the result to `/workspace/output/final.gds`, then run -`python -I /protocol/submit.py` and wait for the submission receipt. Solver -netlists, waveforms, and measurements are not accepted as substitutes for the -independent evaluator inputs. +See `/protocol/resources.json` and `/protocol/harness.json` for runtime and supporting resources; the working directory is `/workspace`. KLayout checks files, DRC, LVS and geometry, Magic extracts RC, and ngspice runs decks with reviewed SG13G2 models. The evaluator supplies tools and PDK specified by the contract toolchain. + +For source simulation, place `materials/circuit.spice` as `dut.spice` beside the testbench. The evaluator generates `parameters.spice` from per-job parameters in `/protocol/task.json`, supplying model paths and settings through the resource bundle; candidate evaluation uses its extracted netlist. If `process-feedback` is declared, run `python -I /protocol/process_check.py`; final evaluation is independent. + +Write the result to `/workspace/output/final.gds`, run `python -I /protocol/submit.py` and wait for a submission receipt. Solver netlists, waveforms and measurements cannot replace independent evaluator inputs. diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/case.toml b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/case.toml index 4407397210b943bf2643cf192a9ed68c976695d7..7c8d1f3bd47ea50aeb6a2f3b7ab8a42cfef11393 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/case.toml +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "TO_Apr2025.160GHz_LNA" title = "TO_Apr2025 160-derived four-stage LNA at 100 MHz" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "e8fd0801394151ea393920be920c74307331b14c1f69fce20b9ec4b98132eb34" +sha256 = "3efe6d2ab9b53c7ed1d5c9647466b0447e0c2c3e41a6c864e00b3d8c686b7c5d" [[assets]] path = "reference/LNA160_FOUR_STAGE.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-lna160-derived-functional" [task.inputs.description] path = "problem.md" -sha256 = "5e5a0af0922c789a4839a8864678558907f3d5061195d75c24a648250014a300" format = "text" +sha256 = "0af53557020e96c00a175ed22da089ac02e8398e21ead951e4f7b7b0be3e295a" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "26b815aa103d0d81b54e21c661b28860304a5d23be900d17192cbb92100be3c6" format = "spice" subcircuit = "LNA160_FOUR_STAGE" +sha256 = "26b815aa103d0d81b54e21c661b28860304a5d23be900d17192cbb92100be3c6" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "ab1256da874a66cd7e70117d2e9758747cd99ba37c5fd0209180bcb558b1c379" format = "spice" +sha256 = "ab1256da874a66cd7e70117d2e9758747cd99ba37c5fd0209180bcb558b1c379" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "73cd2486a28743b5e6f7b28533c3f4f8a30dc2794e732b30791612ecebed9dc8" format = "spice" +sha256 = "9dec3c3cdfe1917a14bfad09e13d88d043b331b061fa57515a22c4cb570fe1de" [task.constraints] quality = [ @@ -405,8 +405,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_current" @@ -423,13 +426,16 @@ baseline = [ ] normalization = "ratio" scale = 1e-12 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." [task.evaluation.pre_layout] -source_report_sha256 = "0b95e12c8ba9c8144ab776bd212e0b732ddd10d86f9cd2c9afaf53f40b85a29e" +source_report_sha256 = "246755dfc52757d48dbd754d54bbc32b55daf6d2848910528af13374ba769b62" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"9bd461e0d9b1be65a6cd4e1c2352feb4a9aedfbc1fb32828bccfdba2f208dba2\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"7b432fb4cf7911c02eacee3ceaad658c961f16f22bc890ee7ad89b3e44108141\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -459,7 +465,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] circuit = "ab1256da874a66cd7e70117d2e9758747cd99ba37c5fd0209180bcb558b1c379" -deck = "73cd2486a28743b5e6f7b28533c3f4f8a30dc2794e732b30791612ecebed9dc8" +deck = "9dec3c3cdfe1917a14bfad09e13d88d043b331b061fa57515a22c4cb570fe1de" [task.evaluation.pre_layout.jobs.source_nominal.measurements.gain_db] value = 40.84071 @@ -481,6 +487,10 @@ unit = "V" value = 0.8 unit = "V" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +op = "8d3601a640cbbdffb5c01f968995ccc258e5bf8ea99f3b3fdcd6ac12583781e3" +ac = "7c534f3430aabd2e9dc6fdb583dc8552ce6d8cafd1cd75ef135af645a9cdd650" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -493,7 +503,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -504,7 +514,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/lna160-klayout" profile = "drc-upstream.json" @@ -517,7 +527,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/lna160-klayout" profile = "lvs-upstream.json" @@ -527,7 +537,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 600 [toolchain.backends.parasitics] @@ -538,7 +548,7 @@ klayout_support = "klayout" magic_support = "magic" [toolchain.backends.parasitics.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" klayout_support = "build/support/lna160-klayout" klayout_profile = "lvs-upstream.json" magic_support = "build/support/lna160-magic" @@ -555,7 +565,10 @@ type = "ngspice-docker" support = "hbt-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/lna160-hbt-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/schematic.svg b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/schematic.svg index e12735bdf2be5162d7852c539ad2844dcfd7b7ab..ae3811c23d13a02f8e7a7992b966fceb0504a48e 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/schematic.svg +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/schematic.svg @@ -1 +1,2 @@ -160GHz_LNA{"format": "iclayout-schematic", "case_id": "TO_Apr2025.160GHz_LNA", "netlist_sha256": "26b815aa103d0d81b54e21c661b28860304a5d23be900d17192cbb92100be3c6", "project_sha256": "aae9dc1edc012c6632c51f778f3d9079423f0aa7d0a2438bd91436cac6d76b5f", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/TO_Apr2025/", "sheets": ["LNA160_FOUR_STAGE"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 15}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}LNA160_FOUR_STAGEINOUTE1E2E3E4N1N2N3VDDVSSN1N2N3VBIASVSSSUBSTRATEINOUTVDDVSSVBIAS160GHz_LNAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figures01 Four-stage signal pathRCL12/20RCL22/20RCL32/20RCL42/20QQ1WE/LE 0.07/0.9QQ2WE/LE 0.07/0.9QQ3WE/LE 0.07/0.9QQ4WE/LE 0.07/0.9REL14/20REL24/20REL34/20REL44/20R substrate → SUBSTRATEQ substrate → SUBSTRATE02 Interstage bias injectionRBIAS21/4RBIAS31/4RBIAS41/4R substrate → SUBSTRATE03 Substrate contacts / repeated banksRSUBA=4 µm²Models: npn13G2 · rppd · rsil · ptap1 \ No newline at end of file +160GHz_LNA{"format":"iclayout-schematic","case_id":"TO_Apr2025.160GHz_LNA","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/TO_Apr2025/","sheets":["LNA160_FOUR_STAGE"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":15},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["LNA160_FOUR_STAGE"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/design/160GHz_LNA.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.LNA160_FOUR_STAGEINOUTE1E2E3E4N1N2N3VDDVSSN1N2N3VBIASVSSSUBSTRATE160GHz_LNAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figuresRCL12/20RCL22/20RCL32/20RCL42/20QQ1WE/LE 0.07/0.9QQ2WE/LE 0.07/0.9QQ3WE/LE 0.07/0.9QQ4WE/LE 0.07/0.9REL14/20REL24/20REL34/20REL44/20RBIAS21/4RBIAS31/4RBIAS41/4RSUBA=4 µm² + diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/testbench.spice b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/testbench.spice index c48f265848301b9b5dceac6b98abc6297d13127c..137277fdd3491c584274832d0fd6209773b4d3b6 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/testbench.spice +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/materials/testbench.spice @@ -27,6 +27,7 @@ echo out_bias = $&out_bias echo i_vdd = $&i_vdd echo i_vbias = $&i_vbias write operating_point.raw all +save i(vbias) i(vdd) v(in) v(out) ac dec 40 1meg 1gig let gain_db=db(v(out)/v(in)) meas ac gain_db find gain_db at=100meg diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/problem.md b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/problem.md index 041f9eb0ae4187b88433a0f6f4138b194efed33e..d4e470e533201db3bd3c0255d6eb705c2deb7f95 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/problem.md +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/160GHz_LNA/problem.md @@ -10,8 +10,7 @@ checks and nominal post-layout measurements below. ## Inputs and Interface -In addition to this problem, the runtime task supplies the following declared -inputs: +In addition to this description, the runtime task supplies the following declared inputs: | Input | Purpose | |---|---| @@ -67,12 +66,9 @@ also pass strict named-port LVS against `materials/circuit.cdl`, including the five ports, HBT multiplicities, passive geometry and explicit substrate tap. Artifact, DRC, LVS and geometry gates all precede candidate extraction. -The GDS must include the complete target hierarchy. Port names are matched -case-insensitively; each declared port must remain on its own conductor with -the declared connectivity. +The GDS must contain the complete target hierarchy. Port names are case insensitive; each declared port must retain its conductor and declared connections. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -95,57 +91,31 @@ internal-node aliases or simulator global-ground substitutions are permitted. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `gain_db` | AC: Value of `(db(v(out)/v(in))) at=100meg`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `output_bias` | DC operating point: `v(out)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `supply_current` | DC operating point: `-i(vdd)`. | A | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **1326.32 um2**. 16 expanded device instances; sum of device/contact envelopes 836.9640 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **1326.32 um2**. The expanded circuit has 16 device instances, a sum of device/contact envelopes 836.9640 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights -SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cost 15.9%; area 10%. Each objective's weight is divided equally among its metrics. +SiGe low-frequency transfer: signal transfer 68.8%, bias 5.29%, supply cost 15.9%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -158,12 +128,7 @@ SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cos Solve budget: **3 hours**. -Discover the supplied task, resources, harness and constraints from -`/protocol/task.json`, `/protocol/resources.json` and -`/protocol/harness.json`. Use the tool and PDK resources selected by the -runtime environment. If the harness declares `process-feedback`, request -an optional frozen process check with `python -I /protocol/process_check.py`; -the final evaluation remains independent. +Discover the task, resources, protocol and constraints through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`, and use the tools and PDK specified by the runtime environment. If the protocol declares `process-feedback`, run `python -I /protocol/process_check.py` to request an intermediate check using the frozen flow; final evaluation runs independently. Write the answer to `/workspace/output/final.gds` as a GDS file with top cell `LNA160_FOUR_STAGE` and wait for the submission receipt: @@ -172,5 +137,4 @@ Write the answer to `/workspace/output/final.gds` as a GDS file with top cell python -I /protocol/submit.py ``` -The evaluator uses the submitted snapshot for all physical checks, extraction -and simulations. +All physical checks, extraction and simulation use the submitted snapshot. diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/case.toml b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/case.toml index 7f4668a38bcfb1e6786671fbe9238de3d05c0087..12677174b0cb07fc3c81c3a6431bb36d31a24e52 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/case.toml +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "TO_Apr2025.40_GHZ_LOW_NOISE_TIA" title = "TO_Apr2025 40 GHz low-noise single-ended TIA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "de9db61acedff476ca6403a72f828a9b43e95a296ea7f9220562876179cded52" +sha256 = "9d8bc219eccf04d45f518366d400222c9c33b1b78663e09c1aa846c60f9e688f" [[assets]] path = "reference/FDM_QNC_00_LN_TIA.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-to-40ghz-lvs" [task.inputs.description] path = "problem.md" -sha256 = "4e1bf1e9856e4ca70e160b47ab5585fe97b6da4e48c97cc3287c62ff3fada74a" format = "text" +sha256 = "dcc2226fca41d92bedd955c19f360f9bd49d364512e11461c499510dbfc831f0" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "17a094c09698acfbe6a25a50d3a0292ebb82fd82b7e21269442bcdd4fa3c0d45" format = "spice" subcircuit = "FDM_QNC_00_LN_TIA" +sha256 = "17a094c09698acfbe6a25a50d3a0292ebb82fd82b7e21269442bcdd4fa3c0d45" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "62f7df0322744074c141d2bbbd3d5e9537fb06ee02729758e5f787a6de56c515" format = "spice" +sha256 = "62f7df0322744074c141d2bbbd3d5e9537fb06ee02729758e5f787a6de56c515" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "4973b1a2b9d7ca896646e106df79170391670961e01377f4d4dd2c2109a9dae4" format = "spice" +sha256 = "2aee1a67cca0ecbdb43a34da2f0891063e81857771f4380abed0538d548f9040" [task.constraints] quality = [ @@ -457,7 +457,10 @@ baseline = [ "source_positive:transimpedance_low", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "transimpedance_high" @@ -477,7 +480,10 @@ baseline = [ "source_positive:transimpedance_high", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "input_bias" @@ -498,8 +504,11 @@ baseline = [ ] normalization = "target" scale = 2.1 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.1 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_bias" @@ -520,8 +529,11 @@ baseline = [ ] normalization = "target" scale = 2.1 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.1 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -541,14 +553,17 @@ baseline = [ "source_positive:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "1ffd46800506bade3d1b06c7a06ba55a3ae9860cfdb7fae985ea26b8e36d2dfc" +source_report_sha256 = "68069e1e105c99222fcb6f755fad21514d774d3c5e6704f5f81b2c3f04227499" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cb523c6d8d1360cb230ef661aff6bf7e231b68cb3b2effe84934228456a0d7d1\", \"timeout_seconds\": 120.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"7b432fb4cf7911c02eacee3ceaad658c961f16f22bc890ee7ad89b3e44108141\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 120.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_negative] operation = "circuit.simulate" @@ -580,7 +595,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_negative.input_sha256] circuit = "62f7df0322744074c141d2bbbd3d5e9537fb06ee02729758e5f787a6de56c515" -deck = "4973b1a2b9d7ca896646e106df79170391670961e01377f4d4dd2c2109a9dae4" +deck = "2aee1a67cca0ecbdb43a34da2f0891063e81857771f4380abed0538d548f9040" [task.evaluation.pre_layout.jobs.source_negative.measurements.input_bias] value = 0.7692856317372 @@ -614,6 +629,10 @@ unit = "ohm" value = 635.1806 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_negative.output_sha256] +op = "2b9e71b969b0c266076638e209a551c2050c3b2ef62939e435ebf0edf1d538a3" +ac = "a29c0604888c2afeac5f69ea478f9b1edc766df3c99dc4dfbe9636f983822615" + [task.evaluation.pre_layout.jobs.source_zero] operation = "circuit.simulate" @@ -644,7 +663,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_zero.input_sha256] circuit = "62f7df0322744074c141d2bbbd3d5e9537fb06ee02729758e5f787a6de56c515" -deck = "4973b1a2b9d7ca896646e106df79170391670961e01377f4d4dd2c2109a9dae4" +deck = "2aee1a67cca0ecbdb43a34da2f0891063e81857771f4380abed0538d548f9040" [task.evaluation.pre_layout.jobs.source_zero.measurements.input_bias] value = 0.7969694832621 @@ -678,6 +697,10 @@ unit = "ohm" value = 447.0679 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_zero.output_sha256] +op = "cd8f3569e233aa6858b3f418ade3b3524211f8257e3a239f74fbaf4df222cd33" +ac = "98e56751f590f9b2fc74dbd82c3ca1f08dae9f58f7262044935b2fbfdee2e789" + [task.evaluation.pre_layout.jobs.source_positive] operation = "circuit.simulate" @@ -708,7 +731,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_positive.input_sha256] circuit = "62f7df0322744074c141d2bbbd3d5e9537fb06ee02729758e5f787a6de56c515" -deck = "4973b1a2b9d7ca896646e106df79170391670961e01377f4d4dd2c2109a9dae4" +deck = "2aee1a67cca0ecbdb43a34da2f0891063e81857771f4380abed0538d548f9040" [task.evaluation.pre_layout.jobs.source_positive.measurements.input_bias] value = 0.8137989315389 @@ -742,6 +765,10 @@ unit = "ohm" value = 69.38208 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_positive.output_sha256] +op = "31740e38ef2a8f5fcfaa48247ff5a3077d3b013dcc554cefb513296dbe48ac78" +ac = "c9c42b8c3926055f1cf898675a4e2bfb8c42ee6c14d584842b776a40771cdf55" + [qualification] reference = "reference/FDM_QNC_00_LN_TIA.gds" @@ -757,7 +784,7 @@ reference = "reference/FDM_QNC_00_LN_TIA.gds" type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.drc] @@ -767,7 +794,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/to-40ghz-klayout" profile = "drc-upstream.json" @@ -780,7 +807,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/to-40ghz-klayout" profile = "lvs-upstream.json" @@ -790,7 +817,7 @@ timeout_seconds = 600 type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 60 @@ -801,7 +828,10 @@ type = "ngspice-docker" support = "hbt-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/to-40ghz-hbt-models" timeout_seconds = 120 @@ -813,7 +843,7 @@ klayout_support = "klayout" magic_support = "magic" [toolchain.backends.parasitics.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" klayout_support = "build/support/to-40ghz-klayout" klayout_profile = "lvs-upstream.json" magic_support = "build/support/to-40ghz-magic" diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/schematic.svg b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/schematic.svg index a8709ba21c91831b3dc6d673dee6ef36dbfa23f4..a983ad3b72eb30592ac4fda37cbe47c912ffda1f 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/schematic.svg +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/schematic.svg @@ -1 +1,2 @@ -40_GHZ_LOW_NOISE_TIA{"format": "iclayout-schematic", "case_id": "TO_Apr2025.40_GHZ_LOW_NOISE_TIA", "netlist_sha256": "17a094c09698acfbe6a25a50d3a0292ebb82fd82b7e21269442bcdd4fa3c0d45", "project_sha256": "cf8f3b1c23f644813fd231f19cd5a8ab46add77221c43f4787d25c8f2f673862", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/TO_Apr2025/", "sheets": ["FDM_QNC_00_LN_TIA"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 8}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}FDM_QNC_00_LN_TIAvcc3net2VSSRFoutnet3vcc1vcc2vcc3VSSVSSSUBSTRATEvcc1RFinVSSnet1vcc2net1RFinVSSnet2RFinRFoutVSSvcc1vcc2vcc340_GHZ_LOW_NOISE_TIAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figures01 Input stageRRC18/4.5QQ1WE/LE 0.07/0.9 NX=5R substrate → SUBSTRATEQ substrate → SUBSTRATE02 Emitter follower and feedbackQQ2WE/LE 0.07/0.9 NX=10RRF2/6.5RRE23/6Q substrate → SUBSTRATER substrate → SUBSTRATE03 Output stageRRC34/14.5QQ3WE/LE 0.07/0.9 NX=10RRE34/3R substrate → SUBSTRATEQ substrate → SUBSTRATE04 Supply decouplingCC130/60 ×2CC230/60 ×2CC330/60 ×205 Substrate contacts / repeated banksRPTAPA=25 µm²Models: npn13G2 · rppd · rsil · ptap1 · cap_cmim \ No newline at end of file +40_GHZ_LOW_NOISE_TIA{"format":"iclayout-schematic","case_id":"TO_Apr2025.40_GHZ_LOW_NOISE_TIA","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/TO_Apr2025/","sheets":["FDM_QNC_00_LN_TIA"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":8},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["FDM_QNC_00_LN_TIA"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/design/40_GHZ_LOW_NOISE_TIA.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.FDM_QNC_00_LN_TIAvcc3net2VSSRFoutnet3vcc1vcc2vcc3VSSVSSSUBSTRATEvcc1RFinVSSnet1vcc2net1RFinVSSnet240_GHZ_LOW_NOISE_TIAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figuresRRC18/4.5QQ1WE/LE 0.07/0.9 NX=5QQ2WE/LE 0.07/0.9 NX=10RRF2/6.5RRE23/6RRC34/14.5QQ3WE/LE 0.07/0.9 NX=10RRE34/3CC130/60 ×2CC230/60 ×2CC330/60 ×2RPTAPA=25 µm² + diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/testbench.spice b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/testbench.spice index b144e3d3d0be643f8909bf20a72be6685337fd4a..089be923066c9e076a8f8e20e59c3e7deaf9e209 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/testbench.spice +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/materials/testbench.spice @@ -32,6 +32,7 @@ let supply3_current = -i(VCC3) let supply_power = -v(vcc1)*i(VCC1)-v(vcc2)*i(VCC2)-v(vcc3)*i(VCC3) print input_bias output_bias supply1_current supply2_current supply3_current supply_power write operating_point.raw all +save i(vcc1) i(vcc2) i(vcc3) i(vsense) v(rfin) v(rfout) v(vcc1) v(vcc2) v(vcc3) ac dec 40 1meg 100meg let signed_transimpedance = real(v(RFout)/i(VSENSE)) let magnitude_transimpedance = mag(v(RFout)/i(VSENSE)) diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/problem.md b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/problem.md index 7f4df536422c95f3d81867079bed777b139f922a..5ded61b593603b833ed2ae1550efc3c016aa8a66 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/problem.md +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/40_GHZ_LOW_NOISE_TIA/problem.md @@ -10,8 +10,7 @@ physical checks and nominal post-layout measurements below. ## Inputs and Interface -In addition to this problem, the runtime task supplies the following declared -inputs: +In addition to this description, the runtime task supplies the following declared inputs: | Input | Purpose | |---|---| @@ -60,20 +59,11 @@ calculated from the three independent supply sources. ## Physical Requirements -The candidate GDS must be readable, non-empty and no larger than 32 MiB. It -must pass the pinned SG13G2 main and additional maximal DRC scopes in deep -mode without waivers; density and antenna checks are outside this declared scope. It must -also pass strict named-port LVS against `materials/circuit.cdl`, including -the six ports, device multiplicities, passive geometry and explicit substrate -tap. Artifact, DRC, strict LVS and geometry gates all precede candidate -extraction. +Candidate GDS must be readable, nonempty and at most 32 MiB. Use pinned SG13G2 main and additional maximal DRC rules in deep mode without waivers; density and antenna are outside the declared scope. Strict named-port LVS compares against `materials/circuit.cdl`, checking six ports, device multiplicities, passive geometry and explicit substrate contacts. File, DRC, strict LVS and geometry checks all precede candidate extraction. -The GDS must include the complete target hierarchy. Port names are matched -case-insensitively; each declared port must remain on its own conductor with -the declared connectivity. +The GDS must contain the complete target hierarchy. Port names are case insensitive; each declared port must retain its conductor and declared connections. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -97,43 +87,19 @@ alias must not replace the explicit source substrate connection. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `transimpedance_low` | AC: Value of `(real(v(RFout)/i(VSENSE))) at=1meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | | `transimpedance_high` | AC: Value of `(mag(v(RFout)/i(VSENSE))) at=100meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | @@ -141,15 +107,13 @@ source condition; a group uses its worst paired quality. | `output_bias` | DC operating point: `v(RFout)`. | V | target / target | 0 … 2.1 | 2.1 | bias | | `supply_power` | DC operating point: `-v(vcc1)*i(VCC1)-v(vcc2)*i(VCC2)-v(vcc3)*i(VCC3)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **18573.26 um2**. 15 expanded device instances; sum of device/contact envelopes 12204.4550 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **18573.26 um2**. The expanded circuit has 15 device instances, a sum of device/contact envelopes 12204.4550 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights -SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cost 15.9%; area 10%. Each objective's weight is divided equally among its metrics. +SiGe low-frequency transfer: signal transfer 68.8%, bias 5.29%, supply cost 15.9%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -164,12 +128,7 @@ SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cos Solve budget: **3 hours**. -Discover the supplied task, resources, harness and constraints from -`/protocol/task.json`, `/protocol/resources.json` and -`/protocol/harness.json`. Use the tool and PDK resources selected by the -runtime environment. If the harness declares `process-feedback`, request -an optional frozen process check with `python -I /protocol/process_check.py`; -the final evaluation remains independent. +Discover the task, resources, protocol and constraints through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`, and use the tools and PDK specified by the runtime environment. If the protocol declares `process-feedback`, run `python -I /protocol/process_check.py` to request an intermediate check using the frozen flow; final evaluation runs independently. Write the answer to `/workspace/output/final.gds` as a GDS file with top cell `FDM_QNC_00_LN_TIA` and wait for the submission receipt: diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/case.toml b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/case.toml index 06da35d4fb73bb743013ca0d2474ab44c57c135f..1d4597bd6daf0886e69b1d949e87f1845d170afb 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/case.toml +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "TO_Apr2025.97_GHZ_LINEAR_TIA" title = "TO_Apr2025 97-derived multi-stage linear TIA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "05dbe3a98796a51d2a409b6bf458430e55db4798d2582ae3b1f5229eb8704ba0" +sha256 = "f6f8324cd36acaac731164356ef72d80d3159bb1b4b750b14a3b0314229c0d12" [[assets]] path = "reference/FMD_QNC_01_LIN_TIA.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-to-97-derived-linear-tia" [task.inputs.description] path = "problem.md" -sha256 = "10e5739f8f4672e013a37dc5477cc22e853b9b09844cb0d3dee7857d359c46ac" format = "text" +sha256 = "14f3d0ae7285240f63d34fe37ba5979111afcfdc3ef8c7caada576eb0981cb2e" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "150ab19522eecccf2889ed62c07b14e15e29e97a75ce12563fcd95d846be9112" format = "spice" subcircuit = "FMD_QNC_01_LIN_TIA" +sha256 = "150ab19522eecccf2889ed62c07b14e15e29e97a75ce12563fcd95d846be9112" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "fc6c9d1a6ea884f20e7cbddee9c30b4feff18e4a70fbf729789101955a87c334" format = "spice" +sha256 = "fc6c9d1a6ea884f20e7cbddee9c30b4feff18e4a70fbf729789101955a87c334" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "759a7548f5ea81399322a73a10b58207d3ff28b2a5ed0ef7d55850b1a6b3959e" format = "spice" +sha256 = "6f076ef2bba62665f975f26f34f645c97ac5d1e023b22dbbe5a88364f8540255" [task.constraints] quality = [ @@ -467,7 +467,10 @@ baseline = [ "source_positive:transimpedance_low", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "transimpedance_high" @@ -487,7 +490,10 @@ baseline = [ "source_positive:transimpedance_high", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "linearity_error_pct" @@ -506,10 +512,13 @@ baseline = [ "source_zero:linearity_error_pct", "source_positive:linearity_error_pct", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "input_bias" category = "performance" @@ -529,8 +538,11 @@ baseline = [ ] normalization = "target" scale = 2.1 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.1 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_bias" @@ -551,8 +563,11 @@ baseline = [ ] normalization = "target" scale = 2.1 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.1 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -572,14 +587,17 @@ baseline = [ "source_positive:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "a295d81e4884b121e95ea84f91182d3530050133c06f4365da881249ce63968e" +source_report_sha256 = "81b4ca0f9f2a34d5d90009e38b56e526d8b228c650ac20b3e64a73f5a67e6099" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"b9527ba49c9eab307a254db28aa45c302eadd71b2563bdec44c610780fa6ed62\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"7b432fb4cf7911c02eacee3ceaad658c961f16f22bc890ee7ad89b3e44108141\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_negative] operation = "circuit.simulate" @@ -614,7 +632,7 @@ dc = "dc_transfer.raw" [task.evaluation.pre_layout.jobs.source_negative.input_sha256] circuit = "fc6c9d1a6ea884f20e7cbddee9c30b4feff18e4a70fbf729789101955a87c334" -deck = "759a7548f5ea81399322a73a10b58207d3ff28b2a5ed0ef7d55850b1a6b3959e" +deck = "6f076ef2bba62665f975f26f34f645c97ac5d1e023b22dbbe5a88364f8540255" [task.evaluation.pre_layout.jobs.source_negative.measurements.input_bias] value = 0.798802317629 @@ -652,6 +670,11 @@ unit = "ohm" value = 492.1833 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_negative.output_sha256] +op = "d963b458199efc9e5b67ca8d7629413cda18e6db73ebbc0466cd8b1ea5fbbb29" +ac = "859c2e43a924dfcd49d9fa034e6026e65c6ab3bbc7277594279486ff4c52fa78" +dc = "8466e6ada486f909aa807fe063a991c2b6139ea78a2235378bf1fa6b8929d067" + [task.evaluation.pre_layout.jobs.source_zero] operation = "circuit.simulate" @@ -685,7 +708,7 @@ dc = "dc_transfer.raw" [task.evaluation.pre_layout.jobs.source_zero.input_sha256] circuit = "fc6c9d1a6ea884f20e7cbddee9c30b4feff18e4a70fbf729789101955a87c334" -deck = "759a7548f5ea81399322a73a10b58207d3ff28b2a5ed0ef7d55850b1a6b3959e" +deck = "6f076ef2bba62665f975f26f34f645c97ac5d1e023b22dbbe5a88364f8540255" [task.evaluation.pre_layout.jobs.source_zero.measurements.input_bias] value = 0.7998357535227 @@ -723,6 +746,11 @@ unit = "ohm" value = 468.8727 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_zero.output_sha256] +op = "88e54261f79f8a0723dae7ff3aaebec3d7b8ee507935ec9f484a16b15f1372aa" +ac = "d612bbee2d942605483e8ca9d8dcd593f3a31b735d8fe43709e1256aa00471d2" +dc = "8466e6ada486f909aa807fe063a991c2b6139ea78a2235378bf1fa6b8929d067" + [task.evaluation.pre_layout.jobs.source_positive] operation = "circuit.simulate" @@ -756,7 +784,7 @@ dc = "dc_transfer.raw" [task.evaluation.pre_layout.jobs.source_positive.input_sha256] circuit = "fc6c9d1a6ea884f20e7cbddee9c30b4feff18e4a70fbf729789101955a87c334" -deck = "759a7548f5ea81399322a73a10b58207d3ff28b2a5ed0ef7d55850b1a6b3959e" +deck = "6f076ef2bba62665f975f26f34f645c97ac5d1e023b22dbbe5a88364f8540255" [task.evaluation.pre_layout.jobs.source_positive.measurements.input_bias] value = 0.800845761589 @@ -794,6 +822,11 @@ unit = "ohm" value = 444.8252 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_positive.output_sha256] +op = "8a3a8285aec467b74b0591562e6d2d5dc27b668e8c977484d8fcfba77c2e4a98" +ac = "2df2e525a29ff61f33a60c2501fc6cb23563ee74cfc031fae0e5cbb4287a39e4" +dc = "8466e6ada486f909aa807fe063a991c2b6139ea78a2235378bf1fa6b8929d067" + [qualification] reference = "reference/FMD_QNC_01_LIN_TIA.gds" @@ -809,7 +842,7 @@ reference = "reference/FMD_QNC_01_LIN_TIA.gds" type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.drc] @@ -819,7 +852,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/tia97-klayout" profile = "drc-upstream.json" @@ -832,7 +865,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/tia97-klayout" profile = "lvs-upstream.json" @@ -842,7 +875,7 @@ timeout_seconds = 600 type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 60 @@ -853,7 +886,10 @@ type = "ngspice-docker" support = "hbt-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/tia97-hbt-models" timeout_seconds = 600 @@ -865,7 +901,7 @@ klayout_support = "klayout" magic_support = "magic" [toolchain.backends.parasitics.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" klayout_support = "build/support/tia97-klayout" klayout_profile = "lvs-upstream.json" magic_support = "build/support/tia97-magic" diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/schematic.svg b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/schematic.svg index 62319f68454060357f6b67d38fbd5a98bfb952ee..4a52567aeb322d7c825d42ec82692396d9bb4252 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/schematic.svg +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/schematic.svg @@ -1 +1,2 @@ -97_GHZ_LINEAR_TIA{"format": "iclayout-schematic", "case_id": "TO_Apr2025.97_GHZ_LINEAR_TIA", "netlist_sha256": "150ab19522eecccf2889ed62c07b14e15e29e97a75ce12563fcd95d846be9112", "project_sha256": "ba5afe41bb68825bd3ce1504fca049bbbef8728aad7f7b74fbbceb315888f40e", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/TO_Apr2025/", "sheets": ["FMD_QNC_01_LIN_TIA"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 10}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}FMD_QNC_01_LIN_TIAVCC3VCC2VSS$26$22$24RFOUTVCC1VCC2VCC3VSSVSS$1VCC1RFINVSS$10VCC2$10RFINVSS$22RFINRFOUTVCC1VCC2VCC3VSS97_GHZ_LINEAR_TIAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figures01 Input gain stageR$78/4.5Q$1WE/LE 0.07/0.9 NX=5R substrate → $1Q substrate → $102 Feedback and emitter followerQ$2WE/LE 0.07/0.9 NX=10R$82/6.5R$93/6Q substrate → $1R substrate → $103 Output stageR$64/14.5Q$4WE/LE 0.07/0.9 NX=5Q$3WE/LE 0.07/0.9 NX=10R$102/6.5R$54/3R substrate → $1Q substrate → $104 Supply decouplingC$1130/60 ×2C$1330/60 ×2C$1530/60 ×205 Substrate contacts / repeated banksR$17A=4 µm²Models: npn13G2 · rsil · rppd · cap_cmim · ptap1 \ No newline at end of file +97_GHZ_LINEAR_TIA{"format":"iclayout-schematic","case_id":"TO_Apr2025.97_GHZ_LINEAR_TIA","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/TO_Apr2025/","sheets":["FMD_QNC_01_LIN_TIA"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":10},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["FMD_QNC_01_LIN_TIA"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/design/97_GHZ_LINEAR_TIA.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.FMD_QNC_01_LIN_TIAVCC3VCC2VSS$26$22$24RFOUTVCC1VCC2VCC3VSSVSS$1VCC1RFINVSS$10VCC2$10RFINVSS$2297_GHZ_LINEAR_TIAihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figuresR$78/4.5Q$1WE/LE 0.07/0.9 NX=5Q$2WE/LE 0.07/0.9 NX=10R$82/6.5R$93/6R$64/14.5Q$4WE/LE 0.07/0.9 NX=5Q$3WE/LE 0.07/0.9 NX=10R$102/6.5R$54/3C$1130/60 ×2C$1330/60 ×2C$1530/60 ×2R$17A=4 µm² + diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/testbench.spice b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/testbench.spice index c80224ee8348af34fddb689d9ce2eea3364b6c0a..95791db691addce6368f338e0684dac92295c831 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/testbench.spice +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/materials/testbench.spice @@ -29,6 +29,7 @@ let supply3_current = -i(VCC3) let supply_power = -v(VCC1)*i(VCC1)-v(VCC2)*i(VCC2)-v(VCC3)*i(VCC3) print input_bias output_bias supply1_current supply2_current supply3_current supply_power write operating_point.raw all +save i(vcc1) i(vcc2) i(vcc3) i(vsense) v(rfin) v(rfout) v(vcc1) v(vcc2) v(vcc3) ac dec 40 1meg 100meg let signed_transimpedance = real(v(RFOUT)/i(VSENSE)) let magnitude_transimpedance = mag(v(RFOUT)/i(VSENSE)) diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/problem.md b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/problem.md index 358bc3087da355298a5c83d888d46d6e993cfaff..045084ee395b575f7787d4aa6ba92bfeda58cd42 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/problem.md +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/97_GHZ_LINEAR_TIA/problem.md @@ -10,8 +10,7 @@ checks and nominal post-layout measurements below. ## Inputs and Interface -In addition to this problem, the runtime task supplies the following declared -inputs: +In addition to this description, the runtime task supplies the following declared inputs: | Input | Purpose | |---|---| @@ -64,20 +63,11 @@ supply power is calculated from the three independent supply sources. ## Physical Requirements -The candidate GDS must be readable, non-empty and no larger than 32 MiB. It -must pass the pinned SG13G2 main and additional maximal DRC scopes in deep -mode without waivers; density and antenna checks are outside this declared scope. It must -also pass strict named-port LVS against `materials/circuit.cdl`, including -the six ports, device multiplicities, passive geometry and explicit substrate -tap. Artifact, DRC, strict LVS and geometry gates all precede candidate -extraction. +Candidate GDS must be readable, nonempty and at most 32 MiB. Use pinned SG13G2 main and additional maximal DRC rules in deep mode without waivers; density and antenna are outside the declared scope. Strict named-port LVS compares against `materials/circuit.cdl`, checking six ports, device multiplicities, passive geometry and explicit substrate contacts. File, DRC, strict LVS and geometry checks all precede candidate extraction. -The GDS must include the complete target hierarchy. Port names are matched -case-insensitively; each declared port must remain on its own conductor with -the declared connectivity. +The GDS must contain the complete target hierarchy. Port names are case insensitive; each declared port must retain its conductor and declared connections. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -101,56 +91,32 @@ alias must not replace the explicit source substrate connection. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`linearity_error_pct` uses `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `transimpedance_low` | AC: Value of `(real(v(RFOUT)/i(VSENSE))) at=1meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | | `transimpedance_high` | AC: Value of `(mag(v(RFOUT)/i(VSENSE))) at=100meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | -| `linearity_error_pct` | Maximum absolute deviation of DC RFOUT from the line through the endpoint samples, divided by absolute output span, times 100; IIN sweeps -5 to +5 uA in 0.5 uA steps. | percent | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `linearity_error_pct` | Maximum absolute deviation of DC RFOUT from the line through the endpoint samples, divided by absolute output span, times 100; IIN sweeps -5 to +5 uA in 0.5 uA steps. | percent | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `input_bias` | DC operating point: `v(RFIN)`. | V | target / target | 0 … 2.1 | 2.1 | bias | | `output_bias` | DC operating point: `v(RFOUT)`. | V | target / target | 0 … 2.1 | 2.1 | bias | | `supply_power` | DC operating point: `-v(VCC1)*i(VCC1)-v(VCC2)*i(VCC2)-v(VCC3)*i(VCC3)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **18718.54 um2**. 17 expanded device instances; sum of device/contact envelopes 12300.6100 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **6**; it is independent of -the reference-relative task score. +Area reference: **18718.54 um2**. The expanded circuit has 17 device instances, a sum of device/contact envelopes 12300.6100 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **6**, independent of this task's reference-normalized score. ### Score weights @@ -170,12 +136,7 @@ SiGe low-frequency transfer tasks: signal transfer 53.2%; linearity 20.5%; bias Solve budget: **3 hours**. -Discover the supplied task, resources, harness and constraints from -`/protocol/task.json`, `/protocol/resources.json` and -`/protocol/harness.json`. Use the tool and PDK resources selected by the -runtime environment. If the harness declares `process-feedback`, request -an optional frozen process check with `python -I /protocol/process_check.py`; -the final evaluation remains independent. +Discover the task, resources, protocol and constraints through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`, and use the tools and PDK specified by the runtime environment. If the protocol declares `process-feedback`, run `python -I /protocol/process_check.py` to request an intermediate check using the frozen flow; final evaluation runs independently. Write the answer to `/workspace/output/final.gds` as a GDS file with top cell `FMD_QNC_01_LIN_TIA` and wait for the submission receipt: @@ -184,5 +145,4 @@ Write the answer to `/workspace/output/final.gds` as a GDS file with top cell python -I /protocol/submit.py ``` -The evaluator uses the submitted snapshot for all physical checks, extraction -and simulations. +All physical checks, extraction and simulation use the submitted snapshot. diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/case.toml b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/case.toml index 015070227f4da5b734b2327cc323ea1a78e2117d..b5b0b8156315b5a82a5cc9055b014842d19d55c5 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/case.toml +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "TO_Apr2025.DC_to_130_GHz_TIA.design_1" title = "Two-stage SiGe HBT TIA with nominal AC/DC requirements" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "35c6ad118e5e06bdd1c07e510f66417b2b26454d4db6d3d0ceb10c002028fad6" +sha256 = "5da14439984543b4e94085678796cca312b870ab4e582e6adb7adc02f4102090" [[assets]] path = "reference/FMD_QNC_03a_TIA_1.gds" @@ -27,24 +27,24 @@ environment = "ihp-sg13g2-to-design1-functional" [task.inputs.description] path = "problem.md" -sha256 = "2d77cb2f457a5b7f9188f0ed28eabf7acbbdd8f32b9dcfa75b54b4d34cce0061" format = "text" +sha256 = "aef9abd87f676d07857d0a813253e09b7a95425c3a2f06a8b41245944e7ac3c4" [task.inputs.netlist] path = "materials/circuit.cdl" -sha256 = "41054606cd4c4845149df6c9a38a7d38d45ae4ba22afb5ff588d33051aaf06f3" format = "spice" subcircuit = "FMD_QNC_03a_TIA_1" +sha256 = "41054606cd4c4845149df6c9a38a7d38d45ae4ba22afb5ff588d33051aaf06f3" [task.inputs.simulation] path = "materials/circuit.spice" -sha256 = "7dc79bb78b7d60f5ff7826fa2aa0cb549e0453a89ed26e2cfd7f64e8ea6bbfbd" format = "spice" +sha256 = "7dc79bb78b7d60f5ff7826fa2aa0cb549e0453a89ed26e2cfd7f64e8ea6bbfbd" [task.inputs.performance] path = "materials/testbench.spice" -sha256 = "cf9a8f31c266d199966ba4ab102fb9f73b26bc74044d0ed0704fbc1120a01742" format = "spice" +sha256 = "f1144350e7791fcfc8ad81e04a56b6fceca1995600018a70ed301b95c1b42aaf" [task.constraints] quality = [ @@ -453,7 +453,10 @@ baseline = [ "source_positive:transimpedance_low", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "transimpedance_high" @@ -473,7 +476,10 @@ baseline = [ "source_positive:transimpedance_high", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "input_bias" @@ -494,8 +500,11 @@ baseline = [ ] normalization = "target" scale = 2.0 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.0 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_bias" @@ -516,8 +525,11 @@ baseline = [ ] normalization = "target" scale = 2.0 + +[task.evaluation.metrics.requirement] lower = 0 upper = 2.0 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -537,14 +549,17 @@ baseline = [ "source_positive:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "41bb35cebcae6f4986a76641298df392d8f1164db3e7201143dab10abdbc00b5" +source_report_sha256 = "0ea4043b7b3d858803a7569266d547a2d98ac1aa57aadeaeb0838bcc6cfd3d90" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"ca37b963bac7a1c8224fec3455a1354dedcf3d1fe3be08114cc9502971070abe\", \"timeout_seconds\": 60.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"7b432fb4cf7911c02eacee3ceaad658c961f16f22bc890ee7ad89b3e44108141\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 60.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_negative] operation = "circuit.simulate" @@ -575,7 +590,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_negative.input_sha256] circuit = "7dc79bb78b7d60f5ff7826fa2aa0cb549e0453a89ed26e2cfd7f64e8ea6bbfbd" -deck = "cf9a8f31c266d199966ba4ab102fb9f73b26bc74044d0ed0704fbc1120a01742" +deck = "f1144350e7791fcfc8ad81e04a56b6fceca1995600018a70ed301b95c1b42aaf" [task.evaluation.pre_layout.jobs.source_negative.measurements.input_bias] value = 0.9487253947562 @@ -605,6 +620,10 @@ unit = "ohm" value = 184.5921 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_negative.output_sha256] +op = "44c7d4d7b135a4323961d22dac6fb85a6dd2b6a6dea3ee3e5599838624d15772" +ac = "fce8396a42751c433fc4d5d5d30a97a38269be9f5a70359e896c0c56337a2942" + [task.evaluation.pre_layout.jobs.source_zero] operation = "circuit.simulate" @@ -634,7 +653,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_zero.input_sha256] circuit = "7dc79bb78b7d60f5ff7826fa2aa0cb549e0453a89ed26e2cfd7f64e8ea6bbfbd" -deck = "cf9a8f31c266d199966ba4ab102fb9f73b26bc74044d0ed0704fbc1120a01742" +deck = "f1144350e7791fcfc8ad81e04a56b6fceca1995600018a70ed301b95c1b42aaf" [task.evaluation.pre_layout.jobs.source_zero.measurements.input_bias] value = 0.9499771272023 @@ -664,6 +683,10 @@ unit = "ohm" value = 181.173 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_zero.output_sha256] +op = "8e9f86d1e9cb921a673d4361982249cd3f3230b4346a377c26ef286909c3e69d" +ac = "f8c932d513055e454f868849f7bfee1770aea87871893ba695cd2b735358fd65" + [task.evaluation.pre_layout.jobs.source_positive] operation = "circuit.simulate" @@ -693,7 +716,7 @@ ac = "frequency_response.raw" [task.evaluation.pre_layout.jobs.source_positive.input_sha256] circuit = "7dc79bb78b7d60f5ff7826fa2aa0cb549e0453a89ed26e2cfd7f64e8ea6bbfbd" -deck = "cf9a8f31c266d199966ba4ab102fb9f73b26bc74044d0ed0704fbc1120a01742" +deck = "f1144350e7791fcfc8ad81e04a56b6fceca1995600018a70ed301b95c1b42aaf" [task.evaluation.pre_layout.jobs.source_positive.measurements.input_bias] value = 0.9512266397008 @@ -723,6 +746,10 @@ unit = "ohm" value = 177.7518 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_positive.output_sha256] +op = "5ba7c4132d13b688093d9ba2e043864d53bff8077fd5704d881d6f4ed65dcb22" +ac = "c3b3ed800ce22cae1099191971e36627abdd3ff7550effc41a9889b8270cd271" + [qualification] reference = "reference/FMD_QNC_03a_TIA_1.gds" @@ -738,7 +765,7 @@ reference = "reference/FMD_QNC_03a_TIA_1.gds" type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.lvs] @@ -748,7 +775,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/to-design1-klayout" profile = "lvs-upstream.json" @@ -761,7 +788,10 @@ type = "ngspice-docker" support = "hbt-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/to-design1-models" timeout_seconds = 60 @@ -769,7 +799,7 @@ timeout_seconds = 60 type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 60 @@ -780,7 +810,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/to-design1-klayout" profile = "drc-upstream.json" @@ -794,7 +824,7 @@ klayout_support = "klayout" magic_support = "magic" [toolchain.backends.parasitics.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" klayout_support = "build/support/to-design1-klayout" klayout_profile = "lvs-to-apr2025.json" magic_support = "build/support/to-design1-magic" diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/schematic.svg b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/schematic.svg index c01cfdb5c6f8094235e41f86aeaf8644757a5ff7..a865f110a7c1642c45336d0776a1020602ad002a 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/schematic.svg +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/schematic.svg @@ -1 +1,2 @@ -DC_to_130_GHz_TIA.design_1{"format": "iclayout-schematic", "case_id": "TO_Apr2025.DC_to_130_GHz_TIA.design_1", "netlist_sha256": "41054606cd4c4845149df6c9a38a7d38d45ae4ba22afb5ff588d33051aaf06f3", "project_sha256": "110bea5a33a1a4454c95c93c89406caca24781bb79b3d152e9c6cfffd8e7bef7", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/TO_Apr2025/", "sheets": ["FMD_QNC_03a_TIA_1"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 5}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}FMD_QNC_03a_TIA_1VCC2VVCC2V1VEEVEEVCC2VVEEINPUTDN1VCC2V1DN1VEEOUTPUTINPUTOUTPUTVCC2VVCC2V1VEEDC_to_130_GHz_TIA.design_1ihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figures01 Input gain and feedbackRRC115/4QQ1WE/LE 0.07/0.9 NX=5RRF29/6.3R substrate → VEEQ substrate → VEE02 Output gain stageRRC211.5/2QQ2WE/LE 0.07/0.9 NX=4R substrate → VEEQ substrate → VEE03 Supply decouplingCC130/30CC230/3004 Substrate contacts / repeated banksRRTAPA=3.65 µm²Models: npn13G2 · rppd · cap_cmim · ptap1 \ No newline at end of file +DC_to_130_GHz_TIA.design_1{"format":"iclayout-schematic","case_id":"TO_Apr2025.DC_to_130_GHz_TIA.design_1","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/TO_Apr2025/","sheets":["FMD_QNC_03a_TIA_1"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":5},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["FMD_QNC_03a_TIA_1"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/design/DC_to_130_GHz_TIA.design_1.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.FMD_QNC_03a_TIA_1VCC2VVCC2V1VEEVEEVCC2VVEEINPUTDN1VCC2V1DN1VEEOUTPUTDC_to_130_GHz_TIA.design_1ihp-sg13g2 · TO_Apr2025 | W/L in µm · display rounded to 3 significant figuresRRC115/4QQ1WE/LE 0.07/0.9 NX=5RRF29/6.3RRC211.5/2QQ2WE/LE 0.07/0.9 NX=4CC130/30CC230/30RRTAPA=3.65 µm² + diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/testbench.spice b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/testbench.spice index 4792c4291804ccab5767c88fd24826fd0e6d900f..a01872bd4bf64f366f21779a79cd9217b06aa17a 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/testbench.spice +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/materials/testbench.spice @@ -29,6 +29,7 @@ let supply2_current = -i(VCC2) let supply_power = -v(vcc1)*i(VCC1)-v(vcc2)*i(VCC2) print input_bias output_bias supply1_current supply2_current supply_power write operating_point.raw all +save i(vcc1) i(vcc2) i(vsense) v(input) v(output) v(vcc1) v(vcc2) ac dec 40 1meg 100meg let signed_transimpedance = real(v(output)/i(VSENSE)) let magnitude_transimpedance = mag(v(output)/i(VSENSE)) diff --git a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/problem.md b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/problem.md index 7b82461d29e7b7104038d1dfe0cadacdd230ef8e..ff4c5b5d6c4e63be8befabfdf8ace473745988ea 100644 --- a/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/problem.md +++ b/tasks/ihp-sg13g2/TO_Apr2025/cases/DC_to_130_GHz_TIA.design_1/problem.md @@ -10,8 +10,7 @@ post-layout measurements below. ## Inputs and Interface -In addition to this problem, the runtime task supplies the following declared -inputs: +In addition to this description, the runtime task supplies the following declared inputs: | Input | Purpose | |---|---| @@ -69,12 +68,9 @@ the five ports, device multiplicities, passive geometry and the same-net substrate tap. Artifact, DRC, LVS and geometry gates all precede candidate extraction. -The GDS must include the complete target hierarchy. Port names are matched -case-insensitively; each declared port must remain on its own conductor with -the declared connectivity. +The GDS must contain the complete target hierarchy. Port names are case insensitive; each declared port must retain its conductor and declared connections. -The functional outline is the recursive bounding box of polygons on these -SG13G2 datatype-0 layers, including child cells and the complete routing stack: +The functional outline is the recursive bounding box of polygons on the following SG13G2 datatype-0 layers, including child cells and every routing layer: `1, 3, 5, 6, 7, 8, 10, 11, 13, 14, 19, 24, 26, 28, 29, 30, 31, 32, 33, 35, 36, 40, 44, 46, 49, 50, 51, 52, 53, 55, 58, 66, 67, 90, 101, 111, 125, 126, 128, 129, 133, 134, 139, 152`. @@ -96,43 +92,19 @@ port or change the maintained circuit. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `transimpedance_low` | AC: Value of `(real(v(output)/i(VSENSE))) at=1meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | | `transimpedance_high` | AC: Value of `(mag(v(output)/i(VSENSE))) at=100meg`. | ohm | maximize / ratio | 0 … +∞ | — | response | @@ -140,15 +112,13 @@ source condition; a group uses its worst paired quality. | `output_bias` | DC operating point: `v(output)`. | V | target / target | 0 … 2.0 | 2.0 | bias | | `supply_power` | DC operating point: `-v(vcc1)*i(VCC1)-v(vcc2)*i(VCC2)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **3852.28 um2**. 8 expanded device instances; sum of device/contact envelopes 2487.4228 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **4**; it is independent of -the reference-relative task score. +Area reference: **3852.28 um2**. The expanded circuit has 8 device instances, a sum of device/contact envelopes 2487.4228 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **4**, independent of this task's reference-normalized score. ### Score weights -SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cost 15.9%; area 10%. Each objective's weight is divided equally among its metrics. +SiGe low-frequency transfer: signal transfer 68.8%, bias 5.29%, supply cost 15.9%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -163,12 +133,7 @@ SiGe low-frequency transfer tasks: signal transfer 68.8%; bias 5.29%; supply cos Solve budget: **3 hours**. -Discover the supplied task, resources, harness and constraints from -`/protocol/task.json`, `/protocol/resources.json` and -`/protocol/harness.json`. Use the tool and PDK resources selected by the -runtime environment. If the harness declares `process-feedback`, request -an optional frozen process check with `python -I /protocol/process_check.py`; -the final evaluation remains independent. +Discover the task, resources, protocol and constraints through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`, and use the tools and PDK specified by the runtime environment. If the protocol declares `process-feedback`, run `python -I /protocol/process_check.py` to request an intermediate check using the frozen flow; final evaluation runs independently. Write the answer to `/workspace/output/final.gds` as a GDS file with top cell `FMD_QNC_03a_TIA_1` and wait for the submission receipt: @@ -177,5 +142,4 @@ Write the answer to `/workspace/output/final.gds` as a GDS file with top cell python -I /protocol/submit.py ``` -The evaluator uses the submitted snapshot for all physical checks, extraction -and simulations. +All physical checks, extraction and simulation use the submitted snapshot. diff --git a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/case.toml b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/case.toml index a4ee1c93dee5da5b1b4d92080b937666797b5204..d43c7ec27578c7ff3c1e50d3f7f604999e0ff68b 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.adc_001_inv1b" title = "CMOS Inverter Threshold Core" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "a8cccb07772179454cce99b4d0e172c6a622160212c25ddda6f451e08f2350d8" +sha256 = "94c6b23ff178b3b7e18ecf9a0eed0734f0fbea0f84614a45bc4f57c8acf88643" [[assets]] path = "reference/adc_001_inv1b.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "f77341695350c9c22f0f938c9deb1c21d4085419f90b9c92448364039ae9d4e8" +sha256 = "89ac70eab03942a80bef149eab104bc1c59bf84dde79fd0b873f0974d4505bc3" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "ac17dacdee7c373b47d4038a7318a7b0fedc024031b06f93011f8eaab684caf4" subcircuit = "adc_001_inv1b" +sha256 = "ac17dacdee7c373b47d4038a7318a7b0fedc024031b06f93011f8eaab684caf4" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "5b7039e6399c1336c9ed31405b0176f512f2981b51e1fa8ffae36fa8d51af7aa" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "c7fa64149fb838b9ae6b0fbcd173883a86be2db0869ba9f7a3d13e61def94476" +sha256 = "7305f7b68fdb3c41a8e397a24b229aa79cd228e6d8e261654e9803d208ff84c0" [task.constraints] quality = [ @@ -398,7 +398,6 @@ direction = "minimize" dimension = "response" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:delay_s", @@ -407,6 +406,10 @@ baseline = [ "source_condition_0:delay_s", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." + [[task.evaluation.metrics]] id = "transition_s" unit = "s" @@ -415,7 +418,6 @@ direction = "minimize" dimension = "response" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:transition_s", @@ -424,6 +426,10 @@ baseline = [ "source_condition_0:transition_s", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." + [[task.evaluation.metrics]] id = "power_w" unit = "W" @@ -432,7 +438,6 @@ direction = "minimize" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -441,22 +446,29 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "swing_v" unit = "V" aggregation = "max" direction = "maximize" -lower = 0.6 category = "performance" observations = [ "condition_0:swing_v", ] +[task.evaluation.metrics.requirement] +lower = 0.6 +rationale = "The 1.2 V inverter threshold core requires at least the declared 0.6 V DC output swing to establish a meaningful logic transition; unique switching and transient crossings are independently required by the fixture." + [task.evaluation.pre_layout] -source_report_sha256 = "7a5787418bbed57c79c831f242b405561f2bc6441ec1f54299d52e60df0fe36e" +source_report_sha256 = "37eef824221b8062d8969766eadf779825de51cd9327d080ebfaf05ccb020c7a" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"d178a2dbf7b8ae93537de0a83c4368f730c62167c354adcc54ce4b03ab9abf29\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -485,7 +497,7 @@ dc = "dc.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "c7fa64149fb838b9ae6b0fbcd173883a86be2db0869ba9f7a3d13e61def94476" +deck = "7305f7b68fdb3c41a8e397a24b229aa79cd228e6d8e261654e9803d208ff84c0" dut = "5b7039e6399c1336c9ed31405b0176f512f2981b51e1fa8ffae36fa8d51af7aa" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.delay_s] @@ -508,6 +520,11 @@ unit = "V" value = 7.341807e-11 unit = "s" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "974317db1b6ce6abb38ea59ab7f85ae70b26e31d7cde0e156d5f881d5582fd2d" +dc = "81d88d3270a73f9d61c931227248a726fb3b5ab9b9c239f2f7d1127ba2a8534e" +transient = "971ff7139ce4033900cb0b29e158a07a65900b3e67c7ee842bf4b1f5b17ebd2a" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -520,7 +537,7 @@ unit = "s" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -531,7 +548,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -544,7 +561,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -557,7 +574,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -569,7 +586,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -579,7 +596,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/schematic.svg index 938b763b6b280079bd39af71f6d18befb62dbef2..31813d4874bd55036b02c3c34c98da6985191466 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/schematic.svg @@ -1,2 +1,2 @@ -adc_001_inv1b{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.adc_001_inv1b","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/circuit.cdl","netlist_sha256":"ac17dacdee7c373b47d4038a7318a7b0fedc024031b06f93011f8eaab684caf4","project_sha256":"d4568a123c6774b3dc6b396de5ef4f72a759ecc0b355ac495a97c327f152e370","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["adc_001_inv1b"],"banks":[],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["adc_001_inv1b"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/schematic/adc_001_inv1b.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.adc_001_inv1bvoutvsssubvinvoutvsssubvddwell_1vddvinvoutwell_1vssvsssubvddvinadc_001_inv1bEqual net labels connect. All source devices and exact parameters are retained.RT0ptap1A=4e-12 P=8e-6MMNsg13_lv_nmosw=1u l=0.13um=1RT1ntap1A=4e-12 P=8e-6MMPsg13_lv_pmosw=2.5u l=0.13um=1RTSUBptap1A=4e-12 P=8e-6 -Complete single-sheet circuit. Equal net labels connect. +adc_001_inv1b{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.adc_001_inv1b","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["adc_001_inv1b"],"banks":[],"limitations":["Physical R/C/Q use external model bindings with X-prefixed internal references; the editable project retains the original terminals and model bindings. Exported decks are for connectivity inspection, not replacement simulation decks."],"known_editor_diagnostics":{},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["adc_001_inv1b"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/design/adc_001_inv1b.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.adc_001_inv1bvoutvsssubvinsubvddwell_1voutwell_1vssvsssubvddvinadc_001_inv1bRT0ptap1A=4e-12 P=8e-6MMNsg13_lv_nmosw=1u l=0.13um=1RT1ntap1A=4e-12 P=8e-6MMPsg13_lv_pmosw=2.5u l=0.13um=1RTSUBptap1A=4e-12 P=8e-6 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/testbench.spice index 1f3b6cc49a2bdc3a7f0f042eb5017c8215c418d4..93d6f9c91616de2dfef992005a8f40a4b8742be4 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/materials/testbench.spice @@ -22,6 +22,7 @@ if kcl_residual > 1e-10 end show all write op.raw all +save i(vdd) i(vin) i(vss) v(drive) v(vdd) v(vin) v(vout) dc VIN 0 1.2 .001 let ncross=0 let idx=0 diff --git a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/problem.md b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/problem.md index f655677bcadac71c06cf73fcd6ba990bd8596c63..f938d160bcf6a176ef8a2e9d12db49ef219aa128 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/adc_001_inv1b/problem.md @@ -18,30 +18,15 @@ Use IHP native KLayout main and maximum rule decks and named-interface LVS; Magi ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. | Metric | Unit | Definition | Bound | Quality | | --- | --- | --- | --- | --- | @@ -53,13 +38,12 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. The DC threshold is the unique output=0.6 V crossing, not a scan endpoint. Delay is the worse input 50% to opposite output 50% delay. Transition is the worse output 10–90% rise or 90–10% fall. Guards reject missing or multiple DC/transition crossings; independent audits require the intended 10–15 ns and 20–25 ns windows and correct ordering. DC high/low output uses actual endpoint samples, with a minimum 0.6 V swing establishing a meaningful logic transition. This is nominal loaded characterization, not Liberty/PVT or ADC accuracy. -Static output bounds are physical rail-domain checks, nonnegative power/error bounds establish measurement domains, and KCL guards reject inconsistent DC solutions. All required conditions must be valid. No advertised upstream performance is a hard gate. The metric table specifies each target scale and normalization floor. Floors prevent zero-error ratios; scales and floors are normalization units, not acceptance tolerances. +Static output bounds check the corresponding supply domain; nonnegative power/error conditions define the measurement domain; KCL checks reject inconsistent DC solutions. Every condition must be valid; upstream advertised performance is not a hard threshold. The metric table declares target scales and normalization floors; floors handle zero-error ratios, and neither scales nor floors are acceptance tolerances. -For each metric take the worst same-condition source-paired quality. Target quality is `1/(1+abs(candidate-source)/scale)`; minimizing ratio quality is `(source+scale)/(candidate+scale)`. Missing/nonfinite/invalid source or candidate measurements and tool failures yield an unknown score; completed physical/functional rejection yields zero. Bounds apply to every observation. +Each metric uses the worst source-paired quality over matching conditions. Target quality is `1/(1+abs(candidate-source)/scale)`, and minimizing ratio quality is `(source+scale)/(candidate+scale)`. Missing, nonfinite or invalid source/candidate measurements and tool failures make the score unknown; confirmed physical/functional rejection scores zero. Gates apply separately to every observation. Compact area anchor: 120 um2 = 20 um2 NMOS contact envelope + 30 um2 PMOS/well envelope + 20 um2 body-contact/isolation allowance + 50 um2 routing. These envelopes follow the fixed widths and contact/isolation needs, not the witness bounding box. Coefficient 1: a single logic stage with loaded transitions and connectivity. The circuit and these anchors are fixed before participant evaluation. - ### Score weights Inverter threshold element: switching threshold 25.5%; delay 34%; transition 12.8%; power 12.8%; area 15%. Each objective's weight is divided equally among its metrics. @@ -76,4 +60,4 @@ Inverter threshold element: switching threshold 25.5%; delay 34%; transition 12. Solve budget: **6 hours**. -Use the runtime task/protocol and reviewed resource bundle to discover tools and feedback. Submit `/workspace/output/final.gds` explicitly through the protocol; merely writing it is not a submission. The reference and maintainer source records are excluded from solver inputs. +Discover tools and feedback through the runtime task, protocol and reviewed resource bundle. Explicitly submit `/workspace/output/final.gds` through the protocol; writing a file alone does not submit it. Reference assets and maintainer source records are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/case.toml index a8536bf44abac06b3bc91a7310e132cf419212ce..31c958a14ac7cc287404cd2acb91292a8b0cd2bd 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_001_5t" title = "Five-Transistor OTA Core with Bias Mirror" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "800b203d54fc6c904b885bb5d631d5ec235c17853708d454804c437846318e7d" +sha256 = "c0bc0afe7c4392b11e3b1836cae47240e81826274c39c7d59ee00f9eb73a87c3" [[assets]] path = "reference/amp_001_5t.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-analog-db-ota-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "7b9c7dd3c5f0ef19f55d3a9a7b9d18042f0ca74940ae76b01ee0c59e348df4ea" +sha256 = "c2c99ac9c03e4a8d2a7271d9d3b40b607a0c847b8950f7122a684cc1597d3194" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "55016e668fdcbc3087c98af6d92f196225fd586da3a9a8e049200fd0419c119f" subcircuit = "amp_001_5t" +sha256 = "55016e668fdcbc3087c98af6d92f196225fd586da3a9a8e049200fd0419c119f" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "08afdd756d9a1bb7409ddee1ef5a525ec1a0f0261eda6a49db150c1618cb853c" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "025c2e754a449b286cdb4b9487ae81c08d0cb2375b0ccb644e522f1720350c5b" +sha256 = "b661d0d87ce39aac3222d2378bf1e8353f985f6aac729965e318d99882f92a19" [task.constraints] quality = [ @@ -404,7 +404,10 @@ baseline = [ "source_nominal:unity_gain_bandwidth", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin" @@ -421,8 +424,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "output_bias" @@ -439,8 +445,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_voltage" @@ -457,8 +466,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "supply_power" @@ -474,14 +486,17 @@ baseline = [ "source_nominal:supply_power", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "21eaa5a7e7fe46d4c3b669b3bf39685429a713f9d65cab336b463c8acb1077e4" +source_report_sha256 = "f6c01532c6ccb4619cbbb946b1b3d47c60d10ac5cecdb10269b087d38510cc19" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"5c08f72e97102ca6b0061884b62f431130e119234364146718f1fbb2a5eeaefb\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -507,7 +522,7 @@ op = "ota-op.raw" ac = "ota-ac.raw" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "025c2e754a449b286cdb4b9487ae81c08d0cb2375b0ccb644e522f1720350c5b" +deck = "b661d0d87ce39aac3222d2378bf1e8353f985f6aac729965e318d99882f92a19" dut = "08afdd756d9a1bb7409ddee1ef5a525ec1a0f0261eda6a49db150c1618cb853c" [task.evaluation.pre_layout.jobs.source_nominal.measurements.bias_voltage] @@ -534,6 +549,10 @@ unit = "W" value = 1211382.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +op = "14d323115c6673ed2d976e5136664f425e3db124dd99d6c50fe7cc0ffe3ec6ef" +ac = "072fc4ed3bbeccdc8d5ffa92ec56199d5dd6fc1f6270576aa70ca1a7197319b4" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -546,7 +565,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -557,7 +576,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -570,7 +589,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -583,7 +602,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -595,7 +614,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -605,7 +624,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/schematic.svg index 94e43085250e2ec8324174d39803dc409e9355c5..13455af1a073af49c1e57593548d022c4df17046 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/schematic.svg @@ -1 +1,2 @@ -amp_001_5t{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_001_5t", "netlist_sha256": "55016e668fdcbc3087c98af6d92f196225fd586da3a9a8e049200fd0419c119f", "project_sha256": "9d4e77517ee5d1165b22715cfe14de8915d9dc629a794fd785419911bc9c6254", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_001_5t"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_001_5tvssibiasvsssubvddwellvinpvinnibiasvssvddvouttailoutmvddvoutvinpvinnibiasvssamp_001_5tihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential pair and active loadMM310/7MM410/7MM110/10MM210/10MM53.8/1P bulk → wellN bulk → sub02 Bias referenceMM63.8/1N bulk → sub03 Substrate contacts / repeated banksRR1A=192 µm²RR2A=52 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 \ No newline at end of file +amp_001_5t{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_001_5t","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_001_5t"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_001_5t"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/design/amp_001_5t.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_001_5tvssibiasvsssubvddwelltailoutmvddvoutvinpvinnibiasvssamp_001_5tihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM310/7MM410/7MM110/10MM210/10MM53.8/1P bulk → wellN bulk → subMM63.8/1N bulk → subRR1A=192 µm²RR2A=52 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/testbench.spice index 8aeb95ba58a426dcb31d8e0a06446503b83d40e0..0c730178f12a0e04fc93ff44ffc1330890d00244 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_voltage = v(ibias) let supply_power = -v(vdd)*i(VDD) print output_bias bias_voltage supply_power write ota-op.raw all +save i(vdd) v(ibias) v(vdd) v(vinn) v(vinp) v(vout) ac dec 100 1 100meg let transfer = v(vout)/(v(vinp)-v(vinn)) let gain_db = db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/problem.md index ce5820f291d7014dd1bb708518dafa1cae044e3a..e63809a969ccf710f88656f6d1e691fa3b4a0d11 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_001_5t/problem.md @@ -55,43 +55,19 @@ PVT, noise, distortion, transient settling, EM or manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `low_frequency_gain` | AC: Value of `(db((v(vout)/(v(vinp)-v(vinn))))) at=1`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_gain_bandwidth` | AC: Crossing coordinate where `(db((v(vout)/(v(vinp)-v(vinn)))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | @@ -100,15 +76,13 @@ source condition; a group uses its worst paired quality. | `bias_voltage` | DC operating point: `v(ibias)`. | V | target / target | 0 … 1.5 | 1.5 | bias | | `supply_power` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -Area reference: **1198.35 um2**. 8 expanded device instances; sum of device/contact envelopes 754.0020 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **4**; it is independent of -the reference-relative task score. +Area reference: **1198.35 um2**. The expanded circuit has 8 device instances, a sum of device/contact envelopes 754.0020 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **4**, independent of this task's reference-normalized score. ### Score weights -Small-signal OTAs: gain 27%; bandwidth 22.5%; phase margin 22.5%; operating points 4.5%; power 13.5%; area 10%. Each objective's weight is divided equally among its metrics. +Small-signal OTAs: gain 27%, bandwidth 22.5%, phase margin 22.5%, operating points 4.5%, power 13.5%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/case.toml index 217e3de95f9dc63de0599e3e47bf736cd7c3abee..2fb89c387039e6d26539669100fc330afd956a22 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_002_alfio_raffc" title = "Current-Buffer and Active-Feedforward OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "f0fd720849c6e636d0512d3866bf2dd20a72572547fb8228d44bef62cd8225c2" +sha256 = "5b5d6437261a850f444341f917763ee4e626f0ca646d906169d2a6ff91b7bde6" [[assets]] path = "reference/amp_002_alfio_raffc.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_002_alfio_raffc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "6145ab39c56eddbedf31f06adcc32dec8468eebdc215eaf70974f47a50026e64" +sha256 = "5a979111556195b899d02be1bac3aa2a7250038a526019e05717343558130580" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "da8813082f4c6fb73b07d677efa730e1f1c250c9ebd438233f3f725346ac88f9" subcircuit = "amp_002_alfio_raffc" +sha256 = "da8813082f4c6fb73b07d677efa730e1f1c250c9ebd438233f3f725346ac88f9" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "736eb30bb88a695ddefced6b9b40651955709b5e0a1b16f76c345db9a9095a49" +sha256 = "5d1f948c2dd4a670cdfe512beb0fc0902c9bc1fd02f56a1d8e8d62bbc8d7d0fe" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "8f642ed35e2d4df18b0a38307b75ca6865c3cd30d9340d2149f39d3e6a25f15c" +source_report_sha256 = "ea09a59573fa9e2630dfa568b51b32b02c3132b865d530d0fb8ab6f918c7da0e" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"53371acbaa4d0ffa73dda7ad2e19190df1f6993be92a6fc17d97a1adc578e7ea\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "736eb30bb88a695ddefced6b9b40651955709b5e0a1b16f76c345db9a9095a49" +deck = "5d1f948c2dd4a670cdfe512beb0fc0902c9bc1fd02f56a1d8e8d62bbc8d7d0fe" dut = "101a8960de9230e887bc5e29cc5bb91b87749f88793a888baaa41529051c6469" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 1884332.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "2a1e40d283124bfbcc66e3224aa49aceea8e26ba300c76866dfbd35bdbc6492a" +ac = "d840ecdab6c7703a5878acfd41b8b095f717f86154416e53d9f5b2bc7f85e44d" +transient = "5d6bd5fb38e3fa67add5412258a1be1b4625dd407170623a06e15761f296f4fb" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "736eb30bb88a695ddefced6b9b40651955709b5e0a1b16f76c345db9a9095a49" +deck = "5d1f948c2dd4a670cdfe512beb0fc0902c9bc1fd02f56a1d8e8d62bbc8d7d0fe" dut = "101a8960de9230e887bc5e29cc5bb91b87749f88793a888baaa41529051c6469" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 1894771.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "2a1e40d283124bfbcc66e3224aa49aceea8e26ba300c76866dfbd35bdbc6492a" +ac = "b5ff8c6188094211218eefad26cafcf13c2973e435a18ed9ba330b8006a7d77d" +transient = "1c58d57d3867b157ecc5d19026c2232aed77ab32fe6ff9b82660aee3e539ba39" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "736eb30bb88a695ddefced6b9b40651955709b5e0a1b16f76c345db9a9095a49" +deck = "5d1f948c2dd4a670cdfe512beb0fc0902c9bc1fd02f56a1d8e8d62bbc8d7d0fe" dut = "101a8960de9230e887bc5e29cc5bb91b87749f88793a888baaa41529051c6469" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 1910778.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "2a1e40d283124bfbcc66e3224aa49aceea8e26ba300c76866dfbd35bdbc6492a" +ac = "4774f65e432dc5642f984a9006cc1dd6eb63ce8091b86db2a3deb79dd9c9dc64" +transient = "1b7cb1f88eaf3f84652acbefbcca5dbfa29bfd2d3812b070ed53a0b921891781" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/schematic.svg index 84e524bddd9d1423f122916dfd726806603c2d43..da348f651204c78651f992654c667d829805f79b 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/schematic.svg @@ -1 +1,2 @@ -amp_002_alfio_raffc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_002_alfio_raffc", "netlist_sha256": "da8813082f4c6fb73b07d677efa730e1f1c250c9ebd438233f3f725346ac88f9", "project_sha256": "d5b863bf295057c66afa6cd1e00800c598d6ef0318390d3fa55a5325c5a556e5", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_002_alfio_raffc"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_002_alfio_raffcvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet013net050net1voutvssvddnet043net050net013dm_1net54net56net1vddvssvb4vb3net31net1vddnet050net013net063voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet1amp_002_alfio_raffcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM55.74/6.12 ×8MM65.74/6.12 ×8MM810/3.15 ×3MM910/3.15 ×3MM158/1 ×2MM168/1 ×2MM192/8 ×8MM202/8 ×8MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM76.24/0.4MM05.74/6.12MM1110/0.8 ×2MM219/2 ×6MM229/2 ×6P bulk → well_vddN bulk → sub03 Bias and tail-current generationMM15.74/6.12MM107.2/1MM25.74/6.12MM35.74/6.12MM122/8 ×4MM592/8 ×8MM132/8 ×4MM142/8MM172/8 ×4MM182/8 ×4P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM45.74/6.12 ×2P bulk → well_vdd05 Compensation and signal passivesCC0_043.5/43.5CC0_143.5/43.5CC0_243.5/43.5CC1_036.5/36.506 Substrate contacts / repeated banksRRtap_net31A=110 µm²RRtap_vddA=595 µm²RRptapA=2130 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim \ No newline at end of file +amp_002_alfio_raffc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_002_alfio_raffc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_002_alfio_raffc"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_002_alfio_raffc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/design/amp_002_alfio_raffc.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_002_alfio_raffcvddnet050net31vb3vb4vssdm_2net063voutnnet013net050net1vssvddnet043net050net013dm_1net54net56net1vddvb4vb3net31vddnet050net013net063voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet1amp_002_alfio_raffcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM55.74/6.12 ×8MM65.74/6.12 ×8MM810/3.15 ×3MM910/3.15 ×3MM158/1 ×2MM168/1 ×2MM192/8 ×8MM202/8 ×8MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subMM76.24/0.4MM05.74/6.12MM1110/0.8 ×2MM219/2 ×6MM229/2 ×6P bulk → well_vddN bulk → subMM15.74/6.12MM107.2/1MM25.74/6.12MM35.74/6.12MM122/8 ×4MM592/8 ×8MM132/8 ×4MM142/8MM172/8 ×4MM182/8 ×4P bulk → well_vddN bulk → subMM45.74/6.12 ×2P bulk → well_vddCC0_043.5/43.5CC0_143.5/43.5CC0_243.5/43.5CC1_036.5/36.5RRtap_net31A=110 µm²RRtap_vddA=595 µm²RRptapA=2130 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/testbench.spice index faf60ff9ce0fa857a93b1100ff36b2a1bee8ec09..8da911aafdddfe2209a8b58d59859b6a532f3bac 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net1) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net1) i(VDD) +save i(vdd) v(net1) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/problem.md index e96b07b6b8552ba0c2d2a76d87e3bba14b0cd2cc..c985a684761cd3e2959ac354a2c4e813671015f5 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_002_alfio_raffc/problem.md @@ -22,12 +22,11 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. Ordered ports: `vss vdd vinn vinp vout net1`. VSS is return, VDD is supply, VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net1` @@ -38,30 +37,16 @@ all internal branches and total multiplicities in the authoritative netlist. Native equivalent parallel fingers are allowed only when LVS and electrical requirements pass. Do not short distinct ports or create extra driven monitors. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net063` → `vout`, 3 parallel `cap_cmim` unit(s), each 43.46 × 43.46 um; nominal total 8.520333 pF. - `c1`: `net050` → `net013`, 1 parallel `cap_cmim` unit(s), each 36.515 × 36.515 um; nominal total 2.0058602 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. ## Physical Requirements @@ -72,50 +57,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net1)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -123,22 +83,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **20690.01 um2**. 96 expanded device instances; sum of device/contact envelopes 13605.7469 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **7**; it is independent of -the reference-relative task score. +Area reference: **20690.01 um2**. The expanded circuit has 96 device instances, a sum of device/contact envelopes 13605.7469 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **7**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -160,8 +118,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/case.toml index 2fe8f7ae5402f0718b7448f719a5350153440d72..38e92ed3643a2265d49c60ac77298dd184df5793 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_003_fan_smc" title = "Single-Capacitor Three-Stage Feedforward OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "c46caa05f6be4613f60fdce588b46f5ac2a7ace7ff42f323ca6b1f8af1a2b232" +sha256 = "d4387977bdd4e3bb1da3ac1cfc994e720dad199e2a58444823c6db30bbf65ed0" [[assets]] path = "reference/amp_003_fan_smc.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_003_fan_smc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "d4b1da37fa4b4f7b020340ea9296a4a9681c0bfd686cd90a98e46b8b885da830" +sha256 = "e9d25003e087f344dd7c41a4f93178f342027f563e4a9c6ee8896df04113d107" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "5c0aa44f171b64424a7dc717a4d76f332bc9da6b39923f4ae527433622c43601" subcircuit = "amp_003_fan_smc" +sha256 = "5c0aa44f171b64424a7dc717a4d76f332bc9da6b39923f4ae527433622c43601" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "cfe8a0580eaeb7b840697fbc99204ee9f6969015bcc1f4db6450899484c705cf" +sha256 = "e6d4c2a9874f561b9380ff84f9273879d3d81fc1f6c23e9df84c2d26bba9d15d" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "4feeaa4d4aaf3bb42bfede25114adf0c3c6040b90f25e897a55d96b2972a5812" +source_report_sha256 = "c278d8c22a2b0519f195736b5004a6f30122a79680a944e6720355f81e5bea2e" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"3ed768d4ffb7f23f3607c41ecc3ea827c17cb3311d178014ef532319353417d7\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "cfe8a0580eaeb7b840697fbc99204ee9f6969015bcc1f4db6450899484c705cf" +deck = "e6d4c2a9874f561b9380ff84f9273879d3d81fc1f6c23e9df84c2d26bba9d15d" dut = "2d129c21487a4415c752ba2bc08b7d102d8684cb55dc89915576a913c88ddf3d" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 1369789.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "9d98fe0a95f86915678043de0b3f81ede7a5521ce3ded7f7370c253fde04f74f" +ac = "3287978d96766b2bbedc13d2a7920390e0c40955cb22a515377e6eff54cab8a5" +transient = "7668884835969d36c948502ef01c15786ccdccd2b83c7bab794ef5baeb13b7b3" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "cfe8a0580eaeb7b840697fbc99204ee9f6969015bcc1f4db6450899484c705cf" +deck = "e6d4c2a9874f561b9380ff84f9273879d3d81fc1f6c23e9df84c2d26bba9d15d" dut = "2d129c21487a4415c752ba2bc08b7d102d8684cb55dc89915576a913c88ddf3d" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 1374443.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "9d98fe0a95f86915678043de0b3f81ede7a5521ce3ded7f7370c253fde04f74f" +ac = "05bed7249233232ed391f6eb06b79e2b74c019f19319554d0acc0473568790fd" +transient = "0201de800dacd10c50705e24172b5ea394d8c55108c1aa14e624aee910acfd02" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "cfe8a0580eaeb7b840697fbc99204ee9f6969015bcc1f4db6450899484c705cf" +deck = "e6d4c2a9874f561b9380ff84f9273879d3d81fc1f6c23e9df84c2d26bba9d15d" dut = "2d129c21487a4415c752ba2bc08b7d102d8684cb55dc89915576a913c88ddf3d" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 1383658.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "9d98fe0a95f86915678043de0b3f81ede7a5521ce3ded7f7370c253fde04f74f" +ac = "bd4d5e77e9f501a5d6542925b4f41c1597ebe85f51299675f5245c704559e5b4" +transient = "12f1303847522a85163ce11d987916477cd41d85468c1b130daf062bec490d7c" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/schematic.svg index dee0db0eec745efc8c369778009f4ed5a49f1628..6bb8630eb4092675fd6bdd811052615d630fb840 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/schematic.svg @@ -1 +1,2 @@ -amp_003_fan_smc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_003_fan_smc", "netlist_sha256": "5c0aa44f171b64424a7dc717a4d76f332bc9da6b39923f4ae527433622c43601", "project_sha256": "50037c52e21a4a3a0f84a7c5cd51abb14699b10249a5facaa86ecbecef1c48e5", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_003_fan_smc"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_003_fan_smcvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet013net050voutvddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31net013vddnet050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_003_fan_smcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM51/1 ×16MM61/1 ×16MM81/1 ×4MM91/1 ×4MM151/1 ×16MM161/1 ×16MM191/1 ×32MM201/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM101/1 ×8MM71/1 ×16MM111/1 ×32MM211/1 ×4MM221/1 ×4MM231/1 ×16P bulk → well_vddN bulk → sub03 Bias and tail-current generationMM01/1 ×16MM11/1 ×16MM21/1 ×16MM31/1 ×16MM121/1 ×16MM131/1 ×16MM141/1 ×4MM171/1 ×16MM181/1 ×16P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM41/1 ×64P bulk → well_vdd05 Compensation and signal passivesCC0_040.8/40.8CC0_140.8/40.806 Substrate contacts / repeated banksRRtap_net31A=108 µm²RRtap_vddA=2650 µm²RRptapA=5160 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim \ No newline at end of file +amp_003_fan_smc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_003_fan_smc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_003_fan_smc"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_003_fan_smc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/design/amp_003_fan_smc.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_003_fan_smcvddnet050net31vb3vb4vssdm_2net063voutnnet013net050vddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31vddnet050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_003_fan_smcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM51/1 ×16MM61/1 ×16MM81/1 ×4MM91/1 ×4MM151/1 ×16MM161/1 ×16MM191/1 ×32MM201/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subMM101/1 ×8MM71/1 ×16MM111/1 ×32MM211/1 ×4MM221/1 ×4MM231/1 ×16P bulk → well_vddN bulk → subMM01/1 ×16MM11/1 ×16MM21/1 ×16MM31/1 ×16MM121/1 ×16MM131/1 ×16MM141/1 ×4MM171/1 ×16MM181/1 ×16P bulk → well_vddN bulk → subMM41/1 ×64P bulk → well_vddCC0_040.8/40.8CC0_140.8/40.8RRtap_net31A=108 µm²RRtap_vddA=2650 µm²RRptapA=5160 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/testbench.spice index 7b9929030b7a518875f87c72f9960f1e4e918900..b2a529c54a56cbc056a2640c2b2c9e9b199e4f6a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net013) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net013) i(VDD) +save i(vdd) v(net013) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/problem.md index 10db902497366517e75fb1b8e44c96e864034927..e9a45cb74e0af17ab246d903dac502d337e90839 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_003_fan_smc/problem.md @@ -22,45 +22,23 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. -Ordered ports: `vss vdd vinn vinp vout net013`. VSS is return, VDD is supply, -VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net013` -connects the external 3 uA sink to VSS. Input PMOS bodies retain -the separate source-tied well; other PMOS bodies use the VDD well and NMOS -bodies use the VSS substrate contact. Preserve device W/L/m, body connectivity, -all internal branches and total multiplicities in the authoritative netlist. -Native equivalent parallel fingers are allowed only when LVS and electrical -requirements pass. Do not short distinct ports or create extra driven monitors. +Ordered ports are `vss vdd vinn vinp vout net013`: return, supply, inverting/noninverting inputs, output and an external 3 uA pull-down to VSS. Input PMOS bodies retain independent source-connected wells; other PMOS bodies connect to the VDD well and NMOS bodies to VSS substrate contacts. Preserve authoritative netlist W/L/m, bodies, internal branches and total multiplicities; native equivalent parallel fingers must pass LVS and electrical checks. Do not short distinct ports or add driven monitor ports. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net050` → `vout`, 2 parallel `cap_cmim` unit(s), each 40.825 × 40.825 um; nominal total 5.0131059 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. ## Physical Requirements @@ -71,50 +49,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -122,22 +75,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **20940.39 um2**. 417 expanded device instances; sum of device/contact envelopes 13771.5365 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **7**; it is independent of -the reference-relative task score. +Area reference: **20940.39 um2**. The expanded circuit has 417 device instances, a sum of device/contact envelopes 13771.5365 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **7**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -159,8 +110,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/case.toml index 5c1d574992bf09593dd4391473e02aa1743cd307..2c6404aa0b2bc0bab8034a0c32d80aa15bc23825 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_005_hoilee_affc" title = "Current-Buffered Compensation OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "7ee25de217279c2a5df903a861a2f89e0809eddf7600c80a4d0cd43d8fc81a9c" +sha256 = "bcac1ee26f540a192fa7d7c4145de0074b719a50c389c18d9fd72856b31ed960" [[assets]] path = "reference/amp_005_hoilee_affc.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_005_hoilee_affc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "1a3107a8f7eeb482313b97258eb6fb792fc8f364c2ae88bf798b98539a31a725" +sha256 = "6341b01f7cd4780ebb0498b18852d8e25bdf74dbcbc39822c6afa8309badb587" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "d16b4edb2bff902499a0519b595961ad69cf940221b11f12a423ef2863685757" subcircuit = "amp_005_hoilee_affc" +sha256 = "d16b4edb2bff902499a0519b595961ad69cf940221b11f12a423ef2863685757" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "0e0fcee10f14915adcb1bdd04af45570adc5b9e91cc87b75d87f530ca9f1823f" +sha256 = "2e1695c274b79b8d01a40dae609dfa4c5f3209698e6d74527477f41833e8ce32" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "34a4c7c68eaffb4ca981a1876eed0554660e88de296e9adacf8e4a1124bd057e" +source_report_sha256 = "1dd99926af36929c0eda399eaaee1d3de26a1181054ae425b864c78cfb945bbf" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"d86ae7d3305af2d8b6172461a6227ffac5c7faa316556922e92dc3551a719c4a\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "0e0fcee10f14915adcb1bdd04af45570adc5b9e91cc87b75d87f530ca9f1823f" +deck = "2e1695c274b79b8d01a40dae609dfa4c5f3209698e6d74527477f41833e8ce32" dut = "a7f6474ca6f0e759aeff40e257a68bc2e025b555071c91f11016e14dba0bdebe" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 1469052.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "b69c0ac41fc4a31aa3fbc9d24281e636a6dcd7fca02435b24570f897b70d61ad" +ac = "301ea483ddeb298f4aa40ae52e2b29eb0c0c04ea9f82395af68ca4df8452050c" +transient = "78d93f9efe9d5d78bac9c4e28e686ede43337459fd7d9583156daa4e2f65ebe0" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "0e0fcee10f14915adcb1bdd04af45570adc5b9e91cc87b75d87f530ca9f1823f" +deck = "2e1695c274b79b8d01a40dae609dfa4c5f3209698e6d74527477f41833e8ce32" dut = "a7f6474ca6f0e759aeff40e257a68bc2e025b555071c91f11016e14dba0bdebe" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 1498589.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "b69c0ac41fc4a31aa3fbc9d24281e636a6dcd7fca02435b24570f897b70d61ad" +ac = "9bbcaf2f938643b516d5efe38d5d4367b528c1d68ab27238370e3d6709a93778" +transient = "42b25c55475bfe875a4a7c3c6070d3f8c229c2d972f797340d6b7ac0c20c86ea" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "0e0fcee10f14915adcb1bdd04af45570adc5b9e91cc87b75d87f530ca9f1823f" +deck = "2e1695c274b79b8d01a40dae609dfa4c5f3209698e6d74527477f41833e8ce32" dut = "a7f6474ca6f0e759aeff40e257a68bc2e025b555071c91f11016e14dba0bdebe" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 1565806.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "b69c0ac41fc4a31aa3fbc9d24281e636a6dcd7fca02435b24570f897b70d61ad" +ac = "fdd44e7700dc5c8f927c1758c1b3f622f03d9a3cccc738655c7ecc8a815932fb" +transient = "308701d5fc9cf5fda51917311bbc8dfe31cb5c2eb76e38d1bbf5a69b45de772b" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/schematic.svg index 39b22f5729babc14ac65da23dcedfcb88ad2c129..3ef892717eb19608cf4c17fc17a27fab5bf21b3d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/schematic.svg @@ -1 +1,2 @@ -amp_005_hoilee_affc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_005_hoilee_affc", "netlist_sha256": "d16b4edb2bff902499a0519b595961ad69cf940221b11f12a423ef2863685757", "project_sha256": "7433c1d91248f11c107e351cfd137527c016f4ce15353cd905128438a12bfaef", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_005_hoilee_affc"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_005_hoilee_affcvinpvinnnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net1vb4vddnet049vssnet043net050vddnet049vssvoutdm_1net54net56vssvddvb4net013vb3net31net013net1vb4vssnet050vb3net3vddnet2net1net049voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_005_hoilee_affcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM62.17/6.86 ×4MM52.17/6.86 ×4MM109.88/0.77 ×4MM99.88/0.77 ×4MM172.9/8.24 ×16MM162.9/8.24 ×16MM210.21/3.15 ×32MM200.21/3.15 ×32MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM112.79/1.37 ×4MM72.17/6.86 ×4MM226.34/9.33 ×4MM236.34/9.33 ×4MM640.21/3.15 ×16P bulk → well_vddN bulk → sub03 Output / local feedbackMM128.69/0.6 ×4MM252.71/3.98 ×4P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM02.17/6.86 ×4MM12.17/6.86 ×4MM22.17/6.86 ×4MM32.17/6.86 ×4MM130.21/3.15 ×16MM140.21/3.15 ×16MM150.21/3.15 ×4MM180.21/3.15 ×16MM190.21/3.15 ×16P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM42.17/6.86 ×8MM594.58/4.37 ×4MM624.58/4.37 ×4MM602.92/0.77 ×4MM632.92/0.77 ×4MM610.21/3.15 ×16P bulk → well_vddN bulk → sub06 Compensation and signal passivesCC0_044.8/44.8CC0_144.8/44.8CC0_244.8/44.8CC0_344.8/44.8CC1_050/50CC1_150/50CC1_250/5007 Substrate contacts / repeated banksRRtap_net31A=104 µm²RRtap_vddA=1170 µm²RRptapA=5360 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim \ No newline at end of file +amp_005_hoilee_affc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_005_hoilee_affc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_005_hoilee_affc"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_005_hoilee_affc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/design/amp_005_hoilee_affc.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_005_hoilee_affcnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net1vb4vddnet049vssnet043net050vddnet049vssdm_1net54net56vssvddvb4net013vb3net31net1vb4vssnet050vb3net3vddnet2net1net049voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_005_hoilee_affcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM62.17/6.86 ×4MM52.17/6.86 ×4MM109.88/0.77 ×4MM99.88/0.77 ×4MM172.9/8.24 ×16MM162.9/8.24 ×16MM210.21/3.15 ×32MM200.21/3.15 ×32MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → subMM112.79/1.37 ×4MM72.17/6.86 ×4MM226.34/9.33 ×4MM236.34/9.33 ×4MM640.21/3.15 ×16P bulk → well_vddN bulk → subMM128.69/0.6 ×4MM252.71/3.98 ×4P bulk → well_vddN bulk → subMM02.17/6.86 ×4MM12.17/6.86 ×4MM22.17/6.86 ×4MM32.17/6.86 ×4MM130.21/3.15 ×16MM140.21/3.15 ×16MM150.21/3.15 ×4MM180.21/3.15 ×16MM190.21/3.15 ×16P bulk → well_vddN bulk → subMM42.17/6.86 ×8MM594.58/4.37 ×4MM624.58/4.37 ×4MM602.92/0.77 ×4MM632.92/0.77 ×4MM610.21/3.15 ×16P bulk → well_vddN bulk → subCC0_044.8/44.8CC0_144.8/44.8CC0_244.8/44.8CC0_344.8/44.8CC1_050/50CC1_150/50CC1_250/50RRtap_net31A=104 µm²RRtap_vddA=1170 µm²RRptapA=5360 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/testbench.spice index c7dcc6e275a1d9c2189133bcf1b97853cfc50159..a30610878315c5359fc9b4718aa24742cbd1c654 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net013) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net013) i(VDD) +save i(vdd) v(net013) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/problem.md index c73195076ff24395f67299f4cf19673f13743526..a5dce1e8db091b9e327646674ced3a9e6fca38b8 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_005_hoilee_affc/problem.md @@ -23,12 +23,11 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. Ordered ports: `vss vdd vinn vinp vout net013`. VSS is return, VDD is supply, VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net013` @@ -39,30 +38,16 @@ all internal branches and total multiplicities in the authoritative netlist. Native equivalent parallel fingers are allowed only when LVS and electrical requirements pass. Do not short distinct ports or create extra driven monitors. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net049` → `vout`, 4 parallel `cap_cmim` unit(s), each 44.775 × 44.775 um; nominal total 12.05746 pF. - `c1`: `vout` → `net1`, 3 parallel `cap_cmim` unit(s), each 49.965 × 49.965 um; nominal total 11.258239 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. ## Physical Requirements @@ -73,50 +58,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -124,22 +84,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **42066.41 um2**. 286 expanded device instances; sum of device/contact envelopes 27776.6506 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **42066.41 um2**. The expanded circuit has 286 device instances, a sum of device/contact envelopes 27776.6506 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -161,8 +119,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/case.toml index 8dc83be9d33cb1ca1f16c90afa146be48f084a55..cbf59553264130b6adc4a4b7aa0ac060dcff8362 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_006_leung_dfcfc1" title = "Output-Controlled Auxiliary Compensation OTA" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "d7c9fce8d65e1083745a6eaa5ed04996418ae5a3b885e2b273c015d668cf1ee4" +sha256 = "c3985f6133a0714e5adb3d2fd19e81907e4117f653360210366cd6cfeaf2c7cc" [[assets]] path = "reference/amp_006_leung_dfcfc1.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-amp_006_leung_dfcfc1-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "bf9976cf15cc38e11c207c107f996f6fb6f0803e20c53d9b60270105b772d9bc" +sha256 = "687177f09be2a0065672239ed512ec94e1103ce42cf24efdd5e507e6441b0aeb" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "0bfae437fa4eb43463b0ddab03b7d1c9edbe3d7f08fde84a418d30cb3cc137b2" subcircuit = "amp_006_leung_dfcfc1" +sha256 = "0bfae437fa4eb43463b0ddab03b7d1c9edbe3d7f08fde84a418d30cb3cc137b2" [task.inputs.performance] path = "materials/testbench.spice" @@ -247,29 +247,29 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 82915.92 -rationale = "Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24.5%; gain and bandwidth 12.3%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 40000.0 +rationale = "The 40000 um2 footprint carries 45%, closed-loop DC accuracy 20%, bandwidth 15%, phase-margin preservation 10%, sampled return distance 5% and transient mean power 5%. The 3 mV accuracy goal is near the worst source offset. Phase-margin deviations use 10 degrees rather than 180 degrees. Larger distance from the sampled critical return point is rewarded. Duplicate first/final crossings, fully settled recovery errors and repeated bias/power summaries stay visible with zero weights." [task.evaluation.scoring.weights] -functional_area = 0.1 -output_error_v = 0.095454545449 -recovery_down_v = 0.095454545455 -recovery_up_v = 0.095454545455 -final_phase_margin_deg = 0.061363636364 -minimum_return_distance = 0.061363636364 -phase_margin_deg = 0.061363636364 -return_phase_excursion_deg = 0.061363636364 -dc_gain_db = 0.030681818182 -final_unity_hz = 0.030681818182 -hf_gain_db = 0.030681818182 -unity_hz = 0.030681818182 -peak_v = 0.027272727273 -step_gain = 0.027272727273 -trough_v = 0.027272727273 -bias_v = 0.020454545455 -output_v = 0.020454545455 -mean_power_w = 0.061363636364 -power_w = 0.061363636364 +functional_area = 0.45 +output_error_v = 0.2 +recovery_down_v = 0.0 +recovery_up_v = 0.0 +final_phase_margin_deg = 0.0 +minimum_return_distance = 0.05 +phase_margin_deg = 0.1 +return_phase_excursion_deg = 0.0 +dc_gain_db = 0.0 +final_unity_hz = 0.0 +hf_gain_db = 0.0 +unity_hz = 0.15 +peak_v = 0.0 +step_gain = 0.0 +trough_v = 0.0 +bias_v = 0.0 +output_v = 0.0 +mean_power_w = 0.05 +power_w = 0.0 [[task.evaluation.jobs]] id = "artifact" @@ -657,8 +657,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_error_v" @@ -683,9 +686,16 @@ baseline = [ "source_condition_4:output_error_v", "source_condition_5:output_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.003 +rationale = "Aim for no more than 3 mV closed-loop DC output error at either commanded output level." [[task.evaluation.metrics]] id = "bias_v" @@ -712,8 +722,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -739,9 +752,12 @@ baseline = [ "source_condition_5:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -791,7 +807,10 @@ baseline = [ "source_condition_5:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -817,9 +836,12 @@ baseline = [ "source_condition_5:phase_margin_deg", ] normalization = "target" -scale = 180 +scale = 10.0 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "final_unity_hz" @@ -845,7 +867,10 @@ baseline = [ "source_condition_5:final_unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "final_phase_margin_deg" @@ -872,8 +897,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "minimum_return_distance" @@ -888,7 +916,7 @@ observations = [ ] unit = "1" dimension = "response" -direction = "target" +direction = "maximize" aggregation = "max" baseline = [ "source_condition_0:minimum_return_distance", @@ -898,9 +926,16 @@ baseline = [ "source_condition_4:minimum_return_distance", "source_condition_5:minimum_return_distance", ] -normalization = "target" -scale = 1.0 +normalization = "ratio" +scale = 1e-12 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + +[task.evaluation.metrics.quality_target] +value = 0.9 +rationale = "Aim for a sampled return-ratio distance of at least 0.9 from the critical -1 point across the declared AC sweep." [[task.evaluation.metrics]] id = "return_phase_excursion_deg" @@ -926,9 +961,12 @@ baseline = [ "source_condition_5:return_phase_excursion_deg", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "hf_gain_db" category = "performance" @@ -977,10 +1015,13 @@ baseline = [ "source_condition_4:recovery_up_v", "source_condition_5:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -1004,10 +1045,13 @@ baseline = [ "source_condition_4:recovery_down_v", "source_condition_5:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -1058,9 +1102,12 @@ baseline = [ "source_condition_5:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -1086,8 +1133,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -1114,14 +1164,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "7ccde6d089da3b2353df6c572f88f640bd79877fd2ada442161e0b5c891555cb" +source_report_sha256 = "93b38e3437fa6b9f7f0b15a8dfd9f52890e032ba8fbf03570e29470b7fce2be8" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"baa39045927273375a6cf67f52455a87eb2092b981075e5f4d10cc25154c6c54\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1242,6 +1295,12 @@ unit = "V" value = 563634.8 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "eb7f74bc5a317f3f2fd7830bec926d9b06a8d1d804fcd1a5ba7b0f98c21008cf" +ac = "fb41aa59cd8a5e3d96390db36e6556d3d80382c6dbcc366c7f59548a7c04ec3e" +transient = "e6f4d664266f49315aade50863d59b421a31b718f42cd46bccde13038d67471c" +voltage = "69f9167474e84a05ac67c2f0becb80b809ac05cf1abb686faffcabef4fae3931" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1361,6 +1420,12 @@ unit = "V" value = 567067.8 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "eb7f74bc5a317f3f2fd7830bec926d9b06a8d1d804fcd1a5ba7b0f98c21008cf" +ac = "2b77c75a0926338e0b4c0b5ea2cdcf719cd4a34eb44818ff3d2f04f5bd3042cc" +transient = "5f5564a24095bbc89fb1a12feceaac57b423f3d6af301143945b838f79473423" +voltage = "40efb1361cccabbb6ae703d78bb63ef1e8b926aa157e1382c6af110a254f9715" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1480,6 +1545,12 @@ unit = "V" value = 574201.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "eb7f74bc5a317f3f2fd7830bec926d9b06a8d1d804fcd1a5ba7b0f98c21008cf" +ac = "fe40b90d908c2b31567b25b72f1f620461ac1b1fad507109c1c256f0397fdded" +transient = "0a520f12f4d219c1c3a5c53d8f7e3fc5d0f45a88e7664e9db7dd3c50c688af35" +voltage = "9e478399e0fe9856a6aecb304ab220e1b82029c0053cb9215a5f8ad01bd955c6" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1599,6 +1670,12 @@ unit = "V" value = 546056.4 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "56c5b5b397634386a3babd4257c11272ded751d292cdec51351ac7e5112d8689" +ac = "c59ab512be705b3b3fdcf3665a08f3e0848e9244c9f4ce7d4653adf84170c086" +transient = "e6f4d664266f49315aade50863d59b421a31b718f42cd46bccde13038d67471c" +voltage = "3f9587d11effb10570fb27558c9b4e58eadbdd7e0e32170ee0e82c8557f4c014" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1718,6 +1795,12 @@ unit = "V" value = 549210.3 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "56c5b5b397634386a3babd4257c11272ded751d292cdec51351ac7e5112d8689" +ac = "276e8be8e3b05c4929356706e36f235c50657f26e776ac8e610dc29aadfaec08" +transient = "5f5564a24095bbc89fb1a12feceaac57b423f3d6af301143945b838f79473423" +voltage = "baa66dbcb1f40a4baf029454cc4f858138b256ca49c1d9fbd6cb5bcd1ba4a152" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1837,6 +1920,12 @@ unit = "V" value = 555759.1 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "56c5b5b397634386a3babd4257c11272ded751d292cdec51351ac7e5112d8689" +ac = "b715379491c79e9e1c8bc9ef8c2b9646d657de4e92d7f2af08ab55260b97ffb5" +transient = "0a520f12f4d219c1c3a5c53d8f7e3fc5d0f45a88e7664e9db7dd3c50c688af35" +voltage = "719a877e4a6ff9fc0e1faaf906aaaa576d33b371a596eb18953010e6c8f847ad" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1849,7 +1938,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1860,7 +1949,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1873,7 +1962,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1886,7 +1975,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1906,7 +1995,7 @@ label_layers = [ type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1916,7 +2005,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/materials/schematic.svg index 387f5dc13db68c02d826c05d86dab8b14adfb527..6cff6740de77b7312fe0b3b47a6fbfecf857c8a9 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/materials/schematic.svg @@ -1 +1,2 @@ -amp_006_leung_dfcfc1{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_006_leung_dfcfc1", "netlist_sha256": "0bfae437fa4eb43463b0ddab03b7d1c9edbe3d7f08fde84a418d30cb3cc137b2", "project_sha256": "1d5f815ba6cde4c75dfa86194ba6b4bb4093e5c53f01aaf82011ccdaecb13f86", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_006_leung_dfcfc1", "Bank1_35x_ntap1", "Bank2_177x_ntap1", "Bank3_266x_ptap1", "Bank4_8x_cap_cmim"], "banks": [{"name": "Bank1_35x_ntap1", "count": 35, "model": "ntap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank2_177x_ntap1", "count": 177, "model": "ntap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank3_266x_ptap1", "count": 266, "model": "ptap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank4_8x_cap_cmim", "count": 8, "model": "cap_cmim", "params": {"w": "48.935u", "l": "48.935u", "m": "1"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_006_leung_dfcfc1net31well_net31vddwell_vddvsssubnet050voutvinpvinnnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net1vddnet049vssnet043net050vddnet049vssvoutdm_1net54net56vssvddvb4net013vb3net31net013vddnet049net1net31well_net31vddwell_vddvsssubnet050voutvssvddvinnvinpvoutnet013amp_006_leung_dfcfc1ihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM66.73/6.14 ×4MM56.73/6.14 ×4MM105.6/1.75 ×50MM95.6/1.75 ×50MM175.76/1.59 ×2MM165.76/1.59 ×2MM217.1/7.02 ×16MM207.1/7.02 ×16MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM117.55/0.7 ×40MM76.73/6.14 ×4MM86.73/6.14 ×4MM225.5/8.08 ×4MM235.5/8.08 ×4MM246.8/4.49P bulk → well_vddN bulk → sub03 Output / local feedbackMM127.49/2.04 ×400MM259.5/0.89 ×16P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM06.73/6.14 ×4MM16.73/6.14 ×4MM26.73/6.14 ×4MM36.73/6.14 ×4MM137.1/7.02 ×8MM147.1/7.02 ×8MM157.1/7.02 ×2MM187.1/7.02 ×8MM197.1/7.02 ×8P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM46.73/6.14 ×8P bulk → well_vdd06 Compensation and signal passivesCC1_050.9/50.9CC1_150.9/50.9CC1_250.9/50.907 Substrate contacts / repeated banksXBANK1Bank1_35x_ntap1XBANK2Bank2_177x_ntap1XBANK3Bank3_266x_ptap1XBANK4Bank4_8x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · cap_cmim \ No newline at end of file +amp_006_leung_dfcfc1{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_006_leung_dfcfc1","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_006_leung_dfcfc1","Bank1_35x_ntap1","Bank2_177x_ntap1","Bank3_266x_ptap1","Bank4_8x_cap_cmim"],"banks":[{"name":"Bank1_35x_ntap1","count":35,"model":"ntap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank2_177x_ntap1","count":177,"model":"ntap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank3_266x_ptap1","count":266,"model":"ptap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank4_8x_cap_cmim","count":8,"model":"cap_cmim","params":{"w":"48.935u","l":"48.935u","m":"1"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_006_leung_dfcfc1"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/design/amp_006_leung_dfcfc1.icproj.json"}}Main-sheet overview; 4 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_006_leung_dfcfc1net31well_net31vddwell_vddvsssubnet050voutvinpvinnnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net1vddnet049vssnet043net050vddnet049vssvoutdm_1net54net56vssvddvb4net013vb3net31net013vddnet049net1net31well_net31vddwell_vddvsssubnet050voutvssvddvinnvinpvoutnet013amp_006_leung_dfcfc1ihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresDifferential inputMM66.73/6.14 ×4MM56.73/6.14 ×4MM105.6/1.75 ×50MM95.6/1.75 ×50MM175.76/1.59 ×2MM165.76/1.59 ×2MM217.1/7.02 ×16MM207.1/7.02 ×16MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → subIntermediate gainMM117.55/0.7 ×40MM76.73/6.14 ×4MM86.73/6.14 ×4MM225.5/8.08 ×4MM235.5/8.08 ×4MM246.8/4.49P bulk → well_vddN bulk → subOutput and local feedbackMM127.49/2.04 ×400MM259.5/0.89 ×16P bulk → well_vddN bulk → subTail current biasMM06.73/6.14 ×4MM16.73/6.14 ×4MM26.73/6.14 ×4MM36.73/6.14 ×4MM137.1/7.02 ×8MM147.1/7.02 ×8MM157.1/7.02 ×2MM187.1/7.02 ×8MM197.1/7.02 ×8P bulk → well_vddN bulk → subBias referenceMM46.73/6.14 ×8P bulk → well_vddCompensationCC1_050.9/50.9CC1_150.9/50.9CC1_250.9/50.9Substrate tiesXBANK1Bank1_35x_ntap1XBANK2Bank2_177x_ntap1XBANK3Bank3_266x_ptap1XBANK4Bank4_8x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · cap_cmim + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/problem.md index 6a6a96d39eff504dccb1cc94554c476728b9810a..6dd050a5e3149fb578a6b41c7538cfd91b8fb7b1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_006_leung_dfcfc1/problem.md @@ -105,94 +105,63 @@ layout, not an area optimum. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_target / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Joint attainment of the electrical and area goals scores 100 points; a feasible reference may score far below 100, and better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +For metrics declaring `saturating_ratio`, q = 2(b+s)/(b+x+2*s), using the quality anchor b and the positive scale s in the metric’s units. Equality to the anchor gives quality 1; improvements approach 2. Normalize each condition before selecting the worst quality. These scales and targets do not add acceptance cutoffs. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | -| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | bias | +| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dc_gain_db` | AC: Value of `(db((T))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((T)))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | -| `phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | +| `phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=1)`. | deg | target / target | 0 … 180 | 10 | response | | `final_unity_hz` | AC: Crossing coordinate where `(db((T)))=0 fall=last`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `final_phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=last)`. | deg | target / target | 0 … 180 | 180 | response | -| `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 10g`. | 1 | target / target | 0 … +∞ | 1.0 | response | +| `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 10g`. | 1 | maximize / ratio | 0 … +∞ | 1e-12 | response | | `return_phase_excursion_deg` | AC: `vecmax(abs(180*cph(1+(T))/pi))`; sweep `dec 300 0.01 10g`. | deg | minimize / ratio | 0 … +∞ | 1e-12 | response | | `hf_gain_db` | AC: Maximum of `(db((T))) from=2g to=10g`. | dB | minimize / db20 | −∞ … +∞ | — | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **82915.92 um2**. 1164 expanded device instances; sum of device/contact envelopes 54901.4182 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. - - -### Score weights - -Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24.5%; gain and bandwidth 12.3%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. - -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `output_error_v` | 0.095454545449 | -| `recovery_down_v` | 0.095454545455 | -| `recovery_up_v` | 0.095454545455 | -| `final_phase_margin_deg` | 0.061363636364 | -| `minimum_return_distance` | 0.061363636364 | -| `phase_margin_deg` | 0.061363636364 | -| `return_phase_excursion_deg` | 0.061363636364 | -| `dc_gain_db` | 0.030681818182 | -| `final_unity_hz` | 0.030681818182 | -| `hf_gain_db` | 0.030681818182 | -| `unity_hz` | 0.030681818182 | -| `peak_v` | 0.027272727273 | -| `step_gain` | 0.027272727273 | -| `trough_v` | 0.027272727273 | -| `bias_v` | 0.020454545455 | -| `output_v` | 0.020454545455 | -| `mean_power_w` | 0.061363636364 | -| `power_w` | 0.061363636364 | +Area reference: **82915.92 um2**. The expanded circuit has 1164 device instances, a sum of device/contact envelopes 54901.4182 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. + +The capability coefficient is **8**, independent of this task's reference-normalized score. + +### Quality targets and weights + +The area quality target is **40000 um2**, independent of the current feasibility witness. It is not a hard area limit or a process minimum. + +The 40000 um2 footprint carries 45%, closed-loop DC accuracy 20%, bandwidth 15%, phase-margin preservation 10%, sampled return distance 5% and transient mean power 5%. The 3 mV accuracy goal is near the worst source offset. Phase-margin deviations use 10 degrees rather than 180 degrees. Larger distance from the sampled critical return point is rewarded. Duplicate first/final crossings, fully settled recovery errors and repeated bias/power summaries stay visible with zero weights. + +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 40000 | um2 | — | 0.45 | +| `output_error_v` | 0.003 | V | 0.0001 | 0.2 | +| `minimum_return_distance` | 0.9 | 1 | 1e-12 | 0.05 | +| `phase_margin_deg` | paired source | deg | 10 | 0.1 | +| `unity_hz` | paired source | Hz | — | 0.15 | +| `mean_power_w` | paired source | W | 1e-12 | 0.05 | + +Zero-weight paired diagnostics: `recovery_down_v`, `recovery_up_v`, `final_phase_margin_deg`, `return_phase_excursion_deg`, `dc_gain_db`, `final_unity_hz`, `hf_gain_db`, `peak_v`, `step_gain`, `trough_v`, `bias_v`, `output_v`, `power_w`. All unweighted measurements and functional requirements remain checked. + +The targets above affect continuous quality only. A complete feasible reference is allowed to miss them; there is no minimum qualifying score. ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/case.toml index 5ba063cd118211b86fabe7e8de750ff9719e11d9..0f59c98fa3ed0fd62a362672b1123d7e444dc1be 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_007_leung_dfcfc2" title = "Auxiliary-Stage Miller Compensation OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "3c29182833f403b62c80c07223604c0b76adff20f60bf7b8570e5c1ad4d2b374" +sha256 = "5a70225d79ab55135e6cdf0cb3988c1d24b3977aed12b569c102e12d91803934" [[assets]] path = "reference/amp_007_leung_dfcfc2.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_007_leung_dfcfc2-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "c63b5d6f4663100ab1d9ab5a264f740ad03afd25689f56c8eb75bd8242922ee5" +sha256 = "4afe62e06b12ce5ce4da442209d79b9f5b642db1a3d3a643638c13dacf2f150a" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "3e1d203a196d5cf5f13d15a6c347fcf8c2a907ccddd8b352a845f0fbeff664c0" subcircuit = "amp_007_leung_dfcfc2" +sha256 = "3e1d203a196d5cf5f13d15a6c347fcf8c2a907ccddd8b352a845f0fbeff664c0" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "05e0789d10df7b0cfe62ed17e90dea8af0672572fe54410109ebff425b4df977" +sha256 = "9f8cc2a768280232416381f758bcee51d6db79511d2f23e0c482e15968b421bd" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "90b86aa5cd099bef8e54a484a7cc061e92758cd357e591d5b94b944156e4e5c3" +source_report_sha256 = "0cd4666eed8865d50088a11aa9b61e2dbc90e34c617775b320d863530ed13cea" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"6475a4a31fccd6bb92d1727b7e74ff48b96743756eb81ab59e55c79dd90c0740\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "05e0789d10df7b0cfe62ed17e90dea8af0672572fe54410109ebff425b4df977" +deck = "9f8cc2a768280232416381f758bcee51d6db79511d2f23e0c482e15968b421bd" dut = "304a3e485dc4fd66ba644b2711c3382c5987aa54f4f4435916eb937d0f74583f" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 2459231.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "c08b4695ae10f65838bb463d4bf9530b96bafc3d82bc736ccc6f678b6e5497d0" +ac = "6e968ac28ce8a308eaa8e0a7dcdceb169c857e1dfc979c30a7052c6a307d3e24" +transient = "b190b05a8bd832618c36ad5ba14d349e9c90732883f683348451fdc937459ad6" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "05e0789d10df7b0cfe62ed17e90dea8af0672572fe54410109ebff425b4df977" +deck = "9f8cc2a768280232416381f758bcee51d6db79511d2f23e0c482e15968b421bd" dut = "304a3e485dc4fd66ba644b2711c3382c5987aa54f4f4435916eb937d0f74583f" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 2417398.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "c08b4695ae10f65838bb463d4bf9530b96bafc3d82bc736ccc6f678b6e5497d0" +ac = "6154da6e55c622e1715833c5502021577ea350c4ab3d5e795dabcb3e6d3ee7f3" +transient = "459051e3881087318484bd83f73123ad7a75e14812fba8f53ba94ff364b738c2" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "05e0789d10df7b0cfe62ed17e90dea8af0672572fe54410109ebff425b4df977" +deck = "9f8cc2a768280232416381f758bcee51d6db79511d2f23e0c482e15968b421bd" dut = "304a3e485dc4fd66ba644b2711c3382c5987aa54f4f4435916eb937d0f74583f" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 2332575.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "c08b4695ae10f65838bb463d4bf9530b96bafc3d82bc736ccc6f678b6e5497d0" +ac = "c86d6e2cc82921bc087569bd0a2bfb5acb21493508ca82a0f681414b7c3d5037" +transient = "3a4409f9a686e28a4ece1fcbdbef0fd9590ef1b0b7d75d60eebafa2c6528a030" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/schematic.svg index 6df9f20107fd10c13d250f360ece21e94dc1583a..a25005b3c1533664ea7bd9b92815cfb4f10d480c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/schematic.svg @@ -1 +1,2 @@ -amp_007_leung_dfcfc2{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_007_leung_dfcfc2", "netlist_sha256": "3e1d203a196d5cf5f13d15a6c347fcf8c2a907ccddd8b352a845f0fbeff664c0", "project_sha256": "130b13d4694b92e6daab3feb89e752e8b96e1a4c3aa613f39c8ba3f5f54715f5", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_007_leung_dfcfc2", "Bank1_5x_cap_cmim", "Bank2_5x_cap_cmim"], "banks": [{"name": "Bank1_5x_cap_cmim", "count": 5, "model": "cap_cmim", "params": {"w": "47.61u", "l": "47.61u", "m": "1"}}, {"name": "Bank2_5x_cap_cmim", "count": 5, "model": "cap_cmim", "params": {"w": "47.61u", "l": "47.61u", "m": "1"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_007_leung_dfcfc2net050voutnet050net2vinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet050net049vssvddnet1net043net050vddnet049vssvoutnet050net2dm_1net54net56net1vddvssvb4vb3net31net1vddnet31well_net31vddwell_vddvsssubvoutnet2net050net050vssvddvinnvinpvoutnet1amp_007_leung_dfcfc2ihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM51/1 ×4MM61/1 ×4MM81/1 ×100MM91/1 ×100MM161/1 ×16MM171/1 ×16MM201/1 ×32MM211/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM111/1 ×4MM71/1 ×4MM01/1 ×4MM231/1 ×4MM241/1 ×4P bulk → well_vddN bulk → sub03 Output / local feedbackMM121/1 ×4MM251/1 ×4P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM11/1 ×4MM101/1 ×4MM21/1 ×4MM31/1 ×4MM131/1 ×16MM221/1 ×16MM141/1 ×16MM151/1 ×4MM181/1 ×16MM191/1 ×16P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM41/1 ×8P bulk → well_vdd06 Substrate contacts / repeated banksRRtap_net31A=2410 µm²RRtap_vddA=642 µm²RRptapA=5510 µm²XBANK1Bank1_5x_cap_cmimXBANK2Bank2_5x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 \ No newline at end of file +amp_007_leung_dfcfc2{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_007_leung_dfcfc2","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_007_leung_dfcfc2","Bank1_5x_cap_cmim","Bank2_5x_cap_cmim"],"banks":[{"name":"Bank1_5x_cap_cmim","count":5,"model":"cap_cmim","params":{"w":"47.61u","l":"47.61u","m":"1"}},{"name":"Bank2_5x_cap_cmim","count":5,"model":"cap_cmim","params":{"w":"47.61u","l":"47.61u","m":"1"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_007_leung_dfcfc2"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/design/amp_007_leung_dfcfc2.icproj.json"}}Main-sheet overview; 2 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_007_leung_dfcfc2net050voutnet050net2vinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet050net049vssvddnet1net043net050vddnet049vssvoutnet050net2dm_1net54net56net1vddvssvb4vb3net31net1vddnet31well_net31vddwell_vddvsssubvoutnet2net050net050vssvddvinnvinpvoutnet1amp_007_leung_dfcfc2ihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresDifferential input and folded branchesMM51/1 ×4MM61/1 ×4MM81/1 ×100MM91/1 ×100MM161/1 ×16MM171/1 ×16MM201/1 ×32MM211/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subIntermediate gainMM111/1 ×4MM71/1 ×4MM01/1 ×4MM231/1 ×4MM241/1 ×4P bulk → well_vddN bulk → subOutput stageMM121/1 ×4MM251/1 ×4P bulk → well_vddN bulk → subTail-current biasMM11/1 ×4MM101/1 ×4MM21/1 ×4MM31/1 ×4MM131/1 ×16MM221/1 ×16MM141/1 ×16MM151/1 ×4MM181/1 ×16MM191/1 ×16P bulk → well_vddN bulk → subBias referenceMM41/1 ×8P bulk → well_vddBulk ties and device banksRRtap_net31A=2410 µm²RRtap_vddA=642 µm²RRptapA=5510 µm²XBANK1Bank1_5x_cap_cmimXBANK2Bank2_5x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/testbench.spice index 58d0bc40f6f63e839bb583ebc2356ebbc7861a62..e072c2401e1d7c5679e7a41332c15fe1017a83cb 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net1) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net1) i(VDD) +save i(vdd) v(net1) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/problem.md index 34acc89cc3b8a3683b916bf3cf6024e2ad506679..3b554e8914e7a4910e8a61e83f92e6ccb323760b 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_007_leung_dfcfc2/problem.md @@ -22,12 +22,11 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. Ordered ports: `vss vdd vinn vinp vout net1`. VSS is return, VDD is supply, VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net1` @@ -38,30 +37,16 @@ all internal branches and total multiplicities in the authoritative netlist. Native equivalent parallel fingers are allowed only when LVS and electrical requirements pass. Do not short distinct ports or create extra driven monitors. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c1`: `net050` → `vout`, 5 parallel `cap_cmim` unit(s), each 47.61 × 47.61 um; nominal total 17.038429 pF. - `c2`: `net050` → `net2`, 5 parallel `cap_cmim` unit(s), each 47.61 × 47.61 um; nominal total 17.038429 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. The transient nonlinear iteration ceiling is explicitly `itl4=1000`, with unchanged accuracy tolerances. This allows the retained high-multiplicity @@ -76,50 +61,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net1)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -127,22 +87,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **52764.97 um2**. 453 expanded device instances; sum of device/contact envelopes 34876.8788 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **52764.97 um2**. The expanded circuit has 453 device instances, a sum of device/contact envelopes 34876.8788 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -164,8 +122,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/case.toml index d47cb348319c142412d11840d4b808077734e693..e5e4da53ad6a7f319da0ab03e4031a734fd3a7e8 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_008_leung_nmcf" title = "Dual-Capacitor Three-Stage OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "2dd825bd75702e116bb6ee4c5363a5bf1b99c7e1b27101bf2fb33353c341be50" +sha256 = "816e9bade872c6dbf33df99347772e550f50b4b416df2a6bf0fef253a4236831" [[assets]] path = "reference/amp_008_leung_nmcf.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_008_leung_nmcf-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "8189d08bf5a67c5f3cf207074c3cb4bb78be8a25d04af251922c501f8c3100d5" +sha256 = "b60d09b3f21c6443e8b9e57deda87a2f71cec8b2355bb0ca0ca5d34dbfc1bb2d" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "8e12afdcc86858f64dc3dab7effa448ef1cb877a1c235001b3db1406d36d132a" subcircuit = "amp_008_leung_nmcf" +sha256 = "8e12afdcc86858f64dc3dab7effa448ef1cb877a1c235001b3db1406d36d132a" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "9efe64a9b2fc17086f03cd7ef40a73cc859b62661e94dffb5422bfbabeac81d6" +sha256 = "5b2fe559e73867bb348ef54c056da88cea84782fcc3503629a7ad6d688e77c61" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "3d7d48f8a5e66b9eae22d2a8d60e157d3360255014c18d80eaa61494ec32cc81" +source_report_sha256 = "47a1f4fe33cf95df423e90b8542eb4959b1d8e160e16f34204e832eb9b408e1a" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"01fe2316731a285f1505c945ee6362136980c4c104fa80b1dbdb13b201fa42ab\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "9efe64a9b2fc17086f03cd7ef40a73cc859b62661e94dffb5422bfbabeac81d6" +deck = "5b2fe559e73867bb348ef54c056da88cea84782fcc3503629a7ad6d688e77c61" dut = "83c0f27d8572d8f66464cf059498770165bd31996e4203ce44a7e1926c5b1618" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 2793689.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "c7bc2e9e27b2ca8ae44bd8964dd89168ea3a5ebf30af40b2f6a6d487eb31a0f5" +ac = "49bc9be5b03fa30abdac24158275a86a0ec76cd6dd43ec2b94a512335a75cb33" +transient = "fe78e84a64812fa485152818b56a35f21c300701dfca3c32b9fcf294aa829af3" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "9efe64a9b2fc17086f03cd7ef40a73cc859b62661e94dffb5422bfbabeac81d6" +deck = "5b2fe559e73867bb348ef54c056da88cea84782fcc3503629a7ad6d688e77c61" dut = "83c0f27d8572d8f66464cf059498770165bd31996e4203ce44a7e1926c5b1618" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 2873098.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "c7bc2e9e27b2ca8ae44bd8964dd89168ea3a5ebf30af40b2f6a6d487eb31a0f5" +ac = "5b7c325779fa729356f5ae18c0deea38c94df96b74f34b5410e7a0f1128dd4df" +transient = "299e7bbf79ba5f26f294298d757cbe27204d1a47ecc9fcf3e52d20671590fbbc" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "9efe64a9b2fc17086f03cd7ef40a73cc859b62661e94dffb5422bfbabeac81d6" +deck = "5b2fe559e73867bb348ef54c056da88cea84782fcc3503629a7ad6d688e77c61" dut = "83c0f27d8572d8f66464cf059498770165bd31996e4203ce44a7e1926c5b1618" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 3046550.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "c7bc2e9e27b2ca8ae44bd8964dd89168ea3a5ebf30af40b2f6a6d487eb31a0f5" +ac = "619143b7de4809b5ba3c91415cd80a560db2fbd093f898ed842d84da20841b99" +transient = "92b33c25db8d0ddec3f84ffc0c0123218df1cf8b4826f12acf28ce613779c078" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/schematic.svg index b3d0f0c741068c6951c38d9b08f278c4d4df1977..68ad342e30c9fe771aed965fa65edaafc2fe1615 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/schematic.svg @@ -1 +1,2 @@ -amp_008_leung_nmcf{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_008_leung_nmcf", "netlist_sha256": "8e12afdcc86858f64dc3dab7effa448ef1cb877a1c235001b3db1406d36d132a", "project_sha256": "635dd8b6855b8c2fa567ba7518cb356fb15e56d4f645615ed52614d62f913cb9", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_008_leung_nmcf"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_008_leung_nmcfvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet013net050voutvddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31net013vddnet049net050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_008_leung_nmcfihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM53.82/1.79 ×4MM63.82/1.79 ×4MM84.11/0.66 ×4MM94.11/0.66 ×4MM152.56/0.14 ×16MM162.56/0.14 ×16MM192.56/0.14 ×32MM202.56/0.14 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM107.44/4.42 ×4MM73.82/1.79 ×4MM117.14/0.22 ×4MM215.17/1.73 ×4MM225.17/1.73 ×4MM236.43/2.18 ×4P bulk → well_vddN bulk → sub03 Bias and tail-current generationMM03.82/1.79 ×4MM13.82/1.79 ×4MM23.82/1.79 ×4MM33.82/1.79 ×4MM122.56/0.14 ×16MM132.56/0.14 ×16MM142.56/0.14 ×4MM172.56/0.14 ×16MM182.56/0.14 ×16P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM43.82/1.79 ×16P bulk → well_vdd05 Compensation and signal passivesCC0_047/47CC0_147/47CC1_030.7/30.706 Substrate contacts / repeated banksRRtap_net31A=103 µm²RRtap_vddA=775 µm²RRptapA=2870 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim \ No newline at end of file +amp_008_leung_nmcf{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_008_leung_nmcf","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_008_leung_nmcf"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_008_leung_nmcf"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/design/amp_008_leung_nmcf.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_008_leung_nmcfvddnet050net31vb3vb4vssdm_2net063voutnnet013net050vddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31vddnet049net050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_008_leung_nmcfihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM53.82/1.79 ×4MM63.82/1.79 ×4MM84.11/0.66 ×4MM94.11/0.66 ×4MM152.56/0.14 ×16MM162.56/0.14 ×16MM192.56/0.14 ×32MM202.56/0.14 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subMM107.44/4.42 ×4MM73.82/1.79 ×4MM117.14/0.22 ×4MM215.17/1.73 ×4MM225.17/1.73 ×4MM236.43/2.18 ×4P bulk → well_vddN bulk → subMM03.82/1.79 ×4MM13.82/1.79 ×4MM23.82/1.79 ×4MM33.82/1.79 ×4MM122.56/0.14 ×16MM132.56/0.14 ×16MM142.56/0.14 ×4MM172.56/0.14 ×16MM182.56/0.14 ×16P bulk → well_vddN bulk → subMM43.82/1.79 ×16P bulk → well_vddCC0_047/47CC0_147/47CC1_030.7/30.7RRtap_net31A=103 µm²RRtap_vddA=775 µm²RRptapA=2870 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/testbench.spice index d573c0233637c585b2e15869d54539441a3d51e0..bdd3832c8b7fa5b695108973b97f4a4ac06fab2d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net013) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net013) i(VDD) +save i(vdd) v(net013) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/problem.md index 8f5c5bbcbfc930131e20b4851c046f676afd8bb5..baf1d0355c18d4735a2553efb32459da90ae1835 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_008_leung_nmcf/problem.md @@ -20,12 +20,11 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. Ordered ports: `vss vdd vinn vinp vout net013`. VSS is return, VDD is supply, VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net013` @@ -36,30 +35,16 @@ all internal branches and total multiplicities in the authoritative netlist. Native equivalent parallel fingers are allowed only when LVS and electrical requirements pass. Do not short distinct ports or create extra driven monitors. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net050` → `vout`, 2 parallel `cap_cmim` unit(s), each 46.95 × 46.95 um; nominal total 6.6279315 pF. - `c1`: `net049` → `vout`, 1 parallel `cap_cmim` unit(s), each 30.75 × 30.75 um; nominal total 1.4232638 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. ## Physical Requirements @@ -70,50 +55,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -121,22 +81,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **17797.36 um2**. 242 expanded device instances; sum of device/contact envelopes 11690.9447 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **7**; it is independent of -the reference-relative task score. +Area reference: **17797.36 um2**. The expanded circuit has 242 device instances, a sum of device/contact envelopes 11690.9447 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **7**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -158,8 +116,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/case.toml index e63d3a2139109c377ff07ce0b271e883acc73b59..5a41aaf3f29ebf3f839f3ba5241141932da3aa7e 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_009_leung_nmcnr" title = "Shared-Nulling-Resistor Three-Stage OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "ae43cebdb8c9836fdfcfae9f08bd4aae8e9b802c59926b499a6fe9bf625ae42b" +sha256 = "b6d72ff145569d5cb429b6197224fa79250fca2c7362eff697d29364eb738879" [[assets]] path = "reference/amp_009_leung_nmcnr.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_009_leung_nmcnr-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "253219b7b6d44aeeaf3f900e6f1cfe787c5e188d2a588f8889a59ef8e7e207ee" +sha256 = "cd73aa6bef075e251cf2f7882bfbc2ee1c18fd21cba3f903f73b56c58bd476bb" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "68c55b7866f4dd6640069867385394c0ed2c9b8c026a215df0b2dd381faab6ef" subcircuit = "amp_009_leung_nmcnr" +sha256 = "68c55b7866f4dd6640069867385394c0ed2c9b8c026a215df0b2dd381faab6ef" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "56ff1a0128f212cab032f015ff577e90d89a4f9f4f2e293a4b58d3af37d01893" +sha256 = "dca76f1d4fa0494c9b96140ead138e58cf977e6bbc88b0a8f2e0b3857a736a2f" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "e01de3b1344a205b97120dfe2be86e91b10f91393afd25ad415aa845ff54a49d" +source_report_sha256 = "3dc188dafd20d75683ae7c5c7d66bcc1be50078cadf2b139d0e1980f8b1ae837" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cb929f884c952cc7f121a668c2a745d9e4fe49ebbbbefe5f1d56247346c8a062\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "56ff1a0128f212cab032f015ff577e90d89a4f9f4f2e293a4b58d3af37d01893" +deck = "dca76f1d4fa0494c9b96140ead138e58cf977e6bbc88b0a8f2e0b3857a736a2f" dut = "0cf900f6dc2376b1130143762316acda64e0c624b284feb2919c4551f6b4cf34" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 1236878.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "9bfc5d412440b7125c0385eb6a355c2c36c67d8c919bb7cfd78edd6ab04fdf65" +ac = "cfbcfc5029b7b2e09a0865a0a6cd0817a9ed15f17468d2b0f4eeead700a9035c" +transient = "5c2b4f749ebf446547f7925572f40dd8e5c6c6270fc9f73bfedd49b3b17b609b" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "56ff1a0128f212cab032f015ff577e90d89a4f9f4f2e293a4b58d3af37d01893" +deck = "dca76f1d4fa0494c9b96140ead138e58cf977e6bbc88b0a8f2e0b3857a736a2f" dut = "0cf900f6dc2376b1130143762316acda64e0c624b284feb2919c4551f6b4cf34" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 1289919.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "9bfc5d412440b7125c0385eb6a355c2c36c67d8c919bb7cfd78edd6ab04fdf65" +ac = "5f34916aac835872299c7657c58cddcd15f7c093f031a5100341ade19a7d1fb0" +transient = "a41e796e1be2b30ddd17b3b57cae46250e6902d6fa0f7b83d98b040119d32fae" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "56ff1a0128f212cab032f015ff577e90d89a4f9f4f2e293a4b58d3af37d01893" +deck = "dca76f1d4fa0494c9b96140ead138e58cf977e6bbc88b0a8f2e0b3857a736a2f" dut = "0cf900f6dc2376b1130143762316acda64e0c624b284feb2919c4551f6b4cf34" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 1433315.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "9bfc5d412440b7125c0385eb6a355c2c36c67d8c919bb7cfd78edd6ab04fdf65" +ac = "235d735dcf327bc1b369c54ce3b885d7a1c7cb965cda7aafdb9399ad54f22387" +transient = "e5f1a828b097220721185b364e0000de29c8c9808d52cafa2467ba1a2572492c" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/schematic.svg index c034445d83131058a085bf6637cfee08ed33e1e0..6c8c3953b6e9eb3c4c73d813ce72b9d593486126 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/schematic.svg @@ -1 +1,2 @@ -amp_009_leung_nmcnr{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_009_leung_nmcnr", "netlist_sha256": "68c55b7866f4dd6640069867385394c0ed2c9b8c026a215df0b2dd381faab6ef", "project_sha256": "e7ae4edeff38b92c958fa7d6efb96ed785ceae212f4f731fcabea900a94eda10", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_009_leung_nmcnr"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 1}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_009_leung_nmcnrvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnnet050net013voutvddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31net013vddnet049voutnet050net044net31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_009_leung_nmcnrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM51/1 ×4MM61/1 ×4MM81/1 ×4MM91/1 ×4MM151/1 ×16MM161/1 ×16MM191/1 ×32MM201/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM101/1 ×4MM71/1 ×4MM111/1 ×40MM211/1 ×4MM221/1 ×4MM231/1 ×4P bulk → well_vddN bulk → sub03 Bias and tail-current generationMM01/1 ×4MM11/1 ×4MM21/1 ×4MM31/1 ×4MM121/1 ×16MM131/1 ×16MM141/1 ×4MM171/1 ×16MM181/1 ×16P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM41/1 ×16P bulk → well_vdd05 Compensation and signal passivesCC0_040.8/40.8CC0_140.8/40.8CC1_044.7/44.7RR0_01/6.94R substrate → sub06 Substrate contacts / repeated banksRRtap_net31A=108 µm²RRtap_vddA=1120 µm²RRptapA=3480 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim · rhigh \ No newline at end of file +amp_009_leung_nmcnr{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_009_leung_nmcnr","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_009_leung_nmcnr"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/design/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":1},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_009_leung_nmcnr"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/design/amp_009_leung_nmcnr.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_009_leung_nmcnrvddnet050net31vb3vb4vssdm_2net063voutnnet050net013vddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31vddnet049voutnet050net044net31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_009_leung_nmcnrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM51/1 ×4MM61/1 ×4MM81/1 ×4MM91/1 ×4MM151/1 ×16MM161/1 ×16MM191/1 ×32MM201/1 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subMM101/1 ×4MM71/1 ×4MM111/1 ×40MM211/1 ×4MM221/1 ×4MM231/1 ×4P bulk → well_vddN bulk → subMM01/1 ×4MM11/1 ×4MM21/1 ×4MM31/1 ×4MM121/1 ×16MM131/1 ×16MM141/1 ×4MM171/1 ×16MM181/1 ×16P bulk → well_vddN bulk → subMM41/1 ×16P bulk → well_vddCC0_040.8/40.8CC0_140.8/40.8CC1_044.7/44.7RR0_01/6.94R substrate → subRRtap_net31A=108 µm²RRtap_vddA=1120 µm²RRptapA=3480 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/testbench.spice index 7ac28e928aef6726bd18a30dda04e597187d8212..22e72e78585009afcaba53bf004caf82e7113472 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net013) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net013) i(VDD) +save i(vdd) v(net013) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/problem.md index cdaee578057257fdda09f75e43469a2703d73726..c4bb8ed65d6636de94588209cf6bc2d9c25c2308 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_009_leung_nmcnr/problem.md @@ -21,23 +21,15 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. -Ordered ports: `vss vdd vinn vinp vout net013`. VSS is return, VDD is supply, -VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net013` -connects the external 3 uA sink to VSS. Input PMOS bodies retain -the separate source-tied well; other PMOS bodies use the VDD well and NMOS -bodies use the VSS substrate contact. Preserve device W/L/m, body connectivity, -all internal branches and total multiplicities in the authoritative netlist. -Native equivalent parallel fingers are allowed only when LVS and electrical -requirements pass. Do not short distinct ports or create extra driven monitors. +Ordered ports are `vss vdd vinn vinp vout net013`: return, supply, inverting/noninverting inputs, output and an external 3 uA pull-down to VSS. Input PMOS bodies retain independent source-connected wells; other PMOS bodies connect to the VDD well and NMOS bodies to VSS substrate contacts. Preserve authoritative netlist W/L/m, bodies, internal branches and total multiplicities; native equivalent parallel fingers must pass LVS and electrical checks. Do not short distinct ports or add driven monitor ports. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net050` → `net044`, 2 parallel `cap_cmim` unit(s), each 40.825 × 40.825 um; nominal total 5.0131059 pF. - `c1`: `net044` → `net049`, 1 parallel `cap_cmim` unit(s), each 44.72 × 44.72 um; nominal total 3.0069728 pF. @@ -45,22 +37,9 @@ Internal passives, distinct from the external load: ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. - -VINP rises 0.5→0.7 V at 2–2.02 us and falls at 10.02–10.04 us, repeating -every 16 us. Simulate 0–18 us with Gear order 2, 2 ns maximum step, -`rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14`, `vntol=1e-8`. -The numerical shunt is not a manufactured bias or startup device. -PVT, mismatch, noise, distortion, rail-to-rail operation, supply startup and -arbitrary-load stability remain outside the contract. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. + +VINP rises from 0.5 V to 0.7 V during 2–2.02 us and falls during 10.02–10.04 us, repeating every 16 us. Simulate 0–18 us with second-order Gear, a maximum step of 2 ns, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Numerical shunt branches are not physical bias or startup devices. PVT, mismatch, noise, distortion, rail-to-rail operation, power-up and stability under arbitrary loads are outside scope. ## Physical Requirements @@ -71,50 +50,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -122,22 +76,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=9u to=9.5u)-(avg v(vout) from=17u to=17.5u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=10u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=10.04u to=18u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **18158.97 um2**. 279 expanded device instances; sum of device/contact envelopes 11930.2526 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **7**; it is independent of -the reference-relative task score. +Area reference: **18158.97 um2**. The expanded circuit has 279 device instances, a sum of device/contact envelopes 11930.2526 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **7**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -159,8 +111,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/case.toml index c7a47b6b86869f8891bb6b9b87ce294557fe85db..5bc806b19a5e5c6308e76d0415b16185be3455c3 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_010_peng_acbc" title = "Auxiliary-Branch Compensation OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "8abd34d8b3e238cb4b519f83ac368161ce216e4bfeec4e155ffb991344d15c37" +sha256 = "b9b9a322c8112e8c6aeaf500babc993faddf55b0a979e366eb98cfc626692453" [[assets]] path = "reference/amp_010_peng_acbc.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_010_peng_acbc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "f68dcd0544b4e7f0f0ac7a98ccb1b19120a216acca28f23227a466c14c889d1a" +sha256 = "5cd2464f80a594a38f0456a60f0e8786b7eb487352e89818416b7bc45d68de86" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "e8fcd5473160b4dd336813dfb86122e023e06285c6878100e717abe9a4f6aa6f" subcircuit = "amp_010_peng_acbc" +sha256 = "e8fcd5473160b4dd336813dfb86122e023e06285c6878100e717abe9a4f6aa6f" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "3c4747385f9a5ff18c2486daa4468d72315d26d466a7f25e5518168e87d0c566" +sha256 = "baf04212076fbe4ffd53008cbeaa26492954ebf1f6e4ab17d8e360f2fa89a424" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "79b12fc14f18b15dfd7ecd5e7b1541d8c7aee87bc0ea8b892afe501e81159f9a" +source_report_sha256 = "21ac96e99b2616bf43ecdf4209bdb77bd775be7ad88a45436ef5f73bad297e47" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"f8ce6425541ddc57ac017e01cada5aa0fd7132c81482defd60cc7093d2941dfb\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "3c4747385f9a5ff18c2486daa4468d72315d26d466a7f25e5518168e87d0c566" +deck = "baf04212076fbe4ffd53008cbeaa26492954ebf1f6e4ab17d8e360f2fa89a424" dut = "093c21f46a744564280df3aa5a1de6a88cc1e276949ae623795c7c8b20b0cb47" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 240024.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "bd5851bc61e4a1ee64e50b0da52d130007b45ae239372a56b0c38871efb86d91" +ac = "08d8a4ee1ec6aa33053125ceec8ad3c8839035917298a40991afcc437aec5ff5" +transient = "be18575dfdd1b9507688f362ec66d58db59e8c62cc64435c3587a5a305cacf85" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "3c4747385f9a5ff18c2486daa4468d72315d26d466a7f25e5518168e87d0c566" +deck = "baf04212076fbe4ffd53008cbeaa26492954ebf1f6e4ab17d8e360f2fa89a424" dut = "093c21f46a744564280df3aa5a1de6a88cc1e276949ae623795c7c8b20b0cb47" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 241547.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "bd5851bc61e4a1ee64e50b0da52d130007b45ae239372a56b0c38871efb86d91" +ac = "73f6b3ca6e7d245da9a0a0f884ade5dd4bccb0840d49629800dc56a6d75b66a8" +transient = "ce879d15ff59842b99fb72adfe45c4a170d79a96bf7e33ddb3f4ed2351943422" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "3c4747385f9a5ff18c2486daa4468d72315d26d466a7f25e5518168e87d0c566" +deck = "baf04212076fbe4ffd53008cbeaa26492954ebf1f6e4ab17d8e360f2fa89a424" dut = "093c21f46a744564280df3aa5a1de6a88cc1e276949ae623795c7c8b20b0cb47" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 244699.6 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "bd5851bc61e4a1ee64e50b0da52d130007b45ae239372a56b0c38871efb86d91" +ac = "4ea61f62b54310d44dc8710468a6401df963173e5a6283a6b14a6fc9f773402b" +transient = "bd9af3075d01efa6203842d459e4fa74aa7bd07d58f603c0521aa0f76ea57f78" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1044,7 +1089,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1054,7 +1099,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/schematic.svg index 2c64830adfaf8fd306ab2b8758c6822d0e9911eb..a076a2db5534149fc809fa013008793692d1b9ef 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/schematic.svg @@ -1 +1,2 @@ -amp_010_peng_acbc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_010_peng_acbc", "netlist_sha256": "e8fcd5473160b4dd336813dfb86122e023e06285c6878100e717abe9a4f6aa6f", "project_sha256": "71e1fb78fbcdd62ae20baa1b03c36fd8dcd5a196372df95481d86fab942f69b4", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_010_peng_acbc"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_010_peng_acbcvinpvinnnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net049vddnet1vssnet043net050vddnet049vssvoutdm_1net54net56vssvddvb4net013vb3net31net1net013vddnet049net1net050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_010_peng_acbcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM62.69/1.29 ×4MM52.69/1.29 ×4MM104.25/1.07 ×4MM94.25/1.07 ×4MM173.55/0.5 ×16MM163.55/0.5 ×16MM215.53/0.62 ×32MM205.53/0.62 ×32MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM116.4/1.24MM72.69/1.29 ×4MM594.98/7.88 ×4MM224.02/9.7 ×4MM234.02/9.7 ×4MM249.97/8.02 ×4P bulk → well_vddN bulk → sub03 Output / local feedbackMM129.16/1.19 ×4MM253.52/1.91 ×4P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM02.69/1.29 ×4MM12.69/1.29 ×4MM22.69/1.29 ×4MM32.69/1.29 ×4MM135.53/0.62 ×16MM145.53/0.62 ×16MM155.53/0.62 ×4MM185.53/0.62 ×16MM195.53/0.62 ×16P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM42.69/1.29 ×8MM82.69/1.29 ×4P bulk → well_vdd06 Compensation and signal passivesCC0_050.4/50.4CC0_150.4/50.4CC0_250.4/50.4CC0_350.4/50.4CC1_038.3/38.3CC1_138.3/38.307 Substrate contacts / repeated banksRRtap_net31A=109 µm²RRtap_vddA=740 µm²RRptapA=3230 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · cap_cmim \ No newline at end of file +amp_010_peng_acbc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_010_peng_acbc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_010_peng_acbc"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_010_peng_acbc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/design/amp_010_peng_acbc.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_010_peng_acbcnet050vddnet31vb3vb4vssnet063dm_2voutnnet050net013net049vddnet1vssnet043net050vddnet049vssdm_1net54net56vssvddvb4vb3net31net1net013vddnet049net1net050voutnet31well_net31vddwell_vddvsssubvssvddvinnvinpvoutnet013amp_010_peng_acbcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM62.69/1.29 ×4MM52.69/1.29 ×4MM104.25/1.07 ×4MM94.25/1.07 ×4MM173.55/0.5 ×16MM163.55/0.5 ×16MM215.53/0.62 ×32MM205.53/0.62 ×32MM6, MM5: B → well_vddMM10, MM9: B → well_net31N bulk → subMM116.4/1.24MM72.69/1.29 ×4MM594.98/7.88 ×4MM224.02/9.7 ×4MM234.02/9.7 ×4MM249.97/8.02 ×4P bulk → well_vddN bulk → subMM129.16/1.19 ×4MM253.52/1.91 ×4P bulk → well_vddN bulk → subMM02.69/1.29 ×4MM12.69/1.29 ×4MM22.69/1.29 ×4MM32.69/1.29 ×4MM135.53/0.62 ×16MM145.53/0.62 ×16MM155.53/0.62 ×4MM185.53/0.62 ×16MM195.53/0.62 ×16P bulk → well_vddN bulk → subMM42.69/1.29 ×8MM82.69/1.29 ×4P bulk → well_vddCC0_050.4/50.4CC0_150.4/50.4CC0_250.4/50.4CC0_350.4/50.4CC1_038.3/38.3CC1_138.3/38.3RRtap_net31A=109 µm²RRtap_vddA=740 µm²RRptapA=3230 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/testbench.spice index c93ed8f9dfd8a75ee849114314ebe1d60275b944..cb2efa8e692f25d4c2da6c0d7269cf88c77b12ae 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(net013) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(net013) i(VDD) +save i(vdd) v(net013) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/problem.md index 60f65d39f38b9b28ed5a44f4d6da1634dc8dda18..c7c536306ee005a2815e4024e9b7d141fa1a66c1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_010_peng_acbc/problem.md @@ -23,12 +23,11 @@ common source `net31`, electrically separate from the VDD well. No internal ideal bias source or output servo is introduced. Capacitor values are rounded to physical geometry; every branch remains internal to the DUT. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. -- `materials/circuit.spice`: matching process-model circuit. -- `materials/testbench.spice`: public bias, AC injection and transient deck. +- `materials/circuit.spice`: simulation circuit bound to the process models. +- `materials/testbench.spice`: bias, AC injection and transient tests. Ordered ports: `vss vdd vinn vinp vout net013`. VSS is return, VDD is supply, VINN/VINP are inverting/noninverting inputs, VOUT is output, and `net013` @@ -39,23 +38,14 @@ all internal branches and total multiplicities in the authoritative netlist. Native equivalent parallel fingers are allowed only when LVS and electrical requirements pass. Do not short distinct ports or create extra driven monitors. -Internal passives, distinct from the external load: +Internal passive devices are listed below; external loads are declared separately: - `c0`: `net050` → `vout`, 4 parallel `cap_cmim` unit(s), each 50.405 × 50.405 um; nominal total 15.276243 pF. - `c1`: `net049` → `net1`, 2 parallel `cap_cmim` unit(s), each 38.31 × 38.31 um; nominal total 4.4152275 pF. - ## Operating Conditions -Use typical MOS/MIM/poly models, 27 C, VDD=1.2 V and the stated external bias. -All output loads 5/10/20 pF must pass. At DC, VINP=0.5 V and VOUT drives VINN -through a zero-volt measurement source. AC injects 1 V in series with this -feedback connection, with VINP AC=0. The return ratio is -`T=-V(vout)/V(vm)` at this high-impedance MOS input boundary. Sweep 0.01 Hz -to 100 MHz at 150 points/decade. Use continuous phase without an arbitrary -low-frequency phase-offset correction; the first descending 0 dB crossing -defines unity frequency and `180+phase(T)` there defines phase margin. -A missing crossing is an evaluator error. +Use typical MOS/MIM/poly models at 27 C, VDD=1.2 V and the declared external bias. All three output loads, 5/10/20 pF, must pass. At DC, VINP=0.5 V and VOUT feeds back to VINN through a zero-volt measurement source. For AC, inject 1 V in series with the feedback connection and set VINP AC=0; the return ratio at the high-impedance MOS input boundary is `T=-V(vout)/V(vm)`. Sweep 150 points per decade from 0.01 Hz to 100 MHz with continuous phase, without arbitrary correction of the low-frequency phase offset. The first falling 0 dB crossing defines unity-gain frequency, and `180+phase(T)` at that crossing defines phase margin. A missing crossing is an evaluation error. VINP rises 0.5→0.7 V at 20–20.1 us and falls at 100.1–100.2 us, repeating every 160 us. Simulate 0–180 us with Gear order 2, 10 ns maximum step, @@ -73,50 +63,25 @@ functional envelope. All functional device, contact and routing drawing layers listed in the runtime `outline` constraint contribute to bounding-box area; annotation and pin-purpose layers do not. -Post-layout simulation consumes candidate-derived Magic RC with the physical -MIM/poly devices and interconnect parasitics. Half-grid GDS import is explicit. -Magic idealizes substrate/well taps; source simulation retains finite tap models. -Distributed substrate resistance/noise and fabrication signoff are unqualified. +Post-layout simulation uses the candidate's Magic RC netlist, including physical MIM/poly devices and interconnect parasitics, with explicit handling of half-grid GDS import. Magic idealizes substrate/well contacts; source simulation retains finite contact models. Distributed substrate resistance, substrate noise and manufacturing signoff are outside scope. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -124,22 +89,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=50u to=95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=130u to=175u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=50u to=95u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=130u to=175u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=90u to=95u)-(avg v(vout) from=170u to=175u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=20u to=180u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=20u to=100u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=100.2u to=180u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **32926.15 um2**. 246 expanded device instances; sum of device/contact envelopes 21714.0299 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **32926.15 um2**. The expanded circuit has 246 device instances, a sum of device/contact envelopes 21714.0299 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -161,8 +124,4 @@ Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain Solve budget: **3 hours**. -Discover inputs, resources and feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use the supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness protocol. Host configuration, source -records and reference layouts are outside the standard solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Use the provided IHP primitives and KLayout, Magic and ngspice. Write `/workspace/output/final.gds`, then submit explicitly through the runtime protocol. Host configuration, source records and reference layouts are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/case.toml index 36129100f50333ab4a0886be567bc16fcfd4208f..5a574c8495b88e6a656c632cdd72503ae149891e 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_011_peng_iac" title = "Peng IAC Three-Stage Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "9abd9baa42deb4d6d0a42d0f0ae435b7d921c72d4d6332b0a0c5ac9a96dec8c2" +sha256 = "679fae5a249fedc6831d1810b021518151663db82d9be9ea935109998f9cd6b4" [[assets]] path = "reference/amp_011_peng_iac.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "1acdb3c35a5135905a79860e97e698982c67baefcc4b3c5ec3933315afb47cf0" +sha256 = "f29f1ef727f3da1b8ee039f271109c322bae2ad1777d2829b4d54a0552f1eed3" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "3d202284343734913c74c1436446a7dab16631757da8c617aaae8e6f67a2db15" subcircuit = "amp_011_peng_iac" +sha256 = "3d202284343734913c74c1436446a7dab16631757da8c617aaae8e6f67a2db15" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "8ebd9567afb219eb76a2e127ce53ae66dccd1f357c22faa0fdf4f135541c26cd" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "e8d81d406f9ffcf1296378fff8a9119f6262c4719a4530c3ce14dad9cfc76f97" +sha256 = "d45426dafee5833b944f1a54bc1a27877ae797d06922f2c6fa6a57c73a33cc90" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "6db68e956301da79022015fef52f9fb55ed63c30bc43475d3c57fa3f3c552124" +sha256 = "558697e9c13b7f453fab1289010b503b4332241b0bed67b121b74ad214848f3e" [task.constraints] quality = [ @@ -447,7 +447,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -456,6 +455,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -506,11 +509,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:late_error_v", @@ -519,15 +521,18 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -536,15 +541,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -553,15 +561,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -570,6 +581,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -578,7 +593,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -587,6 +601,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -642,30 +660,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [task.evaluation.pre_layout] -source_report_sha256 = "a91c326e5283d57e94016f57988eb1eab90b7ff01a52f400aaa8af7cc2938c15" +source_report_sha256 = "d9bd2052fa1c1e150404766a7e6da8715dd730448073cc94fb7f5cf732b23494" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"ac34ff45be03a4f0f78e13d50bb147927e8a6473d29f4cc5b8512b6effcdbad7\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -704,7 +728,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "e8d81d406f9ffcf1296378fff8a9119f6262c4719a4530c3ce14dad9cfc76f97" +deck = "d45426dafee5833b944f1a54bc1a27877ae797d06922f2c6fa6a57c73a33cc90" dut = "8ebd9567afb219eb76a2e127ce53ae66dccd1f357c22faa0fdf4f135541c26cd" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -759,6 +783,11 @@ unit = "V" value = 0.4056972 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "69e9f6f48dafc205596450ce786ea44688c0fae3fabadd508abc3bc3d01b6bef" +ac = "fd47637f353b4247b72381b00554536e0194f856beb8972590a417f824d1a3f1" +transient = "9a5358792d469c49526a24337b682e23441426c1490dcfaf8ebcc22d3cbce508" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -784,7 +813,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "6db68e956301da79022015fef52f9fb55ed63c30bc43475d3c57fa3f3c552124" +deck = "558697e9c13b7f453fab1289010b503b4332241b0bed67b121b74ad214848f3e" dut = "8ebd9567afb219eb76a2e127ce53ae66dccd1f357c22faa0fdf4f135541c26cd" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dc_feedback_error_v] @@ -803,6 +832,10 @@ unit = "dB" value = 112.63 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "7bf0807df6d720247e4af87cabda4981064d6e82defb0a6e610f34206b053e5e" +ac = "3741369be6a497ded1366cf3195379ef8cbf1016c833ddd07076124c6cf0c7be" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -815,7 +848,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -826,7 +859,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -839,7 +872,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -852,7 +885,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -865,7 +898,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -875,7 +908,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/ac.spice index fb185064986ed5098d8c77db70ada44e738ccc34..3a0f11552326515aa30397cf128889b5b7d2b49f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/ac.spice @@ -17,7 +17,6 @@ XDUT 0 vdd vm vp vout vb1 amp_011_peng_iac CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 op let dc_feedback_error_v=abs(v(vout)-v(vm)) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/schematic.svg index cb9b7eb4309b67a42af2c324d9bf80ce93a9da3a..e0a31563614898068c80cce043d5b8b5c07fd70e 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_011_peng_iac{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_011_peng_iac","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/circuit.cdl","netlist_sha256":"3d202284343734913c74c1436446a7dab16631757da8c617aaae8e6f67a2db15","project_sha256":"066b4eb070bb1535a01242115bc3964bebd2da24193f68c446d6eb1756a7fbb1","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist 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main sheet follows the circuit stages; repeated net names identify matching terminals within each sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Repeated source devices remain individually represented. Large banks use contiguous source-order detail ranges only where needed for responsive editing."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":6},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_011_peng_iac"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/design/amp_011_peng_iac.icproj.json"}}Main-sheet overview; 31 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_011_peng_iacvddvb1net3vddvb1net8vddvb1net2vddvb1net31vsssubvddnet10vb2net049vddnet3vb4vb2vsssubvb4net9vddvb1net049vsssubvb4net063subvb3voutndm_2vddvoutvoutpvddnet043voutpvddvb1net6vsssubvb4net54vddnet7net6vb2vsssubvb4net56subvb3net7net56vddvoutpvoutnvddvb3net8vb2vddvb1net2vb2subvb4vb3net54vsssubvb4dm_2subvb3vb2net9vddvb2vsssubnet4vddvoutnvoutpsubvb3net063net043subvb3net1vddvddvssvssvinnvinpnet31net31dm_2net063net7net7vddvb2vb3vb4voutnvoutpvoutpnet043net043net043net10vddnet10voutnet1net1net4vb1vb1vb1vssvssvssamp_011_peng_iacBIAS AND CURRENT MIRRORSINPUT STAGEOUTPUT AND COMPENSATIONMM14_0MM14_1MM23_0MM23_1MM23_2MM68_0MM68_1MM68_2MM69_0MM69_1MM69_2MM70_0MM70_1MM70_2RT499MM8_0RT500MM8_1RT501MM8_2RT502MM9_0RT503MM9_1RT504MM9_2C0_0C1_0C1_1XMM0_bank1XMM1_bank2XMM10_bank3XMM11_bank4XMM12_bank5XMM13_bank6XMM15_bank7XMM16_bank8XMM17_bank9XMM18_bank10XMM19_bank11XMM2_bank12XMM20_bank13XMM3_bank14XMM4_bank15XMM5_bank16XMM57_bank17XMM58_bank18XMM6_bank19XMM61_bank20XMM62_bank21XMM63_bank22XMM64_bank23XMM65_bank24XMM66_bank25XMM67_bank26XMM7_bank27XXRT65_bank28XXRR0_bank29 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/testbench.spice index 67e0794fa2adcd91714cde9493342ba36222af80..e290996c4a6caed89964e0894b41827b40841723 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/materials/testbench.spice @@ -16,7 +16,6 @@ CLOAD vout 0 {load_f} VMARK timing 0 PWL(0 0 15u 0 15.001u 1 20u 1 20.001u 0 35u 0 35.001u 1 40u 1) .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/problem.md index 1200aa7bb6b0b8a9a2ec91cd9e20aaaf0305882a..d665bc0899fe6e5964109b145a702c29db2b7883 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_011_peng_iac/problem.md @@ -49,30 +49,17 @@ IHP native main and maximal DRC use the pinned PDK block profiles, with chip-lev ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. | Metric | Definition | Unit | Treatment | | --- | --- | --- | --- | @@ -89,14 +76,7 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | dc_feedback_error_v | Absolute DC voltage across the external feedback inductor | V | Measurement-validity check, 0–1 uV | | fixture_cm_max | Maximum residual common-mode AC drive | V | Measurement-validity check, 0–1 uV | -All measurements must be finite and complete. Nonnegative supply power and -absolute-error/range values follow their physical domains. The common-mode fixture -bound verifies the differential excitation, not DUT common-mode regulation. The -DC feedback bound rejects a failed bias-isolation solve. Both checks fail the -source or candidate simulation before scoring. These -are the only electrical hard bounds; upstream paper targets are not gates. -Window errors and ripple do not assert settled operation or periodic steady state. -No phase margin, unity crossing, settling time, CMRR, noise, PVT or mismatch is claimed. +All measurements must be finite and complete. Supply power, absolute errors and amplitude ranges must obey their nonnegative physical definitions. The common-mode test-apparatus bound validates differential excitation, rather than DUT common-mode regulation. The DC feedback bound excludes failure of the isolated bias solve. Both apparatus checks apply to source and candidate simulation before scoring. These are this task's hard electrical requirements; upstream paper targets are not acceptance bounds. Window error and ripple do not establish settling or periodic steady state; no phase margin, unity-gain crossing, settling time, CMRR, noise, PVT or mismatch performance is claimed. Quality uses independently simulated same-condition source observations. For gain, q=10^((candidate−source)/20); target q=1/(1+abs(candidate−source)/scale); @@ -112,10 +92,9 @@ for resistor contact/routing envelopes (sheet resistance 1360 ohm), then apply a 50% global routing allowance. This is an engineering estimate, not a foundry minimum. Coefficient 8: Active auxiliary current feedback, cascoded bias, and two interacting compensation paths affect finite-window recovery and frequency response. - ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -135,9 +114,4 @@ Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer Solve budget: **8 hours**. -Use the reviewed IHP SG13G2 resources and the ngspice 45 tools environment. -The runtime `/protocol/task.json` supplies frozen requirements and resource bindings. -Submit `/workspace/output/final.gds` through the session's explicit submission tool; -writing a file alone does not submit it. Evaluation performs artifact, native -DRC/LVS, geometry, candidate RC, independent source and post-layout simulation. -The source baseline, witness and authoring repository are not solver inputs. +Use reviewed IHP SG13G2 resources and the ngspice 45 environment; see `/protocol/task.json` for frozen requirements and resource bindings. Explicitly submit `/workspace/output/final.gds` through the session tool; writing a file alone is insufficient. Evaluation checks files, native DRC/LVS, geometry, candidate RC, independent source simulation and post-layout simulation; source baselines, reference solutions and the author repository are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/case.toml index 0a5e9356d8d3721dbd7eda49df9945c530fb7045..dd8bbf42452e4cf7c450423518fe36e888725e56 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_012_peng_tcfc" title = "Auxiliary Source-Driven Output-Control OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "d7824d0f1d07f46520fb359dc7dde47bd5fecbf3c14d36ce34ae3c63e64b248f" +sha256 = "e2aa03430577486bb4ab3cff663970c0616cd2f736ba111af9b4b7fb18dd3d79" [[assets]] path = "reference/amp_012_peng_tcfc.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-amp_012_peng_tcfc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "d413cbc5320f7ee3ccacd40aa9407e94b8ca6b8098948ec944a2353a7aa9c0e3" +sha256 = "3ac44eae2237b0ac994525fc1e56422853206c8cab427a2a261ca7e5642ec40f" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "5d1695a711afd0ce2ecc5a85c10c5c4cb632b5771cc6b7963d4993e28a1edba9" subcircuit = "amp_012_peng_tcfc" +sha256 = "5d1695a711afd0ce2ecc5a85c10c5c4cb632b5771cc6b7963d4993e28a1edba9" [task.inputs.performance] path = "materials/testbench.spice" @@ -657,8 +657,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_error_v" @@ -683,10 +686,13 @@ baseline = [ "source_condition_4:output_error_v", "source_condition_5:output_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "bias_v" category = "performance" @@ -712,8 +718,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -739,9 +748,12 @@ baseline = [ "source_condition_5:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -791,7 +803,10 @@ baseline = [ "source_condition_5:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -818,8 +833,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "final_unity_hz" @@ -845,7 +863,10 @@ baseline = [ "source_condition_5:final_unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "final_phase_margin_deg" @@ -872,8 +893,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "minimum_return_distance" @@ -900,7 +924,10 @@ baseline = [ ] normalization = "target" scale = 1.0 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "return_phase_excursion_deg" @@ -926,9 +953,12 @@ baseline = [ "source_condition_5:return_phase_excursion_deg", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "hf_gain_db" category = "performance" @@ -977,10 +1007,13 @@ baseline = [ "source_condition_4:recovery_up_v", "source_condition_5:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -1004,10 +1037,13 @@ baseline = [ "source_condition_4:recovery_down_v", "source_condition_5:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -1058,9 +1094,12 @@ baseline = [ "source_condition_5:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -1086,8 +1125,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -1114,14 +1156,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "3aaf8d66db508f4da961413a6d1bbeb8d7a6e04a78882972e84c36bc3549ea46" +source_report_sha256 = "e8b9d8481f7fffc86c2d89f808c364dd6bb829c90d5e142fb66a97ddb67903df" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"8da98c6dfbed072f5f408799e52bfa3710e109b6a22a50c8f3c057f9f402afc6\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1242,6 +1287,12 @@ unit = "V" value = 369038.2 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "00e36142adaf44e7a5bedbfd7b5ba7451ba62259394be0875a5b78f932a49eaf" +ac = "2ec6ac215d65378128b643ed2088e5252c134c9b58b62fe9032cc7fea6099be1" +transient = "5d22b917fa6ba0f6fcd5376d187657a18999b8dc29b9aa0e1aadd8e45ddcae37" +voltage = "5e79d847740ebd851a9ec04fb6a80b272ea19b80eef314a0111587a4e8ec69f5" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1361,6 +1412,12 @@ unit = "V" value = 382006.8 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "00e36142adaf44e7a5bedbfd7b5ba7451ba62259394be0875a5b78f932a49eaf" +ac = "65ae6e33acf92df3387b9ca87262467636e01bb12c050b392f5fe96abbb2f1d3" +transient = "351f43b2f6da4b1ddf8d0832aa696caa299a7f0dc8e0263ff5c506ec261d9b08" +voltage = "78a8b2c460d270a6496cb603c6fdc3ebdb3e890b9dac557d6d7f2bdc33df9c48" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1480,6 +1537,12 @@ unit = "V" value = 398205.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "00e36142adaf44e7a5bedbfd7b5ba7451ba62259394be0875a5b78f932a49eaf" +ac = "7baa91f9a54ee22761bbac4c86e466d0d58d46aee0b3ebc2bee39527aee6d742" +transient = "6a5085016afd117d2b6efc8c6a2062ffd90de4cfa895a42201d32a9a9bef6201" +voltage = "66c43c0fa2892d47bc342b332b046001bd65c7f26834702194f9d1f2d1906ee5" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1599,6 +1662,12 @@ unit = "V" value = 366723.5 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "70da35e9a311b05761a5c2856ae58caba87dfa070c090cbe1fa7da4e1f80da41" +ac = "bd99ddba72aef59bd05c28a5e8c3911b84a0bdd86054e40795b0f37a7dcdc209" +transient = "5d22b917fa6ba0f6fcd5376d187657a18999b8dc29b9aa0e1aadd8e45ddcae37" +voltage = "cdf857d54949d3be9009ffa74ed3919d49c3fe7e812ae0e4c08404d1e8908784" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1718,6 +1787,12 @@ unit = "V" value = 379512.4 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "70da35e9a311b05761a5c2856ae58caba87dfa070c090cbe1fa7da4e1f80da41" +ac = "36b9564f38f85e964a3935cdd1f315a9edcd6e476b2f2981cba8fea1a12c2d25" +transient = "351f43b2f6da4b1ddf8d0832aa696caa299a7f0dc8e0263ff5c506ec261d9b08" +voltage = "73c2b5c2e7dffb6d018146e5d3006996301ae9e7a945752a041ddd3a777899fa" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1837,6 +1912,12 @@ unit = "V" value = 395477.9 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "70da35e9a311b05761a5c2856ae58caba87dfa070c090cbe1fa7da4e1f80da41" +ac = "5b9b49ea97b0e6fe3ac25585465f54fcb6b9bf0d26e138c77fd716304f1ac433" +transient = "6a5085016afd117d2b6efc8c6a2062ffd90de4cfa895a42201d32a9a9bef6201" +voltage = "4b8201b4d14e0593aa26de5a10ac19c583de8ab011d6994b2594788cff32c479" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1849,7 +1930,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1860,7 +1941,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1873,7 +1954,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1886,7 +1967,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1906,7 +1987,7 @@ label_layers = [ type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1916,7 +1997,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/materials/schematic.svg index 68071fbaa028842cc614284957b0b43965eac96b..414b5439cecb4e6b54a103333f2f072808e4d05f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/materials/schematic.svg @@ -1 +1,2 @@ -amp_012_peng_tcfc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_012_peng_tcfc", "netlist_sha256": "5d1695a711afd0ce2ecc5a85c10c5c4cb632b5771cc6b7963d4993e28a1edba9", "project_sha256": "62401e5f25b213b5333fb1f06ef4a70787fdf93b9b1529b7413a778dea45799b", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_012_peng_tcfc", "Bank1_20x_ntap1", "Bank2_45x_ptap1"], "banks": [{"name": "Bank1_20x_ntap1", "count": 20, "model": "ntap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank2_45x_ptap1", "count": 45, "model": "ptap1", "params": {"a": "4e-12", "p": "8e-6"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_012_peng_tcfcvddwell_vddvsssubvinnvinpvddvoutpnet31vb3vb4vssdm_2net063voutnvoutpvb1vb2vddnet049net10vssnet043vb2net6voutpvddvb3net56net10vssnet7voutnet6net2net3net8net54vssvb2vb4vddvb3vb1net31vb1net56vb3vddvb4vssnet9vb2voutpnet049net10voutvddwell_vddvsssubnet31well_net31vssvddvinnvinpvoutvb1amp_012_peng_tcfcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM55.76/4.94MM65.76/4.94MM85.5/2.06 ×4MM95.5/2.06 ×4MM156.84/0.43 ×8MM166.84/0.43 ×8MM196.84/0.43 ×8MM206.84/0.43 ×8MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM107.83/0.75 ×4MM78.64/4.94 ×8MM668.64/4.94 ×8MM709.3/9.14 ×2MM699.3/9.14 ×2P bulk → well_vddN bulk → sub03 Output / local feedbackMM615.76/4.94MM119.06/0.54 ×4MM136.84/0.43 ×4MM235.58/0.61 ×2P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM05.76/4.94MM15.76/4.94MM25.76/4.94MM35.76/4.94MM575.76/4.94MM585.76/4.94MM625.76/4.94MM126.84/0.43 ×4MM146.84/0.43MM176.84/0.43 ×4P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM45.76/4.94 ×2MM651.44/4.94MM186.84/0.43 ×4MM636.84/0.43 ×4MM646.84/0.43 ×4P bulk → well_vddN bulk → sub06 Compensation and signal passivesCC0_035.3/35.3CC1_041.2/41.2CCLOCAL_051.6/51.607 Substrate contacts / repeated banksRRtap_net31_0A=4 µm²RRtap_net31_1A=4 µm²RRtap_net31_2A=4 µm²RRtap_net31_3A=4 µm²XBANK1Bank1_20x_ntap1XBANK2Bank2_45x_ptap1Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · cap_cmim \ No newline at end of file +amp_012_peng_tcfc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_012_peng_tcfc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_012_peng_tcfc","Bank1_20x_ntap1","Bank2_45x_ptap1"],"banks":[{"name":"Bank1_20x_ntap1","count":20,"model":"ntap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank2_45x_ptap1","count":45,"model":"ptap1","params":{"a":"4e-12","p":"8e-6"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_012_peng_tcfc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/design/amp_012_peng_tcfc.icproj.json"}}Main-sheet overview; 2 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_012_peng_tcfcvddwell_vddvsssubvinnvinpvddvoutpnet31vb3vb4vssdm_2net063voutnvoutpvb1vb2vddnet049net10vssnet043vb2net6voutpvddvb3net56net10vssnet7voutnet6net2net3net8net54vssvb2vb4vddvb3vb1net31vb1net56vb3vddvb4vssnet9vb2voutpnet049net10voutvddwell_vddvsssubnet31well_net31vssvddvinnvinpvoutvb1amp_012_peng_tcfcihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresDifferential input and folded branchesMM55.76/4.94MM65.76/4.94MM85.5/2.06 ×4MM95.5/2.06 ×4MM156.84/0.43 ×8MM166.84/0.43 ×8MM196.84/0.43 ×8MM206.84/0.43 ×8MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subIntermediate gainMM107.83/0.75 ×4MM78.64/4.94 ×8MM668.64/4.94 ×8MM709.3/9.14 ×2MM699.3/9.14 ×2P bulk → well_vddN bulk → subOutput stageMM615.76/4.94MM119.06/0.54 ×4MM136.84/0.43 ×4MM235.58/0.61 ×2P bulk → well_vddN bulk → subTail-current biasMM05.76/4.94MM15.76/4.94MM25.76/4.94MM35.76/4.94MM575.76/4.94MM585.76/4.94MM625.76/4.94MM126.84/0.43 ×4MM146.84/0.43MM176.84/0.43 ×4P bulk → well_vddN bulk → subBias networkMM45.76/4.94 ×2MM651.44/4.94MM186.84/0.43 ×4MM636.84/0.43 ×4MM646.84/0.43 ×4P bulk → well_vddN bulk → subCompensation capacitorsCC0_035.3/35.3CC1_041.2/41.2CCLOCAL_051.6/51.6Bulk ties and device banksRRtap_net31_0A=4 µm²RRtap_net31_1A=4 µm²RRtap_net31_2A=4 µm²RRtap_net31_3A=4 µm²XBANK1Bank1_20x_ntap1XBANK2Bank2_45x_ptap1Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · cap_cmim + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/problem.md index cde7c05585539778da24c11a19e9f55a64a2f716..a4631bbc93bac9758f1379faea7782b035f21139 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_012_peng_tcfc/problem.md @@ -12,8 +12,8 @@ source-driven auxiliary PMOS and a separate `net10` control node. ## Inputs and Interface -- `materials/circuit.cdl`: authoritative native physical graph. -- `materials/circuit.spice`: equivalent simulator graph with finite body taps. +- `materials/circuit.cdl`: authoritative native physical connectivity. +- `materials/circuit.spice`: equivalent simulation connectivity including finite body contacts. - `materials/testbench.spice`: DC, bilateral-loop and sustained-step measurements. Ordered ports: `vss vdd vinn vinp vout vb1`. VSS/VDD are return/supply; @@ -23,11 +23,7 @@ connects to the external bias sink. Input PMOS bodies use the separate Preserve all 32 MOS groups, 108 physical fingers, W/L/m, every body connection and all physical passive devices. -MOS dimensions are rounded to the 10 nm physical grid. Parallel regrouping -within each original group preserves its rounded total W and L, with at most -10 um single-finger width; individual width/multiplicity and diffusion perimeter -change. Distributed 2 × 2 um body contacts have at most 20 um pitch. -All internal capacitors use `cap_cmim`: +MOS dimensions are rounded to the 10 nm physical grid. Parallel regrouping within each original group preserves rounded total W and L, with each finger at most 10 um wide; individual widths/multiplicities and diffusion perimeters change accordingly. Distributed 2 × 2 um body contacts have spacing at most 20 um. All internal capacitors use `cap_cmim`: - `c0`: `voutp` (top) to `vout` (bottom), 1 parallel 35.325 × 35.325 um MIM units. - `c1`: `net049` (top) to `vout` (bottom), 1 parallel 41.2 × 41.2 um MIM units. @@ -46,34 +42,11 @@ Use typical IHP LV MOS/MIM/poly models at 27 C and VDD=1.2 V, with a 5/10/15 pF load and 0.5/0.7 V DC input must pass. These external loads are additional to every internal capacitor above. -A zero-volt source connects VINN (`vm`) to VOUT. VINP is AC ground. -Use series voltage and parallel current injection at that boundary, retaining -the complete DUT and loading. With voltage-injection `b=-I(VPROBE)`, -`d=V(vm)` and current-injection `a=-I(VPROBE)`, `c=V(vm)`, set -`delta=a*d-b*c` and `T=(2*delta-a+d)/(1-2*delta+a-d)` (Tian Eq. 30). -Both raw injections are exported for independent Y-matrix reconstruction. -Sweep 0.01 Hz–10 GHz at 300 points/decade. Continuous phase uses its natural -low-frequency branch without an offset correction. Check first and final -descending unity crossings, minimum sampled `abs(1+T)`, maximum absolute -continuous phase of `1+T` across the entire sweep, and gain over 2–10 GHz. -A good first crossover alone cannot establish acceptance. - -VINP pulses 0.5→0.7→0.5 V with 20 ns edges, rising at 2 us and falling -at 20.02 us, period 100 us. Transient starts at its own pulse-start operating -point, independently of the AC DC-input setting. Simulate 0–40 us with Gear2, -2 ns maximum step, KLU, `itl4=1000`, `rshunt=1e12`, `reltol=1e-5`, -`abstol=1e-12`, `vntol=1e-8`. The numerical shunt is not a physical device. -Qualification also checks half step, tighter tolerances/dense AC, trapezoidal -integration, long tails and finite stimulus/load boundaries. -These are finite external-loop and observable-recovery requirements, not an -internal pole inventory, arbitrary-load stability, PVT, noise, mismatch, -distortion, rail-to-rail behavior or supply-startup qualification. - -First and final crossing phase margins must both lie in [0, 180] degrees. -Minimum return distance and return-phase excursion have only nonnegative -domain bounds; high-frequency gain has no acceptance bound. These full-sweep -metrics affect continuous quality without adding a stability acceptance screen. -Missing crossings or invalid observations are evaluator errors. +A zero-volt source connects VINN (`vm`) to VOUT, while VINP is AC ground. Insert series voltage injection and parallel current injection at this boundary, retaining the complete DUT and load. Voltage injection uses `b=-I(VPROBE)`, `d=V(vm)`; current injection uses `a=-I(VPROBE)`, `c=V(vm)`; `delta=a*d-b*c`, `T=(2*delta-a+d)/(1-2*delta+a-d)` (Tian expression 30). Export both raw injections to independently reconstruct the Y matrix. Sweep 300 points per decade from 0.01 Hz to 10 GHz; continuous phase follows the natural low-frequency branch without offset correction. Check first and last descending unity-gain crossings, full-sweep minimum sampled `abs(1+T)`, maximum absolute continuous phase over `1+T`, and gain over 2–10 GHz; a good first crossing alone is insufficient. + +VINP is a 0.5→0.7→0.5 V pulse with 20 ns edges, rising at 2 us and falling at 20.02 us with period 100 us. Transient starts at its own initial-pulse operating point, independently of the AC DC-input setting. Simulate 0–40 us with Gear2, maximum step 2 ns, KLU, `itl4=1000`, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-12`, `vntol=1e-8`; numerical shunts are not physical devices. Verification also covers half steps, tighter tolerances/denser AC, trapezoidal integration, long tails and finite excitation/load boundaries. These finite outer-loop and recovery observations do not prove internal poles, stability under arbitrary loads, PVT, noise, mismatch, distortion, rail-to-rail operation or power-up startup performance. + +The phase margins at the first and last crossings must both lie within [0, 180] degrees. Minimum return distance and return-phase excursion need only be nonnegative; high-frequency gain has no acceptance threshold. These full-sweep metrics affect continuous quality without adding stability acceptance conditions. Missing crossings or invalid observations are evaluation errors. ## Physical Requirements @@ -92,49 +65,26 @@ physical tap models. Distributed substrate resistance/noise and fabrication signoff remain unqualified. The long independent witness is a feasibility layout, not an area optimum. - ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`output_error_v`, `recovery_up_v`, `recovery_down_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source-equivalent error gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning. Normalize each condition before taking the worst quality; other normalization and functional rules follow their own declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | -| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | bias | +| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | bias | | `bias_v` | DC operating point: `v(vb1)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dc_gain_db` | AC: Value of `(db((T))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | @@ -145,22 +95,20 @@ source condition; a group uses its worst paired quality. | `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 10g`. | 1 | target / target | 0 … +∞ | 1.0 | response | | `return_phase_excursion_deg` | AC: `vecmax(abs(180*cph(1+(T))/pi))`; sweep `dec 300 0.01 10g`. | deg | minimize / ratio | 0 … +∞ | 1e-12 | response | | `hf_gain_db` | AC: Maximum of `(db((T))) from=2g to=10g`. | dB | minimize / db20 | −∞ … +∞ | — | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=15u to=19u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=30u to=39u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=15u to=19u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=30u to=39u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=18u to=19u)-(avg v(vout) from=38u to=39u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=40u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=20u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=20.04u to=40u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **14710.04 um2**. 180 expanded device instances; sum of device/contact envelopes 9648.5648 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **14710.04 um2**. The expanded circuit has 180 device instances, a sum of device/contact envelopes 9648.5648 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24.5%; gain and bandwidth 12.3%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Multiple-crossing feedback amplifier: loaded recovery 28.6%, loop stability 24.5%, gain and bandwidth 12.3%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -188,8 +136,4 @@ Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24. Solve budget: **3 hours**. -Discover inputs/resources/feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness. Host configuration, source records -and reference answers remain outside solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`. Use supplied IHP primitives and KLayout, Magic and ngspice; explicitly submit after writing `/workspace/output/final.gds`. Host configuration, source records and reference solutions are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/case.toml index 45e4b6aa396da7c6f034c4fb6ba0cc2ac02e50a7..506913836d6ccb044a3bf5ed28f7685f24656cd1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_013_qu2017_azc" title = "Qu AZC Three-Stage Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "de9174b5f1c0c5f1d832cda856a0f9c8fac3ab2f08190f9c43bb849e2b25a5a1" +sha256 = "df99e8e154f6d2e13707f707f2d7a656ea5493085068be197198cae52dbed55e" [[assets]] path = "reference/amp_013_qu2017_azc.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "9a4a1dd726e9b63fab7ebb66d647f79ae02f9cf347c52eefe1f3682a76360879" +sha256 = "2270686e30b94f981b2fee7ff05c987a07897d4dd178b4bc243ca42a0cbbb341" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "482f6b9455334bd331c08b6de22220b5256182a28ee463283da40ab2867df6a6" subcircuit = "amp_013_qu2017_azc" +sha256 = "482f6b9455334bd331c08b6de22220b5256182a28ee463283da40ab2867df6a6" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "63f1c84d74c2ec03057cf2ab513dfbbc173266fc403a331981deaa66e6e33551" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "a9aab15238ad36e6859a9d7128ab53670fbd9b7185d337ef773257cad65b679d" +sha256 = "c160b300a8f070147997df2a000cbfd7ef09ffe28ce93aa2b4d5d33a828d00ff" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "9dd7490b6a05a1962b7f1883d9cb5f35148a30091e673a6452ae3ad0d60152a9" +sha256 = "758aa46451c448bb5ea8b6fcbcd40695197aafcfa5df33384de2ddc79eb2ebf1" [task.constraints] quality = [ @@ -447,7 +447,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -456,6 +455,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -506,11 +509,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:late_error_v", @@ -519,15 +521,18 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -536,15 +541,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -553,15 +561,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -570,6 +581,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -578,7 +593,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -587,6 +601,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -642,30 +660,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [task.evaluation.pre_layout] -source_report_sha256 = "26e39011793e0e622faaa1312fae60e7e0e9fa68061a51dc994f4a80c04bbf71" +source_report_sha256 = "105e0e26ab525de12941a695279c8a98d4d66febfa49db7b5bf5b5f987db7f5a" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"ddcafddef43eaf1e0900e39cb7fbdf01188b1c097813127f096d2efea2650de3\", \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -704,7 +728,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "a9aab15238ad36e6859a9d7128ab53670fbd9b7185d337ef773257cad65b679d" +deck = "c160b300a8f070147997df2a000cbfd7ef09ffe28ce93aa2b4d5d33a828d00ff" dut = "63f1c84d74c2ec03057cf2ab513dfbbc173266fc403a331981deaa66e6e33551" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -759,6 +783,11 @@ unit = "V" value = 0.1068905197572205 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "277023e2145aba32ef850c096695b2e65593c38b53d97c0687814c6af8ace460" +ac = "3daef6f7893ad6dc980b07cdafffbe768c840639d13cb549c4d0b1b60697d862" +transient = "2b1b21a6e906f221a52471196a04c92b1821cd9c0f5015b35b970d7a09516d43" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -784,7 +813,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "9dd7490b6a05a1962b7f1883d9cb5f35148a30091e673a6452ae3ad0d60152a9" +deck = "758aa46451c448bb5ea8b6fcbcd40695197aafcfa5df33384de2ddc79eb2ebf1" dut = "63f1c84d74c2ec03057cf2ab513dfbbc173266fc403a331981deaa66e6e33551" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dc_feedback_error_v] @@ -803,6 +832,10 @@ unit = "dB" value = 79.63834 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "4d518c78bdb66e730bd4a5713638c3aedb2dbce43a91a5c708c40a96ebdf2f66" +ac = "4ba69474fd966c7506aa6e10e4f40fd5f0c2f2bd643613693155cd26ae9998a6" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -815,7 +848,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -826,7 +859,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -839,7 +872,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -852,7 +885,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -864,7 +897,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -874,7 +907,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 1800 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/ac.spice index 134b8677f5fbbc9cae3d09480efe9200dd3a89ff..096e54dbf3084ff69b2ccfee427e627e6d3c79ad 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/ac.spice @@ -17,7 +17,6 @@ XDUT 0 vdd vm vp vout net1 amp_013_qu2017_azc CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 op let dc_feedback_error_v=abs(v(vout)-v(vm)) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/schematic.svg index 9b5792f9e2fe6ec86efff2f95b514881e2071e48..ef7d128393aed82d40202a045ac71ff10af81f64 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_013_qu2017_azc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_013_qu2017_azc","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/circuit.cdl","netlist_sha256":"482f6b9455334bd331c08b6de22220b5256182a28ee463283da40ab2867df6a6","project_sha256":"1d52fe694c8ca3c9a66b11289641354a4e3263fd76f0c1090e24fe1d4386edd1","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_013_qu2017_azc","MM0_bank1","MM1_bank2","MM10_bank3","MM11_bank4","MM12_bank5","MM13_bank6","MM14_bank7","MM15_bank8","MM16_bank9","MM17_bank10","MM18_bank11","MM19_bank12","MM2_bank13","MM20_bank14","MM21_bank15","MM22_bank16","MM23_bank17","MM24_bank18","MM3_bank19","MM4_bank20","MM5_bank21","MM6_bank22","MM7_bank23","MM8_bank24","MM9_bank25","XRT16_bank26_page1","XRT16_bank26_page2","XRT16_bank26"],"banks":[{"name":"MM0_bank1","devices":8,"source_references":["RT0","MM0_0","RT1","MM0_1","RT2","MM0_2","RT3","MM0_3"]},{"name":"MM1_bank2","devices":8,"source_references":["RT4","MM1_0","RT5","MM1_1","RT6","MM1_2","RT7","MM1_3"]},{"name":"MM10_bank3","devices":8,"source_references":["RT8","MM10_0","RT9","MM10_1","RT10","MM10_2","RT11","MM10_3"]},{"name":"MM11_bank4","devices":8,"source_references":["RT12","MM11_0","RT13","MM11_1","RT14","MM11_2","RT15","MM11_3"]},{"name":"MM12_bank5","devices":4,"source_references":["MM12_0","MM12_1","MM12_2","MM12_3"]},{"name":"MM13_bank6","devices":8,"source_references":["RT20","MM13_0","RT21","MM13_1","RT22","MM13_2","RT23","MM13_3"]},{"name":"MM14_bank7","devices":4,"source_references":["MM14_0","MM14_1","MM14_2","MM14_3"]},{"name":"MM15_bank8","devices":4,"source_references":["MM15_0","MM15_1","MM15_2","MM15_3"]},{"name":"MM16_bank9","devices":4,"source_references":["MM16_0","MM16_1","MM16_2","MM16_3"]},{"name":"MM17_bank10","devices":4,"source_references":["MM17_0","MM17_1","MM17_2","MM17_3"]},{"name":"MM18_bank11","devices":4,"source_references":["MM18_0","MM18_1","MM18_2","MM18_3"]},{"name":"MM19_bank12","devices":4,"source_references":["MM19_0","MM19_1","MM19_2","MM19_3"]},{"name":"MM2_bank13","devices":16,"source_references":["RT48","MM2_0","RT49","MM2_1","RT50","MM2_2","RT51","MM2_3","RT52","MM2_4","RT53","MM2_5","RT54","MM2_6","RT55","MM2_7"]},{"name":"MM20_bank14","devices":4,"source_references":["MM20_0","MM20_1","MM20_2","MM20_3"]},{"name":"MM21_bank15","devices":4,"source_references":["MM21_0","MM21_1","MM21_2","MM21_3"]},{"name":"MM22_bank16","devices":16,"source_references":["MM22_0","MM22_1","MM22_2","MM22_3","MM22_4","MM22_5","MM22_6","MM22_7","MM22_8","MM22_9","MM22_10","MM22_11","MM22_12","MM22_13","MM22_14","MM22_15"]},{"name":"MM23_bank17","devices":12,"source_references":["MM23_0","MM23_1","MM23_2","MM23_3","MM23_4","MM23_5","MM23_6","MM23_7","MM23_8","MM23_9","MM23_10","MM23_11"]},{"name":"MM24_bank18","devices":4,"source_references":["MM24_0","MM24_1","MM24_2","MM24_3"]},{"name":"MM3_bank19","devices":48,"source_references":["RT96","MM3_0","RT97","MM3_1","RT98","MM3_2","RT99","MM3_3","RT100","MM3_4","RT101","MM3_5","RT102","MM3_6","RT103","MM3_7","RT104","MM3_8","RT105","MM3_9","RT106","MM3_10","RT107","MM3_11","RT108","MM3_12","RT109","MM3_13","RT110","MM3_14","RT111","MM3_15","RT112","MM3_16","RT113","MM3_17","RT114","MM3_18","RT115","MM3_19","RT116","MM3_20","RT117","MM3_21","RT118","MM3_22","RT119","MM3_23"]},{"name":"MM4_bank20","devices":8,"source_references":["RT120","MM4_0","RT121","MM4_1","RT122","MM4_2","RT123","MM4_3"]},{"name":"MM5_bank21","devices":8,"source_references":["RT124","MM5_0","RT125","MM5_1","RT126","MM5_2","RT127","MM5_3"]},{"name":"MM6_bank22","devices":8,"source_references":["RT128","MM6_0","RT129","MM6_1","RT130","MM6_2","RT131","MM6_3"]},{"name":"MM7_bank23","devices":16,"source_references":["RT132","MM7_0","RT133","MM7_1","RT134","MM7_2","RT135","MM7_3","RT136","MM7_4","RT137","MM7_5","RT138","MM7_6","RT139","MM7_7"]},{"name":"MM8_bank24","devices":16,"source_references":["RT140","MM8_0","RT141","MM8_1","RT142","MM8_2","RT143","MM8_3","RT144","MM8_4","RT145","MM8_5","RT146","MM8_6","RT147","MM8_7"]},{"name":"MM9_bank25","devices":8,"source_references":["RT148","MM9_0","RT149","MM9_1","RT150","MM9_2","RT151","MM9_3"]},{"name":"XRT16_bank26","devices":69,"source_references":["RT16","RT17","RT18","RT19","RT24","RT25","RT26","RT27","RT28","RT29","RT30","RT31","RT32","RT33","RT34","RT35","RT36","RT37","RT38","RT39","RT40","RT41","RT42","RT43","RT44","RT45","RT46","RT47","RT56","RT57","RT58","RT59","RT60","RT61","RT62","RT63","RT64","RT65","RT66","RT67","RT68","RT69","RT70","RT71","RT72","RT73","RT74","RT75","RT76","RT77","RT78","RT79","RT80","RT81","RT82","RT83","RT84","RT85","RT86","RT87","RT88","RT89","RT90","RT91","RT92","RT93","RT94","RT95","RTSUB"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":5},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_013_qu2017_azc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/schematic/amp_013_qu2017_azc.icproj.json"}}Main-sheet overview; 28 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_013_qu2017_azcvddvb1vb4vddvb1net049vddvb1net078vssnet063subnet082vddvb1vddvoutnvsssubnet049net057vddnet055net057vssvb4subdm_2net063net050subnet082vddnet094net050vinpnet019net063vsssubvddvb1net019vssvoutsubnet049vddvoutnet050vddnet055vssnet094subnet055vsssubnet057net043vssvb4subvssvb4net063subvinnnet019dm_2vssnet094subnet051vddnet050voutnvsssubnet077dm_2subvoutnnet077dm_2R2_s1net057net043vddvb1vddnet063vb1vb4vinpnet019net063vddnet094net050vssnet094subnet055vddvoutnet050subvssvoutnnet077dm_2net063net050subnet082vsssubnet051net077dm_2vssnet063subnet082vssvoutsubnet049vssvb4subvddvb1net019vssvssvb4subdm_2vssvb4net063subvssnet094net043subnet051vsssubnet057net043vsssubnet049net057vddvb1net078vddvoutnvddnet077net050voutnvddnet055vddnet055net057vddnet078vb1net049vinnnet019dm_2vsssubvssvddvinnvinpvoutvb1net082net078net057R2_s1voutnet051amp_013_qu2017_azcEqual net labels connect. All source devices and exact parameters are retained.C0_0cap_cmimw=23.18u l=23.18um=1C1_0cap_cmimw=16.36u l=16.36um=1C2_0cap_cmimw=14.32u l=14.32um=1RR0_0rhighw=.5u l=11.73um=1 b=0Substrate: B=subRR1_0rhighw=.5u l=11.73um=1 b=0Substrate: B=subRR2_0rhighw=.5u l=59.08um=1 b=0Substrate: B=subRR2_1rhighw=.5u l=59.08um=1 b=0Substrate: B=subRR3_0rhighw=.5u l=13.42um=1 b=0Substrate: B=subXMM0_bank1MM0_bank1XMM1_bank2MM1_bank2XMM10_bank3MM10_bank3XMM11_bank4MM11_bank4XMM12_bank5MM12_bank5XMM13_bank6MM13_bank6XMM14_bank7MM14_bank7XMM15_bank8MM15_bank8XMM16_bank9MM16_bank9XMM17_bank10MM17_bank10XMM18_bank11MM18_bank11XMM19_bank12MM19_bank12XMM2_bank13MM2_bank13XMM20_bank14MM20_bank14XMM21_bank15MM21_bank15XMM22_bank16MM22_bank16XMM23_bank17MM23_bank17XMM24_bank18MM24_bank18XMM3_bank19MM3_bank19XMM4_bank20MM4_bank20XMM5_bank21MM5_bank21XMM6_bank22MM6_bank22XMM7_bank23MM7_bank23XMM8_bank24MM8_bank24XMM9_bank25MM9_bank25XXRT16_bank26XRT16_bank26 -Main-sheet overview; 28 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_013_qu2017_azc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_013_qu2017_azc","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_013_qu2017_azc","MM0_bank1","MM1_bank2","MM10_bank3","MM11_bank4","MM12_bank5","MM13_bank6","MM14_bank7","MM15_bank8","MM16_bank9","MM17_bank10","MM18_bank11","MM19_bank12","MM2_bank13","MM20_bank14","MM21_bank15","MM22_bank16","MM23_bank17","MM24_bank18","MM3_bank19","MM4_bank20","MM5_bank21","MM6_bank22","MM7_bank23","MM8_bank24","MM9_bank25","XRT16_bank26_devices_0001-0069","XRT16_bank26"],"banks":[{"name":"MM0_bank1","devices":8,"source_references":["RT0","MM0_0","RT1","MM0_1","RT2","MM0_2","RT3","MM0_3"]},{"name":"MM1_bank2","devices":8,"source_references":["RT4","MM1_0","RT5","MM1_1","RT6","MM1_2","RT7","MM1_3"]},{"name":"MM10_bank3","devices":8,"source_references":["RT8","MM10_0","RT9","MM10_1","RT10","MM10_2","RT11","MM10_3"]},{"name":"MM11_bank4","devices":8,"source_references":["RT12","MM11_0","RT13","MM11_1","RT14","MM11_2","RT15","MM11_3"]},{"name":"MM12_bank5","devices":4,"source_references":["MM12_0","MM12_1","MM12_2","MM12_3"]},{"name":"MM13_bank6","devices":8,"source_references":["RT20","MM13_0","RT21","MM13_1","RT22","MM13_2","RT23","MM13_3"]},{"name":"MM14_bank7","devices":4,"source_references":["MM14_0","MM14_1","MM14_2","MM14_3"]},{"name":"MM15_bank8","devices":4,"source_references":["MM15_0","MM15_1","MM15_2","MM15_3"]},{"name":"MM16_bank9","devices":4,"source_references":["MM16_0","MM16_1","MM16_2","MM16_3"]},{"name":"MM17_bank10","devices":4,"source_references":["MM17_0","MM17_1","MM17_2","MM17_3"]},{"name":"MM18_bank11","devices":4,"source_references":["MM18_0","MM18_1","MM18_2","MM18_3"]},{"name":"MM19_bank12","devices":4,"source_references":["MM19_0","MM19_1","MM19_2","MM19_3"]},{"name":"MM2_bank13","devices":16,"source_references":["RT48","MM2_0","RT49","MM2_1","RT50","MM2_2","RT51","MM2_3","RT52","MM2_4","RT53","MM2_5","RT54","MM2_6","RT55","MM2_7"]},{"name":"MM20_bank14","devices":4,"source_references":["MM20_0","MM20_1","MM20_2","MM20_3"]},{"name":"MM21_bank15","devices":4,"source_references":["MM21_0","MM21_1","MM21_2","MM21_3"]},{"name":"MM22_bank16","devices":16,"source_references":["MM22_0","MM22_1","MM22_2","MM22_3","MM22_4","MM22_5","MM22_6","MM22_7","MM22_8","MM22_9","MM22_10","MM22_11","MM22_12","MM22_13","MM22_14","MM22_15"]},{"name":"MM23_bank17","devices":12,"source_references":["MM23_0","MM23_1","MM23_2","MM23_3","MM23_4","MM23_5","MM23_6","MM23_7","MM23_8","MM23_9","MM23_10","MM23_11"]},{"name":"MM24_bank18","devices":4,"source_references":["MM24_0","MM24_1","MM24_2","MM24_3"]},{"name":"MM3_bank19","devices":48,"source_references":["RT96","MM3_0","RT97","MM3_1","RT98","MM3_2","RT99","MM3_3","RT100","MM3_4","RT101","MM3_5","RT102","MM3_6","RT103","MM3_7","RT104","MM3_8","RT105","MM3_9","RT106","MM3_10","RT107","MM3_11","RT108","MM3_12","RT109","MM3_13","RT110","MM3_14","RT111","MM3_15","RT112","MM3_16","RT113","MM3_17","RT114","MM3_18","RT115","MM3_19","RT116","MM3_20","RT117","MM3_21","RT118","MM3_22","RT119","MM3_23"]},{"name":"MM4_bank20","devices":8,"source_references":["RT120","MM4_0","RT121","MM4_1","RT122","MM4_2","RT123","MM4_3"]},{"name":"MM5_bank21","devices":8,"source_references":["RT124","MM5_0","RT125","MM5_1","RT126","MM5_2","RT127","MM5_3"]},{"name":"MM6_bank22","devices":8,"source_references":["RT128","MM6_0","RT129","MM6_1","RT130","MM6_2","RT131","MM6_3"]},{"name":"MM7_bank23","devices":16,"source_references":["RT132","MM7_0","RT133","MM7_1","RT134","MM7_2","RT135","MM7_3","RT136","MM7_4","RT137","MM7_5","RT138","MM7_6","RT139","MM7_7"]},{"name":"MM8_bank24","devices":16,"source_references":["RT140","MM8_0","RT141","MM8_1","RT142","MM8_2","RT143","MM8_3","RT144","MM8_4","RT145","MM8_5","RT146","MM8_6","RT147","MM8_7"]},{"name":"MM9_bank25","devices":8,"source_references":["RT148","MM9_0","RT149","MM9_1","RT150","MM9_2","RT151","MM9_3"]},{"name":"XRT16_bank26","devices":69,"source_references":["RT16","RT17","RT18","RT19","RT24","RT25","RT26","RT27","RT28","RT29","RT30","RT31","RT32","RT33","RT34","RT35","RT36","RT37","RT38","RT39","RT40","RT41","RT42","RT43","RT44","RT45","RT46","RT47","RT56","RT57","RT58","RT59","RT60","RT61","RT62","RT63","RT64","RT65","RT66","RT67","RT68","RT69","RT70","RT71","RT72","RT73","RT74","RT75","RT76","RT77","RT78","RT79","RT80","RT81","RT82","RT83","RT84","RT85","RT86","RT87","RT88","RT89","RT90","RT91","RT92","RT93","RT94","RT95","RTSUB"]}],"limitations":["The main sheet follows the circuit stages; repeated net names identify matching terminals within each sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Repeated source devices remain individually represented. Large banks use contiguous source-order detail ranges only where needed for responsive editing."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":5},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_013_qu2017_azc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/design/amp_013_qu2017_azc.icproj.json"}}Main-sheet overview; 27 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_013_qu2017_azcvddvb1vb4vddvb1net049vddvb1net078vssnet063subnet082vddvb1vddvoutnvsssubnet049net057vddnet055net057vssvb4subdm_2net063net050subnet082vddnet094net050vinpnet019net063vsssubvddvb1net019vssvoutsubnet049vddvoutnet050vddnet055vssnet094subnet055vsssubnet057net043vssvb4subvssvb4net063subvinnnet019dm_2vssnet094subnet051vddnet050voutnvsssubnet077dm_2subvoutnnet077dm_2vddvinnvinpvoutvoutvb1net063vssnet077net082net051net051net057net057net043net043net078net078R2_s1R2_s1vssvssamp_013_qu2017_azcXMM0_bank1XMM1_bank2XMM10_bank3XMM11_bank4XMM12_bank5XMM13_bank6XMM14_bank7XMM15_bank8XMM16_bank9XMM17_bank10XMM18_bank11XMM19_bank12XMM2_bank13XMM20_bank14XMM21_bank15XMM22_bank16XMM23_bank17XMM24_bank18XMM3_bank19XMM4_bank20XMM5_bank21XMM6_bank22XMM7_bank23XMM8_bank24XMM9_bank25XXRT16_bank26XC0_0 · cap_cmimXC1_0 · cap_cmimXC2_0 · cap_cmimXRR0_0 · rhighXRR1_0 · rhighXRR2_0 · rhighXRR2_1 · rhighXRR3_0 · rhigh + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/testbench.spice index 9c8c22153fd2701bf93dc474c84e8052cfbe3ae8..3917bd0cca74d6a5536f6d8b539409ea1f92060b 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/materials/testbench.spice @@ -14,7 +14,6 @@ XDUT 0 vdd vout vp vout net1 amp_013_qu2017_azc CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/problem.md index 5ecc93d86ef697fccafe81588006bd03fa2ac3e0..f827ed78c01f4cfb197aa065618de8fc934a101f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_013_qu2017_azc/problem.md @@ -6,7 +6,7 @@ Implement `amp_013_qu2017_azc` without changing the declared circuit. XM9/XM10 f ## Inputs and Interface -`materials/circuit.cdl` is the physical authority; `materials/circuit.spice` is its equivalent simulator representation. `materials/testbench.spice` and `materials/ac.spice` define the transient/closed-AC and balanced open-AC observations. This problem is the description input. The ordered interface is `vss vdd vinn vinp vout vb1`. `vss`/`vdd` are rails, input/output names are signal terminals, and the bias/reference and unloaded monitor ports retain the connections named in the netlist. Independent bias sources and loads belong outside the physical core. +`materials/circuit.cdl` is the authoritative physical circuit and `materials/circuit.spice` its equivalent simulation representation; `materials/testbench.spice` and `materials/ac.spice` define transient/closed-loop AC and balanced open-loop AC, respectively. This statement is the description input. Ordered interface is `vss vdd vinn vinp vout vb1`: `vss`/`vdd` are supply rails; all other signals, bias/reference and unloaded monitor ports retain netlist connections. Independent bias sources and loads remain outside the physical core. The integer-micrometre MOS dimensions are unchanged. Every resistor uses native rhigh segments of at most about 250 kOhm; every larger capacitor uses parallel native cap_cmim units of at most about 4 pF. Source simulation retains finite native body-tap models. Native LVS checks physical taps and body connectivity; Magic extraction idealizes well/substrate ties and does not retain their finite resistance. Distributed substrate behavior is outside this model boundary. @@ -14,44 +14,31 @@ The integer-micrometre MOS dimensions are unchanged. Every resistor uses native TT MOS, typical MIM/high-poly, 27 C, 1.5 V supply, 0.3 V input reference, 10 pF output load. The external current sink is i0 vb1 vss 1e-06. A direct unity follower receives a 100 mV step at 2 us with 100 ns edges and 8 us high width; falling starts at 10.1 us and completes at 10.2 us. Observe 0–20 us with 0.5 ns maximum step. Report high-window statistics at 8–10 us and return-window statistics at 18–20 us, not a settling time. The rail is adapted from the authored 1.8 V analysis to the actual IHP LV binding; no transistor sizing campaign is performed. -The transient deck directly connects vinn to vout. The frequency deck closes DC feedback through 1 TH, shunts its remote end by 1 F and injects +0.5/−0.5 V AC at the inputs. This isolates the DC feedback at every measured AC frequency. Residual AC common mode and DC feedback mismatch must each be at most 1 uV; open gain is never inferred from a nearly zero closed-loop input error. +The transient deck directly connects vinn to vout. The frequency-domain deck closes DC feedback through 1 TH, bypasses its far end to ground through 1 F and injects +0.5/−0.5 V AC at the inputs, isolating DC feedback at all measurement frequencies. AC common-mode residual and DC feedback error must both be at most 1 uV; do not infer open-loop gain from near-zero closed-loop input error. -Both decks sweep 1 Hz–1 GHz at 200 points/decade. AC describes the linearization of the verified DC point, not proof of a dynamically stable equilibrium. An explicit rshunt=1e12 (1 TOhm) numerical shunt to ground at each node regularizes otherwise floating extraction/series-capacitor nodes; source and candidate use the identical setting. Sensitivity is checked with 10 TOhm. Supply startup is not simulated: transient starts from the DC operating point, and the no-disturbance interval tests whether that point persists. Use the default sparse solver with the tolerances declared in the decks. +Both decks sweep 200 points per decade from 1 Hz to 1 GHz. AC linearizes a verified DC point and does not prove that equilibrium dynamically stable. Source and candidate both use `rshunt=1e12` (1 TOhm) numerical shunts from each node to ground to handle floating extracted/series-capacitor nodes; sensitivity is checked at 10 TOhm. Power-up startup is not simulated: transient starts at the DC point, and an undisturbed interval checks whether it persists. Use the default sparse solver and deck-declared tolerances. ## Physical Requirements Submit a native SG13G2 GDS with top cell `amp_013_qu2017_azc`, at most 67108864 bytes, within 20000 × 2000 um. Native main and maximal DRC, named-interface LVS and geometry must pass without marker waivers. Keep every MOS, body connection and passive path. Unit multiplicities and the declared passive series/parallel realization are fixed in the materials. -The functional footprint includes active, gate, contact, metal, via, MIM and complete routing shapes; well, text, annotations and nonfunctional markers alone do not define it. The runtime task supplies the exact layer set. Candidate GDS drives native connectivity extraction and distributed wire resistance/ground capacitance extraction, then the same native MOS/MIM/high-poly simulation models used by the source. This nominal MOS/R/C boundary does not assert RF/coupling extraction, PVT, mismatch, noise or manufacturing signoff. +Functional area includes active regions, gates, contacts, metals, vias, MIM devices and all routing. Wells, text, annotations and nonfunctional markers cannot independently define functional area. Runtime task metadata supplies the exact layer set. After native connectivity and distributed wire-resistance/ground-capacitance extraction, simulate the candidate GDS with the same native MOS/MIM/high-poly models as the source. This task's nominal MOS/R/C scope excludes RF/coupling extraction, PVT, mismatch, noise and manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Every declared simulation must complete with finite measurements and complete raw records. Transient means use full-precision cumulative integration with interpolated endpoint corrections; incomplete windows are errors. PP denotes the full finite-window range, including any oscillation or slow drift. No phase margin, loop gain, settling time or periodic steady state is claimed. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +Complete every declared simulation, with finite measurements and complete raw records. Transient means use full-precision cumulative integration and interpolated endpoint corrections; incomplete windows are errors. PP is the range over the entire finite window, including oscillation or slow drift. It does not establish phase margin, loop gain, settling time or periodic steady state. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. | Metric | Unit | Definition | Quality role / functional domain | | --- | --- | --- | --- | @@ -60,10 +47,10 @@ Every declared simulation must complete with finite measurements and complete ra | `gain_db` | dB | Balanced differential open AC gain at 1 Hz | response; db20 | | `gain_10khz_db` | dB | Balanced differential open AC gain at 10 kHz | response; db20 | | `closed_gain_10khz_db` | dB | Direct follower output/signal AC gain at 10 kHz | response; target | -| `late_error_v` | V | Mean absolute follower tracking error, 8–10 us | response; ratio; 0 ≤ value | -| `return_error_v` | V | Mean absolute follower tracking error, 18–20 us | response; ratio; 0 ≤ value | -| `ripple_v` | V | Full output peak-to-peak range, 8–10 us | response; ratio; 0 ≤ value | -| `return_ripple_v` | V | Full output peak-to-peak range, 18–20 us | response; ratio; 0 ≤ value | +| `late_error_v` | V | Mean absolute follower tracking error, 8–10 us | response; saturating_ratio; 0 ≤ value | +| `return_error_v` | V | Mean absolute follower tracking error, 18–20 us | response; saturating_ratio; 0 ≤ value | +| `ripple_v` | V | Full output peak-to-peak range, 8–10 us | response; saturating_ratio; 0 ≤ value | +| `return_ripple_v` | V | Full output peak-to-peak range, 18–20 us | response; saturating_ratio; 0 ≤ value | | `mean_power_w` | W | Time-weighted rail power over 2–20 us; external current-sink implementation excluded | supply; ratio; 0 ≤ value | | `bias_v` | V | External current-bias port DC voltage | diagnostic; unscored | | `high_v` | V | Mean follower output, 8–10 us | diagnostic; unscored | @@ -73,16 +60,15 @@ Every declared simulation must complete with finite measurements and complete ra | `fixture_cm_max` | V | Residual common-mode excitation in the differential AC fixture | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | | `dc_feedback_error_v` | V | DC voltage mismatch across the external feedback inductor | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | -DC bias, 1 Hz/10 kHz differential gain, 10 kHz closed response, tracking error, output range and rail power are distinct observations. +Observe DC bias, differential gain at 1 Hz/10 kHz, closed-loop response at 10 kHz, tracking error, output bounds and supply power separately. Performance is continuously paired with the independently simulated source under exactly the same conditions. Gain quality is 10^((candidate−source)/20); target quality is 1/(1+abs(candidate−source)/scale); inverse-ratio quality is (source+floor)/(candidate+floor). Area quality is Q = 8079.11 um2 / functional area. The bias scale is 1.5 V; closed-response scale is 6 dB (factor two in amplitude). Error/range floors are 1 mV (1% of the 100 mV step); power floor is 1 pW. Physical/domain and fixture-validity gates are not upstream product targets. -The compact-area anchor sums m*((W+2.4)*(L+2.4)+3.2^2) um2 for MOS, 1.2*C/(1.5 fF/um2) for physical capacitor envelopes, and 2*R/(1360 Ohm) um2 for resistor envelopes, then adds 50% global routing allowance. It is an engineering estimate independent of the reference GDS. Coefficient 8 reflects multistage analog routing, active compensation/body connectivity and physical passive matching. - +The compact area benchmark sums MOS envelopes m*((W+2.4)*(L+2.4)+3.2^2) um2, capacitor envelopes 1.2*C/(1.5 fF/um2), and resistor envelopes 2*R/(1360 Ohm) um2, then adds 50% global routing allowance; this is an engineering estimate independent of reference GDS. Coefficient 8 accounts for multistage analog routing, active compensation/body connections and physical passive matching. ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -102,4 +88,4 @@ Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer Solve budget: **8 hours**. -Use the reviewed SG13G2 resources and ngspice 45 tool environment. The runtime `/protocol/task.json` publishes frozen inputs, requirements and tool bindings. Submit `/workspace/output/final.gds` explicitly through the session submission tool; writing the file alone does not submit it. The evaluation executes native checks, candidate-derived RC and independent paired source/post-layout simulations. The reference GDS, maintainer README and development checkout are not solver inputs. +Use the reviewed SG13G2 resources and ngspice 45 environment. Frozen inputs, requirements and tool bindings are in `/protocol/task.json`. Explicitly submit `/workspace/output/final.gds` through the session submission tool; file generation alone is not submission. Evaluation performs native checks, candidate RC extraction and independent paired source/post-layout simulation. Reference GDS, maintainer README and development sources are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/case.toml index f133e3a851b61ba3d315d6ad635e1faecb993db0..43d50ea59ddb3ad83cf631010afdc240148da5c8 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_014_ramos_pfc" title = "Ramos PFC Three-Stage Amplifier" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "cce17c4274a05028df84805e7f996783b7cc020122ff2b7dbe422aa19db06b96" +sha256 = "5f892f1bd3cdcf27688ca816a553fd32f10720ccc554b3a9ed53588417af253e" [[assets]] path = "reference/amp_014_ramos_pfc.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "e8a27313bb8bd0f914297400a78616a5e64d241dc6f431a4ed0505693ccf00aa" +sha256 = "4e44504da26ac3eae622084382d5b81b27d54f1d23e6f55078f84212d245072c" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "397c4c086e2c70372a03c3e1e0be1323519379a0f9ea38be34814434aff0122c" subcircuit = "amp_014_ramos_pfc" +sha256 = "397c4c086e2c70372a03c3e1e0be1323519379a0f9ea38be34814434aff0122c" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "d0555336f3073be55dcf967df72d86b9fbc3e56889c824083866f441296b6eba" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "2f525c742b6b56634835e484d4968c7c168d106d6dc4861c2815a6809c8cd947" +sha256 = "6dafd1581086352b90146a1231038dc3a965b02523c7824d4a9bdf369a9d0a34" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "efbc5517e88ab8b2dd542f15333a7a4e34f151ebeb2a94134b121d2cb4b85a5b" +sha256 = "a9369ade66569d730d74f7a5061966effa5efc27829392e1dfa21cc73712f12f" [task.constraints] quality = [ @@ -252,21 +252,22 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 190064.1 -rationale = "Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 70000.0 +rationale = "The 23 fixed MIM plates occupy 58539.3916 um2. A 70000 um2 integration budget allocates about 84% to those plates, leaving 11460.6084 um2 for enclosures, the expanded MOS array, taps and interconnect; it is not a minimum-area theorem. Area carries 35%, 100 ppm step-referred late accuracy 15%, the worst bilateral normalized response integral 20%, 10 kHz gain 15%, DC gain 10% and mean power 5%. The response integral removes each final plateau offset, so dynamic response and static accuracy are distinct. Repeated return offset, ripple and operating-point summaries remain diagnostic." [task.evaluation.scoring.weights] -functional_area = 0.1 -late_error_v = 0.18 -return_error_v = 0.18 -return_ripple_v = 0.1125 -ripple_v = 0.1125 -closed_gain_10khz_db = 0.06 -gain_10khz_db = 0.06 -gain_db = 0.06 -output_v = 0.045 -mean_power_w = 0.045 -power_w = 0.045 +functional_area = 0.35 +late_error_v = 0.15 +return_error_v = 0.0 +return_ripple_v = 0.0 +ripple_v = 0.0 +closed_gain_10khz_db = 0.0 +gain_10khz_db = 0.15 +gain_db = 0.1 +output_v = 0.0 +mean_power_w = 0.05 +power_w = 0.0 +response_time_s = 0.2 [[task.evaluation.jobs]] id = "artifact" @@ -381,6 +382,8 @@ high_v = "V" low_v = "V" output_min_v = "V" output_max_v = "V" +response_up_s = "s" +response_down_s = "s" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -447,7 +450,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -456,6 +458,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -506,11 +512,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" -scale = 0.001 -lower = 0 +scale = 1e-06 category = "performance" observations = [ "condition_0:late_error_v", @@ -519,15 +524,22 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 1e-05 +rationale = "Allocate 100 ppm of the declared 100 mV step, or 10 uV, to late-window deterministic tracking error. This is independent of the approximately 139 uV finite-tap source offset and makes no noise or mismatch claim." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -536,15 +548,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -553,15 +568,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -570,6 +588,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -578,7 +600,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -587,6 +608,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -642,30 +667,62 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" +category = "performance" +observations = [ + "condition_1:dc_feedback_error_v", +] + +[task.evaluation.metrics.requirement] lower = 0 upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + +[[task.evaluation.metrics]] +id = "response_time_s" category = "performance" observations = [ - "condition_1:dc_feedback_error_v", + "condition_0:response_up_s", + "condition_0:response_down_s", +] +unit = "s" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:response_up_s", + "source_condition_0:response_down_s", ] +normalization = "ratio" +scale = 1e-09 + +[task.evaluation.metrics.quality_target] +value = 7.5e-08 +rationale = "A 75 ns normalized response-integral budget leaves about 5.6 ns for layout delay above the worst 69.4 ns source response to the 100 mV step at 10 pF. Static plateau error is scored independently; this is not a threshold-crossing settling time." + +[task.evaluation.metrics.requirement] +lower = 0.0 +rationale = "An integral of an absolute voltage deviation divided by a positive commanded step is nonnegative; slower responses remain valid and receive lower quality." [task.evaluation.pre_layout] -source_report_sha256 = "684b7cd51c2dc1d6b03203ae38783fceb367105c44ccb8ea1266e61391c88284" +source_report_sha256 = "f468f678db202c4045c881981a16d91a40ff20c99b31efe8725ea313e4fb3104" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"db5af6ce19c531a989db20ba786a8cbbe7b973f3db27104004cd6814795b1cb2\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"0f975b3ce7692fcbe19ec46cf8a89bcd3d7d718eed443f714afa3033f9e33834\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"4256875a12feacdc7b1c992999ca2d58c01501a4bc6f5ac8e9a9fa379d26502b\", \"image_id\": \"sha256:6c47f91ee32beb0e182f754de40ad76299b3eb44f92ab09b526d11c14a17dbdb\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"c9894056a0f2ead5a621749eac89cea0f90d36093b04ac41c6642822b319032e\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Wed Oct 7 12:04:25 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -697,6 +754,8 @@ high_v = "V" low_v = "V" output_min_v = "V" output_max_v = "V" +response_up_s = "s" +response_down_s = "s" [task.evaluation.pre_layout.jobs.source_condition_0.parameters.exports] op = "op.raw" @@ -704,7 +763,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "2f525c742b6b56634835e484d4968c7c168d106d6dc4861c2815a6809c8cd947" +deck = "6dafd1581086352b90146a1231038dc3a965b02523c7824d4a9bdf369a9d0a34" dut = "d0555336f3073be55dcf967df72d86b9fbc3e56889c824083866f441296b6eba" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -747,6 +806,14 @@ unit = "V" value = 0.0006226051526952075 unit = "W" +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.response_down_s] +value = 6.91965e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.response_up_s] +value = 6.93713e-08 +unit = "s" + [task.evaluation.pre_layout.jobs.source_condition_0.measurements.return_error_v] value = 0.000139065 unit = "V" @@ -784,7 +851,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "efbc5517e88ab8b2dd542f15333a7a4e34f151ebeb2a94134b121d2cb4b85a5b" +deck = "a9369ade66569d730d74f7a5061966effa5efc27829392e1dfa21cc73712f12f" dut = "d0555336f3073be55dcf967df72d86b9fbc3e56889c824083866f441296b6eba" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dc_feedback_error_v] @@ -815,7 +882,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -826,7 +893,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -839,7 +906,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -852,7 +919,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -864,7 +931,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -874,7 +941,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/ac.spice index 4315af23a649f650a552f768ef0dcdf807810db8..8af11720204489000b58006381b04aa1f54453d7 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/ac.spice @@ -17,7 +17,6 @@ XDUT 0 vdd vm vp vout net1 amp_014_ramos_pfc CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 op let dc_feedback_error_v=abs(v(vout)-v(vm)) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/schematic.svg index d28bd6e34ecbd1131066b61fdb1a592866079f2c..34d57a917d9e848f82f001f43a64856351f849b3 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_014_ramos_pfc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_014_ramos_pfc","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/circuit.cdl","netlist_sha256":"397c4c086e2c70372a03c3e1e0be1323519379a0f9ea38be34814434aff0122c","project_sha256":"dcab68f1d5a6a6e67294b15a48525e5a5c0467031e914ea0ed3d042b98686f93","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist 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R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Repeated device arrays are split into contiguous source-order ranges sized for responsive Analog Canvas editing; every source device and literal parameter remains represented.","No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_014_ramos_pfc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/design/amp_014_ramos_pfc.icproj.json"}}Main-sheet overview; 58 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_014_ramos_pfcvoutnet050vddnet1vb4vinndm_2net31vddnet1vb3vsssubvssvb4subnet54vddnet1vddnet1net31vddnet1net049vssvb4subnet063subvb3voutndm_2vddvoutnet050vddnet043net050vddnet1dm_1vssvb4subnet56subvb3dm_1net56vddnet050voutnvb4subvb3net54vssvoutsubnet049vssvb4subdm_2vinpnet063net31vddvoutnnet050net049net050subvb3net063vsssubvb3vssvssnet1vddvinnvinpvoutvssamp_014_ramos_pfcBIAS AND REFERENCEINPUT PAIR AND CASCODED GAINOUTPUT AND COMPENSATIONMM21w=1u l=1uMM22w=1u l=1uXMM0_bank1XMM1_bank2XMM10_bank3XMM11_bank4XMM12_bank5XMM13_bank6XMM14_bank7XMM15_bank8XMM16_bank9XMM17_bank10XMM18_bank11XMM19_bank12XMM2_bank13XMM20_bank14XMM23_bank15XMM3_bank16XMM4_bank17XMM5_bank18XMM6_bank19XMM7_bank20XMM8_bank21XMM9_bank22XXRT623_bank23XXC0_bank24XXC1_bank25 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/testbench.spice index 98b7d9f5e11b8c52c26c5946e42b173ecf247d9f..193875bb7f8e6b134f16899d6b1a8efd2fa6d354 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/materials/testbench.spice @@ -14,7 +14,6 @@ XDUT 0 vdd vout vp vout net1 amp_014_ramos_pfc CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op @@ -34,6 +33,11 @@ meas tran late_error_v avg error_v from=80u to=100u meas tran return_error_v avg error_v from=180u to=200u meas tran high_v avg v(vout) from=80u to=100u meas tran low_v avg v(vout) from=180u to=200u +* Offset-independent finite-window response cost, normalized to the commanded step. +let dynamic_up=abs(v(vout)-high_v)/0.1 +let dynamic_down=abs(v(vout)-low_v)/0.1 +meas tran response_up_s integ dynamic_up from=20.1u to=100u +meas tran response_down_s integ dynamic_down from=100.2u to=180u meas tran ripple_v pp v(vout) from=80u to=100u meas tran return_ripple_v pp v(vout) from=180u to=200u meas tran mean_power_w avg supply from=20u to=200u diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/problem.md index 9f1f7f7f207359ce52b565c4a7fdab524df28a29..bbfdafd0d8daf924b467a0a8d2533e4aacd9f991 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_014_ramos_pfc/problem.md @@ -9,13 +9,7 @@ input body remains tied to its own tail node through its physical well contact. ## Inputs and Interface -`materials/circuit.cdl` is the physical authority; `materials/circuit.spice` is its -matching simulator representation. `materials/testbench.spice` defines closed-loop -observations and `materials/ac.spice` defines balanced differential AC excitation. -Ordered ports: `vss vdd vinn vinp vout net1`. `vss` is ground, `vdd` supply, -`vinn/vinp` negative/positive input, `vout` the single-ended output, and `net1` -the external bias-current sink. Bias, input drivers, feedback wiring and load are -external test apparatus; taps and all internal R/C are physical DUT elements. +`materials/circuit.cdl` is the authoritative physical circuit, `materials/circuit.spice` its simulation representation, `materials/testbench.spice` defines closed-loop observations, and `materials/ac.spice` defines balanced differential AC excitation. Ordered ports are `vss vdd vinn vinp vout net1`: ground, supply, negative/positive inputs, single-ended output and an external bias-current pull-down. Bias, input drive, feedback connections and loads are external test fixtures. Contacts and internal R/C must be physically implemented. ## Operating Conditions @@ -27,12 +21,7 @@ starting at 20 us (100 ns rise/fall, 80 us high duration), and runs to 200 us wi Transient starts from the solved DC point; this is not a zero-state supply-ramp startup test. High and return windows are 80–100 and 180–200 us. -AC spans 1 Hz–1 GHz at 200 points/decade. The differential deck retains DC output -feedback through a 1 TH inductor and AC-isolates its bias node with 1 F to ground; -vinp/vinn receive balanced +0.5/-0.5 V small-signal excitation. It verifies residual -input common-mode amplitude <=1 uV and DC feedback mismatch <=1 uV. These are external small-signal bias fixtures, -not physical compensation. The separate closed-loop deck measures actual follower -response. No voltage-transfer estimate is labeled a loop return ratio. +AC sweeps 200 points per decade from 1 Hz to 1 GHz. The differential-mode deck retains output DC feedback through a 1 TH inductor and isolates the bias node from AC through a 1 F capacitor to ground; vinp/vinn use balanced +0.5/-0.5 V small-signal excitation. Input common-mode residual amplitude and DC feedback error must both be <=1 uV. These are external small-signal bias fixtures, not physical compensation; an independent closed-loop deck measures actual follower response and does not call a voltage-transfer estimate a loop return ratio. ## Physical Requirements @@ -46,30 +35,17 @@ IHP native main and maximal DRC use the pinned PDK block profiles, with chip-lev ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. First compute each metric's raw quality q from the worst paired condition, with raw area quality q_area = area_target / candidate_functional_area. Credit c_i = min(1, q_i) for every positively weighted metric, then compute S = 100 * product(c_i ** w_i). The weights sum to 1 and the score is bounded by 100. An improvement beyond one target cannot compensate for missing another target. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Reaching every positively weighted target scores 100; a feasible reference may score far below 100. Weights express quality tradeoffs, not acceptance bounds. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, declared target (or paired source) b and the positive scale s below define q = 2(b+s)/(b+x+2s). Equality to the anchor gives raw q=1; decreasing error approaches raw quality 2, while credited quality stays at 1. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. | Metric | Definition | Unit | Treatment | | --- | --- | --- | --- | @@ -78,63 +54,41 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | output_v | DC follower output | V | Bias target, 1.5 V scale | | power_w | DC power drawn from VDD | W | Supply, inverse ratio, 1 pW floor | | mean_power_w | Mean supply power over 20–200 us | W | Supply, inverse ratio, 1 pW floor | -| late_error_v, return_error_v | Mean absolute tracking error in high/return window | V | Response, inverse ratio, 1 mV floor | -| ripple_v, return_ripple_v | Full output peak-to-peak range in high/return window | V | Response, inverse ratio, 1 mV floor | +| late_error_v, return_error_v | Mean absolute tracking error in high/return window | V | Saturating quality for late error; return error diagnostic | +| ripple_v, return_ripple_v | Full output peak-to-peak range in high/return window | V | Diagnostic | | high_v, low_v | Window means | V | Diagnostic | | bias_v | External bias port DC voltage | V | Diagnostic | | output_min_v, output_max_v | Full-transient extrema | V | Diagnostic | | dc_feedback_error_v | Absolute DC voltage across the external feedback inductor | V | Measurement-validity check, 0–1 uV | | fixture_cm_max | Maximum residual common-mode AC drive | V | Measurement-validity check, 0–1 uV | -All measurements must be finite and complete. Nonnegative supply power and -absolute-error/range values follow their physical domains. The common-mode fixture -bound verifies the differential excitation, not DUT common-mode regulation. The -DC feedback bound rejects a failed bias-isolation solve. Both checks fail the -source or candidate simulation before scoring. These -are the only electrical hard bounds; upstream paper targets are not gates. -Window errors and ripple do not assert settled operation or periodic steady state. -No phase margin, unity crossing, settling time, CMRR, noise, PVT or mismatch is claimed. - -Quality uses independently simulated same-condition source observations. For gain, -q=10^((candidate−source)/20); target q=1/(1+abs(candidate−source)/scale); -inverse-ratio q=(source+floor)/(candidate+floor). The 6 dB target scale corresponds -to a factor-of-two amplitude change; 1.5 V is the bias normalization and 1 mV is -1% of the 100 mV test step, preventing numerical zero error from dominating quality. -Area quality is Q=190064.1 um2/functional_area. - -The compact-area anchor is independent of any reference layout: sum -m*((W+2.4)*(L+2.4)+3.2^2) um2 over upstream-bound MOS, add 1.2*C/density -for capacitors (density 1.5 fF/um2) and 2*R/sheet_resistance um2 -for resistor contact/routing envelopes (sheet resistance 1360 ohm), -then apply a 50% global routing allowance. This is an engineering estimate, not a -foundry minimum. Coefficient 7: Multistage compensation couples the first-stage node, current-inversion path and output response. - - -### Score weights - -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. - -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `late_error_v` | 0.180000000000 | -| `return_error_v` | 0.180000000000 | -| `return_ripple_v` | 0.112500000000 | -| `ripple_v` | 0.112500000000 | -| `closed_gain_10khz_db` | 0.060000000000 | -| `gain_10khz_db` | 0.060000000000 | -| `gain_db` | 0.060000000000 | -| `output_v` | 0.045000000000 | -| `mean_power_w` | 0.045000000000 | -| `power_w` | 0.045000000000 | +All measurements must be finite and complete. Supply power, absolute errors and amplitude ranges must obey their nonnegative physical definitions. The common-mode test-apparatus bound validates differential excitation, rather than DUT common-mode regulation. The DC feedback bound excludes failure of the isolated bias solve. Both apparatus checks apply to source and candidate simulation before scoring. These are this task's hard electrical requirements; upstream paper targets are not acceptance bounds. Window error and ripple do not establish settling or periodic steady state; no phase margin, unity-gain crossing, settling time, CMRR, noise, PVT or mismatch performance is claimed. + +Error metrics use saturating normalization `2*(b+s)/(b+x+2*s)`, with the quality anchor and scale declared below. This differs from an unbounded inverse ratio. Zero-weight ripple, return error, bias and closed-loop gain remain diagnostics; the response integral separately scores dynamic quality. Capability coefficient **7** is independent of the score. + +### Quality targets and weights + +The area quality target is **70000 um2**. It is an integration budget, not a hard limit or a proven process minimum. + +The 23 fixed MIM plates occupy 58539.3916 um2. A 70000 um2 integration budget allocates about 84% to those plates, leaving 11460.6084 um2 for enclosures, the expanded MOS array, taps and interconnect; it is not a minimum-area theorem. Area carries 35%, 100 ppm step-referred late accuracy 15%, the worst bilateral normalized response integral 20%, 10 kHz gain 15%, DC gain 10% and mean power 5%. The response integral removes each final plateau offset, so dynamic response and static accuracy are distinct. Repeated return offset, ripple and operating-point summaries remain diagnostic. + +`response_time_s` takes the worse normalized absolute-error integral: integrate `abs(v(vout)-high_v)/0.1` over 20.1–100 us, or `abs(v(vout)-low_v)/0.1` over 100.2–180 us. The existing high/return means supply the final plateau values. The 75 ns budget leaves about 5.6 ns above the worst 69.4 ns source result under the declared 100 mV step and 10 pF load. Removing each plateau offset isolates dynamic response from the separately scored static error. This finite-window integral is in seconds; it is not a threshold-crossing settling time and does not establish periodic steady state. + +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 70000 | um2 | — | 0.35 | +| `late_error_v` | 1e-05 | V | 1e-06 | 0.15 | +| `gain_10khz_db` | paired source | dB | — | 0.15 | +| `gain_db` | paired source | dB | — | 0.1 | +| `mean_power_w` | paired source | W | 1e-12 | 0.05 | +| `response_time_s` | 7.5e-08 | s | 1e-09 | 0.2 | + +Zero-weight observations: `return_error_v`, `return_ripple_v`, `ripple_v`, `closed_gain_10khz_db`, `output_v`, `power_w`. Original functional requirements remain enforced; grouped metrics listed above carry their stated weight once. + +The targets affect continuous quality only. A complete feasible reference may miss them; there is no minimum qualifying score. ## Tools and Submission Solve budget: **8 hours**. -Use the reviewed IHP SG13G2 resources and the ngspice 45 tools environment. -The runtime `/protocol/task.json` supplies frozen requirements and resource bindings. -Submit `/workspace/output/final.gds` through the session's explicit submission tool; -writing a file alone does not submit it. Evaluation performs artifact, native -DRC/LVS, geometry, candidate RC, independent source and post-layout simulation. -The source baseline, witness and authoring repository are not solver inputs. +Use reviewed IHP SG13G2 resources and the ngspice 45 environment; see `/protocol/task.json` for frozen requirements and resource bindings. Explicitly submit `/workspace/output/final.gds` through the session tool; writing a file alone is insufficient. Evaluation checks files, native DRC/LVS, geometry, candidate RC, independent source simulation and post-layout simulation; source baselines, reference solutions and the author repository are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/case.toml index 45ef0d25edc67e99d34633a1ea5717ed50a9bef7..aaff0ceff92878741b0c67708e86d37ef6a18249 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_015_sau_cfcc" title = "Input-Driven Active-Feedforward OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "7226a76042a3df44b7f40e7f78f39a6eb48d479e5fb907e569f5c06a3caf9948" +sha256 = "bb343709aa6ab5c7cda37c3efcd080d68b24632f84a862c65648d15b86a874d0" [[assets]] path = "reference/amp_015_sau_cfcc.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-amp_015_sau_cfcc-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "7df13f4c46e146a7c1ee54df934288fd5567524b5acfdbf48da1b0de275cdbbb" +sha256 = "35ad982ea87b187ae88e8310c0f63d24de73d476e45b0746f9ab5fad044676ad" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "9934cbb25b0b85a604e0e3a453094d54a55c9ea1edfc8d66e6eb3b4fce0a0190" subcircuit = "amp_015_sau_cfcc" +sha256 = "9934cbb25b0b85a604e0e3a453094d54a55c9ea1edfc8d66e6eb3b4fce0a0190" [task.inputs.performance] path = "materials/testbench.spice" @@ -657,8 +657,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "output_error_v" @@ -683,10 +686,13 @@ baseline = [ "source_condition_4:output_error_v", "source_condition_5:output_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "bias_v" category = "performance" @@ -712,8 +718,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -739,9 +748,12 @@ baseline = [ "source_condition_5:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -791,7 +803,10 @@ baseline = [ "source_condition_5:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -818,8 +833,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "final_unity_hz" @@ -845,7 +863,10 @@ baseline = [ "source_condition_5:final_unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "final_phase_margin_deg" @@ -872,8 +893,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "minimum_return_distance" @@ -900,7 +924,10 @@ baseline = [ ] normalization = "target" scale = 1.0 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "return_phase_excursion_deg" @@ -926,9 +953,12 @@ baseline = [ "source_condition_5:return_phase_excursion_deg", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "hf_gain_db" category = "performance" @@ -977,10 +1007,13 @@ baseline = [ "source_condition_4:recovery_up_v", "source_condition_5:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -1004,10 +1037,13 @@ baseline = [ "source_condition_4:recovery_down_v", "source_condition_5:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -1058,9 +1094,12 @@ baseline = [ "source_condition_5:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -1086,8 +1125,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -1114,14 +1156,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "5b4174ebb0a36e2fde9ad55210fbfd3ddbf15b78089f5234d7346a4ddf7e4bde" +source_report_sha256 = "96c7a4d18298005bc04d451cb411d041ef1352615d8d082ec81a99075cc1df0f" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"1691279e87530b6c5a6218736bc059a118ad93793229020827c7ea39d171bfdf\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1242,6 +1287,12 @@ unit = "V" value = 203539.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "adb29d32bc546663ebbb35f74b9fba68af72f39ce03cb913965b7f8baf4a8d86" +ac = "ec2377acb28291e821ae550596bc474a7f05976f0be0b468c92f4d44690795a1" +transient = "cff2a8709cf28035a5d3b7cd3578d8f9e48172e6aed68bab3ab8bba9742cf8e7" +voltage = "0ba609610d9cdeb8bae45bf08201f187b9b7aa6892b8868ee8ce4d84bdef80ed" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1361,6 +1412,12 @@ unit = "V" value = 203601.3 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "adb29d32bc546663ebbb35f74b9fba68af72f39ce03cb913965b7f8baf4a8d86" +ac = "6e34f4047f820532ffa5e63a88fe9adaa97584d097faf04c3a9e6e0ab8162d32" +transient = "dff76a40135e17cf7ad981360fa7b0261a1c158e1b131e4f4a890b9f9b18754b" +voltage = "265369f0b5289be145d60904168c1751226a634f88eb9a3a83725ff2353ddbad" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1480,6 +1537,12 @@ unit = "V" value = 203659.9 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "adb29d32bc546663ebbb35f74b9fba68af72f39ce03cb913965b7f8baf4a8d86" +ac = "9e7cb4bed88281cdada7371ec49f29586cf69c037dd5b501bf693d6403aba9b2" +transient = "d4d8dc735d7a31f07a77ab03d45f78ec91435517f75c0de36e163fb4bf142b17" +voltage = "3b3f6265237f7acf9b0caa7e5cec826b40fd278c7e67087ca19f0339136dbc9b" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1599,6 +1662,12 @@ unit = "V" value = 201599.6 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "83aa096f666f4cc5b0abc2a9338527507d1d2fc60e67c9d5f6164f86d4eac43f" +ac = "89e5666bdd47bb912099adf36c4439c2b9bbadb1202c6196b733affe5f69a186" +transient = "cff2a8709cf28035a5d3b7cd3578d8f9e48172e6aed68bab3ab8bba9742cf8e7" +voltage = "98ad07f88ad5b69b1e1f20f3c02cd7b9010f23d7ecc2fe85a28423ea5342580a" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1718,6 +1787,12 @@ unit = "V" value = 201657.2 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "83aa096f666f4cc5b0abc2a9338527507d1d2fc60e67c9d5f6164f86d4eac43f" +ac = "55c1af34d9eb72d613e184cfea429118305dd610d9c3f7b52b1fa4083a57a754" +transient = "dff76a40135e17cf7ad981360fa7b0261a1c158e1b131e4f4a890b9f9b18754b" +voltage = "e867bab8260a69dab2403cfcea4352c17075878370960f338e1279fcafb6380b" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1837,6 +1912,12 @@ unit = "V" value = 201711.9 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "83aa096f666f4cc5b0abc2a9338527507d1d2fc60e67c9d5f6164f86d4eac43f" +ac = "77b3557ece5cc4b432cf75992cb755951a917f868b1c50fed1292ad427524d6d" +transient = "d4d8dc735d7a31f07a77ab03d45f78ec91435517f75c0de36e163fb4bf142b17" +voltage = "dba9e9d46c743211a0e7bbc0db0c7f64d7438e3beba7f807eb8bdc714be0957e" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1849,7 +1930,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1860,7 +1941,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1873,7 +1954,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1886,7 +1967,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1906,7 +1987,7 @@ label_layers = [ type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1916,7 +1997,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/materials/schematic.svg index 22ad5b520f9d2644825bb2e03e153059c8f1cfee..f1249696838ac0b63e32c8ccfefb735bf0a4970c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/materials/schematic.svg @@ -1 +1,2 @@ -amp_015_sau_cfcc{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_015_sau_cfcc", "netlist_sha256": "9934cbb25b0b85a604e0e3a453094d54a55c9ea1edfc8d66e6eb3b4fce0a0190", "project_sha256": "731d1c2886da6c5b510d9fd16fe6d1f4fb484dae58d79c732e6c70ad1b27e2f9", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_015_sau_cfcc", "Bank1_18x_ntap1", "Bank2_101x_ptap1", "Bank3_12x_cap_cmim"], "banks": [{"name": "Bank1_18x_ntap1", "count": 18, "model": "ntap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank2_101x_ptap1", "count": 101, "model": "ptap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank3_12x_cap_cmim", "count": 12, "model": "cap_cmim", "params": {"w": "51.64u", "l": "51.64u", "m": "1"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_015_sau_cfccvddwell_vddvsssubvoutvssvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnvoutnnet050voutvddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31net013vddnet063net050voutvddwell_vddsubvoutvssvssnet31well_net31vssvddvinnvinpvoutnet013amp_015_sau_cfccihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM56.22/8.33 ×2MM66.22/8.33 ×2MM87.33/0.46 ×4MM97.33/0.46 ×4MM156.74/3.98 ×8MM166.74/3.98 ×8MM195.14/3.99 ×32MM205.14/3.99 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → sub02 Intermediate gain stagesMM106.38/1.97 ×8MM75.52/1.09MM119.59/1.2 ×8MM216.87/0.64 ×8MM226.87/0.64 ×24MM237.31/0.81 ×4P bulk → well_vddN bulk → sub03 Bias and tail-current generationMM06.22/8.33 ×2MM16.22/8.33 ×2MM26.22/8.33 ×2MM36.22/8.33 ×2MM125.14/3.99 ×16MM135.14/3.99 ×16MM145.14/3.99 ×4MM175.14/3.99 ×16MM185.14/3.99 ×16P bulk → well_vddN bulk → sub04 Bias and tail-current generationMM46.22/8.33 ×4P bulk → well_vdd05 Compensation and signal passivesCC0_051.3/51.3CCLOCAL_051.6/51.6CCLOCAL_151.6/51.6CCLOCAL_251.6/51.6CCLOCAL_351.6/51.606 Substrate contacts / repeated banksRRtap_net31_0A=4 µm²RRtap_net31_1A=4 µm²RRtap_net31_2A=4 µm²XBANK1Bank1_18x_ntap1XBANK2Bank2_101x_ptap1XBANK3Bank3_12x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · ntap1 · cap_cmim \ No newline at end of file +amp_015_sau_cfcc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_015_sau_cfcc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_015_sau_cfcc","Bank1_18x_ntap1","Bank2_101x_ptap1","Bank3_12x_cap_cmim"],"banks":[{"name":"Bank1_18x_ntap1","count":18,"model":"ntap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank2_101x_ptap1","count":101,"model":"ptap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank3_12x_cap_cmim","count":12,"model":"cap_cmim","params":{"w":"51.64u","l":"51.64u","m":"1"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/design/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_015_sau_cfcc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/design/amp_015_sau_cfcc.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_015_sau_cfccvddwell_vddvsssubvoutvssvinnvinpvddnet050net31vb3vb4vssdm_2net063voutnvoutnnet050voutvddnet049vssnet043dm_1net54net56vssvddvb4net013vb3net31net013vddnet063net050voutvddwell_vddsubvoutvssvssnet31well_net31vssvddvinnvinpvoutnet013amp_015_sau_cfccihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresDifferential input and folded branchesMM56.22/8.33 ×2MM66.22/8.33 ×2MM87.33/0.46 ×4MM97.33/0.46 ×4MM156.74/3.98 ×8MM166.74/3.98 ×8MM195.14/3.99 ×32MM205.14/3.99 ×32MM5, MM6: B → well_vddMM8, MM9: B → well_net31N bulk → subIntermediate gainMM106.38/1.97 ×8MM75.52/1.09MM119.59/1.2 ×8MM216.87/0.64 ×8MM226.87/0.64 ×24MM237.31/0.81 ×4P bulk → well_vddN bulk → subTail-current bias networkMM06.22/8.33 ×2MM16.22/8.33 ×2MM26.22/8.33 ×2MM36.22/8.33 ×2MM125.14/3.99 ×16MM135.14/3.99 ×16MM145.14/3.99 ×4MM175.14/3.99 ×16MM185.14/3.99 ×16P bulk → well_vddN bulk → subBias referenceMM46.22/8.33 ×4P bulk → well_vddCompensation capacitorsCC0_051.3/51.3CCLOCAL_051.6/51.6CCLOCAL_151.6/51.6CCLOCAL_251.6/51.6CCLOCAL_351.6/51.6Bulk ties and device banksRRtap_net31_0A=4 µm²RRtap_net31_1A=4 µm²RRtap_net31_2A=4 µm²XBANK1Bank1_18x_ntap1XBANK2Bank2_101x_ptap1XBANK3Bank3_12x_cap_cmimModels: sg13_lv_nmos · sg13_lv_pmos · ntap1 · cap_cmim + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/problem.md index 1db582cbc52f9030ecd6b63c693c66098d54ff2c..7a38dcbfed5734aebffdc52935115a660c7abb81 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_015_sau_cfcc/problem.md @@ -11,8 +11,8 @@ and both explicitly added physical capacitor arrays. ## Inputs and Interface -- `materials/circuit.cdl`: authoritative native physical graph. -- `materials/circuit.spice`: equivalent simulator graph with finite body taps. +- `materials/circuit.cdl`: authoritative native physical connectivity. +- `materials/circuit.spice`: equivalent simulation connectivity including finite body contacts. - `materials/testbench.spice`: DC, bilateral-loop and sustained-step measurements. Ordered ports: `vss vdd vinn vinp vout net013`. VSS/VDD are return/supply; @@ -22,11 +22,7 @@ connects to the external bias sink. Input PMOS bodies use the separate Preserve all 24 MOS groups, 225 physical fingers, W/L/m, every body connection and all physical passive devices. -MOS dimensions are rounded to the 10 nm physical grid. Parallel regrouping -within each original group preserves its rounded total W and L, with at most -10 um single-finger width; individual width/multiplicity and diffusion perimeter -change. Distributed 2 × 2 um body contacts have at most 20 um pitch. -All internal capacitors use `cap_cmim`: +MOS dimensions are rounded to the 10 nm physical grid. Parallel regrouping within each original group preserves rounded total W and L, with each finger at most 10 um wide; individual widths/multiplicities and diffusion perimeters change accordingly. Distributed 2 × 2 um body contacts have spacing at most 20 um. All internal capacitors use `cap_cmim`: - `c0`: `net063` (top) to `vout` (bottom), 1 parallel 51.3 × 51.3 um MIM units. - `clocal`: `net050` (top) to `vout` (bottom), 4 parallel 51.64 × 51.64 um MIM units. @@ -46,34 +42,11 @@ Use typical IHP LV MOS/MIM/poly models at 27 C and VDD=1.2 V, with a 5/10/15 pF load and 0.5/0.7 V DC input must pass. These external loads are additional to every internal capacitor above. -A zero-volt source connects VINN (`vm`) to VOUT. VINP is AC ground. -Use series voltage and parallel current injection at that boundary, retaining -the complete DUT and loading. With voltage-injection `b=-I(VPROBE)`, -`d=V(vm)` and current-injection `a=-I(VPROBE)`, `c=V(vm)`, set -`delta=a*d-b*c` and `T=(2*delta-a+d)/(1-2*delta+a-d)` (Tian Eq. 30). -Both raw injections are exported for independent Y-matrix reconstruction. -Sweep 0.01 Hz–10 GHz at 300 points/decade. Continuous phase uses its natural -low-frequency branch without an offset correction. Check first and final -descending unity crossings, minimum sampled `abs(1+T)`, maximum absolute -continuous phase of `1+T` across the entire sweep, and gain over 2–10 GHz. -A good first crossover alone cannot establish acceptance. - -VINP pulses 0.5→0.7→0.5 V with 20 ns edges, rising at 2 us and falling -at 20.02 us, period 100 us. Transient starts at its own pulse-start operating -point, independently of the AC DC-input setting. Simulate 0–40 us with Gear2, -2 ns maximum step, KLU, `itl4=1000`, `rshunt=1e12`, `reltol=1e-5`, -`abstol=1e-12`, `vntol=1e-8`. The numerical shunt is not a physical device. -Qualification also checks half step, tighter tolerances/dense AC, trapezoidal -integration, long tails and finite stimulus/load boundaries. -These are finite external-loop and observable-recovery requirements, not an -internal pole inventory, arbitrary-load stability, PVT, noise, mismatch, -distortion, rail-to-rail behavior or supply-startup qualification. - -First and final crossing phase margins must both lie in [0, 180] degrees. -Minimum return distance and return-phase excursion have only nonnegative -domain bounds; high-frequency gain has no acceptance bound. These full-sweep -metrics affect continuous quality without adding a stability acceptance screen. -Missing crossings or invalid observations are evaluator errors. +A zero-volt source connects VINN (`vm`) to VOUT, while VINP is AC ground. Insert series voltage injection and parallel current injection at this boundary, retaining the complete DUT and load. Voltage injection uses `b=-I(VPROBE)`, `d=V(vm)`; current injection uses `a=-I(VPROBE)`, `c=V(vm)`; `delta=a*d-b*c`, `T=(2*delta-a+d)/(1-2*delta+a-d)` (Tian expression 30). Export both raw injections to independently reconstruct the Y matrix. Sweep 300 points per decade from 0.01 Hz to 10 GHz; continuous phase follows the natural low-frequency branch without offset correction. Check first and last descending unity-gain crossings, full-sweep minimum sampled `abs(1+T)`, maximum absolute continuous phase over `1+T`, and gain over 2–10 GHz; a good first crossing alone is insufficient. + +VINP is a 0.5→0.7→0.5 V pulse with 20 ns edges, rising at 2 us and falling at 20.02 us with period 100 us. Transient starts at its own initial-pulse operating point, independently of the AC DC-input setting. Simulate 0–40 us with Gear2, maximum step 2 ns, KLU, `itl4=1000`, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-12`, `vntol=1e-8`; numerical shunts are not physical devices. Verification also covers half steps, tighter tolerances/denser AC, trapezoidal integration, long tails and finite excitation/load boundaries. These finite outer-loop and recovery observations do not prove internal poles, stability under arbitrary loads, PVT, noise, mismatch, distortion, rail-to-rail operation or power-up startup performance. + +The phase margins at the first and last crossings must both lie within [0, 180] degrees. Minimum return distance and return-phase excursion need only be nonnegative; high-frequency gain has no acceptance threshold. These full-sweep metrics affect continuous quality without adding stability acceptance conditions. Missing crossings or invalid observations are evaluation errors. ## Physical Requirements @@ -92,49 +65,26 @@ physical tap models. Distributed substrate resistance/noise and fabrication signoff remain unqualified. The long independent witness is a feasibility layout, not an area optimum. - ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`output_error_v`, `recovery_up_v`, `recovery_down_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source-equivalent error gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning. Normalize each condition before taking the worst quality; other normalization and functional rules follow their own declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | -| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | bias | +| `output_error_v` | DC operating point: `abs(v(vout)-v(vp))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | bias | | `bias_v` | DC operating point: `v(net013)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dc_gain_db` | AC: Value of `(db((T))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | @@ -145,22 +95,20 @@ source condition; a group uses its worst paired quality. | `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 10g`. | 1 | target / target | 0 … +∞ | 1.0 | response | | `return_phase_excursion_deg` | AC: `vecmax(abs(180*cph(1+(T))/pi))`; sweep `dec 300 0.01 10g`. | deg | minimize / ratio | 0 … +∞ | 1e-12 | response | | `hf_gain_db` | AC: Maximum of `(db((T))) from=2g to=10g`. | dB | minimize / db20 | −∞ … +∞ | — | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=15u to=19u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=30u to=39u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=15u to=19u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=30u to=39u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=18u to=19u)-(avg v(vout) from=38u to=39u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=40u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=2u to=20u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=20.04u to=40u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **84393.45 um2**. 364 expanded device instances; sum of device/contact envelopes 55883.1016 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **84393.45 um2**. The expanded circuit has 364 device instances, a sum of device/contact envelopes 55883.1016 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24.5%; gain and bandwidth 12.3%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Multiple-crossing feedback amplifier: loaded recovery 28.6%, loop stability 24.5%, gain and bandwidth 12.3%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -188,8 +136,4 @@ Multiple-crossing feedback amplifiers: loaded recovery 28.6%; loop stability 24. Solve budget: **3 hours**. -Discover inputs/resources/feedback through `/protocol/task.json`, -`/protocol/resources.json` and `/protocol/harness.json`. Use supplied IHP -primitives with KLayout, Magic and ngspice. Write `/workspace/output/final.gds` -and explicitly submit through the harness. Host configuration, source records -and reference answers remain outside solver inputs. +Discover inputs, resources and feedback through `/protocol/task.json`, `/protocol/resources.json`, `/protocol/harness.json`. Use supplied IHP primitives and KLayout, Magic and ngspice; explicitly submit after writing `/workspace/output/final.gds`. Host configuration, source records and reference solutions are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/case.toml index c2e4ead4dfdd41e5b6d9dbb06a12529420c552bd..c7805bfdd8196b245d2127d8d48561c8b2ff2751 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_016_song_dacfc" title = "Song DACFC Three-Stage Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "7141904f697d37e8396048bad1c5f03d71f74d671d99b602296727c7221951fd" +sha256 = "e1b77c7dea64e2d216a8a67e5addacf0e06a7ecddadb3093c237ba0b0a128186" [[assets]] path = "reference/amp_016_song_dacfc.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "1dcf2d0558be8a19391e322b97b62e720d202f8d6afefe918e49e60139396007" +sha256 = "612d0d659b07cc0eda83b7292882651ac30901421033d4ecae9b5b598ae212c5" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "cc7cee55037a3aa08fbbc4323632ff893f435beea53209e451e1e948293363a4" subcircuit = "amp_016_song_dacfc" +sha256 = "cc7cee55037a3aa08fbbc4323632ff893f435beea53209e451e1e948293363a4" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "d848e329f6fdc8d2bb8d22c278be92a5de29647ba28d3ebbc7a4f23ba8353b3a" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "716d01778bf88154a221050d39f9589555576dc714b3323cd6c3586acdb9db53" +sha256 = "38aa2c96d47fdfb664ed7c4bba002d9803750c3f39fe757233717875690726b4" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "0e74536eb609e67185c250b2968a14e82af88b954d384f816aef2bc9c171c0fc" +sha256 = "bd58d5fef7c72e008a56888d98175601bb2c59bd439ee7a7c4281d03d718f1cf" [task.constraints] quality = [ @@ -447,7 +447,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -456,6 +455,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -506,11 +509,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:late_error_v", @@ -519,15 +521,18 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -536,15 +541,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -553,15 +561,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -570,6 +581,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -578,7 +593,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -587,6 +601,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -642,30 +660,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [task.evaluation.pre_layout] -source_report_sha256 = "436d8818ff65913d7bd0e1165f2fa811445aa1fefb02fb83fe848e56a5c51bf0" +source_report_sha256 = "f0a689c482194a284f6904b74db7a72eb8cd8a35ddb9cf6634940bff9ec48e25" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"1c64bdcc7777f6d1f403edd119a36c13355b4f069827b66e8055678a6938d88d\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -704,7 +728,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "716d01778bf88154a221050d39f9589555576dc714b3323cd6c3586acdb9db53" +deck = "38aa2c96d47fdfb664ed7c4bba002d9803750c3f39fe757233717875690726b4" dut = "d848e329f6fdc8d2bb8d22c278be92a5de29647ba28d3ebbc7a4f23ba8353b3a" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -759,6 +783,11 @@ unit = "V" value = 0.1522979 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "35797c341e43645e74ed67110b09e4322d70401bcf201b0a3bd1e972782d8d4c" +ac = "e419e21fc1cd797b860c2c014ef1ce37283efc4a8903ffa68edd4f76dc3feafd" +transient = "46596243de275ebeed798bb765eeb137217b2822b20a8ebf994c98f8941b4fae" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -784,7 +813,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "0e74536eb609e67185c250b2968a14e82af88b954d384f816aef2bc9c171c0fc" +deck = "bd58d5fef7c72e008a56888d98175601bb2c59bd439ee7a7c4281d03d718f1cf" dut = "d848e329f6fdc8d2bb8d22c278be92a5de29647ba28d3ebbc7a4f23ba8353b3a" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dc_feedback_error_v] @@ -803,6 +832,10 @@ unit = "dB" value = 69.4786 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "27b3b376231732b71a5d8b39ee5a5febb215139e1fad4973363920638a6e6f89" +ac = "5fc56cfcf1f0ec53b4382de4a75fa52b6df57d4dbb6754660016f60eb7c23ac5" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -815,7 +848,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -826,7 +859,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -839,7 +872,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -852,7 +885,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -864,7 +897,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -874,7 +907,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/ac.spice index 46e64626c5fd6885411867bf8fc063bda6c6cec2..ad45433a5e07319c13158e6eee634a709fa6b13f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/ac.spice @@ -17,7 +17,6 @@ XDUT 0 vdd vm vp vout net013 amp_016_song_dacfc CLOAD vout 0 {load_f} .control set noaskquit -set num_threads=1 set numdgt=15 op let dc_feedback_error_v=abs(v(vout)-v(vm)) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/schematic.svg index c39988d5db81d14e535e1a021f2164a815c72858..6966ac9e43484c856276028eab7425ef0159248c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_016_song_dacfc{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_016_song_dacfc","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/circuit.cdl","netlist_sha256":"cc7cee55037a3aa08fbbc4323632ff893f435beea53209e451e1e948293363a4","project_sha256":"97481322099cd6c3a6bcccc3b30d35dad7e9fa7e62a9174ef84856d7ecb12632","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist 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main sheet follows the circuit stages; repeated net names identify matching terminals within each sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Repeated source devices remain individually represented. Large banks use contiguous source-order detail ranges only where needed for responsive editing."],"known_editor_diagnostics":{},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_016_song_dacfc"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/design/amp_016_song_dacfc.icproj.json"}}Main-sheet overview; 40 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_016_song_dacfcvdddm_1voutnnet5vddnet013vb4vinndm_2net31vddnet013vb3vddnet3net70vssvb4subnet54vddnet013vddnet013net31vinpnet049net1subvb3voutnnet85vssvb4subnet85vddvoutnnet049vssvb4subnet063subvb3voutndm_2vddvoutnet4vddnet043net4vdddm_1vddnet4dm_1net050vssvb4subnet56subvb3dm_1net56vddvoutnnet050vdddm_1voutnnet3vinnnet043net1vb4subvb3net54vddnet70net2vssvoutsubnet049vssvb4subdm_2vsssubvssnet043subvdddm_1net70net2vssvb4subnet69vinpnet063net31subvb3net70net69vssnet043subnet049vddvoutnnet5net4subvb3net063vddnet013net1vsssubvb3vddvinnvinpvoutvoutnet013net4vssvssnet70amp_016_song_dacfcC0_0cap_cmimw=31.57u l=31.57um=1C2_0cap_cmimw=21.55u l=21.55um=1XMM0_bank1XMM1_bank2XMM10_bank3XMM11_bank4XMM12_bank5XMM13_bank6XMM14_bank7XMM15_bank8XMM16_bank9XMM17_bank10XMM18_bank11XMM19_bank12XMM2_bank13XMM20_bank14XMM21_bank15XMM22_bank16XMM23_bank17XMM3_bank18XMM4_bank19XMM5_bank20XMM57_bank21XMM58_bank22XMM59_bank23XMM6_bank24XMM60_bank25XMM61_bank26XMM62_bank27XMM63_bank28XMM64_bank29XMM65_bank30XMM68_bank31XMM69_bank32XMM7_bank33XMM70_bank34XMM71_bank35XMM8_bank36XMM9_bank37XXRT40_bank38BIAS REFERENCES AND MIRRORSDIFFERENTIAL INPUT AND CASCODE CORESECOND GAIN STAGE AND AUXILIARY FEEDBACK + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/testbench.spice index 8c4b31b01d944edfe53241a0c2c30e48d68791f8..5b977b4f9852b1acd79f6ea44357f4a1b79fcd66 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/materials/testbench.spice @@ -16,7 +16,6 @@ CLOAD vout 0 {load_f} VMARK timing 0 PWL(0 0 15u 0 15.001u 1 20u 1 20.001u 0 35u 0 35.001u 1 40u 1) .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/problem.md index 5d5c3013999b71f0b0df6b7b97c91f6a1b0e04e2..f86e3fdf4fdb7fbe93d7aef51a002c84d0c8c035 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_016_song_dacfc/problem.md @@ -28,12 +28,7 @@ A disconnected timing marker forces exact integration-window endpoints. Transient starts from the solved DC point; this is not a zero-state supply-ramp startup test. High and return windows are 15–20 and 35–40 us. -AC spans 1 Hz–1 GHz at 200 points/decade. The differential deck retains DC output -feedback through a 1 TH inductor and AC-isolates its bias node with 1 F to ground; -vinp/vinn receive balanced +0.5/-0.5 V small-signal excitation. It verifies residual -input common-mode amplitude <=1 uV and DC feedback mismatch <=1 uV. These are external small-signal bias fixtures, -not physical compensation. The separate closed-loop deck measures actual follower -response. No voltage-transfer estimate is labeled a loop return ratio. +AC sweeps 200 points per decade from 1 Hz to 1 GHz. The differential-mode deck retains output DC feedback through a 1 TH inductor and isolates the bias node from AC through a 1 F capacitor to ground; vinp/vinn use balanced +0.5/-0.5 V small-signal excitation. Input common-mode residual amplitude and DC feedback error must both be <=1 uV. These are external small-signal bias fixtures, not physical compensation; an independent closed-loop deck measures actual follower response and does not call a voltage-transfer estimate a loop return ratio. ## Physical Requirements @@ -47,30 +42,17 @@ IHP native main and maximal DRC use the pinned PDK block profiles, with chip-lev ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. | Metric | Definition | Unit | Treatment | | --- | --- | --- | --- | @@ -87,14 +69,7 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | dc_feedback_error_v | Absolute DC voltage across the external feedback inductor | V | Measurement-validity check, 0–1 uV | | fixture_cm_max | Maximum residual common-mode AC drive | V | Measurement-validity check, 0–1 uV | -All measurements must be finite and complete. Nonnegative supply power and -absolute-error/range values follow their physical domains. The common-mode fixture -bound verifies the differential excitation, not DUT common-mode regulation. The -DC feedback bound rejects a failed bias-isolation solve. Both checks fail the -source or candidate simulation before scoring. These -are the only electrical hard bounds; upstream paper targets are not gates. -Window errors and ripple do not assert settled operation or periodic steady state. -No phase margin, unity crossing, settling time, CMRR, noise, PVT or mismatch is claimed. +All measurements must be finite and complete. Supply power, absolute errors and amplitude ranges must obey their nonnegative physical definitions. The common-mode test-apparatus bound validates differential excitation, rather than DUT common-mode regulation. The DC feedback bound excludes failure of the isolated bias solve. Both apparatus checks apply to source and candidate simulation before scoring. These are this task's hard electrical requirements; upstream paper targets are not acceptance bounds. Window error and ripple do not establish settling or periodic steady state; no phase margin, unity-gain crossing, settling time, CMRR, noise, PVT or mismatch performance is claimed. Quality uses independently simulated same-condition source observations. For gain, q=10^((candidate−source)/20); target q=1/(1+abs(candidate−source)/scale); @@ -110,10 +85,9 @@ for resistor contact/routing envelopes (sheet resistance 1360 ohm), then apply a 50% global routing allowance. This is an engineering estimate, not a foundry minimum. Coefficient 8: An auxiliary differential feed-forward path and active net70 compensation interact with the main amplifier and output dynamics. - ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -133,9 +107,4 @@ Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer Solve budget: **8 hours**. -Use the reviewed IHP SG13G2 resources and the ngspice 45 tools environment. -The runtime `/protocol/task.json` supplies frozen requirements and resource bindings. -Submit `/workspace/output/final.gds` through the session's explicit submission tool; -writing a file alone does not submit it. Evaluation performs artifact, native -DRC/LVS, geometry, candidate RC, independent source and post-layout simulation. -The source baseline, witness and authoring repository are not solver inputs. +Use reviewed IHP SG13G2 resources and the ngspice 45 environment; see `/protocol/task.json` for frozen requirements and resource bindings. Explicitly submit `/workspace/output/final.gds` through the session tool; writing a file alone is insufficient. Evaluation checks files, native DRC/LVS, geometry, candidate RC, independent source simulation and post-layout simulation; source baselines, reference solutions and the author repository are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/case.toml index 2fd86933cc3ec76e4cf2f60e9e9fe82eab300129..dd540a0815a8cfd6d8a2dd771e2c5f06f75a5170 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_021_yan_az" title = "Yan AZ Three-Stage Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "75b91fb960e78ea0fd9e811a73a3e3039fdb711c74b5eca518f8f90ac94c4f45" +sha256 = "879c0c7b889decb6877118adbfc110dc50560c73ebb078c3aa6442e186efb93c" [[assets]] path = "reference/amp_021_yan_az.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "9e46836fc7e0608d651d587cf72df2d2a864b72a75c9c4a2e2ed4d18f2857d86" +sha256 = "e2b9c7534d6866f1cb3ad9924b7f4ff029fa9fcce9d0dc1a122487d0cba6e12b" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "490cbd376da9905b4a78527ec19101306e5a21c01822906a68d15a5cc974394c" subcircuit = "amp_021_yan_az" +sha256 = "490cbd376da9905b4a78527ec19101306e5a21c01822906a68d15a5cc974394c" [task.inputs.simulation] path = "materials/circuit.spice" @@ -447,7 +447,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -456,6 +455,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -506,11 +509,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:late_error_v", @@ -519,15 +521,18 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -536,15 +541,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -553,15 +561,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -570,6 +581,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -578,7 +593,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -587,6 +601,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -642,30 +660,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [task.evaluation.pre_layout] -source_report_sha256 = "10133f8c57f8b9978d9a2058cea6adfde13b73f92b7d1799e13cc9838c8616d8" +source_report_sha256 = "deee25ba38af202141f6f9534280de7e21e2842d3c96a305bafd921342e7d4bb" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"c51e7d8328137de47c71ed49dcd633579b999e8e34e096b94f938007f57d50fd\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -759,6 +783,11 @@ unit = "V" value = 0.8149665376305155 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "868b18fb8fe932f67c57e30199b7d1b11e0b77ff7731061b85d89d651a7672f5" +ac = "75b265dea79b6392d0f4f41aa90329f636b986808ff8a5565436f7de206823a9" +transient = "b706733c2c073ec1634039dc9156d036f81225c1ec0df8b2f37ae61db100ae9b" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -803,6 +832,10 @@ unit = "dB" value = 130.613 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "67ba2f596be2b39a5c15a2d2f69cc9472920911add71970d90d66c3a21b2febe" +ac = "4e5319510a5ff80b8b995f411465f10bc2bd41893bc5d836a90848111752c1cc" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -815,7 +848,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -826,7 +859,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -839,7 +872,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -852,7 +885,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -864,7 +897,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -874,7 +907,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/materials/schematic.svg index 769bf39a522efabd229f5253b745f91723f63efb..5ae2ba89f21dcccc4cdf3d9e81c95ce0c5e52938 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_021_yan_az{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_021_yan_az","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/materials/circuit.cdl","netlist_sha256":"490cbd376da9905b4a78527ec19101306e5a21c01822906a68d15a5cc974394c","project_sha256":"931bfc4c914344bbe57b0b4ccdf169f6dd89c9604f2119e565e922b5531f0f15","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist 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Equal net labels connect.amp_021_yan_azvddvb1vb4net094subnet051vddvb1net078vddvb1vddvoutnvssvb4subdm_2net063net050subnet082vddnet094net050vinpnet019net063vddvb1net019vssnet063subnet082vssvoutsubnet057vddvoutnet050vssnet094subnet057vssvb4subvssvb4net063subvinnnet019dm_2vssnet094subnet051vddnet050voutnvsssubvsssubnet077dm_2vddvoutnnet057subvoutnnet077dm_2net078vddvb1vddvb1vb4vinpnet063net019net063vddnet094net050vddvoutnet050subvoutnnet077dm_2net063net050subnet082voutvsssubnet077dm_2vssnet063subnet082vssnet063voutsubnet057vssvb4subvddvb1net019vssvb4subdm_2vssvb4net063subvssvssnet094subnet051vssnet094subnet057net051vddvb1net078vddvoutnvddnet050voutnvddvoutnnet057vinnnet019dm_2vsssubvssnet094subnet051vssvddvinnvinpvoutvb1net051net078R0_s1net077R0_s1voutnet082amp_021_yan_azEqual net labels connect. All source devices and exact parameters are retained.C0_0cap_cmimw=36.86u l=36.86um=1C0_1cap_cmimw=36.86u l=36.86um=1C1_0cap_cmimw=46.99u l=46.99um=1C1_1cap_cmimw=46.99u l=46.99um=1RR0_0rhighw=.5u l=61.2um=1 b=0Substrate: B=subRR0_1rhighw=.5u l=61.2um=1 b=0Substrate: B=subRR1_0rhighw=.5u l=19.43um=1 b=0Substrate: B=subXMM0_bank1MM0_bank1XMM1_bank2MM1_bank2XMM10_bank3MM10_bank3XMM11_bank4MM11_bank4XMM13_bank5MM13_bank5XMM14_bank6MM14_bank6XMM15_bank7MM15_bank7XMM16_bank8MM16_bank8XMM17_bank9MM17_bank9XMM18_bank10MM18_bank10XMM19_bank11MM19_bank11XMM2_bank12MM2_bank12XMM20_bank13MM20_bank13XMM21_bank14MM21_bank14XMM22_bank15MM22_bank15XMM23_bank16MM23_bank16XMM3_bank17MM3_bank17XMM4_bank18MM4_bank18XMM5_bank19MM5_bank19XMM67_bank20MM67_bank20XMM9_bank21MM9_bank21XXRT20_bank22XRT20_bank22XXRR2_bank23XRR2_bank23 -Main-sheet overview; 23 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_021_yan_az{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_021_yan_az","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_021_yan_az","MM0_bank1","MM1_bank2","MM10_bank3","MM11_bank4","MM13_bank5","MM14_bank6","MM15_bank7","MM16_bank8","MM17_bank9","MM18_bank10","MM19_bank11","MM2_bank12","MM20_bank13","MM21_bank14","MM22_bank15","MM23_bank16","MM3_bank17","MM4_bank18","MM5_bank19","MM67_bank20","MM9_bank21","XRT20_bank22","XRR2_bank23"],"banks":[{"name":"MM0_bank1","devices":8,"source_references":["RT0","MM0_0","RT1","MM0_1","RT2","MM0_2","RT3","MM0_3"]},{"name":"MM1_bank2","devices":8,"source_references":["RT4","MM1_0","RT5","MM1_1","RT6","MM1_2","RT7","MM1_3"]},{"name":"MM10_bank3","devices":8,"source_references":["RT8","MM10_0","RT9","MM10_1","RT10","MM10_2","RT11","MM10_3"]},{"name":"MM11_bank4","devices":8,"source_references":["RT12","MM11_0","RT13","MM11_1","RT14","MM11_2","RT15","MM11_3"]},{"name":"MM13_bank5","devices":8,"source_references":["RT16","MM13_0","RT17","MM13_1","RT18","MM13_2","RT19","MM13_3"]},{"name":"MM14_bank6","devices":4,"source_references":["MM14_0","MM14_1","MM14_2","MM14_3"]},{"name":"MM15_bank7","devices":4,"source_references":["MM15_0","MM15_1","MM15_2","MM15_3"]},{"name":"MM16_bank8","devices":4,"source_references":["MM16_0","MM16_1","MM16_2","MM16_3"]},{"name":"MM17_bank9","devices":4,"source_references":["MM17_0","MM17_1","MM17_2","MM17_3"]},{"name":"MM18_bank10","devices":4,"source_references":["MM18_0","MM18_1","MM18_2","MM18_3"]},{"name":"MM19_bank11","devices":4,"source_references":["MM19_0","MM19_1","MM19_2","MM19_3"]},{"name":"MM2_bank12","devices":16,"source_references":["RT44","MM2_0","RT45","MM2_1","RT46","MM2_2","RT47","MM2_3","RT48","MM2_4","RT49","MM2_5","RT50","MM2_6","RT51","MM2_7"]},{"name":"MM20_bank13","devices":4,"source_references":["MM20_0","MM20_1","MM20_2","MM20_3"]},{"name":"MM21_bank14","devices":4,"source_references":["MM21_0","MM21_1","MM21_2","MM21_3"]},{"name":"MM22_bank15","devices":4,"source_references":["MM22_0","MM22_1","MM22_2","MM22_3"]},{"name":"MM23_bank16","devices":4,"source_references":["MM23_0","MM23_1","MM23_2","MM23_3"]},{"name":"MM3_bank17","devices":32,"source_references":["RT68","MM3_0","RT69","MM3_1","RT70","MM3_2","RT71","MM3_3","RT72","MM3_4","RT73","MM3_5","RT74","MM3_6","RT75","MM3_7","RT76","MM3_8","RT77","MM3_9","RT78","MM3_10","RT79","MM3_11","RT80","MM3_12","RT81","MM3_13","RT82","MM3_14","RT83","MM3_15"]},{"name":"MM4_bank18","devices":8,"source_references":["RT84","MM4_0","RT85","MM4_1","RT86","MM4_2","RT87","MM4_3"]},{"name":"MM5_bank19","devices":8,"source_references":["RT88","MM5_0","RT89","MM5_1","RT90","MM5_2","RT91","MM5_3"]},{"name":"MM67_bank20","devices":8,"source_references":["RT92","MM67_0","RT93","MM67_1","RT94","MM67_2","RT95","MM67_3"]},{"name":"MM9_bank21","devices":8,"source_references":["RT96","MM9_0","RT97","MM9_1","RT98","MM9_2","RT99","MM9_3"]},{"name":"XRT20_bank22","devices":41,"source_references":["RT20","RT21","RT22","RT23","RT24","RT25","RT26","RT27","RT28","RT29","RT30","RT31","RT32","RT33","RT34","RT35","RT36","RT37","RT38","RT39","RT40","RT41","RT42","RT43","RT52","RT53","RT54","RT55","RT56","RT57","RT58","RT59","RT60","RT61","RT62","RT63","RT64","RT65","RT66","RT67","RTSUB"]},{"name":"XRR2_bank23","devices":7,"source_references":["RR2_0","RR2_1","RR2_2","RR2_3","RR2_4","RR2_5","RR2_6"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_021_yan_az"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/design/amp_021_yan_az.icproj.json"}}Main-sheet overview; 23 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_021_yan_azvddvb1vb4net094subnet051vddvb1net078vddvb1vddvoutnvssvb4subdm_2net063net050subnet082vddnet094net050vinpnet019net063vddvb1net019vssnet063subnet082vssvoutsubnet057vddvoutnet050vssnet094subnet057vssvb4subvssvb4net063subvinnnet019dm_2vssnet094subnet051vddnet050voutnvsssubvsssubnet077dm_2vddvoutnnet057subvoutnnet077dm_2net063net094net094net063net078net078net050net050net057net057voutvddvinnvinpvoutvb1net063vssnet077net082net051net078R0_s1amp_021_yan_azC0_0cap_cmimw=36.86u l=36.86um=1C0_1cap_cmimw=36.86u l=36.86um=1C1_0cap_cmimw=46.99u l=46.99um=1C1_1cap_cmimw=46.99u l=46.99um=1RR0_0rhighw=.5u l=61.2uRR0_1RR1_0rhighw=.5u l=19.43uBIAS AND REFERENCEINPUT PAIR AND ACTIVE LOADOUTPUT AND COMPENSATIONXMM0_bank1XMM1_bank2XMM19_bank11XMM2_bank12XMM3_bank17XMM9_bank21XMM10_bank3XMM20_bank13XMM21_bank14XMM16_bank8XMM17_bank9XMM14_bank6XMM15_bank7XMM4_bank18XMM5_bank19XMM67_bank20XMM11_bank4XMM13_bank5XMM18_bank10XMM22_bank15XMM23_bank16XXRT20_bank22XXRR2_bank23 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/problem.md index 768608e118ba5050c87e86551f18a2201a82115a..5e0ab0de41c278350c6908ed7a57e9b597ad304c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_021_yan_az/problem.md @@ -6,7 +6,7 @@ Implement `amp_021_yan_az` without changing the declared circuit. XM9/XM10 form ## Inputs and Interface -`materials/circuit.cdl` is the physical authority; `materials/circuit.spice` is its equivalent simulator representation. `materials/testbench.spice` and `materials/ac.spice` define the transient/closed-AC and balanced open-AC observations. This problem is the description input. The ordered interface is `vss vdd vinn vinp vout vb1`. `vss`/`vdd` are rails, input/output names are signal terminals, and the bias/reference and unloaded monitor ports retain the connections named in the netlist. Independent bias sources and loads belong outside the physical core. +`materials/circuit.cdl` is the authoritative physical circuit and `materials/circuit.spice` its equivalent simulation representation; `materials/testbench.spice` and `materials/ac.spice` define transient/closed-loop AC and balanced open-loop AC, respectively. This statement is the description input. Ordered interface is `vss vdd vinn vinp vout vb1`: `vss`/`vdd` are supply rails; all other signals, bias/reference and unloaded monitor ports retain netlist connections. Independent bias sources and loads remain outside the physical core. W/L are rounded to 10 nm for centred contacts on the 5 nm grid. Every resistor uses native rhigh segments of at most about 250 kOhm; every larger capacitor uses parallel native cap_cmim units of at most about 4 pF. Source simulation retains finite native body-tap models. Native LVS checks physical taps and body connectivity; Magic extraction idealizes well/substrate ties and does not retain their finite resistance. Distributed substrate behavior is outside this model boundary. @@ -14,44 +14,31 @@ W/L are rounded to 10 nm for centred contacts on the 5 nm grid. Every resistor u TT MOS, typical MIM/high-poly, 27 C, 1.5 V supply, 0.3 V input reference, 10 pF output load. The external current sink is i0 vb1 vss 1.0981e-05. A direct unity follower receives a 100 mV step at 2 us with 100 ns edges and 8 us high width; falling starts at 10.1 us and completes at 10.2 us. Observe 0–20 us with 0.5 ns maximum step. Report high-window statistics at 8–10 us and return-window statistics at 18–20 us, not a settling time. The rail is adapted from the authored 1.8 V analysis to the actual IHP LV binding; no transistor sizing campaign is performed. -The transient deck directly connects vinn to vout. The frequency deck closes DC feedback through 1 TH, shunts its remote end by 1 F and injects +0.5/−0.5 V AC at the inputs. This isolates the DC feedback at every measured AC frequency. Residual AC common mode and DC feedback mismatch must each be at most 1 uV; open gain is never inferred from a nearly zero closed-loop input error. +The transient deck directly connects vinn to vout. The frequency-domain deck closes DC feedback through 1 TH, bypasses its far end to ground through 1 F and injects +0.5/−0.5 V AC at the inputs, isolating DC feedback at all measurement frequencies. AC common-mode residual and DC feedback error must both be at most 1 uV; do not infer open-loop gain from near-zero closed-loop input error. -Both decks sweep 1 Hz–1 GHz at 200 points/decade. AC describes the linearization of the verified DC point, not proof of a dynamically stable equilibrium. An explicit rshunt=1e12 (1 TOhm) numerical shunt to ground at each node regularizes otherwise floating extraction/series-capacitor nodes; source and candidate use the identical setting. Sensitivity is checked with 10 TOhm. Supply startup is not simulated: transient starts from the DC operating point, and the no-disturbance interval tests whether that point persists. Use the default sparse solver with the tolerances declared in the decks. +Both decks sweep 200 points per decade from 1 Hz to 1 GHz. AC linearizes a verified DC point and does not prove that equilibrium dynamically stable. Source and candidate both use `rshunt=1e12` (1 TOhm) numerical shunts from each node to ground to handle floating extracted/series-capacitor nodes; sensitivity is checked at 10 TOhm. Power-up startup is not simulated: transient starts at the DC point, and an undisturbed interval checks whether it persists. Use the default sparse solver and deck-declared tolerances. ## Physical Requirements Submit a native SG13G2 GDS with top cell `amp_021_yan_az`, at most 67108864 bytes, within 20000 × 2000 um. Native main and maximal DRC, named-interface LVS and geometry must pass without marker waivers. Keep every MOS, body connection and passive path. Unit multiplicities and the declared passive series/parallel realization are fixed in the materials. -The functional footprint includes active, gate, contact, metal, via, MIM and complete routing shapes; well, text, annotations and nonfunctional markers alone do not define it. The runtime task supplies the exact layer set. Candidate GDS drives native connectivity extraction and distributed wire resistance/ground capacitance extraction, then the same native MOS/MIM/high-poly simulation models used by the source. This nominal MOS/R/C boundary does not assert RF/coupling extraction, PVT, mismatch, noise or manufacturing signoff. +Functional area includes active regions, gates, contacts, metals, vias, MIM devices and all routing. Wells, text, annotations and nonfunctional markers cannot independently define functional area. Runtime task metadata supplies the exact layer set. After native connectivity and distributed wire-resistance/ground-capacitance extraction, simulate the candidate GDS with the same native MOS/MIM/high-poly models as the source. This task's nominal MOS/R/C scope excludes RF/coupling extraction, PVT, mismatch, noise and manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Every declared simulation must complete with finite measurements and complete raw records. Transient means use full-precision cumulative integration with interpolated endpoint corrections; incomplete windows are errors. PP denotes the full finite-window range, including any oscillation or slow drift. No phase margin, loop gain, settling time or periodic steady state is claimed. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +Complete every declared simulation, with finite measurements and complete raw records. Transient means use full-precision cumulative integration and interpolated endpoint corrections; incomplete windows are errors. PP is the range over the entire finite window, including oscillation or slow drift. It does not establish phase margin, loop gain, settling time or periodic steady state. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. | Metric | Unit | Definition | Quality role / functional domain | | --- | --- | --- | --- | @@ -60,10 +47,10 @@ Every declared simulation must complete with finite measurements and complete ra | `gain_db` | dB | Balanced differential open AC gain at 1 Hz | response; db20 | | `gain_10khz_db` | dB | Balanced differential open AC gain at 10 kHz | response; db20 | | `closed_gain_10khz_db` | dB | Direct follower output/signal AC gain at 10 kHz | response; target | -| `late_error_v` | V | Mean absolute follower tracking error, 8–10 us | response; ratio; 0 ≤ value | -| `return_error_v` | V | Mean absolute follower tracking error, 18–20 us | response; ratio; 0 ≤ value | -| `ripple_v` | V | Full output peak-to-peak range, 8–10 us | response; ratio; 0 ≤ value | -| `return_ripple_v` | V | Full output peak-to-peak range, 18–20 us | response; ratio; 0 ≤ value | +| `late_error_v` | V | Mean absolute follower tracking error, 8–10 us | response; saturating_ratio; 0 ≤ value | +| `return_error_v` | V | Mean absolute follower tracking error, 18–20 us | response; saturating_ratio; 0 ≤ value | +| `ripple_v` | V | Full output peak-to-peak range, 8–10 us | response; saturating_ratio; 0 ≤ value | +| `return_ripple_v` | V | Full output peak-to-peak range, 18–20 us | response; saturating_ratio; 0 ≤ value | | `mean_power_w` | W | Time-weighted rail power over 2–20 us; external current-sink implementation excluded | supply; ratio; 0 ≤ value | | `bias_v` | V | External current-bias port DC voltage | diagnostic; unscored | | `high_v` | V | Mean follower output, 8–10 us | diagnostic; unscored | @@ -73,16 +60,15 @@ Every declared simulation must complete with finite measurements and complete ra | `fixture_cm_max` | V | Residual common-mode excitation in the differential AC fixture | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | | `dc_feedback_error_v` | V | DC voltage mismatch across the external feedback inductor | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | -DC bias, 1 Hz/10 kHz differential gain, 10 kHz closed response, tracking error, output range and rail power are distinct observations. +Observe DC bias, differential gain at 1 Hz/10 kHz, closed-loop response at 10 kHz, tracking error, output bounds and supply power separately. Performance is continuously paired with the independently simulated source under exactly the same conditions. Gain quality is 10^((candidate−source)/20); target quality is 1/(1+abs(candidate−source)/scale); inverse-ratio quality is (source+floor)/(candidate+floor). Area quality is Q = 24054.76 um2 / functional area. The bias scale is 1.5 V; closed-response scale is 6 dB (factor two in amplitude). Error/range floors are 1 mV (1% of the 100 mV step); power floor is 1 pW. Physical/domain and fixture-validity gates are not upstream product targets. -The compact-area anchor sums m*((W+2.4)*(L+2.4)+3.2^2) um2 for MOS, 1.2*C/(1.5 fF/um2) for physical capacitor envelopes, and 2*R/(1360 Ohm) um2 for resistor envelopes, then adds 50% global routing allowance. It is an engineering estimate independent of the reference GDS. Coefficient 8 reflects multistage analog routing, active compensation/body connectivity and physical passive matching. - +The compact area benchmark sums MOS envelopes m*((W+2.4)*(L+2.4)+3.2^2) um2, capacitor envelopes 1.2*C/(1.5 fF/um2), and resistor envelopes 2*R/(1360 Ohm) um2, then adds 50% global routing allowance; this is an engineering estimate independent of reference GDS. Coefficient 8 accounts for multistage analog routing, active compensation/body connections and physical passive matching. ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -102,4 +88,4 @@ Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer Solve budget: **8 hours**. -Use the reviewed SG13G2 resources and ngspice 45 tool environment. The runtime `/protocol/task.json` publishes frozen inputs, requirements and tool bindings. Submit `/workspace/output/final.gds` explicitly through the session submission tool; writing the file alone does not submit it. The evaluation executes native checks, candidate-derived RC and independent paired source/post-layout simulations. The reference GDS, maintainer README and development checkout are not solver inputs. +Use the reviewed SG13G2 resources and ngspice 45 environment. Frozen inputs, requirements and tool bindings are in `/protocol/task.json`. Explicitly submit `/workspace/output/final.gds` through the session submission tool; file generation alone is not submission. Evaluation performs native checks, candidate RC extraction and independent paired source/post-layout simulation. Reference GDS, maintainer README and development sources are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/case.toml index d507650c634c672895e8966492c55ac18d748f6a..2d32e4d98d91db37dac21ac03d63ff1636bd7d37 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_022_fer_two_stage" title = "Fer Two-Stage Miller Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "4bad294c3b8cf76f40dc98555e823f0e156d2b6caafb9533c26bbf918c19890c" +sha256 = "cf4e9870a1cc8dedb1ae661d3ef609bfd50b4ae17a62b9b92aed08ee4bebd12b" [[assets]] path = "reference/amp_022_fer_two_stage.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "a47dee16031c295c1caf59b003f6b8b4140c388143edc464fbee87876f303093" +sha256 = "e14138167b8a248977bb8eecf3b3723f444aec1b6bf10372e80b6da8bfe7f2c9" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "2376cfd1faf596940cbb75f9c842a71c603ab59107c0e88575b03a351e5550dc" subcircuit = "amp_022_fer_two_stage" +sha256 = "2376cfd1faf596940cbb75f9c842a71c603ab59107c0e88575b03a351e5550dc" [task.inputs.simulation] path = "materials/circuit.spice" @@ -449,7 +449,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -458,6 +457,10 @@ baseline = [ "source_condition_0:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -508,11 +511,10 @@ baseline = [ id = "late_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:late_error_v", @@ -521,15 +523,18 @@ baseline = [ "source_condition_0:late_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_error_v", @@ -538,15 +543,18 @@ baseline = [ "source_condition_0:return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -555,15 +563,18 @@ baseline = [ "source_condition_0:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_ripple_v" unit = "V" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" direction = "minimize" aggregation = "max" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:return_ripple_v", @@ -572,6 +583,10 @@ baseline = [ "source_condition_0:return_ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -580,7 +595,6 @@ normalization = "ratio" direction = "minimize" aggregation = "max" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -589,6 +603,10 @@ baseline = [ "source_condition_0:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "bias_v" unit = "V" @@ -644,25 +662,31 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "kcl_a" unit = "A" @@ -675,10 +699,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "f003d93119133972e3194f1dc66293842e31b27e8158e9202475e55b70b257d8" +source_report_sha256 = "a8ba629459cdd5996c2e8dc880b0392aa6d60c515a9dec11eb12fd627ee96421" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"0fedc0da83d4183ffc80a4ffcbf9d497a4ac259bc9f0f284082c552e2b149fc0\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -777,6 +801,11 @@ unit = "V" value = 2.14697148948062e-11 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "ec8b41d41f48a532bb1eda312c723d4bad13b1282e05dc31e328bebc4ac1f6e9" +ac = "6873680836536aa4fdfdec0346bc6bb4ee133e04b6c734afadd98687bc2dc561" +transient = "4c074a2627dde98adb3f34603734d95a3651f2c38fb71d49bd90baa8ac480341" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -826,6 +855,10 @@ unit = "dB" value = 1.094401804423162e-14 unit = "A" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "738237c66cbd7a2bacb628cb41ba7c46fc08fe0d2ac00602e21fb9dbf31d9299" +ac = "bdcc6270e25b483560237d07022c0832ff77842b8cced25fa8ae8e67e9e03a93" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -838,7 +871,7 @@ unit = "A" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -849,7 +882,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -862,7 +895,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -875,7 +908,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -887,7 +920,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -897,7 +930,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/materials/schematic.svg index 5b430dbd07bb87e3beff9db180501a466af3b29c..5d2db7b8f94ed749026d2c7fde76fe30a4db48b2 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_022_fer_two_stage{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_022_fer_two_stage","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/materials/circuit.cdl","netlist_sha256":"2376cfd1faf596940cbb75f9c842a71c603ab59107c0e88575b03a351e5550dc","project_sha256":"c56a39f06713f3d86a8a3c6acdb7b85bb4c2c8ccfefe796d56e53d1ba697dcd6","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_022_fer_two_stage","MM0_bank1","MM1_bank2","MM2_bank3","MM6_bank4","XRT10_bank5"],"banks":[{"name":"MM0_bank1","devices":10,"source_references":["RT0","MM0_0","RT1","MM0_1","RT2","MM0_2","RT3","MM0_3","RT4","MM0_4"]},{"name":"MM1_bank2","devices":10,"source_references":["RT5","MM1_0","RT6","MM1_1","RT7","MM1_2","RT8","MM1_3","RT9","MM1_4"]},{"name":"MM2_bank3","devices":24,"source_references":["MM2_0","MM2_1","MM2_2","MM2_3","MM2_4","MM2_5","MM2_6","MM2_7","MM2_8","MM2_9","MM2_10","MM2_11","MM2_12","MM2_13","MM2_14","MM2_15","MM2_16","MM2_17","MM2_18","MM2_19","MM2_20","MM2_21","MM2_22","MM2_23"]},{"name":"MM6_bank4","devices":34,"source_references":["RT41","MM6_0","RT42","MM6_1","RT43","MM6_2","RT44","MM6_3","RT45","MM6_4","RT46","MM6_5","RT47","MM6_6","RT48","MM6_7","RT49","MM6_8","RT50","MM6_9","RT51","MM6_10","RT52","MM6_11","RT53","MM6_12","RT54","MM6_13","RT55","MM6_14","RT56","MM6_15","RT57","MM6_16"]},{"name":"XRT10_bank5","devices":31,"source_references":["RT10","RT11","RT12","RT13","RT14","RT15","RT16","RT17","RT18","RT19","RT20","RT21","RT22","RT23","RT24","RT25","RT26","RT27","RT28","RT29","RT30","RT31","RT32","RT33","RT34","RT35","RT36","RT37","RT61","RT62","RTSUB"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_022_fer_two_stage"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/schematic/amp_022_fer_two_stage.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_022_fer_two_stagevsssubvddvinpcbvoutvssbsubvddvinnacvddvoutpbiasvddwell_38vddcwell_38pbiasavddwell_39vddcpbiaswell_39vddwell_40avddcpbiaswell_40vddwell_58vddpbiaspbiassubwell_58vddwell_59vddpbiaspbiaswell_59vddwell_60vddpbiaspbiaswell_60ibiasvssibiasvsssubibiasvsssubpbiasvoutabvddvinnacvddvinpcbavoutvssbsubvddvoutpbiasvsssubsubvddvoutvinpvinnibiasvssvssabsubvssavssbsubamp_022_fer_two_stageEqual net labels connect. All source devices and exact parameters are retained.MM3_0sg13_lv_nmosw=6u l=0.4um=1MM3_1sg13_lv_nmosw=6u l=0.4um=1MM4_0sg13_lv_nmosw=6u l=0.4um=1MM4_1sg13_lv_nmosw=6u l=0.4um=1RT38ntap1A=4e-12 P=8e-6MM5_0sg13_lv_pmosw=8u l=0.4um=1RT39ntap1A=4e-12 P=8e-6MM5_1sg13_lv_pmosw=8u l=0.4um=1RT40ntap1A=4e-12 P=8e-6MM5_2sg13_lv_pmosw=8u l=0.4um=1RT58ntap1A=4e-12 P=8e-6MM7_0sg13_lv_pmosw=8u l=0.4um=1RT59ntap1A=4e-12 P=8e-6MM7_1sg13_lv_pmosw=8u l=0.4um=1RT60ntap1A=4e-12 P=8e-6MM7_2sg13_lv_pmosw=8u l=0.4um=1MMBDsg13_lv_nmosw=4u l=0.4um=1MMBSsg13_lv_nmosw=4u l=0.4um=1CC_0cap_cmimw=36.46u l=36.46um=1XMM0_bank1MM0_bank1XMM1_bank2MM1_bank2XMM2_bank3MM2_bank3XMM6_bank4MM6_bank4XXRT10_bank5XRT10_bank5 -Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_022_fer_two_stage{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_022_fer_two_stage","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_022_fer_two_stage","MM0_bank1","MM1_bank2","MM2_bank3","MM6_bank4","XRT10_bank5"],"banks":[{"name":"MM0_bank1","devices":10,"source_references":["XRT0","MM0_0","XRT1","MM0_1","XRT2","MM0_2","XRT3","MM0_3","XRT4","MM0_4"]},{"name":"MM1_bank2","devices":10,"source_references":["XRT5","MM1_0","XRT6","MM1_1","XRT7","MM1_2","XRT8","MM1_3","XRT9","MM1_4"]},{"name":"MM2_bank3","devices":24,"source_references":["MM2_0","MM2_1","MM2_2","MM2_3","MM2_4","MM2_5","MM2_6","MM2_7","MM2_8","MM2_9","MM2_10","MM2_11","MM2_12","MM2_13","MM2_14","MM2_15","MM2_16","MM2_17","MM2_18","MM2_19","MM2_20","MM2_21","MM2_22","MM2_23"]},{"name":"MM6_bank4","devices":34,"source_references":["XRT41","MM6_0","XRT42","MM6_1","XRT43","MM6_2","XRT44","MM6_3","XRT45","MM6_4","XRT46","MM6_5","XRT47","MM6_6","XRT48","MM6_7","XRT49","MM6_8","XRT50","MM6_9","XRT51","MM6_10","XRT52","MM6_11","XRT53","MM6_12","XRT54","MM6_13","XRT55","MM6_14","XRT56","MM6_15","XRT57","MM6_16"]},{"name":"XRT10_bank5","devices":31,"source_references":["XRT10","XRT11","XRT12","XRT13","XRT14","XRT15","XRT16","XRT17","XRT18","XRT19","XRT20","XRT21","XRT22","XRT23","XRT24","XRT25","XRT26","XRT27","XRT28","XRT29","XRT30","XRT31","XRT32","XRT33","XRT34","XRT35","XRT36","XRT37","XRT61","XRT62","XRTSUB"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_022_fer_two_stage"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/design/amp_022_fer_two_stage.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_022_fer_two_stagevsssubvddvinpcbvoutvssbsubvddvinnacvddvoutpbiascccsubsubsubsubsubsubsubsubvddwell_38cpbiasawell_39well_40well_58subwell_59well_60ibiasvoutvinnvinpbvssTwo-stage Miller OTAPMOS differential pair · NMOS mirror load · compensated common-source outputMM3_0MM3_1MM4_0MM4_1XRT38MM5_0XRT39MM5_1XRT40MM5_2XRT58MM7_0XRT59MM7_1XRT60MM7_2MMBDMMBSXCC_0XMM0_bank1XMM1_bank2XMM2_bank3XMM6_bank4XXRT10_bank5 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/problem.md index 75fe0b181fd1e4ac486c7543f2030cfd3db902bf..a612da092675724ae4d0bf7c5d8212cee478b851 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_022_fer_two_stage/problem.md @@ -6,11 +6,11 @@ Implement `amp_022_fer_two_stage` as a GDS layout preserving the complete declar ## Inputs and Interface -- `materials/circuit.cdl`: authoritative physical circuit and ordered named interface. -- `materials/circuit.spice`: equivalent source simulation, including physical passives. +- `materials/circuit.cdl`: authoritative physical circuit and ordered interface. +- `materials/circuit.spice`: equivalent source simulation including physical passives. - `materials/testbench.spice`: performance observations. - `materials/ac.spice`: frequency observations. -- `problem.md`: this contract. +- `problem.md`: task description. Ordered ports: `vdd vout vinp vinn ibias vss`. `vss` is ground, `vdd` the positive rail; signal/output and bias/reference ports have the functions and directions specified below. Every named interface must be preserved. Device multipliers are explicitly expanded; series/parallel passive realizations are already declared in the circuit. The reference layout and development source are not solver inputs. @@ -20,46 +20,33 @@ Ordered ports: `vdd vout vinp vinn ibias vss`. `vss` is ground, `vdd` the positi ## Physical Requirements -IHP native standalone-block DRC, named-port LVS and distributed Magic RC extraction. Source simulation retains finite native body-tap models. Native LVS checks physical taps and body connectivity; Magic extraction idealizes well/substrate ties and does not retain their finite resistance. Distributed substrate behavior is outside this model boundary. The functional footprint includes active/poly, passives, all routed metals and vias, excluding text and nonfunctional boundary markers. No DRC waivers are declared. The core topology, body connections and physical compensation are fixed. Geometrically equivalent implementations must retain the named ports and device parameters. Functional bounds are 2000 by 1000 um; they bound the supported block footprint, not electrical quality. +Use native IHP standalone-module DRC, named-port LVS and distributed Magic RC extraction. Source simulation retains finite native body-contact models; LVS checks physical contacts and bodies, while Magic idealizes well/substrate connections, omitting finite contact resistance and distributed substrate behavior. Functional area includes active/poly, passives and all metal/vias, excluding text and nonfunctional boundaries. No DRC waivers; topology, bodies and physical compensation are fixed, and equivalent geometry must preserve ports and device parameters. Maximum outline is 2000 × 1000 um, limiting module scope rather than electrical quality. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Unit | Definition | Assignment | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`late_error_v`, `return_error_v`, `ripple_v` and `return_ripple_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst paired quality; other metrics retain their declared normalization and functional requirements. + +| Metric | Unit | Definition | Purpose | |---|---|---|---| | output_v | V | DC follower output | bias; target (scale 1.5) | | power_w | W | DC rail power, -VDD*I(VDD); includes external reference current drawn from VDD | supply; ratio (scale 1e-12) | | gain_db | dB | Balanced differential open AC gain at 1 Hz | response; db20 | | gain_10khz_db | dB | Balanced differential open AC gain at 10 kHz | response; db20 | | closed_gain_10khz_db | dB | Direct follower output/signal AC gain at 10 kHz | response; target (scale 6) | -| late_error_v | V | Mean absolute follower tracking error, 8–10 us | response; ratio (scale 0.001) | -| return_error_v | V | Mean absolute follower tracking error, 18–20 us | response; ratio (scale 0.001) | -| ripple_v | V | Full output peak-to-peak range, 8–10 us | response; ratio (scale 0.001) | -| return_ripple_v | V | Full output peak-to-peak range, 18–20 us | response; ratio (scale 0.001) | +| late_error_v | V | Mean absolute follower tracking error, 8–10 us | response; saturating_ratio (scale 0.001) | +| return_error_v | V | Mean absolute follower tracking error, 18–20 us | response; saturating_ratio (scale 0.001) | +| ripple_v | V | Full output peak-to-peak range, 8–10 us | response; saturating_ratio (scale 0.001) | +| return_ripple_v | V | Full output peak-to-peak range, 18–20 us | response; saturating_ratio (scale 0.001) | | mean_power_w | W | Time-weighted rail power over 2–20 us; includes external reference current drawn from VDD | supply; ratio (scale 1e-12) | | bias_v | V | External current-bias port DC voltage | diagnostic; unscored | | high_v | V | Mean follower output, 8–10 us | diagnostic; unscored | @@ -70,18 +57,17 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | dc_feedback_error_v | V | DC voltage mismatch across the external feedback inductor | diagnostic; unscored | | kcl_a | A | Absolute external DC current-balance residual; producer validity guard at 10 nA | diagnostic; unscored | -All required jobs must finish with finite valid measurements. The 10 nA DC KCL residual bounds numerical validity; nonnegative power/error/range bounds follow their physical definitions. Additional fixture validity bounds are stated above and in runtime task metadata. There are no data-sheet gain, regulation-accuracy or speed gates. Failed extraction, invalid measurements and missing jobs cannot be replaced by low scores. +Complete every required job with finite, valid measurements. The 10 nA DC KCL residual bounds numerical validity; nonnegative power, error and range requirements follow physical definitions. Other test-apparatus validity conditions are stated above and in runtime task metadata. No datasheet gain, regulation-accuracy or speed bounds are imposed. Extraction failure, invalid measurements or missing jobs cannot be replaced by a low score. -Each scored candidate observation is paired with the independent source observation in the identical condition. Ratio-minimize uses (source+scale)/(candidate+scale); target uses scale/(scale+abs(candidate-source)); db20-maximize uses 10^((candidate-source)/20). Scores are continuous and not capped at 100. Each metric uses its worst same-condition paired quality. Diagnostics are unscored. Source results, not the reference GDS, define performance normalization. The 1 mV error/ripple floors and 1 pW power floors regularize zero values; they are not acceptance tolerances. Target scales use the stated rail/output voltage or differential step amplitude. +Pair candidate observations with independent source observations under matching conditions. Minimizing ratio is (source+scale)/(candidate+scale), target quality is scale/(scale+abs(candidate-source)), and maximizing db20 is 10^((candidate-source)/20). Each metric takes the worst paired quality; score is continuous and not capped at 100. Diagnostics are unscored, and source results define performance baselines. The 1 mV error/ripple floor and 1 pW power floor handle zero values and are not acceptance tolerances; target scales are declared supply/output voltages or differential-step amplitudes. Area anchor: 7022.72 um2. 1.5 times the sum over expanded physical MOS, resistor and capacitor units of (W + 4 um)*(L + 4 um). The 4 um allowances cover local contacts/isolation; 50% covers compact routing. Body taps are covered by the allowance, not counted twice. This is an analytical compact-area anchor, not the witness footprint. Coefficient 6 covers a complete compensated feedback loop with direct-follower recovery. No numerical node shunt is used. No phase margin, unity-gain crossing, noise or settling-time claim is made. - ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -103,7 +89,4 @@ Solve budget: **8 hours**. Use the runtime task/resource discovery interface for the frozen tool image, PDK and declared feedback operations. The evaluator checks the submitted GDS independently and extracts its parasitics. Submit `output/final.gds`, top cell `amp_022_fer_two_stage`; do not submit a source netlist in place of a layout. Keep all named ports. The resource bundle contains the approved open PDK and native EDA tools. -The source and extracted-candidate decks require absolute external DC current -conservation residual `kcl_a <= 1e-08 A`. A larger residual aborts -simulation and produces an evaluator error with unknown score, rather than a -functional rejection. The reported residual is an unscored diagnostic. +Both source and candidate extracted circuits require an absolute external DC current-conservation residual `kcl_a <= 1e-08 A`. Exceeding it terminates simulation with an evaluation error and an unknown score, rather than functional rejection. The residual is diagnostic and unscored. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/case.toml index 3434ad68a644395df8e92aade0f1ffc3dfc919ed..57aee60d523f547d79cb1af16dd978cd1564c888 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_023_fer_fd2s" title = "Two-Stage Fully Differential OTA with RC Common-Mode Feedback" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "e89cef1ac12f61dca7aa3b7a0983dbdf0e2677b88172d1ee3dd5abe6bf95af3e" +sha256 = "81b2add1df46302fa2bb24bbcda161202e81a739f75d58ffea69791ed787594a" [[assets]] path = "reference/amp_023_fer_fd2s.gds" @@ -28,24 +28,29 @@ environment = "ihp-sg13g2-amp_023_fer_fd2s-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "34fa534c5848c5a9408f4422734cdf5f5e2e2fdaa73b744c11777f94a2d288ae" +sha256 = "28418a89100ecb468e897e1cef43cc509ce9a5278a271111938a2f91ba70b48a" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "4c52bdbbe491a400eff644efb33e0e97af38d50073ccb1a5a5a76964931f569c" subcircuit = "amp_023_fer_fd2s" +sha256 = "4c52bdbbe491a400eff644efb33e0e97af38d50073ccb1a5a5a76964931f569c" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +sha256 = "f68bf56fc9bcc7c9beab729cc9daea0e2b242d3fd705cfb7e3287dc1ad30b2c1" [task.inputs.simulation] path = "materials/circuit.spice" format = "spice" sha256 = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" +[task.inputs.performance_85c] +path = "materials/performance_85c.spice" +format = "spice" +sha256 = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" + [task.constraints] quality = [ { id = "area", type = "functional_bbox_area", layers_from = "outline" }, @@ -247,30 +252,31 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 8435.0 -rationale = "Differential amplifier with CMFB: differential recovery 22.5%; common-mode recovery 22.5%; cross-coupling 9%; loop margin 13.5%; AC transfer 9%; bias 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 4000.0 +rationale = "The fixed MIM plates occupy 2870.895 um2; the 4000 um2 integration budget leaves 1129.105 um2 for the amplifier, taps, enclosure and routing and carries 30%. Differential recovery, static common-mode error and common-mode peak response remain distinct quality objectives; the peak is minimized rather than rewarded for matching a nonzero source peak. Bandwidth carries 10%, phase preservation 5%, common-mode-to-differential coupling 10% and mean power 5%. Near-zero late common-mode residuals and repeated operating-point summaries remain diagnostic. The 100 uV differential, 50 mV common-mode and 1 uV coupling goals apply only to the declared loads and hot-temperature check." [task.evaluation.scoring.weights] -functional_area = 0.1 -dm_down_error_v = 0.075 -dm_peak_v = 0.075 -dm_up_error_v = 0.075 -cm_down_error_v = 0.05625 -cm_kick_error_v = 0.05625 -cm_kick_peak_v = 0.05625 -cm_up_error_v = 0.05625 -cm_dm_error_v = 0.045 -dm_cm_error_v = 0.045 -phase_margin_deg = 0.135 -cm_gain_vv = 0.0225 -cm_peak_vv = 0.0225 -dm_gain_db = 0.0225 -unity_hz = 0.0225 -bias_v = 0.015 -output_cm_v = 0.015 -output_dm_v = 0.015 -mean_power_w = 0.045 -power_w = 0.045 +functional_area = 0.3 +dm_down_error_v = 0.1 +dm_peak_v = 0.0 +dm_up_error_v = 0.1 +cm_down_recovery_v = 0.0 +cm_kick_recovery_v = 0.0 +cm_kick_peak_v = 0.1 +cm_up_recovery_v = 0.0 +cm_dm_coupling_v = 0.1 +dm_cm_error_v = 0.0 +phase_margin_deg = 0.05 +cm_gain_vv = 0.0 +cm_peak_vv = 0.0 +dm_gain_db = 0.0 +unity_hz = 0.1 +bias_v = 0.0 +output_cm_v = 0.0 +output_dm_v = 0.0 +mean_power_w = 0.05 +power_w = 0.0 +cm_static_error_v = 0.1 [[task.evaluation.jobs]] id = "artifact" @@ -389,14 +395,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -438,14 +445,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -487,14 +495,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -536,14 +545,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -585,14 +595,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -634,14 +645,15 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" [task.evaluation.jobs.parameters.exports] op = "op.raw" @@ -649,255 +661,618 @@ dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[[task.evaluation.metrics]] -id = "functional_area" -category = "physical" -observations = [ - "geometry:area", -] -unit = "um2" -direction = "minimize" -aggregation = "max" +[[task.evaluation.jobs]] +id = "condition_85c_0" +stage = "simulate" +operation = "circuit.simulate" -[[task.evaluation.metrics]] -id = "output_cm_v" -category = "performance" -observations = [ - "condition_0:output_cm_v", - "condition_1:output_cm_v", - "condition_2:output_cm_v", - "condition_3:output_cm_v", - "condition_4:output_cm_v", - "condition_5:output_cm_v", -] -unit = "V" -dimension = "bias" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:output_cm_v", - "source_condition_1:output_cm_v", - "source_condition_2:output_cm_v", - "source_condition_3:output_cm_v", - "source_condition_4:output_cm_v", - "source_condition_5:output_cm_v", -] -normalization = "target" -scale = 1.2 -lower = 0 -upper = 1.2 +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" -[[task.evaluation.metrics]] -id = "output_dm_v" -category = "performance" -observations = [ - "condition_0:output_dm_v", - "condition_1:output_dm_v", - "condition_2:output_dm_v", - "condition_3:output_dm_v", - "condition_4:output_dm_v", - "condition_5:output_dm_v", -] -unit = "V" -dimension = "bias" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:output_dm_v", - "source_condition_1:output_dm_v", - "source_condition_2:output_dm_v", - "source_condition_3:output_dm_v", - "source_condition_4:output_dm_v", - "source_condition_5:output_dm_v", -] -normalization = "target" -scale = 1.2 +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" -[[task.evaluation.metrics]] -id = "bias_v" -category = "performance" -observations = [ - "condition_0:bias_v", - "condition_1:bias_v", - "condition_2:bias_v", - "condition_3:bias_v", - "condition_4:bias_v", - "condition_5:bias_v", -] -unit = "V" -dimension = "bias" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:bias_v", - "source_condition_1:bias_v", - "source_condition_2:bias_v", - "source_condition_3:bias_v", - "source_condition_4:bias_v", - "source_condition_5:bias_v", -] -normalization = "target" -scale = 1.2 -lower = 0 -upper = 1.2 +[task.evaluation.jobs.parameters.values] +load_f = 1e-12 +step_v = 0.1 +kick_a = 0.0001 -[[task.evaluation.metrics]] -id = "power_w" -category = "performance" -observations = [ - "condition_0:power_w", - "condition_1:power_w", - "condition_2:power_w", - "condition_3:power_w", - "condition_4:power_w", - "condition_5:power_w", -] -unit = "W" -dimension = "supply" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:power_w", - "source_condition_1:power_w", - "source_condition_2:power_w", - "source_condition_3:power_w", - "source_condition_4:power_w", - "source_condition_5:power_w", -] -normalization = "ratio" -lower = 0 -scale = 1e-12 +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[[task.evaluation.metrics]] -id = "dm_gain_db" -category = "performance" -observations = [ - "condition_0:dm_gain_db", - "condition_1:dm_gain_db", - "condition_2:dm_gain_db", - "condition_3:dm_gain_db", - "condition_4:dm_gain_db", - "condition_5:dm_gain_db", -] -unit = "dB" -dimension = "response" -direction = "maximize" -aggregation = "min" -baseline = [ - "source_condition_0:dm_gain_db", - "source_condition_1:dm_gain_db", - "source_condition_2:dm_gain_db", - "source_condition_3:dm_gain_db", - "source_condition_4:dm_gain_db", - "source_condition_5:dm_gain_db", -] -normalization = "db20" +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" -[[task.evaluation.metrics]] -id = "unity_hz" -category = "performance" -observations = [ - "condition_0:unity_hz", - "condition_1:unity_hz", - "condition_2:unity_hz", - "condition_3:unity_hz", - "condition_4:unity_hz", - "condition_5:unity_hz", -] -unit = "Hz" -dimension = "response" -direction = "maximize" -aggregation = "min" -baseline = [ - "source_condition_0:unity_hz", - "source_condition_1:unity_hz", - "source_condition_2:unity_hz", - "source_condition_3:unity_hz", - "source_condition_4:unity_hz", - "source_condition_5:unity_hz", -] -normalization = "ratio" -lower = 0 +[[task.evaluation.jobs]] +id = "condition_85c_1" +stage = "simulate" +operation = "circuit.simulate" -[[task.evaluation.metrics]] -id = "phase_margin_deg" -category = "performance" -observations = [ - "condition_0:phase_margin_deg", - "condition_1:phase_margin_deg", - "condition_2:phase_margin_deg", - "condition_3:phase_margin_deg", - "condition_4:phase_margin_deg", - "condition_5:phase_margin_deg", -] -unit = "deg" -dimension = "response" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:phase_margin_deg", - "source_condition_1:phase_margin_deg", - "source_condition_2:phase_margin_deg", - "source_condition_3:phase_margin_deg", - "source_condition_4:phase_margin_deg", - "source_condition_5:phase_margin_deg", -] -normalization = "target" -scale = 180 -lower = 0 -upper = 180 +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" -[[task.evaluation.metrics]] -id = "cm_gain_vv" -category = "performance" -observations = [ - "condition_0:cm_gain_vv", - "condition_1:cm_gain_vv", - "condition_2:cm_gain_vv", - "condition_3:cm_gain_vv", - "condition_4:cm_gain_vv", - "condition_5:cm_gain_vv", -] -unit = "V/V" -dimension = "response" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:cm_gain_vv", - "source_condition_1:cm_gain_vv", - "source_condition_2:cm_gain_vv", - "source_condition_3:cm_gain_vv", - "source_condition_4:cm_gain_vv", - "source_condition_5:cm_gain_vv", +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 1e-12 +step_v = -0.1 +kick_a = -0.0001 + +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "condition_85c_2" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 5e-12 +step_v = 0.1 +kick_a = 0.0001 + +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "condition_85c_3" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 5e-12 +step_v = -0.1 +kick_a = -0.0001 + +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "condition_85c_4" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 1e-11 +step_v = 0.1 +kick_a = 0.0001 + +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "condition_85c_5" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance_85c" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 1e-11 +step_v = -0.1 +kick_a = -0.0001 + +[task.evaluation.jobs.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", ] -normalization = "target" -scale = 1.0 +unit = "um2" +direction = "minimize" +aggregation = "max" [[task.evaluation.metrics]] -id = "cm_peak_vv" +id = "output_cm_v" category = "performance" observations = [ - "condition_0:cm_peak_vv", - "condition_1:cm_peak_vv", - "condition_2:cm_peak_vv", - "condition_3:cm_peak_vv", - "condition_4:cm_peak_vv", - "condition_5:cm_peak_vv", + "condition_0:output_cm_v", + "condition_1:output_cm_v", + "condition_2:output_cm_v", + "condition_3:output_cm_v", + "condition_4:output_cm_v", + "condition_5:output_cm_v", + "condition_85c_0:output_cm_v", + "condition_85c_1:output_cm_v", + "condition_85c_2:output_cm_v", + "condition_85c_3:output_cm_v", + "condition_85c_4:output_cm_v", + "condition_85c_5:output_cm_v", ] -unit = "V/V" -dimension = "response" +unit = "V" +dimension = "bias" direction = "target" aggregation = "max" baseline = [ - "source_condition_0:cm_peak_vv", - "source_condition_1:cm_peak_vv", - "source_condition_2:cm_peak_vv", - "source_condition_3:cm_peak_vv", - "source_condition_4:cm_peak_vv", - "source_condition_5:cm_peak_vv", + "source_condition_0:output_cm_v", + "source_condition_1:output_cm_v", + "source_condition_2:output_cm_v", + "source_condition_3:output_cm_v", + "source_condition_4:output_cm_v", + "source_condition_5:output_cm_v", + "source_condition_85c_0:output_cm_v", + "source_condition_85c_1:output_cm_v", + "source_condition_85c_2:output_cm_v", + "source_condition_85c_3:output_cm_v", + "source_condition_85c_4:output_cm_v", + "source_condition_85c_5:output_cm_v", ] normalization = "target" -scale = 1.0 +scale = 1.2 + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + +[[task.evaluation.metrics]] +id = "output_dm_v" +category = "performance" +observations = [ + "condition_0:output_dm_v", + "condition_1:output_dm_v", + "condition_2:output_dm_v", + "condition_3:output_dm_v", + "condition_4:output_dm_v", + "condition_5:output_dm_v", +] +unit = "V" +dimension = "bias" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:output_dm_v", + "source_condition_1:output_dm_v", + "source_condition_2:output_dm_v", + "source_condition_3:output_dm_v", + "source_condition_4:output_dm_v", + "source_condition_5:output_dm_v", +] +normalization = "target" +scale = 1.2 + +[[task.evaluation.metrics]] +id = "bias_v" +category = "performance" +observations = [ + "condition_0:bias_v", + "condition_1:bias_v", + "condition_2:bias_v", + "condition_3:bias_v", + "condition_4:bias_v", + "condition_5:bias_v", +] +unit = "V" +dimension = "bias" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:bias_v", + "source_condition_1:bias_v", + "source_condition_2:bias_v", + "source_condition_3:bias_v", + "source_condition_4:bias_v", + "source_condition_5:bias_v", +] +normalization = "target" +scale = 1.2 + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + +[[task.evaluation.metrics]] +id = "power_w" +category = "performance" +observations = [ + "condition_0:power_w", + "condition_1:power_w", + "condition_2:power_w", + "condition_3:power_w", + "condition_4:power_w", + "condition_5:power_w", +] +unit = "W" +dimension = "supply" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:power_w", + "source_condition_1:power_w", + "source_condition_2:power_w", + "source_condition_3:power_w", + "source_condition_4:power_w", + "source_condition_5:power_w", +] +normalization = "ratio" +scale = 1e-12 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + +[[task.evaluation.metrics]] +id = "dm_gain_db" +category = "performance" +observations = [ + "condition_0:dm_gain_db", + "condition_1:dm_gain_db", + "condition_2:dm_gain_db", + "condition_3:dm_gain_db", + "condition_4:dm_gain_db", + "condition_5:dm_gain_db", +] +unit = "dB" +dimension = "response" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_condition_0:dm_gain_db", + "source_condition_1:dm_gain_db", + "source_condition_2:dm_gain_db", + "source_condition_3:dm_gain_db", + "source_condition_4:dm_gain_db", + "source_condition_5:dm_gain_db", +] +normalization = "db20" + +[[task.evaluation.metrics]] +id = "unity_hz" +category = "performance" +observations = [ + "condition_0:unity_hz", + "condition_1:unity_hz", + "condition_2:unity_hz", + "condition_3:unity_hz", + "condition_4:unity_hz", + "condition_5:unity_hz", +] +unit = "Hz" +dimension = "response" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_condition_0:unity_hz", + "source_condition_1:unity_hz", + "source_condition_2:unity_hz", + "source_condition_3:unity_hz", + "source_condition_4:unity_hz", + "source_condition_5:unity_hz", +] +normalization = "ratio" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "phase_margin_deg" +category = "performance" +observations = [ + "condition_0:phase_margin_deg", + "condition_1:phase_margin_deg", + "condition_2:phase_margin_deg", + "condition_3:phase_margin_deg", + "condition_4:phase_margin_deg", + "condition_5:phase_margin_deg", + "condition_85c_0:phase_margin_deg", + "condition_85c_1:phase_margin_deg", + "condition_85c_2:phase_margin_deg", + "condition_85c_3:phase_margin_deg", + "condition_85c_4:phase_margin_deg", + "condition_85c_5:phase_margin_deg", +] +unit = "deg" +dimension = "response" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:phase_margin_deg", + "source_condition_1:phase_margin_deg", + "source_condition_2:phase_margin_deg", + "source_condition_3:phase_margin_deg", + "source_condition_4:phase_margin_deg", + "source_condition_5:phase_margin_deg", + "source_condition_85c_0:phase_margin_deg", + "source_condition_85c_1:phase_margin_deg", + "source_condition_85c_2:phase_margin_deg", + "source_condition_85c_3:phase_margin_deg", + "source_condition_85c_4:phase_margin_deg", + "source_condition_85c_5:phase_margin_deg", +] +normalization = "target" +scale = 10.0 + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." + +[[task.evaluation.metrics]] +id = "cm_gain_vv" +category = "performance" +observations = [ + "condition_0:cm_gain_vv", + "condition_1:cm_gain_vv", + "condition_2:cm_gain_vv", + "condition_3:cm_gain_vv", + "condition_4:cm_gain_vv", + "condition_5:cm_gain_vv", + "condition_85c_0:cm_gain_vv", + "condition_85c_1:cm_gain_vv", + "condition_85c_2:cm_gain_vv", + "condition_85c_3:cm_gain_vv", + "condition_85c_4:cm_gain_vv", + "condition_85c_5:cm_gain_vv", +] +unit = "V/V" +dimension = "response" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:cm_gain_vv", + "source_condition_1:cm_gain_vv", + "source_condition_2:cm_gain_vv", + "source_condition_3:cm_gain_vv", + "source_condition_4:cm_gain_vv", + "source_condition_5:cm_gain_vv", + "source_condition_85c_0:cm_gain_vv", + "source_condition_85c_1:cm_gain_vv", + "source_condition_85c_2:cm_gain_vv", + "source_condition_85c_3:cm_gain_vv", + "source_condition_85c_4:cm_gain_vv", + "source_condition_85c_5:cm_gain_vv", +] +normalization = "target" +scale = 1.0 + +[[task.evaluation.metrics]] +id = "cm_peak_vv" +category = "performance" +observations = [ + "condition_0:cm_peak_vv", + "condition_1:cm_peak_vv", + "condition_2:cm_peak_vv", + "condition_3:cm_peak_vv", + "condition_4:cm_peak_vv", + "condition_5:cm_peak_vv", + "condition_85c_0:cm_peak_vv", + "condition_85c_1:cm_peak_vv", + "condition_85c_2:cm_peak_vv", + "condition_85c_3:cm_peak_vv", + "condition_85c_4:cm_peak_vv", + "condition_85c_5:cm_peak_vv", +] +unit = "V/V" +dimension = "response" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:cm_peak_vv", + "source_condition_1:cm_peak_vv", + "source_condition_2:cm_peak_vv", + "source_condition_3:cm_peak_vv", + "source_condition_4:cm_peak_vv", + "source_condition_5:cm_peak_vv", + "source_condition_85c_0:cm_peak_vv", + "source_condition_85c_1:cm_peak_vv", + "source_condition_85c_2:cm_peak_vv", + "source_condition_85c_3:cm_peak_vv", + "source_condition_85c_4:cm_peak_vv", + "source_condition_85c_5:cm_peak_vv", +] +normalization = "target" +scale = 1.0 [[task.evaluation.metrics]] id = "dm_up_error_v" @@ -922,310 +1297,1350 @@ baseline = [ "source_condition_4:dm_up_error_v", "source_condition_5:dm_up_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 1e-05 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.0001 +rationale = "Aim for at most 100 uV differential error in the declared positive-step recovery window." + +[[task.evaluation.metrics]] +id = "dm_down_error_v" +category = "performance" +observations = [ + "condition_0:dm_down_error_v", + "condition_1:dm_down_error_v", + "condition_2:dm_down_error_v", + "condition_3:dm_down_error_v", + "condition_4:dm_down_error_v", + "condition_5:dm_down_error_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:dm_down_error_v", + "source_condition_1:dm_down_error_v", + "source_condition_2:dm_down_error_v", + "source_condition_3:dm_down_error_v", + "source_condition_4:dm_down_error_v", + "source_condition_5:dm_down_error_v", +] +normalization = "saturating_ratio" +scale = 1e-05 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.0001 +rationale = "Aim for at most 100 uV differential error after the declared return step." + +[[task.evaluation.metrics]] +id = "cm_up_recovery_v" +category = "performance" +observations = [ + "condition_0:cm_up_recovery_v", + "condition_1:cm_up_recovery_v", + "condition_2:cm_up_recovery_v", + "condition_3:cm_up_recovery_v", + "condition_4:cm_up_recovery_v", + "condition_5:cm_up_recovery_v", + "condition_85c_0:cm_up_recovery_v", + "condition_85c_1:cm_up_recovery_v", + "condition_85c_2:cm_up_recovery_v", + "condition_85c_3:cm_up_recovery_v", + "condition_85c_4:cm_up_recovery_v", + "condition_85c_5:cm_up_recovery_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_up_recovery_v", + "source_condition_1:cm_up_recovery_v", + "source_condition_2:cm_up_recovery_v", + "source_condition_3:cm_up_recovery_v", + "source_condition_4:cm_up_recovery_v", + "source_condition_5:cm_up_recovery_v", + "source_condition_85c_0:cm_up_recovery_v", + "source_condition_85c_1:cm_up_recovery_v", + "source_condition_85c_2:cm_up_recovery_v", + "source_condition_85c_3:cm_up_recovery_v", + "source_condition_85c_4:cm_up_recovery_v", + "source_condition_85c_5:cm_up_recovery_v", +] +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[[task.evaluation.metrics]] +id = "cm_down_recovery_v" +category = "performance" +observations = [ + "condition_0:cm_down_recovery_v", + "condition_1:cm_down_recovery_v", + "condition_2:cm_down_recovery_v", + "condition_3:cm_down_recovery_v", + "condition_4:cm_down_recovery_v", + "condition_5:cm_down_recovery_v", + "condition_85c_0:cm_down_recovery_v", + "condition_85c_1:cm_down_recovery_v", + "condition_85c_2:cm_down_recovery_v", + "condition_85c_3:cm_down_recovery_v", + "condition_85c_4:cm_down_recovery_v", + "condition_85c_5:cm_down_recovery_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_down_recovery_v", + "source_condition_1:cm_down_recovery_v", + "source_condition_2:cm_down_recovery_v", + "source_condition_3:cm_down_recovery_v", + "source_condition_4:cm_down_recovery_v", + "source_condition_5:cm_down_recovery_v", + "source_condition_85c_0:cm_down_recovery_v", + "source_condition_85c_1:cm_down_recovery_v", + "source_condition_85c_2:cm_down_recovery_v", + "source_condition_85c_3:cm_down_recovery_v", + "source_condition_85c_4:cm_down_recovery_v", + "source_condition_85c_5:cm_down_recovery_v", +] +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[[task.evaluation.metrics]] +id = "cm_kick_recovery_v" +category = "performance" +observations = [ + "condition_0:cm_kick_recovery_v", + "condition_1:cm_kick_recovery_v", + "condition_2:cm_kick_recovery_v", + "condition_3:cm_kick_recovery_v", + "condition_4:cm_kick_recovery_v", + "condition_5:cm_kick_recovery_v", + "condition_85c_0:cm_kick_recovery_v", + "condition_85c_1:cm_kick_recovery_v", + "condition_85c_2:cm_kick_recovery_v", + "condition_85c_3:cm_kick_recovery_v", + "condition_85c_4:cm_kick_recovery_v", + "condition_85c_5:cm_kick_recovery_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_kick_recovery_v", + "source_condition_1:cm_kick_recovery_v", + "source_condition_2:cm_kick_recovery_v", + "source_condition_3:cm_kick_recovery_v", + "source_condition_4:cm_kick_recovery_v", + "source_condition_5:cm_kick_recovery_v", + "source_condition_85c_0:cm_kick_recovery_v", + "source_condition_85c_1:cm_kick_recovery_v", + "source_condition_85c_2:cm_kick_recovery_v", + "source_condition_85c_3:cm_kick_recovery_v", + "source_condition_85c_4:cm_kick_recovery_v", + "source_condition_85c_5:cm_kick_recovery_v", +] +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[[task.evaluation.metrics]] +id = "cm_kick_peak_v" +category = "performance" +observations = [ + "condition_0:cm_kick_peak_v", + "condition_1:cm_kick_peak_v", + "condition_2:cm_kick_peak_v", + "condition_3:cm_kick_peak_v", + "condition_4:cm_kick_peak_v", + "condition_5:cm_kick_peak_v", + "condition_85c_0:cm_kick_peak_v", + "condition_85c_1:cm_kick_peak_v", + "condition_85c_2:cm_kick_peak_v", + "condition_85c_3:cm_kick_peak_v", + "condition_85c_4:cm_kick_peak_v", + "condition_85c_5:cm_kick_peak_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_kick_peak_v", + "source_condition_1:cm_kick_peak_v", + "source_condition_2:cm_kick_peak_v", + "source_condition_3:cm_kick_peak_v", + "source_condition_4:cm_kick_peak_v", + "source_condition_5:cm_kick_peak_v", + "source_condition_85c_0:cm_kick_peak_v", + "source_condition_85c_1:cm_kick_peak_v", + "source_condition_85c_2:cm_kick_peak_v", + "source_condition_85c_3:cm_kick_peak_v", + "source_condition_85c_4:cm_kick_peak_v", + "source_condition_85c_5:cm_kick_peak_v", +] +normalization = "saturating_ratio" +scale = 0.005 + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + +[task.evaluation.metrics.quality_target] +value = 0.05 +rationale = "Aim for at most 50 mV peak common-mode excursion after the declared common-mode kick." + +[[task.evaluation.metrics]] +id = "dm_peak_v" +category = "performance" +observations = [ + "condition_0:dm_peak_v", + "condition_1:dm_peak_v", + "condition_2:dm_peak_v", + "condition_3:dm_peak_v", + "condition_4:dm_peak_v", + "condition_5:dm_peak_v", +] +unit = "V" +dimension = "response" +direction = "target" +aggregation = "max" +baseline = [ + "source_condition_0:dm_peak_v", + "source_condition_1:dm_peak_v", + "source_condition_2:dm_peak_v", + "source_condition_3:dm_peak_v", + "source_condition_4:dm_peak_v", + "source_condition_5:dm_peak_v", +] +normalization = "target" +scale = 1.2 + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + +[[task.evaluation.metrics]] +id = "mean_power_w" +category = "performance" +observations = [ + "condition_0:mean_power_w", + "condition_1:mean_power_w", + "condition_2:mean_power_w", + "condition_3:mean_power_w", + "condition_4:mean_power_w", + "condition_5:mean_power_w", +] +unit = "W" +dimension = "supply" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:mean_power_w", + "source_condition_1:mean_power_w", + "source_condition_2:mean_power_w", + "source_condition_3:mean_power_w", + "source_condition_4:mean_power_w", + "source_condition_5:mean_power_w", +] +normalization = "ratio" +scale = 1e-12 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + +[[task.evaluation.metrics]] +id = "dm_cm_error_v" +category = "performance" +observations = [ + "condition_0:dm_cm_error_v", + "condition_1:dm_cm_error_v", + "condition_2:dm_cm_error_v", + "condition_3:dm_cm_error_v", + "condition_4:dm_cm_error_v", + "condition_5:dm_cm_error_v", + "condition_85c_0:dm_cm_error_v", + "condition_85c_1:dm_cm_error_v", + "condition_85c_2:dm_cm_error_v", + "condition_85c_3:dm_cm_error_v", + "condition_85c_4:dm_cm_error_v", + "condition_85c_5:dm_cm_error_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:dm_cm_error_v", + "source_condition_1:dm_cm_error_v", + "source_condition_2:dm_cm_error_v", + "source_condition_3:dm_cm_error_v", + "source_condition_4:dm_cm_error_v", + "source_condition_5:dm_cm_error_v", + "source_condition_85c_0:dm_cm_error_v", + "source_condition_85c_1:dm_cm_error_v", + "source_condition_85c_2:dm_cm_error_v", + "source_condition_85c_3:dm_cm_error_v", + "source_condition_85c_4:dm_cm_error_v", + "source_condition_85c_5:dm_cm_error_v", +] +normalization = "saturating_ratio" +scale = 1e-06 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[[task.evaluation.metrics]] +id = "cm_dm_coupling_v" +category = "performance" +observations = [ + "condition_0:cm_dm_coupling_v", + "condition_1:cm_dm_coupling_v", + "condition_2:cm_dm_coupling_v", + "condition_3:cm_dm_coupling_v", + "condition_4:cm_dm_coupling_v", + "condition_5:cm_dm_coupling_v", + "condition_85c_0:cm_dm_coupling_v", + "condition_85c_1:cm_dm_coupling_v", + "condition_85c_2:cm_dm_coupling_v", + "condition_85c_3:cm_dm_coupling_v", + "condition_85c_4:cm_dm_coupling_v", + "condition_85c_5:cm_dm_coupling_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_dm_coupling_v", + "source_condition_1:cm_dm_coupling_v", + "source_condition_2:cm_dm_coupling_v", + "source_condition_3:cm_dm_coupling_v", + "source_condition_4:cm_dm_coupling_v", + "source_condition_5:cm_dm_coupling_v", + "source_condition_85c_0:cm_dm_coupling_v", + "source_condition_85c_1:cm_dm_coupling_v", + "source_condition_85c_2:cm_dm_coupling_v", + "source_condition_85c_3:cm_dm_coupling_v", + "source_condition_85c_4:cm_dm_coupling_v", + "source_condition_85c_5:cm_dm_coupling_v", +] +normalization = "saturating_ratio" +scale = 1e-07 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 1e-06 +rationale = "Aim for no more than 1 uV differential coupling from the declared common-mode disturbance." + +[[task.evaluation.metrics]] +id = "dm_high_v" +category = "performance" +observations = [ + "condition_0:dm_high_v", + "condition_1:dm_high_v", + "condition_2:dm_high_v", + "condition_3:dm_high_v", + "condition_4:dm_high_v", + "condition_5:dm_high_v", +] +unit = "V" +direction = "maximize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "cm_high_v" +category = "performance" +observations = [ + "condition_0:cm_high_v", + "condition_1:cm_high_v", + "condition_2:cm_high_v", + "condition_3:cm_high_v", + "condition_4:cm_high_v", + "condition_5:cm_high_v", +] +unit = "V" +direction = "maximize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "cm_static_error_v" +category = "performance" +observations = [ + "condition_0:cm_static_error_v", + "condition_1:cm_static_error_v", + "condition_2:cm_static_error_v", + "condition_3:cm_static_error_v", + "condition_4:cm_static_error_v", + "condition_5:cm_static_error_v", + "condition_85c_0:cm_static_error_v", + "condition_85c_1:cm_static_error_v", + "condition_85c_2:cm_static_error_v", + "condition_85c_3:cm_static_error_v", + "condition_85c_4:cm_static_error_v", + "condition_85c_5:cm_static_error_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_condition_0:cm_static_error_v", + "source_condition_1:cm_static_error_v", + "source_condition_2:cm_static_error_v", + "source_condition_3:cm_static_error_v", + "source_condition_4:cm_static_error_v", + "source_condition_5:cm_static_error_v", + "source_condition_85c_0:cm_static_error_v", + "source_condition_85c_1:cm_static_error_v", + "source_condition_85c_2:cm_static_error_v", + "source_condition_85c_3:cm_static_error_v", + "source_condition_85c_4:cm_static_error_v", + "source_condition_85c_5:cm_static_error_v", +] +normalization = "saturating_ratio" +scale = 0.005 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.05 +rationale = "Aim for at most 50 mV worst static common-mode error under the declared common-mode command conditions." + +[task.evaluation.pre_layout] +source_report_sha256 = "e39ae2d21c159595d4fdf57d998882fc8729fae728ab6ab4369ac46546b8c6c7" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_condition_0] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_condition_0.inputs] +deck = "input:performance" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_condition_0.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_condition_0.parameters.values] +load_f = 1e-12 +step_v = 0.1 +kick_a = 0.0001 + +[task.evaluation.pre_layout.jobs.source_condition_0.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] +deck = "f68bf56fc9bcc7c9beab729cc9daea0e2b242d3fd705cfb7e3287dc1ad30b2c1" +dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] +value = 0.3867579161192 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_dm_coupling_v] +value = 1.250384e-07 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_down_recovery_v] +value = 4.324809e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_gain_vv] +value = 1.064286 +unit = "V/V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_high_v] +value = 0.808071 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_kick_peak_v] +value = 0.02568761 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_kick_recovery_v] +value = 4.141238e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_peak_vv] +value = 1.083292 +unit = "V/V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_static_error_v] +value = 0.008070968945495 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_up_recovery_v] +value = 3.199943e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_cm_error_v] +value = 8.399948e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_down_error_v] +value = 7.299716e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_gain_db] +value = 61.6623 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_high_v] +value = 0.09991732 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_peak_v] +value = 0.1000001 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_up_error_v] +value = 8.268386e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.mean_power_w] +value = 0.0005715061 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.output_cm_v] +value = 0.7536908624253 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.output_dm_v] +value = -1.60649271663e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.phase_margin_deg] +value = 101.69952 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.power_w] +value = 0.0005720080852394 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_condition_0.measurements.unity_hz] +value = 24605670.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "2417cbe73a62be9455e353513a257127190dd2ad03ed78f1d09b47e2b4f469bd" +dm = "a996f39ac23cc4e0a2651693061a7d0680348456329ffa5e48224cc3c8ebd909" +cm = "f583f6bd8c03d55bc762794064f9265373a1dfbb47ea07b8bf0872dbfbe66afe" +transient = "6404a1dda7bcf9556de06239552617f4056572c9347b6afed2e931a949574a32" + +[task.evaluation.pre_layout.jobs.source_condition_1] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_condition_1.inputs] +deck = "input:performance" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_condition_1.outputs] +op = "ngspice-raw" +dm = "ngspice-raw" +cm = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_condition_1.parameters.values] +load_f = 1e-12 +step_v = -0.1 +kick_a = -0.0001 + +[task.evaluation.pre_layout.jobs.source_condition_1.parameters.measurements] +output_cm_v = "V" +output_dm_v = "V" +bias_v = "V" +power_w = "W" +dm_gain_db = "dB" +unity_hz = "Hz" +phase_margin_deg = "deg" +cm_gain_vv = "V/V" +cm_peak_vv = "V/V" +dm_high_v = "V" +dm_up_error_v = "V" +dm_down_error_v = "V" +cm_high_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" +cm_kick_peak_v = "V" +dm_peak_v = "V" +mean_power_w = "W" +dm_cm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.parameters.exports] +op = "op.raw" +dm = "dm.raw" +cm = "cm.raw" +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] +deck = "f68bf56fc9bcc7c9beab729cc9daea0e2b242d3fd705cfb7e3287dc1ad30b2c1" +dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] +value = 0.3867579161192 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_dm_coupling_v] +value = 1.250399e-07 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_down_recovery_v] +value = 4.232195e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_gain_vv] +value = 1.064286 +unit = "V/V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_high_v] +value = 0.808071 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_kick_peak_v] +value = 0.04961229 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_kick_recovery_v] +value = 7.255458e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_peak_vv] +value = 1.083292 +unit = "V/V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_static_error_v] +value = 0.008070968928635 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_up_recovery_v] +value = 3.306007e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_cm_error_v] +value = 8.399948e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_down_error_v] +value = 7.364109e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_gain_db] +value = 61.6623 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_high_v] +value = -0.09991732 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_peak_v] +value = 0.1000001 +unit = "V" + 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"f68bf56fc9bcc7c9beab729cc9daea0e2b242d3fd705cfb7e3287dc1ad30b2c1" +dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.bias_v] +value = 0.3867579161192 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_dm_coupling_v] +value = 1.250441e-07 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_down_recovery_v] +value = 4.264219e-10 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_gain_vv] +value = 1.064286 +unit = "V/V" -[[task.evaluation.metrics]] -id = "dm_down_error_v" -category = "performance" -observations = [ - "condition_0:dm_down_error_v", - "condition_1:dm_down_error_v", - "condition_2:dm_down_error_v", - "condition_3:dm_down_error_v", - "condition_4:dm_down_error_v", - "condition_5:dm_down_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_high_v] +value = 0.808071 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:dm_down_error_v", - "source_condition_1:dm_down_error_v", - "source_condition_2:dm_down_error_v", - "source_condition_3:dm_down_error_v", - "source_condition_4:dm_down_error_v", - "source_condition_5:dm_down_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "cm_up_error_v" -category = "performance" -observations = [ - "condition_0:cm_up_error_v", - "condition_1:cm_up_error_v", - "condition_2:cm_up_error_v", - "condition_3:cm_up_error_v", - "condition_4:cm_up_error_v", - "condition_5:cm_up_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_kick_peak_v] +value = 0.04138657 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:cm_up_error_v", - "source_condition_1:cm_up_error_v", - "source_condition_2:cm_up_error_v", - "source_condition_3:cm_up_error_v", - "source_condition_4:cm_up_error_v", - "source_condition_5:cm_up_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "cm_down_error_v" -category = "performance" -observations = [ - "condition_0:cm_down_error_v", - "condition_1:cm_down_error_v", - "condition_2:cm_down_error_v", - "condition_3:cm_down_error_v", - "condition_4:cm_down_error_v", - "condition_5:cm_down_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_kick_recovery_v] +value = 7.88961e-10 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:cm_down_error_v", - "source_condition_1:cm_down_error_v", - "source_condition_2:cm_down_error_v", - "source_condition_3:cm_down_error_v", - "source_condition_4:cm_down_error_v", - "source_condition_5:cm_down_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "cm_kick_error_v" -category = "performance" -observations = [ - "condition_0:cm_kick_error_v", - "condition_1:cm_kick_error_v", - "condition_2:cm_kick_error_v", - "condition_3:cm_kick_error_v", - "condition_4:cm_kick_error_v", - "condition_5:cm_kick_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_peak_vv] +value = 1.125353 +unit = "V/V" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_static_error_v] +value = 0.008070968928635 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:cm_kick_error_v", - "source_condition_1:cm_kick_error_v", - "source_condition_2:cm_kick_error_v", - "source_condition_3:cm_kick_error_v", - "source_condition_4:cm_kick_error_v", - "source_condition_5:cm_kick_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "cm_kick_peak_v" -category = "performance" -observations = [ - "condition_0:cm_kick_peak_v", - "condition_1:cm_kick_peak_v", - "condition_2:cm_kick_peak_v", - "condition_3:cm_kick_peak_v", - "condition_4:cm_kick_peak_v", - "condition_5:cm_kick_peak_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_up_recovery_v] +value = 3.368333e-10 unit = "V" -dimension = "response" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:cm_kick_peak_v", - "source_condition_1:cm_kick_peak_v", - "source_condition_2:cm_kick_peak_v", - "source_condition_3:cm_kick_peak_v", - "source_condition_4:cm_kick_peak_v", - "source_condition_5:cm_kick_peak_v", -] -normalization = "target" -scale = 1.2 -lower = 0 -upper = 1.2 -[[task.evaluation.metrics]] -id = "dm_peak_v" -category = "performance" -observations = [ - "condition_0:dm_peak_v", - "condition_1:dm_peak_v", - "condition_2:dm_peak_v", - "condition_3:dm_peak_v", - "condition_4:dm_peak_v", - "condition_5:dm_peak_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_cm_error_v] +value = 8.399948e-05 unit = "V" -dimension = "response" -direction = "target" -aggregation = "max" -baseline = [ - "source_condition_0:dm_peak_v", - "source_condition_1:dm_peak_v", - "source_condition_2:dm_peak_v", - "source_condition_3:dm_peak_v", - "source_condition_4:dm_peak_v", - "source_condition_5:dm_peak_v", -] -normalization = "target" -scale = 1.2 -lower = 0 -upper = 1.2 -[[task.evaluation.metrics]] -id = "mean_power_w" -category = "performance" -observations = [ - "condition_0:mean_power_w", - "condition_1:mean_power_w", - "condition_2:mean_power_w", - "condition_3:mean_power_w", - "condition_4:mean_power_w", - "condition_5:mean_power_w", -] -unit = "W" -dimension = "supply" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:mean_power_w", - "source_condition_1:mean_power_w", - "source_condition_2:mean_power_w", - "source_condition_3:mean_power_w", - "source_condition_4:mean_power_w", - "source_condition_5:mean_power_w", -] -normalization = "ratio" -lower = 0 -scale = 1e-12 +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_down_error_v] +value = 3.300693e-13 +unit = "V" -[[task.evaluation.metrics]] -id = "dm_cm_error_v" -category = "performance" -observations = [ - "condition_0:dm_cm_error_v", - "condition_1:dm_cm_error_v", - "condition_2:dm_cm_error_v", - "condition_3:dm_cm_error_v", - "condition_4:dm_cm_error_v", - "condition_5:dm_cm_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_gain_db] +value = 61.6623 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_high_v] +value = -0.09991732 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:dm_cm_error_v", - "source_condition_1:dm_cm_error_v", - "source_condition_2:dm_cm_error_v", - "source_condition_3:dm_cm_error_v", - "source_condition_4:dm_cm_error_v", - "source_condition_5:dm_cm_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "cm_dm_error_v" -category = "performance" -observations = [ - "condition_0:cm_dm_error_v", - "condition_1:cm_dm_error_v", - "condition_2:cm_dm_error_v", - "condition_3:cm_dm_error_v", - "condition_4:cm_dm_error_v", - "condition_5:cm_dm_error_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_peak_v] +value = 0.1020541 unit = "V" -dimension = "response" -direction = "minimize" -aggregation = "max" -baseline = [ - "source_condition_0:cm_dm_error_v", - "source_condition_1:cm_dm_error_v", - "source_condition_2:cm_dm_error_v", - "source_condition_3:cm_dm_error_v", - "source_condition_4:cm_dm_error_v", - "source_condition_5:cm_dm_error_v", -] -normalization = "ratio" -lower = 0 -scale = 1e-06 -[[task.evaluation.metrics]] -id = "dm_high_v" -category = "performance" -observations = [ - "condition_0:dm_high_v", - "condition_1:dm_high_v", - "condition_2:dm_high_v", - "condition_3:dm_high_v", - "condition_4:dm_high_v", - "condition_5:dm_high_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_up_error_v] +value = 8.268386e-05 unit = "V" -direction = "maximize" -aggregation = "max" -[[task.evaluation.metrics]] -id = "cm_high_v" -category = "performance" -observations = [ - "condition_0:cm_high_v", - "condition_1:cm_high_v", - "condition_2:cm_high_v", - "condition_3:cm_high_v", - "condition_4:cm_high_v", - "condition_5:cm_high_v", -] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.mean_power_w] +value = 0.0005715175 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.output_cm_v] +value = 0.7536908624253 unit = "V" -direction = "maximize" -aggregation = "max" -[task.evaluation.pre_layout] -source_report_sha256 = "780d9ce4ea2693a6a0bd1ce971a80aa73de649e93d5f0453fd77ec71ffa53d51" +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.output_dm_v] +value = -1.60649271663e-13 +unit = "V" -[task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"731db86ff0798d3fe46131c06828cbe1f95fc67014c3ee09d902ab85cd83dd9e\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.phase_margin_deg] +value = 72.8372 +unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_0] +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.power_w] +value = 0.0005720080852394 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_condition_5.measurements.unity_hz] +value = 20703970.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "2417cbe73a62be9455e353513a257127190dd2ad03ed78f1d09b47e2b4f469bd" +dm = "e5481a3d55eac96fde3053bc4848ea8e8028e442b697fa5da8ec98d52adddd82" +cm = "b1d20b96358d571c315375c8bc538a4274155bdaf59eee3c5fb4a99c2be78cbe" +transient = "d6845bd5f28ed29efc378ecc05bc7a8a78048e60bd6aa821a45f1ffa0d298beb" + +[task.evaluation.pre_layout.jobs.source_condition_85c_0] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_0.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_0.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_0.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_0.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_0.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_0.parameters.values] load_f = 1e-12 step_v = 0.1 kick_a = 0.0001 -[task.evaluation.pre_layout.jobs.source_condition_0.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_0.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1239,128 +2654,139 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_0.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_0.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_dm_coupling_v] +value = 1.306495e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_down_error_v] -value = 0.003946135 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_down_recovery_v] +value = 8.398815e-11 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_kick_error_v] -value = 0.003690863 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_kick_peak_v] +value = 0.03454865 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_kick_peak_v] -value = 0.02854913 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_kick_recovery_v] +value = 1.009318e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_peak_vv] -value = 1.083292 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_peak_vv] +value = 1.251894 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_static_error_v] +value = 0.04707556539944 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.cm_up_recovery_v] +value = 3.292701e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_down_error_v] -value = 7.299716e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_down_error_v] +value = 4.685141e-14 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_high_v] -value = 0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_high_v] +value = 0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_peak_v] -value = 0.1000001 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_peak_v] +value = 0.09999178 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.mean_power_w] -value = 0.0005715061 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.mean_power_w] +value = 0.0005838733 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.phase_margin_deg] -value = 101.69952 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.phase_margin_deg] +value = 95.92162 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_0.measurements.unity_hz] -value = 24605670.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_0.measurements.unity_hz] +value = 21303380.0 unit = "Hz" -[task.evaluation.pre_layout.jobs.source_condition_1] +[task.evaluation.pre_layout.jobs.source_condition_85c_0.output_sha256] +op = "ae2a16bbaaa58a8b5de698998f5244b9c65e801e373e2d422f009cafd7b7d720" +dm = "45f28c246884b379ffea6528951a76a6ed603f1319616edea1c24ab34a0e5e33" +cm = "c4ba4412627e726de0674d9232b2b7787a04f60b782d42a119e57fb0e8548959" +transient = "63a69de14e86cc006d7f1308394df6ce6e44e2139d63d1eb77635d18c7277422" + +[task.evaluation.pre_layout.jobs.source_condition_85c_1] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_1.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_1.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_1.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_1.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_1.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_1.parameters.values] load_f = 1e-12 step_v = -0.1 kick_a = -0.0001 -[task.evaluation.pre_layout.jobs.source_condition_1.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_1.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1374,128 +2800,139 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_1.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_1.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_dm_coupling_v] +value = 1.306495e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_down_error_v] -value = 0.003946135 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_down_recovery_v] +value = 5.382084e-11 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_kick_error_v] -value = 0.003690862 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_kick_peak_v] +value = 0.06010043 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_kick_peak_v] -value = 0.04855971 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_kick_recovery_v] +value = 1.56553e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_peak_vv] -value = 1.083292 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_peak_vv] +value = 1.251894 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_static_error_v] +value = 0.04707556539984 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.cm_up_recovery_v] +value = 3.302509e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_down_error_v] -value = 7.364109e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_down_error_v] +value = 7.691625e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_high_v] -value = -0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_high_v] +value = -0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_peak_v] -value = 0.1000001 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_peak_v] +value = 0.09999178 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.mean_power_w] -value = 0.0005715153 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.mean_power_w] +value = 0.0005838847 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.phase_margin_deg] -value = 101.69952 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.phase_margin_deg] +value = 95.92162 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_1.measurements.unity_hz] -value = 24605670.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_1.measurements.unity_hz] +value = 21303380.0 unit = "Hz" -[task.evaluation.pre_layout.jobs.source_condition_2] +[task.evaluation.pre_layout.jobs.source_condition_85c_1.output_sha256] +op = "ae2a16bbaaa58a8b5de698998f5244b9c65e801e373e2d422f009cafd7b7d720" +dm = "45f28c246884b379ffea6528951a76a6ed603f1319616edea1c24ab34a0e5e33" +cm = "c4ba4412627e726de0674d9232b2b7787a04f60b782d42a119e57fb0e8548959" +transient = "c4f21013b362bc61ad9bf0df6c18716111fceeba64d6003ef4d96554c7e94543" + +[task.evaluation.pre_layout.jobs.source_condition_85c_2] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_2.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_2.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_2.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_2.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_2.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_2.parameters.values] load_f = 5e-12 step_v = 0.1 kick_a = 0.0001 -[task.evaluation.pre_layout.jobs.source_condition_2.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_2.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1509,128 +2946,139 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_2.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_2.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_dm_coupling_v] +value = 1.306494e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_down_error_v] -value = 0.004190717 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_down_recovery_v] +value = 9.357604e-11 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_kick_error_v] -value = 0.003690863 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_kick_peak_v] +value = 0.0326406 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_kick_peak_v] -value = 0.02788354 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_kick_recovery_v] +value = 1.11577e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_peak_vv] -value = 1.09619 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_peak_vv] +value = 1.26141 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_static_error_v] +value = 0.04707556539944 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.cm_up_recovery_v] +value = 3.075168e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_down_error_v] -value = 4.189982e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_down_error_v] +value = 3.238521e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_high_v] -value = 0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_high_v] +value = 0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_peak_v] -value = 0.100057 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_peak_v] +value = 0.1000456 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.mean_power_w] -value = 0.0005715065 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.mean_power_w] +value = 0.0005838725 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.phase_margin_deg] -value = 86.50929 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.phase_margin_deg] +value = 81.31511 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_2.measurements.unity_hz] -value = 23159140.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_2.measurements.unity_hz] +value = 20102410.0 unit = "Hz" -[task.evaluation.pre_layout.jobs.source_condition_3] +[task.evaluation.pre_layout.jobs.source_condition_85c_2.output_sha256] +op = "0869fe27bf98e4894ce811474434b7ae4b479215e6ec3ce189a7c44d35d20256" +dm = "b008d31e6e990613da2c805368cc2a0aab5697de1c46ebda40fa8c280a049593" +cm = "c6e41e9bb56d6f22c9c05d8b70ad47512e275950f9d8398dc2b65e3571ffc45b" +transient = "e776f1cb17010925aa304595c346435713ae1db429c35323c5d9d31f5716d123" + +[task.evaluation.pre_layout.jobs.source_condition_85c_3] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_3.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_3.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_3.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_3.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_3.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_3.parameters.values] load_f = 5e-12 step_v = -0.1 kick_a = -0.0001 -[task.evaluation.pre_layout.jobs.source_condition_3.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_3.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1644,128 +3092,139 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_3.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_3.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_dm_coupling_v] +value = 1.306494e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_down_error_v] -value = 0.004190717 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_down_recovery_v] +value = 6.361567e-11 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_kick_error_v] -value = 0.003690862 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_kick_peak_v] +value = 0.05602258 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_kick_peak_v] -value = 0.04514619 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_kick_recovery_v] +value = 2.000429e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_peak_vv] -value = 1.09619 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_peak_vv] +value = 1.26141 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_static_error_v] +value = 0.04707556539984 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.cm_up_recovery_v] +value = 3.053897e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_down_error_v] -value = 3.539391e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_down_error_v] +value = 2.928768e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_high_v] -value = -0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_high_v] +value = -0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_peak_v] -value = 0.100057 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_peak_v] +value = 0.1000456 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.mean_power_w] -value = 0.0005715163 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.mean_power_w] +value = 0.0005838847 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.phase_margin_deg] -value = 86.50929 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.phase_margin_deg] +value = 81.31511 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_3.measurements.unity_hz] -value = 23159140.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_3.measurements.unity_hz] +value = 20102410.0 unit = "Hz" -[task.evaluation.pre_layout.jobs.source_condition_4] +[task.evaluation.pre_layout.jobs.source_condition_85c_3.output_sha256] +op = "0869fe27bf98e4894ce811474434b7ae4b479215e6ec3ce189a7c44d35d20256" +dm = "b008d31e6e990613da2c805368cc2a0aab5697de1c46ebda40fa8c280a049593" +cm = "c6e41e9bb56d6f22c9c05d8b70ad47512e275950f9d8398dc2b65e3571ffc45b" +transient = "93cdb0c22ddfb66d22ba3378ddb1ae8e889c19986b94dd9147480cc603100cfa" + +[task.evaluation.pre_layout.jobs.source_condition_85c_4] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_4.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_4.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_4.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_4.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_4.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_4.parameters.values] load_f = 1e-11 step_v = 0.1 kick_a = 0.0001 -[task.evaluation.pre_layout.jobs.source_condition_4.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_4.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1779,128 +3238,139 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_4.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_4.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_4.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_dm_coupling_v] +value = 1.306493e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_down_error_v] -value = 0.004627371 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_down_recovery_v] +value = 1.039885e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_kick_error_v] -value = 0.003690863 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_kick_peak_v] +value = 0.03009628 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_kick_peak_v] -value = 0.02614724 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_kick_recovery_v] +value = 1.086323e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_peak_vv] -value = 1.125353 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_peak_vv] +value = 1.289158 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_static_error_v] +value = 0.04707556539944 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.cm_up_recovery_v] +value = 1.135575e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_down_error_v] -value = 2.475797e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_down_error_v] +value = 1.94178e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_high_v] -value = 0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_high_v] +value = 0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_peak_v] -value = 0.1020541 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_peak_v] +value = 0.1037881 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.mean_power_w] -value = 0.0005715069 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.mean_power_w] +value = 0.0005838714 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.phase_margin_deg] -value = 72.8372 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.phase_margin_deg] +value = 68.3147 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_4.measurements.unity_hz] -value = 20703970.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_4.measurements.unity_hz] +value = 18058980.0 unit = "Hz" -[task.evaluation.pre_layout.jobs.source_condition_5] +[task.evaluation.pre_layout.jobs.source_condition_85c_4.output_sha256] +op = "0869fe27bf98e4894ce811474434b7ae4b479215e6ec3ce189a7c44d35d20256" +dm = "81653ce9c5131b05b0dffd1a9a3ea1095bafa2a311e0363eec2afcddb6dc1375" +cm = "03c40fcc926bbef770f8ebd8f5cf2725b71b4c118f8bd6dd9dd5c8a2e933291d" +transient = "bee875661ef7e19a3490f76e3e2de67023a1fb81101a4cf93cfe435dcf349221" + +[task.evaluation.pre_layout.jobs.source_condition_85c_5] operation = "circuit.simulate" -[task.evaluation.pre_layout.jobs.source_condition_5.inputs] -deck = "input:performance" +[task.evaluation.pre_layout.jobs.source_condition_85c_5.inputs] +deck = "input:performance_85c" dut = "input:simulation" -[task.evaluation.pre_layout.jobs.source_condition_5.outputs] +[task.evaluation.pre_layout.jobs.source_condition_85c_5.outputs] op = "ngspice-raw" dm = "ngspice-raw" cm = "ngspice-raw" transient = "ngspice-raw" -[task.evaluation.pre_layout.jobs.source_condition_5.parameters.values] +[task.evaluation.pre_layout.jobs.source_condition_85c_5.parameters.values] load_f = 1e-11 step_v = -0.1 kick_a = -0.0001 -[task.evaluation.pre_layout.jobs.source_condition_5.parameters.measurements] +[task.evaluation.pre_layout.jobs.source_condition_85c_5.parameters.measurements] output_cm_v = "V" output_dm_v = "V" bias_v = "V" @@ -1914,109 +3384,120 @@ dm_high_v = "V" dm_up_error_v = "V" dm_down_error_v = "V" cm_high_v = "V" -cm_up_error_v = "V" -cm_down_error_v = "V" -cm_kick_error_v = "V" +cm_up_recovery_v = "V" +cm_down_recovery_v = "V" +cm_kick_recovery_v = "V" cm_kick_peak_v = "V" dm_peak_v = "V" mean_power_w = "W" dm_cm_error_v = "V" -cm_dm_error_v = "V" +cm_dm_coupling_v = "V" +cm_static_error_v = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.parameters.exports] +[task.evaluation.pre_layout.jobs.source_condition_85c_5.parameters.exports] op = "op.raw" dm = "dm.raw" cm = "cm.raw" transient = "transient.raw" -[task.evaluation.pre_layout.jobs.source_condition_5.input_sha256] -deck = "a332ed26fe1d46a1e966afb780fa4950c7f5a256747047f12a309df4d041aa72" +[task.evaluation.pre_layout.jobs.source_condition_85c_5.input_sha256] +deck = "99f3f9ab5792655ca9aeb165e7f8d3d78ee2133f10ef1916f6eb309dd814cc6b" dut = "8e4962faa96a876bdd66262cef8b12e8c803727b611f77b7e7804d22db58955c" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.bias_v] -value = 0.3867579161192 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.bias_v] +value = 0.3592475374976 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_dm_error_v] -value = 0.003690737 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_dm_coupling_v] +value = 1.306493e-06 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_down_error_v] -value = 0.004627371 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_down_recovery_v] +value = 7.439771e-11 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_gain_vv] -value = 1.064286 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_gain_vv] +value = 1.249174 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_high_v] -value = 0.808071 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_high_v] +value = 0.8470756 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_kick_error_v] -value = 0.003690862 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_kick_peak_v] +value = 0.05765408 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_kick_peak_v] -value = 0.04507743 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_kick_recovery_v] +value = 2.689627e-10 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_peak_vv] -value = 1.125353 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_peak_vv] +value = 1.289158 unit = "V/V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.cm_up_error_v] -value = 0.008070969 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_static_error_v] +value = 0.04707556539984 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_cm_error_v] -value = 8.399948e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.cm_up_recovery_v] +value = 1.115475e-09 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_down_error_v] -value = 3.300693e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_cm_error_v] +value = 0.0001385385 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_gain_db] -value = 61.6623 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_down_error_v] +value = 2.071676e-13 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_gain_db] +value = 57.82254 unit = "dB" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_high_v] -value = -0.09991732 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_high_v] +value = -0.09987129 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_peak_v] -value = 0.1020541 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_peak_v] +value = 0.1037881 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.dm_up_error_v] -value = 8.268386e-05 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.dm_up_error_v] +value = 0.0001287102 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.mean_power_w] -value = 0.0005715175 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.mean_power_w] +value = 0.0005838841 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.output_cm_v] -value = 0.7536908624253 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.output_cm_v] +value = 0.7684381095591 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.output_dm_v] -value = -1.60649271663e-13 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.output_dm_v] +value = 9.781064846948e-14 unit = "V" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.phase_margin_deg] -value = 72.8372 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.phase_margin_deg] +value = 68.3147 unit = "deg" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.power_w] -value = 0.0005720080852394 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.power_w] +value = 0.0005846605464126 unit = "W" -[task.evaluation.pre_layout.jobs.source_condition_5.measurements.unity_hz] -value = 20703970.0 +[task.evaluation.pre_layout.jobs.source_condition_85c_5.measurements.unity_hz] +value = 18058980.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_85c_5.output_sha256] +op = "0869fe27bf98e4894ce811474434b7ae4b479215e6ec3ce189a7c44d35d20256" +dm = "81653ce9c5131b05b0dffd1a9a3ea1095bafa2a311e0363eec2afcddb6dc1375" +cm = "03c40fcc926bbef770f8ebd8f5cf2725b71b4c118f8bd6dd9dd5c8a2e933291d" +transient = "d338827fa0148d95ff7c8e94abeaf6c11fb6b40b7434c65afae80d7b64b86443" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -2029,7 +3510,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -2040,7 +3521,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -2053,7 +3534,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2066,7 +3547,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2080,7 +3561,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2090,7 +3571,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/performance_85c.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/performance_85c.spice new file mode 100644 index 0000000000000000000000000000000000000000..ce202c5736b6812cbec4b7def304b41f643bbdef --- /dev/null +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/performance_85c.spice @@ -0,0 +1,105 @@ +* Native differential/common-mode loop calibration. SPDX-License-Identifier: MIT +.lib /workspace/support/models/cornerMOSlv.lib mos_tt +.lib /workspace/support/models/cornerCAP.lib cap_typ +.lib /workspace/support/models/cornerRES.lib res_typ +.include parameters.spice +.include dut.spice +.temp 85 +.option rshunt=1e12 reltol=1e-5 abstol=1e-13 vntol=1e-8 method=gear maxord=2 +VDD vdd 0 1.2 +IBIAS vdd ibias 20u +VCM icm 0 0.5 +VSTEP step_level 0 {step_v} +VSIG sig 0 dc 0 pulse(0 {step_v} 1u 5n 5n 4u 20u) +VREF ref 0 dc 0.75 pulse(0.75 0.8 3u 5n 5n 1u 20u) +EFP fp icm value={(v(sig)-v(outp)+v(outn))/2} +EFN fn icm value={-(v(sig)-v(outp)+v(outn))/2} +VPP inp fp dc 0 ac 0.5 +VPN inn fn dc 0 ac -0.5 +CLP outp 0 {load_f} +CLN outn 0 {load_f} +IDP 0 outp pulse(0 {kick_a} 6u 5n 5n 50n 20u) +IDN 0 outn pulse(0 {kick_a} 6u 5n 5n 50n 20u) +XDUT inp inn outp outn vdd 0 ibias ref amp_023_fer_fd2s +.control +set noaskquit +set numdgt=12 +* Independent DC equilibria for each settled stimulus state. +let cm_idle=0 +let cm_low=0 +let cm_high=0 +let dm_step=0 +let cm_static_error_v=0 +op +let const.cm_idle=(v(outp)+v(outn))/2 +let const.dm_step=v(step_level) +alter @VSIG[dc] = $&const.dm_step +op +let const.cm_low=(v(outp)+v(outn))/2 +alter @VREF[dc] = 0.8 +op +let const.cm_high=(v(outp)+v(outn))/2 +let const.cm_static_error_v=abs(const.cm_idle-0.75) +if abs(const.cm_low-0.75) > const.cm_static_error_v + let const.cm_static_error_v=abs(const.cm_low-0.75) +end +if abs(const.cm_high-0.8) > const.cm_static_error_v + let const.cm_static_error_v=abs(const.cm_high-0.8) +end +let cm_static_error_v=const.cm_static_error_v +print cm_static_error_v +alter @VSIG[dc] = 0 +alter @VREF[dc] = 0.75 +op +let output_cm_v=(v(outp)+v(outn))/2 +let output_dm_v=v(outp)-v(outn) +let bias_v=v(ibias) +let power_w=-v(vdd)*i(VDD) +print output_cm_v output_dm_v bias_v power_w +write op.raw v(outp) v(outn) v(ibias) i(VDD) +save i(vdd) v(ibias) v(inn) v(inp) v(outn) v(outp) v(ref) v(sig) v(step_level) v(vdd) +ac dec 150 1 1gig +let transfer=(v(outp)-v(outn))/(v(inp)-v(inn)) +let gain_db=db(transfer) +let phase_deg=180*cph(transfer)/pi +meas ac dm_gain_db find gain_db at=1 +meas ac unity_hz when gain_db=0 fall=1 +meas ac phase_at_unity find phase_deg when gain_db=0 fall=1 +let phase_margin_deg=180+phase_at_unity +print phase_margin_deg +write dm.raw frequency v(outp) v(outn) v(inp) v(inn) transfer gain_db phase_deg +alter @VPP[acmag]=0 +alter @VPN[acmag]=0 +alter @VREF[acmag]=1 +ac dec 100 1 1gig +let cm_transfer=(v(outp)+v(outn))/2 +let cm_gain=mag(cm_transfer) +let cm_db=db(cm_transfer) +meas ac cm_gain_vv find cm_gain at=1 +meas ac cm_peak_vv max cm_gain +write cm.raw frequency v(outp) v(outn) cm_transfer +tran 1n 8u 0 1n +let dm=v(outp)-v(outn) +let cm=(v(outp)+v(outn))/2 +let dm_err=abs(dm-v(sig)) +let cm_up_recovery=abs(cm-const.cm_high) +let cm_down_recovery=abs(cm-const.cm_low) +let cm_idle_recovery=abs(cm-const.cm_idle) +let supplied=-v(vdd)*i(VDD) +meas tran dm_high_v avg dm from=1.8u to=1.95u +meas tran dm_up_error_v max dm_err from=1.5u to=1.95u +meas tran dm_down_error_v max dm_err from=5.5u to=5.95u +meas tran cm_high_v avg cm from=3.8u to=3.95u +meas tran cm_up_recovery_v max cm_up_recovery from=3.5u to=3.95u +meas tran cm_down_recovery_v max cm_down_recovery from=4.5u to=4.95u +meas tran cm_kick_recovery_v max cm_idle_recovery from=6.5u to=7.9u +meas tran cm_kick_peak_v max cm_idle_recovery from=6u to=6.5u +let dm_abs=abs(dm) +meas tran dm_peak_v max dm_abs from=1u to=5u +meas tran dm_cm_error_v max dm_err from=3.5u to=3.95u +meas tran cm_dm_coupling_v max cm_idle_recovery from=1.5u to=1.95u +meas tran mean_power_w avg supplied from=0 to=8u +write transient.raw v(outp) v(outn) v(sig) v(ref) i(VDD) +quit +.endc +.end diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/schematic.svg index ec9d986129ab7ffed55fbf616f8c1b7e70727231..3fc392214171532f93815d777cc59f06d8bd9ad7 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/schematic.svg @@ -1 +1,2 @@ -amp_023_fer_fd2s{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_023_fer_fd2s", "netlist_sha256": "4c52bdbbe491a400eff644efb33e0e97af38d50073ccb1a5a5a76964931f569c", "project_sha256": "a18e607e296fb2cc1bf3a3a75e1b177d794512f04eda07089697d75bfc8ac7cc", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_023_fer_fd2s", "Bank1_8series_rhigh", "Bank2_8series_rhigh"], "banks": [{"name": "Bank1_8series_rhigh", "count": 8, "model": "rhigh", "kind": "series", "members": ["RRCA_0", "RRCA_1", "RRCA_2", "RRCA_3", "RRCA_4", "RRCA_5", "RRCA_6", "RRCA_7"]}, {"name": "Bank2_8series_rhigh", "count": 8, "model": "rhigh", "kind": "series", "members": ["RRCB_0", "RRCB_1", "RRCB_2", "RRCB_3", "RRCB_4", "RRCB_5", "RRCB_6", "RRCB_7"]}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 18}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_023_fer_fd2svoutpvsensubvoutnvsensubfpfno1avcpo1bvcnx1ax1bvcmfbvsso1ao1bvoutpvbpvddvoutnvssvcmrvsenibiasvssvddvcmfbeataileadvcmfbvddvcpvcnvbpibiasvsso1ao1bvsenzazbvoutpvoutnvoutpvoutnvsensubsubvsssubvddwellvinpvinnibiasvssfpvbpvddfntailvinpvinnvoutpvoutnvddvssibiasvcmramp_023_fer_fd2sihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Folded input stageMMSA6/0.4 ×2MMSB6/0.4 ×2MMI16/0.3 ×2MMI26/0.3 ×2MMT4/0.4 ×2P bulk → wellN bulk → sub02 Cascode branchesMMCA6/0.2MMCB6/0.2MMNA4/0.2MMNB4/0.2MMKA3/0.4MMKB3/0.4P bulk → wellN bulk → sub03 Differential output stageMMLA6/0.4 ×6MMLB6/0.4 ×6MM2A8/0.3 ×4MM2B8/0.3 ×4P bulk → wellN bulk → sub04 Common-mode error amplifierMMEPD3/0.4MMEPM3/0.4 ×2MMEA14/0.2MMEA24/0.2MMEAT4/0.4P bulk → wellN bulk → sub05 Bias generationMMPD16/0.4MMPD21.5/0.4MMPM16/0.4MMB14/0.4MMB24/0.4MMND10.75/0.4MMBD4/0.4MMNCD1.5/0.4P bulk → wellN bulk → sub06 CompensationRRZA_01/0.96RRZB_01/0.96CCCA_025.9/25.9CCCB_025.9/25.9CCCA_125.9/25.9CCCB_125.9/25.9CCMA_09.95/9.95CCMB_09.95/9.95R substrate → sub07 Output common-mode sensingXBANK1Bank1_8series_rhighXBANK2Bank2_8series_rhigh08 Substrate contacts / repeated banksRRptap1A=703 µm²RRntap1A=324 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim · rhigh \ No newline at end of file +amp_023_fer_fd2s{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_023_fer_fd2s","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_023_fer_fd2s","Bank1_8series_rhigh","Bank2_8series_rhigh"],"banks":[{"name":"Bank1_8series_rhigh","count":8,"model":"rhigh","kind":"series","members":["RRCA_0","RRCA_1","RRCA_2","RRCA_3","RRCA_4","RRCA_5","RRCA_6","RRCA_7"]},{"name":"Bank2_8series_rhigh","count":8,"model":"rhigh","kind":"series","members":["RRCB_0","RRCB_1","RRCB_2","RRCB_3","RRCB_4","RRCB_5","RRCB_6","RRCB_7"]}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":18},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_023_fer_fd2s"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/design/amp_023_fer_fd2s.icproj.json"}}Main-sheet overview; 2 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_023_fer_fd2svoutpvsensubvoutnvsensubfpfno1avcpo1bvcnx1ax1bvcmfbvsso1ao1bvoutpvbpvddvoutnvssvcmrvsenibiasvssvddvcmfbeataileadvcmfbvddvcpvcnvbpibiasvsso1ao1bvsenzazbvoutpvoutnvoutpvoutnvsensubsubvsssubvddwellvinpvinnibiasvssfpvbpvddfntailvinpvinnvoutpvoutnvddvssibiasvcmramp_023_fer_fd2sihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresFolded input stageMMSA6/0.4 ×2MMSB6/0.4 ×2MMI16/0.3 ×2MMI26/0.3 ×2MMT4/0.4 ×2P bulk → wellN bulk → subCascode branchesMMCA6/0.2MMCB6/0.2MMNA4/0.2MMNB4/0.2MMKA3/0.4MMKB3/0.4P bulk → wellN bulk → subDifferential output stageMMLA6/0.4 ×6MMLB6/0.4 ×6MM2A8/0.3 ×4MM2B8/0.3 ×4P bulk → wellN bulk → subCommon-mode error amplifierMMEPD3/0.4MMEPM3/0.4 ×2MMEA14/0.2MMEA24/0.2MMEAT4/0.4P bulk → wellN bulk → subBias generationMMPD16/0.4MMPD21.5/0.4MMPM16/0.4MMB14/0.4MMB24/0.4MMND10.75/0.4MMBD4/0.4MMNCD1.5/0.4P bulk → wellN bulk → subCompensation networkRRZA_01/0.96RRZB_01/0.96CCCA_025.9/25.9CCCB_025.9/25.9CCCA_125.9/25.9CCCB_125.9/25.9CCMA_09.95/9.95CCMB_09.95/9.95R substrate → subOutput common-mode sensingXBANK1Bank1_8series_rhighXBANK2Bank2_8series_rhighBulk ties and device banksRRptap1A=703 µm²RRntap1A=324 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim · rhigh + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/testbench.spice index 0fac4f01285953129166576b1a508af4e66f6f02..0da1e1c115cfb971592216d20029f1210e98e188 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/materials/testbench.spice @@ -9,6 +9,7 @@ VDD vdd 0 1.2 IBIAS vdd ibias 20u VCM icm 0 0.5 +VSTEP step_level 0 {step_v} VSIG sig 0 dc 0 pulse(0 {step_v} 1u 5n 5n 4u 20u) VREF ref 0 dc 0.75 pulse(0.75 0.8 3u 5n 5n 1u 20u) EFP fp icm value={(v(sig)-v(outp)+v(outn))/2} @@ -23,6 +24,32 @@ XDUT inp inn outp outn vdd 0 ibias ref amp_023_fer_fd2s .control set noaskquit set numdgt=12 +* Independent DC equilibria for each settled stimulus state. +let cm_idle=0 +let cm_low=0 +let cm_high=0 +let dm_step=0 +let cm_static_error_v=0 +op +let const.cm_idle=(v(outp)+v(outn))/2 +let const.dm_step=v(step_level) +alter @VSIG[dc] = $&const.dm_step +op +let const.cm_low=(v(outp)+v(outn))/2 +alter @VREF[dc] = 0.8 +op +let const.cm_high=(v(outp)+v(outn))/2 +let const.cm_static_error_v=abs(const.cm_idle-0.75) +if abs(const.cm_low-0.75) > const.cm_static_error_v + let const.cm_static_error_v=abs(const.cm_low-0.75) +end +if abs(const.cm_high-0.8) > const.cm_static_error_v + let const.cm_static_error_v=abs(const.cm_high-0.8) +end +let cm_static_error_v=const.cm_static_error_v +print cm_static_error_v +alter @VSIG[dc] = 0 +alter @VREF[dc] = 0.75 op let output_cm_v=(v(outp)+v(outn))/2 let output_dm_v=v(outp)-v(outn) @@ -30,6 +57,7 @@ let bias_v=v(ibias) let power_w=-v(vdd)*i(VDD) print output_cm_v output_dm_v bias_v power_w write op.raw v(outp) v(outn) v(ibias) i(VDD) +save i(vdd) v(ibias) v(inn) v(inp) v(outn) v(outp) v(ref) v(sig) v(step_level) v(vdd) ac dec 150 1 1gig let transfer=(v(outp)-v(outn))/(v(inp)-v(inn)) let gain_db=db(transfer) @@ -54,20 +82,22 @@ tran 1n 8u 0 1n let dm=v(outp)-v(outn) let cm=(v(outp)+v(outn))/2 let dm_err=abs(dm-v(sig)) -let cm_err=abs(cm-v(ref)) +let cm_up_recovery=abs(cm-const.cm_high) +let cm_down_recovery=abs(cm-const.cm_low) +let cm_idle_recovery=abs(cm-const.cm_idle) let supplied=-v(vdd)*i(VDD) meas tran dm_high_v avg dm from=1.8u to=1.95u meas tran dm_up_error_v max dm_err from=1.5u to=1.95u meas tran dm_down_error_v max dm_err from=5.5u to=5.95u meas tran cm_high_v avg cm from=3.8u to=3.95u -meas tran cm_up_error_v max cm_err from=3.5u to=3.95u -meas tran cm_down_error_v max cm_err from=4.5u to=5.9u -meas tran cm_kick_error_v max cm_err from=6.5u to=7.9u -meas tran cm_kick_peak_v max cm_err from=6u to=6.5u +meas tran cm_up_recovery_v max cm_up_recovery from=3.5u to=3.95u +meas tran cm_down_recovery_v max cm_down_recovery from=4.5u to=4.95u +meas tran cm_kick_recovery_v max cm_idle_recovery from=6.5u to=7.9u +meas tran cm_kick_peak_v max cm_idle_recovery from=6u to=6.5u let dm_abs=abs(dm) meas tran dm_peak_v max dm_abs from=1u to=5u meas tran dm_cm_error_v max dm_err from=3.5u to=3.95u -meas tran cm_dm_error_v max cm_err from=1.5u to=1.95u +meas tran cm_dm_coupling_v max cm_idle_recovery from=1.5u to=1.95u meas tran mean_power_w avg supplied from=0 to=8u write transient.raw v(outp) v(outn) v(sig) v(ref) i(VDD) quit diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/problem.md index f2144251bbb92c7ff0136292db9f78609cc72146..c7b28465946bd196f0d5a0f31e09298c51a6e4e4 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_023_fer_fd2s/problem.md @@ -12,7 +12,8 @@ the specified unity differential feedback connection. - `materials/circuit.cdl`: authoritative physical circuit for native LVS. - `materials/circuit.spice`: equivalent process-model simulator representation. -- `materials/testbench.spice`: declared stimuli, differential feedback and measurements. +- `materials/testbench.spice`: nominal-temperature stimuli, differential feedback and measurements. +- `materials/performance_85c.spice`: the same testbench at 85 °C for the selected temperature-stress subset. Ordered ports are `vinp vinn voutp voutn vdd vss ibias vcmr`. VINP/VINN are differential inputs; VOUTP/VOUTN are differential outputs; @@ -76,6 +77,8 @@ sources inject `kick_a` into both outputs during a 6–6.060 us pulse: The pulse periods are 20 us; only this finite 8 us sequence is measured. No startup initialization is imposed; transient starts from the solved DC point. +A selected phase-margin and CMFB subset repeats at 85 °C with the same TT device models, supply, references, loads and step/kick conditions. This checks temperature sensitivity only; no process-corner, mismatch or yield result is claimed. + ## Physical Requirements Submit GDSII top cell `amp_023_fer_fd2s`, at most 10 MiB. Pass native IHP @@ -96,98 +99,78 @@ Distributed substrate resistance/noise and fabrication signoff are outside scope ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. First compute each metric's raw quality q from the worst paired condition, with raw area quality q_area = area_target / candidate_functional_area. Credit c_i = min(1, q_i) for every positively weighted metric, then compute S = 100 * product(c_i ** w_i). The weights sum to 1 and the score is bounded by 100. An improvement beyond one target cannot compensate for missing another target. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Reaching every positively weighted target scores 100; a feasible reference may score far below 100. Weights express quality tradeoffs, not acceptance bounds. + +Static common-mode accuracy is scored once, using three independently solved +DC equilibria for each load/polarity condition. Dynamic common-mode recovery is +measured relative to the corresponding circuit equilibrium, not the ideal +reference, so a fixed offset cannot earn repeated recovery rewards. The return +window ends at 4.95 us, before the differential input returns. The 100 uV scale +for static common-mode error, recovery and coupling equals 0.2% of the 50 mV +reference step; it declares useful accuracy, not a pass/fail tolerance or a +claim of process robustness. The original typical-model, 27 C, 1.2 V scope remains. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +For metrics declaring `saturating_ratio`, q = 2(b+s)/(b+x+2*s), using the quality anchor b and the positive scale s in the metric’s units. Equality to the anchor gives raw quality 1; improvements approach raw quality 2 but credited quality stays at 1. Normalize each condition before selecting the worst quality. These scales and targets do not add acceptance cutoffs. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | +| `cm_static_error_v` | DC: Maximum absolute common-mode reference error across (VSIG, VCMR) = (0, 0.75 V), (step_v, 0.75 V), (step_v, 0.8 V). | V | minimize / saturating_ratio | 0 … +∞ | 0.005 | response | | `output_cm_v` | DC operating point: `(v(outp)+v(outn))/2`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `output_dm_v` | DC operating point: `v(outp)-v(outn)`. | V | target / target | −∞ … +∞ | 1.2 | bias | | `bias_v` | DC operating point: `v(ibias)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dm_gain_db` | AC: Value of `(db(((v(outp)-v(outn))/(v(inp)-v(inn))))) at=1`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db(((v(outp)-v(outn))/(v(inp)-v(inn)))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | -| `phase_margin_deg` | AC: `180+(find (180*cph(((v(outp)-v(outn))/(v(inp)-v(inn))))/pi) when (db(((v(outp)-v(outn))/(v(inp)-v(inn)))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `cm_gain_vv` | AC: Value of `(mag(((v(outp)+v(outn))/2))) at=1`. | V/V | target / target | −∞ … +∞ | 1.0 | response | -| `cm_peak_vv` | AC: Maximum of `(mag(((v(outp)+v(outn))/2)))`. | V/V | target / target | −∞ … +∞ | 1.0 | response | -| `dm_up_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=1.5u to=1.95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `dm_down_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=5.5u to=5.95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `cm_up_error_v` | TRAN: Maximum of `(abs(((v(outp)+v(outn))/2)-v(ref))) from=3.5u to=3.95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `cm_down_error_v` | TRAN: Maximum of `(abs(((v(outp)+v(outn))/2)-v(ref))) from=4.5u to=5.9u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `cm_kick_error_v` | TRAN: Maximum of `(abs(((v(outp)+v(outn))/2)-v(ref))) from=6.5u to=7.9u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `cm_kick_peak_v` | TRAN: Maximum of `(abs(((v(outp)+v(outn))/2)-v(ref))) from=6u to=6.5u`. | V | target / target | 0 … 1.2 | 1.2 | response | +| `phase_margin_deg` | AC: `180+(find (180*cph(((v(outp)-v(outn))/(v(inp)-v(inn))))/pi) when (db(((v(outp)-v(outn))/(v(inp)-v(inn)))))=0 fall=1)`. | deg | target / target | 0 … 180 | 10 | response | +| `cm_gain_vv` | AC: Value of `(mag(((v(outp)+v(outn))/2))) at=1`. | V/V | target / target | −∞ … +∞ | 1 | response | +| `cm_peak_vv` | AC: Maximum of `(mag(((v(outp)+v(outn))/2)))`. | V/V | target / target | −∞ … +∞ | 1 | response | +| `dm_up_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=1.5u to=1.95u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-05 | response | +| `dm_down_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=5.5u to=5.95u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-05 | response | +| `cm_up_recovery_v` | TRAN: max abs(c-c_high), 3.5–3.95 us; c_high is the independent DC output at (step_v, 0.8 V). | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | response | +| `cm_down_recovery_v` | TRAN: max abs(c-c_low), 4.5–4.95 us; c_low is the independent DC output at (step_v, 0.75 V). | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | response | +| `cm_kick_recovery_v` | TRAN: max abs(c-c_idle), 6.5–7.9 us; c_idle is the independent DC output at (0, 0.75 V). | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | response | +| `cm_kick_peak_v` | TRAN: max abs(c-c_idle), 6–6.5 us. | V | minimize / saturating_ratio | 0 … 1.2 | 0.005 | response | | `dm_peak_v` | TRAN: Maximum of `(abs((v(outp)-v(outn)))) from=1u to=5u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=0 to=8u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -| `dm_cm_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=3.5u to=3.95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `cm_dm_error_v` | TRAN: Maximum of `(abs(((v(outp)+v(outn))/2)-v(ref))) from=1.5u to=1.95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `dm_high_v` | TRAN: Mean of `(v(outp)-v(outn)) from=1.8u to=1.95u`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | -| `cm_high_v` | TRAN: Mean of `((v(outp)+v(outn))/2) from=3.8u to=3.95u`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | - -Area reference: **8435.0 um2**. 76 expanded device instances; sum of device/contact envelopes 5503.6687 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **9**; it is independent of -the reference-relative task score. - - -### Score weights - -Differential amplifier with CMFB: differential recovery 22.5%; common-mode recovery 22.5%; cross-coupling 9%; loop margin 13.5%; AC transfer 9%; bias 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. - -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `dm_down_error_v` | 0.075000000000 | -| `dm_peak_v` | 0.075000000000 | -| `dm_up_error_v` | 0.075000000000 | -| `cm_down_error_v` | 0.056250000000 | -| `cm_kick_error_v` | 0.056250000000 | -| `cm_kick_peak_v` | 0.056250000000 | -| `cm_up_error_v` | 0.056250000000 | -| `cm_dm_error_v` | 0.045000000000 | -| `dm_cm_error_v` | 0.045000000000 | -| `phase_margin_deg` | 0.135000000000 | -| `cm_gain_vv` | 0.022500000000 | -| `cm_peak_vv` | 0.022500000000 | -| `dm_gain_db` | 0.022500000000 | -| `unity_hz` | 0.022500000000 | -| `bias_v` | 0.015000000000 | -| `output_cm_v` | 0.015000000000 | -| `output_dm_v` | 0.015000000000 | -| `mean_power_w` | 0.045000000000 | -| `power_w` | 0.045000000000 | +| `dm_cm_error_v` | TRAN: Maximum of `(abs((v(outp)-v(outn))-v(sig))) from=3.5u to=3.95u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `cm_dm_coupling_v` | TRAN: max abs(c-c_idle), 1.5–1.95 us; retains differential-to-common-mode coupling but removes the initial static reference offset. | V | minimize / saturating_ratio | 0 … +∞ | 1e-07 | response | +| `dm_high_v` | TRAN: Mean of `(v(outp)-v(outn)) from=1.8u to=1.95u`. | V | — | −∞ … +∞ | — | unscored diagnostic | +| `cm_high_v` | TRAN: Mean of `((v(outp)+v(outn))/2) from=3.8u to=3.95u`. | V | — | −∞ … +∞ | — | unscored diagnostic | + + +The capability coefficient is **9**, independent of this task's reference-normalized score. + +### Quality targets and weights + +The area quality target is **4000 um2**. It is an integration budget, not a hard limit or a proven process minimum. + +The fixed MIM plates occupy 2870.895 um2; the 4000 um2 integration budget leaves 1129.105 um2 for the amplifier, taps, enclosure and routing and carries 30%. Differential recovery, static common-mode error and common-mode peak response remain distinct quality objectives; the peak is minimized rather than rewarded for matching a nonzero source peak. Bandwidth carries 10%, phase preservation 5%, common-mode-to-differential coupling 10% and mean power 5%. Near-zero late common-mode residuals and repeated operating-point summaries remain diagnostic. The 100 uV differential, 50 mV common-mode and 1 uV coupling goals apply only to the declared loads and hot-temperature check. + +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 4000 | um2 | — | 0.3 | +| `dm_down_error_v` | 0.0001 | V | 1e-05 | 0.1 | +| `dm_up_error_v` | 0.0001 | V | 1e-05 | 0.1 | +| `cm_kick_peak_v` | 0.05 | V | 0.005 | 0.1 | +| `cm_dm_coupling_v` | 1e-06 | V | 1e-07 | 0.1 | +| `phase_margin_deg` | paired source | deg | 10 | 0.05 | +| `unity_hz` | paired source | Hz | — | 0.1 | +| `mean_power_w` | paired source | W | 1e-12 | 0.05 | +| `cm_static_error_v` | 0.05 | V | 0.005 | 0.1 | + +Zero-weight observations: `dm_peak_v`, `cm_down_recovery_v`, `cm_kick_recovery_v`, `cm_up_recovery_v`, `dm_cm_error_v`, `cm_gain_vv`, `cm_peak_vv`, `dm_gain_db`, `bias_v`, `output_cm_v`, `output_dm_v`, `power_w`. Original functional requirements remain enforced; grouped metrics listed above carry their stated weight once. + +The targets affect continuous quality only. A complete feasible reference may miss them; there is no minimum qualifying score. ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/case.toml index e917702ea9ef1f44bf183284a32a714cbd514b9a..44e93508156ebe4758916d8d35d4e83856bdb4b1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_024_smcnr" title = "Series-Nulling-Resistor Two-Stage OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "efacde0a494970458a599020267739fa754b1fab1a8a414943e7c1981ae49bfa" +sha256 = "cae5c78098afdc05cfc96cdc3a0e820bf131a5c16b39a9f88f380f5a39d806c8" [[assets]] path = "reference/amp_024_smcnr.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-amp_024_smcnr-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "16464ed7adb6a0e8ce1bb7d1c5cf92e8aca87fdcab3114290dd9cc7e6886d4bf" +sha256 = "f6fd9b396b55423d3ec9543fadb1c9dcaf9f5334cfa2afba52a626874c98717d" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "0b9a0afed61b6479a3c7cb1b8c6581ab8ad8623db88c3d5515137be83de4399c" subcircuit = "amp_024_smcnr" +sha256 = "0b9a0afed61b6479a3c7cb1b8c6581ab8ad8623db88c3d5515137be83de4399c" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "d35b4b04bc6f92bd928bed8f2f0849b466e78944ae31537d0c7b179b7b0b4434" +sha256 = "df1de313bfccc4f4e3d928aeedb370257c601c3e003e40a95f1d053685ff8dad" [task.inputs.simulation] path = "materials/circuit.spice" @@ -483,8 +483,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -505,8 +508,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -526,9 +532,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -566,7 +575,10 @@ baseline = [ "source_condition_2:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -587,8 +599,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "recovery_up_v" @@ -607,10 +622,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -628,10 +646,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -670,9 +691,12 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "peak_v" category = "performance" @@ -692,8 +716,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "trough_v" @@ -714,14 +741,17 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "84f48707ef8836e3636aa251c232d0ddcf0403b7c8ecf54bace5ca17fa0acb19" +source_report_sha256 = "c90516a67aa5512f96717e24fe711e4dcc0e1582c98a8c4c567b550d00afde63" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"37fc03583bd883f952510c87848cb4c34866e816ee43adac73b7bdc67883565f\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -758,7 +788,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "d35b4b04bc6f92bd928bed8f2f0849b466e78944ae31537d0c7b179b7b0b4434" +deck = "df1de313bfccc4f4e3d928aeedb370257c601c3e003e40a95f1d053685ff8dad" dut = "a9f03044f32db18922ca45b0be885cb244657cfc8e78a5653a00f4a2ff73c6ae" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -809,6 +839,11 @@ unit = "V" value = 165259.3 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "a8baa4da81116a90d3a3ed56035c6658e4f81735ec0cbcefe493bfd6ec72858a" +ac = "d1565a0b82e3132a3730e2fe774792197e47979ed50a216ae867f2b00315b01e" +transient = "99975bc2786bff2d9a8a9f722ab0021a0aa6f05953abb6a8cde81135ca6a9c7b" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -844,7 +879,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "d35b4b04bc6f92bd928bed8f2f0849b466e78944ae31537d0c7b179b7b0b4434" +deck = "df1de313bfccc4f4e3d928aeedb370257c601c3e003e40a95f1d053685ff8dad" dut = "a9f03044f32db18922ca45b0be885cb244657cfc8e78a5653a00f4a2ff73c6ae" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -895,6 +930,11 @@ unit = "V" value = 149337.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "a8baa4da81116a90d3a3ed56035c6658e4f81735ec0cbcefe493bfd6ec72858a" +ac = "59997a087aea5ef104621d435251a1c1444bc3cbfe29b1b2079e55838343fb19" +transient = "a4ae63104ec7a36f4cfa93580d0f02127db28ea40b176ef050457f9c2512413e" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -930,7 +970,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "d35b4b04bc6f92bd928bed8f2f0849b466e78944ae31537d0c7b179b7b0b4434" +deck = "df1de313bfccc4f4e3d928aeedb370257c601c3e003e40a95f1d053685ff8dad" dut = "a9f03044f32db18922ca45b0be885cb244657cfc8e78a5653a00f4a2ff73c6ae" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -981,6 +1021,11 @@ unit = "V" value = 123342.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "a8baa4da81116a90d3a3ed56035c6658e4f81735ec0cbcefe493bfd6ec72858a" +ac = "e04802fa32d7b3c19c9198781240747f380aa63c1abfa149c3da194dd86a9f54" +transient = "7015ad26f9f2d104131aec60df0052051422ef90dd5eb505fd8e51e82e3c0bf0" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -993,7 +1038,7 @@ unit = "Hz" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1004,7 +1049,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1017,7 +1062,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1030,7 +1075,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1042,7 +1087,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1052,7 +1097,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/schematic.svg index 5ed2d3e44e9e7a387619beb1199119cb77bc417a..51ae503a92246cf9031ab67ae6a5aea67f7fefc8 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/schematic.svg @@ -1 +1,2 @@ -amp_024_smcnr{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.amp_024_smcnr", "netlist_sha256": "0b9a0afed61b6479a3c7cb1b8c6581ab8ad8623db88c3d5515137be83de4399c", "project_sha256": "449612910991dd559301fd088c67953a35ca6e71c7fbfaa7f21fb333b69907c1", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["amp_024_smcnr"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 4}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}amp_024_smcnroutnvssvddvoutibiasvoutoutnrz1rz2rz3nzovsssubvddwellibiasvddvinnvinpoutnvsstailpoutpvssvddvinnvinpvoutibiasamp_024_smcnrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Input stageMM60.25/10 ×2MM07.5/8MM27.5/8MM11.5/10MM31.5/10P bulk → wellN bulk → sub02 Output and biasMM70.25/10MM50.25/10 ×10MM41.5/10 ×10P bulk → wellN bulk → sub03 Compensation zeroCC0_025.9/25.9CC0_125.9/25.9RRZ01/18RRZ11/18RRZ21/18RRZ31/18R substrate → sub04 Substrate contacts / repeated banksRRptap1A=850 µm²RRntap1A=472 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim · rhigh \ No newline at end of file +amp_024_smcnr{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_024_smcnr","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_024_smcnr"],"banks":[],"source_netlist":"design/circuit.cdl","svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_024_smcnr"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/design/amp_024_smcnr.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.amp_024_smcnroutnvddibiasvoutoutnrz1rz2rz3nzovsssubvddwelloutnvsstailpoutpvssvddvinnvinpvoutibiasamp_024_smcnrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMM60.25/10 ×2MM07.5/8MM27.5/8MM11.5/10MM31.5/10P bulk → wellN bulk → subMM70.25/10MM50.25/10 ×10MM41.5/10 ×10P bulk → wellN bulk → subCC0_025.9/25.9CC0_125.9/25.9RRZ01/18RRZ11/18RRZ21/18RRZ31/18R substrate → subRRptap1A=850 µm²RRntap1A=472 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/testbench.spice index e9f96a30269e97d61a3509045a25736195fe17a1..646cf139cf00de50dcc37db6ed7d93e14797dfdd 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/materials/testbench.spice @@ -21,6 +21,7 @@ let bias_v=v(ibias) let power_w=-v(vdd)*i(VDD) print output_v bias_v power_w write op.raw v(vout) v(ibias) i(VDD) +save i(vdd) v(ibias) v(vdd) v(vm) v(vout) v(vp) ac dec 150 0.01 100meg let transfer=-v(vout)/v(vm) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/problem.md index 2fa6bfcd347bc1e6b0a9469acc4a317c6ed665bf..05c1ff16ac42b9e6c7b04e30ece0bbde0cd7b2c5 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_024_smcnr/problem.md @@ -66,43 +66,21 @@ OSDI resistor model and MOS/MIM model resources must be available. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `bias_v` | DC operating point: `v(ibias)`. | V | target / target | 0 … 1.2 | 1.2 | bias | @@ -110,22 +88,20 @@ source condition; a group uses its worst paired quality. | `dc_gain_db` | AC: Value of `(db((-v(vout)/v(vm)))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((-v(vout)/v(vm))))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(vm)))/pi) when (db((-v(vout)/v(vm))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=50u to=95u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=130u to=175u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=50u to=95u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-v(vp))) from=130u to=175u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `step_gain` | Transient: `((avg v(vout) from=90u to=95u)-(avg v(vout) from=170u to=175u))/0.2`. | V/V | target / target | −∞ … +∞ | 1.0 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=20u to=180u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `peak_v` | TRAN: Maximum of `v(vout) from=20u to=100u`. | V | target / target | 0 … 1.2 | 1.2 | response | | `trough_v` | TRAN: Minimum of `v(vout) from=100.2u to=180u`. | V | target / target | 0 … 1.2 | 1.2 | response | -Area reference: **5869.81 um2**. 35 expanded device instances; sum of device/contact envelopes 3813.4378 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **7**; it is independent of -the reference-relative task score. +Area reference: **5869.81 um2**. The expanded circuit has 35 device instances, a sum of device/contact envelopes 3813.4378 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **7**, independent of this task's reference-normalized score. ### Score weights -Compensated feedback amplifiers: loaded recovery 28.6%; loop margin 20.5%; gain and bandwidth 16.4%; step transfer and extrema 8.18%; bias 4.09%; power 12.3%; area 10%. Each objective's weight is divided equally among its metrics. +Compensated feedback amplifiers: loaded recovery 28.6%, loop margin 20.5%, gain and bandwidth 16.4%, step transfer and extrema 8.18%, bias 4.09%, power 12.3%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/case.toml index 4f6071c4c738e41e674eacb782528fc46dff323f..0585ecb05efdf0fd15d8e5aa63dc4178d726c364 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_026_fan_chopper_ota" title = "Fan Two-Stage OTA with Static Output Chopper" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "cc668e37624f877ef4ead3975d9fb2f30f885f1b0d9b288eb4cb393913589fdb" +sha256 = "8ff76902dfaaed6f365d4336272e6f064b6bf58232b127b7080886bce21ce4cc" [[assets]] path = "reference/amp_026_fan_chopper_ota.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "e122778e8b9e32c7e80c50026c8f303077e2e48f2f7cb9dbb6a0d62a8d531a72" +sha256 = "90ddb119bf484072a426a2635edb2cb0cd72828f0704e0b47861b7591a477845" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "232e765fe36c1fdd781bd26c556b0418f9bd53f3e39011fd244d67fd463e52c4" subcircuit = "amp_026_fan_chopper_ota" +sha256 = "232e765fe36c1fdd781bd26c556b0418f9bd53f3e39011fd244d67fd463e52c4" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "1e37cd1ebd02de2445f3508e2a22652628babb729d747eebbcfbdd16817b8f4f" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "b733cc5002d6422750bd8bd704dc7f840a347f1045542bd5394c44b1e1abb6fe" +sha256 = "b1d5cb0367382cf561131e06c2b217e9a91b32684bc9509bbd7a6ebb42b2c91e" [task.constraints] quality = [ @@ -559,7 +559,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -574,6 +573,10 @@ baseline = [ "source_condition_3:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -678,7 +681,6 @@ id = "cm_kick_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 category = "performance" observations = [ "condition_0:cm_kick_v", @@ -687,12 +689,15 @@ observations = [ "condition_3:cm_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "cm_recovery_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 category = "performance" observations = [ "condition_0:cm_recovery_v", @@ -701,6 +706,10 @@ observations = [ "condition_3:cm_recovery_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "cm_min_v" unit = "V" @@ -728,10 +737,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "23e0a73de64f5ce582e8089d850cfc3d40ae1e2424bb180d53558afc90f60580" +source_report_sha256 = "70a9d37d933deca9f9329dfed55ac2e19bce99012e861ed141b4bfd6e0ab7e4e" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"47a0400594caa3ebde1b7461579d16f33b9314da221c70c668c2d6f2b0ecc0b8\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -770,7 +779,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "b733cc5002d6422750bd8bd704dc7f840a347f1045542bd5394c44b1e1abb6fe" +deck = "b1d5cb0367382cf561131e06c2b217e9a91b32684bc9509bbd7a6ebb42b2c91e" dut = "1e37cd1ebd02de2445f3508e2a22652628babb729d747eebbcfbdd16817b8f4f" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_before_v] @@ -821,6 +830,11 @@ unit = "W" value = 0.04994799000000024 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "3db84de564702b44b52a43e16b1436136252f7272f88b02c1791d57232eeb372" +ac = "f2c1410d5ce25c78d0d39232cd8b6bd7b4d5981cd18bbeb35f816a8ae18b2d7a" +transient = "615714ecd58031e2e56e69f9c89d85ab4aeb067ec7609ca2cfd4f0c2f17d41d5" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -858,7 +872,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "b733cc5002d6422750bd8bd704dc7f840a347f1045542bd5394c44b1e1abb6fe" +deck = "b1d5cb0367382cf561131e06c2b217e9a91b32684bc9509bbd7a6ebb42b2c91e" dut = "1e37cd1ebd02de2445f3508e2a22652628babb729d747eebbcfbdd16817b8f4f" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_before_v] @@ -909,6 +923,11 @@ unit = "W" value = -0.0499479899999998 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "3db84de564702b44b52a43e16b1436136252f7272f88b02c1791d57232eeb372" +ac = "f2c1410d5ce25c78d0d39232cd8b6bd7b4d5981cd18bbeb35f816a8ae18b2d7a" +transient = "3df137b3d5f6e6eede26ec7cae04e3f846f92094cf3a3201dfeadaae3eb01e28" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -946,7 +965,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "b733cc5002d6422750bd8bd704dc7f840a347f1045542bd5394c44b1e1abb6fe" +deck = "b1d5cb0367382cf561131e06c2b217e9a91b32684bc9509bbd7a6ebb42b2c91e" dut = "1e37cd1ebd02de2445f3508e2a22652628babb729d747eebbcfbdd16817b8f4f" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_before_v] @@ -997,6 +1016,11 @@ unit = "W" value = 0.04994799000000219 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "3db84de564702b44b52a43e16b1436136252f7272f88b02c1791d57232eeb372" +ac = "d920bdd62b6e88311fed56d7a4709368e7ba954e53a80509be0d84152cc74c8c" +transient = "80a2901ab0e5c5df476bbb60442d13770ecdaa5fb9ed9e8844e544186be9eddf" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1034,7 +1058,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "b733cc5002d6422750bd8bd704dc7f840a347f1045542bd5394c44b1e1abb6fe" +deck = "b1d5cb0367382cf561131e06c2b217e9a91b32684bc9509bbd7a6ebb42b2c91e" dut = "1e37cd1ebd02de2445f3508e2a22652628babb729d747eebbcfbdd16817b8f4f" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_before_v] @@ -1085,6 +1109,11 @@ unit = "W" value = -0.0499479899999978 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "3db84de564702b44b52a43e16b1436136252f7272f88b02c1791d57232eeb372" +ac = "d920bdd62b6e88311fed56d7a4709368e7ba954e53a80509be0d84152cc74c8c" +transient = "2fb528752f2fffe23c8c2ea0ba9143cc5edeca031097c8eee082c52b7addbc86" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1097,7 +1126,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1108,7 +1137,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1121,7 +1150,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1134,7 +1163,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1146,7 +1175,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1156,7 +1185,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/schematic.svg index 0a25023710dbd989c286bdd9546cfcc291225abf..e4776b425a44197a1ab7075743081663ca1c3701 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_026_fan_chopper_ota{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_026_fan_chopper_ota","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/circuit.cdl","netlist_sha256":"232e765fe36c1fdd781bd26c556b0418f9bd53f3e39011fd244d67fd463e52c4","project_sha256":"8eafcafa58a169d0852e110a052858ec7bcb8f83fd908b037cc625cfbb83157d","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_026_fan_chopper_ota","XRT3_bank1"],"banks":[{"name":"XRT3_bank1","devices":11,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT17","RT18","RTSUB"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_026_fan_chopper_ota"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/schematic/amp_026_fan_chopper_ota.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_026_fan_chopper_otavsssubwell_2out1_pcasc_src_pvb2out1_pwell_0subfold_pvb2out1_nsubfold_nvoutpvsssubg2_pvoutnvsssubg2_nvddvddout1_nsubg2_nvddwell_8vssout1_ng2_nwell_8vb4vddout1_psubg2_pvddwell_10vssout1_pwell_0g2_pwell_10vddwell_11vinptailfold_pwell_11tailvssout1_psubg2_nvddwell_13vddout1_pg2_nwell_13vssout1_nsubvddg2_pvddwell_15vddout1_ng2_pwell_15vddwell_1well_16vinntailfold_nwell_16vssvb1subfold_pvssvb1subfold_nvddwell_19vb3vddvb4casc_src_nwell_19vddwell_20vddvb4well_1casc_src_pwell_20vddwell_21voutpvddvb4well_21out1_nvddwell_22voutnvddvb4well_22voutpg2_pcasc_src_nvoutpg2_pvoutng2_nvoutng2_nvsssubvinpvinnvddvoutpvoutnvddvssvddvb1vb2vb3vb4well_2vb3amp_026_fan_chopper_otaEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1RT2ntap1A=4e-12 P=8e-6MM11sg13_lv_pmosw=10u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=5u l=0.3um=1MM14sg13_lv_nmosw=20u l=0.25um=1MM15sg13_lv_nmosw=20u l=0.25um=1MM16sg13_lv_nmosw=2u l=0.13um=1RT8ntap1A=4e-12 P=8e-6MM17sg13_lv_pmosw=2u l=0.13um=1MM18sg13_lv_nmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM19sg13_lv_pmosw=2u l=0.13um=1RT11ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1MM20sg13_lv_nmosw=2u l=0.13um=1RT13ntap1A=4e-12 P=8e-6MM21sg13_lv_pmosw=2u l=0.13um=1MM22sg13_lv_nmosw=2u l=0.13um=1RT15ntap1A=4e-12 P=8e-6MM23sg13_lv_pmosw=2u l=0.13um=1RT16ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1MM4sg13_lv_nmosw=10u l=1um=1MM5sg13_lv_nmosw=10u l=1um=1RT19ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=10u l=1um=1RT20ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=10u l=1um=1RT21ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=20u l=1um=1RT22ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=20u l=1um=1CM1_0cap_cmimw=44.67u l=44.67um=1CM1_1cap_cmimw=44.67u l=44.67um=1CM2_0cap_cmimw=44.67u l=44.67um=1CM2_1cap_cmimw=44.67u l=44.67um=1XXRT3_bank1XRT3_bank1 -Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_026_fan_chopper_ota{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_026_fan_chopper_ota","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_026_fan_chopper_ota","XRT3_bank1"],"banks":[{"name":"XRT3_bank1","devices":11,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT17","RT18","RTSUB"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_026_fan_chopper_ota"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/design/amp_026_fan_chopper_ota.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_026_fan_chopper_otavsssubvinpvinntailfold_pfold_nvb2vb1vb4vb3vb4vddvddvddvb4vb4vb3vb3out1_nout1_pcasc_src_ncasc_src_pvb4vb3vb2vb1vb4vb4out1_pout1_nsubsubsubsubsubsubvsssubwell_0well_0vddwell_11well_11vddwell_16well_16vddwell_19well_19vddwell_20well_20vddwell_1well_1vddwell_2well_2vddwell_21well_21vddwell_22well_22vddwell_8well_8vddwell_10well_10vddwell_13well_13vddwell_15well_15vddvddvddvddvddout1_ng2_nvddsubvssout1_pg2_pvddsubvssout1_pg2_nvddsubvssout1_ng2_pvddsubvssvoutpvoutng2_pg2_pg2_ng2_nvddamp_026_fan_chopper_otaRT0A=4e-12 P=8e-6MM1w=20u l=1uRT1A=4e-12 P=8e-6MM10w=10u l=0.3uRT2A=4e-12 P=8e-6MM11w=10u l=0.3uMM12w=5u l=0.3uMM13w=5u l=0.3uMM14w=20u l=0.25uMM15w=20u l=0.25uMM16w=2u l=0.13uRT8A=4e-12 P=8e-6MM17w=2u l=0.13uMM18w=2u l=0.13uRT10A=4e-12 P=8e-6MM19w=2u l=0.13uRT11A=4e-12 P=8e-6MM2w=20u l=0.5uMM20w=2u l=0.13uRT13A=4e-12 P=8e-6MM21w=2u l=0.13uMM22w=2u l=0.13uRT15A=4e-12 P=8e-6MM23w=2u l=0.13uRT16A=4e-12 P=8e-6MM3w=20u l=0.5uMM4w=10u l=1uMM5w=10u l=1uRT19A=4e-12 P=8e-6MM6w=10u l=1uRT20A=4e-12 P=8e-6MM7w=10u l=1uRT21A=4e-12 P=8e-6MM8w=20u l=1uRT22A=4e-12 P=8e-6MM9w=20u l=1uCM1_0w=l=44.67uCM1_1w=l=44.67uCM2_0w=l=44.67uCM2_1w=l=44.67uXRT3_bank1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/testbench.spice index 55ad34ab884f56f8f93c272d20b7d9d3b9514ee1..9d067ea5e2a74e8e7c39e98b65c5d356c71c54e4 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/materials/testbench.spice @@ -31,6 +31,7 @@ let dm_bias_v=v(outp)-v(outn) let power_w=-v(vdd)*i(VDD)-v(vb1)*i(VB1)-v(vb2)*i(VB2)-v(vb3)*i(VB3)-v(vb4)*i(VB4) print cm_bias_v dm_bias_v power_w write op.raw all +save i(vb1) i(vb2) i(vb3) i(vb4) i(vdd) v(inn) v(inp) v(outn) v(outp) v(sig) v(vb1) v(vb2) v(vb3) v(vb4) v(vdd) ac dec 100 10 1G let transfer=(v(outp)-v(outn))/(v(inp)-v(inn)) let gain=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/problem.md index 1c54658ba5c6133e547fc2f1b47b9a0f3d255bdc..c973e07349435ed4ac6dd87681f7be0cc0fe30b3 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_026_fan_chopper_ota/problem.md @@ -6,16 +6,14 @@ Implement the supplied 23-MOS, two-capacitor two-stage OTA with its statically s ## Inputs and Interface -- `problem.md`: description input. -- `materials/circuit.cdl`: netlist input. -- `materials/circuit.spice`: simulation input. -- `materials/testbench.spice`: performance input. +- `problem.md`: task description. +- `materials/circuit.cdl`: physical netlist. +- `materials/circuit.spice`: simulation circuit. +- `materials/testbench.spice`: performance tests. -Ordered ports: `vinp vinn voutp voutn vdd vss vb1 vb2 vb3 vb4`. Preserve these named connections. +Ordered ports: `vinp vinn voutp voutn vdd vss vb1 vb2 vb3 vb4`; retain all named connections. -The native CDL and simulator SPICE describe the same circuit. VINP/VINN are -the differential inputs; VOUTP/VOUTN are outputs; VDD/VSS are supply/return; -VB1 through VB4 are bias ports. Independent bias sources are outside the physical core. Physical well/substrate taps are included. +Native CDL and simulation SPICE describe the same circuit. VINP/VINN are differential inputs, VOUTP/VOUTN outputs, VDD/VSS supply/return, and VB1–VB4 bias ports. Independent bias sources remain outside the physical core; well/substrate contacts must be physically implemented. ## Operating Conditions @@ -23,48 +21,29 @@ TT, 27 C, VDD=1.2 V, input common mode 0.6 V; vb1/vb2/vb3/vb4=0.3983759766/0.65/ ## Physical Requirements -Submit a nonempty GDSII of at most 10485760 bytes. -Native IHP DRC and strict named-interface LVS must pass. Keep the supplied tap geometry and compact-device parameters consistent. Functional device, well, contact and routing layers define area; annotation layers do not. The bounding rectangle must fit 5000 by 1000 um. No DRC waivers apply. +Submit nonempty GDSII of at most 10485760 bytes. Pass native IHP DRC and strict named-interface LVS without waivers; preserve contact geometry and compact-device parameters. Functional devices, wells, contacts and routing layers define area, excluding annotations; bounds must fit within 5000 × 1000 um. -Magic extracts candidate interconnect resistance/capacitance and device -junction geometry. Wells/substrate are connected to physical tap rails; source -simulation retains finite tap models. Distributed substrate, statistical -mismatch and manufacturing signoff are outside this nominal contract. +Magic extracts candidate interconnect RC and device junction geometry. Wells/substrate connect to physical-contact supply rails; source simulation retains finite contact models. The nominal contract excludes distributed substrate effects, statistical mismatch and manufacturing signoff. The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. ## Electrical Requirements and Scoring -All declared measurements must be finite and use the extracted candidate. Gain and phase at 10 Hz/100 kHz, output bias, supply power, small differential step response, common-mode kick and recovery are observed by the supplied deck. Step response subtracts 8–9 us baseline from 38–39 us response. The common-mode baseline is 58–59 us; kick peak is 60–62 us and residual is 98–99 us. Continuous quality uses independently simulated same-condition source observations. The physical-domain checks are nonnegative supplied power and nonnegative absolute errors; they are not upstream specifications. +All declared measurements must be finite and use the candidate extracted circuit. The deck observes gain/phase at 10 Hz/100 kHz, output bias, power, small differential steps and common-mode disturbance recovery. The step is response over 38–39 us minus baseline over 8–9 us; common-mode baseline is 58–59 us, peak 60–62 us and residual 98–99 us. Continuous quality is paired with independent source results under matching conditions. Nonnegative supply power and absolute error follow physical definitions, not upstream performance specifications. Q is 14924.75 um2 divided by functional area. The anchor sums (W+2.4)(L+2.4) for each MOS and 3.2² um2 for each local tap and one global tap, adds four (44.67+2.4)² um2 MIM envelopes, then applies a 50% routing allowance. It is an engineering estimate, not a foundry minimum. Response metrics use source-paired dB gain, target phase (180 degree scale), target step (50 mV scale), with common-mode kick/recovery retained as unscored diagnostics because this core has no common-mode regulator; bias uses a 1.2 V target scale; power uses an inverse ratio with 1 pW floor. Coefficient 7 reflects multistage compensation and loaded differential response; common-mode drift and kick response remain observations, not proof of regulation. Qualification does not require matching paper performance and does not cover PVT, noise, mismatch or an RRL system. -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observation | Unit | Quality / dimension | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +| Metric | Definition / observation | Unit | Quality / dimension | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `functional_area` | Functional bounding-rectangle area | um2 | area quality Q | positive area | — | | `cm_bias_v` | `(v(outp)+v(outn))/2` | V | target / target / bias | −∞ … +∞ | 1.2 | @@ -80,10 +59,7 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `cm_min_v` | `min cm from=0 to=100u` | V | diagnostic | −∞ … +∞ | — | | `cm_max_v` | `max cm from=0 to=100u` | V | diagnostic | −∞ … +∞ | — | -Apply each row to every declared load/tone condition. Pair each candidate -observation with its `source_` job under the identical condition. The supplied -deck defines intermediate vectors used in the expressions above. - +Each row applies to every declared load/frequency condition; pair the candidate with the `source_` job under matching conditions. Intermediate vectors for expressions are in the supplied deck. ### Score weights @@ -106,8 +82,4 @@ Solve budget: **6 hours**. Use the reviewed IHP resources. Submit only the GDS with top cell amp_026_fan_chopper_ota. Evaluation runs native DRC/LVS, area, candidate-derived Magic RC extraction and ngspice post-layout observations. The source circuit is independently simulated for scoring. -Discover the frozen task, resources and submission interface through -`/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. -Declared inputs are under `/task`. Write `/workspace/output/final.gds` -and explicitly submit with `python -I /protocol/submit.py`. Creating the file -alone does not submit it. Only feedback supported by the active harness is available. +Discover the frozen task, resources and submission interface through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Declared inputs are in `/task`. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly; file generation alone is not submission. Feedback follows the capabilities provided by the current runtime protocol. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/case.toml index 66f73d66285434d78ffd043ab62e81c58adb91cf..6bfb4c68f5308d044c5f51bcdf14c972dfbc1b98 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_027_fan_rrl_ota" title = "Fan Telescopic OTA with Transistor DDA-CMFB" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "c5f870639ff36c78055ea545639e6f7dce425716dde86177b617a62eabfb4572" +sha256 = "7d5ee6b4a4575891cdb72e8667f027bbf472d42434600b419c3e9c686f4403f0" [[assets]] path = "reference/amp_027_fan_rrl_ota.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "a7891c3adda31f61b739e9ac891da402213ab17410df5c93f488f7cb1b2bcd34" +sha256 = "b441935176e7c5773342d5023b1db55f3f049fdd2169dccd52c5a6736bbe0c04" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "afb6faf1d0f260f490f7bd748612c8d10ebbef233154362b853c867b9012b33e" subcircuit = "amp_027_fan_rrl_ota" +sha256 = "afb6faf1d0f260f490f7bd748612c8d10ebbef233154362b853c867b9012b33e" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "58a0cd7b6bcc782cc257925dd9cef3c9e6d0f4bcd810d33c529843ea0fa4a622" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "bc56c929eefeb005be856afbf207f8dd5fa3aacceba945cd916731dfc5750626" +sha256 = "1942581a01fefbde8ea2c5f53eb7bb1184814f9f6e6aa85954cace0b2bc2181a" [task.constraints] quality = [ @@ -561,7 +561,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -576,6 +575,10 @@ baseline = [ "source_condition_3:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_db" unit = "dB" @@ -681,9 +684,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:cm_kick_v", @@ -698,15 +700,18 @@ baseline = [ "source_condition_3:cm_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "cm_recovery_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:cm_recovery_v", @@ -721,6 +726,10 @@ baseline = [ "source_condition_3:cm_recovery_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "cm_min_v" unit = "V" @@ -748,10 +757,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "c4a752dac3b9814da633076355b4f72a1e2f8e93cd9b7be085f796be048d1a5e" +source_report_sha256 = "8abe1520579486cd73add0e6b4ca1de773b92438d8e2a1387d64b9b94a5e0509" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"38e6a8477a5f7985ad11e86e392919f3f67b85c0b9002a1de908b6c3d43cde1b\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -790,7 +799,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "bc56c929eefeb005be856afbf207f8dd5fa3aacceba945cd916731dfc5750626" +deck = "1942581a01fefbde8ea2c5f53eb7bb1184814f9f6e6aa85954cace0b2bc2181a" dut = "58a0cd7b6bcc782cc257925dd9cef3c9e6d0f4bcd810d33c529843ea0fa4a622" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_before_v] @@ -841,6 +850,11 @@ unit = "W" value = 0.00427894007624212 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "b44ee75f672a763d76513c1daa6bc3c98a8da3726e1bf95816f36732369fc1d6" +ac = "b060bf23b1cc59e184a10c00819be544010b4d24ebe2426e8f4ccd007109ac00" +transient = "e4522629f6fbafaa58d65a7d1df3768b2212e5a0fa0a1cfab63a13bb8d90298e" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -878,7 +892,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "bc56c929eefeb005be856afbf207f8dd5fa3aacceba945cd916731dfc5750626" +deck = "1942581a01fefbde8ea2c5f53eb7bb1184814f9f6e6aa85954cace0b2bc2181a" dut = "58a0cd7b6bcc782cc257925dd9cef3c9e6d0f4bcd810d33c529843ea0fa4a622" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_before_v] @@ -929,6 +943,11 @@ unit = "W" value = -0.00427893992375788 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "b44ee75f672a763d76513c1daa6bc3c98a8da3726e1bf95816f36732369fc1d6" +ac = "b060bf23b1cc59e184a10c00819be544010b4d24ebe2426e8f4ccd007109ac00" +transient = "d4d6dc917f078483cb312b4072b9ac340a542465619da4ea5cf06c2b75c1657e" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -966,7 +985,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "bc56c929eefeb005be856afbf207f8dd5fa3aacceba945cd916731dfc5750626" +deck = "1942581a01fefbde8ea2c5f53eb7bb1184814f9f6e6aa85954cace0b2bc2181a" dut = "58a0cd7b6bcc782cc257925dd9cef3c9e6d0f4bcd810d33c529843ea0fa4a622" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.cm_before_v] @@ -1017,6 +1036,11 @@ unit = "W" value = 0.004070066131819199 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "b44ee75f672a763d76513c1daa6bc3c98a8da3726e1bf95816f36732369fc1d6" +ac = "b8413cc57abf3d547471618767ea4b39124e94c6eed0cab30083c60f50691c15" +transient = "65776c23c24538c40de6c4bb83e1af0038e953c1d388ba57a49ac17fdbc2c641" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1054,7 +1078,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "bc56c929eefeb005be856afbf207f8dd5fa3aacceba945cd916731dfc5750626" +deck = "1942581a01fefbde8ea2c5f53eb7bb1184814f9f6e6aa85954cace0b2bc2181a" dut = "58a0cd7b6bcc782cc257925dd9cef3c9e6d0f4bcd810d33c529843ea0fa4a622" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.cm_before_v] @@ -1105,6 +1129,11 @@ unit = "W" value = -0.0040700658681808 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "b44ee75f672a763d76513c1daa6bc3c98a8da3726e1bf95816f36732369fc1d6" +ac = "b8413cc57abf3d547471618767ea4b39124e94c6eed0cab30083c60f50691c15" +transient = "4be96963da93a1b184bff87e499035f1e0f3df01728e120603b5660cfc9b3235" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1117,7 +1146,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1128,7 +1157,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1141,7 +1170,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1154,7 +1183,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1166,7 +1195,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1176,7 +1205,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/schematic.svg index 9c64799e96e9cd3251f208238edc384bd56af22b..e9f008bb4bd9928ed26aee2f2e14408261c96804 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_027_fan_rrl_ota{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_027_fan_rrl_ota","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/circuit.cdl","netlist_sha256":"afb6faf1d0f260f490f7bd748612c8d10ebbef233154362b853c867b9012b33e","project_sha256":"40adca54861abd40acaadd6b3d0dee8597df74ee245f9ae7a4cfadfc502816b1","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_027_fan_rrl_ota","XRT2_bank1"],"banks":[{"name":"XRT2_bank1","devices":7,"source_references":["RT2","RT3","RT4","RT5","RT6","RT7","RTSUB"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_027_fan_rrl_ota"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/schematic/amp_027_fan_rrl_ota.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_027_fan_rrl_otavsssubvoutpvb2subcsrc_pwell_0vsssubcsrc_ncm_biasvsssubcsrc_pcm_biasvsssubcm_biascm_biasvsssubcm_sensecm_sensevddvddwell_8vinptailwell_8d1nvddwell_9vb3vinntaild1pwell_9vddwell_10vddvb3well_0well_10cm_tailvddwell_11voutncm_sensecm_tailwell_11tailvddwell_12vb4cm_biascm_tailwell_12vddwell_13voutpcm_sensecm_tailwell_13vddvddwell_14vb4cm_biascm_tailwell_14vddwell_15voutnwell_1vb1d1nwell_15vsssubvinpvinnvoutpvoutnvddvssvb1vb2vb3vb4voutpvb1well_1d1pvddvoutnvb2subcsrc_namp_027_fan_rrl_otaEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1MM11sg13_lv_nmosw=5u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=6u l=1um=1MM14sg13_lv_nmosw=6u l=1um=1MM15sg13_lv_nmosw=2u l=1um=1MM16sg13_lv_nmosw=2u l=1um=1RT8ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1RT9ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1RT10ntap1A=4e-12 P=8e-6MM4sg13_lv_pmosw=10u l=1um=1RT11ntap1A=4e-12 P=8e-6MM5sg13_lv_pmosw=4u l=0.5um=1RT12ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=4u l=0.5um=1RT13ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=4u l=0.5um=1RT14ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=4u l=0.5um=1RT15ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=10u l=0.3um=1XXRT2_bank1XRT2_bank1 -Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_027_fan_rrl_ota{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_027_fan_rrl_ota","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_027_fan_rrl_ota","XRT2_bank1"],"banks":[{"name":"XRT2_bank1","devices":7,"source_references":["RT2","RT3","RT4","RT5","RT6","RT7","RTSUB"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_027_fan_rrl_ota"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/design/amp_027_fan_rrl_ota.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_027_fan_rrl_otavsssubvb2csrc_pwell_0vsscm_biascm_biascm_biascm_sensevddvddwell_8vinpd1nvddwell_9vb3vinnvddwell_10vddvb3cm_tailvddwell_11tailvddwell_12vb4vddwell_13vddvddwell_14vb4vddwell_15well_1vb1voutpvb1d1pvddvoutnvb2subcsrc_nvoutnvoutpamp_027_fan_rrl_otaRT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1MM11sg13_lv_nmosw=5u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=6u l=1um=1MM14sg13_lv_nmosw=6u l=1um=1MM15sg13_lv_nmosw=2u l=1um=1MM16sg13_lv_nmosw=2u l=1um=1RT8ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1RT9ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1RT10ntap1A=4e-12 P=8e-6MM4sg13_lv_pmosw=10u l=1um=1RT11ntap1A=4e-12 P=8e-6MM5sg13_lv_pmosw=4u l=0.5um=1RT12ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=4u l=0.5um=1RT13ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=4u l=0.5um=1RT14ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=4u l=0.5um=1RT15ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=10u l=0.3um=1XXRT2_bank1XRT2_bank1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/testbench.spice index 141ee86f58221b7414f8d87232fa3275aec22b20..20e0a76c371a051831690f4b6fe22395514be240 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/materials/testbench.spice @@ -27,6 +27,7 @@ let dm_bias_v=v(outp)-v(outn) let power_w=-v(vdd)*i(VDD)-v(vb1)*i(VB1)-v(vb2)*i(VB2)-v(vb3)*i(VB3)-v(vb4)*i(VB4) print cm_bias_v dm_bias_v power_w write op.raw all +save i(vb1) i(vb2) i(vb3) i(vb4) i(vdd) v(inn) v(inp) v(outn) v(outp) v(vb1) v(vb2) v(vb3) v(vb4) v(vdd) ac dec 100 10 1G let transfer=(v(outp)-v(outn))/(v(inp)-v(inn)) let gain=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/problem.md index 8110f2d864e840721da0adf0122adeb4df45e1e4..dcab930d9be1523e12ca9b3c75f968255bd61f7d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_027_fan_rrl_ota/problem.md @@ -6,16 +6,14 @@ Implement the supplied 16-MOS telescopic OTA with its transistor DDA-CMFB. Prese ## Inputs and Interface -- `problem.md`: description input. -- `materials/circuit.cdl`: netlist input. -- `materials/circuit.spice`: simulation input. -- `materials/testbench.spice`: performance input. +- `problem.md`: task description. +- `materials/circuit.cdl`: physical netlist. +- `materials/circuit.spice`: simulation circuit. +- `materials/testbench.spice`: performance tests. -Ordered ports: `vinp vinn voutp voutn vdd vss vb1 vb2 vb3 vb4`. Preserve these named connections. +Ordered ports: `vinp vinn voutp voutn vdd vss vb1 vb2 vb3 vb4`; retain all named connections. -The native CDL and simulator SPICE describe the same circuit. VINP/VINN are -the differential inputs; VOUTP/VOUTN are outputs; VDD/VSS are supply/return; -VB1 through VB4 are bias ports. Independent bias sources are outside the physical core. Physical well/substrate taps are included. +Native CDL and simulation SPICE describe the same circuit. VINP/VINN are differential inputs, VOUTP/VOUTN outputs, VDD/VSS supply/return, and VB1–VB4 bias ports. Independent bias sources remain outside the physical core; well/substrate contacts must be physically implemented. ## Operating Conditions @@ -23,48 +21,31 @@ TT, 27 C, VDD=1.2 V, input common mode 0.6 V; vb1/vb2/vb3/vb4=0.45/0.75/0.55/0.6 ## Physical Requirements -Submit a nonempty GDSII of at most 10485760 bytes. -Native IHP DRC and strict named-interface LVS must pass. Keep the supplied tap geometry and compact-device parameters consistent. Functional device, well, contact and routing layers define area; annotation layers do not. The bounding rectangle must fit 5000 by 1000 um. No DRC waivers apply. +Submit nonempty GDSII of at most 10485760 bytes. Pass native IHP DRC and strict named-interface LVS without waivers; preserve contact geometry and compact-device parameters. Functional devices, wells, contacts and routing layers define area, excluding annotations; bounds must fit within 5000 × 1000 um. -Magic extracts candidate interconnect resistance/capacitance and device -junction geometry. Wells/substrate are connected to physical tap rails; source -simulation retains finite tap models. Distributed substrate, statistical -mismatch and manufacturing signoff are outside this nominal contract. +Magic extracts candidate interconnect RC and device junction geometry. Wells/substrate connect to physical-contact supply rails; source simulation retains finite contact models. The nominal contract excludes distributed substrate effects, statistical mismatch and manufacturing signoff. The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. ## Electrical Requirements and Scoring -All declared measurements must be finite and use the extracted candidate. Gain and phase at 10 Hz/100 kHz, output bias, supply power, small differential step response, common-mode kick and recovery are observed by the supplied deck. Step response subtracts 8–9 us baseline from 38–39 us response. The common-mode baseline is 58–59 us; kick peak is 60–62 us and residual is 98–99 us. Continuous quality uses independently simulated same-condition source observations. The physical-domain checks are nonnegative supplied power and nonnegative absolute errors; they are not upstream specifications. +All declared measurements must be finite and use the candidate extracted circuit. The deck observes gain/phase at 10 Hz/100 kHz, output bias, power, small differential steps and common-mode disturbance recovery. The step is response over 38–39 us minus baseline over 8–9 us; common-mode baseline is 58–59 us, peak 60–62 us and residual 98–99 us. Continuous quality is paired with independent source results under matching conditions. Nonnegative supply power and absolute error follow physical definitions, not upstream performance specifications. Q is 1035.78 um2 divided by functional area. The anchor sums (W+2.4)(L+2.4) for each MOS and 3.2² um2 for each local tap and one global tap, then applies a 50% routing allowance. It is an engineering estimate, not a foundry minimum. Response metrics use source-paired dB gain, target phase (180 degree scale), target step (1 mV scale), and inverse absolute common-mode error (1 uV floor); bias uses a 1.2 V target scale; power uses an inverse ratio with 1 pW floor. Coefficient 6 reflects the complete signal amplifier coupled to a transistor common-mode recovery loop. Qualification does not require matching paper performance and does not cover PVT, noise, mismatch or an RRL system. -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observation | Unit | Quality / dimension | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`cm_kick_v`, `cm_recovery_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality / dimension | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `functional_area` | Functional bounding-rectangle area | um2 | area quality Q | positive area | — | | `cm_bias_v` | `(v(outp)+v(outn))/2` | V | target / target / bias | −∞ … +∞ | 1.2 | @@ -75,15 +56,12 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `phase_100khz_deg` | `find phase_deg at=100k` | deg | target / target / response | −∞ … +∞ | 180 | | `step_response_v` | `dm_high_v-dm_before_v` | V | target / target / response | −∞ … +∞ | 0.001 | | `cm_before_v` | `avg cm from=58u to=59u` | V | diagnostic | −∞ … +∞ | — | -| `cm_kick_v` | `max cm_delta from=60u to=62u` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | -| `cm_recovery_v` | `max cm_delta from=98u to=99u` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | +| `cm_kick_v` | `max cm_delta from=60u to=62u` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | +| `cm_recovery_v` | `max cm_delta from=98u to=99u` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | | `cm_min_v` | `min cm from=0 to=100u` | V | diagnostic | −∞ … +∞ | — | | `cm_max_v` | `max cm from=0 to=100u` | V | diagnostic | −∞ … +∞ | — | -Apply each row to every declared load/tone condition. Pair each candidate -observation with its `source_` job under the identical condition. The supplied -deck defines intermediate vectors used in the expressions above. - +Each row applies to every declared load/frequency condition; pair the candidate with the `source_` job under matching conditions. Intermediate vectors for expressions are in the supplied deck. ### Score weights @@ -108,8 +86,4 @@ Solve budget: **6 hours**. Use the reviewed IHP resources. Submit only the GDS with top cell amp_027_fan_rrl_ota. Evaluation runs native DRC/LVS, area, candidate-derived Magic RC extraction and ngspice post-layout observations. The source circuit is independently simulated for scoring. -Discover the frozen task, resources and submission interface through -`/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. -Declared inputs are under `/task`. Write `/workspace/output/final.gds` -and explicitly submit with `python -I /protocol/submit.py`. Creating the file -alone does not submit it. Only feedback supported by the active harness is available. +Discover the frozen task, resources and submission interface through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Declared inputs are in `/task`. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly; file generation alone is not submission. Feedback follows the capabilities provided by the current runtime protocol. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/case.toml index 596ae01c1a5308be5a1458f98550b3fd37234fd6..ca716356b344f8e68991d8e01aaca2f369cfad83 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_029_two_stage_miller_comp" title = "Differential Two-Stage Miller Amplifier Without CMFB" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "0174110e43d8c420b627d490b9fbfc514d5adc98073fd9402ef223de72cfeb91" +sha256 = "42ec59386f3b24e7bf0f8bc92aa16ca1cb13e64dbd2e10737d91d113cb2c48a1" [[assets]] path = "reference/amp_029_two_stage_miller_comp.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "75f57963361c9c4ba5868b0f985bb0ea6273a5f692986a1cb66c890bed9894a5" +sha256 = "29bc92aaa242d877a047a46ead56aaca9fa28fb4eca8363e7ed087bf923a3a8f" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "7f89e7956013c5963092250563b16713f48f9a31dd350503d0e5fb7d7d408923" subcircuit = "amp_029_two_stage_miller_comp" +sha256 = "7f89e7956013c5963092250563b16713f48f9a31dd350503d0e5fb7d7d408923" [task.inputs.simulation] path = "materials/circuit.spice" @@ -508,7 +508,7 @@ id = "late_error_v" unit = "V" dimension = "response" direction = "minimize" -normalization = "ratio" +normalization = "saturating_ratio" aggregation = "max" scale = 0.001 category = "performance" @@ -524,7 +524,7 @@ id = "return_error_v" unit = "V" dimension = "response" direction = "minimize" -normalization = "ratio" +normalization = "saturating_ratio" aggregation = "max" scale = 0.001 category = "performance" @@ -540,7 +540,7 @@ id = "ripple_v" unit = "V" dimension = "response" direction = "minimize" -normalization = "ratio" +normalization = "saturating_ratio" aggregation = "max" scale = 0.001 category = "performance" @@ -556,13 +556,16 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_1:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The ideal external feedback/injection fixture must preserve its stated common mode and DC feedback; 1 uV is the numerical consistency allowance for this measurement fixture." + [[task.evaluation.metrics]] id = "high_v" unit = "V" @@ -615,10 +618,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "672b8502ac4a4a21a2303a12409cb6a597bc53a439e0cc4d53e4f625cb446994" +source_report_sha256 = "dae08be71190ec38e9bfd1dbe8a4088ede94a274c16cc92f784375c396ee6508" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"edeca418063da5deb2557a2d435eb4231e43a9483fb5dff35ae34a93b756f21e\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -698,6 +701,10 @@ unit = "V" value = 1.22049e-11 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "0c96fedee8d9d8e927beb8641e3eba427a914789a01ef38ca0e029819fa366d0" +transient = "8212708c3db66380f8c95a7a948d43ccefeff0fad044d43589f765ebb63c3be6" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -756,6 +763,10 @@ unit = "V" value = 0.0002154386891591478 unit = "W" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "e705ecaa4295ad8c9666c328c5ba195345ecf7afdcc837d39eb5e37474ae5cba" +ac = "acc482d9e9783224d79f534619fe17743eca59a69e69c52d4aa791e82e1bb561" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -768,7 +779,7 @@ unit = "W" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -779,7 +790,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -792,7 +803,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -805,7 +816,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -817,7 +828,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -827,7 +838,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/materials/schematic.svg index a0e3347e3504950e43b51732f13b9ebf290c390c..46a545f44e0a81265eed1e060806ca132099eb0d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_029_two_stage_miller_comp{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_029_two_stage_miller_comp","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/materials/circuit.cdl","netlist_sha256":"7f89e7956013c5963092250563b16713f48f9a31dd350503d0e5fb7d7d408923","project_sha256":"3b6e19a39f691371e8a24ce2522c13de8ddaf3552271977aacbf8ccce34f23b6","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_029_two_stage_miller_comp","XRT0_bank1"],"banks":[{"name":"XRT0_bank1","devices":7,"source_references":["RT0","RT1","RT2","RT6","RT7","RT8","RTSUB"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":2},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_029_two_stage_miller_comp"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/schematic/amp_029_two_stage_miller_comp.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_029_two_stage_miller_compvsssubstg1pwell_3vddwell_4vddvblsubstg1nwell_4vddwell_5voutpvddstg1pwell_5stg1pvssrefrefsubvoutpvssrefsubtailvssrefsubtailvddwell_9voutnvddstg1nwell_9voutpmill_pvoutnmill_nstg1pvoutnmill_pstg1nmill_nvsssubvinpvinnvoutpvssvoutnvddvssrefvblrefsubvinnsubtailstg1nvddwell_3vinpvddvblamp_029_two_stage_miller_compEqual net labels connect. All source devices and exact parameters are retained.MM1sg13_lv_nmosw=10u l=0.5um=1MM10sg13_lv_nmosw=6u l=1um=1MM2sg13_lv_nmosw=10u l=0.5um=1RT3ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=10u l=1um=1RT4ntap1A=4e-12 P=8e-6MM4sg13_lv_pmosw=10u l=1um=1RT5ntap1A=4e-12 P=8e-6MM5sg13_lv_pmosw=12u l=0.5um=1MM6sg13_lv_nmosw=2u l=1um=1MM7sg13_lv_nmosw=6u l=1um=1MM8sg13_lv_nmosw=2u l=1um=1RT9ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=12u l=0.5um=1C1_0cap_cmimw=16.28u l=16.28um=1C2_0cap_cmimw=16.28u l=16.28um=1RR1_0rhighw=.5u l=10.04um=1 b=0Substrate: B=subRR2_0rhighw=.5u l=10.04um=1 b=0Substrate: B=subXXRT0_bank1XRT0_bank1 -Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_029_two_stage_miller_comp{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_029_two_stage_miller_comp","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_029_two_stage_miller_comp","XRT0_bank1"],"banks":[{"name":"XRT0_bank1","devices":7,"source_references":["RT0","RT1","RT2","RT6","RT7","RT8","RTSUB"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_029_two_stage_miller_comp"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/design/amp_029_two_stage_miller_comp.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_029_two_stage_miller_compvsssubwell_3vddwell_4vblsubwell_4vddwell_5well_5stg1pvsssubrefsubtailvssrefsubvddwell_9well_9mill_pmill_nvsssubvinpvinnvoutpvoutnvddvssrefvblrefsubsubstg1nvddwell_3amp_029_two_stage_miller_compMM1sg13_lv_nmosw=10u l=0.5um=1MM10sg13_lv_nmosw=6u l=1um=1MM2sg13_lv_nmosw=10u l=0.5um=1RT3ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=10u l=1um=1RT4ntap1A=4e-12 P=8e-6MM4sg13_lv_pmosw=10u l=1um=1RT5ntap1A=4e-12 P=8e-6MM5sg13_lv_pmosw=12u l=0.5um=1MM6sg13_lv_nmosw=2u l=1um=1MM7sg13_lv_nmosw=6u l=1um=1MM8sg13_lv_nmosw=2u l=1um=1RT9ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=12u l=0.5um=1C1_0cap_cmimw=16.28u l=16.28um=1C2_0cap_cmimw=16.28u l=16.28um=1RR1_0rhighw=.5u l=10.04um=1 b=0RR2_0rhighw=.5u l=10.04um=1 b=0XXRT0_bank1XRT0_bank1Substrate: B=sub + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/problem.md index dfd2025fc3818cbb370bd8277680a21e3139d736..54eb749a5a2752b9b02b00dd51ca3773f0a9043c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_029_two_stage_miller_comp/problem.md @@ -6,11 +6,11 @@ Implement `amp_029_two_stage_miller_comp` as a GDS layout preserving the complet ## Inputs and Interface -- `materials/circuit.cdl`: authoritative physical circuit and ordered named interface. -- `materials/circuit.spice`: equivalent source simulation, including physical passives. +- `materials/circuit.cdl`: authoritative physical circuit and ordered interface. +- `materials/circuit.spice`: equivalent source simulation including physical passives. - `materials/testbench.spice`: performance observations. - `materials/ac.spice`: frequency observations. -- `problem.md`: this contract. +- `problem.md`: task description. Ordered ports: `vinp vinn voutp voutn vdd vss ref vbl`. `vss` is ground, `vdd` the positive rail; signal/output and bias/reference ports have the functions and directions specified below. Every named interface must be preserved. Device multipliers are explicitly expanded; series/parallel passive realizations are already declared in the circuit. The reference layout and development source are not solver inputs. @@ -20,45 +20,32 @@ Ordered ports: `vinp vinn voutp voutn vdd vss ref vbl`. `vss` is ground, `vdd` t ## Physical Requirements -IHP native standalone-block DRC, named-port LVS and distributed Magic RC extraction. Source simulation retains finite native body-tap models. Native LVS checks physical taps and body connectivity; Magic extraction idealizes well/substrate ties and does not retain their finite resistance. Distributed substrate behavior is outside this model boundary. The functional footprint includes active/poly, passives, all routed metals and vias, excluding text and nonfunctional boundary markers. No DRC waivers are declared. The core topology, body connections and physical compensation are fixed. Geometrically equivalent implementations must retain the named ports and device parameters. Functional bounds are 2000 by 1000 um; they bound the supported block footprint, not electrical quality. +Use native IHP standalone-module DRC, named-port LVS and distributed Magic RC extraction. Source simulation retains finite native body-contact models; LVS checks physical contacts and bodies, while Magic idealizes well/substrate connections, omitting finite contact resistance and distributed substrate behavior. Functional area includes active/poly, passives and all metal/vias, excluding text and nonfunctional boundaries. No DRC waivers; topology, bodies and physical compensation are fixed, and equivalent geometry must preserve ports and device parameters. Maximum outline is 2000 × 1000 um, limiting module scope rather than electrical quality. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Unit | Definition | Assignment | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`late_error_v`, `return_error_v`, `ripple_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Unit | Definition | Purpose | |---|---|---|---| | output_cm_v | V | DC output common mode | bias; target (scale 1.2) | | offset_v | V | DC differential output offset | bias; target (scale 0.01) | | power_w | W | DC rail power including external current bias | supply; ratio (scale 1e-12) | | gain_db | dB | Balanced open differential AC gain at 1 Hz | response; db20 | | gain_10khz_db | dB | Balanced open differential AC gain at 10 kHz | response; db20 | -| late_error_v | V | Mean absolute differential tracking error 8–10 us | response; ratio (scale 0.001) | -| return_error_v | V | Mean absolute differential tracking error 18–20 us | response; ratio (scale 0.001) | -| ripple_v | V | Differential peak-to-peak output 8–10 us | response; ratio (scale 0.001) | +| late_error_v | V | Mean absolute differential tracking error 8–10 us | response; saturating_ratio (scale 0.001) | +| return_error_v | V | Mean absolute differential tracking error 18–20 us | response; saturating_ratio (scale 0.001) | +| ripple_v | V | Differential peak-to-peak output 8–10 us | response; saturating_ratio (scale 0.001) | | fixture_cm_max | V | fixture_cm_max | diagnostic; unscored | | high_v | V | high_v | diagnostic; unscored | | low_v | V | low_v | diagnostic; unscored | @@ -66,18 +53,17 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | cm_max_v | V | cm_max_v | diagnostic; unscored | | kcl_a | A | Absolute external DC current-balance residual; producer validity guard at 10 nA | diagnostic; unscored | -All required jobs must finish with finite valid measurements. The 10 nA DC KCL residual bounds numerical validity; nonnegative power/error/range bounds follow their physical definitions. Additional fixture validity bounds are stated above and in runtime task metadata. There are no data-sheet gain, regulation-accuracy or speed gates. Failed extraction, invalid measurements and missing jobs cannot be replaced by low scores. +Complete every required job with finite, valid measurements. The 10 nA DC KCL residual bounds numerical validity; nonnegative power, error and range requirements follow physical definitions. Other test-apparatus validity conditions are stated above and in runtime task metadata. No datasheet gain, regulation-accuracy or speed bounds are imposed. Extraction failure, invalid measurements or missing jobs cannot be replaced by a low score. -Each scored candidate observation is paired with the independent source observation in the identical condition. Ratio-minimize uses (source+scale)/(candidate+scale); target uses scale/(scale+abs(candidate-source)); db20-maximize uses 10^((candidate-source)/20). Scores are continuous and not capped at 100. Each metric uses its worst same-condition paired quality. Diagnostics are unscored. Source results, not the reference GDS, define performance normalization. The 1 mV error/ripple floors and 1 pW power floors regularize zero values; they are not acceptance tolerances. Target scales use the stated rail/output voltage or differential step amplitude. +Pair candidate observations with independent source observations under matching conditions. Minimizing ratio is (source+scale)/(candidate+scale), target quality is scale/(scale+abs(candidate-source)), and maximizing db20 is 10^((candidate-source)/20). Each metric takes the worst paired quality; score is continuous and not capped at 100. Diagnostics are unscored, and source results define performance baselines. The 1 mV error/ripple floor and 1 pW power floor handle zero values and are not acceptance tolerances; target scales are declared supply/output voltages or differential-step amplitudes. Area anchor: 2278.38 um2. 1.5 times the sum over expanded physical MOS, resistor and capacitor units of (W + 4 um)*(L + 4 um). The 4 um allowances cover local contacts/isolation; 50% covers compact routing. Body taps are covered by the allowance, not counted twice. This is an analytical compact-area anchor, not the witness footprint. Coefficient 6 covers the compensated differential feedback experiment. No CMFB is added. Miller capacitors are open at DC and provide no DC common-mode feedback. A large parasitic-induced common-mode shift and reduced differential response are continuous quality losses. These finite-window measurements do not certify robust biasing, settling, phase margin or useful product gain. No numerical node shunt is used. - ### Score weights -Finite-window amplifier response: tracking error 36%; ripple 22.5%; AC transfer 18%; bias and offset 4.5%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +Finite-window amplifier response: tracking error 36%, ripple 22.5%, AC transfer 18%, bias and offset 4.5%, power 9%, area 10%. Each objective's weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -97,7 +83,4 @@ Solve budget: **8 hours**. Use the runtime task/resource discovery interface for the frozen tool image, PDK and declared feedback operations. The evaluator checks the submitted GDS independently and extracts its parasitics. Submit `output/final.gds`, top cell `amp_029_two_stage_miller_comp`; do not submit a source netlist in place of a layout. Keep all named ports. The resource bundle contains the approved open PDK and native EDA tools. -The source and extracted-candidate decks require absolute external DC current -conservation residual `kcl_a <= 1e-08 A`. A larger residual aborts -simulation and produces an evaluator error with unknown score, rather than a -functional rejection. The reported residual is an unscored diagnostic. +Both source and candidate extracted circuits require an absolute external DC current-conservation residual `kcl_a <= 1e-08 A`. Exceeding it terminates simulation with an evaluation error and an unknown score, rather than functional rejection. The residual is diagnostic and unscored. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/case.toml index 3a41f2a5981a747dc8d9a4bbd4643a712626aaf0..0b3a09d00fa9e765860f5b442302ff90d273ac67 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_034_fan_chopper_cmfb" title = "Fan Output CMFB OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "f50a02b452d55de7c9df1ab2988716dc0d5f30f51dec5c02b2ae3ab47c170f33" +sha256 = "03fac254ebcaec6a88a1aea3475c19610997f2842b13b00226c74661ddaf15fa" [[assets]] path = "reference/amp_034_fan_chopper_cmfb.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "7578e95b98c199804ee984875f3495cd61e0913711d678d7d3b6403bdd7a8752" +sha256 = "88b76a53ab8bf9e6cb9c2f44dec6fe5c57913fa68a418642724f9a0dfa69e004" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "1898e7ade5f22a3a7785fcc52bb04bce6a9405a9b63a01f0b01da6ad316e00a3" subcircuit = "amp_034_fan_chopper_cmfb" +sha256 = "1898e7ade5f22a3a7785fcc52bb04bce6a9405a9b63a01f0b01da6ad316e00a3" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "cda4a2fe217a444033868a7c36a0ab0e0644f2a18ebaabd963bce758fc0ccefb" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "cf39f36f64410d1e372ddfebac2e5e93f29d547ee4bd2f669e41d953934ac933" +sha256 = "53b7fd97e1fce73ec5827052a6a33416a10b9920d7046da23c5a45814ed67d4a" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "a03ec752e56727475d93ab6ea1f6210790c1dce1e49acf32a5094132d8991b52" +sha256 = "1736398f413762ed95f591bc91ab8acc55c245376cc41aa840f9a0178510324f" [task.constraints] quality = [ @@ -670,9 +670,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_quiet_pp_v", @@ -683,15 +682,18 @@ baseline = [ "source_condition_1:cm_quiet_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_late_pp_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_late_pp_v", @@ -702,15 +704,18 @@ baseline = [ "source_condition_1:cm_late_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_kick_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_kick_v", @@ -721,15 +726,18 @@ baseline = [ "source_condition_1:cm_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_recovery_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_recovery_error_v", @@ -740,6 +748,10 @@ baseline = [ "source_condition_1:cm_recovery_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_quiet_v" unit = "V" @@ -872,9 +884,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_quiet_pp_v", @@ -885,15 +896,18 @@ baseline = [ "source_condition_1:s1_quiet_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_late_pp_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_late_pp_v", @@ -904,15 +918,18 @@ baseline = [ "source_condition_1:s1_late_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_kick_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_kick_v", @@ -923,15 +940,18 @@ baseline = [ "source_condition_1:s1_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_recovery_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_recovery_error_v", @@ -942,15 +962,18 @@ baseline = [ "source_condition_1:s1_recovery_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "dm_high_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_0:dm_high_error_v", @@ -961,15 +984,18 @@ baseline = [ "source_condition_1:dm_high_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "dm_return_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_0:dm_return_error_v", @@ -980,6 +1006,10 @@ baseline = [ "source_condition_1:dm_return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -988,7 +1018,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -999,6 +1028,10 @@ baseline = [ "source_condition_1:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This powered amplifier consumes net energy from the declared supply and bias sources; negative delivered power would not represent the required powered circuit." + [[task.evaluation.metrics]] id = "cm_bias_v" unit = "V" @@ -1061,7 +1094,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -1072,6 +1104,10 @@ baseline = [ "source_condition_1:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This powered amplifier consumes net energy from the declared supply and bias sources; negative delivered power would not represent the required powered circuit." + [[task.evaluation.metrics]] id = "closed_gain_10khz_db" unit = "dB" @@ -1125,30 +1161,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_2:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "Residual AC common mode must remain below 1 uV for the declared 1 V differential excitation; otherwise the fixture does not measure the required differential response." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_2:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The external differential measurement loop must enforce its declared DC excitation within 1 uV; otherwise the observation uses an invalid fixture operating point." + [task.evaluation.pre_layout] -source_report_sha256 = "bff45fef40621536b379eacbef8333dfd7da5a1befc50e4a421d998a63474371" +source_report_sha256 = "39f60e11671104a77869414b7464bc89a055cb082b370cf910e8bee83d3eaeb1" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"e79cca5f5103e3521e27ee80e6b37894caeafe76b57ce7351d4ab464a93b2453\", \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1208,7 +1250,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "cf39f36f64410d1e372ddfebac2e5e93f29d547ee4bd2f669e41d953934ac933" +deck = "53b7fd97e1fce73ec5827052a6a33416a10b9920d7046da23c5a45814ed67d4a" dut = "cda4a2fe217a444033868a7c36a0ab0e0644f2a18ebaabd963bce758fc0ccefb" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.closed_gain_10khz_db] @@ -1220,47 +1262,47 @@ value = 0.5145191412199209 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_input_cm_v] -value = 0.5145191411049604 +value = 0.5145191413910424 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_kick_v] -value = 5.553535409319466e-11 +value = 2.581282965152809e-10 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_late_pp_v] -value = 2.227940054666533e-11 +value = 2.783639985182162e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_late_v] -value = 0.5145191411035221 +value = 0.5145191413913373 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_pre_kick_v] -value = 0.5145191411045335 +value = 0.5145191413901259 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_quiet_pp_v] -value = 2.089473039035283e-11 +value = 2.668398835226071e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_quiet_v] -value = 0.5145191411026194 +value = 0.5145191413919855 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_recovery_error_v] -value = 3.469314745218347e-12 +value = 3.925782407508563e-12 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_recovery_v] -value = 0.5145191411069823 +value = 0.5145191413922028 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_ref_v] -value = 0.5145191411054754 +value = 0.5145191413913728 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.cm_stage_ref_v] -value = 0.5145191411040574 +value = 0.5145191413912287 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_bias_v] @@ -1268,15 +1310,15 @@ value = -2.93098878501041e-14 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_high_error_v] -value = 3.14415160573692e-15 +value = 6.206424263409425e-15 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.dm_return_error_v] -value = 5.437766209540088e-14 +value = 4.251737850676298e-14 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.mean_power_w] -value = 0.0002723656020634466 +value = 0.0002723656021176976 unit = "W" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.power_w] @@ -1288,49 +1330,54 @@ value = 0.3265125902632058 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_input_cm_v] -value = 0.3265125897818256 +value = 0.3265125897828277 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_kick_v] -value = 2.847755364854265e-11 +value = 1.506524349714766e-10 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_late_pp_v] -value = 6.617040249068395e-12 +value = 1.922945136456633e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_late_v] -value = 0.3265125897818174 +value = 0.3265125897827136 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_pre_kick_v] -value = 0.3265125897818112 +value = 0.3265125897826363 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_quiet_pp_v] -value = 5.530909064077605e-12 +value = 1.870548160809449e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_quiet_v] -value = 0.3265125897816054 +value = 0.3265125897824681 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_recovery_error_v] -value = 6.75725888436523e-13 +value = 2.629791585899381e-12 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_recovery_v] -value = 0.3265125897814254 +value = 0.3265125897825291 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_ref_v] -value = 0.3265125897816969 +value = 0.3265125897825922 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.s1_stage_ref_v] -value = 0.326512589781805 +value = 0.3265125897827368 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "fda8f09af68e851c18465b4e2a29ecfb52ed073ca74551d05565852515c6246e" +ac = "b39af2545bf0c974bfb84422884575dca3ae4e321bd921638aa59d765b1b6c5b" +transient = "e1afd4bfabaf143d4785a880a0c32a2e09075e3c115d34d9dd14a1335dac065f" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1389,7 +1436,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "cf39f36f64410d1e372ddfebac2e5e93f29d547ee4bd2f669e41d953934ac933" +deck = "53b7fd97e1fce73ec5827052a6a33416a10b9920d7046da23c5a45814ed67d4a" dut = "cda4a2fe217a444033868a7c36a0ab0e0644f2a18ebaabd963bce758fc0ccefb" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.closed_gain_10khz_db] @@ -1401,47 +1448,47 @@ value = 0.5145191412199209 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_input_cm_v] -value = 0.5272836531540334 +value = 0.5272836530470836 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_kick_v] -value = 0.01438500998706638 +value = 0.01439070334460935 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_late_pp_v] -value = 1.109803360321848e-10 +value = 2.420530442748259e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_late_v] -value = 0.514519140658979 +value = 0.5145191409059839 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_pre_kick_v] -value = 0.5145191386218766 +value = 0.5145191386521749 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_quiet_pp_v] -value = 2.089473039035283e-11 +value = 2.668398835226071e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_quiet_v] -value = 0.5145191411026194 +value = 0.5145191413919855 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_recovery_error_v] -value = 3.571577302093175e-09 +value = 3.491205786592767e-09 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_recovery_v] -value = 0.5145191421934511 +value = 0.514519142143372 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_ref_v] -value = 0.5392353804511352 +value = 0.539235380454869 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.cm_stage_ref_v] -value = 0.5145191406246639 +value = 0.5145191408849435 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_bias_v] @@ -1449,15 +1496,15 @@ value = -2.93098878501041e-14 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_high_error_v] -value = 1.136437024039069e-05 +value = 1.13643730197952e-05 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dm_return_error_v] -value = 2.474598948886406e-13 +value = 1.181886774455246e-13 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.mean_power_w] -value = 0.0002577955931817435 +value = 0.000257795671053517 unit = "W" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.power_w] @@ -1469,49 +1516,54 @@ value = 0.3265125902632058 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_input_cm_v] -value = 0.2120932661101294 +value = 0.2120932661019089 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_kick_v] -value = 0.01603275202633814 +value = 0.01603593834687328 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_late_pp_v] -value = 8.190970124388741e-11 +value = 1.985128728065888e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_late_v] -value = 0.3265125897688798 +value = 0.3265125897823087 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_pre_kick_v] -value = 0.3265126154402451 +value = 0.326512615876301 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_quiet_pp_v] -value = 5.530909064077605e-12 +value = 1.870548160809449e-11 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_quiet_v] -value = 0.3265125897816054 +value = 0.3265125897824681 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_recovery_error_v] -value = 3.576760129586261e-08 +value = 3.62420842475402e-08 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_recovery_v] -value = 0.3265125796726505 +value = 0.3265125796342074 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_ref_v] -value = 0.3265146462980014 +value = 0.3265146461796988 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.s1_stage_ref_v] -value = 0.3265125897713764 +value = 0.3265125897825504 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "fda8f09af68e851c18465b4e2a29ecfb52ed073ca74551d05565852515c6246e" +ac = "b39af2545bf0c974bfb84422884575dca3ae4e321bd921638aa59d765b1b6c5b" +transient = "64a25853bf99c1e86e50f953be1d4256fc72b6d0dd9a1e35e85bfe20bf4aa2f2" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1542,7 +1594,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "a03ec752e56727475d93ab6ea1f6210790c1dce1e49acf32a5094132d8991b52" +deck = "1736398f413762ed95f591bc91ab8acc55c245376cc41aa840f9a0178510324f" dut = "cda4a2fe217a444033868a7c36a0ab0e0644f2a18ebaabd963bce758fc0ccefb" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.dc_feedback_error_v] @@ -1561,6 +1613,10 @@ unit = "dB" value = 58.87927 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "e012c48f45466ec38942ec0241b4c5c3d357f9cceca9fef03446618f10ef3b6d" +ac = "730519b8e53cba6299ed2d6a8366fc41228477dc0070940f10a78c5e98948113" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1573,7 +1629,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1584,7 +1640,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1597,7 +1653,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1610,7 +1666,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1622,7 +1678,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1632,7 +1688,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 1800 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/ac.spice index 31c98180870ee920443d2b0743079a8d65c92af2..2a39e884c481da471a6866ef4dd4195e5c45b9e6 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/ac.spice @@ -30,7 +30,6 @@ IN 0 outn pulse(0 {kick_a} 30u 20n 20n 2u 200u) XDUT inp inn outp outn vdd 0 vb1 vb2 vb3 vb4 ref s1p s1n ctl amp_034_fan_chopper_cmfb .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/schematic.svg index 024cc93c2d58763152cca7a2fae669ad52a452cd..d479dca748aec6515cbd2c26157bc69f101c3449 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_034_fan_chopper_cmfb{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_034_fan_chopper_cmfb","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/circuit.cdl","netlist_sha256":"1898e7ade5f22a3a7785fcc52bb04bce6a9405a9b63a01f0b01da6ad316e00a3","project_sha256":"4b9a3f0d3bd3baac28c00880560e7d68df5a2e133a475ea56608d8b280d20915","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["amp_034_fan_chopper_cmfb","XRT2_bank1","XRRMN_CMFB_bank2","XRRMP_CMFB_bank3"],"banks":[{"name":"XRT2_bank1","devices":14,"source_references":["RT2","RT3","RT4","RT5","RT6","RT8","RT12","RT14","RT16","RT21","RT23","RT24","RT26","RTSUB"]},{"name":"XRRMN_CMFB_bank2","devices":4,"source_references":["RRMN_CMFB_0","RRMN_CMFB_1","RRMN_CMFB_2","RRMN_CMFB_3"]},{"name":"XRRMP_CMFB_bank3","devices":4,"source_references":["RRMP_CMFB_0","RRMP_CMFB_1","RRMP_CMFB_2","RRMP_CMFB_3"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":8},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_034_fan_chopper_cmfb"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/schematic/amp_034_fan_chopper_cmfb.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_034_fan_chopper_cmfbvoutnsubcmfb__cm_sensevsssubvoutpsubcmfb__cm_senseccm_s4ccm_s5ccm_s5ccm_s6vssccm_s6voutpcore__g2_pvoutpcore__g2_pcore__vb2voutncore__g2_nvoutncore__g2_nvsssubvoutnsubcore__out1_ncmfb__cm_sensevoutpsubcmfb__cm_sensevinpvinnvoutpvoutnvddsubvsscore__vb1core__vb2core__vb3core__vb4vref_cmcore__out1_pcore__out1_nvb4ocore__fold_nwell_0voutpvsssubcore__g2_pvoutnvsssubcore__g2_nvddcore__out1_nsubcore__g2_nvddwell_7vsscore__vb3core__out1_ncore__g2_nwell_7vddcore__out1_psubcore__g2_pvddwell_9core__out1_nvsscore__out1_pcore__g2_pwell_9vddwell_10vddwell_10well_0cmfb__ptailcmfb__biasvddwell_11vddcore__vb4well_11core__tailcore__casc_src_nvsscore__out1_psubcore__g2_nvddwell_13vddcore__out1_pcore__g2_nwell_13vsscore__out1_nsubvddcore__g2_pvddwell_15vddcore__out1_ncore__g2_pwell_15vsswell_1vb4osubcmfb__mirrvddwell_17vinpcore__fold_pcore__tailwell_17vddwell_18vddcmfb__biascmfb__biaswell_18core__vb3vddwell_19vinncore__fold_ncore__tailwell_19vddwell_20core__out1_pcmfb__ptailcmfb__mirrwell_20cmfb__cm_sensevsscore__vb1subcore__fold_pwell_1vddwell_22vref_cmvb4ocmfb__ptailwell_22vsscore__vb1core__casc_src_psubcore__fold_nvsssubcmfb__mirrcmfb__mirrvddwell_25vddcore__vb4vddcore__casc_src_nwell_25vsssubcmfb__biascore__vb2cmfb__biasvddwell_27vddcore__vb4core__casc_src_pwell_27vddcore__out1_pwell_28voutpvddvb4owell_28vddwell_29voutnsubvddvb4owell_29vb4occm_s1ccm_s1ccm_s2ccm_s2core__fold_pccm_s3ccm_s3ccm_s4amp_034_fan_chopper_cmfbEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM10_COREsg13_lv_pmosw=10u l=0.3um=1RT1ntap1A=4e-12 P=8e-6MM11_COREsg13_lv_pmosw=10u l=0.3um=1MM12_COREsg13_lv_nmosw=5u l=0.3um=1MM13_COREsg13_lv_nmosw=5u l=0.3um=1MM14_COREsg13_lv_nmosw=20u l=0.25um=1MM15_COREsg13_lv_nmosw=20u l=0.25um=1MM16_COREsg13_lv_nmosw=2u l=0.13um=1RT7ntap1A=4e-12 P=8e-6MM17_COREsg13_lv_pmosw=2u l=0.13um=1MM18_COREsg13_lv_nmosw=2u l=0.13um=1RT9ntap1A=4e-12 P=8e-6MM19_COREsg13_lv_pmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM1_CMFBsg13_lv_pmosw=0.33u l=0.26um=1RT11ntap1A=4e-12 P=8e-6MM1_COREsg13_lv_pmosw=20u l=1um=1MM20_COREsg13_lv_nmosw=2u l=0.13um=1RT13ntap1A=4e-12 P=8e-6MM21_COREsg13_lv_pmosw=2u l=0.13um=1MM22_COREsg13_lv_nmosw=2u l=0.13um=1RT15ntap1A=4e-12 P=8e-6MM23_COREsg13_lv_pmosw=2u l=0.13um=1MM2_CMFBsg13_lv_nmosw=2.32u l=1.31um=1RT17ntap1A=4e-12 P=8e-6MM2_COREsg13_lv_pmosw=20u l=0.5um=1RT18ntap1A=4e-12 P=8e-6MM3_CMFBsg13_lv_pmosw=0.88u l=0.26um=1RT19ntap1A=4e-12 P=8e-6MM3_COREsg13_lv_pmosw=20u l=0.5um=1RT20ntap1A=4e-12 P=8e-6MM4_CMFBsg13_lv_pmosw=1.42u l=0.27um=1MM4_COREsg13_lv_nmosw=10u l=1um=1RT22ntap1A=4e-12 P=8e-6MM5_CMFBsg13_lv_pmosw=1.42u l=0.27um=1MM5_COREsg13_lv_nmosw=10u l=1um=1MM6_CMFBsg13_lv_nmosw=2.32u l=1.31um=1RT25ntap1A=4e-12 P=8e-6MM6_COREsg13_lv_pmosw=10u l=1um=1MM7_CMFBsg13_lv_nmosw=0.3u l=0.22um=1RT27ntap1A=4e-12 P=8e-6MM7_COREsg13_lv_pmosw=10u l=1um=1RT28ntap1A=4e-12 P=8e-6MM8Osg13_lv_pmosw=20u l=1um=1RT29ntap1A=4e-12 P=8e-6MM9Osg13_lv_pmosw=20u l=1um=1CCM0_0cap_cmimw=2.11u l=2.11um=1CCM1_0cap_cmimw=2.11u l=2.11um=1CCM2_0cap_cmimw=2.11u l=2.11um=1CCM3_0cap_cmimw=2.11u l=2.11um=1CCM4_0cap_cmimw=2.11u l=2.11um=1CCM5_0cap_cmimw=2.11u l=2.11um=1CCM6_0cap_cmimw=2.11u l=2.11um=1CM1_CORE_0cap_cmimw=44.67u l=44.67um=1CM1_CORE_1cap_cmimw=44.67u l=44.67um=1CM2_CORE_0cap_cmimw=44.67u l=44.67um=1CM2_CORE_1cap_cmimw=44.67u l=44.67um=1XXRT2_bank1XRT2_bank1XXRRMN_CMFB_bank2XRRMN_CMFB_bank2XXRRMP_CMFB_bank3XRRMP_CMFB_bank3 -Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect. +amp_034_fan_chopper_cmfb{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_034_fan_chopper_cmfb","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["amp_034_fan_chopper_cmfb","XRT2_bank1","XRRMN_CMFB_bank2","XRRMP_CMFB_bank3"],"banks":[{"name":"XRT2_bank1","devices":14,"source_references":["RT2","RT3","RT4","RT5","RT6","RT8","RT12","RT14","RT16","RT21","RT23","RT24","RT26","RTSUB"]},{"name":"XRRMN_CMFB_bank2","devices":4,"source_references":["RRMN_CMFB_0","RRMN_CMFB_1","RRMN_CMFB_2","RRMN_CMFB_3"]},{"name":"XRRMP_CMFB_bank3","devices":4,"source_references":["RRMP_CMFB_0","RRMP_CMFB_1","RRMP_CMFB_2","RRMP_CMFB_3"]}],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_034_fan_chopper_cmfb"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/design/amp_034_fan_chopper_cmfb.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_034_fan_chopper_cmfbvoutnsubcmfb__cm_sensevsssubvoutpsubcmfb__cm_senseccm_s4ccm_s5ccm_s5ccm_s6vssccm_s6voutpcore__g2_pvoutpcore__g2_pcore__vb2voutncore__g2_nvoutncore__g2_nvsssubvoutnsubcore__out1_ncmfb__cm_sensevoutpsubcmfb__cm_sensevinpvinnvoutpvoutnvddsubvsscore__vb1core__vb2core__vb3core__vb4vref_cmcore__out1_pcore__out1_nvb4ocore__fold_nwell_0voutpvsssubcore__g2_pvoutnvsssubcore__g2_nvddcore__out1_nsubcore__g2_nvddwell_7vsscore__vb3core__out1_ncore__g2_nwell_7vddcore__out1_psubcore__g2_pvddwell_9core__out1_nvsscore__out1_pcore__g2_pwell_9vddwell_10vddwell_10well_0cmfb__ptailcmfb__biasvddwell_11vddcore__vb4well_11core__tailcore__casc_src_nvsscore__out1_psubcore__g2_nvddwell_13vddcore__out1_pcore__g2_nwell_13vsscore__out1_nsubvddcore__g2_pvddwell_15vddcore__out1_ncore__g2_pwell_15vsswell_1vb4osubcmfb__mirrvddwell_17vinpcore__fold_pcore__tailwell_17vddwell_18vddcmfb__biascmfb__biaswell_18core__vb3vddwell_19vinncore__fold_ncore__tailwell_19vddwell_20core__out1_pcmfb__ptailcmfb__mirrwell_20cmfb__cm_sensevsscore__vb1subcore__fold_pwell_1vddwell_22vref_cmvb4ocmfb__ptailwell_22vsscore__vb1core__casc_src_psubcore__fold_nvsssubcmfb__mirrcmfb__mirrvddwell_25vddcore__vb4vddcore__casc_src_nwell_25vsssubcmfb__biascore__vb2cmfb__biasvddwell_27vddcore__vb4core__casc_src_pwell_27vddcore__out1_pwell_28voutpvddvb4owell_28vddwell_29voutnsubvddvb4owell_29vb4occm_s1ccm_s1ccm_s2ccm_s2core__fold_pccm_s3ccm_s3ccm_s4amp_034_fan_chopper_cmfbFOLDED INPUT AND CASCODE COREOUTPUT COMMON-MODE FEEDBACKLEVEL SHIFT AND OUTPUT DRIVERVOUTP / VOUTN OUTPUTCOMPENSATIONWELL AND SUBSTRATE CONTACTSMM10_COREMM11_COREMM12_COREMM13_COREMM14_COREMM15_COREMM16_COREMM17_COREMM18_COREMM19_COREMM1_CMFBMM1_COREMM20_COREMM21_COREMM22_COREMM23_COREMM2_CMFBMM2_COREMM3_CMFBMM3_COREMM4_CMFBMM4_COREMM5_CMFBMM5_COREMM6_CMFBMM6_COREMM7_CMFBMM7_COREMM8OMM9OXRRMN_CMFB_bank2XRRMP_CMFB_bank3XRT2_bank1CCM0CCM1CCM2CCM3CCM4CCM5CCM6CM1_CORE_0CM1_CORE_1CM2_CORE_0CM2_CORE_1RT0RT1RT7RT9RT10RT11RT13RT15RT17RT18RT19RT20RT22RT25RT27RT28RT29 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/testbench.spice index 0304f103cd21bf3ac16a63cdc2a97f40b5889369..f3283f2fbefc96c57eaa3400ff9800e5950d8228 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/materials/testbench.spice @@ -26,7 +26,6 @@ IN 0 outn pulse(0 {kick_a} 30u 20n 20n 2u 200u) XDUT inp inn outp outn vdd 0 vb1 vb2 vb3 vb4 ref s1p s1n ctl amp_034_fan_chopper_cmfb .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op @@ -40,7 +39,7 @@ ac dec 200 1 1g let closed=db(v(outp)-v(outn)) meas ac closed_gain_10khz_db find closed at=10k write ac.raw all -tran 2n 150u 0 2n +tran 2n 150u 0 4n let end_time=time[length(time)-1] if abs(end_time-150u) > 1e-12 echo Error: incomplete transient window diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/problem.md index 64c0bec538c210b5a4eaf65e570fc096a2579f91..1e5e183029ead6d52bb01a7733221dc0f23c140b 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_034_fan_chopper_cmfb/problem.md @@ -12,46 +12,33 @@ W/L are rounded to 10 nm so centred contacts remain on the 5 nm manufacturing gr ## Operating Conditions -TT MOS, typical MIM/high-poly, 27 C, 1.2 V supply, 0.6 V input common mode, 10 pF on each output. The external voltage sources are vb1_core core__vb1 vss dc 0.3983759766; vb2_core core__vb2 vss dc 0.65; vb3_core core__vb3 vss dc 0.45; vb4_core core__vb4 vss dc 0.55; vrefcm vref_cm vss dc 0.5. Both the no-disturbance condition and the following combined sequence run for 150 us with a 2 ns maximum step. The differential command rises from 0 to 10 mV at 10 us and returns after 10 us; equal +20 uA currents enter both outputs at 30 us for 2 us. The output reference rises by 25 mV at 50 us for 15 us; input common mode rises by 25 mV at 75 us for 15 us. The stage-1 reference is not an interface of this circuit. All edges are 20 ns. Pulse widths are measured after the rising edge, so falling edges start one edge duration after nominal delay plus width. The unperturbed condition sets every step and kick amplitude to zero. The two CMFB loops, where present, remain connected throughout. Monitor ports are unloaded; their extraction and routing parasitics remain. No external clock is applied: straight-through chopper gates stay tied to their actual rails, and crossed paths stay off. +TT MOS, typical MIM/high-poly, 27 C, 1.2 V supply, 0.6 V input common mode, 10 pF on each output. The external voltage sources are vb1_core core__vb1 vss dc 0.3983759766; vb2_core core__vb2 vss dc 0.65; vb3_core core__vb3 vss dc 0.45; vb4_core core__vb4 vss dc 0.55; vrefcm vref_cm vss dc 0.5. Both the no-disturbance condition and the following combined sequence run for 150 us with a 4 ns maximum step. The differential command rises from 0 to 10 mV at 10 us and returns after 10 us; equal +20 uA currents enter both outputs at 30 us for 2 us. The output reference rises by 25 mV at 50 us for 15 us; input common mode rises by 25 mV at 75 us for 15 us. The stage-1 reference is not an interface of this circuit. All edges are 20 ns. Pulse widths are measured after the rising edge, so falling edges start one edge duration after nominal delay plus width. The unperturbed condition sets every step and kick amplitude to zero. The two CMFB loops, where present, remain connected throughout. Monitor ports are unloaded; their extraction and routing parasitics remain. No external clock is applied: straight-through chopper gates stay tied to their actual rails, and crossed paths stay off. -The external fixture enforces inp = icm + (signal − (outp−outn))/2 and inn = icm − (signal − (outp−outn))/2. It closes only the differential measurement loop; the DUT transistors close common-mode feedback. The frequency deck retains this DC feedback, isolates each feedback branch with 1 TH/1 F low-pass elements and injects +0.5/−0.5 V AC. The actual differential excitation remains 1 V and residual common-mode must be at most 1 uV. +The external fixture sets inp = icm + (signal − (outp−outn))/2, inn = icm − (signal − (outp−outn))/2, closing only the differential measurement loop; DUT transistors implement common-mode feedback. The frequency-domain deck retains DC feedback, isolates each feedback branch with a 1 TH/1 F low-pass and injects +0.5/−0.5 V AC. Actual differential excitation remains 1 V with common-mode residual at most 1 uV. -Both decks sweep 1 Hz–1 GHz at 200 points/decade. AC describes the linearization of the verified DC point, not proof of a dynamically stable equilibrium. An explicit rshunt=1e12 (1 TOhm) numerical shunt to ground at each node regularizes otherwise floating extraction/series-capacitor nodes; source and candidate use the identical setting. Sensitivity is checked with 10 TOhm. Supply startup is not simulated: transient starts from the DC operating point, and the no-disturbance interval tests whether that point persists. Use the default sparse solver with the tolerances declared in the decks. +Both decks sweep 200 points per decade from 1 Hz to 1 GHz. AC linearizes a verified DC point and does not prove that equilibrium dynamically stable. Source and candidate both use `rshunt=1e12` (1 TOhm) numerical shunts from each node to ground to handle floating extracted/series-capacitor nodes; sensitivity is checked at 10 TOhm. Power-up startup is not simulated: transient starts at the DC point, and an undisturbed interval checks whether it persists. Use the default sparse solver and deck-declared tolerances. ## Physical Requirements Submit a native SG13G2 GDS with top cell `amp_034_fan_chopper_cmfb`, at most 67108864 bytes, within 20000 × 2000 um. Native main and maximal DRC, named-interface LVS and geometry must pass without marker waivers. Keep every MOS, body connection and passive path. Unit multiplicities and the declared passive series/parallel realization are fixed in the materials. -The functional footprint includes active, gate, contact, metal, via, MIM and complete routing shapes; well, text, annotations and nonfunctional markers alone do not define it. The runtime task supplies the exact layer set. Candidate GDS drives native connectivity extraction and distributed wire resistance/ground capacitance extraction, then the same native MOS/MIM/high-poly simulation models used by the source. This nominal MOS/R/C boundary does not assert RF/coupling extraction, PVT, mismatch, noise or manufacturing signoff. +Functional area includes active regions, gates, contacts, metals, vias, MIM devices and all routing. Wells, text, annotations and nonfunctional markers cannot independently define functional area. Runtime task metadata supplies the exact layer set. After native connectivity and distributed wire-resistance/ground-capacitance extraction, simulate the candidate GDS with the same native MOS/MIM/high-poly models as the source. This task's nominal MOS/R/C scope excludes RF/coupling extraction, PVT, mismatch, noise and manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Every declared simulation must complete with finite measurements and complete raw records. Transient means use full-precision cumulative integration with interpolated endpoint corrections; incomplete windows are errors. PP denotes the full finite-window range, including any oscillation or slow drift. No phase margin, loop gain, settling time or periodic steady state is claimed. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +Complete every declared simulation, with finite measurements and complete raw records. Transient means use full-precision cumulative integration and interpolated endpoint corrections; incomplete windows are errors. PP is the range over the entire finite window, including oscillation or slow drift. It does not establish phase margin, loop gain, settling time or periodic steady state. + +`cm_recovery_error_v`, `s1_recovery_error_v`, `dm_high_error_v`, `dm_return_error_v`, `cm_quiet_pp_v`, `cm_late_pp_v`, `cm_kick_v`, `s1_quiet_pp_v`, `s1_late_pp_v`, `s1_kick_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. | Metric | Unit | Definition | Quality role / functional domain | | --- | --- | --- | --- | @@ -62,10 +49,10 @@ Every declared simulation must complete with finite measurements and complete ra | `cm_input_cm_v` | V | avg cm, 85–89 us | bias; target | | `cm_stage_ref_v` | V | avg cm, 120–124 us | bias; target | | `cm_late_v` | V | avg cm, 145–149 us | bias; target | -| `cm_quiet_pp_v` | V | pp cm, 5–9 us | response; ratio; 0 ≤ value | -| `cm_late_pp_v` | V | pp cm, 145–149 us | response; ratio; 0 ≤ value | -| `cm_kick_v` | V | max cm_delta, 30–33 us | response; ratio; 0 ≤ value | -| `cm_recovery_error_v` | V | avg cm_delta, 45–49 us | response; ratio; 0 ≤ value | +| `cm_quiet_pp_v` | V | pp cm, 5–9 us | response; saturating_ratio; 0 ≤ value | +| `cm_late_pp_v` | V | pp cm, 145–149 us | response; saturating_ratio; 0 ≤ value | +| `cm_kick_v` | V | max cm_delta, 30–33 us | response; saturating_ratio; 0 ≤ value | +| `cm_recovery_error_v` | V | avg cm_delta, 45–49 us | response; saturating_ratio; 0 ≤ value | | `s1_quiet_v` | V | avg s1, 5–9 us | bias; target | | `s1_pre_kick_v` | V | avg s1, 28–29 us | bias; target | | `s1_recovery_v` | V | avg s1, 45–49 us | bias; target | @@ -73,12 +60,12 @@ Every declared simulation must complete with finite measurements and complete ra | `s1_input_cm_v` | V | avg s1, 85–89 us | bias; target | | `s1_stage_ref_v` | V | avg s1, 120–124 us | bias; target | | `s1_late_v` | V | avg s1, 145–149 us | bias; target | -| `s1_quiet_pp_v` | V | pp s1, 5–9 us | response; ratio; 0 ≤ value | -| `s1_late_pp_v` | V | pp s1, 145–149 us | response; ratio; 0 ≤ value | -| `s1_kick_v` | V | max s1_delta, 30–33 us | response; ratio; 0 ≤ value | -| `s1_recovery_error_v` | V | avg s1_delta, 45–49 us | response; ratio; 0 ≤ value | -| `dm_high_error_v` | V | avg dmerror, 18–19 us | response; ratio; 0 ≤ value | -| `dm_return_error_v` | V | avg dmerror, 25–29 us | response; ratio; 0 ≤ value | +| `s1_quiet_pp_v` | V | pp s1, 5–9 us | response; saturating_ratio; 0 ≤ value | +| `s1_late_pp_v` | V | pp s1, 145–149 us | response; saturating_ratio; 0 ≤ value | +| `s1_kick_v` | V | max s1_delta, 30–33 us | response; saturating_ratio; 0 ≤ value | +| `s1_recovery_error_v` | V | avg s1_delta, 45–49 us | response; saturating_ratio; 0 ≤ value | +| `dm_high_error_v` | V | avg dmerror, 18–19 us | response; saturating_ratio; 0 ≤ value | +| `dm_return_error_v` | V | avg dmerror, 25–29 us | response; saturating_ratio; 0 ≤ value | | `mean_power_w` | W | Time-weighted delivered power over the declared transient window | supply; ratio; 0 ≤ value | | `cm_bias_v` | V | DC cm_bias_v | bias; target | | `s1_bias_v` | V | DC s1_bias_v | bias; target | @@ -90,12 +77,14 @@ Every declared simulation must complete with finite measurements and complete ra | `fixture_cm_max` | V | Fixture validity fixture_cm_max | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | | `dc_feedback_error_v` | V | Fixture validity dc_feedback_error_v | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | -`cm` is the output mean and `s1` is the first-stage mean. Quiet/pre-kick/recovery/reference/input-CM/stage-reference/late windows are 5–9, 28–29, 45–49, 60–64, 85–89, 120–124 and 145–149 us. Recovery is relative to each run’s pre-kick mean; it is not a claim of asymptotic settling. All window values are evaluated for both zero-stimulus and disturbed conditions. +`cm` is the output mean and `s1` the first-stage mean. Quiet/pre-disturbance/recovery/reference/input-common-mode/stage-reference/late windows are 5–9, 28–29, 45–49, 60–64, 85–89, 120–124, 145–149 us, respectively. Recovery is relative to the mean before the current disturbance and does not prove asymptotic settling. Every window evaluates both zero-excitation and disturbance conditions. Performance is continuously paired with the independently simulated source under exactly the same conditions. Gain quality is 10^((candidate−source)/20); target quality is 1/(1+abs(candidate−source)/scale); inverse-ratio quality is (source+floor)/(candidate+floor). Area quality is Q = 20711.65 um2 / functional area. The bias scale is 1.2 V; closed-response scale is 6 dB (factor two in amplitude). Error/range floors are 0.1 mV for differential error (1% of the 10 mV step) and 1 mV for common-mode excursions; power floor is 1 pW. Physical/domain and fixture-validity gates are not upstream product targets. The compact-area anchor sums m*((W+2.4)*(L+2.4)+3.2^2) um2 for MOS, 1.2*C/(1.5 fF/um2) for physical capacitor envelopes, and 2*R/(1360 Ohm) um2 for resistor envelopes, then adds 50% global routing allowance. It is an engineering estimate independent of the reference GDS. Coefficient 8 reflects the folded multistage differential core, transistor common-mode control and physical compensation. +### Measurement validity +Absolute errors, excursions and peak-to-peak ranges must be nonnegative. Net supply/bias consumption must be nonnegative for the powered amplifier. The AC fixture common-mode residue and DC feedback error must each remain within 1 uV so that the declared differential excitation is actually measured. These measurement-validity requirements have explicit rationales in `case.toml`; the scored response, stability observations and power have no additional upper performance rejection budgets. Missing or unusable measurements remain evaluation errors. ### Score weights @@ -141,4 +130,4 @@ One/two-loop CMFB amplifier assemblies: output common-mode dynamics 33.8%; stage Solve budget: **8 hours**. -Use the reviewed SG13G2 resources and ngspice 45 tool environment. The runtime `/protocol/task.json` publishes frozen inputs, requirements and tool bindings. Submit `/workspace/output/final.gds` explicitly through the session submission tool; writing the file alone does not submit it. The evaluation executes native checks, candidate-derived RC and independent paired source/post-layout simulations. The reference GDS, maintainer README and development checkout are not solver inputs. +Use the reviewed SG13G2 resources and ngspice 45 environment. Frozen inputs, requirements and tool bindings are in `/protocol/task.json`. Explicitly submit `/workspace/output/final.gds` through the session submission tool; file generation alone is not submission. Evaluation performs native checks, candidate RC extraction and independent paired source/post-layout simulation. Reference GDS, maintainer README and development sources are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/case.toml b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/case.toml index e9430a3e3e295ac9682547b285b3ce7ad713bd79..2a18131e99c302e151141453ab99b831013a5cfc 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.amp_035_fan_chopper_cmfb_dual" title = "Fan Dual CMFB OTA" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "277889ec36fe4df12811896554f59be3b7baa611500168bf057b346ffa412a77" +sha256 = "fd752c4bc9ff5e2c18a04121033f4a07fd3ccd09263b4d8123cd14c7ffa60217" [[assets]] path = "reference/amp_035_fan_chopper_cmfb_dual.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "d2aaafb6f651b8b5073aeb6612da476eeab44ec2cbe8cce2b61afbbb4527abfe" +sha256 = "60ae5d997bd13333349d225d9acb5c7b9882c138357734c658a85773568e255c" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "70db9a09e47cfaf6dc9aecb394d7300c2d6125f26d16252ff1ba67688085165c" subcircuit = "amp_035_fan_chopper_cmfb_dual" +sha256 = "70db9a09e47cfaf6dc9aecb394d7300c2d6125f26d16252ff1ba67688085165c" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,12 +44,12 @@ sha256 = "d1338e6ff0af234b256188279fd15f3a0bef1f9d34a0c06734199a9c60964b0c" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "402e1b1a8bbe85319a114092e02d40312f76b5adabd484b47bb76c4ba12fa4d5" +sha256 = "d44740562add873b61fe5eaea67d3d9278e0e63b8cf1f35c61262200842d43b6" [task.inputs.frequency] path = "materials/ac.spice" format = "spice" -sha256 = "9df660e9a51a72f25ba48378cb9ad95955793fab27717ca137ab2b5bacc5842c" +sha256 = "412511ca23585e19e5dd371b13aae4c24bc93bd6e468886ee2648bfc2c35ed81" [task.constraints] quality = [ @@ -671,9 +671,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_quiet_pp_v", @@ -684,15 +683,18 @@ baseline = [ "source_condition_1:cm_quiet_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_late_pp_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_late_pp_v", @@ -703,15 +705,18 @@ baseline = [ "source_condition_1:cm_late_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_kick_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_kick_v", @@ -722,15 +727,18 @@ baseline = [ "source_condition_1:cm_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "cm_recovery_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:cm_recovery_error_v", @@ -741,6 +749,10 @@ baseline = [ "source_condition_1:cm_recovery_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_quiet_v" unit = "V" @@ -873,9 +885,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_quiet_pp_v", @@ -886,15 +897,18 @@ baseline = [ "source_condition_1:s1_quiet_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_late_pp_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_late_pp_v", @@ -905,15 +919,18 @@ baseline = [ "source_condition_1:s1_late_pp_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_kick_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_kick_v", @@ -924,15 +941,18 @@ baseline = [ "source_condition_1:s1_kick_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "s1_recovery_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.001 -lower = 0 category = "performance" observations = [ "condition_0:s1_recovery_error_v", @@ -943,15 +963,18 @@ baseline = [ "source_condition_1:s1_recovery_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "dm_high_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_0:dm_high_error_v", @@ -962,15 +985,18 @@ baseline = [ "source_condition_1:dm_high_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "dm_return_error_v" unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_0:dm_return_error_v", @@ -981,6 +1007,10 @@ baseline = [ "source_condition_1:dm_return_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a peak-to-peak voltage, absolute excursion or absolute error. A negative value cannot represent the declared measurement; positive values remain quality objectives without an upper rejection budget." + [[task.evaluation.metrics]] id = "mean_power_w" unit = "W" @@ -989,7 +1019,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:mean_power_w", @@ -1000,6 +1029,10 @@ baseline = [ "source_condition_1:mean_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This powered amplifier consumes net energy from the declared supply and bias sources; negative delivered power would not represent the required powered circuit." + [[task.evaluation.metrics]] id = "cm_bias_v" unit = "V" @@ -1062,7 +1095,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -1073,6 +1105,10 @@ baseline = [ "source_condition_1:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This powered amplifier consumes net energy from the declared supply and bias sources; negative delivered power would not represent the required powered circuit." + [[task.evaluation.metrics]] id = "closed_gain_10khz_db" unit = "dB" @@ -1126,30 +1162,36 @@ id = "fixture_cm_max" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_2:fixture_cm_max", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "Residual AC common mode must remain below 1 uV for the declared 1 V differential excitation; otherwise the fixture does not measure the required differential response." + [[task.evaluation.metrics]] id = "dc_feedback_error_v" unit = "V" direction = "minimize" aggregation = "max" -lower = 0 -upper = 1e-06 category = "performance" observations = [ "condition_2:dc_feedback_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1e-06 +rationale = "The external differential measurement loop must enforce its declared DC excitation within 1 uV; otherwise the observation uses an invalid fixture operating point." + [task.evaluation.pre_layout] -source_report_sha256 = "19afe641795eb3ff0114c26f987e984e5862f0f6c2e69fce8a3684e0e97c3836" +source_report_sha256 = "e627faed6fa117e3d5b632f41329d8f5d470d1738589686c2e447669a81f9f13" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"8f584f40a03947ddeebda5e45f68d950f043c61f638a40d61eaf39fa8aa6616e\", \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 1800.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1209,7 +1251,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "402e1b1a8bbe85319a114092e02d40312f76b5adabd484b47bb76c4ba12fa4d5" +deck = "d44740562add873b61fe5eaea67d3d9278e0e63b8cf1f35c61262200842d43b6" dut = "d1338e6ff0af234b256188279fd15f3a0bef1f9d34a0c06734199a9c60964b0c" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.closed_gain_10khz_db] @@ -1332,6 +1374,11 @@ unit = "V" value = 0.001948147066014553 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "fb7ee1224c3590a568d3b41a340794184256e70735bdaa46024ceaef319816a1" +ac = "ca914d115d5cce715e7ede73de6b76b604772872645d587e2559aabcaa28d386" +transient = "b14c55ec10e3cc3b09f61ef72e4b74af0f0a651aa9e9026c9e6fd9b756eb98bc" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1390,7 +1437,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "402e1b1a8bbe85319a114092e02d40312f76b5adabd484b47bb76c4ba12fa4d5" +deck = "d44740562add873b61fe5eaea67d3d9278e0e63b8cf1f35c61262200842d43b6" dut = "d1338e6ff0af234b256188279fd15f3a0bef1f9d34a0c06734199a9c60964b0c" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.closed_gain_10khz_db] @@ -1513,6 +1560,11 @@ unit = "V" value = 0.02513125630632075 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "fb7ee1224c3590a568d3b41a340794184256e70735bdaa46024ceaef319816a1" +ac = "ca914d115d5cce715e7ede73de6b76b604772872645d587e2559aabcaa28d386" +transient = "1df4de7b0f5aacae89c2f6a019c5f55eb9e04a7b878ee12ca66a26ff2bf66087" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1543,7 +1595,7 @@ op = "op.raw" ac = "ac.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "9df660e9a51a72f25ba48378cb9ad95955793fab27717ca137ab2b5bacc5842c" +deck = "412511ca23585e19e5dd371b13aae4c24bc93bd6e468886ee2648bfc2c35ed81" dut = "d1338e6ff0af234b256188279fd15f3a0bef1f9d34a0c06734199a9c60964b0c" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.dc_feedback_error_v] @@ -1562,6 +1614,10 @@ unit = "dB" value = 60.34043 unit = "dB" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "c6d89b832a1be6cfbc7585bf17214bbed6a81de830c6d73282afdab7bdb4bc40" +ac = "6ab1f1e6f0e7f2e0d3ebcf8b9828a01cbcbe669e79745772154fc9a1e46e2f7d" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1574,7 +1630,7 @@ unit = "dB" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1585,7 +1641,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1598,7 +1654,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1611,7 +1667,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1623,7 +1679,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1633,7 +1689,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 1800 diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/ac.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/ac.spice index 60c2b1ba3eb682d4618bd61410d2156026739916..9f608af6b2982f9e16b319023678ecda8cbcae8c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/ac.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/ac.spice @@ -30,7 +30,6 @@ IN 0 outn pulse(0 {kick_a} 30u 20n 20n 2u 200u) XDUT inp inn outp outn vdd 0 vb1 vb2 vb3 ref rs s1p s1n ctl ctl1 amp_035_fan_chopper_cmfb_dual .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/schematic.svg index 959a230d35c2a8cd7df2de827ab06671506056b3..3f62b565664034e34e10ad30df9511e17a1828a0 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/schematic.svg @@ -1,2 +1,2 @@ -amp_035_fan_chopper_cmfb_dual{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_035_fan_chopper_cmfb_dual","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/circuit.cdl","netlist_sha256":"70db9a09e47cfaf6dc9aecb394d7300c2d6125f26d16252ff1ba67688085165c","project_sha256":"84da05aed3ce96348213f1bc3151fcd3c1c06da1c967674279ebbcdcf6d40e6b","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist 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labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":408},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["amp_035_fan_chopper_cmfb_dual"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/schematic/amp_035_fan_chopper_cmfb_dual.icproj.json"}}Main-sheet overview; 14 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_035_fan_chopper_cmfb_dualstg1_nsubcmfb_s1__cm_sensevssvb4_ctlvoutpsubcmfb_out__cm_sensevoutnsubcmfb_out__cm_sensevsssubstg1_psubcmfb_s1__cm_sensewell_31vsssubcmfb_out__biascmfb_out__biasvsssubcmfb_s1__biascmfb_s1__biasvddwell_34core__vb2vddvb4_ctlcore__casc_src_pwell_34vddwell_35voutpvddvb4ostg1_nwell_35vddwell_36voutnvddvb4owell_36subvoutpcore__g2_pvoutpcore__g2_pvoutncore__g2_nvoutncore__g2_ncore__fold_nvsssubvssvb4_ctlvoutnsubcmfb_out__cm_sensestg1_nsubcmfb_s1__cm_sensevoutpsubcmfb_out__cm_sensestg1_pwell_0subcmfb_s1__cm_sensevoutpvinpvinnvoutpvoutnvddvsscore__vb1core__vb2core__vb3vref_outvssvref_s1stg1_pstg1_nvb4ovb4_ctlsubcore__g2_pvoutnvsssubcore__g2_nvddstg1_nsubcore__g2_nvddwell_7vsscore__vb3stg1_ncore__g2_nwell_7vddstg1_psubcore__g2_pvddwell_9stg1_nvssstg1_pcore__g2_pwell_9vddwell_10vddwell_10well_0cmfb_out__ptailcmfb_out__biasvddwell_11vddwell_11cmfb_s1__ptailcmfb_s1__biascore__casc_src_nvddwell_12vddvb4_ctlwell_12core__tailvssstg1_psubcore__g2_nvddwell_14vddvddstg1_pcore__g2_nwell_14vssstg1_nsubcore__g2_pvddwell_1well_16vddstg1_ncore__g2_pwell_16vssvb4osubcmfb_out__mirrvssvb4_ctlsubcmfb_s1__mirrvddwell_19core__vb3vinpcore__fold_pcore__tailwell_19vddwell_20vddcmfb_out__biasstg1_pcmfb_out__biaswell_20vddwell_21vddcmfb_s1__biascmfb_s1__biaswell_21well_1vddwell_22vinncore__fold_ncore__tailwell_22vddwell_23core__casc_src_pcmfb_out__ptailcmfb_out__mirrwell_23cmfb_out__cm_sensevddwell_24cmfb_s1__ptailcmfb_s1__mirrwell_24cmfb_s1__cm_sensevddvsscore__vb1subcore__fold_pvddcore__vb2well_26vref_outvb4ocmfb_out__ptailwell_26vddwell_27vref_s1stg1_pvb4_ctlcmfb_s1__ptailwell_27vsscore__vb1subcore__fold_nvsssubsubcmfb_out__mirrcmfb_out__mirrvsssubcmfb_s1__mirrcmfb_s1__mirrvddwell_31core__fold_pvddvb4_ctlcore__casc_src_namp_035_fan_chopper_cmfb_dualEqual net labels connect. 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Equal net labels connect. +amp_035_fan_chopper_cmfb_dual{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.amp_035_fan_chopper_cmfb_dual","source_netlist":"design/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal 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overview; 8 child sheets are available in the editable .icproj.json project. Equal net labels connect.amp_035_fan_chopper_cmfb_dualstg1_nsubcmfb_s1__cm_sensevssvb4_ctlvoutpsubcmfb_out__cm_sensevoutnsubcmfb_out__cm_sensevsssubstg1_psubcmfb_s1__cm_sensewell_19well_20well_20well_21well_21well_22vddwell_22well_23well_23cmfb_out__cm_sensewell_24well_24cmfb_s1__cm_sensevddwell_26well_26well_27well_27well_31well_31well_34well_34well_35vddwell_35well_36well_36vddvddvddvddvddvddvddvddvddvddvddvddvinnvddvddvddvddvddvddvddvddvddvddvddvddvddvssvssvssvssvssvssvssvssvssvssvssvssvoutpvsscore__vb1core__vb1core__vb2core__vb2core__vb3voutpcore__vb3vref_outvref_outvref_s1vref_s1stg1_pvoutpstg1_nvb4ovb4ovb4ovb4ovb4ovb4_ctlvb4_ctlvb4_ctlvb4_ctlvb4_ctlwell_0well_0well_1well_1subsubsubsubsubsubsubsubsubvoutnsubsubsubsubsubsubsubvoutncore__g2_pcore__g2_pcore__g2_pcore__g2_nvoutncore__g2_ncore__g2_nwell_7well_7vinpwell_9well_9well_10well_10cmfb_out__ptailcmfb_out__ptailvddcmfb_out__ptailcmfb_out__biascmfb_out__biascmfb_out__biascmfb_out__biascmfb_out__biaswell_11well_11cmfb_s1__ptailcmfb_s1__ptailvddcmfb_s1__ptailcmfb_s1__biascmfb_s1__biascmfb_s1__biascmfb_s1__biascmfb_s1__biaswell_12well_12vddwell_14well_14well_16well_16cmfb_out__mirrcmfb_out__mirrcmfb_out__mirrcmfb_out__mirrcmfb_s1__mirrvddcmfb_s1__mirrcmfb_s1__mirrcmfb_s1__mirrwell_19amp_035_fan_chopper_cmfb_dualRT0ntap1A=4e-12 P=8e-6MM10_COREsg13_lv_pmosw=10u l=0.3um=1RT1ntap1A=4e-12 P=8e-6MM11_COREsg13_lv_pmosw=10u l=0.3um=1MM12_COREsg13_lv_nmosw=5u l=0.3um=1MM13_COREsg13_lv_nmosw=5u l=0.3um=1MM14_COREsg13_lv_nmosw=20u l=0.25um=1MM15_COREsg13_lv_nmosw=20u l=0.25um=1MM16_COREsg13_lv_nmosw=2u l=0.13um=1RT7ntap1A=4e-12 P=8e-6MM17_COREsg13_lv_pmosw=2u l=0.13um=1MM18_COREsg13_lv_nmosw=2u l=0.13um=1RT9ntap1A=4e-12 P=8e-6MM19_COREsg13_lv_pmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM1_CMFB_OUTsg13_lv_pmosw=0.33u l=0.26um=1RT11ntap1A=4e-12 P=8e-6MM1_CMFB_S1sg13_lv_pmosw=0.33u l=0.26um=1RT12ntap1A=4e-12 P=8e-6MM1_COREsg13_lv_pmosw=20u l=1um=1MM20_COREsg13_lv_nmosw=2u l=0.13um=1RT14ntap1A=4e-12 P=8e-6MM21_COREsg13_lv_pmosw=2u l=0.13um=1MM22_COREsg13_lv_nmosw=2u l=0.13um=1RT16ntap1A=4e-12 P=8e-6MM23_COREsg13_lv_pmosw=2u l=0.13um=1MM2_CMFB_OUTsg13_lv_nmosw=2.32u l=1.31um=1MM2_CMFB_S1sg13_lv_nmosw=2.32u l=1.31um=1RT19ntap1A=4e-12 P=8e-6MM2_COREsg13_lv_pmosw=20u l=0.5um=1RT20ntap1A=4e-12 P=8e-6MM3_CMFB_OUTsg13_lv_pmosw=0.88u l=0.26um=1RT21ntap1A=4e-12 P=8e-6MM3_CMFB_S1sg13_lv_pmosw=0.88u l=0.26um=1RT22ntap1A=4e-12 P=8e-6MM3_COREsg13_lv_pmosw=20u l=0.5um=1RT23ntap1A=4e-12 P=8e-6MM4_CMFB_OUTsg13_lv_pmosw=1.42u l=0.27um=1RT24ntap1A=4e-12 P=8e-6MM4_CMFB_S1sg13_lv_pmosw=1.42u l=0.27um=1MM4_COREsg13_lv_nmosw=10u l=1um=1RT26ntap1A=4e-12 P=8e-6MM5_CMFB_OUTsg13_lv_pmosw=1.42u l=0.27um=1RT27ntap1A=4e-12 P=8e-6MM5_CMFB_S1sg13_lv_pmosw=1.42u l=0.27um=1MM5_COREsg13_lv_nmosw=10u l=1um=1MM6_CMFB_OUTsg13_lv_nmosw=2.32u l=1.31um=1MM6_CMFB_S1sg13_lv_nmosw=2.32u l=1.31um=1RT31ntap1A=4e-12 P=8e-6MM6_COREsg13_lv_pmosw=10u l=1um=1MM7_CMFB_OUTsg13_lv_nmosw=0.3u l=0.22um=1MM7_CMFB_S1sg13_lv_nmosw=0.3u l=0.22um=1RT34ntap1A=4e-12 P=8e-6MM7_COREsg13_lv_pmosw=10u l=1um=1RT35ntap1A=4e-12 P=8e-6MM8Osg13_lv_pmosw=20u l=1um=1RT36ntap1A=4e-12 P=8e-6MM9Osg13_lv_pmosw=20u l=1um=1CM1_CORE_0cap_cmimw=44.67u l=44.67um=1CM1_CORE_1cap_cmimw=44.67u l=44.67um=1CM2_CORE_0cap_cmimw=44.67u l=44.67um=1CM2_CORE_1cap_cmimw=44.67u l=44.67um=1XXRT2_bank1XRT2_bank1XXCCM_S1_bank2XCCM_S1_bank2XRRMN_CMFB_OUT_bank3XRRMN_CMFB_S1_bank4XRRMP_CMFB_OUT_bank5XRRMP_CMFB_S1_bank6CORE OTA AND OUTPUT CHOPPEROUTPUT COMMON-MODE FEEDBACKFIRST-STAGE COMMON-MODE FEEDBACKSTATIC OUTPUT CHOPPERDIFFERENTIAL OUTPUT AND MILLER COMPENSATIONWELL AND SUBSTRATE CONTACTS +