diff --git a/.gitattributes b/.gitattributes index 34513ec592c59ed150d3d4765474e5ed6012504b..ebdd7f6f809e5ee07debdba1b0a5be76ee6d8518 100644 --- a/.gitattributes +++ b/.gitattributes @@ -116,3 +116,10 @@ tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/reference/ldo_008_fer_mi tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/reference/ldo_009_fer_5t_pass.gds filter=lfs diff=lfs merge=lfs -text tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/reference/sw_002_chopper_diff.gds filter=lfs diff=lfs merge=lfs -text tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/reference/sw_003_binary_capbank.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/OpenFASOC/cases/current_mirror/reference/current_mirror.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/OpenFASOC/cases/two_stage_opamp/reference/two_stage_opamp.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/reference/ccomp3v.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/reference/opamp.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/reference/rdac3v_8bit.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/reference/samplehold.gds filter=lfs diff=lfs merge=lfs -text +tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/reference/simple_por.gds filter=lfs diff=lfs merge=lfs -text diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/testbench.spice index 51644435273a2b1904d29b1cd27646d576cbbd8a..0c6d01c9466e01ae3c985dc9524f5a6350e17c24 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/materials/testbench.spice @@ -26,7 +26,6 @@ IN 0 outn pulse(0 {kick_a} 30u 20n 20n 2u 200u) XDUT inp inn outp outn vdd 0 vb1 vb2 vb3 ref rs s1p s1n ctl ctl1 amp_035_fan_chopper_cmfb_dual .control set noaskquit -set num_threads=1 set numdgt=15 set measdgt=15 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/problem.md b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/problem.md index d511be57b1247d5682383163469d728ffbfa4c73..1d1486d9a7b2dd8aa6818a9a2e6357d45a44ea81 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/amp_035_fan_chopper_cmfb_dual/problem.md @@ -14,7 +14,7 @@ W/L are rounded to 10 nm so centred contacts remain on the 5 nm manufacturing gr TT MOS, typical MIM/high-poly, 27 C, 1.2 V supply, 0.6 V input common mode, 10 pF on each output. The external voltage sources are vb1_core core__vb1 vss dc 0.3983759766; vb2_core core__vb2 vss dc 0.65; vb3_core core__vb3 vss dc 0.45; vrefout vref_out vss dc 0.5; vrefs1 vref_s1 vss dc 0.3265. Both the no-disturbance condition and the following combined sequence run for 150 us with a 2 ns maximum step. The differential command rises from 0 to 10 mV at 10 us and returns after 10 us; equal +20 uA currents enter both outputs at 30 us for 2 us. The output reference rises by 25 mV at 50 us for 15 us; input common mode rises by 25 mV at 75 us for 15 us. The stage-1 reference rises by 10 mV at 110 us for 15 us. All edges are 20 ns. Pulse widths are measured after the rising edge, so falling edges start one edge duration after nominal delay plus width. The unperturbed condition sets every step and kick amplitude to zero. The two CMFB loops, where present, remain connected throughout. Monitor ports are unloaded; their extraction and routing parasitics remain. No external clock is applied: straight-through chopper gates stay tied to their actual rails, and crossed paths stay off. -The external fixture enforces inp = icm + (signal − (outp−outn))/2 and inn = icm − (signal − (outp−outn))/2. It closes only the differential measurement loop; the DUT transistors close common-mode feedback. The frequency deck retains this DC feedback, isolates each feedback branch with 1 TH/1 F low-pass elements and injects +0.5/−0.5 V AC. The actual differential excitation remains 1 V and residual common-mode must be at most 1 uV. +The external fixture sets inp = icm + (signal − (outp−outn))/2, inn = icm − (signal − (outp−outn))/2, closing only the differential measurement loop; DUT transistors implement common-mode feedback. The frequency-domain deck retains DC feedback, isolates each feedback branch with a 1 TH/1 F low-pass and injects +0.5/−0.5 V AC. Actual differential excitation remains 1 V with common-mode residual at most 1 uV. Both decks sweep 1 Hz–1 GHz at 200 points/decade. AC describes the linearization of the verified DC point, not proof of a dynamically stable equilibrium. An explicit rshunt=1e14 (100 TOhm) numerical shunt to ground at each node regularizes otherwise floating extraction/series-capacitor nodes; source and candidate use the identical setting. Sensitivity is checked with 1 POhm. Supply startup is not simulated: transient starts from the DC operating point, and the no-disturbance interval tests whether that point persists. Use the default sparse solver with pivtol=1e-18, below the numerical shunt conductance, and the tolerances declared in the decks. @@ -22,36 +22,23 @@ Both decks sweep 1 Hz–1 GHz at 200 points/decade. AC describes the linearizati Submit a native SG13G2 GDS with top cell `amp_035_fan_chopper_cmfb_dual`, at most 67108864 bytes, within 20000 × 2000 um. Native main and maximal DRC, named-interface LVS and geometry must pass without marker waivers. Keep every MOS, body connection and passive path. Unit multiplicities and the declared passive series/parallel realization are fixed in the materials. -The functional footprint includes active, gate, contact, metal, via, MIM and complete routing shapes; well, text, annotations and nonfunctional markers alone do not define it. The runtime task supplies the exact layer set. Candidate GDS drives native connectivity extraction and distributed wire resistance/ground capacitance extraction, then the same native MOS/MIM/high-poly simulation models used by the source. This nominal MOS/R/C boundary does not assert RF/coupling extraction, PVT, mismatch, noise or manufacturing signoff. +Functional area includes active regions, gates, contacts, metals, vias, MIM devices and all routing. Wells, text, annotations and nonfunctional markers cannot independently define functional area. Runtime task metadata supplies the exact layer set. After native connectivity and distributed wire-resistance/ground-capacitance extraction, simulate the candidate GDS with the same native MOS/MIM/high-poly models as the source. This task's nominal MOS/R/C scope excludes RF/coupling extraction, PVT, mismatch, noise and manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Every declared simulation must complete with finite measurements and complete raw records. Transient means use full-precision cumulative integration with interpolated endpoint corrections; incomplete windows are errors. PP denotes the full finite-window range, including any oscillation or slow drift. No phase margin, loop gain, settling time or periodic steady state is claimed. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +Complete every declared simulation, with finite measurements and complete raw records. Transient means use full-precision cumulative integration and interpolated endpoint corrections; incomplete windows are errors. PP is the range over the entire finite window, including oscillation or slow drift. It does not establish phase margin, loop gain, settling time or periodic steady state. + +`cm_recovery_error_v`, `s1_recovery_error_v`, `dm_high_error_v`, `dm_return_error_v`, `cm_quiet_pp_v`, `cm_late_pp_v`, `cm_kick_v`, `s1_quiet_pp_v`, `s1_late_pp_v`, `s1_kick_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. | Metric | Unit | Definition | Quality role / functional domain | | --- | --- | --- | --- | @@ -62,10 +49,10 @@ Every declared simulation must complete with finite measurements and complete ra | `cm_input_cm_v` | V | avg cm, 85–89 us | bias; target | | `cm_stage_ref_v` | V | avg cm, 120–124 us | bias; target | | `cm_late_v` | V | avg cm, 145–149 us | bias; target | -| `cm_quiet_pp_v` | V | pp cm, 5–9 us | response; ratio; 0 ≤ value | -| `cm_late_pp_v` | V | pp cm, 145–149 us | response; ratio; 0 ≤ value | -| `cm_kick_v` | V | max cm_delta, 30–33 us | response; ratio; 0 ≤ value | -| `cm_recovery_error_v` | V | avg cm_delta, 45–49 us | response; ratio; 0 ≤ value | +| `cm_quiet_pp_v` | V | pp cm, 5–9 us | response; saturating_ratio; 0 ≤ value | +| `cm_late_pp_v` | V | pp cm, 145–149 us | response; saturating_ratio; 0 ≤ value | +| `cm_kick_v` | V | max cm_delta, 30–33 us | response; saturating_ratio; 0 ≤ value | +| `cm_recovery_error_v` | V | avg cm_delta, 45–49 us | response; saturating_ratio; 0 ≤ value | | `s1_quiet_v` | V | avg s1, 5–9 us | bias; target | | `s1_pre_kick_v` | V | avg s1, 28–29 us | bias; target | | `s1_recovery_v` | V | avg s1, 45–49 us | bias; target | @@ -73,12 +60,12 @@ Every declared simulation must complete with finite measurements and complete ra | `s1_input_cm_v` | V | avg s1, 85–89 us | bias; target | | `s1_stage_ref_v` | V | avg s1, 120–124 us | bias; target | | `s1_late_v` | V | avg s1, 145–149 us | bias; target | -| `s1_quiet_pp_v` | V | pp s1, 5–9 us | response; ratio; 0 ≤ value | -| `s1_late_pp_v` | V | pp s1, 145–149 us | response; ratio; 0 ≤ value | -| `s1_kick_v` | V | max s1_delta, 30–33 us | response; ratio; 0 ≤ value | -| `s1_recovery_error_v` | V | avg s1_delta, 45–49 us | response; ratio; 0 ≤ value | -| `dm_high_error_v` | V | avg dmerror, 18–19 us | response; ratio; 0 ≤ value | -| `dm_return_error_v` | V | avg dmerror, 25–29 us | response; ratio; 0 ≤ value | +| `s1_quiet_pp_v` | V | pp s1, 5–9 us | response; saturating_ratio; 0 ≤ value | +| `s1_late_pp_v` | V | pp s1, 145–149 us | response; saturating_ratio; 0 ≤ value | +| `s1_kick_v` | V | max s1_delta, 30–33 us | response; saturating_ratio; 0 ≤ value | +| `s1_recovery_error_v` | V | avg s1_delta, 45–49 us | response; saturating_ratio; 0 ≤ value | +| `dm_high_error_v` | V | avg dmerror, 18–19 us | response; saturating_ratio; 0 ≤ value | +| `dm_return_error_v` | V | avg dmerror, 25–29 us | response; saturating_ratio; 0 ≤ value | | `mean_power_w` | W | Time-weighted delivered power over the declared transient window | supply; ratio; 0 ≤ value | | `cm_bias_v` | V | DC cm_bias_v | bias; target | | `s1_bias_v` | V | DC s1_bias_v | bias; target | @@ -90,12 +77,14 @@ Every declared simulation must complete with finite measurements and complete ra | `fixture_cm_max` | V | Fixture validity fixture_cm_max | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | | `dc_feedback_error_v` | V | Fixture validity dc_feedback_error_v | diagnostic; unscored; 0 ≤ value ≤ 1e-06 | -`cm` is the output mean and `s1` is the first-stage mean. Quiet/pre-kick/recovery/reference/input-CM/stage-reference/late windows are 5–9, 28–29, 45–49, 60–64, 85–89, 120–124 and 145–149 us. Recovery is relative to each run’s pre-kick mean; it is not a claim of asymptotic settling. All window values are evaluated for both zero-stimulus and disturbed conditions. +`cm` is the output mean and `s1` the first-stage mean. Quiet/pre-disturbance/recovery/reference/input-common-mode/stage-reference/late windows are 5–9, 28–29, 45–49, 60–64, 85–89, 120–124, 145–149 us, respectively. Recovery is relative to the mean before the current disturbance and does not prove asymptotic settling. Every window evaluates both zero-excitation and disturbance conditions. Performance is continuously paired with the independently simulated source under exactly the same conditions. Gain quality is 10^((candidate−source)/20); target quality is 1/(1+abs(candidate−source)/scale); inverse-ratio quality is (source+floor)/(candidate+floor). Area quality is Q = 361466.3 um2 / functional area. The bias scale is 1.2 V; closed-response scale is 6 dB (factor two in amplitude). Error/range floors are 0.1 mV for differential error (1% of the 10 mV step) and 1 mV for common-mode excursions; power floor is 1 pW. Physical/domain and fixture-validity gates are not upstream product targets. The compact-area anchor sums m*((W+2.4)*(L+2.4)+3.2^2) um2 for MOS, 1.2*C/(1.5 fF/um2) for physical capacitor envelopes, and 2*R/(1360 Ohm) um2 for resistor envelopes, then adds 50% global routing allowance. It is an engineering estimate independent of the reference GDS. Coefficient 9 reflects two interacting transistor CM loops, high-impedance sensing and large physical passive networks. +### Measurement validity +Absolute errors, excursions and peak-to-peak ranges must be nonnegative. Net supply/bias consumption must be nonnegative for the powered amplifier. The AC fixture common-mode residue and DC feedback error must each remain within 1 uV so that the declared differential excitation is actually measured. These measurement-validity requirements have explicit rationales in `case.toml`; the scored response, stability observations and power have no additional upper performance rejection budgets. Missing or unusable measurements remain evaluation errors. ### Score weights @@ -141,4 +130,4 @@ One/two-loop CMFB amplifier assemblies: output common-mode dynamics 27%; stage-1 Solve budget: **8 hours**. -Use the reviewed SG13G2 resources and ngspice 45 tool environment. The runtime `/protocol/task.json` publishes frozen inputs, requirements and tool bindings. Submit `/workspace/output/final.gds` explicitly through the session submission tool; writing the file alone does not submit it. The evaluation executes native checks, candidate-derived RC and independent paired source/post-layout simulations. The reference GDS, maintainer README and development checkout are not solver inputs. +Use the reviewed SG13G2 resources and ngspice 45 environment. Frozen inputs, requirements and tool bindings are in `/protocol/task.json`. Explicitly submit `/workspace/output/final.gds` through the session submission tool; file generation alone is not submission. Evaluation performs native checks, candidate RC extraction and independent paired source/post-layout simulation. Reference GDS, maintainer README and development sources are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/case.toml b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/case.toml index 48eeb588288419624eacac2c36d5319d06165687..56ef3ecc005fefd7b39bcbfa36ea536b75460729 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.buf_001_super_follower" title = "MIM-Compensated Local-Feedback Source Follower" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "b3ac9f88b7688be745644d076dcfd1bfe4adb1d271a62479c082c4afbb5bad74" +sha256 = "121c4b7a69a5aa6704c6811c366d5f9c1f3d30c1f77d02a499e5d76491a73658" [[assets]] path = "reference/buf_001_super_follower.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-buf_001_super_follower-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "be3bf33938c52ab4389bac26ed57f0f8b3f6635c19f81fe94cea6e20368141ca" +sha256 = "a03f8657ce08955ec3f96a8e89e870eeff88262a0ee2c2e643cbf18d4a0110eb" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "2f617c485f1bd1d94d47a1fc21c6c1e815fb9f4a4278ee93c2a1eb80b80a4404" subcircuit = "buf_001_super_follower" +sha256 = "2f617c485f1bd1d94d47a1fc21c6c1e815fb9f4a4278ee93c2a1eb80b80a4404" [task.inputs.performance] path = "materials/testbench.spice" @@ -473,8 +473,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -495,8 +498,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -516,9 +522,12 @@ baseline = [ "source_condition_2:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "gain_vv" category = "performance" @@ -557,7 +566,10 @@ baseline = [ "source_condition_2:bandwidth_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "step_gain" @@ -596,10 +608,13 @@ baseline = [ "source_condition_1:recovery_up_v", "source_condition_2:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_down_v" category = "performance" @@ -617,10 +632,13 @@ baseline = [ "source_condition_1:recovery_down_v", "source_condition_2:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" category = "performance" @@ -639,14 +657,17 @@ baseline = [ "source_condition_2:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "e804bb71207187cb10f425c68287bc8c549d5afc61d4c6c7a0033e91a4f82811" +source_report_sha256 = "8e39d49a2dcdcdc99680e54e583399ea81bbe64658604f1acb3eae17e0cffcc7" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"e60d9c0a3bb90c239c100721134cdd44522e74410082c421abab71922cb61c14\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -720,6 +741,11 @@ unit = "V" value = 0.833601 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "21970866f01f3a964132e086c745958da737c9a39c9c4f47a11bb06662d4a215" +ac = "750273ac9e8e5e6acec71166e1b719908477a46dca9a2d6f6f49f0e4e8fd963b" +transient = "60f48cbd5f9e759b4681394e0e472b1131898abd4a6b3f4f2f9f2db530fba65c" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -792,6 +818,11 @@ unit = "V" value = 0.833601 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "21970866f01f3a964132e086c745958da737c9a39c9c4f47a11bb06662d4a215" +ac = "1153ba82dcc78d7f14f565f8ddbb4222e11b9f1d83b0cf9ac817b3073707d316" +transient = "6a1bbecc64daa9522d6ab2de3bd69f1efa9676648ba94678a3c90be78a80a10e" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -864,6 +895,11 @@ unit = "V" value = 0.833601 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "21970866f01f3a964132e086c745958da737c9a39c9c4f47a11bb06662d4a215" +ac = "662fab4725be2fb2d24f9b99708355c6a71bfeb2745416913b2fc36c36441bab" +transient = "1d460639dd2bf53bb2f0fea69f9d840b44a8ac0fde1de2231d435e42cf87d73f" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -876,7 +912,7 @@ unit = "V/V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -887,7 +923,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -900,7 +936,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -913,7 +949,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -925,7 +961,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -935,7 +971,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/input-pair-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/schematic.svg index 60af453ad8b8011314538a5128a98da00a968495..c556b9b27b110ff75283605343035ba54614fe2a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/schematic.svg @@ -1 +1,2 @@ -buf_001_super_follower{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.buf_001_super_follower", "netlist_sha256": "2f617c485f1bd1d94d47a1fc21c6c1e815fb9f4a4278ee93c2a1eb80b80a4404", "project_sha256": "26f3d9bc2f1629f1968760f67cc8f22f7332d33160604e229e8d65b9c6abe4c9", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["buf_001_super_follower"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}buf_001_super_followervddvsspdibiasnavssvsssubvddwellpdvddvinvssvoutnavddvoutvinibiasvssbuf_001_super_followerihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Super source followerMMPB8/0.3 ×6MM18/0.3 ×4MM28/0.3 ×4P bulk → wellN bulk → sub02 Bias mirrorMMPD8/0.3MMNS4/0.3MMRN4/0.3P bulk → wellN bulk → sub03 CompensationCCcomp12.8/12.804 Substrate contacts / repeated banksRRptap1A=216 µm²RRntap1A=86.2 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim \ No newline at end of file +buf_001_super_follower{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.buf_001_super_follower","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["buf_001_super_follower"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["buf_001_super_follower"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/design/buf_001_super_follower.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.buf_001_super_followervddvsspdibiasnavssvsssubvddwellpdnavddvoutvinibiasvssbuf_001_super_followerihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresMMPB8/0.3 ×6MM18/0.3 ×4MM28/0.3 ×4P bulk → wellN bulk → subMMPD8/0.3MMNS4/0.3MMRN4/0.3P bulk → wellN bulk → subCCcomp12.8/12.8RRptap1A=216 µm²RRntap1A=86.2 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/problem.md b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/problem.md index 77aaffe3c0ee92819bafea4dde26f0887bb3bfc7..0024c1b7942682b20c97dff89d4aef5adae59787 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/buf_001_super_follower/problem.md @@ -9,7 +9,7 @@ Implement `buf_001_super_follower` in ihp-sg13g2 and submit self-contained GDS. `materials/circuit.cdl` is the authoritative physical circuit. `materials/circuit.spice` is its equivalent simulator model-call representation. `materials/testbench.spice` defines measurements, and this problem is the description input. Ordered ports: `vdd vout vin ibias vss`. In order: Supply, output, signal input, reference-current input, and return. -Preserve connectivity, W/L/m, passive geometry and body connections. Provide physical contacts. Placement and routing are free; splitting and source/drain interchange are allowed only under the declared LVS equivalences. No statistical matching or common-centroid constraint is scored. Ideal external sources, loads and fixtures belong to the testbench, not the DUT. +Preserve connectivity, W/L/m, passive geometry and body terminals, with physical contacts. Placement and routing are free; splitting and source/drain exchange must satisfy the declared LVS equivalence rules. Statistical matching and common-centroid placement are unscored. Ideal external sources, loads and test apparatus belong to the testbench, outside the DUT. ## Operating Conditions @@ -25,34 +25,21 @@ Every scored simulation consumes the submitted GDS-derived distributed wiring RC ## Electrical Requirements and Scoring -All 3 operating conditions must complete. Every finite observation must meet its inclusive band; aggregation cannot hide a failing condition. Missing measurements/crossings or incomplete extraction do not establish success. - -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | +All three conditions must complete, and each finite observation must satisfy its inclusive interval; aggregation cannot hide a failed condition. Missing measurements/crossings or incomplete extraction cannot establish success. + +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`recovery_up_v` and `recovery_down_v` use `saturating_ratio`. Candidate error x, paired source error b and the positive scale s below define q = 2(b+s)/(b+x+2s). Source-equivalent error gives q=1; decreasing error approaches the upper quality limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each operating condition before taking the worst paired quality; other metrics retain their own declared normalization and functional requirements. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `output_v` | DC output/control voltage | V | target / target | 0 … 1.5 | 1.5 | | `bias_v` | DC V(ibias) | V | target / target | 0 … 1.5 | 1.5 | @@ -60,15 +47,13 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `gain_vv` | Magnitude V(vout) at 10 Hz with unit AC input | V/V | target / target | −∞ … +∞ | 1.0 | | `bandwidth_hz` | First falling 3 dB crossing relative to the 10 Hz gain | Hz | maximize / ratio | 0 … +∞ | — | | `step_gain` | (Vout at 2.5 us - Vout at 0.5 us) / 0.1 V | V/V | target / target | −∞ … +∞ | 1.0 | -| `recovery_up_v` | Maximum absolute recovered error over the upward-step window | V | minimize / ratio | 0 … +∞ | 1e-06 | -| `recovery_down_v` | Maximum absolute recovered error over the downward-step window | V | minimize / ratio | 0 … +∞ | 1e-06 | +| `recovery_up_v` | Maximum absolute recovered error over the upward-step window | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | +| `recovery_down_v` | Maximum absolute recovered error over the downward-step window | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | | `mean_power_w` | Time-average -V(vdd)*I(VDD) over the complete transient | W | minimize / ratio | 0 … +∞ | 1e-12 | -Area reference: **1242.88 um2**. 20 expanded device instances; sum of device/contact envelopes 782.8540 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **1242.88 um2**. The expanded circuit has 20 device instances, a sum of device/contact envelopes 782.8540 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights @@ -91,4 +76,4 @@ Super source follower: loaded recovery 36%; source-follower transfer 27%; bandwi Solve budget: **3 hours**. -Use reviewed resources from `/protocol/resources.json`. KLayout checks, Magic extracts RC, and ngspice simulates. Frozen constraints and requirements are in `/protocol/task.json`; `/protocol/harness.json` describes the harness. If available, use the published `process-feedback` helper for interim checks. Write `/workspace/output/final.gds` and explicitly submit using `python -I /protocol/submit.py`. +Use the reviewed resources in `/protocol/resources.json`: KLayout for checks, Magic for RC extraction and ngspice for simulation. Frozen constraints and requirements are in `/protocol/task.json`; the runtime protocol is in `/protocol/harness.json`. If `process-feedback` is provided, its public helpers may be used for intermediate checks. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly. diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/case.toml b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/case.toml index eb499d198a8f33f44a1d0d77c723e03f9ac1384b..341d7857fe59ddf75e21608ef20df24d923923f1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.cmfb_002_5t_pmos_input" title = "PMOS-Input Common-Mode Detector and Controller" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "5864ed924ed257fc4b047bec06d23ed2ed45897e47fd73abcc225e3c5b42861e" +sha256 = "7f684f8db009f30cd8fc2cae2fa21a851034083c48a4ce026b3d0a3b3f8722f8" [[assets]] path = "reference/cmfb_002_5t_pmos_input.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "56e55e830880cc05a31b26b41b60791c064c904dcb7e98c88c1cb169a5b6dbbe" +sha256 = "f577f3d43336aba3620626f8f8b70d366bcbdba620ec0528323262e8f13fd33c" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "9d0cf10dd16c7a3e2e929dc7fe72dbfb0dd5f4d53f52574e92414e293c903d45" subcircuit = "cmfb_002_5t_pmos_input" +sha256 = "9d0cf10dd16c7a3e2e929dc7fe72dbfb0dd5f4d53f52574e92414e293c903d45" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +sha256 = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" [task.constraints] quality = [ @@ -619,8 +619,6 @@ direction = "target" dimension = "bias" normalization = "target" scale = 1.5 -lower = 0 -upper = 1.5 category = "performance" observations = [ "condition_0:output_v", @@ -639,6 +637,11 @@ baseline = [ "source_condition_5:output_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + [[task.evaluation.metrics]] id = "power_w" unit = "W" @@ -647,7 +650,6 @@ direction = "minimize" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -666,6 +668,10 @@ baseline = [ "source_condition_5:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "signed_gain" unit = "1" @@ -776,9 +782,8 @@ unit = "V" aggregation = "max" direction = "minimize" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_0:ripple_v", @@ -797,6 +802,10 @@ baseline = [ "source_condition_5:ripple_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "dc_cm_slope" unit = "1" @@ -805,7 +814,6 @@ direction = "target" normalization = "target" scale = 1 aggregation = "max" -lower = 0 category = "performance" observations = [ "condition_0:dc_cm_slope", @@ -824,6 +832,10 @@ baseline = [ "source_condition_5:dc_cm_slope", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Increasing the sensed common-mode input must produce the declared nonnegative control-output response, preserving the controller polarity." + [[task.evaluation.metrics]] id = "dc_ref_slope" unit = "1" @@ -832,7 +844,6 @@ direction = "target" normalization = "target" scale = 1 aggregation = "max" -upper = 0 category = "performance" observations = [ "condition_0:dc_ref_slope", @@ -851,11 +862,15 @@ baseline = [ "source_condition_5:dc_ref_slope", ] +[task.evaluation.metrics.requirement] +upper = 0 +rationale = "Increasing the reference must produce the declared nonpositive control-output response, opposite to the sensed-input response." + [task.evaluation.pre_layout] -source_report_sha256 = "24ef88283ce7b870974841ee587ce0f40de20774c208cabadf30c592b0c258d4" +source_report_sha256 = "b7147afcc835b6bdd2bfc5d280a947c5251766902acfed5e446ecb7af99cb465" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a2f9354b5879402806e49b60afcd4d4802bd2a168f62658c38447df758f38102\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -899,7 +914,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.dc_cm_slope] @@ -938,6 +953,13 @@ unit = "1" value = 0.01655849999999998 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "99d839ae57201ca22f2db9d672d0df2799a0396f7c6cf5dffeccf4db76a96f01" +ac = "095bfc09d6da36bf98f2ad8a6f25ca9efea0bc21b197fae183d46f12fbec29e9" +transient = "1cddcb2b8c7b836131251853d7f56e9852f7b9e3a5e75c64716a241f511634c1" +cm_dc = "68c649ba132fd2ff826f9419333dab5c66cc6d3b80698f3baf4a3795540e157b" +ref_dc = "c126a824a83f5fcf6fc1d22b46caac01b3bee8b397c6c9c30027e84a7a283a53" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -980,7 +1002,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.dc_cm_slope] @@ -1019,6 +1041,13 @@ unit = "1" value = -0.0163921 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "99d839ae57201ca22f2db9d672d0df2799a0396f7c6cf5dffeccf4db76a96f01" +ac = "06d387917a51c4384e203875f4a11df9aaa80c7e0b5b518093fc8c05b32f97cb" +transient = "3611885182d95df41cada2ab78e5bc3cd76274f47b9da1a76cfc628df6842de1" +cm_dc = "68c649ba132fd2ff826f9419333dab5c66cc6d3b80698f3baf4a3795540e157b" +ref_dc = "c126a824a83f5fcf6fc1d22b46caac01b3bee8b397c6c9c30027e84a7a283a53" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1061,7 +1090,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.dc_cm_slope] @@ -1100,6 +1129,13 @@ unit = "1" value = -1.00000000002876e-07 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "99d839ae57201ca22f2db9d672d0df2799a0396f7c6cf5dffeccf4db76a96f01" +ac = "690379616be0a0f327f70b94b73b99d9cb6a4aea2d1fb1bde680d502472bc10f" +transient = "b8a0c1173c0270f0200b833fcf951b93f824eb74247e5ad066b829acb710c368" +cm_dc = "68c649ba132fd2ff826f9419333dab5c66cc6d3b80698f3baf4a3795540e157b" +ref_dc = "c126a824a83f5fcf6fc1d22b46caac01b3bee8b397c6c9c30027e84a7a283a53" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1142,7 +1178,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.dc_cm_slope] @@ -1181,6 +1217,13 @@ unit = "1" value = 0.01759659999999996 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "0253be93b0aecbe0f691a586879c6fe66a25ace1837bb8b84d0d31080d318cba" +ac = "5be71484d554a543953df878d957b24815a47e55d202e28508ec3b711737e16b" +transient = "5ef2fc31c81a36affe4ef596836caa4c12dcc92ed8d50906a1fc724575a4128b" +cm_dc = "9312b6e4e52c510d34bc9a20576204e2e805ce0e75faffa6c50387440805edd1" +ref_dc = "d215b9dbb9c3102ac9f98cf6b733f4fe89641f3d012e85af2e2dfeb027b1799e" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1223,7 +1266,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_4.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_4.measurements.dc_cm_slope] @@ -1262,6 +1305,13 @@ unit = "1" value = -0.0174032 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "0253be93b0aecbe0f691a586879c6fe66a25ace1837bb8b84d0d31080d318cba" +ac = "511ed811b420ae412f780a60a9751a27407013367ea4ad183c3bf506e9d7c6ec" +transient = "9c746c68453cca78083a51d4055bfd314eff1238f88d564f8f9ad53b1a2b89ac" +cm_dc = "9312b6e4e52c510d34bc9a20576204e2e805ce0e75faffa6c50387440805edd1" +ref_dc = "d215b9dbb9c3102ac9f98cf6b733f4fe89641f3d012e85af2e2dfeb027b1799e" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1304,7 +1354,7 @@ cm_dc = "cm_dc.raw" ref_dc = "ref_dc.raw" [task.evaluation.pre_layout.jobs.source_condition_5.input_sha256] -deck = "6c083bab7eed8d17118dbb5dd5cd7418675e74e47f26859d8924c4ef58666595" +deck = "713b8af7eb91ced63acb01b10267bedc66c3f1d8f2827a3e98084948c18d948b" dut = "c2f813d8f9a239ef66cb9342df6818496a08dcf86bce12ff210770ac2ac811ef" [task.evaluation.pre_layout.jobs.source_condition_5.measurements.dc_cm_slope] @@ -1343,6 +1393,13 @@ unit = "1" value = -1.00000000002876e-07 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "0253be93b0aecbe0f691a586879c6fe66a25ace1837bb8b84d0d31080d318cba" +ac = "952c3cd4f1e78238c62cb582f792c8ff82d9ea29e36f6ada9f85c5bbd086d73e" +transient = "9070b081b97086fd7f82990bf12bb818b7e11e3450f1bff42d0eb0ffef0b4858" +cm_dc = "9312b6e4e52c510d34bc9a20576204e2e805ce0e75faffa6c50387440805edd1" +ref_dc = "d215b9dbb9c3102ac9f98cf6b733f4fe89641f3d012e85af2e2dfeb027b1799e" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1355,7 +1412,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1366,7 +1423,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1379,7 +1436,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1392,7 +1449,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1404,7 +1461,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1414,7 +1471,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/schematic.svg index a7f140e08ea2a483a3980b784e50b7a426400006..9eb37c9e9051cd8f73a5ec5f3315203b81f8ceca 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/schematic.svg @@ -1,2 +1,2 @@ -cmfb_002_5t_pmos_input{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.cmfb_002_5t_pmos_input","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/circuit.cdl","netlist_sha256":"9d0cf10dd16c7a3e2e929dc7fe72dbfb0dd5f4d53f52574e92414e293c903d45","project_sha256":"5aff0c3bf378f69e228dca62be79e6647e2a4be46c51c29db39fc8952d4b9ed0","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["cmfb_002_5t_pmos_input","XRT1_bank1","XRRMN_bank2","XRRMP_bank3"],"banks":[{"name":"XRT1_bank1","devices":4,"source_references":["RT1","RT5","RT6","RTSUB"]},{"name":"XRRMN_bank2","devices":4,"source_references":["RRMN_0","RRMN_1","RRMN_2","RRMN_3"]},{"name":"XRRMP_bank3","devices":4,"source_references":["RRMP_0","RRMP_1","RRMP_2","RRMP_3"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":8},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["cmfb_002_5t_pmos_input"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/schematic/cmfb_002_5t_pmos_input.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.cmfb_002_5t_pmos_inputvinnsubcm_sensevsssubvinpsubcm_sensevddwell_3ptailmirrwell_0well_3cm_sensevddwell_4vcmfbvrefptailwell_4vsssubmirrmirrvssbiasbiasvddsubvsssubvinnsubcm_sensevinpsubcm_sensewell_0vinpvinnvcmfbvrefvddvssptailbiasvcmfbvsssubmirrvddwell_2vddvddbiasbiaswell_2cmfb_002_5t_pmos_inputEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=0.33u l=0.27um=1MM2sg13_lv_nmosw=2.32u l=1.31um=1RT2ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=0.88u l=0.26um=1RT3ntap1A=4e-12 P=8e-6MM4sg13_lv_pmosw=1.42u l=0.27um=1RT4ntap1A=4e-12 P=8e-6MM5sg13_lv_pmosw=1.42u l=0.27um=1MM6sg13_lv_nmosw=2.32u l=1.31um=1MM7sg13_lv_nmosw=0.29u l=0.22um=1XXRT1_bank1XRT1_bank1XXRRMN_bank2XRRMN_bank2XXRRMP_bank3XRRMP_bank3 -Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect. +cmfb_002_5t_pmos_input{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.cmfb_002_5t_pmos_input","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["cmfb_002_5t_pmos_input","XRT1_bank1","XRRMN_bank2","XRRMP_bank3"],"banks":[{"name":"XRT1_bank1","devices":4,"source_references":["RT1","RT5","RT6","RTSUB"]},{"name":"XRRMN_bank2","devices":4,"source_references":["RRMN_0","RRMN_1","RRMN_2","RRMN_3"]},{"name":"XRRMP_bank3","devices":4,"source_references":["RRMP_0","RRMP_1","RRMP_2","RRMP_3"]}],"limitations":["Physical R/C/Q use external model bindings with X-prefixed internal references; the editable project retains the original terminals and model bindings. Exported decks are for connectivity inspection, not replacement simulation decks.","The sense-resistor ladders and physical contacts remain detailed child sheets in this same editable project; the main sheet shows the common-mode signal path."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":8},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["cmfb_002_5t_pmos_input"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/design/cmfb_002_5t_pmos_input.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.cmfb_002_5t_pmos_inputvinnsubcm_sensevsssubvinpsubcm_sensevddwell_3ptailmirrwell_0well_3cm_sensevddwell_4vcmfbvrefptailwell_4vsssubmirrmirrvssbiasbiasvddsubvsssubvinnsubcm_sensevinpsubcm_sensewell_0vinpvinnvcmfbvrefvddvssptailbiasvcmfbvsssubmirrvddwell_2vddvddbiasbiaswell_2cmfb_002_5t_pmos_inputSense ladderPMOS input pair and NMOS mirror loadBiasWell and substrate contactsMM3MM7MM1MM4MM5MM6MM2RRMN: vinn → cm_senseRRMP: cm_sense → vinpRT2RT0RT3RT4substrate taps + diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/testbench.spice index ac76ff2dd0e735fda2df2626a27ad6c70b46be9a..9a7d8e5594ce3a6d359c5cf83b6cd65e52af4603 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/materials/testbench.spice @@ -26,6 +26,7 @@ write op.raw all let center=v(cm) let lower=center-.001 let upper=center+.001 +save i(vdd) v(cm) v(vcmfb) v(vdd) v(vinp) v(vinn) ac dec 100 1 100Meg let signed=real(v(vcmfb)) let response=mag(v(vcmfb)) diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/problem.md b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/problem.md index c56f89e9826c51994aa2feb7e3b049cea10e0bc8..55d83d592a9bc76967989504b592e1b7f84150f1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_002_5t_pmos_input/problem.md @@ -12,46 +12,33 @@ Implement `cmfb_002_5t_pmos_input` with the complete fixed topology and minimize 1.5 V supply; 0.5 and 0.7 V input common mode and equal reference. Output has 1 pF to ground and 10 Mohm to the common-mode source. At each bias, separate unit AC common-mode, reference and balanced differential excitations cover 1 Hz–100 MHz. Verify zero differential component in common-mode excitation and zero common-mode component in differential excitation. Centered 2 mV DC sweeps separately vary the common-mode or reference source. Separate 1 mV common-mode/reference or 100 mV differential steps start at 20 us, have 100 ns edges and last 40 us. The 100 us transient starts at DC, maximum step 20 ns. Rail power includes both diode bias devices, but excludes fixture driver losses. No external plant/servo, solver shunt or forced state. -All source/candidate jobs share exactly the same fixtures, parameters, nominal TT models and 27 C temperature. Testbench control blocks and frozen runtime parameters define all stimulus and measurement details. Source simulation is independent of the reference GDS. No paper or data-sheet performance number is an acceptance threshold. +Source and candidate jobs use exactly the same test apparatus, parameters, nominal TT models and 27 C temperature. Stimuli and measurements follow the testbench control block and frozen runtime parameters. Source simulation is independent of reference GDS; paper or datasheet performance is not an acceptance bound. ## Physical Requirements Submit a valid GDSII containing top cell `cmfb_002_5t_pmos_input`, at most 10485760 bytes. Pass the pinned native DRC profile, named-interface LVS and functional outline checks. Maximum functional width/height are 5000/1000 um. The complete functional layer set is `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]` (layer/datatype pairs); text/annotation geometry is excluded. There are no case-local DRC waivers. Geometry bounds are generous task/resource limits, not an area score anchor. -Post-layout simulation must consume native candidate-GDS-derived distributed wire RC, retaining every physical MOS, resistor and capacitor. Native LVS alone does not substitute for PEX. Magic uses ideal well/substrate tap connections; source simulation retains native finite tap models. This boundary does not establish distributed substrate resistance or substrate-noise accuracy. +Post-layout simulation uses distributed wire RC from native candidate GDS and retains physical MOS, resistors and capacitors; LVS cannot replace PEX. Magic idealizes well/substrate contacts while source simulation retains finite native contact models; no distributed substrate resistance or noise accuracy is claimed. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. Coefficient 4 covers a compact gain/bias/passive network. Nonnegative common-mode and nonpositive reference DC slopes are functional sign-domain constraints. Both include zero and do not establish a minimum response magnitude. Reported response/ripple windows do not certify a closed-loop CM regulator or upstream optimization claims. -Every required condition must yield finite, valid measurements and pass the functional bounds below. Missing or invalid extraction/measurements are evaluation errors, not low performance scores. +Every required condition must produce finite, valid measurements and pass the functional bounds below. Missing or invalid extraction/measurements are evaluation errors and cannot be replaced by a low performance score. -| Metric | Unit | Definition | Dimension / normalization | Functional bounds | +`ripple_v` uses `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Unit | Definition | Dimension / normalization | Functional range | | --- | --- | --- | --- | --- | | `output_v` | V | Natural loaded output with zero CM error | bias / target; scale 1.5 | lower=0; upper=1.5 | | `power_w` | W | Rail power including dual-diode bias | supply / ratio; scale 1e-12 | lower=0 | @@ -59,7 +46,7 @@ Every required condition must yield finite, valid measurements and pass the func | `gain_1khz` | 1 | Magnitude at 1 kHz, selected excitation | response / target; scale 1 | Finite measurement | | `gain_100khz` | 1 | Magnitude at 100 kHz, selected excitation | response / target; scale 1 | Finite measurement | | `step_response_v` | V | Mean response 50–60 us minus 10–20 us | response / target; scale 0.01 | Finite measurement | -| `ripple_v` | V | Recovery window output variation | response / ratio; scale 0.0001 | lower=0 | +| `ripple_v` | V | Recovery window output variation | response / saturating_ratio; scale 0.0001 | lower=0 | | `dc_cm_slope` | 1 | Centered 2 mV DC output slope for dc_cm_slope | response / target; scale 1 | lower=0 | | `dc_ref_slope` | 1 | Centered 2 mV DC output slope for dc_ref_slope | response / target; scale 1 | upper=0 | @@ -67,7 +54,6 @@ Target normalization preserves the source operating point/transfer using its dec The area anchor is **10500 um²**: twice the sum of `(W + 6 um) × (L + 8 um)` over every expanded MOS and physical passive unit (15 units, sum 5245.926900 um²), rounded upward to 100 um². Contact/well/tap/isolation envelopes are included in the 6/8 um allowances; the factor two allows routing. This is an engineering compact-footprint estimate, independent of measured witness area, not a foundry minimum or demonstrated optimum. Task coefficient: **4**. - ### Score weights Common-mode sensing/controllers: signed transfer 45%; ripple 19.3%; output bias 6.43%; power 19.3%; area 10%. Each objective's weight is divided equally among its metrics. @@ -89,4 +75,4 @@ Common-mode sensing/controllers: signed transfer 45%; ripple 19.3%; output bias Solve budget: **8 hours**. -Use the runtime task and reviewed PDK resource bundle for the declared native checks, extraction and ngspice measurements. Write `output/final.gds` with the required top cell, then explicitly submit its path through the session submission interface; creating a file alone is not submission. Reference GDS, qualification results and development sources are excluded from standard solver inputs. +Use the runtime task and reviewed PDK resources to complete the declared native checks, extraction and ngspice measurements. Write the required top cell to `output/final.gds`, then explicitly submit its path through the session interface; file generation alone is not submission. Reference GDS, qualification results and development sources are not standard solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/case.toml b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/case.toml index af7d26febd59a89e0db5ebcdec00e19124ac8f1f..a7037b87e1e5dd799554e2b8cf30695ad9c386a1 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.cmfb_004_output_switched_cap" title = "MIM Switched-Capacitor Common-Mode Sampler" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "4fbb63f12b4a4b6defd80eddfa5a063c9e109f5b8a3befdcdcb332252295d026" +sha256 = "33b4ef591e4b812c33447c6f198332cf8db2a3dd69ba2597809643709d612f6e" [[assets]] path = "reference/cmfb_004_output_switched_cap.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-cmfb_004_output_switched_cap-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "4abd5e63d169023ccabf5d07b70e0f70a740c8fa79fb2310cdcfee5275e48692" +sha256 = "c56e249d8d3841cdf3b5db345441dbf4eb2a995be2521ac52362c330a693b736" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "3a3ca59eef1a93dd54f0e78087fccb7e250f354833ec52950e1b0f425daef481" subcircuit = "cmfb_004_output_switched_cap" +sha256 = "3a3ca59eef1a93dd54f0e78087fccb7e250f354833ec52950e1b0f425daef481" [task.inputs.performance] path = "materials/testbench.spice" @@ -499,8 +499,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "sample_error_v" @@ -523,10 +526,13 @@ baseline = [ "source_condition_3:sample_error_v", "source_condition_4:sample_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "hold_drift_v" category = "performance" @@ -548,10 +554,13 @@ baseline = [ "source_condition_3:hold_drift_v", "source_condition_4:hold_drift_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "clock_power_w" category = "performance" @@ -574,14 +583,17 @@ baseline = [ "source_condition_4:clock_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "e9fb19ad7fdaf9d3e67fea617f7ac9bb5ef9d0f30b8ff05aaa70b025b2fe0b68" +source_report_sha256 = "fa39a56ba7b987270610812b98df5047f5e66acc86962e797216780629dcf22b" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"30ea2fc7a7da5d8deed2cf4fcdde1e7420ffe3e6913aece29d19b692ea2506ab\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -626,6 +638,9 @@ unit = "V" value = 0.0001886535 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +transient = "60b5dc1c42dc716b89693a80ee738bc4bef43b2f34044f6dfeebe94baa97e6b9" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -669,6 +684,9 @@ unit = "V" value = 0.0001916212 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +transient = "3be4adbf9fa75c8d7c23c703c630654baae44e117cb1ae90fdd719ca2d4f679b" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -712,6 +730,9 @@ unit = "V" value = 2.520536e-06 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +transient = "e1ab6020a96a58d9e50923238bc766db822684d1e3a02ea826e6d26729ee5b7a" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -755,6 +776,9 @@ unit = "V" value = 0.0001912413 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +transient = "756b2e9bd849b4107ec8e1c8d9a1f89be171dacfd8453a7ed402743dba10ab26" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -798,6 +822,9 @@ unit = "V" value = 0.0001925041 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +transient = "2607b70a65753ae4243b935daa63858e92c70983cf58c216191ae74c2cc513ec" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -810,7 +837,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -821,7 +848,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -834,7 +861,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -847,7 +874,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -859,7 +886,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -869,7 +896,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/input-pair-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/schematic.svg index c05e73cb73e6cd2d91337bf0a2f52056b072cc7f..2ffdad6f657bebe75b9b758d6786e72bc9ec405a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/schematic.svg @@ -1 +1,2 @@ -cmfb_004_output_switched_cap{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.cmfb_004_output_switched_cap", "netlist_sha256": "3a3ca59eef1a93dd54f0e78087fccb7e250f354833ec52950e1b0f425daef481", "project_sha256": "c5b6a5269f0ba619dedb679e53ae46c2b40b06d129bb58c7c68d177f449b3c40", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["cmfb_004_output_switched_cap"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}cmfb_004_output_switched_capvcmvinpvbiasvcmfbclk_phi_notclk_phisense_pctl_pvcmvinnvbiasvcmfbclk_phi_notclk_phisense_nctl_nvbiasvcmvsssubvddwellvinpvinnvcmfbvcmvbiasclk_phiclk_phi_notvddvsscmfb_004_output_switched_capihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Positive sampling branchMM20.15/0.13MM60.15/0.13MM10.15/0.13MM50.15/0.13CC2_025.9/25.9MM40.15/0.13MM80.15/0.13MM30.15/0.13MM70.15/0.13P bulk → wellN bulk → sub02 Negative sampling branchMM100.15/0.13MM140.15/0.13MM90.15/0.13MM130.15/0.13CC4_025.9/25.9MM120.15/0.13MM160.15/0.13MM110.15/0.13MM150.15/0.13P bulk → wellN bulk → sub03 Reference capacitorsCC1_025.9/25.9CC3_025.9/25.904 Substrate contacts / repeated banksRRptap1A=260 µm²RRntap1A=130 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim \ No newline at end of file +cmfb_004_output_switched_cap{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.cmfb_004_output_switched_cap","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["cmfb_004_output_switched_cap"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["cmfb_004_output_switched_cap"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/design/cmfb_004_output_switched_cap.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.cmfb_004_output_switched_capvcmvinpvbiasvcmfbclk_phi_notclk_phisense_pctl_pvcmvinnvbiasvcmfbclk_phi_notclk_phisense_nctl_nvbiasvcmvsssubvddwellvinpvinnvcmfbvcmvbiasclk_phiclk_phi_notvddvsscmfb_004_output_switched_capPositive sampling branchMM20.15/0.13MM60.15/0.13MM10.15/0.13MM50.15/0.13CC2_025.9/25.9MM40.15/0.13MM80.15/0.13MM30.15/0.13MM70.15/0.13P bulk → wellN bulk → subNegative sampling branchMM100.15/0.13MM140.15/0.13MM90.15/0.13MM130.15/0.13CC4_025.9/25.9MM120.15/0.13MM160.15/0.13MM110.15/0.13MM150.15/0.13P bulk → wellN bulk → subReference capacitorsCC1_025.9/25.9CC3_025.9/25.9Substrate contactsRRptap1A=260 µm²RRntap1A=130 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/problem.md b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/problem.md index 41701aaf2062a35e8965c968d027849627435d1d..8633b2537a03319d7e0655aa2623863ebb654056 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/cmfb_004_output_switched_cap/problem.md @@ -8,11 +8,11 @@ Implement `cmfb_004_output_switched_cap` in IHP SG13G2 and submit a self-contain `materials/circuit.cdl` is the authoritative physical circuit; `materials/circuit.spice` is its equivalent simulator representation. `materials/testbench.spice` supplies measurement apparatus. This problem is the description input. The ordered ports are `vinp vinn vcmfb vcm vbias clk_phi clk_phi_not vdd vss`: sensed positive/negative inputs, sampled control output, common-mode reference, control reference, two independent clock nets, supply and return. -Preserve connectivity, MOS W/L/m, capacitor dimensions and unit multiplicities, and body/tap connections. Placement and routing are free. Device splitting/combination and source/drain interchange are allowed only when accepted by the declared native LVS equivalences. No common-centroid or statistical matching requirement is scored. All specified ideal external sources, loads and measurement apparatus belong outside the DUT. +Preserve connections, MOS W/L/m, capacitor dimensions and cell multiplicities, and body terminals/contacts. Placement and routing are free; device splitting/merging and source/drain exchange must follow declared native LVS equivalence rules. Common-centroid geometry and statistical matching are not scored; ideal external sources, loads and measurement fixtures remain outside the DUT. ## Operating Conditions -Typical IHP low-voltage MOS, typical resistor and capacitor models at 27 C; VDD = 1.5 V and VSS = 0 V. Each node has the declared 1e12 ohm numerical shunt. Transient integration uses Gear order 2 with a 1 ns output and maximum step. Physical taps have finite source-model resistance; Magic treats well/substrate ties ideally. Distributed silicon substrate resistance, statistical mismatch, PVT, noise and RF/EM are outside scope. +Use typical IHP low-voltage MOS, resistor and capacitor models at 27 C, VDD=1.5 V and VSS=0 V. Each node has a declared 1e12 ohm numerical shunt. Transient uses second-order Gear with both output and maximum steps 1 ns. Source models retain finite body-contact resistance; Magic idealizes well/substrate connections. Distributed substrate resistance, statistical mismatch, PVT, noise and RF/EM are outside coverage. Vcm = 0.75 V; Vbias = 0.6 V. Each condition starts with input common mode 0.75 V. It changes linearly over 40–40.1 us to common_v, then holds through 100 us. Inputs are common mode +/- diff_v. The five (common_v, diff_v) pairs in volts are (0.65,0), (0.65,0.1), (0.75,0.1), (0.85,0), (0.85,0.1). Phi starts high, falls after 1 us, and alternates with its complementary independent clock; rise/fall times are 2 ns, low width 5 us and period 10 us. Phi high precharges the floating capacitors; phi low couples them to the sensed inputs and output. Finite complementary slopes permit overlap. An external 1 pF loads vcmfb; stop time is 100 us. The target after repeated transfers is 0.6 V + common_v - 0.75 V. @@ -20,47 +20,32 @@ Vcm = 0.75 V; Vbias = 0.6 V. Each condition starts with input common mode 0.75 V The GDS top cell is `cmfb_004_output_switched_cap`, with a 10 MiB maximum file size. Provide physical, correctly connected and accessible labeled interface metal; retain every named port. Pass IHP main and maximal DRC (density and antenna excluded for this standalone block), strict named-interface LVS and a functional bounding box no larger than 320 by 70 um. No DRC waivers are used. The functional footprint includes device, passive, implant, well and complete routing layers; excludes annotations/pin text and nonfunctional markers. Its explicit GDS layer/datatype set is `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. The area is the bounding-box area of those layers, not summed metal area. -The candidate GDS must pass artifact, DRC, LVS and hard geometry before extraction. Magic candidate-derived distributed interconnect resistance and capacitance, with zero coupling-capacitance threshold, feed the supplied testbench. Internal MIM devices remain in candidate extraction. Source simulation alone cannot establish acceptance. This is nominal block qualification, not fabrication signoff. +Candidate GDS first passes file, DRC, LVS and hard geometry checks; Magic then extracts distributed interconnect RC with zero coupling-capacitance threshold and retains internal MIM. The supplied testbench uses the candidate extracted circuit; source simulation cannot replace acceptance. This is nominal module verification, not manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`sample_error_v`, `hold_drift_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `output_v` | V(out) at 95 us | V | target / target | 0 … 1.5 | 1.5 | -| `sample_error_v` | Maximum absolute V(out) minus [0.6 V + (V(vinp)+V(vinn))/2 - 0.75 V], over 92–95 us | V | minimize / ratio | 0 … +∞ | 1e-06 | -| `hold_drift_v` | Maximum absolute V(out) minus its 95 us sample, over 96.1–99 us | V | minimize / ratio | 0 … +∞ | 1e-06 | +| `sample_error_v` | Maximum absolute V(out) minus [0.6 V + (V(vinp)+V(vinn))/2 - 0.75 V], over 92–95 us | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | +| `hold_drift_v` | Maximum absolute V(out) minus its 95 us sample, over 96.1–99 us | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | | `clock_power_w` | Mean of max(0,-V(phi) I(VPH)) + max(0,-V(phin) I(VPL)), over 80–100 us; returned energy is not credited | W | minimize / ratio | 0 … +∞ | 1e-12 | -Area reference: **5263.8 um2**. 22 expanded device instances; sum of device/contact envelopes 3414.7414 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **5263.8 um2**. The expanded circuit has 22 device instances, a sum of device/contact envelopes 3414.7414 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights @@ -78,4 +63,4 @@ Common-mode sampler: sample accuracy 45%; hold drift 27%; output bias 4.5%; cloc Solve budget: **3 hours**. -Use the reviewed SG13G2 device/rule/model resources supplied through `/protocol/resources.json` and the task definitions in `/protocol/task.json`. KLayout supplies layout and physical checks; Magic supplies candidate RC; ngspice consumes the declared deck. Discover available feedback through the runtime harness protocol. Write `output/final.gds` in the workspace and explicitly submit that GDS through the submission protocol. Reference layouts, source checkouts and authoring scripts are not solver inputs. +Use reviewed SG13G2 devices/rules/models from `/protocol/resources.json` and the task from `/protocol/task.json`. KLayout handles layout and physical checks, Magic extracts candidate RC, and ngspice runs declared decks. Discover feedback through the runtime protocol and explicitly submit workspace `output/final.gds`; reference layouts, the source repository and author scripts are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/case.toml b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/case.toml index 1e0ad081d1f47fba37329602695d3fce85623f99..3ff200e53de6c530884d98b5e86e0898e1bbc1ba 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/case.toml @@ -1,22 +1,18 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.drv_001_pam4_sige_dac" title = "Upstream broadband SiGe PAM4 current-steering driver" status = "qualified" +in_core = true [origin] url = "https://github.com/MacAnalog/spicexplorer-release/tree/263d0322f8900dc331536fbbe6c0e804514fc454/analog-db/circuits/drv_001_pam4_sige_dac" -[screening] -decision = "include" -reason = "Faithful upstream signoff-point circuit and layout validated through native DRC/LVS, candidate-derived CC extraction and source-paired RF/tone scoring." - [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "b3bd687b00e596c675870da71a94dc2ecbffc1500c95fe3a9ff457546760cfa6" +sha256 = "436f1ec15be262427731227ccc98f1e2e20e5344a9c270202d5167ee0a5eec4c" [[assets]] path = "materials/provenance.json" @@ -161,13 +157,13 @@ environment = "ihp-sg13g2-pam4-signoff-cc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "f293d5119508f41a3d4b5cf940eb934d822097ed4ab4299b82a538f04f9cf10d" +sha256 = "fcd1d78af46c04721e6dd0f025cc11df418214d5e4eee2fcc90054f898334cc1" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "310d1f67d5d237cfc88525f26568c5bcf45680bb2e8141982600669ee81a2ead" subcircuit = "pam4drv_pam4_lay" +sha256 = "310d1f67d5d237cfc88525f26568c5bcf45680bb2e8141982600669ee81a2ead" [task.inputs.simulation] path = "materials/circuit.spice" @@ -177,7 +173,7 @@ sha256 = "54e5da9d47efea6a63e92298f62b20b24f4c6654b21f48fcadf88bf1dfdeda3a" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "3b4e7c1c84b2dfb82e22cbc59b4abad5948608e463b789d97e057de9094197ca" +sha256 = "00e01511f75908acf98e1f7fe801a9aa92475e9669112d1ed6b4194d87dc7532" [task.constraints] quality = [ @@ -312,20 +308,20 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 10000.0 -rationale = "PAM4 SiGe driver: binary weighting 22.5%; high-frequency transfer 22.5%; port matching 18%; gain and swing 18%; power 9%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 700.0 +rationale = "The 700 um2 area budget demands compact HBT/resistor placement while RF quality carries 80%. Binary weighting gets 20% with a 0.1 dB deviation scale (about 1.16% amplitude-ratio change), replacing the previous 6.02 dB scale that hid weighting error. Gain rolloff and port reflection retain distinct frequency measurements and source anchors. Supply power and fundamental swing retain 5% each; fixed DC bias does not dominate the score." [task.evaluation.scoring.weights] -functional_area = 0.1 -dac_weight_db = 0.225 -lsb_rel50_db = 0.1125 -msb_rel50_db = 0.1125 -s11_32g_db = 0.09 -s22_50g_db = 0.09 -lsb_gain_db = 0.06 -msb_gain_db = 0.06 -swing_vpp = 0.06 -power_mw = 0.09 +functional_area = 0.2 +dac_weight_db = 0.2 +lsb_rel50_db = 0.1 +msb_rel50_db = 0.1 +s11_32g_db = 0.1 +s22_50g_db = 0.1 +lsb_gain_db = 0.05 +msb_gain_db = 0.05 +swing_vpp = 0.05 +power_mw = 0.05 [[task.evaluation.jobs]] id = "artifact" @@ -504,7 +500,11 @@ direction = "target" aggregation = "min" dimension = "bias" normalization = "target" -scale = 6.020599913279624 +scale = 0.1 + +[task.evaluation.metrics.quality_target] +value = 6.020599913279624 +rationale = "Ideal PAM4 binary weighting requires an MSB/LSB voltage ratio of two, or 20*log10(2) dB." [[task.evaluation.metrics]] id = "lsb_rel50_db" @@ -580,7 +580,10 @@ direction = "minimize" aggregation = "max" dimension = "supply" normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0.0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." [[task.evaluation.metrics]] id = "swing_vpp" @@ -596,13 +599,16 @@ direction = "maximize" aggregation = "min" dimension = "response" normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0.0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [task.evaluation.pre_layout] -source_report_sha256 = "cb18a7c3f720e0471893698e2cd5dd7c5edb29cb2f23eab10314b2388285ed9b" +source_report_sha256 = "1a5895f3ebe62878c9e2a55bcd19bcca46730359c63ed2de3c0d0ae7137e6bbb" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": \"hsa\", \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"b9527ba49c9eab307a254db28aa45c302eadd71b2563bdec44c610780fa6ed62\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"7b432fb4cf7911c02eacee3ceaad658c961f16f22bc890ee7ad89b3e44108141\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_nominal] operation = "circuit.simulate" @@ -635,7 +641,7 @@ s22 = "s22.raw" swing = "swing.raw" [task.evaluation.pre_layout.jobs.source_nominal.input_sha256] -deck = "3b4e7c1c84b2dfb82e22cbc59b4abad5948608e463b789d97e057de9094197ca" +deck = "00e01511f75908acf98e1f7fe801a9aa92475e9669112d1ed6b4194d87dc7532" circuit = "54e5da9d47efea6a63e92298f62b20b24f4c6654b21f48fcadf88bf1dfdeda3a" [task.evaluation.pre_layout.jobs.source_nominal.measurements.dac_weight_db] @@ -674,6 +680,12 @@ unit = "dB" value = 2.739725 unit = "V" +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +lsb = "c421c22e487b4fd09ea35f38c645a0bbbcb98d361e1b47c6d2a81fea86a31f0e" +msb = "6d60c07487e07c12d38633dfc3122ff664cdd14f4a93a81a863fdddd8319b3f9" +s22 = "680eba49b47626e0fe666f8b4fb9ccd33f073c37acc8a9fb21b037ef723ab005" +swing = "29b4e061d19a8cd86300862348e05a62db696bd5d129f7fbb881d1b8eabfc910" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -686,7 +698,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -694,7 +706,7 @@ timeout_seconds = 600 type = "klayout-docker" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" timeout_seconds = 600 support = "build/support/pam4-native/klayout" @@ -707,7 +719,7 @@ support = "klayout" type = "klayout-docker" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" timeout_seconds = 600 support = "build/support/pam4-native/klayout" @@ -720,21 +732,24 @@ support = "klayout" type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.cc] type = "sg13g2-kpex-cc-docker" [toolchain.backends.cc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 600 [toolchain.backends.simulation] type = "ngspice-docker" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/pam4-native/hbt-models" compatibility = "hsa" timeout_seconds = 600 @@ -748,3 +763,7 @@ reference = "reference/pam4drv_pam4_lay.gds" [presentation] category = "Amplifiers & RF" summary = "Combines weighted current-steering cells into a SiGe PAM4 driver." + +[screening] +decision = "include" +reason = "Faithful upstream signoff-point circuit and layout validated through native DRC/LVS, candidate-derived CC extraction and source-paired RF/tone scoring." diff --git a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/schematic.svg index 5a05aee6112c1e993f2081905eed58a6903087e3..9cc65e6d0a4320c6598c3a3e632b2dffbb4a2649 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/schematic.svg @@ -1,2 +1,2 @@ -drv_001_pam4_sige_dac{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.drv_001_pam4_sige_dac","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/circuit.cdl","netlist_sha256":"310d1f67d5d237cfc88525f26568c5bcf45680bb2e8141982600669ee81a2ead","project_sha256":"be388ff4f0bb65e994eac393d64c065df164ec268fe7052eacba804cb7babdc0","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["pam4drv_pam4_lay"],"banks":[],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":24},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["pam4drv_pam4_lay"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/schematic/drv_001_pam4_sige_dac.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.pam4drv_pam4_laylsbnc2L0e2L0outpvcascc1L0c1M0outnvcascc2L0msbpc1M1e1M1msbne1M0c2M1e2M1outpvcascc1M1outnvcascc2M1tmsb0e1M0tmsb0e2M0tlsb0e1L0msbntlsb0e2L0tmsb1e1M1tmsb1e2M1lsbpc2M0vcmblsbnvcmbmsbpvcmbmsbnvcmbe2M0outpvccoutnvcce1M0e2M0e1L0e2L0e1M1e2M1lsbplsbnmsbpmsbnoutpoutpoutnvccvcascvcmbtmsb0tlsb0tmsb1subvcascc1M0outnvcascc2M0lsbpmsbpc1L0e1L0pam4drv_pam4_layEqual net labels connect. All source devices and exact parameters are retained.QQ1M0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ2M0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ3M0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ4M0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ1L0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ2L0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ3L0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ4L0npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ1M1npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ2M1npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ3M1npn13G2we=70n le=900nNx=3 m=1Substrate: S=subQQ4M1npn13G2we=70n le=900nNx=3 m=1Substrate: S=subRRE1M0rsilw=4.5u l=0.77um=1Substrate: B=subRRE2M0rsilw=4.5u l=0.77um=1Substrate: B=subRRE1L0rsilw=4.5u l=0.77um=1Substrate: B=subRRE2L0rsilw=4.5u l=0.77um=1Substrate: B=subRRE1M1rsilw=4.5u l=0.77um=1Substrate: B=subRRE2M1rsilw=4.5u l=0.77um=1Substrate: B=subRRblsbprsilw=0.5u l=2.14um=1Substrate: B=subRRblsbnrsilw=0.5u l=2.14um=1Substrate: B=subRRbmsbprsilw=0.5u l=2.14um=1Substrate: B=subRRbmsbnrsilw=0.5u l=2.14um=1Substrate: B=subRRcprsilw=1.4u l=8.71um=1Substrate: B=subRRcnrsilw=1.4u l=8.71um=1Substrate: B=subCCdegM0cap_cmimW=3.21u L=3.21uM=1CCdegL0cap_cmimW=3.21u L=3.21uM=1CCdegM1cap_cmimW=3.21u L=3.21uM=1 -Complete single-sheet circuit. Equal net labels connect. +drv_001_pam4_sige_dac{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.drv_001_pam4_sige_dac","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["pam4drv_pam4_lay"],"banks":[],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":24},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["pam4drv_pam4_lay"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/design/drv_001_pam4_sige_dac.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.pam4drv_pam4_layoutpoutnvcascvcascvcmboutpoutnvcascvcascmsbpmsbnoutpoutnvcascvcmbvcmblsbplsbnmsbpmsbnoutpoutnvccvcascvcmbtmsb0tlsb0tmsb1subPAM4 current-steering driverThree cascode HBT cells share differential outputs; external tail sources set MSB/LSB currents.MSB steering cell 0npn13G2 · 70n/900n · Nx=3QQ3M0QQ4M0QQ1M0QQ2M0RRE1M0RRE2M0CCdegM04.5/0.774.5/0.773.21/3.21RRbmsbp0.5/2.14RRbmsbn0.5/2.14LSB steering cellnpn13G2 · 70n/900n · Nx=3QQ3L0QQ4L0QQ1L0QQ2L0RRE1L0RRE2L0CCdegL04.5/0.774.5/0.773.21/3.21RRblsbp0.5/2.14RRblsbn0.5/2.14MSB steering cell 1npn13G2 · 70n/900n · Nx=3QQ3M1QQ4M1QQ1M1QQ2M1RRE1M1RRE2M1CCdegM14.5/0.774.5/0.773.21/3.21Differential output loadsvcc pull-up; outp/outn are shared by all three steering cells.RRcp 1.4/8.71RRcn 1.4/8.71sub: hidden HBT S and resistor B terminals + diff --git a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/testbench.spice index 850ce42eef7e8a97201bde233836241bcc6e3646..b66bd78f48b9208d1ac8b088034bd43a35c77312 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/materials/testbench.spice @@ -32,6 +32,7 @@ set filetype=ascii op let power_mw = -4000*i(vcc) print power_mw +save i(vcc) v(msbn) v(msbp) v(outn) v(outp) ac dec 20 1e8 1e11 let s21db=db(2*(v(outp)-v(outn))) meas ac lsb_gain_db find s21db at=1e9 diff --git a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/problem.md b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/problem.md index 6b4f012eb0e3e966d4ace66cbefafa26d824b9de..167a3f31cbfecf2b7eab8fb2d4fae1ffc623cc4d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/drv_001_pam4_sige_dac/problem.md @@ -58,82 +58,58 @@ no MIM layers are stripped and no source devices are reinserted. The process reference plane is tied to `sub`. Distributed wire resistance, inductance, pads/package, statistical yield and process-corner robustness are not claimed by this upstream CC characterization contract. Finite substrate/tail-generator -circuits are outside the physical core. A PAM4 eye/RLM result is not established -by these tone and small-signal checks. +circuits are outside the physical core. A PAM4 eye/RLM result is not established by these tone and small-signal checks. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence; the binary-weighting target below replaces its source scoring anchor. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. First compute each metric's raw quality q from the worst paired condition, with raw area quality q_area = area_target / candidate_functional_area. Credit c_i = min(1, q_i) for every positively weighted metric, then compute S = 100 * product(c_i ** w_i). The weights sum to 1 and the score is bounded by 100. An improvement beyond one target cannot compensate for missing another target. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Reaching every positively weighted target scores 100; a feasible reference may score far below 100. Weights express quality tradeoffs, not acceptance bounds. All measurements and their paired source observations must be finite and usable. -Performance is scored continuously against the same-condition source circuit; +Performance is scored continuously against the declared quality anchors; upstream data-sheet targets are not acceptance thresholds. Supply consumption and output swing must be nonnegative; zero or otherwise unusable ratio baselines cannot establish a score. Physical checks remain mandatory. -| Metric | Definition | Unit | Quality rule | Functional bounds | +| Metric | Definition | Unit | Quality normalization | Functional range | | --- | --- | --- | --- | --- | -| `lsb_gain_db` | LSB S21 at 1 GHz | dB | maximize / db20 | none | -| `msb_gain_db` | MSB S21 at 1 GHz | dB | maximize / db20 | none | -| `dac_weight_db` | MSB minus LSB gain | dB | source target | none | -| `lsb_rel50_db` | LSB S21(50 GHz) minus S21(1 GHz) | dB | maximize / db20 | none | -| `msb_rel50_db` | MSB S21(50 GHz) minus S21(1 GHz) | dB | maximize / db20 | none | -| `s11_32g_db` | MSB input reflection coefficient, 20 log10(abs(S11)), at 32 GHz | dB | minimize / db20 | none | -| `s22_50g_db` | Output reflection coefficient, 20 log10(abs(S22)), at 50 GHz | dB | minimize / db20 | none | +| `lsb_gain_db` | LSB S21 at 1 GHz | dB | maximize / db20 | None | +| `msb_gain_db` | MSB S21 at 1 GHz | dB | maximize / db20 | None | +| `dac_weight_db` | MSB minus LSB gain | dB | ideal 2:1 target | None | +| `lsb_rel50_db` | LSB S21(50 GHz) minus S21(1 GHz) | dB | maximize / db20 | None | +| `msb_rel50_db` | MSB S21(50 GHz) minus S21(1 GHz) | dB | maximize / db20 | None | +| `s11_32g_db` | MSB input reflection coefficient, 20 log10(abs(S11)), at 32 GHz | dB | minimize / db20 | None | +| `s22_50g_db` | Output reflection coefficient, 20 log10(abs(S22)), at 50 GHz | dB | minimize / db20 | None | | `power_mw` | Power drawn from the 4 V rail at OP | mW | minimize / ratio | ≥ 0 | | `swing_vpp` | Differential output fundamental swing | V | maximize / ratio | ≥ 0 | -Independent source simulation uses the same deck, conditions and models. -Response quality uses `db20` for gain, -relative bandwidth and reflection-coefficient dB, and a maximizing ratio for swing. Binary -weight uses target normalization to its source value with a `20*log10(2)` dB scale, the ideal binary amplitude-weight interval. Supply quality uses a minimizing -power ratio. Area quality is `Q = 10000 µm² / functional_area`. The frozen compact -allowance is 4500 µm² for device rows + 2000 µm² for terminations/loads + -3500 µm² for routing, vias and substrate contacts. Reflection-coefficient dB -is the negative of positive return loss, so smaller values improve quality. Physical or electrical rejection scores zero; incomplete evaluation -cannot establish success. The area target is a compact sizing allowance, -not the area of a qualified reference. +Independent source simulation uses the same deck, conditions and models. Binary weighting uses **20*log10(2) = 6.020599913279624 dB** as its quality target and **0.1 dB** as its deviation scale. Gain, relative bandwidth, port reflections, swing and power retain their paired source anchors. Reflection-coefficient dB is the negative of positive return loss, so smaller values improve quality. +The area quality target is **700 um2**. Neither this area target nor the electrical quality target is an acceptance cutoff. -### Score weights +The 700 um2 area budget demands compact HBT/resistor placement while RF quality carries 80%. Binary weighting gets 20% with a 0.1 dB deviation scale (about 1.16% amplitude-ratio change), replacing the previous 6.02 dB scale that hid weighting error. Gain rolloff and port reflection retain distinct frequency measurements and source anchors. Supply power and fundamental swing retain 5% each; fixed DC bias does not dominate the score. -PAM4 SiGe driver: binary weighting 22.5%; high-frequency transfer 22.5%; port matching 18%; gain and swing 18%; power 9%; area 10%. Each objective's weight is divided equally among its metrics. +### Score weights | Metric | Weight | | --- | ---: | -| `functional_area` | 0.1 | -| `dac_weight_db` | 0.225000000000 | -| `lsb_rel50_db` | 0.112500000000 | -| `msb_rel50_db` | 0.112500000000 | -| `s11_32g_db` | 0.090000000000 | -| `s22_50g_db` | 0.090000000000 | -| `lsb_gain_db` | 0.060000000000 | -| `msb_gain_db` | 0.060000000000 | -| `swing_vpp` | 0.060000000000 | -| `power_mw` | 0.090000000000 | +| `functional_area` | 0.2 | +| `dac_weight_db` | 0.2 | +| `lsb_rel50_db` | 0.1 | +| `msb_rel50_db` | 0.1 | +| `s11_32g_db` | 0.1 | +| `s22_50g_db` | 0.1 | +| `lsb_gain_db` | 0.05 | +| `msb_gain_db` | 0.05 | +| `swing_vpp` | 0.05 | +| `power_mw` | 0.05 | ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/case.toml index 0ed4475ec9bae5ad067be68d3687692277d9e73d..1b4042e42554aaacfec69921a75a65619d3ec9fc 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.ia_002_fan_chopper_simple" title = "Fan Clocked Capacitive Instrumentation Amplifier" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "e19dc21fdc2350086a35fa403efc852191c17ebe855b2f57d213dcfa4a21b3b2" +sha256 = "7da1dda9bd90c197f234b71984e9c323f3bfecc9e48c814270b0987a1d1d824e" [[assets]] path = "reference/ia_002_fan_chopper_simple.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-clocked-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "85655dfeda58d48b8532f6215a87d539ec0a0175ac38b97a2c50fec4c071ee77" +sha256 = "c9d9a3a76435976ea3c4f6776252493fd48fad6c95efd8b87743a33945f52037" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "97f83b5e7f5fb018b9212759ab77f039f748e14d2ef15280b1e4fc7730ba8afb" subcircuit = "ia_002_fan_chopper_simple" +sha256 = "97f83b5e7f5fb018b9212759ab77f039f748e14d2ef15280b1e4fc7730ba8afb" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "3a607e575115a85d667d2ed160e683938954ff4c8f4b6a3012dbdd0082a8f888" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "6262f1015a05e02f390eaa04dbac647cdc1450d5beddbfbd7e26a0c9a798b0e9" +sha256 = "7c7b3e282ada822a7d87552e96248624fd602187240ced57b548dd0ad272ef80" [task.constraints] quality = [ @@ -456,7 +456,6 @@ direction = "maximize" aggregation = "min" dimension = "response" normalization = "ratio" -lower = 0 scale = 1e-12 category = "performance" observations = [ @@ -468,6 +467,10 @@ baseline = [ "source_condition_1:gain_vv", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The reported sinusoidal transfer magnitude is nonnegative by definition; no minimum gain target is imposed." + [[task.evaluation.metrics]] id = "phase_deg" unit = "deg" @@ -486,7 +489,6 @@ direction = "maximize" aggregation = "min" dimension = "response" normalization = "ratio" -lower = 0 scale = 1e-12 category = "performance" observations = [ @@ -498,6 +500,10 @@ baseline = [ "source_condition_1:zin_ohm", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The reported differential input-impedance magnitude is nonnegative by definition." + [[task.evaluation.metrics]] id = "admittance_real_s" unit = "S" @@ -544,9 +550,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:residual_rms_v", @@ -557,6 +562,10 @@ baseline = [ "source_condition_1:residual_rms_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The residual RMS magnitude has a nonnegative measurement domain." + [[task.evaluation.metrics]] id = "ripple_pp_v" unit = "V" @@ -614,9 +623,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:window_change_v", @@ -627,6 +635,10 @@ baseline = [ "source_condition_1:window_change_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The magnitude of the adjacent-window complex transfer difference is nonnegative." + [[task.evaluation.metrics]] id = "modulation_error_rms_v" unit = "V" @@ -657,7 +669,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -668,6 +679,10 @@ baseline = [ "source_condition_1:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered amplifier consumes net supply and bias energy over the complete observation window." + [[task.evaluation.metrics]] id = "clock_power_w" unit = "W" @@ -676,7 +691,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:clock_power_w", @@ -687,6 +701,10 @@ baseline = [ "source_condition_1:clock_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The complementary switching ports consume nonnegative net clock energy over the complete observation window." + [[task.evaluation.metrics]] id = "boundary_error_s" unit = "s" @@ -699,10 +717,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "5f72f29b6d7c2eff04ccc9737bd4674208e6716dbae1d2df81240237d98694b5" +source_report_sha256 = "bc4c5faa902750fd5d2fc7207357b87145e87dac97ca6a0710e13750b422ef0a" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"49a39032e4e7f0d32f9a23d65c009b0111fa9f56f13ec3ae1037db1105f86fbc\", \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -742,7 +760,7 @@ boundary_error_s = "s" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "6262f1015a05e02f390eaa04dbac647cdc1450d5beddbfbd7e26a0c9a798b0e9" +deck = "7c7b3e282ada822a7d87552e96248624fd602187240ced57b548dd0ad272ef80" dut = "3a607e575115a85d667d2ed160e683938954ff4c8f4b6a3012dbdd0082a8f888" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.admittance_imag_s] @@ -813,6 +831,9 @@ unit = "V" value = 12833155.13880835 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +transient = "f8bbda59fe9fba44f71bb5764c150f97d1e880376d27d03320a66b32ab583c81" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -851,7 +872,7 @@ boundary_error_s = "s" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "6262f1015a05e02f390eaa04dbac647cdc1450d5beddbfbd7e26a0c9a798b0e9" +deck = "7c7b3e282ada822a7d87552e96248624fd602187240ced57b548dd0ad272ef80" dut = "3a607e575115a85d667d2ed160e683938954ff4c8f4b6a3012dbdd0082a8f888" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.admittance_imag_s] @@ -922,6 +943,9 @@ unit = "V" value = 12856835.00380523 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +transient = "6b708e81d71055b8a4cf956707f91e12f9f2ce007577968e33b539aa3d720e02" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -934,7 +958,7 @@ unit = "ohm" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -945,7 +969,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -958,7 +982,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -971,7 +995,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -985,7 +1009,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -995,7 +1019,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 900 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/schematic.svg index 6ac0d143f1b2a2965d54936696163a28277a7f02..eccea768403d5efaff8c276b85e49893f33538f5 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/schematic.svg @@ -1,2 +1,2 @@ -ia_002_fan_chopper_simple{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ia_002_fan_chopper_simple","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/circuit.cdl","netlist_sha256":"97f83b5e7f5fb018b9212759ab77f039f748e14d2ef15280b1e4fc7730ba8afb","project_sha256":"68bc6da90042be3dc406b826729c9c03794beae7e70fc932332a3831af2956a2","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["ia_002_fan_chopper_simple","XRT3_bank1","XCIN1_bank2","XCIN2_bank3","XRRB1_bank4","XRRB2_bank5"],"banks":[{"name":"XRT3_bank1","devices":19,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT16","RT18","RT20","RT23","RT25","RT27","RT29","RT31","RT33","RT34","RTSUB"]},{"name":"XCIN1_bank2","devices":4,"source_references":["CIN1_0","CIN1_1","CIN1_2","CIN1_3"]},{"name":"XCIN2_bank3","devices":4,"source_references":["CIN2_0","CIN2_1","CIN2_2","CIN2_3"]},{"name":"XRRB1_bank4","devices":40,"source_references":["RRB1_0","RRB1_1","RRB1_2","RRB1_3","RRB1_4","RRB1_5","RRB1_6","RRB1_7","RRB1_8","RRB1_9","RRB1_10","RRB1_11","RRB1_12","RRB1_13","RRB1_14","RRB1_15","RRB1_16","RRB1_17","RRB1_18","RRB1_19","RRB1_20","RRB1_21","RRB1_22","RRB1_23","RRB1_24","RRB1_25","RRB1_26","RRB1_27","RRB1_28","RRB1_29","RRB1_30","RRB1_31","RRB1_32","RRB1_33","RRB1_34","RRB1_35","RRB1_36","RRB1_37","RRB1_38","RRB1_39"]},{"name":"XRRB2_bank5","devices":40,"source_references":["RRB2_0","RRB2_1","RRB2_2","RRB2_3","RRB2_4","RRB2_5","RRB2_6","RRB2_7","RRB2_8","RRB2_9","RRB2_10","RRB2_11","RRB2_12","RRB2_13","RRB2_14","RRB2_15","RRB2_16","RRB2_17","RRB2_18","RRB2_19","RRB2_20","RRB2_21","RRB2_22","RRB2_23","RRB2_24","RRB2_25","RRB2_26","RRB2_27","RRB2_28","RRB2_29","RRB2_30","RRB2_31","RRB2_32","RRB2_33","RRB2_34","RRB2_35","RRB2_36","RRB2_37","RRB2_38","RRB2_39"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":80},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ia_002_fan_chopper_simple"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/schematic/ia_002_fan_chopper_simple.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.ia_002_fan_chopper_simplevrefvsum_nsubvrefvsum_psubinch_pvsum_pvsssubinch_nvsum_nclk_chfbfbch_nwell_2well_32vssvb1subfold_pvssvb1subout1_pfold_nvddwell_35vddvb4casc_src_nwell_35vddcasc_src_pwell_36vddvb4casc_src_pwell_36vddwell_37voutpvddvb4well_37vddwell_38voutnvddvb2vb4well_38fbch_pvsum_nfbch_nvsum_pvoutpout1_pg2_pvoutng2_nvsssubinch_nvsum_ninch_pwell_0subvsum_pvrefvsum_nsubvrefvsum_psubvinpvinnfold_pvoutpvoutnvrefclk_chinclk_chin_notclk_chfbclk_chfb_notclk_choutclk_chout_notvddvssvb1vb2vb3vb4inch_pinch_nfbch_pvb2fbch_ng2_pg2_nvsum_pvsum_nout1_nsubfold_nvoutpvssg2_psubvoutnvssg2_nsubclk_choutvddg2_nout1_nsubvddwell_8clk_chout_notg2_nout1_nwell_8vb4clk_choutg2_pout1_psubvddwell_10clk_chout_notg2_pwell_0out1_pwell_10vddwell_11vsum_ptailfold_pwell_11tailvoutpclk_chfbfbch_psubvddwell_13voutpclk_chfb_notfbch_pwell_13voutnclk_chfbfbch_nvddsubvddwell_15voutnclk_chfb_notfbch_nwell_15vinnwell_1clk_chininch_nsubvddwell_17vinnclk_chin_notinch_nwell_17vinpclk_chininch_psubvddwell_19vb3vinpclk_chin_notinch_pwell_19clk_chout_notg2_pout1_nsubwell_1vddwell_21clk_choutg2_pout1_nwell_21vddwell_22out1_nvsum_ntailfold_nwell_22clk_chout_notg2_nout1_psubcasc_src_nvddwell_24clk_choutg2_nout1_pwell_24vinnclk_chin_notinch_psubvddvddwell_26vinnvddclk_chininch_pwell_26vinpclk_chin_notinch_nsubvddwell_28well_2vinpclk_chininch_nwell_28voutnclk_chfb_notfbch_psubvddwell_30voutnclk_chfbfbch_pwell_30vb3voutpclk_chfb_notfbch_nsubvddwell_32voutpia_002_fan_chopper_simpleEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1RT2ntap1A=4e-12 P=8e-6MM11sg13_lv_pmosw=10u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=5u l=0.3um=1MM14sg13_lv_nmosw=6u l=0.5um=1MM15sg13_lv_nmosw=6u l=0.5um=1MM16sg13_lv_nmosw=2u l=0.13um=1RT8ntap1A=4e-12 P=8e-6MM17sg13_lv_pmosw=2u l=0.13um=1MM18sg13_lv_nmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM19sg13_lv_pmosw=2u l=0.13um=1RT11ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1MM20sg13_lv_nmosw=2u l=0.13um=1RT13ntap1A=4e-12 P=8e-6MM21sg13_lv_pmosw=2u l=0.13um=1MM22sg13_lv_nmosw=2u l=0.13um=1RT15ntap1A=4e-12 P=8e-6MM23sg13_lv_pmosw=2u l=0.13um=1MM24sg13_lv_nmosw=2u l=0.13um=1RT17ntap1A=4e-12 P=8e-6MM25sg13_lv_pmosw=2u l=0.13um=1MM26sg13_lv_nmosw=2u l=0.13um=1RT19ntap1A=4e-12 P=8e-6MM27sg13_lv_pmosw=2u l=0.13um=1MM28sg13_lv_nmosw=2u l=0.13um=1RT21ntap1A=4e-12 P=8e-6MM29sg13_lv_pmosw=2u l=0.13um=1RT22ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1MM30sg13_lv_nmosw=2u l=0.13um=1RT24ntap1A=4e-12 P=8e-6MM31sg13_lv_pmosw=2u l=0.13um=1MM32sg13_lv_nmosw=2u l=0.13um=1RT26ntap1A=4e-12 P=8e-6MM33sg13_lv_pmosw=2u l=0.13um=1MM34sg13_lv_nmosw=2u l=0.13um=1RT28ntap1A=4e-12 P=8e-6MM35sg13_lv_pmosw=2u l=0.13um=1MM36sg13_lv_nmosw=2u l=0.13um=1RT30ntap1A=4e-12 P=8e-6MM37sg13_lv_pmosw=2u l=0.13um=1MM38sg13_lv_nmosw=2u l=0.13um=1RT32ntap1A=4e-12 P=8e-6MM39sg13_lv_pmosw=2u l=0.13um=1MM4sg13_lv_nmosw=4.7u l=1um=1MM5sg13_lv_nmosw=4.7u l=1um=1RT35ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=10u l=1um=1RT36ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=10u l=1um=1RT37ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=6.2u l=1um=1RT38ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=6.2u l=1um=1CFB1_0cap_cmimw=23.04u l=23.04um=1CFB2_0cap_cmimw=23.04u l=23.04um=1CM1_0cap_cmimw=25.77u l=25.77um=1CM2_0cap_cmimw=25.77u l=25.77um=1XXRT3_bank1XRT3_bank1XXCIN1_bank2XCIN1_bank2XXCIN2_bank3XCIN2_bank3XXRRB1_bank4XRRB1_bank4XXRRB2_bank5XRRB2_bank5 -Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect. +ia_002_fan_chopper_simple{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ia_002_fan_chopper_simple","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ia_002_fan_chopper_simple","XRT3_bank1","XCIN1_bank2","XCIN2_bank3","XRRB1_bank4","XRRB2_bank5"],"banks":[{"name":"XRT3_bank1","devices":19,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT16","RT18","RT20","RT23","RT25","RT27","RT29","RT31","RT33","RT34","RTSUB"]},{"name":"XCIN1_bank2","devices":4,"source_references":["CIN1_0","CIN1_1","CIN1_2","CIN1_3"]},{"name":"XCIN2_bank3","devices":4,"source_references":["CIN2_0","CIN2_1","CIN2_2","CIN2_3"]},{"name":"XRRB1_bank4","devices":40,"source_references":["RRB1_0","RRB1_1","RRB1_2","RRB1_3","RRB1_4","RRB1_5","RRB1_6","RRB1_7","RRB1_8","RRB1_9","RRB1_10","RRB1_11","RRB1_12","RRB1_13","RRB1_14","RRB1_15","RRB1_16","RRB1_17","RRB1_18","RRB1_19","RRB1_20","RRB1_21","RRB1_22","RRB1_23","RRB1_24","RRB1_25","RRB1_26","RRB1_27","RRB1_28","RRB1_29","RRB1_30","RRB1_31","RRB1_32","RRB1_33","RRB1_34","RRB1_35","RRB1_36","RRB1_37","RRB1_38","RRB1_39"]},{"name":"XRRB2_bank5","devices":40,"source_references":["RRB2_0","RRB2_1","RRB2_2","RRB2_3","RRB2_4","RRB2_5","RRB2_6","RRB2_7","RRB2_8","RRB2_9","RRB2_10","RRB2_11","RRB2_12","RRB2_13","RRB2_14","RRB2_15","RRB2_16","RRB2_17","RRB2_18","RRB2_19","RRB2_20","RRB2_21","RRB2_22","RRB2_23","RRB2_24","RRB2_25","RRB2_26","RRB2_27","RRB2_28","RRB2_29","RRB2_30","RRB2_31","RRB2_32","RRB2_33","RRB2_34","RRB2_35","RRB2_36","RRB2_37","RRB2_38","RRB2_39"]}],"limitations":["The editable project uses external model bindings for physical R/C/Q cards. Exported decks are for connectivity inspection, not replacement simulation decks."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":80},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ia_002_fan_chopper_simple"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/design/ia_002_fan_chopper_simple.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.ia_002_fan_chopper_simplevrefvsum_nsubvrefvsum_psubinch_pvsum_pvsssubinch_nvsum_nfbch_nwell_2well_32vddwell_35well_35vddwell_36well_36vddwell_37vddvb4well_37vddwell_38well_38fbch_pvsum_nfbch_nvsum_pvoutpout1_pg2_pvoutng2_nvsssubinch_nvsum_ninch_pwell_0subvsum_pvrefvsum_nsubvrefvsum_psubvrefvb1vb2vb3vb4inch_pinch_nvsum_pvsum_nout1_nvsssubout1_nvddwell_8well_8out1_psubvddwell_10well_0well_10vddwell_11vsum_pwell_11subvddwell_13voutpfbch_pwell_13vddvddwell_15voutnfbch_nwell_15well_1inch_nsubvddwell_17well_17vddwell_19inch_pwell_19out1_nwell_1vddwell_21well_21vddwell_22vsum_nwell_22out1_pvddwell_24well_24vddvddwell_26vddinch_pwell_26vddwell_28well_2inch_nwell_28vddwell_30voutnfbch_pwell_30vddwell_32voutpia_002_fan_chopper_simpleRT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1RT2ntap1A=4e-12 P=8e-6MM11sg13_lv_pmosw=10u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=5u l=0.3um=1MM14sg13_lv_nmosw=6u l=0.5um=1MM15sg13_lv_nmosw=6u l=0.5um=1MM16sg13_lv_nmosw=2u l=0.13um=1RT8ntap1A=4e-12 P=8e-6MM17sg13_lv_pmosw=2u l=0.13um=1MM18sg13_lv_nmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM19sg13_lv_pmosw=2u l=0.13um=1RT11ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1MM20sg13_lv_nmosw=2u l=0.13um=1RT13ntap1A=4e-12 P=8e-6MM21sg13_lv_pmosw=2u l=0.13um=1MM22sg13_lv_nmosw=2u l=0.13um=1RT15ntap1A=4e-12 P=8e-6MM23sg13_lv_pmosw=2u l=0.13um=1MM24sg13_lv_nmosw=2u l=0.13um=1RT17ntap1A=4e-12 P=8e-6MM25sg13_lv_pmosw=2u l=0.13um=1MM26sg13_lv_nmosw=2u l=0.13um=1RT19ntap1A=4e-12 P=8e-6MM27sg13_lv_pmosw=2u l=0.13um=1MM28sg13_lv_nmosw=2u l=0.13um=1RT21ntap1A=4e-12 P=8e-6MM29sg13_lv_pmosw=2u l=0.13um=1RT22ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1MM30sg13_lv_nmosw=2u l=0.13um=1RT24ntap1A=4e-12 P=8e-6MM31sg13_lv_pmosw=2u l=0.13um=1MM32sg13_lv_nmosw=2u l=0.13um=1RT26ntap1A=4e-12 P=8e-6MM33sg13_lv_pmosw=2u l=0.13um=1MM34sg13_lv_nmosw=2u l=0.13um=1RT28ntap1A=4e-12 P=8e-6MM35sg13_lv_pmosw=2u l=0.13um=1MM36sg13_lv_nmosw=2u l=0.13um=1RT30ntap1A=4e-12 P=8e-6MM37sg13_lv_pmosw=2u l=0.13um=1MM38sg13_lv_nmosw=2u l=0.13um=1RT32ntap1A=4e-12 P=8e-6MM39sg13_lv_pmosw=2u l=0.13um=1MM4sg13_lv_nmosw=4.7u l=1um=1MM5sg13_lv_nmosw=4.7u l=1um=1RT35ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=10u l=1um=1RT36ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=10u l=1um=1RT37ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=6.2u l=1um=1RT38ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=6.2u l=1um=1CFB1_0cap_cmimw=23.04u l=23.04um=1CFB2_0cap_cmimw=23.04u l=23.04um=1CM1_0cap_cmimw=25.77u l=25.77um=1CM2_0cap_cmimw=25.77u l=25.77um=1XXRT3_bank1XRT3_bank1XXCIN1_bank2XCIN1_bank2XXCIN2_bank3XCIN2_bank3XXRRB1_bank4XRRB1_bank4XXRRB2_bank5XRRB2_bank5Input chopperFolded differential core and active loadsOutput chopper and gain stageFeedback chopperInput, feedback and output passivesWell and substrate contacts + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/testbench.spice index 0477c29a9854ea9a4c9b8344caab7990b6abca2c..28f431e8336fb656894302b053fa9b97d1660c69 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/materials/testbench.spice @@ -28,7 +28,6 @@ VCN2 clk_chout_not 0 pulse(1.2 0 0 50n 50n 99.95u 200u) XD inp inn outp outn ref clk_chin clk_chin_not clk_chfb clk_chfb_not clk_chout clk_chout_not vdd 0 vb1 vb2 vb3 vb4 inch_p inch_n fbch_p fbch_n g2_p g2_n vsum_p vsum_n ia_002_fan_chopper_simple .control set noaskquit -set num_threads=1 set numdgt=15 save v(inp) v(inn) v(outp) v(outn) v(clk_chin) v(clk_chin_not) i(VP) i(VN) i(VDD) v(inch_p) v(inch_n) v(fbch_p) v(fbch_n) v(g2_p) v(g2_n) v(vsum_p) v(vsum_n) v(vdd) v(vb1) v(vb2) v(vb3) v(vb4) v(ref) v(freq) v(amp) i(VREF) i(VB1) i(VB2) i(VB3) i(VB4) i(VC0) i(VCN0) v(clk_chfb) v(clk_chfb_not) i(VC1) i(VCN1) v(clk_chout) v(clk_chout_not) i(VC2) i(VCN2) tran 200n 40m 0 200n diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/problem.md index 4c69288a092ef5875ad822957d7f764092a8737d..96f38be030e7989bb37fdfd6cb3487447e381605 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_002_fan_chopper_simple/problem.md @@ -6,10 +6,10 @@ Implement the supplied 39 MOS, 2 R, 6 C circuit. Preserve the running input, fee ## Inputs and Interface -- `problem.md`: description input. -- `materials/circuit.cdl`: netlist input. -- `materials/circuit.spice`: simulation input. -- `materials/testbench.spice`: performance input. +- `problem.md`: task description. +- `materials/circuit.cdl`: physical netlist. +- `materials/circuit.spice`: simulation circuit. +- `materials/testbench.spice`: performance tests. Ordered ports: `vinp vinn voutp voutn vref clk_chin clk_chin_not clk_chfb clk_chfb_not clk_chout clk_chout_not vdd vss vb1 vb2 vb3 vb4 inch_p inch_n fbch_p fbch_n g2_p g2_n vsum_p vsum_n`. Preserve these named connections. @@ -17,17 +17,13 @@ The CDL and simulator netlist are equivalent physical representations. Use their ## Operating Conditions -TT, 27 C, VDD=1.2 V, input common mode and vref=0.6 V; vb1/vb2/vb3/vb4=0.5/0.75/0.45/0.55 V. Each complementary clock pair runs synchronously at 5 kHz with 50 ns rise/fall, 99.95 us pulse width and 200 us period. All positive phases align. Differential sinusoidal input is 10 mV peak at 100 and 200 Hz; load is 50 fF per output. Maximum timestep is 200 ns with adaptive edge resolution. The test runs 40 ms; 0–20 ms is discarded. The 20–40 ms observation spans 100 chop cycles and two/four signal cycles. Adjacent 20–30/30–40 ms windows report transfer variation. This is a finite-window observation of the full clocked circuit, not a claim of asymptotic periodic stability. +TT, 27 C, VDD=1.2 V, input common mode and vref=0.6 V; vb1/vb2/vb3/vb4=0.5/0.75/0.45/0.55 V. Complementary clocks are synchronized at 5 kHz with 50 ns edges, 99.95 us pulse width and 200 us period; positive phases are aligned. Differential sine peak is 10 mV at 100/200 Hz, with 50 fF per output. Maximum step 200 ns adaptively resolves edges. Simulate 40 ms, discard the first 20 ms; 20–40 ms spans 100 chopping periods and 2/4 signal periods, and subwindows 20–30/30–40 ms compare transfer changes. Finite windows do not prove asymptotic periodic stability. ## Physical Requirements -Submit a nonempty GDSII of at most 10485760 bytes. -Native IHP DRC and named-interface LVS must pass without waivers. The functional bounding rectangle includes device, well, contact and complete routing layers, excluding annotations, and must fit 5000 by 1000 um. Native physical taps and all passive units are part of the contract. +Submit nonempty GDSII of at most 10485760 bytes. Pass native IHP DRC and named-interface LVS without waivers. Functional bounds include devices, wells, contacts and all routing layers, excluding annotations, and are at most 5000 × 1000 um. Retain native physical contacts and all passive cells. -Magic extracts candidate interconnect resistance/capacitance and device -junction geometry. Wells/substrate are connected to physical tap rails; source -simulation retains finite tap models. Distributed substrate, statistical -mismatch and manufacturing signoff are outside this nominal contract. +Magic extracts candidate interconnect RC and device junction geometry. Wells/substrate connect to physical-contact supply rails; source simulation retains finite contact models. The nominal contract excludes distributed substrate effects, statistical mismatch and manufacturing signoff. The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. @@ -35,36 +31,23 @@ The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], Use the supplied transient testbench on the extracted candidate. Time-weighted sine/cosine integrals give complex differential transfer and input admittance. Full-precision cumulative integrals at the 20/30/40 ms clock breakpoints avoid cancellation of rounded measurement averages. The summed endpoint error must not exceed 1 ps; this is measurement validity, not a circuit performance gate. Input impedance is the magnitude of differential voltage divided by differential source current, where input current is -(i(VP)-i(VN))/2. Residual RMS removes the measured DC and fundamental; full output peak-to-peak also includes signal and all ripple. It must not be represented as switching ripple alone. Input and feedback modulation errors compare clock-demodulated branch voltages to the associated external signals. Raw monitor waveforms support independent checking of the switching paths. Ordinary DC/AC does not replace these measurements. -Every measurement must be finite. Magnitudes, RMS values and total consumed supply/clock power have nonnegative physical domains. No paper gain, input-impedance boost or ripple specification is a hard gate. Slow common-mode excursions and finite-window variation are reported and scored, not suppressed with a CMFB. The source uses the identical physical devices, clocks, loads and observation windows in an independent simulation. No PAC/PNoise, PSS, noise, mismatch, PVT or supply-startup capability is claimed. +All measurements must be finite; amplitudes, RMS and total supply/clock consumption power must be nonnegative. Paper gain, input-impedance enhancement and ripple specifications are not hard thresholds. Slow common-mode variation and differences between windows are reported and scored without added CMFB suppression; independent source simulation uses the same devices, clocks, loads and windows. No PAC/PNoise, PSS, noise, mismatch, PVT or power-up startup capability is claimed. Area quality is Q=71369.42 um2/functional area. The compact estimate sums MOS (W+2.4)(L+2.4), a 3.2² local tap envelope per MOS and one global tap, each MIM (side+2.4)², and forty (.5+2.4)(84.45+2.4) resistor envelopes per bias arm, then adds 50% routing allowance. It is independent of the witness. Gain and input-impedance magnitudes use source ratios; phase is diagnostic to avoid angular-wrap scoring; residual and window variation use inverse ratios with 1 uV floor; output bias uses 1.2 V target scale; power uses inverse ratios with 1 pW floor. Other observations are diagnostics. Coefficient 8 reflects clock modulation coupled to a compensated capacitive signal-feedback loop; no common-mode regulation is assumed. -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observation | Unit | Quality / dimension | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`residual_rms_v`, `window_change_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality / dimension | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `functional_area` | Functional bounding-rectangle area | um2 | area quality Q | positive area | — | | `gain_vv` | `2*sqrt(dsmean^2+dcmean^2)/amplitude` | V/V | maximize / ratio / response | 0 … +∞ | 1e-12 | @@ -73,29 +56,23 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `admittance_real_s` | `-2*ismean/amplitude` | S | diagnostic | −∞ … +∞ | — | | `admittance_imag_s` | `-2*icmean/amplitude` | S | diagnostic | −∞ … +∞ | — | | `dm_mean_v` | `avg dm from=20m to=40m` | V | target / target / bias | −∞ … +∞ | 1.2 | -| `residual_rms_v` | `rms residual from=20m to=40m` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | +| `residual_rms_v` | `rms residual from=20m to=40m` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | | `ripple_pp_v` | `pp dm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `cm_mean_v` | `avg cm from=20m to=40m` | V | target / target / bias | −∞ … +∞ | 1.2 | | `cm_min_v` | `min cm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `cm_max_v` | `max cm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | -| `window_change_v` | `2*sqrt((dsfirst-dslast)^2+(dcfirst-dclast)^2)` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | +| `window_change_v` | `2*sqrt((dsfirst-dslast)^2+(dcfirst-dclast)^2)` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | | `modulation_error_rms_v` | `rms modulation_error from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `feedback_error_rms_v` | `rms feedback_error from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `power_w` | `avg supplied from=20m to=40m` | W | minimize / ratio / supply | 0 … +∞ | 1e-12 | | `clock_power_w` | `avg clocks from=20m to=40m` | W | minimize / ratio / supply | 0 … +∞ | 1e-12 | | `boundary_error_s` | `abs(time[i20]-20m)+abs(time[i30]-30m)+abs(time[i40]-40m)` | s | diagnostic | −∞ … +∞ | — | -Apply each row to every declared load/tone condition. Pair each candidate -observation with its `source_` job under the identical condition. The supplied -deck defines intermediate vectors used in the expressions above. -The 1 ps endpoint alignment check aborts simulation with a nonzero exit -before invalid integrals are reported. Its residual is diagnostic; a failed -validity check produces an evaluator error and unknown score, not electrical failure. - +Each row applies to every declared load/frequency condition; pair the candidate with `source_` under matching conditions, and see the deck for intermediate vectors. Failed 1 ps endpoint-alignment checks terminate simulation with nonzero exit status before emitting invalid integrals; residuals are diagnostic only. Failure is an evaluation error with unknown score, not electrical functional rejection. ### Score weights -Clocked instrumentation amplifiers: signal fidelity 31.3%; drift and ripple 19.6%; input impedance 15.7%; common-mode behavior 15.7%; supply and clock power 7.83%; area 10%. Each objective's weight is divided equally among its metrics. +Clocked instrumentation amplifier: signal fidelity 31.3%, drift and ripple 19.6%, input impedance 15.7%, common-mode behavior 15.7%, supply and clock power 7.83%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -115,8 +92,4 @@ Solve budget: **10 hours**. Submit GDS top cell ia_002_fan_chopper_simple. Evaluation runs native DRC/LVS, geometry, Magic candidate-derived RC extraction and ngspice transient measurement using reviewed resources. Reference materials and source checkouts are not solver inputs. -Discover the frozen task, resources and submission interface through -`/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. -Declared inputs are under `/task`. Write `/workspace/output/final.gds` -and explicitly submit with `python -I /protocol/submit.py`. Creating the file -alone does not submit it. Only feedback supported by the active harness is available. +Discover the frozen task, resources and submission interface through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Declared inputs are in `/task`. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly; file generation alone is not submission. Feedback follows the capabilities provided by the current runtime protocol. diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/case.toml index 56a2696af273ddd6067943a3cfe81efdbac68f66..0060ef0c07b08ae2186801125294136a37ec678c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.ia_003_fan_chopper_pf" title = "Fan Clocked Capacitive Instrumentation Amplifier with Positive Feedback" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "832704844c6e8cf8f9834c9e41de568e61b3cc0ee7233b797cacbe9871b1425f" +sha256 = "f6bbcfe395fb6447182bfd4988b37da479c3fc6ef6809f0ec085e5c395267fe0" [[assets]] path = "reference/ia_003_fan_chopper_pf.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-clocked-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "f9eebb7e68f01c525413951c0d5aee1dfb9ed326afe723ea7ffb5df107a69708" +sha256 = "a0fc460b449dc67e10e1cb5bba5cd52ce3c8f829d7c28f83cdec25f90e6049d1" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "870cd5a0b88e0e29454c43f5d4c2e7c555b0ec9dd9f609f9c1e19f6b9258d71a" subcircuit = "ia_003_fan_chopper_pf" +sha256 = "870cd5a0b88e0e29454c43f5d4c2e7c555b0ec9dd9f609f9c1e19f6b9258d71a" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "6c5a19572e1c3fe59bcf248d6133d2f56b5357bf6bde73d64e4c6c3828791a89" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "b374ce1e2e95b4a063454e8d55e3602a7aefa88c2501950e34ee29270242fea8" +sha256 = "778f3eddd82a0829495c94a56e4a0d48adca09b2e7969829f8033cbc91242d04" [task.constraints] quality = [ @@ -462,7 +462,6 @@ direction = "maximize" aggregation = "min" dimension = "response" normalization = "ratio" -lower = 0 scale = 1e-12 category = "performance" observations = [ @@ -474,6 +473,10 @@ baseline = [ "source_condition_1:gain_vv", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The reported sinusoidal transfer magnitude is nonnegative by definition; no minimum gain target is imposed." + [[task.evaluation.metrics]] id = "phase_deg" unit = "deg" @@ -492,7 +495,6 @@ direction = "maximize" aggregation = "min" dimension = "response" normalization = "ratio" -lower = 0 scale = 1e-12 category = "performance" observations = [ @@ -504,6 +506,10 @@ baseline = [ "source_condition_1:zin_ohm", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The reported differential input-impedance magnitude is nonnegative by definition." + [[task.evaluation.metrics]] id = "admittance_real_s" unit = "S" @@ -550,9 +556,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:residual_rms_v", @@ -563,6 +568,10 @@ baseline = [ "source_condition_1:residual_rms_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The residual RMS magnitude has a nonnegative measurement domain." + [[task.evaluation.metrics]] id = "ripple_pp_v" unit = "V" @@ -620,9 +629,8 @@ unit = "V" direction = "minimize" aggregation = "max" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 -lower = 0 category = "performance" observations = [ "condition_0:window_change_v", @@ -633,6 +641,10 @@ baseline = [ "source_condition_1:window_change_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The magnitude of the adjacent-window complex transfer difference is nonnegative." + [[task.evaluation.metrics]] id = "modulation_error_rms_v" unit = "V" @@ -663,7 +675,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:power_w", @@ -674,6 +685,10 @@ baseline = [ "source_condition_1:power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered amplifier consumes net supply and bias energy over the complete observation window." + [[task.evaluation.metrics]] id = "clock_power_w" unit = "W" @@ -682,7 +697,6 @@ aggregation = "max" dimension = "supply" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:clock_power_w", @@ -693,6 +707,10 @@ baseline = [ "source_condition_1:clock_power_w", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The complementary switching ports consume nonnegative net clock energy over the complete observation window." + [[task.evaluation.metrics]] id = "pf_error_rms_v" unit = "V" @@ -716,10 +734,10 @@ observations = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "7eef7592f01c4a9f1a187b4acac52b029ba6a6f7266522075acebc1bb3d765b2" +source_report_sha256 = "1b918f556d15a6b50336a1e759c9888a22d6abb8d1a88e050104c4251f6bb411" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"fd99996a16c5446058c419fa1dd3f1eb97376800952b35092e609fbe163c25c5\", \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 4, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"2\", \"OMP_THREAD_LIMIT\": \"2\"}, \"threads\": 2, \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -760,7 +778,7 @@ boundary_error_s = "s" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "b374ce1e2e95b4a063454e8d55e3602a7aefa88c2501950e34ee29270242fea8" +deck = "778f3eddd82a0829495c94a56e4a0d48adca09b2e7969829f8033cbc91242d04" dut = "6c5a19572e1c3fe59bcf248d6133d2f56b5357bf6bde73d64e4c6c3828791a89" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.admittance_imag_s] @@ -835,6 +853,9 @@ unit = "V" value = 22663708.30942519 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +transient = "bc150f6c6a7146ac1d412aa2ad4dcd54f5fae5ac797a631a449866ea76861891" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -874,7 +895,7 @@ boundary_error_s = "s" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "b374ce1e2e95b4a063454e8d55e3602a7aefa88c2501950e34ee29270242fea8" +deck = "778f3eddd82a0829495c94a56e4a0d48adca09b2e7969829f8033cbc91242d04" dut = "6c5a19572e1c3fe59bcf248d6133d2f56b5357bf6bde73d64e4c6c3828791a89" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.admittance_imag_s] @@ -949,6 +970,9 @@ unit = "V" value = 22614926.45353059 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +transient = "b7cc8a5bc3e9fd2e2f4359bd4f1260d2223bb1b998151b27322482c271e933f9" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -961,7 +985,7 @@ unit = "ohm" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -972,7 +996,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -985,7 +1009,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -998,7 +1022,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1012,7 +1036,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1022,7 +1046,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 4 +threads = 2 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 900 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/schematic.svg index d94da0d6be79a305276d6a57aefb6c9a1292a218..257e078b8f018f1723c066d51a2d858a0d1afe3d 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/schematic.svg @@ -1,2 +1,2 @@ -ia_003_fan_chopper_pf{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ia_003_fan_chopper_pf","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/circuit.cdl","netlist_sha256":"870cd5a0b88e0e29454c43f5d4c2e7c555b0ec9dd9f609f9c1e19f6b9258d71a","project_sha256":"0eeaf4af1ae41bc6e20531d75c34101a6446df5ece64c5dea226cc9e333360cc","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["ia_003_fan_chopper_pf","XRT3_bank1","XCIN1_bank2","XCIN2_bank3","XRRB1_bank4","XRRB2_bank5"],"banks":[{"name":"XRT3_bank1","devices":23,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT16","RT18","RT20","RT23","RT25","RT27","RT29","RT31","RT33","RT34","RT36","RT38","RT40","RT42","RTSUB"]},{"name":"XCIN1_bank2","devices":4,"source_references":["CIN1_0","CIN1_1","CIN1_2","CIN1_3"]},{"name":"XCIN2_bank3","devices":4,"source_references":["CIN2_0","CIN2_1","CIN2_2","CIN2_3"]},{"name":"XRRB1_bank4","devices":40,"source_references":["RRB1_0","RRB1_1","RRB1_2","RRB1_3","RRB1_4","RRB1_5","RRB1_6","RRB1_7","RRB1_8","RRB1_9","RRB1_10","RRB1_11","RRB1_12","RRB1_13","RRB1_14","RRB1_15","RRB1_16","RRB1_17","RRB1_18","RRB1_19","RRB1_20","RRB1_21","RRB1_22","RRB1_23","RRB1_24","RRB1_25","RRB1_26","RRB1_27","RRB1_28","RRB1_29","RRB1_30","RRB1_31","RRB1_32","RRB1_33","RRB1_34","RRB1_35","RRB1_36","RRB1_37","RRB1_38","RRB1_39"]},{"name":"XRRB2_bank5","devices":40,"source_references":["RRB2_0","RRB2_1","RRB2_2","RRB2_3","RRB2_4","RRB2_5","RRB2_6","RRB2_7","RRB2_8","RRB2_9","RRB2_10","RRB2_11","RRB2_12","RRB2_13","RRB2_14","RRB2_15","RRB2_16","RRB2_17","RRB2_18","RRB2_19","RRB2_20","RRB2_21","RRB2_22","RRB2_23","RRB2_24","RRB2_25","RRB2_26","RRB2_27","RRB2_28","RRB2_29","RRB2_30","RRB2_31","RRB2_32","RRB2_33","RRB2_34","RRB2_35","RRB2_36","RRB2_37","RRB2_38","RRB2_39"]}],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":80},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ia_003_fan_chopper_pf"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/schematic/ia_003_fan_chopper_pf.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.ia_003_fan_chopper_pfvrefvsum_nsubvrefvsum_psubinch_pvsum_pvsssubinch_nvsum_nclk_chininch_nwell_2well_32vssvb1subfold_pvoutnclk_chfb_notfbch_pout1_psubvddwell_35voutnclk_chfbfbch_pwell_35voutpcasc_src_pclk_chfb_notfbch_nsubvddwell_37voutpclk_chfbfbch_nwell_37voutnclk_chpf_notpfch_psubvddwell_39vb2voutnclk_chpfpfch_pwell_39voutpclk_chpf_notpfch_nsubout1_pvddwell_41voutpclk_chpfpfch_nwell_41vssvb1well_0subsubfold_nvddwell_43vddvb4casc_src_nwell_43fold_pvddwell_44vddvb4casc_src_pwell_44vddwell_45voutpvddvb4well_45vddwell_46voutnvb2vddvb4well_46fbch_pvsum_nfbch_nvsum_pout1_nvoutpg2_pvoutng2_ninch_ppfch_pinch_npfch_nsubvsssubinch_nvsum_ninch_pvsum_pvrefvsum_nfold_nsubvrefvsum_psubvinpvinnvoutpvoutnvrefclk_chinclk_chin_notclk_chfbclk_chfb_notclk_choutclk_chout_notclk_chpfclk_chpf_notvddvoutpvssvb1vb2vb3vb4inch_pinch_nfbch_pfbch_ng2_pvssg2_nvsum_pvsum_npfch_ppfch_ng2_psubvoutnvssg2_nsubclk_choutvddg2_nout1_nsubvddwell_8clk_chout_notg2_nout1_nwell_8vb4clk_choutg2_pout1_psubvddwell_10clk_chout_notg2_pwell_0out1_pwell_10vddwell_11vsum_ptailfold_pwell_11tailvoutpclk_chfbfbch_psubvddwell_13voutpclk_chfb_notfbch_pwell_13voutnclk_chfbfbch_nvddsubvddwell_15voutnclk_chfb_notfbch_nwell_15vinnwell_1clk_chininch_nsubvddwell_17vinnclk_chin_notinch_nwell_17vinpclk_chininch_psubvddwell_19vb3vinpclk_chin_notinch_pwell_19voutpclk_chpfpfch_psubwell_1vddwell_21voutpclk_chpf_notpfch_pwell_21vddwell_22out1_nvsum_ntailfold_nwell_22voutnclk_chpfpfch_nsubcasc_src_nvddwell_24voutnclk_chpf_notpfch_nwell_24clk_chout_notg2_pout1_nsubvddvddwell_26clk_choutvddg2_pout1_nwell_26clk_chout_notg2_nout1_psubvddwell_28well_2clk_choutg2_nout1_pwell_28vinnclk_chin_notinch_psubvddwell_30vinnclk_chininch_pwell_30vb3vinpclk_chin_notinch_nsubvddwell_32vinpia_003_fan_chopper_pfEqual net labels connect. All source devices and exact parameters are retained.RT0ntap1A=4e-12 P=8e-6MM1sg13_lv_pmosw=20u l=1um=1RT1ntap1A=4e-12 P=8e-6MM10sg13_lv_pmosw=10u l=0.3um=1RT2ntap1A=4e-12 P=8e-6MM11sg13_lv_pmosw=10u l=0.3um=1MM12sg13_lv_nmosw=5u l=0.3um=1MM13sg13_lv_nmosw=5u l=0.3um=1MM14sg13_lv_nmosw=6u l=0.5um=1MM15sg13_lv_nmosw=6u l=0.5um=1MM16sg13_lv_nmosw=2u l=0.13um=1RT8ntap1A=4e-12 P=8e-6MM17sg13_lv_pmosw=2u l=0.13um=1MM18sg13_lv_nmosw=2u l=0.13um=1RT10ntap1A=4e-12 P=8e-6MM19sg13_lv_pmosw=2u l=0.13um=1RT11ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=20u l=0.5um=1MM20sg13_lv_nmosw=2u l=0.13um=1RT13ntap1A=4e-12 P=8e-6MM21sg13_lv_pmosw=2u l=0.13um=1MM22sg13_lv_nmosw=2u l=0.13um=1RT15ntap1A=4e-12 P=8e-6MM23sg13_lv_pmosw=2u l=0.13um=1MM24sg13_lv_nmosw=2u l=0.13um=1RT17ntap1A=4e-12 P=8e-6MM25sg13_lv_pmosw=2u l=0.13um=1MM26sg13_lv_nmosw=2u l=0.13um=1RT19ntap1A=4e-12 P=8e-6MM27sg13_lv_pmosw=2u l=0.13um=1MM28sg13_lv_nmosw=2u l=0.13um=1RT21ntap1A=4e-12 P=8e-6MM29sg13_lv_pmosw=2u l=0.13um=1RT22ntap1A=4e-12 P=8e-6MM3sg13_lv_pmosw=20u l=0.5um=1MM30sg13_lv_nmosw=2u l=0.13um=1RT24ntap1A=4e-12 P=8e-6MM31sg13_lv_pmosw=2u l=0.13um=1MM32sg13_lv_nmosw=2u l=0.13um=1RT26ntap1A=4e-12 P=8e-6MM33sg13_lv_pmosw=2u l=0.13um=1MM34sg13_lv_nmosw=2u l=0.13um=1RT28ntap1A=4e-12 P=8e-6MM35sg13_lv_pmosw=2u l=0.13um=1MM36sg13_lv_nmosw=2u l=0.13um=1RT30ntap1A=4e-12 P=8e-6MM37sg13_lv_pmosw=2u l=0.13um=1MM38sg13_lv_nmosw=2u l=0.13um=1RT32ntap1A=4e-12 P=8e-6MM39sg13_lv_pmosw=2u l=0.13um=1MM4sg13_lv_nmosw=4.7u l=1um=1MM40sg13_lv_nmosw=2u l=0.13um=1RT35ntap1A=4e-12 P=8e-6MM41sg13_lv_pmosw=2u l=0.13um=1MM42sg13_lv_nmosw=2u l=0.13um=1RT37ntap1A=4e-12 P=8e-6MM43sg13_lv_pmosw=2u l=0.13um=1MM44sg13_lv_nmosw=2u l=0.13um=1RT39ntap1A=4e-12 P=8e-6MM45sg13_lv_pmosw=2u l=0.13um=1MM46sg13_lv_nmosw=2u l=0.13um=1RT41ntap1A=4e-12 P=8e-6MM47sg13_lv_pmosw=2u l=0.13um=1MM5sg13_lv_nmosw=4.7u l=1um=1RT43ntap1A=4e-12 P=8e-6MM6sg13_lv_pmosw=10u l=1um=1RT44ntap1A=4e-12 P=8e-6MM7sg13_lv_pmosw=10u l=1um=1RT45ntap1A=4e-12 P=8e-6MM8sg13_lv_pmosw=6.2u l=1um=1RT46ntap1A=4e-12 P=8e-6MM9sg13_lv_pmosw=6.2u l=1um=1CFB1_0cap_cmimw=23.04u l=23.04um=1CFB2_0cap_cmimw=23.04u l=23.04um=1CM1_0cap_cmimw=25.77u l=25.77um=1CM2_0cap_cmimw=25.77u l=25.77um=1CPF1_0cap_cmimw=23.04u l=23.04um=1CPF2_0cap_cmimw=23.04u l=23.04um=1XXRT3_bank1XRT3_bank1XXCIN1_bank2XCIN1_bank2XXCIN2_bank3XCIN2_bank3XXRRB1_bank4XRRB1_bank4XXRRB2_bank5XRRB2_bank5 -Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect. +ia_003_fan_chopper_pf{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ia_003_fan_chopper_pf","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ia_003_fan_chopper_pf","XRT3_bank1","XCIN1_bank2","XCIN2_bank3","XRRB1_bank4","XRRB2_bank5"],"banks":[{"name":"XRT3_bank1","devices":23,"source_references":["RT3","RT4","RT5","RT6","RT7","RT9","RT12","RT14","RT16","RT18","RT20","RT23","RT25","RT27","RT29","RT31","RT33","RT34","RT36","RT38","RT40","RT42","RTSUB"]},{"name":"XCIN1_bank2","devices":4,"source_references":["CIN1_0","CIN1_1","CIN1_2","CIN1_3"]},{"name":"XCIN2_bank3","devices":4,"source_references":["CIN2_0","CIN2_1","CIN2_2","CIN2_3"]},{"name":"XRRB1_bank4","devices":40,"source_references":["RRB1_0","RRB1_1","RRB1_2","RRB1_3","RRB1_4","RRB1_5","RRB1_6","RRB1_7","RRB1_8","RRB1_9","RRB1_10","RRB1_11","RRB1_12","RRB1_13","RRB1_14","RRB1_15","RRB1_16","RRB1_17","RRB1_18","RRB1_19","RRB1_20","RRB1_21","RRB1_22","RRB1_23","RRB1_24","RRB1_25","RRB1_26","RRB1_27","RRB1_28","RRB1_29","RRB1_30","RRB1_31","RRB1_32","RRB1_33","RRB1_34","RRB1_35","RRB1_36","RRB1_37","RRB1_38","RRB1_39"]},{"name":"XRRB2_bank5","devices":40,"source_references":["RRB2_0","RRB2_1","RRB2_2","RRB2_3","RRB2_4","RRB2_5","RRB2_6","RRB2_7","RRB2_8","RRB2_9","RRB2_10","RRB2_11","RRB2_12","RRB2_13","RRB2_14","RRB2_15","RRB2_16","RRB2_17","RRB2_18","RRB2_19","RRB2_20","RRB2_21","RRB2_22","RRB2_23","RRB2_24","RRB2_25","RRB2_26","RRB2_27","RRB2_28","RRB2_29","RRB2_30","RRB2_31","RRB2_32","RRB2_33","RRB2_34","RRB2_35","RRB2_36","RRB2_37","RRB2_38","RRB2_39"]}],"limitations":["The editable project uses external model bindings for physical R/C/Q cards. Exported decks are for connectivity inspection, not replacement simulation decks."],"known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":80},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ia_003_fan_chopper_pf"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/design/ia_003_fan_chopper_pf.icproj.json"}}Main-sheet overview; 5 child sheets are available in the editable .icproj.json project. Equal net labels connect.ia_003_fan_chopper_pfvrefvsum_nsubvrefvsum_psubinch_pvsum_pvsssubinch_nvsum_ninch_nwell_2well_32vb1subout1_psubvddwell_35voutnfbch_pwell_35subvddwell_37voutpfbch_nwell_37subvddwell_39voutnpfch_pwell_39subvddwell_41voutppfch_nwell_41well_0subsubfold_nvddwell_43casc_src_nwell_43vddwell_44casc_src_pwell_44vddwell_45voutpvddvb4well_45vddwell_46voutnvb2vddvb4well_46fbch_pvsum_nfbch_nvsum_pvoutpg2_pvoutng2_ninch_ppfch_pinch_npfch_nsubvsssubinch_nvsum_ninch_pvsum_pvrefvsum_nsubvrefvsum_psubvinpvinnvrefvddvoutpvssvb4inch_pinch_nfbch_pfbch_nvssvsum_pvsum_npfch_ppfch_nsubvoutnsubclk_choutsubvddwell_8clk_chout_notg2_nout1_nwell_8subvddwell_10g2_pwell_0out1_pwell_10vddwell_11vsum_ptailfold_pwell_11clk_chfbsubvddwell_13voutpclk_chfb_notfbch_pwell_13vddsubvddwell_15voutnfbch_nwell_15well_1clk_chininch_nsubvddwell_17clk_chin_notwell_17subvddwell_19vb3inch_pwell_19clk_chpfsubwell_1vddwell_21voutpclk_chpf_notpfch_pwell_21vddwell_22out1_nvsum_nwell_22subvddwell_24voutnpfch_nwell_24subvddvddwell_26vddout1_nwell_26subvddwell_28well_2out1_pwell_28subvddwell_30inch_pwell_30subvddwell_32Chopper instrumentation amplifier with positive feedbackRT0A=4e-12 P=8e-6MM1w=20u l=1uRT1A=4e-12 P=8e-6MM10w=10u l=0.3uRT2A=4e-12 P=8e-6MM11w=10u l=0.3uMM12w=5u l=0.3uMM13w=5u l=0.3uMM14w=6u l=0.5uMM15w=6u l=0.5uMM16w=2u l=0.13uRT8A=4e-12 P=8e-6MM17w=2u l=0.13uMM18w=2u l=0.13uRT10A=4e-12 P=8e-6MM19w=2u l=0.13uRT11A=4e-12 P=8e-6MM2w=20u l=0.5uMM20w=2u l=0.13uRT13A=4e-12 P=8e-6MM21w=2u l=0.13uMM22w=2u l=0.13uRT15A=4e-12 P=8e-6MM23w=2u l=0.13uMM24w=2u l=0.13uRT17A=4e-12 P=8e-6MM25w=2u l=0.13uMM26w=2u l=0.13uRT19A=4e-12 P=8e-6MM27w=2u l=0.13uMM28w=2u l=0.13uRT21A=4e-12 P=8e-6MM29w=2u l=0.13uRT22A=4e-12 P=8e-6MM3w=20u l=0.5uMM30w=2u l=0.13uRT24A=4e-12 P=8e-6MM31w=2u l=0.13uMM32w=2u l=0.13uRT26A=4e-12 P=8e-6MM33w=2u l=0.13uMM34w=2u l=0.13uRT28A=4e-12 P=8e-6MM35w=2u l=0.13uMM36w=2u l=0.13uRT30A=4e-12 P=8e-6MM37w=2u l=0.13uMM38w=2u l=0.13uRT32A=4e-12 P=8e-6MM39w=2u l=0.13uMM4w=4.7u l=1uMM40w=2u l=0.13uRT35A=4e-12 P=8e-6MM41w=2u l=0.13uMM42w=2u l=0.13uRT37A=4e-12 P=8e-6MM43w=2u l=0.13uMM44w=2u l=0.13uRT39A=4e-12 P=8e-6MM45w=2u l=0.13uMM46w=2u l=0.13uRT41A=4e-12 P=8e-6MM47w=2u l=0.13uMM5w=4.7u l=1uRT43A=4e-12 P=8e-6MM6w=10u l=1uRT44A=4e-12 P=8e-6MM7w=10u l=1uRT45A=4e-12 P=8e-6MM8w=6.2u l=1uRT46A=4e-12 P=8e-6MM9w=6.2u l=1uCFB1_0w=23.04u l=23.04uCFB2_0w=23.04u l=23.04uCM1_0w=25.77u l=25.77uCM2_0w=25.77u l=25.77uCPF1_0w=23.04u l=23.04uCPF2_0w=23.04u l=23.04uXXRT3_bank1XXCIN1_bank2XXCIN2_bank3XXRRB1_bank4XXRRB2_bank5Input chopperFolded differential core and active loadsOutput chopper and differential outputFeedback chopperPositive-feedback chopperCoupling, compensation and bias networksWell and substrate contacts + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/testbench.spice index df6b55cb81ea2121847c9858d80d8dd0973565e2..42b50cb942c9a34da9ef7ec4ca57e98131072e3f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/materials/testbench.spice @@ -30,7 +30,6 @@ VCN3 clk_chpf_not 0 pulse(1.2 0 0 50n 50n 99.95u 200u) XD inp inn outp outn ref clk_chin clk_chin_not clk_chfb clk_chfb_not clk_chout clk_chout_not clk_chpf clk_chpf_not vdd 0 vb1 vb2 vb3 vb4 inch_p inch_n fbch_p fbch_n g2_p g2_n vsum_p vsum_n pfch_p pfch_n ia_003_fan_chopper_pf .control set noaskquit -set num_threads=1 set numdgt=15 save v(inp) v(inn) v(outp) v(outn) v(clk_chin) v(clk_chin_not) i(VP) i(VN) i(VDD) v(inch_p) v(inch_n) v(fbch_p) v(fbch_n) v(g2_p) v(g2_n) v(vsum_p) v(vsum_n) v(pfch_p) v(pfch_n) v(vdd) v(vb1) v(vb2) v(vb3) v(vb4) v(ref) v(freq) v(amp) i(VREF) i(VB1) i(VB2) i(VB3) i(VB4) i(VC0) i(VCN0) v(clk_chfb) v(clk_chfb_not) i(VC1) i(VCN1) v(clk_chout) v(clk_chout_not) i(VC2) i(VCN2) v(clk_chpf) v(clk_chpf_not) i(VC3) i(VCN3) tran 200n 40m 0 200n diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/problem.md index 60ead98db6cb38b1c22279d1626c0972af2a5195..6070748dc7327594d365bbb4762f8783dc7f331f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_003_fan_chopper_pf/problem.md @@ -6,10 +6,10 @@ Implement the supplied 47 MOS, 2 R, 8 C circuit. Preserve the running input, fee ## Inputs and Interface -- `problem.md`: description input. -- `materials/circuit.cdl`: netlist input. -- `materials/circuit.spice`: simulation input. -- `materials/testbench.spice`: performance input. +- `problem.md`: task description. +- `materials/circuit.cdl`: physical netlist. +- `materials/circuit.spice`: simulation circuit. +- `materials/testbench.spice`: performance tests. Ordered ports: `vinp vinn voutp voutn vref clk_chin clk_chin_not clk_chfb clk_chfb_not clk_chout clk_chout_not clk_chpf clk_chpf_not vdd vss vb1 vb2 vb3 vb4 inch_p inch_n fbch_p fbch_n g2_p g2_n vsum_p vsum_n pfch_p pfch_n`. Preserve these named connections. @@ -17,17 +17,13 @@ The CDL and simulator netlist are equivalent physical representations. Use their ## Operating Conditions -TT, 27 C, VDD=1.2 V, input common mode and vref=0.6 V; vb1/vb2/vb3/vb4=0.5/0.75/0.45/0.55 V. Each complementary clock pair runs synchronously at 5 kHz with 50 ns rise/fall, 99.95 us pulse width and 200 us period. All positive phases align. Differential sinusoidal input is 10 mV peak at 100 and 200 Hz; load is 50 fF per output. Maximum timestep is 200 ns with adaptive edge resolution. The test runs 40 ms; 0–20 ms is discarded. The 20–40 ms observation spans 100 chop cycles and two/four signal cycles. Adjacent 20–30/30–40 ms windows report transfer variation. This is a finite-window observation of the full clocked circuit, not a claim of asymptotic periodic stability. +TT, 27 C, VDD=1.2 V, input common mode and vref=0.6 V; vb1/vb2/vb3/vb4=0.5/0.75/0.45/0.55 V. Complementary clocks are synchronized at 5 kHz with 50 ns edges, 99.95 us pulse width and 200 us period; positive phases are aligned. Differential sine peak is 10 mV at 100/200 Hz, with 50 fF per output. Maximum step 200 ns adaptively resolves edges. Simulate 40 ms, discard the first 20 ms; 20–40 ms spans 100 chopping periods and 2/4 signal periods, and subwindows 20–30/30–40 ms compare transfer changes. Finite windows do not prove asymptotic periodic stability. ## Physical Requirements -Submit a nonempty GDSII of at most 10485760 bytes. -Native IHP DRC and named-interface LVS must pass without waivers. The functional bounding rectangle includes device, well, contact and complete routing layers, excluding annotations, and must fit 5000 by 1000 um. Native physical taps and all passive units are part of the contract. +Submit nonempty GDSII of at most 10485760 bytes. Pass native IHP DRC and named-interface LVS without waivers. Functional bounds include devices, wells, contacts and all routing layers, excluding annotations, and are at most 5000 × 1000 um. Retain native physical contacts and all passive cells. -Magic extracts candidate interconnect resistance/capacitance and device -junction geometry. Wells/substrate are connected to physical tap rails; source -simulation retains finite tap models. Distributed substrate, statistical -mismatch and manufacturing signoff are outside this nominal contract. +Magic extracts candidate interconnect RC and device junction geometry. Wells/substrate connect to physical-contact supply rails; source simulation retains finite contact models. The nominal contract excludes distributed substrate effects, statistical mismatch and manufacturing signoff. The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. @@ -35,36 +31,23 @@ The scored functional layer/datatype pairs are `[[1, 0], [3, 0], [5, 0], [6, 0], Use the supplied transient testbench on the extracted candidate. Time-weighted sine/cosine integrals give complex differential transfer and input admittance. Full-precision cumulative integrals at the 20/30/40 ms clock breakpoints avoid cancellation of rounded measurement averages. The summed endpoint error must not exceed 1 ps; this is measurement validity, not a circuit performance gate. Input impedance is the magnitude of differential voltage divided by differential source current, where input current is -(i(VP)-i(VN))/2. Residual RMS removes the measured DC and fundamental; full output peak-to-peak also includes signal and all ripple. It must not be represented as switching ripple alone. Input and feedback and positive-feedback modulation errors compare clock-demodulated branch voltages to the associated external signals. Raw monitor waveforms support independent checking of the switching paths. Ordinary DC/AC does not replace these measurements. -Every measurement must be finite. Magnitudes, RMS values and total consumed supply/clock power have nonnegative physical domains. No paper gain, input-impedance boost or ripple specification is a hard gate. Slow common-mode excursions and finite-window variation are reported and scored, not suppressed with a CMFB. The source uses the identical physical devices, clocks, loads and observation windows in an independent simulation. No PAC/PNoise, PSS, noise, mismatch, PVT or supply-startup capability is claimed. +All measurements must be finite; amplitudes, RMS and total supply/clock consumption power must be nonnegative. Paper gain, input-impedance enhancement and ripple specifications are not hard thresholds. Slow common-mode variation and differences between windows are reported and scored without added CMFB suppression; independent source simulation uses the same devices, clocks, loads and windows. No PAC/PNoise, PSS, noise, mismatch, PVT or power-up startup capability is claimed. Area quality is Q=73567.47 um2/functional area. The compact estimate sums MOS (W+2.4)(L+2.4), a 3.2² local tap envelope per MOS and one global tap, each MIM (side+2.4)², and forty (.5+2.4)(84.45+2.4) resistor envelopes per bias arm, then adds 50% routing allowance. It is independent of the witness. Gain and input-impedance magnitudes use source ratios; phase is diagnostic to avoid angular-wrap scoring; residual and window variation use inverse ratios with 1 uV floor; output bias uses 1.2 V target scale; power uses inverse ratios with 1 pW floor. Other observations are diagnostics. Coefficient 9 reflects interacting positive/negative signal feedback and impedance control under clock modulation; no common-mode regulation is assumed. -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observation | Unit | Quality / dimension | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`residual_rms_v`, `window_change_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality / dimension | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `functional_area` | Functional bounding-rectangle area | um2 | area quality Q | positive area | — | | `gain_vv` | `2*sqrt(dsmean^2+dcmean^2)/amplitude` | V/V | maximize / ratio / response | 0 … +∞ | 1e-12 | @@ -73,12 +56,12 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `admittance_real_s` | `-2*ismean/amplitude` | S | diagnostic | −∞ … +∞ | — | | `admittance_imag_s` | `-2*icmean/amplitude` | S | diagnostic | −∞ … +∞ | — | | `dm_mean_v` | `avg dm from=20m to=40m` | V | target / target / bias | −∞ … +∞ | 1.2 | -| `residual_rms_v` | `rms residual from=20m to=40m` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | +| `residual_rms_v` | `rms residual from=20m to=40m` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | | `ripple_pp_v` | `pp dm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `cm_mean_v` | `avg cm from=20m to=40m` | V | target / target / bias | −∞ … +∞ | 1.2 | | `cm_min_v` | `min cm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `cm_max_v` | `max cm from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | -| `window_change_v` | `2*sqrt((dsfirst-dslast)^2+(dcfirst-dclast)^2)` | V | minimize / ratio / response | 0 … +∞ | 1e-06 | +| `window_change_v` | `2*sqrt((dsfirst-dslast)^2+(dcfirst-dclast)^2)` | V | minimize / saturating_ratio / response | 0 … +∞ | 1e-06 | | `modulation_error_rms_v` | `rms modulation_error from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `feedback_error_rms_v` | `rms feedback_error from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `power_w` | `avg supplied from=20m to=40m` | W | minimize / ratio / supply | 0 … +∞ | 1e-12 | @@ -86,17 +69,11 @@ can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. | `pf_error_rms_v` | `rms pf_error from=20m to=40m` | V | diagnostic | −∞ … +∞ | — | | `boundary_error_s` | `abs(time[i20]-20m)+abs(time[i30]-30m)+abs(time[i40]-40m)` | s | diagnostic | −∞ … +∞ | — | -Apply each row to every declared load/tone condition. Pair each candidate -observation with its `source_` job under the identical condition. The supplied -deck defines intermediate vectors used in the expressions above. -The 1 ps endpoint alignment check aborts simulation with a nonzero exit -before invalid integrals are reported. Its residual is diagnostic; a failed -validity check produces an evaluator error and unknown score, not electrical failure. - +Each row applies to every declared load/frequency condition; pair the candidate with `source_` under matching conditions, and see the deck for intermediate vectors. Failed 1 ps endpoint-alignment checks terminate simulation with nonzero exit status before emitting invalid integrals; residuals are diagnostic only. Failure is an evaluation error with unknown score, not electrical functional rejection. ### Score weights -Clocked instrumentation amplifiers: signal fidelity 31.3%; drift and ripple 19.6%; input impedance 15.7%; common-mode behavior 15.7%; supply and clock power 7.83%; area 10%. Each objective's weight is divided equally among its metrics. +Clocked instrumentation amplifier: signal fidelity 31.3%, drift and ripple 19.6%, input impedance 15.7%, common-mode behavior 15.7%, supply and clock power 7.83%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | @@ -116,8 +93,4 @@ Solve budget: **10 hours**. Submit GDS top cell ia_003_fan_chopper_pf. Evaluation runs native DRC/LVS, geometry, Magic candidate-derived RC extraction and ngspice transient measurement using reviewed resources. Reference materials and source checkouts are not solver inputs. -Discover the frozen task, resources and submission interface through -`/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. -Declared inputs are under `/task`. Write `/workspace/output/final.gds` -and explicitly submit with `python -I /protocol/submit.py`. Creating the file -alone does not submit it. Only feedback supported by the active harness is available. +Discover the frozen task, resources and submission interface through `/protocol/task.json`, `/protocol/resources.json` and `/protocol/harness.json`. Declared inputs are in `/task`. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly; file generation alone is not submission. Feedback follows the capabilities provided by the current runtime protocol. diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/case.toml index 9dea47774cd3446e03f6634fa40e6df8c3a35e71..0a95eec10258e73feb3c680edf569698af47199f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.ia_006_fan_chopper_cmfb" title = "Clocked Capacitive Instrumentation Amplifier with Transistor CMFB" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "97aae229973d854761b68d388b36520c9d93484af6e01a39411b3d475efbcf7c" +sha256 = "dd1784a44dd746072be5b93a7165da1eef226a10750bddee28f2900b8e8382c3" [[assets]] path = "reference/ia_006_fan_chopper_cmfb.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-ia_006_fan_chopper_cmfb-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "df9fbcf14f7a39ad4f7ae0834d24f5170f5577bae98d9947a408bbf96cd33073" +sha256 = "15d2de9e237cc6ac08b57c5e41efcacf0bb9d62b399300df393b9435ea2f5164" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "e5049836e133e951c36c34dd5eed0fe1c2492f1671930153c97cf4ccae786f1d" subcircuit = "ia_006_fan_chopper_cmfb" +sha256 = "e5049836e133e951c36c34dd5eed0fe1c2492f1671930153c97cf4ccae786f1d" [task.inputs.performance] path = "materials/testbench.spice" @@ -46,6 +46,11 @@ path = "materials/circuit.spice" format = "spice" sha256 = "0bcfd15c384f9f2a804e139cf1b9da63ae8915d6cc857b8001cc07c85630968c" +[task.inputs.cm_disturbance] +path = "materials/cm_disturbance.spice" +format = "spice" +sha256 = "295c571a95fd08302ffdf52471f652113fe27911ae9aa39ff5b4fbe376cd9b78" + [task.constraints] quality = [ { id = "area", type = "functional_bbox_area", layers_from = "outline" }, @@ -247,25 +252,26 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 102216.79 -rationale = "Clocked instrumentation amplifiers: signal fidelity 37.9%; drift and ripple 23.7%; common-mode behavior 18.9%; supply and clock power 9.47%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 40000.0 +rationale = "The 40000 um2 footprint carries 30%. Common-mode-to-differential rejection carries 20%, clock ripple RMS 15%, gain preservation and clock power 10% each, baseline/return error 5% each and supply power 5%. The 25 uV common-mode disturbance and 8 mV ripple goals are near source behavior; clock routing has a 1 nW goal. RMS ripple is the scored ripple measure; its peak-to-peak duplicate, drift and common-mode summaries remain diagnostics. All clock pairs continue switching in the existing fixture." [task.evaluation.scoring.weights] -functional_area = 0.1 -baseline_error_v = 0.126315789472 -gain_vv = 0.126315789474 -return_error_v = 0.126315789474 -high_drift_v = 0.059210526316 -return_drift_v = 0.059210526316 -ripple_pp_v = 0.059210526316 -ripple_rms_v = 0.059210526316 -cm_max_v = 0.037894736842 -cm_mean_v = 0.037894736842 -cm_min_v = 0.037894736842 -sum_cm_v = 0.037894736842 -sum_error_v = 0.037894736842 -clock_power_w = 0.047368421053 -mean_power_w = 0.047368421053 +functional_area = 0.3 +baseline_error_v = 0.05 +gain_vv = 0.1 +return_error_v = 0.05 +high_drift_v = 0.0 +return_drift_v = 0.0 +ripple_pp_v = 0.0 +ripple_rms_v = 0.15 +cm_max_v = 0.0 +cm_mean_v = 0.0 +cm_min_v = 0.0 +sum_cm_v = 0.0 +sum_error_v = 0.0 +clock_power_w = 0.1 +mean_power_w = 0.05 +cm_to_dm_peak_v = 0.2 [[task.evaluation.jobs]] id = "artifact" @@ -534,6 +540,50 @@ clock_power_w = "W" op = "op.raw" transient = "transient.raw" +[[task.evaluation.jobs]] +id = "cm_disturbance_0" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:cm_disturbance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 1e-12 + +[task.evaluation.jobs.parameters.measurements] +cm_baseline_v = "V" +cm_to_dm_peak_v = "V" + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "cm_disturbance_1" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:cm_disturbance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +load_f = 5e-12 + +[task.evaluation.jobs.parameters.measurements] +cm_baseline_v = "V" +cm_to_dm_peak_v = "V" + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + [[task.evaluation.metrics]] id = "functional_area" category = "physical" @@ -564,7 +614,7 @@ baseline = [ "source_condition_3:gain_vv", ] normalization = "target" -scale = 1.0 +scale = 0.2 [[task.evaluation.metrics]] id = "baseline_error_v" @@ -585,9 +635,16 @@ baseline = [ "source_condition_2:baseline_error_v", "source_condition_3:baseline_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 1e-07 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 1e-06 +rationale = "Aim for at most 1 uV differential baseline error in the declared pre-step window." [[task.evaluation.metrics]] id = "return_error_v" @@ -608,9 +665,16 @@ baseline = [ "source_condition_2:return_error_v", "source_condition_3:return_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 1e-07 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 1e-06 +rationale = "Aim for at most 1 uV differential error after the input returns." [[task.evaluation.metrics]] id = "high_drift_v" @@ -631,10 +695,13 @@ baseline = [ "source_condition_2:high_drift_v", "source_condition_3:high_drift_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_drift_v" category = "performance" @@ -654,10 +721,13 @@ baseline = [ "source_condition_2:return_drift_v", "source_condition_3:return_drift_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "ripple_rms_v" category = "performance" @@ -677,9 +747,16 @@ baseline = [ "source_condition_2:ripple_rms_v", "source_condition_3:ripple_rms_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.001 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.008 +rationale = "Aim for at most 8 mV output ripple RMS over the declared integer-cycle settled window." [[task.evaluation.metrics]] id = "ripple_pp_v" @@ -700,10 +777,13 @@ baseline = [ "source_condition_2:ripple_pp_v", "source_condition_3:ripple_pp_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "cm_mean_v" category = "performance" @@ -725,8 +805,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "cm_min_v" @@ -749,8 +832,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "cm_max_v" @@ -773,8 +859,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "sum_cm_v" @@ -797,8 +886,11 @@ baseline = [ ] normalization = "target" scale = 1.2 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.2 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "sum_error_v" @@ -819,10 +911,13 @@ baseline = [ "source_condition_2:sum_error_v", "source_condition_3:sum_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" category = "performance" @@ -843,9 +938,12 @@ baseline = [ "source_condition_3:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "clock_power_w" category = "performance" @@ -866,9 +964,16 @@ baseline = [ "source_condition_3:clock_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + +[task.evaluation.metrics.quality_target] +value = 1e-09 +rationale = "Aim for at most 1 nW mean power from the declared 20 kHz clock sources, including extracted clock routing." + [[task.evaluation.metrics]] id = "dc_cm_v" category = "performance" @@ -947,11 +1052,37 @@ unit = "W" direction = "maximize" aggregation = "max" +[[task.evaluation.metrics]] +id = "cm_to_dm_peak_v" +category = "performance" +observations = [ + "cm_disturbance_0:cm_to_dm_peak_v", + "cm_disturbance_1:cm_to_dm_peak_v", +] +baseline = [ + "source_cm_disturbance_0:cm_to_dm_peak_v", + "source_cm_disturbance_1:cm_to_dm_peak_v", +] +unit = "V" +dimension = "response" +direction = "minimize" +aggregation = "max" +normalization = "saturating_ratio" +scale = 5e-06 + +[task.evaluation.metrics.requirement] +lower = 0.0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 2.5e-05 +rationale = "Aim for at most 25 uV differential output disturbance during the declared 10 mV common-mode pulse at either load." + [task.evaluation.pre_layout] -source_report_sha256 = "0dc6d5b91380e5ccfe570c62ccc7e96b3ade6b747046cab58f10c6ea58ae9dee" +source_report_sha256 = "f9c80e99432c9fa7f0f9cb756bdbdf85fcfc868a934bfa6fe06f40e96b4fd413" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"52f1bcb503b57feb49f305f7318b648c611100d7f294d4656525ac29bcdaddd7\", \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1078,6 +1209,10 @@ unit = "V" value = 6.755444e-05 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "ca1b237f86d5c0d8052759a66191a810f9e907e9f943fafba2f78f8d618a0a1d" +transient = "13aac9464072ddfd9937213d0c6d63867518fe0888caf26ba527374ae3631f42" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1203,6 +1338,10 @@ unit = "V" value = 6.755779e-05 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "ca1b237f86d5c0d8052759a66191a810f9e907e9f943fafba2f78f8d618a0a1d" +transient = "c8528ed70511b670ebb25200f86e5a6391becc275de61955f19b9dcd3b7e520e" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1328,6 +1467,10 @@ unit = "V" value = 6.719163e-05 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "ca1b237f86d5c0d8052759a66191a810f9e907e9f943fafba2f78f8d618a0a1d" +transient = "b7b1d9b39da81e1d6876e36bd1aac5ea1032a4085c9e320267d456f7280236b5" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1453,6 +1596,80 @@ unit = "V" value = 6.719459e-05 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "ca1b237f86d5c0d8052759a66191a810f9e907e9f943fafba2f78f8d618a0a1d" +transient = "8bd25fedaae0f50fa6f18bb22df3d075b633c174ec3d26a9e04362067c0083ed" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.inputs] +deck = "input:cm_disturbance" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.parameters.values] +load_f = 1e-12 + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.parameters.measurements] +cm_baseline_v = "V" +cm_to_dm_peak_v = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.input_sha256] +deck = "295c571a95fd08302ffdf52471f652113fe27911ae9aa39ff5b4fbe376cd9b78" +dut = "0bcfd15c384f9f2a804e139cf1b9da63ae8915d6cc857b8001cc07c85630968c" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.measurements.cm_baseline_v] +value = -5.085304e-08 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.measurements.cm_to_dm_peak_v] +value = 2.43718e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_0.output_sha256] +transient = "bab66a709be6a56bc60ea396118b60b682c81f31024c31c43e300a9f3f175d00" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.inputs] +deck = "input:cm_disturbance" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.parameters.values] +load_f = 5e-12 + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.parameters.measurements] +cm_baseline_v = "V" +cm_to_dm_peak_v = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.input_sha256] +deck = "295c571a95fd08302ffdf52471f652113fe27911ae9aa39ff5b4fbe376cd9b78" +dut = "0bcfd15c384f9f2a804e139cf1b9da63ae8915d6cc857b8001cc07c85630968c" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.measurements.cm_baseline_v] +value = -5.055303e-08 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.measurements.cm_to_dm_peak_v] +value = 2.369296e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_cm_disturbance_1.output_sha256] +transient = "0e9a66f4141e8e0ee6ceb5968e68fe1e8045785d99e433cba6c8e1d4b9219c33" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1465,7 +1682,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1476,7 +1693,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1489,7 +1706,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1502,7 +1719,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1516,7 +1733,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1526,7 +1743,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 900 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/cm_disturbance.spice b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/cm_disturbance.spice new file mode 100644 index 0000000000000000000000000000000000000000..3201e2ce0224b02a6aafa2f1e38a8282a99479fc --- /dev/null +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/cm_disturbance.spice @@ -0,0 +1,87 @@ +* Native clocked IA transfer, ripple and recovery. SPDX-License-Identifier: MIT +.lib /workspace/support/models/cornerMOSlv.lib mos_tt +.lib /workspace/support/models/cornerCAP.lib cap_typ +.lib /workspace/support/models/cornerRES.lib res_typ +.include parameters.spice +.include dut.spice +.temp 27 +.option klu rshunt=1e13 reltol=1e-5 abstol=1e-13 vntol=1e-8 method=gear maxord=2 +VDD vdd 0 1.2 +VIP vinp 0 dc .6 pulse(.6 .61 500u 1u 1u 500u 10m) +VIN vinn 0 dc .6 pulse(.6 .61 500u 1u 1u 500u 10m) +VR vref 0 .6 +V1 core__vb1 0 .5 +V2 core__vb2 0 .75 +V3 core__vb3 0 .45 +V4 core__vb4 0 .589 +VCMR vref_cm 0 .6 +CLP voutp 0 {load_f} +CLN voutn 0 {load_f} +Vclk_chin clk_chin 0 pulse(1.2 0 25u 50n 50n 24.95u 50u) +Vclk_chin_not clk_chin_not 0 pulse(0 1.2 25u 50n 50n 24.95u 50u) +Vclk_chfb clk_chfb 0 pulse(1.2 0 25u 50n 50n 24.95u 50u) +Vclk_chfb_not clk_chfb_not 0 pulse(0 1.2 25u 50n 50n 24.95u 50u) +Vclk_chout clk_chout 0 pulse(1.2 0 25u 50n 50n 24.95u 50u) +Vclk_chout_not clk_chout_not 0 pulse(0 1.2 25u 50n 50n 24.95u 50u) +XDUT vinp vinn voutp voutn vref clk_chin clk_chin_not clk_chfb clk_chfb_not clk_chout clk_chout_not vdd 0 core__vb1 core__vb2 core__vb3 core__vb4 vref_cm monp monn ia_006_fan_chopper_cmfb +.control +set numdgt=12 +set noaskquit +save v(voutp) v(voutn) v(vinp) v(vinn) v(monp) v(monn) i(VDD) v(clk_chin) i(Vclk_chin) v(clk_chin_not) i(Vclk_chin_not) v(clk_chfb) i(Vclk_chfb) v(clk_chfb_not) i(Vclk_chfb_not) v(clk_chout) i(Vclk_chout) v(clk_chout_not) i(Vclk_chout_not) +op +let dc_cm_v=(v(voutp)+v(voutn))/2 +let dc_dm_v=v(voutp)-v(voutn) +let dc_power_w=-1.2*i(VDD) +print dc_cm_v dc_dm_v dc_power_w +write op.raw v(voutp) v(voutn) v(monp) v(monn) i(VDD) +tran 500n 1.5m 0 500n +let dm=v(voutp)-v(voutn) +let cm=(v(voutp)+v(voutn))/2 +meas tran cm_baseline_v avg dm from=400u to=500u +let cm_diff_error=abs(dm-cm_baseline_v) +meas tran cm_to_dm_peak_v max cm_diff_error from=900u to=1m +let sum_cm=(v(monp)+v(monn))/2 +let sum_demod=(v(monp)-v(monn))*(v(clk_chin)/.6-1) +let power=-1.2*i(VDD) +meas tran baseline_v avg dm from=400u to=500u +meas tran plateau_v avg dm from=900u to=1m +meas tran return_v avg dm from=1.4m to=1.5m +meas tran command_v avg v(vinp) from=900u to=1m +let gain_vv=(plateau_v-baseline_v)/(2*(command_v-.6)) +let baseline_error_v=abs(baseline_v) +let return_error_v=abs(return_v-baseline_v) +print gain_vv baseline_error_v return_error_v +meas tran high_first avg dm from=900u to=950u +meas tran high_second avg dm from=950u to=1m +meas tran return_first avg dm from=1.4m to=1.45m +meas tran return_second avg dm from=1.45m to=1.5m +let high_drift_v=abs(high_second-high_first) +let return_drift_v=abs(return_second-return_first) +print high_drift_v return_drift_v +let ripple_sq=(dm-plateau_v)^2 +meas tran ripple_ms avg ripple_sq from=900u to=1m +meas tran ripple_max max dm from=900u to=1m +meas tran ripple_min min dm from=900u to=1m +let ripple_rms_v=sqrt(ripple_ms) +let ripple_pp_v=ripple_max-ripple_min +print ripple_rms_v ripple_pp_v +meas tran cm_mean_v avg cm from=900u to=1m +meas tran cm_min_v min cm from=400u to=1.5m +meas tran cm_max_v max cm from=400u to=1.5m +meas tran sum_cm_v avg sum_cm from=900u to=1m +meas tran sum_error_signed_v avg sum_demod from=900u to=1m +let sum_error_v=abs(sum_error_signed_v) +print sum_error_v +meas tran mean_power_w avg power from=400u to=1.5m +let supplied0=-v(clk_chin)*i(Vclk_chin) +let supplied1=-v(clk_chin_not)*i(Vclk_chin_not) +let supplied2=-v(clk_chfb)*i(Vclk_chfb) +let supplied3=-v(clk_chfb_not)*i(Vclk_chfb_not) +let supplied4=-v(clk_chout)*i(Vclk_chout) +let supplied5=-v(clk_chout_not)*i(Vclk_chout_not) +let positive_clock_power=(supplied0+abs(supplied0))/2+(supplied1+abs(supplied1))/2+(supplied2+abs(supplied2))/2+(supplied3+abs(supplied3))/2+(supplied4+abs(supplied4))/2+(supplied5+abs(supplied5))/2 +meas tran clock_power_w avg positive_clock_power from=900u to=1m +write transient.raw v(voutp) v(voutn) v(vinp) v(vinn) v(monp) v(monn) i(VDD) v(clk_chin) i(Vclk_chin) v(clk_chin_not) i(Vclk_chin_not) v(clk_chfb) i(Vclk_chfb) v(clk_chfb_not) i(Vclk_chfb_not) v(clk_chout) i(Vclk_chout) v(clk_chout_not) i(Vclk_chout_not) +quit +.endc +.end diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/schematic.svg index 79f5795b582dc4366c170904fe4acb30b2446d7a..1d76fc66d1b45bb55d0dbc631d251936f80251e0 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/schematic.svg @@ -1 +1,2 @@ -ia_006_fan_chopper_cmfb{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.ia_006_fan_chopper_cmfb", "netlist_sha256": "e5049836e133e951c36c34dd5eed0fe1c2492f1671930153c97cf4ccae786f1d", "project_sha256": "a9675999e345444059cb8b55a21ac10ad5bcb8211f8464a4ff6b6f5b386b4392", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["ia_006_fan_chopper_cmfb", "Bank1_41series_rhigh", "Bank2_41series_rhigh"], "banks": [{"name": "Bank1_41series_rhigh", "count": 41, "model": "rhigh", "kind": "series", "members": ["RRB1_0", "RRB1_1", "RRB1_2", "RRB1_3", "RRB1_4", "RRB1_5", "RRB1_6", "RRB1_7", "RRB1_8", "RRB1_9", "RRB1_10", "RRB1_11", "RRB1_12", "RRB1_13", "RRB1_14", "RRB1_15", "RRB1_16", "RRB1_17", "RRB1_18", "RRB1_19", "RRB1_20", "RRB1_21", "RRB1_22", "RRB1_23", "RRB1_24", "RRB1_25", "RRB1_26", "RRB1_27", "RRB1_28", "RRB1_29", "RRB1_30", "RRB1_31", "RRB1_32", "RRB1_33", "RRB1_34", "RRB1_35", "RRB1_36", "RRB1_37", "RRB1_38", "RRB1_39", "RRB1_40"]}, {"name": "Bank2_41series_rhigh", "count": 41, "model": "rhigh", "kind": "series", "members": ["RRB2_0", "RRB2_1", "RRB2_2", "RRB2_3", "RRB2_4", "RRB2_5", "RRB2_6", "RRB2_7", "RRB2_8", "RRB2_9", "RRB2_10", "RRB2_11", "RRB2_12", "RRB2_13", "RRB2_14", "RRB2_15", "RRB2_16", "RRB2_17", "RRB2_18", "RRB2_19", "RRB2_20", "RRB2_21", "RRB2_22", "RRB2_23", "RRB2_24", "RRB2_25", "RRB2_26", "RRB2_27", "RRB2_28", "RRB2_29", "RRB2_30", "RRB2_31", "RRB2_32", "RRB2_33", "RRB2_34", "RRB2_35", "RRB2_36", "RRB2_37", "RRB2_38", "RRB2_39", "RRB2_40"]}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 90}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}ia_006_fan_chopper_cmfbcore__vsum_nvrefsubcore__vsum_pvrefsubcore__vsum_pvrefsubsubcore__fbch_pcore__fbch_ncore__g2_pvoutpcore__g2_nvoutncore__inch_ncore__inch_pcore__vsum_ncore__vsum_pvb4ovssvoutnvoutpRMN1RMN2RMN3cmfb__cm_senseRMP1RMP2RMP3vsssubvddwellcore__inch_nclk_chin_notvinncore__inch_pvinpclk_chincore__vb4vddcore__vsum_pcore__vsum_ncore__fold_pcore__fold_ncore__vb1vsscore__tailcore__fold_ncore__fold_pcore__casc_src_ncore__vb4vddcore__casc_src_pcore__out1_ncore__vb3core__out1_pcore__vb2core__g2_nclk_chout_notcore__out1_ncore__g2_pcore__out1_pclk_choutcore__g2_pcore__g2_nvoutpvb4ovddvoutnvssvoutpclk_chfb_notcore__fbch_pvoutncore__fbch_nclk_chfbcmfb__biasvddcmfb__cm_sensevref_cmvb4ovsscmfb__ptailcmfb__mirrvddvsscmfb__biascore__vsum_nvinpvinnvoutpvoutnvrefclk_chinclk_chin_notclk_chfbclk_chfb_notclk_choutclk_chout_notvddvsscore__vb1core__vb2core__vb3core__vb4vref_cmcore__vsum_pcore__vsum_nia_006_fan_chopper_cmfbihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Input chopper — straight / crossed phaseMM25_CORE2/0.13MM27_CORE2/0.13MM33_CORE2/0.13MM35_CORE2/0.13MM24_CORE2/0.13MM26_CORE2/0.13MM32_CORE2/0.13MM34_CORE2/0.13P bulk → wellN bulk → sub02 Folded differential coreMM1_CORE10/1 ×2MM2_CORE10/0.5 ×2MM3_CORE10/0.5 ×2MM4_CORE2.35/1 ×2MM5_CORE2.35/1 ×2P bulk → wellN bulk → sub03 Cascoded active loadsMM6_CORE5/1 ×2MM7_CORE5/1 ×2MM10_CORE5/0.3 ×2MM11_CORE5/0.3 ×2MM13_CORE2.5/0.3 ×2MM12_CORE2.5/0.3 ×2P bulk → wellN bulk → sub04 Output chopperMM17_CORE2/0.13MM19_CORE2/0.13MM29_CORE2/0.13MM31_CORE2/0.13MM16_CORE2/0.13MM18_CORE2/0.13MM28_CORE2/0.13MM30_CORE2/0.13P bulk → wellN bulk → sub05 Output stagesMM8O10/1 ×2MM9O10/1 ×2MM14_CORE3/0.5 ×2MM15_CORE3/0.5 ×2P bulk → wellN bulk → sub06 Feedback chopperMM21_CORE2/0.13MM23_CORE2/0.13MM37_CORE2/0.13MM39_CORE2/0.13MM20_CORE2/0.13MM22_CORE2/0.13MM36_CORE2/0.13MM38_CORE2/0.13P bulk → wellN bulk → sub07 Common-mode error amplifierMM1_CMFB0.33/0.26MM4_CMFB1.42/0.27MM5_CMFB1.42/0.27MM6_CMFB2.32/1.31MM2_CMFB2.32/1.31P bulk → wellN bulk → sub08 Common-mode biasMM3_CMFB0.88/0.26MM7_CMFB0.29/0.22P bulk → wellN bulk → sub09 Series resistor networksXBANK1Bank1_41series_rhighXBANK2Bank2_41series_rhigh10 Compensation and signal passivesCCIN1_051.6/51.6CCIN1_151.6/51.6CCIN1_251.6/51.6CCIN1_351.6/51.6CCIN2_051.6/51.6CCIN2_151.6/51.6CCIN2_251.6/51.6CCIN2_351.6/51.6CCFB1_023.1/23.1CCFB2_023.1/23.1CCM1_051.6/51.6CCM2_051.6/51.611 Compensation and signal passivesCCCM_025.9/25.9RRMN_01/180RRMN_11/180RRMN_21/180RRMN_31/180RRMP_01/180RRMP_11/180RRMP_21/180RRMP_31/180R substrate → sub12 Substrate contacts / repeated banksRRptap1A=899 µm²RRntap1A=498 µm²Models: sg13_lv_pmos · sg13_lv_nmos · ptap1 · ntap1 · cap_cmim · rhigh \ No newline at end of file +ia_006_fan_chopper_cmfb{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ia_006_fan_chopper_cmfb","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ia_006_fan_chopper_cmfb","Bank1_41series_rhigh","Bank2_41series_rhigh"],"banks":[{"name":"Bank1_41series_rhigh","count":41,"model":"rhigh","kind":"series","members":["RRB1_0","RRB1_1","RRB1_2","RRB1_3","RRB1_4","RRB1_5","RRB1_6","RRB1_7","RRB1_8","RRB1_9","RRB1_10","RRB1_11","RRB1_12","RRB1_13","RRB1_14","RRB1_15","RRB1_16","RRB1_17","RRB1_18","RRB1_19","RRB1_20","RRB1_21","RRB1_22","RRB1_23","RRB1_24","RRB1_25","RRB1_26","RRB1_27","RRB1_28","RRB1_29","RRB1_30","RRB1_31","RRB1_32","RRB1_33","RRB1_34","RRB1_35","RRB1_36","RRB1_37","RRB1_38","RRB1_39","RRB1_40"]},{"name":"Bank2_41series_rhigh","count":41,"model":"rhigh","kind":"series","members":["RRB2_0","RRB2_1","RRB2_2","RRB2_3","RRB2_4","RRB2_5","RRB2_6","RRB2_7","RRB2_8","RRB2_9","RRB2_10","RRB2_11","RRB2_12","RRB2_13","RRB2_14","RRB2_15","RRB2_16","RRB2_17","RRB2_18","RRB2_19","RRB2_20","RRB2_21","RRB2_22","RRB2_23","RRB2_24","RRB2_25","RRB2_26","RRB2_27","RRB2_28","RRB2_29","RRB2_30","RRB2_31","RRB2_32","RRB2_33","RRB2_34","RRB2_35","RRB2_36","RRB2_37","RRB2_38","RRB2_39","RRB2_40"]}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":90},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ia_006_fan_chopper_cmfb"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/design/ia_006_fan_chopper_cmfb.icproj.json"}}Main-sheet overview; 2 child sheets are available in the editable .icproj.json project. Equal net labels connect.ia_006_fan_chopper_cmfbcore__vsum_nvrefsubcore__vsum_pvrefsubcore__vsum_psubsubcore__fbch_pcore__fbch_ncore__g2_pvoutpcore__g2_nvoutncore__inch_ncore__inch_pcore__vsum_ncore__vsum_pvb4ovssvoutnvoutpRMN1RMN2RMN3cmfb__cm_senseRMP1RMP2RMP3vsssubvddwellcore__inch_nvinncore__inch_pclk_chincore__fold_pcore__fold_ncore__tailcore__fold_ncore__fold_pcore__casc_src_ncore__vb4vddcore__casc_src_pcore__out1_ncore__out1_pcore__g2_ncore__out1_ncore__g2_pcore__out1_pclk_choutcore__g2_pcore__g2_nvb4ovddvssvoutpcore__fbch_pvoutncore__fbch_nclk_chfbcmfb__biasvddcmfb__cm_sensevb4ovsscmfb__ptailcmfb__mirrvddvsscmfb__biascore__vsum_nvinpvinnvoutpvoutnvrefclk_chinclk_chin_notclk_chfbclk_chfb_notclk_choutclk_chout_notvddvsscore__vb1core__vb2core__vb3core__vb4vref_cmcore__vsum_pcore__vsum_nia_006_fan_chopper_cmfbihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresInput chopper — straight / crossed phaseMM25_CORE2/0.13MM27_CORE2/0.13MM33_CORE2/0.13MM35_CORE2/0.13MM24_CORE2/0.13MM26_CORE2/0.13MM32_CORE2/0.13MM34_CORE2/0.13P bulk → wellN bulk → subFolded differential coreMM1_CORE10/1 ×2MM2_CORE10/0.5 ×2MM3_CORE10/0.5 ×2MM4_CORE2.35/1 ×2MM5_CORE2.35/1 ×2P bulk → wellN bulk → subCascoded active loadsMM6_CORE5/1 ×2MM7_CORE5/1 ×2MM10_CORE5/0.3 ×2MM11_CORE5/0.3 ×2MM13_CORE2.5/0.3 ×2MM12_CORE2.5/0.3 ×2P bulk → wellN bulk → subOutput chopperMM17_CORE2/0.13MM19_CORE2/0.13MM29_CORE2/0.13MM31_CORE2/0.13MM16_CORE2/0.13MM18_CORE2/0.13MM28_CORE2/0.13MM30_CORE2/0.13P bulk → wellN bulk → subOutput stagesMM8O10/1 ×2MM9O10/1 ×2MM14_CORE3/0.5 ×2MM15_CORE3/0.5 ×2P bulk → wellN bulk → subFeedback chopperMM21_CORE2/0.13MM23_CORE2/0.13MM37_CORE2/0.13MM39_CORE2/0.13MM20_CORE2/0.13MM22_CORE2/0.13MM36_CORE2/0.13MM38_CORE2/0.13P bulk → wellN bulk → subCommon-mode error amplifierMM1_CMFB0.33/0.26MM4_CMFB1.42/0.27MM5_CMFB1.42/0.27MM6_CMFB2.32/1.31MM2_CMFB2.32/1.31P bulk → wellN bulk → subCommon-mode biasMM3_CMFB0.88/0.26MM7_CMFB0.29/0.22P bulk → wellN bulk → subSeries resistor networksXBANK1Bank1_41series_rhighXBANK2Bank2_41series_rhighCompensation and signal passivesCCIN1_051.6/51.6CCIN1_151.6/51.6CCIN1_251.6/51.6CCIN1_351.6/51.6CCIN2_051.6/51.6CCIN2_151.6/51.6CCIN2_251.6/51.6CCIN2_351.6/51.6CCFB1_023.1/23.1CCFB2_023.1/23.1CCM1_051.6/51.6CCM2_051.6/51.6CMFB and resistor compensationCCCM_025.9/25.9RRMN_01/180RRMN_11/180RRMN_21/180RRMN_31/180RRMP_01/180RRMP_11/180RRMP_21/180RRMP_31/180R substrate → subSubstrate contacts / repeated banksRRptap1A=899 µm²RRntap1A=498 µm² + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/problem.md index 72df57453f3967368e2c1d75b298db67c1643588..a7fa4f4fd7093f8b8df99c89981262e54ab244d7 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ia_006_fan_chopper_cmfb/problem.md @@ -65,8 +65,7 @@ differential-feedback servo. Each output has a 1 pF or 5 pF external load. At each load, run both signs of a 10 mV differential input step: four conditions. The input common mode stays at 0.6 V. Both inputs initially equal 0.6 V. -During 500–501 us they move to `0.6+step_v/2` and `0.6-step_v/2`, hold -for 500 us, then return during 1001–1002 us. `step_v` is +0.01 or −0.01 V. +In the differential-response suite, VINP and VINN move oppositely by ±5 mV during 500–501 us, hold for 500 us, then return during 1001–1002 us. A separate common-mode rejection suite holds the differential input at zero and moves both inputs together from 0.6 V to 0.61 V over 1 us at 500 us, holds through 1001 us and returns over 1 us. It runs at both 1 pF and 5 pF loads while all three clock pairs continue switching. The additional `cm_to_dm_peak_v` measurement is the maximum absolute differential output change from its 400–500 us pre-step baseline during 900 us–1 ms. The pulse period is 10 ms; only the finite 0–1.5 ms sequence is measured. All three true/complement clock pairs run synchronously at 20 kHz between @@ -103,56 +102,35 @@ noise and manufacturing signoff are not qualified. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_target / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Joint attainment of the electrical and area goals scores 100 points; a feasible reference may score far below 100, and better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +For metrics declaring `saturating_ratio`, q = 2(b+s)/(b+x+2*s), using the quality anchor b and the positive scale s in the metric’s units. Equality to the anchor gives quality 1; improvements approach 2. Normalize each condition before selecting the worst quality. These scales and targets do not add acceptance cutoffs. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | -| `gain_vv` | Transient: `((avg (v(voutp)-v(voutn)) from=900u to=1m)-(avg (v(voutp)-v(voutn)) from=400u to=500u))/(2*((avg v(vinp) from=900u to=1m)-.6))`. | V/V | target / target | −∞ … +∞ | 1.0 | response | -| `baseline_error_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=400u to=500u))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `return_error_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=1.4m to=1.5m)-(avg (v(voutp)-v(voutn)) from=400u to=500u))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `high_drift_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=950u to=1m)-(avg (v(voutp)-v(voutn)) from=900u to=950u))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `return_drift_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=1.45m to=1.5m)-(avg (v(voutp)-v(voutn)) from=1.4m to=1.45m))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `ripple_rms_v` | Transient: `sqrt((avg (((v(voutp)-v(voutn))-(avg (v(voutp)-v(voutn)) from=900u to=1m))^2) from=900u to=1m))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `ripple_pp_v` | Transient: `(max (v(voutp)-v(voutn)) from=900u to=1m)-(min (v(voutp)-v(voutn)) from=900u to=1m)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `gain_vv` | Transient: `((avg (v(voutp)-v(voutn)) from=900u to=1m)-(avg (v(voutp)-v(voutn)) from=400u to=500u))/(2*((avg v(vinp) from=900u to=1m)-.6))`. | V/V | target / target | −∞ … +∞ | 0.2 | response | +| `baseline_error_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=400u to=500u))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-07 | response | +| `return_error_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=1.4m to=1.5m)-(avg (v(voutp)-v(voutn)) from=400u to=500u))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-07 | response | +| `high_drift_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=950u to=1m)-(avg (v(voutp)-v(voutn)) from=900u to=950u))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `return_drift_v` | Transient: `abs((avg (v(voutp)-v(voutn)) from=1.45m to=1.5m)-(avg (v(voutp)-v(voutn)) from=1.4m to=1.45m))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `ripple_rms_v` | Transient: `sqrt((avg (((v(voutp)-v(voutn))-(avg (v(voutp)-v(voutn)) from=900u to=1m))^2) from=900u to=1m))`. | V | minimize / saturating_ratio | 0 … +∞ | 0.001 | response | +| `ripple_pp_v` | Transient: `(max (v(voutp)-v(voutn)) from=900u to=1m)-(min (v(voutp)-v(voutn)) from=900u to=1m)`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `cm_mean_v` | TRAN: Mean of `((v(voutp)+v(voutn))/2) from=900u to=1m`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `cm_min_v` | TRAN: Minimum of `((v(voutp)+v(voutn))/2) from=400u to=1.5m`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `cm_max_v` | TRAN: Maximum of `((v(voutp)+v(voutn))/2) from=400u to=1.5m`. | V | target / target | 0 … 1.2 | 1.2 | bias | | `sum_cm_v` | TRAN: Mean of `((v(monp)+v(monn))/2) from=900u to=1m`. | V | target / target | 0 … 1.2 | 1.2 | bias | -| `sum_error_v` | Transient: `abs((avg ((v(monp)-v(monn))*(v(clk_chin)/.6-1)) from=900u to=1m))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `sum_error_v` | Transient: `abs((avg ((v(monp)-v(monn))*(v(clk_chin)/.6-1)) from=900u to=1m))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `cm_to_dm_peak_v` | Maximum `abs((v(voutp)-v(voutn))-baseline)` from 900 us to 1 ms after both inputs step 0.6→0.61 V; both clock polarities active; 1 pF and 5 pF output loads | V | minimize / saturating_ratio | 0 … +∞ | 5e-06 | response | | `mean_power_w` | TRAN: Mean of `(-1.2*i(VDD)) from=400u to=1.5m`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `clock_power_w` | Mean sum of positive delivered power from all six chopper clock sources over 900 us–1 ms; negative (returned) power from each source is clipped to zero before summation. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dc_cm_v` | DC operating point: `(v(voutp)+v(voutn))/2`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | @@ -162,33 +140,30 @@ source condition; a group uses its worst paired quality. | `return_v` | TRAN: Mean of `(v(voutp)-v(voutn)) from=1.4m to=1.5m`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | | `dc_power_w` | DC operating point: `-1.2*i(VDD)`. | W | diagnostic | −∞ … +∞ | — | unscored diagnostic | -Area reference: **102216.79 um2**. 166 expanded device instances; sum of device/contact envelopes 67727.1707 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. The capability coefficient remains **10**; it is independent of the reference-relative task score. +### Quality targets and weights + +The area quality target is **40000 um2**, independent of the current feasibility witness. It is not a hard area limit or a process minimum. + +The 40000 um2 footprint carries 30%. Common-mode-to-differential rejection carries 20%, clock ripple RMS 15%, gain preservation and clock power 10% each, baseline/return error 5% each and supply power 5%. The 25 uV common-mode disturbance and 8 mV ripple goals are near source behavior; clock routing has a 1 nW goal. RMS ripple is the scored ripple measure; its peak-to-peak duplicate, drift and common-mode summaries remain diagnostics. All clock pairs continue switching in the existing fixture. + +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 40000 | um2 | — | 0.3 | +| `baseline_error_v` | 1e-06 | V | 1e-07 | 0.05 | +| `gain_vv` | paired source | V/V | 0.2 | 0.1 | +| `return_error_v` | 1e-06 | V | 1e-07 | 0.05 | +| `ripple_rms_v` | 0.008 | V | 0.001 | 0.15 | +| `clock_power_w` | 1e-09 | W | 1e-12 | 0.1 | +| `mean_power_w` | paired source | W | 1e-12 | 0.05 | +| `cm_to_dm_peak_v` | 2.5e-05 | V | 5e-06 | 0.2 | + +Zero-weight paired diagnostics: `high_drift_v`, `return_drift_v`, `ripple_pp_v`, `cm_max_v`, `cm_mean_v`, `cm_min_v`, `sum_cm_v`, `sum_error_v`. All unweighted measurements and functional requirements remain checked. -### Score weights - -Clocked instrumentation amplifiers: signal fidelity 37.9%; drift and ripple 23.7%; common-mode behavior 18.9%; supply and clock power 9.47%; area 10%. Each objective's weight is divided equally among its metrics. - -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `baseline_error_v` | 0.126315789472 | -| `gain_vv` | 0.126315789474 | -| `return_error_v` | 0.126315789474 | -| `high_drift_v` | 0.059210526316 | -| `return_drift_v` | 0.059210526316 | -| `ripple_pp_v` | 0.059210526316 | -| `ripple_rms_v` | 0.059210526316 | -| `cm_max_v` | 0.037894736842 | -| `cm_mean_v` | 0.037894736842 | -| `cm_min_v` | 0.037894736842 | -| `sum_cm_v` | 0.037894736842 | -| `sum_error_v` | 0.037894736842 | -| `clock_power_w` | 0.047368421053 | -| `mean_power_w` | 0.047368421053 | +The targets above affect continuous quality only. A complete feasible reference is allowed to miss them; there is no minimum qualifying score. ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/case.toml index fe4403b558665b879987be708c8dcd9a46ead5af..fa0c0791006f8dbdcec12559119e9e0af457a1f7 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.ldo_001_analoggym_basic" title = "Multistage Error-Amplifier PMOS Regulator" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "860f3660d4f3b4539be4bb5a6049aca13c06e32b029f0a1196b3410971f34c09" +sha256 = "6acb6ca3b7332133b475e3ebdb38230c8c2607e353821bdd7e8e6c0e1c7caaee" [[assets]] path = "reference/ldo_001_analoggym_basic.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-ldo_001_analoggym_basic-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "746049248099678645eb61767da0158b9bb407a74da57666677685279397c80b" +sha256 = "e7e9535ed99e956fd8a7ab21aa05ce5187394c0e6e85fb9693497974fba55647" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "eebb188d9aa510eb1d03395ad2a4fe8b12ca6e4e16d4172dbd4d72bad3d0d79b" subcircuit = "ldo_001_analoggym_basic" +sha256 = "eebb188d9aa510eb1d03395ad2a4fe8b12ca6e4e16d4172dbd4d72bad3d0d79b" [task.inputs.performance] path = "materials/testbench.spice" @@ -894,8 +894,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -918,8 +921,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "quiescent_a" @@ -941,9 +947,12 @@ baseline = [ "source_condition_3:quiescent_a", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "power_w" category = "performance" @@ -964,9 +973,12 @@ baseline = [ "source_condition_3:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -1008,7 +1020,10 @@ baseline = [ "source_condition_3:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -1031,8 +1046,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "final_unity_hz" @@ -1054,7 +1072,10 @@ baseline = [ "source_condition_3:final_unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "final_phase_margin_deg" @@ -1077,8 +1098,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "minimum_return_distance" @@ -1101,7 +1125,10 @@ baseline = [ ] normalization = "target" scale = 1.0 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." [[task.evaluation.metrics]] id = "return_phase_excursion_deg" @@ -1123,9 +1150,12 @@ baseline = [ "source_condition_3:return_phase_excursion_deg", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "hf_gain_db" category = "performance" @@ -1168,8 +1198,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "maximum_v" @@ -1192,8 +1225,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "recovery_load_v" @@ -1214,10 +1250,13 @@ baseline = [ "source_condition_2:recovery_load_v", "source_condition_3:recovery_load_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_release_v" category = "performance" @@ -1237,10 +1276,13 @@ baseline = [ "source_condition_2:recovery_release_v", "source_condition_3:recovery_release_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" category = "performance" @@ -1261,9 +1303,12 @@ baseline = [ "source_condition_3:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "loaded_ripple_v" category = "performance" @@ -1283,10 +1328,13 @@ baseline = [ "source_condition_2:loaded_ripple_v", "source_condition_3:loaded_ripple_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "released_ripple_v" category = "performance" @@ -1306,10 +1354,13 @@ baseline = [ "source_condition_2:released_ripple_v", "source_condition_3:released_ripple_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "startup_error_v" category = "performance" @@ -1337,10 +1388,13 @@ baseline = [ "source_startup_6:startup_error_v", "source_startup_7:startup_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "startup_peak_v" category = "performance" @@ -1370,8 +1424,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "startup_minimum_v" @@ -1424,8 +1481,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "headroom_v" @@ -1448,7 +1508,10 @@ baseline = [ ] normalization = "ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [[task.evaluation.metrics]] id = "line_span_v" @@ -1469,9 +1532,12 @@ baseline = [ "source_sweeps_2:line_span_v", "source_sweeps_3:line_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [[task.evaluation.metrics]] id = "load_span_v" @@ -1492,15 +1558,18 @@ baseline = [ "source_sweeps_2:load_span_v", "source_sweeps_3:load_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [task.evaluation.pre_layout] -source_report_sha256 = "efedff6ab870d87ad594d605e505814a7979e9dc651fe2babcd9362c1d1e5a84" +source_report_sha256 = "df195fb9db62a6e2d844704fe11086b04388656f3ee1156a6606fa035a5166c1" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"b37617de396ed1efd50c9c4e47e485ab8af07651c053c745efc14db659b5562a\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1626,6 +1695,12 @@ unit = "deg" value = 401330.1 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "7a38ec1885e360e0761bed6fffcf613d659c102f86b1a614fd5d67cbb7994895" +ac = "ed962fc4125ad3de6025726e8f0003e53c7dd3fb23c0f1d3fbeb7c236d95d28f" +transient = "3a68c5d4fc8eeb7e413f29975fd074283281d347e5d9700e1377372a84f59c99" +voltage = "bce6edac0d8a71c45b9f5a8ab95eff2d1638e156b1c1c8eccb3f69b7d0c0d8fd" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1750,6 +1825,12 @@ unit = "deg" value = 401519.5 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "bdc7095af0bfb161b892a72c4fc76372c570e6c362973bb2db178bde49c832cc" +ac = "8fa36a84b86db8fa2f74d8da60eab58f090cc544320ba065ab464c16c640e11c" +transient = "fbaa0b032424ffbdee85faf8192c6ddde9fda61a838122fa4bdac91f27e25f1e" +voltage = "c7f50e1fa471ad2106f3292a4d6a99798e81db8b91be1cca44bb3a6baa9eb1aa" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1874,6 +1955,12 @@ unit = "deg" value = 405881.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "4a96150e440dcd0a79b78b5e7361d8673cde348d396baa64a167be93e791d9a8" +ac = "5118f59669423049f343c8dbe681b0a72d1dc9fad2a4322181a8c82e821c1899" +transient = "375719f297d50bb669813bcae8b23f01ac100e3a58f06dac1aba239c895ede75" +voltage = "ffa60d7dd76df78e3e278436c0c17f1ca2e8ef11fab6349f14de7a69aaf6f242" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1998,6 +2085,12 @@ unit = "deg" value = 406136.2 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "2dc8f08f850c8cd84b40764fbbd49dfb30ba7347f3441b0a196aa45f7a0f5930" +ac = "c3d5174cf03ad969d01b653eff280f64343ce15cde9f13f87e6ef7e06358480b" +transient = "fca971704ec5bcf9d9353653d2031016055cfc49910351f1c77b090387abf60b" +voltage = "e4fbd25e05e86fede227b8ee0bab6bf50cb8032e82666135f90c2b06eac77976" + [task.evaluation.pre_layout.jobs.source_startup_0] operation = "circuit.simulate" @@ -2037,6 +2130,9 @@ unit = "V" value = 0.018016 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_0.output_sha256] +transient = "c064af25fa1800bcb4a61278c10149537acf230a6e7361f6e2da2a2ba16843e5" + [task.evaluation.pre_layout.jobs.source_startup_1] operation = "circuit.simulate" @@ -2076,6 +2172,9 @@ unit = "V" value = 0.018016 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_1.output_sha256] +transient = "505231bf55052da3ec4d5c4dd5e64bf952066fea2f924bdcd4afc2136d829a5e" + [task.evaluation.pre_layout.jobs.source_startup_2] operation = "circuit.simulate" @@ -2115,6 +2214,9 @@ unit = "V" value = 0.01186432 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_2.output_sha256] +transient = "d10177dabb17d34abec3648cadbd6123c62acbd20bd05152ef8be1e66f103844" + [task.evaluation.pre_layout.jobs.source_startup_3] operation = "circuit.simulate" @@ -2154,6 +2256,9 @@ unit = "V" value = 0.01186432 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_3.output_sha256] +transient = "172815865375232e540636881c1363f72d3d55de158f802421272a295d3c7686" + [task.evaluation.pre_layout.jobs.source_startup_4] operation = "circuit.simulate" @@ -2193,6 +2298,9 @@ unit = "V" value = 0.01544172 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_4.output_sha256] +transient = "20aa11982e518fb2a84dfe8f2c398a8cf2283174cfdc90cfc5d6eb03dac3c4e7" + [task.evaluation.pre_layout.jobs.source_startup_5] operation = "circuit.simulate" @@ -2232,6 +2340,9 @@ unit = "V" value = 0.01544172 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_5.output_sha256] +transient = "7f1c5854fb0acaf429af696ac8316eea36195e6bcc101b56b7fd31ab6da81505" + [task.evaluation.pre_layout.jobs.source_startup_6] operation = "circuit.simulate" @@ -2271,6 +2382,9 @@ unit = "V" value = 0.01012422 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_6.output_sha256] +transient = "fc5bd394fc4eed7c7c1a30ef78e637a372d25addd0b36b3d52df2af8c6008de1" + [task.evaluation.pre_layout.jobs.source_startup_7] operation = "circuit.simulate" @@ -2310,6 +2424,9 @@ unit = "V" value = 0.01012422 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_7.output_sha256] +transient = "6dfb5254b0280b930e1ba857437afff541d472044a56a54b167ea36cab1178c9" + [task.evaluation.pre_layout.jobs.source_sweeps_0] operation = "circuit.simulate" @@ -2355,6 +2472,10 @@ unit = "V" value = 0.8799225 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_0.output_sha256] +line = "597809c53194839108a1209e21df1b015ef7df9cfe039b5dbb996867c35ff607" +load = "fe674612280e097cb6522f3d07ebb952e224be7fa6fdb1641453e1f91b1e18a7" + [task.evaluation.pre_layout.jobs.source_sweeps_1] operation = "circuit.simulate" @@ -2400,6 +2521,10 @@ unit = "V" value = 0.9339764 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_1.output_sha256] +line = "466c2c6190d83ddefe7a46527c509985d13ecc814f22f298964e631a28abf420" +load = "fe674612280e097cb6522f3d07ebb952e224be7fa6fdb1641453e1f91b1e18a7" + [task.evaluation.pre_layout.jobs.source_sweeps_2] operation = "circuit.simulate" @@ -2445,6 +2570,10 @@ unit = "V" value = 0.8799225 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_2.output_sha256] +line = "597809c53194839108a1209e21df1b015ef7df9cfe039b5dbb996867c35ff607" +load = "2567d259f02b81876dccb50ba8fd3202012e69a03294edc791037e75e1792c25" + [task.evaluation.pre_layout.jobs.source_sweeps_3] operation = "circuit.simulate" @@ -2490,6 +2619,10 @@ unit = "V" value = 0.9339764 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_3.output_sha256] +line = "466c2c6190d83ddefe7a46527c509985d13ecc814f22f298964e631a28abf420" +load = "2567d259f02b81876dccb50ba8fd3202012e69a03294edc791037e75e1792c25" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -2502,7 +2635,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -2513,7 +2646,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -2526,7 +2659,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2539,7 +2672,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2559,7 +2692,7 @@ label_layers = [ type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2569,7 +2702,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/schematic.svg index 0059761942ec4138f9c8a7d109c0a46442e344fc..d2100b112092dfd40d2ecc7296a1521c59bc9cde 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/schematic.svg @@ -1 +1,2 @@ -ldo_001_analoggym_basic{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.ldo_001_analoggym_basic", "netlist_sha256": "eebb188d9aa510eb1d03395ad2a4fe8b12ca6e4e16d4172dbd4d72bad3d0d79b", "project_sha256": "a52d43fcf9102f602e6b3bf48ae2322951da5be498d99f27ff8bacdce5b5017c", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["ldo_001_analoggym_basic", "Bank1_131x_ntap1", "Bank2_251x_ptap1", "Bank3_12series_rhigh"], "banks": [{"name": "Bank1_131x_ntap1", "count": 131, "model": "ntap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank2_251x_ptap1", "count": 251, "model": "ptap1", "params": {"a": "4e-12", "p": "8e-6"}}, {"name": "Bank3_12series_rhigh", "count": 12, "model": "rhigh", "kind": "series", "members": ["RR1_0", "RR1_1", "RR1_2", "RR1_3", "RR1_4", "RR1_5", "RR1_6", "RR1_7", "RR1_8", "RR1_9", "RR1_10", "RR1_11"]}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 16}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}ldo_001_analoggym_basicvddwell_vddvsssubvoutvfbsubsensevrefvddnet10net20vb3vb4vssdm_2net106voutnnet10ibvddnet12net1vssnet7voutnet1vdddm_1net28net31vssvddvb4ibvb3net20ibvddvoutvfbsubnet10vfbvssr21r22r23net106voutvddwell_vddvsssubnet20well_net20net1well_net1vddvoutvssibvrefvfbsenseldo_001_analoggym_basicihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Differential input and folded branchesMM55/2 ×3MM65/2 ×3MM810/1 ×3MM910/1 ×3MM157.5/1.5 ×8MM167.5/1.5 ×8MM197.5/1.5 ×16MM207.5/1.5 ×16MM5, MM6: B → well_vddMM8, MM9: B → well_net20N bulk → sub02 Intermediate gain stagesMM75/2 ×3MM108/0.5 ×12MM245/2 ×3MM226/2 ×120MM216/2 ×120MM7, MM24: B → well_vddMM10: B → well_net1N bulk → sub03 Output / local feedbackMM119/0.15 ×464P bulk → well_vdd04 Bias and tail-current generationMM05/2 ×3MM15/2 ×3MM25/2 ×3MM35/2 ×3MM127.5/1.5 ×8MM137.5/1.5 ×8MM147.5/1.5 ×2MM177.5/1.5 ×8MM187.5/1.5 ×8P bulk → well_vddN bulk → sub05 Bias and tail-current generationMM410/2 ×3P bulk → well_vdd06 Series resistor networksXBANK3Bank3_12series_rhigh07 Compensation and signal passivesCC0_042.7/42.7CC0_142.7/42.7CC0_242.7/42.7CCLOCAL_051.6/51.6RR2_01/17.5RR2_11/17.5RR2_21/17.5RR2_31/17.5R substrate → sub08 Substrate contacts / repeated banksRRtap_net1_0A=4 µm²RRtap_net1_1A=4 µm²RRtap_net1_2A=4 µm²RRtap_net1_3A=4 µm²RRtap_net20_0A=4 µm²RRtap_net20_1A=4 µm²RRtap_net20_2A=4 µm²XBANK1Bank1_131x_ntap1XBANK2Bank2_251x_ptap1Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · cap_cmim · rhigh \ No newline at end of file +ldo_001_analoggym_basic{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ldo_001_analoggym_basic","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ldo_001_analoggym_basic","Bank1_131x_ntap1","Bank2_251x_ptap1","Bank3_12series_rhigh"],"banks":[{"name":"Bank1_131x_ntap1","count":131,"model":"ntap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank2_251x_ptap1","count":251,"model":"ptap1","params":{"a":"4e-12","p":"8e-6"}},{"name":"Bank3_12series_rhigh","count":12,"model":"rhigh","kind":"series","members":["RR1_0","RR1_1","RR1_2","RR1_3","RR1_4","RR1_5","RR1_6","RR1_7","RR1_8","RR1_9","RR1_10","RR1_11"]}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":16},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ldo_001_analoggym_basic"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/design/ldo_001_analoggym_basic.icproj.json"}}Main-sheet overview; 3 child sheets are available in the editable .icproj.json project. Equal net labels connect.ldo_001_analoggym_basicvddwell_vddvsssubvoutvfbsubvddnet10net20vb3vb4vssdm_2net106voutnnet10ibnet12net1vssnet7net1vdddm_1net28net31vssvddvb4ibvb3net20ibvddvoutvfbsubnet10vssr21r22r23net106voutvddwell_vddvsssubnet20well_net20net1well_net1vddvoutvssibvrefvfbsenseldo_001_analoggym_basicDifferential input and folded branchesMM55/2 ×3MM65/2 ×3MM810/1 ×3MM910/1 ×3MM157.5/1.5 ×8MM167.5/1.5 ×8MM197.5/1.5 ×16MM207.5/1.5 ×16MM5, MM6: B → well_vddMM8, MM9: B → well_net20N bulk → subIntermediate gain stagesMM75/2 ×3MM108/0.5 ×12MM245/2 ×3MM226/2 ×120MM216/2 ×120MM7, MM24: B → well_vddMM10: B → well_net1N bulk → subOutput / local feedbackMM119/0.15 ×464P bulk → well_vddBias mirrors and tail sourcesMM05/2 ×3MM15/2 ×3MM25/2 ×3MM35/2 ×3MM127.5/1.5 ×8MM137.5/1.5 ×8MM147.5/1.5 ×2MM177.5/1.5 ×8MM187.5/1.5 ×8P bulk → well_vddN bulk → subBias referenceMM410/2 ×3P bulk → well_vddSeries resistor networksXBANK3Bank3_12series_rhighCompensation and signal passivesCC0_042.7/42.7CC0_142.7/42.7CC0_242.7/42.7CCLOCAL_051.6/51.6RR2_01/17.5RR2_11/17.5RR2_21/17.5RR2_31/17.5R substrate → subSubstrate contacts and repeated tapsRRtap_net1_0A=4 µm²RRtap_net1_1A=4 µm²RRtap_net1_2A=4 µm²RRtap_net1_3A=4 µm²RRtap_net20_0A=4 µm²RRtap_net20_1A=4 µm²RRtap_net20_2A=4 µm²XBANK1Bank1_131x_ntap1XBANK2Bank2_251x_ptap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/problem.md index 8404b5396b73813e057984ef96f777019bb6debc..a865d1768c30d4fdf27bda957222bf4bb980773a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_001_analoggym_basic/problem.md @@ -101,11 +101,7 @@ runnable failure probes. The maintained contract explicitly narrows the initial development stimuli without relaxing the voltage-excursion bounds. Loads below 0.2 mA are outside the qualified dynamic range. -First and final crossing phase margins must both lie in [0, 180] degrees. -Minimum return distance and return-phase excursion have only nonnegative -domain bounds; high-frequency gain has no acceptance bound. These full-sweep -metrics affect continuous quality without adding a stability acceptance screen. -Missing crossings or invalid observations are evaluator errors. +The phase margins at the first and last crossings must both lie within [0, 180] degrees. Minimum return distance and return-phase excursion need only be nonnegative; high-frequency gain has no acceptance threshold. These full-sweep metrics affect continuous quality without adding stability acceptance conditions. Missing crossings or invalid observations are evaluation errors. ## Physical Requirements @@ -125,43 +121,21 @@ resistance/noise and fabrication signoff remain unqualified. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`loaded_ripple_v`, `released_ripple_v`, `startup_error_v`, `recovery_load_v`, `recovery_release_v`, `line_span_v`, `load_span_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.3 | 1.3 | bias | | `bias_v` | DC operating point: `v(ib)`. | V | target / target | 0 … 1.3 | 1.3 | bias | @@ -177,28 +151,26 @@ source condition; a group uses its worst paired quality. | `hf_gain_db` | AC: Maximum of `(db((T))) from=200meg to=1g`. | dB | minimize / db20 | −∞ … +∞ | — | response | | `minimum_v` | TRAN: Minimum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `maximum_v` | TRAN: Maximum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | -| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -| `loaded_ripple_v` | Transient: `(max v(vout) from=9u to=9.5u)-(min v(vout) from=9u to=9.5u)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `released_ripple_v` | Transient: `(max v(vout) from=17u to=17.5u)-(min v(vout) from=17u to=17.5u)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=40u to=49u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `loaded_ripple_v` | Transient: `(max v(vout) from=9u to=9.5u)-(min v(vout) from=9u to=9.5u)`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `released_ripple_v` | Transient: `(max v(vout) from=17u to=17.5u)-(min v(vout) from=17u to=17.5u)`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=40u to=49u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `startup_peak_v` | TRAN: Maximum of `v(vout) from=0 to=50u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `startup_minimum_v` | TRAN: Minimum of `v(vout) from=0 to=50u`. | V | target / target | −∞ … +∞ | 1.3 | response | | `regulation_floor_v` | DC: Crossing coordinate where `(abs(v(vout)-0.9))=0.03 rise=1`. | V | target / target | 0 … 1.3 | 1.3 | response | | `headroom_v` | DC sweep: `(when (abs(v(vout)-0.9))=0.03 rise=1)-(find v(vout) when (abs(v(vout)-0.9))=0.03 rise=1)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | - -Area reference: **42364.42 um2**. 1240 expanded device instances; sum of device/contact envelopes 27974.3733 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. +| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | -The capability coefficient remains **9**; it is independent of -the reference-relative task score. +Area reference: **42364.42 um2**. The expanded circuit has 1240 device instances, a sum of device/contact envelopes 27974.3733 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **9**, independent of this task's reference-normalized score. ### Score weights -IHP regulators: regulation and headroom 22.5%; load recovery 22.5%; startup 13.5%; loop stability 13.5%; AC transfer and extrema 4.5%; internal bias 1.8%; quiescent current 7.2%; power 4.5%; area 10%. Each objective's weight is divided equally among its metrics. +IHP regulator: regulation and dropout 22.5%, load recovery 22.5%, startup 13.5%, loop stability 13.5%, AC transfer and extrema 4.5%, internal bias 1.8%, quiescent current 7.2%, power 4.5%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/case.toml index 9d5543b59da8f7a28847c6e7e37964f27ba49c91..c5337c634b6df2103f7a1defd8534b79be588c85 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.ldo_008_fer_mirror_ota" title = "Mirror-OTA Regulator with Bilateral Return-Ratio Measurements" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "050403a3b481c67916e5cbe065b16d3f1e4ad4b055e96e71fba09891b9b4d865" +sha256 = "21f1e53dc4cea5bfb62be1b5cbf01b4327566ffcfc4e014a2a6734f469632547" [[assets]] path = "reference/ldo_008_fer_mirror_ota.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-ldo_008_fer_mirror_ota-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "30a89147fa8d7b619eedfe8099816048e11c137b45f03fa137c7e373aaf22ef9" +sha256 = "a5c849543542998a37375cacabf63759f09475c14959d4a76c96c9ad6dafb11a" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "810d7fc0b63340bbd097f338e2a5c7fed29aaa5a51370abe30fc28b80297e1db" subcircuit = "ldo_008_fer_mirror_ota" +sha256 = "810d7fc0b63340bbd097f338e2a5c7fed29aaa5a51370abe30fc28b80297e1db" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "ff8649be565ab4994e13a01701e390f06f4c1d06532f78708daf6344cc1846af" +sha256 = "ab48ff03c75420371cfbd2ed534417b4f4c664f22e5331dee65a5ad598474157" [task.inputs.simulation] path = "materials/circuit.spice" @@ -49,17 +49,22 @@ sha256 = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.inputs.startup] path = "materials/startup.spice" format = "spice" -sha256 = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +sha256 = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" [task.inputs.sweeps] path = "materials/sweeps.spice" format = "spice" -sha256 = "d23bc4d7d5f74ba8ccb65945aca0171d0ab04c1b1a8a533a09cefe965c2c10fd" +sha256 = "edbcd5a9a41617351ff255002ab3fad040614ddd1f4d7d8710c422aaa030f663" + +[task.inputs.psrr] +path = "materials/psrr.spice" +format = "spice" +sha256 = "fafeed362ed7060883e4900e29433ba90ccf45c6a29c0b77316045803093eb70" [task.inputs.fast] path = "materials/fast.spice" format = "spice" -sha256 = "cdede5701638863728fbd3f89a87841d7cf16fa27693e2514ce413053b47bea4" +sha256 = "19a534910443f4fdebc71130c309d510c22ce80e03a17b4fccade01d9ce5465f" [task.constraints] quality = [ @@ -262,37 +267,39 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 172708.78 -rationale = "IHP regulators: regulation and headroom 22.5%; load recovery 22.5%; startup 13.5%; loop stability 13.5%; AC transfer and extrema 4.5%; internal bias 1.8%; quiescent current 7.2%; power 4.5%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 70000.0 +rationale = "The 70000 um2 footprint carries 35%. Load/release recovery carry 15%/10%; load span 10%; line span, headroom, each PSRR frequency and quiescent current carry 5% each. First and final phase-margin preservation share 5% with 10-degree scales. The 5 mV recovery, 1 mV line span, 10 mV load span and 20 mV headroom goals are explicit quality goals. Startup extrema and repeated power/loop summaries remain diagnostic; all functional startup and stability checks remain." [task.evaluation.scoring.weights] -functional_area = 0.1 -headroom_v = 0.045 -line_span_v = 0.045 -load_span_v = 0.045 -output_v = 0.045 -regulation_floor_v = 0.045 -recovery_load_v = 0.1125 -recovery_release_v = 0.1125 -startup_error_v = 0.045 -startup_minimum_v = 0.045 -startup_peak_v = 0.045 -final_phase_margin_deg = 0.03375 -minimum_return_distance = 0.03375 -phase_margin_deg = 0.03375 -return_phase_excursion_deg = 0.03375 -dc_gain_db = 0.005625 -fast_peak_v = 0.005625 -fast_tail_v = 0.005625 -final_unity_hz = 0.005625 -hf_gain_db = 0.005625 -maximum_v = 0.005625 -minimum_v = 0.005625 -unity_hz = 0.005625 -bias_v = 0.018 -quiescent_a = 0.072 -mean_power_w = 0.0225 -power_w = 0.0225 +functional_area = 0.35 +headroom_v = 0.05 +line_span_v = 0.05 +load_span_v = 0.1 +output_v = 0.0 +regulation_floor_v = 0.0 +psrr_1khz_db = 0.05 +psrr_1mhz_db = 0.05 +recovery_load_v = 0.15 +recovery_release_v = 0.1 +startup_error_v = 0.0 +startup_minimum_v = 0.0 +startup_peak_v = 0.0 +final_phase_margin_deg = 0.025 +minimum_return_distance = 0.0 +phase_margin_deg = 0.025 +return_phase_excursion_deg = 0.0 +dc_gain_db = 0.0 +fast_peak_v = 0.0 +fast_tail_v = 0.0 +final_unity_hz = 0.0 +hf_gain_db = 0.0 +maximum_v = 0.0 +minimum_v = 0.0 +unity_hz = 0.0 +bias_v = 0.0 +quiescent_a = 0.05 +mean_power_w = 0.0 +power_w = 0.0 [[task.evaluation.jobs]] id = "artifact" @@ -952,6 +959,98 @@ fast_tail_v = "V" [task.evaluation.jobs.parameters.exports] transient = "transient.raw" +[[task.evaluation.jobs]] +id = "psrr_0" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:psrr" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +supply_v = 1.2 +load_a = 0.0001 + +[task.evaluation.jobs.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.jobs.parameters.exports] +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "psrr_1" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:psrr" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +supply_v = 1.2 +load_a = 0.0005 + +[task.evaluation.jobs.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.jobs.parameters.exports] +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "psrr_2" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:psrr" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +supply_v = 1.3 +load_a = 0.0001 + +[task.evaluation.jobs.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.jobs.parameters.exports] +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "psrr_3" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:psrr" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.values] +supply_v = 1.3 +load_a = 0.0005 + +[task.evaluation.jobs.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.jobs.parameters.exports] +ac = "ac.raw" + [[task.evaluation.metrics]] id = "functional_area" category = "physical" @@ -983,8 +1082,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The unipolar regulator output and bias must stay within the declared 0 to 1.3 V operating envelope; reversed polarity or an output beyond the supplied rail is outside this circuit interface." [[task.evaluation.metrics]] id = "bias_v" @@ -1007,8 +1109,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The unipolar regulator output and bias must stay within the declared 0 to 1.3 V operating envelope; reversed polarity or an output beyond the supplied rail is outside this circuit interface." [[task.evaluation.metrics]] id = "quiescent_a" @@ -1030,9 +1135,12 @@ baseline = [ "source_condition_3:quiescent_a", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This regulator consumes supply energy while delivering the external load current. A negative net consumption would describe an energy-generating fixture rather than the required regulator." + [[task.evaluation.metrics]] id = "power_w" category = "performance" @@ -1053,9 +1161,12 @@ baseline = [ "source_condition_3:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This regulator consumes supply energy while delivering the external load current. A negative net consumption would describe an energy-generating fixture rather than the required regulator." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -1097,7 +1208,10 @@ baseline = [ "source_condition_3:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed unity crossing must be a nonnegative physical frequency within the declared AC sweep; an unavailable crossing is a measurement error." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -1119,9 +1233,12 @@ baseline = [ "source_condition_3:phase_margin_deg", ] normalization = "target" -scale = 180 +scale = 10.0 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must remain on the stable 0 to 180 degree phase-margin branch at its first and final unity crossings; a negative margin loses stable regulation." [[task.evaluation.metrics]] id = "final_unity_hz" @@ -1143,7 +1260,10 @@ baseline = [ "source_condition_3:final_unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed unity crossing must be a nonnegative physical frequency within the declared AC sweep; an unavailable crossing is a measurement error." [[task.evaluation.metrics]] id = "final_phase_margin_deg" @@ -1165,9 +1285,12 @@ baseline = [ "source_condition_3:final_phase_margin_deg", ] normalization = "target" -scale = 180 +scale = 10.0 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must remain on the stable 0 to 180 degree phase-margin branch at its first and final unity crossings; a negative margin loses stable regulation." [[task.evaluation.metrics]] id = "minimum_return_distance" @@ -1190,7 +1313,10 @@ baseline = [ ] normalization = "target" scale = 1.0 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." [[task.evaluation.metrics]] id = "return_phase_excursion_deg" @@ -1212,9 +1338,12 @@ baseline = [ "source_condition_3:return_phase_excursion_deg", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + [[task.evaluation.metrics]] id = "hf_gain_db" category = "performance" @@ -1257,8 +1386,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The unipolar regulator output and bias must stay within the declared 0 to 1.3 V operating envelope; reversed polarity or an output beyond the supplied rail is outside this circuit interface." [[task.evaluation.metrics]] id = "maximum_v" @@ -1281,8 +1413,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The unipolar regulator output and bias must stay within the declared 0 to 1.3 V operating envelope; reversed polarity or an output beyond the supplied rail is outside this circuit interface." [[task.evaluation.metrics]] id = "recovery_load_v" @@ -1303,9 +1438,16 @@ baseline = [ "source_condition_2:recovery_load_v", "source_condition_3:recovery_load_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.0005 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + +[task.evaluation.metrics.quality_target] +value = 0.005 +rationale = "Aim for at most 5 mV late-window output error after the declared load increase." [[task.evaluation.metrics]] id = "recovery_release_v" @@ -1326,9 +1468,16 @@ baseline = [ "source_condition_2:recovery_release_v", "source_condition_3:recovery_release_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.0005 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + +[task.evaluation.metrics.quality_target] +value = 0.005 +rationale = "Aim for at most 5 mV late-window output error after the declared load release." [[task.evaluation.metrics]] id = "mean_power_w" @@ -1350,9 +1499,12 @@ baseline = [ "source_condition_3:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This regulator consumes supply energy while delivering the external load current. A negative net consumption would describe an energy-generating fixture rather than the required regulator." + [[task.evaluation.metrics]] id = "startup_error_v" category = "performance" @@ -1380,10 +1532,13 @@ baseline = [ "source_startup_6:startup_error_v", "source_startup_7:startup_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + [[task.evaluation.metrics]] id = "startup_peak_v" category = "performance" @@ -1413,8 +1568,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The unipolar regulator output and bias must stay within the declared 0 to 1.3 V operating envelope; reversed polarity or an output beyond the supplied rail is outside this circuit interface." [[task.evaluation.metrics]] id = "startup_minimum_v" @@ -1467,8 +1625,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The regulation-loss crossing is a supply coordinate in the declared 0 to 1.3 V DC sweep; an out-of-range coordinate does not establish the required regulation measurement." [[task.evaluation.metrics]] id = "headroom_v" @@ -1490,8 +1651,15 @@ baseline = [ "source_sweeps_3:headroom_v", ] normalization = "ratio" -scale = 1e-06 +scale = 0.001 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The declared non-boosting regulator requires nonnegative input-to-output headroom at the regulation-loss crossing." + +[task.evaluation.metrics.quality_target] +value = 0.02 +rationale = "Aim for at most 20 mV input-to-output headroom at the declared regulation-loss crossing." [[task.evaluation.metrics]] id = "line_span_v" @@ -1512,9 +1680,16 @@ baseline = [ "source_sweeps_2:line_span_v", "source_sweeps_3:line_span_v", ] -normalization = "ratio" -scale = 1e-06 +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + +[task.evaluation.metrics.quality_target] +value = 0.001 +rationale = "Aim for at most 1 mV output span over the declared line sweep." [[task.evaluation.metrics]] id = "load_span_v" @@ -1535,9 +1710,16 @@ baseline = [ "source_sweeps_2:load_span_v", "source_sweeps_3:load_span_v", ] -normalization = "ratio" -scale = 1e-06 +normalization = "saturating_ratio" +scale = 0.001 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "This observation is a magnitude, absolute error or range. A negative value cannot represent the declared physical measurement; its positive value remains a scored quality objective without an upper performance cutoff." + +[task.evaluation.metrics.quality_target] +value = 0.01 +rationale = "Aim for at most 10 mV output span over the declared load sweep." [[task.evaluation.metrics]] id = "fast_peak_v" @@ -1560,8 +1742,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The load-pulse output deviation is an absolute magnitude. A deviation larger than the full 1.3 V operating envelope loses the unipolar regulator output interface." [[task.evaluation.metrics]] id = "fast_tail_v" @@ -1584,14 +1769,59 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The load-pulse output deviation is an absolute magnitude. A deviation larger than the full 1.3 V operating envelope loses the unipolar regulator output interface." + +[[task.evaluation.metrics]] +id = "psrr_1khz_db" +category = "performance" +observations = [ + "psrr_0:psrr_1khz_db", + "psrr_1:psrr_1khz_db", + "psrr_2:psrr_1khz_db", + "psrr_3:psrr_1khz_db", +] +unit = "dB" +dimension = "response" +direction = "maximize" +aggregation = "max" +baseline = [ + "source_psrr_0:psrr_1khz_db", + "source_psrr_1:psrr_1khz_db", + "source_psrr_2:psrr_1khz_db", + "source_psrr_3:psrr_1khz_db", +] +normalization = "db20" + +[[task.evaluation.metrics]] +id = "psrr_1mhz_db" +category = "performance" +observations = [ + "psrr_0:psrr_1mhz_db", + "psrr_1:psrr_1mhz_db", + "psrr_2:psrr_1mhz_db", + "psrr_3:psrr_1mhz_db", +] +unit = "dB" +dimension = "response" +direction = "maximize" +aggregation = "max" +baseline = [ + "source_psrr_0:psrr_1mhz_db", + "source_psrr_1:psrr_1mhz_db", + "source_psrr_2:psrr_1mhz_db", + "source_psrr_3:psrr_1mhz_db", +] +normalization = "db20" [task.evaluation.pre_layout] -source_report_sha256 = "9cf432352db73eddcdf18165316bdf78a79211cee3664e182c954ae1de926752" +source_report_sha256 = "3d5cbd2a2e180b10c1e65385a38923181a8d6aa993a33f6c3bac2e1ccde867f6" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"487f8dc33e5a6ec99b613ce2161c58731ba2b250b913db4cc446d627d40c1c57\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1636,7 +1866,7 @@ transient = "transient.raw" voltage = "voltage.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "ff8649be565ab4994e13a01701e390f06f4c1d06532f78708daf6344cc1846af" +deck = "ab48ff03c75420371cfbd2ed534417b4f4c664f22e5331dee65a5ad598474157" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -1660,7 +1890,7 @@ value = -7.633848 unit = "dB" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.maximum_v] -value = 1.021501 +value = 1.021509 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.mean_power_w] @@ -1672,7 +1902,7 @@ value = 0.8169720770945 unit = "1" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.minimum_v] -value = 0.9934197 +value = 0.993422 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.output_v] @@ -1692,11 +1922,11 @@ value = 0.0001458006371875 unit = "A" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.recovery_load_v] -value = 0.005987694 +value = 0.005987693 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.recovery_release_v] -value = 0.008601531 +value = 0.008600941 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.return_phase_excursion_deg] @@ -1707,6 +1937,12 @@ unit = "deg" value = 407773.7 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "883b6800165f683168f9eb1fda04e2ac7fbb93aa01faf10c3fc76fe3dc01937c" +ac = "6e2daa0ea2153da7724f31d020546af235ae5eb0267fcf2f48e790eaa1136d65" +transient = "481b0a30331cec8a7e4725b98873ac85c8d9dedda435c9e58282cf77d454ef11" +voltage = "e1044d71b257bb1ab06ff0830b8d045a184fa144f93b00dee8d025069292d1f3" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1750,7 +1986,7 @@ transient = "transient.raw" voltage = "voltage.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "ff8649be565ab4994e13a01701e390f06f4c1d06532f78708daf6344cc1846af" +deck = "ab48ff03c75420371cfbd2ed534417b4f4c664f22e5331dee65a5ad598474157" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -1774,7 +2010,7 @@ value = -6.918798 unit = "dB" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.maximum_v] -value = 1.025343 +value = 1.025335 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.mean_power_w] @@ -1786,7 +2022,7 @@ value = 0.8513838903873 unit = "1" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.minimum_v] -value = 0.9742929 +value = 0.9742957 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.output_v] @@ -1806,11 +2042,11 @@ value = 0.0001452353982789 unit = "A" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.recovery_load_v] -value = 0.00348968 +value = 0.003488723 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.recovery_release_v] -value = 0.002086921 +value = 0.002086824 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.return_phase_excursion_deg] @@ -1821,6 +2057,12 @@ unit = "deg" value = 432280.1 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "cdd321afc1567e7ba36e987c53873b3075b33e57bde88b9da7bab9feb5c699ec" +ac = "96aaaa680524ec10c8a08260c3588fe6e3373b0420696b9793ea54aecb3d19bd" +transient = "411a73282d2052698670ff39186516d2a97a0f262beb47137a3269f2ab3c75d4" +voltage = "6a485e682aba2adb4dd40e3226cf8522fd49c5322ea9c209507aa9b151113dd4" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1864,7 +2106,7 @@ transient = "transient.raw" voltage = "voltage.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "ff8649be565ab4994e13a01701e390f06f4c1d06532f78708daf6344cc1846af" +deck = "ab48ff03c75420371cfbd2ed534417b4f4c664f22e5331dee65a5ad598474157" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -1888,7 +2130,7 @@ value = -7.258347 unit = "dB" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.maximum_v] -value = 1.020852 +value = 1.020847 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.mean_power_w] @@ -1900,7 +2142,7 @@ value = 0.8119621801706 unit = "1" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.minimum_v] -value = 0.9932559 +value = 0.9932588 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.output_v] @@ -1920,11 +2162,11 @@ value = 0.0001460221513392 unit = "A" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.recovery_load_v] -value = 0.0057142 +value = 0.005714199 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.recovery_release_v] -value = 0.008046233 +value = 0.008045338 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.return_phase_excursion_deg] @@ -1935,6 +2177,12 @@ unit = "deg" value = 425591.2 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "32d5cad84e7d1a993a1187390275807150c3dfe218721a28fb782c0f0c7fe3de" +ac = "614e9a5b55ad9469ba0be1652997cc050cfeb2d32aa1f5cd2ae13c405cbaa189" +transient = "986f60c2a88aec493eefcca6a63bdb90c75c08c8308743531a45554871732b08" +voltage = "8b16721a3891c65745b49c7d20bc28069ac8cfe86c39939fcd24cd47bcfa6ae2" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1978,7 +2226,7 @@ transient = "transient.raw" voltage = "voltage.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "ff8649be565ab4994e13a01701e390f06f4c1d06532f78708daf6344cc1846af" +deck = "ab48ff03c75420371cfbd2ed534417b4f4c664f22e5331dee65a5ad598474157" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.bias_v] @@ -2002,7 +2250,7 @@ value = -6.412583 unit = "dB" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.maximum_v] -value = 1.025424 +value = 1.025401 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.mean_power_w] @@ -2014,7 +2262,7 @@ value = 0.8443338833206 unit = "1" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.minimum_v] -value = 0.9752354 +value = 0.9752386 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.output_v] @@ -2034,11 +2282,11 @@ value = 0.000145524468531 unit = "A" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.recovery_load_v] -value = 0.002639145 +value = 0.002638453 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.recovery_release_v] -value = 0.002294566 +value = 0.002293677 unit = "V" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.return_phase_excursion_deg] @@ -2049,6 +2297,12 @@ unit = "deg" value = 458663.1 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "cb55b7809055dce14bbe887adb011bb5531e96b2c95b472870bde73c5b164f97" +ac = "0fdd76c6924d035b7aca82c9348905bd28d9b7954a8bb22c989901844e052912" +transient = "bf95c2675e1fe0062a472cf9dba7642dbbc507f11f98506949c8a9c88e10d14c" +voltage = "426d627dd5ddc3e04b636de57ba70d11580f30b0b118daccfa0871b1b6974e1c" + [task.evaluation.pre_layout.jobs.source_startup_0] operation = "circuit.simulate" @@ -2073,7 +2327,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_0.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_0.measurements.minimum_v] @@ -2085,9 +2339,12 @@ value = 0.9970235 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_0.measurements.startup_error_v] -value = 0.002976453 +value = 0.002976454 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_0.output_sha256] +transient = "26edde3695068bf24da0435a6b796bf195f1823fffa57da18197af9cf9fedddd" + [task.evaluation.pre_layout.jobs.source_startup_1] operation = "circuit.simulate" @@ -2112,7 +2369,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_1.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_1.measurements.minimum_v] @@ -2120,13 +2377,16 @@ value = 2.09718e-06 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_1.measurements.peak_v] -value = 0.9989293 +value = 0.9989295 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_1.measurements.startup_error_v] -value = 0.002976453 +value = 0.002976454 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_1.output_sha256] +transient = "0a30096d86508d3a579998a8dc6765253b53af2658c55c53649316c61cf2ce50" + [task.evaluation.pre_layout.jobs.source_startup_2] operation = "circuit.simulate" @@ -2151,7 +2411,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_2.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_2.measurements.minimum_v] @@ -2163,9 +2423,12 @@ value = 1.008335 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_2.measurements.startup_error_v] -value = 0.00833532 +value = 0.008335319 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_2.output_sha256] +transient = "8a0f4628d548a8ef72680f92d9edc55a921590787ae6329edefd4a5a3e23aaf6" + [task.evaluation.pre_layout.jobs.source_startup_3] operation = "circuit.simulate" @@ -2190,7 +2453,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_3.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_3.measurements.minimum_v] @@ -2202,9 +2465,12 @@ value = 1.013778 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_3.measurements.startup_error_v] -value = 0.008335321 +value = 0.008335319 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_3.output_sha256] +transient = "db03ce7d2a38cb5bd169a85655e44568cd89695c2185fa0a1629816a80d8d9e7" + [task.evaluation.pre_layout.jobs.source_startup_4] operation = "circuit.simulate" @@ -2229,7 +2495,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_4.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_4.measurements.minimum_v] @@ -2241,9 +2507,12 @@ value = 0.9978271 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_4.measurements.startup_error_v] -value = 0.00217294 +value = 0.002172942 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_4.output_sha256] +transient = "3a763aab2fc96be80c9f34b7a1150f0cdcb21bcbf0166a0c2da32a31ed949fb0" + [task.evaluation.pre_layout.jobs.source_startup_5] operation = "circuit.simulate" @@ -2268,7 +2537,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_5.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_5.measurements.minimum_v] @@ -2280,9 +2549,12 @@ value = 1.005959 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_5.measurements.startup_error_v] -value = 0.00217294 +value = 0.002172942 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_5.output_sha256] +transient = "8a2998505eda01e916842770f2f4482c5ffc03e67f193cc956cb0394d82883e5" + [task.evaluation.pre_layout.jobs.source_startup_6] operation = "circuit.simulate" @@ -2307,7 +2579,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_6.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_6.measurements.minimum_v] @@ -2319,9 +2591,12 @@ value = 1.007799 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_6.measurements.startup_error_v] -value = 0.007799198 +value = 0.007799196 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_6.output_sha256] +transient = "5fb48eb062a4c59688aa09a8190e6b0101709badacf7854dc797947fd36da832" + [task.evaluation.pre_layout.jobs.source_startup_7] operation = "circuit.simulate" @@ -2346,7 +2621,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_7.input_sha256] -deck = "7018c105aee39d53f5de7123c1607d2cbaa7b9e498693cba9dc4373fdb99e4e3" +deck = "c45b11e62e4f587496f0b280fd9b7b623371a021bef6bb2f6eb4f795127f129a" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_startup_7.measurements.minimum_v] @@ -2354,13 +2629,16 @@ value = 2.438187e-06 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_7.measurements.peak_v] -value = 1.018812 +value = 1.018813 unit = "V" [task.evaluation.pre_layout.jobs.source_startup_7.measurements.startup_error_v] -value = 0.007799198 +value = 0.007799196 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_7.output_sha256] +transient = "6dea59b9653a3b809977fe777e2a678a1204b3ae1906fe7a1c639620a3843439" + [task.evaluation.pre_layout.jobs.source_sweeps_0] operation = "circuit.simulate" @@ -2387,7 +2665,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_0.input_sha256] -deck = "d23bc4d7d5f74ba8ccb65945aca0171d0ab04c1b1a8a533a09cefe965c2c10fd" +deck = "edbcd5a9a41617351ff255002ab3fad040614ddd1f4d7d8710c422aaa030f663" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_sweeps_0.measurements.headroom_v] @@ -2406,6 +2684,10 @@ unit = "V" value = 0.9730788 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_0.output_sha256] +line = "d736cfca1ffdd9d4d3acee436ffb815652b018daafc7f1b6b8faa94e23a61953" +load = "79727399797c0a349c23df5f8dc9cacc89bded983326b7a843644c157d9a74fc" + [task.evaluation.pre_layout.jobs.source_sweeps_1] operation = "circuit.simulate" @@ -2432,7 +2714,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_1.input_sha256] -deck = "d23bc4d7d5f74ba8ccb65945aca0171d0ab04c1b1a8a533a09cefe965c2c10fd" +deck = "edbcd5a9a41617351ff255002ab3fad040614ddd1f4d7d8710c422aaa030f663" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_sweeps_1.measurements.headroom_v] @@ -2451,6 +2733,10 @@ unit = "V" value = 0.9917698 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_1.output_sha256] +line = "3d9132755cc2e7a13ece399d0b3e99fc8444b8d3eff03f17feac22c6d3c6e8ea" +load = "79727399797c0a349c23df5f8dc9cacc89bded983326b7a843644c157d9a74fc" + [task.evaluation.pre_layout.jobs.source_sweeps_2] operation = "circuit.simulate" @@ -2477,7 +2763,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_2.input_sha256] -deck = "d23bc4d7d5f74ba8ccb65945aca0171d0ab04c1b1a8a533a09cefe965c2c10fd" +deck = "edbcd5a9a41617351ff255002ab3fad040614ddd1f4d7d8710c422aaa030f663" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_sweeps_2.measurements.headroom_v] @@ -2496,6 +2782,10 @@ unit = "V" value = 0.9730788 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_2.output_sha256] +line = "d736cfca1ffdd9d4d3acee436ffb815652b018daafc7f1b6b8faa94e23a61953" +load = "aba280ec1a4c9e8a83688f47230d66e5455d6f010844bdc863c456e40ea5c8de" + [task.evaluation.pre_layout.jobs.source_sweeps_3] operation = "circuit.simulate" @@ -2522,7 +2812,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_3.input_sha256] -deck = "d23bc4d7d5f74ba8ccb65945aca0171d0ab04c1b1a8a533a09cefe965c2c10fd" +deck = "edbcd5a9a41617351ff255002ab3fad040614ddd1f4d7d8710c422aaa030f663" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_sweeps_3.measurements.headroom_v] @@ -2541,6 +2831,10 @@ unit = "V" value = 0.9917698 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_3.output_sha256] +line = "3d9132755cc2e7a13ece399d0b3e99fc8444b8d3eff03f17feac22c6d3c6e8ea" +load = "aba280ec1a4c9e8a83688f47230d66e5455d6f010844bdc863c456e40ea5c8de" + [task.evaluation.pre_layout.jobs.source_fast_0] operation = "circuit.simulate" @@ -2563,17 +2857,20 @@ fast_tail_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_fast_0.input_sha256] -deck = "cdede5701638863728fbd3f89a87841d7cf16fa27693e2514ce413053b47bea4" +deck = "19a534910443f4fdebc71130c309d510c22ce80e03a17b4fccade01d9ce5465f" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_fast_0.measurements.fast_peak_v] -value = 0.0004886535 +value = 0.0004890927 unit = "V" [task.evaluation.pre_layout.jobs.source_fast_0.measurements.fast_tail_v] -value = 1.780422e-07 +value = 1.781841e-07 unit = "V" +[task.evaluation.pre_layout.jobs.source_fast_0.output_sha256] +transient = "87f9835bfffddf70e641bb0ddabcb3ab8c967a5014935295387e0e379c33f19b" + [task.evaluation.pre_layout.jobs.source_fast_1] operation = "circuit.simulate" @@ -2596,17 +2893,20 @@ fast_tail_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_fast_1.input_sha256] -deck = "cdede5701638863728fbd3f89a87841d7cf16fa27693e2514ce413053b47bea4" +deck = "19a534910443f4fdebc71130c309d510c22ce80e03a17b4fccade01d9ce5465f" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_fast_1.measurements.fast_peak_v] -value = 0.0002317423 +value = 0.0002322362 unit = "V" [task.evaluation.pre_layout.jobs.source_fast_1.measurements.fast_tail_v] -value = 6.278331e-08 +value = 6.300412e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_fast_1.output_sha256] +transient = "6802beace471d9cd3ee4b4a8091636fb1f1d6113e2b3fa1da2b0f28f202a401b" + [task.evaluation.pre_layout.jobs.source_fast_2] operation = "circuit.simulate" @@ -2629,17 +2929,20 @@ fast_tail_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_fast_2.input_sha256] -deck = "cdede5701638863728fbd3f89a87841d7cf16fa27693e2514ce413053b47bea4" +deck = "19a534910443f4fdebc71130c309d510c22ce80e03a17b4fccade01d9ce5465f" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_fast_2.measurements.fast_peak_v] -value = 0.0004908346 +value = 0.0004913073 unit = "V" [task.evaluation.pre_layout.jobs.source_fast_2.measurements.fast_tail_v] -value = 1.788685e-07 +value = 1.790332e-07 unit = "V" +[task.evaluation.pre_layout.jobs.source_fast_2.output_sha256] +transient = "10cd44b7aa0eb287d934564b954688406e97e30f75ac5bfa3a77be6264aff37b" + [task.evaluation.pre_layout.jobs.source_fast_3] operation = "circuit.simulate" @@ -2662,17 +2965,164 @@ fast_tail_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_fast_3.input_sha256] -deck = "cdede5701638863728fbd3f89a87841d7cf16fa27693e2514ce413053b47bea4" +deck = "19a534910443f4fdebc71130c309d510c22ce80e03a17b4fccade01d9ce5465f" dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" [task.evaluation.pre_layout.jobs.source_fast_3.measurements.fast_peak_v] -value = 0.0002368121 +value = 0.0002373362 unit = "V" [task.evaluation.pre_layout.jobs.source_fast_3.measurements.fast_tail_v] -value = 6.331704e-08 +value = 6.359565e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_fast_3.output_sha256] +transient = "4620258cc4b81838ddcce796a08c42f03ccd6cd5a71115e7f6102f3f976885a3" + +[task.evaluation.pre_layout.jobs.source_psrr_0] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_psrr_0.inputs] +deck = "input:psrr" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_psrr_0.outputs] +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_psrr_0.parameters.values] +supply_v = 1.2 +load_a = 0.0001 + +[task.evaluation.pre_layout.jobs.source_psrr_0.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_0.parameters.exports] +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_psrr_0.input_sha256] +deck = "fafeed362ed7060883e4900e29433ba90ccf45c6a29c0b77316045803093eb70" +dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" + +[task.evaluation.pre_layout.jobs.source_psrr_0.measurements.psrr_1khz_db] +value = 44.49375 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_0.measurements.psrr_1mhz_db] +value = 4.364907 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_0.output_sha256] +ac = "da00b142e636e7f48d89bbd50015e5f314b2b3a46faa534c076fb3ff90f9e22e" + +[task.evaluation.pre_layout.jobs.source_psrr_1] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_psrr_1.inputs] +deck = "input:psrr" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_psrr_1.outputs] +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_psrr_1.parameters.values] +supply_v = 1.2 +load_a = 0.0005 + +[task.evaluation.pre_layout.jobs.source_psrr_1.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_1.parameters.exports] +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_psrr_1.input_sha256] +deck = "fafeed362ed7060883e4900e29433ba90ccf45c6a29c0b77316045803093eb70" +dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" + +[task.evaluation.pre_layout.jobs.source_psrr_1.measurements.psrr_1khz_db] +value = 46.28391 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_1.measurements.psrr_1mhz_db] +value = 4.544944 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_1.output_sha256] +ac = "7ed971a685172dcda831aacef77214d1fe1d7f849e34b1464d7b922862a132ef" + +[task.evaluation.pre_layout.jobs.source_psrr_2] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_psrr_2.inputs] +deck = "input:psrr" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_psrr_2.outputs] +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_psrr_2.parameters.values] +supply_v = 1.3 +load_a = 0.0001 + +[task.evaluation.pre_layout.jobs.source_psrr_2.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_2.parameters.exports] +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_psrr_2.input_sha256] +deck = "fafeed362ed7060883e4900e29433ba90ccf45c6a29c0b77316045803093eb70" +dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" + +[task.evaluation.pre_layout.jobs.source_psrr_2.measurements.psrr_1khz_db] +value = 44.27602 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_2.measurements.psrr_1mhz_db] +value = 4.460468 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_2.output_sha256] +ac = "30393ea58892a94d50dcc777fa5183c35031136db050318583e5c76b78bb9e12" + +[task.evaluation.pre_layout.jobs.source_psrr_3] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_psrr_3.inputs] +deck = "input:psrr" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_psrr_3.outputs] +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_psrr_3.parameters.values] +supply_v = 1.3 +load_a = 0.0005 + +[task.evaluation.pre_layout.jobs.source_psrr_3.parameters.measurements] +psrr_1khz_db = "dB" +psrr_1mhz_db = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_3.parameters.exports] +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_psrr_3.input_sha256] +deck = "fafeed362ed7060883e4900e29433ba90ccf45c6a29c0b77316045803093eb70" +dut = "67f9c975c8755cd714b85ac3975e2951cb731addcfd3caf8baa3640235afeb99" + +[task.evaluation.pre_layout.jobs.source_psrr_3.measurements.psrr_1khz_db] +value = 49.72726 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_3.measurements.psrr_1mhz_db] +value = 4.671067 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_psrr_3.output_sha256] +ac = "b3e9b08650406c87e941f713d806da2aebc0026ea142fc4988082ba7791e8fa4" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -2685,7 +3135,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -2696,7 +3146,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -2709,7 +3159,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2722,7 +3172,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2736,7 +3186,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2746,7 +3196,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/fast.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/fast.spice index d79f030816c20e1a2751565a19c4ee83670d1bd4..0e48dd7be08f5a6c2675e0e3d6c49df9b8882420 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/fast.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/fast.spice @@ -13,11 +13,12 @@ VPROBE sense fb dc 0 ac 1 IINJ 0 sense dc 0 ac 0 ILOAD vout 0 dc {load_a} pulse({load_a} {load_a+1u} 1n 5p 5p 1n 200n) XDUT vdd vout 0 nbias vref fb sense ldo_008_fer_mirror_ota +.save v(vout) v(vdd) i(VDD) .control set numdgt=12 op let baseline_v=v(vout) -tran 5p 100n 0 5p +tran 5p 100n 0 25p let error_v=abs(v(vout)-op1.baseline_v) meas tran fast_peak_v max error_v from=0 to=100n meas tran fast_tail_v max error_v from=80n to=100n diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/psrr.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/psrr.spice new file mode 100644 index 0000000000000000000000000000000000000000..831ecfa18a7b7e475d2af052b400abb39980403a --- /dev/null +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/psrr.spice @@ -0,0 +1,27 @@ +* Closed-loop small-signal supply rejection. SPDX-License-Identifier: MIT +.lib /workspace/support/models/cornerMOSlv.lib mos_tt +.lib /workspace/support/models/cornerCAP.lib cap_typ +.lib /workspace/support/models/cornerRES.lib res_typ +.include parameters.spice +.include dut.spice +.temp 27 +.option rshunt=1e12 reltol=1e-5 abstol=1e-14 vntol=1e-8 +VDD vdd 0 dc {supply_v} ac 1 +VREF vref 0 0.5 +IBIAS vdd nbias 20u +VPROBE sense fb dc 0 ac 0 +IINJ 0 sense dc 0 ac 0 +ILOAD vout 0 dc {load_a} +XDUT vdd vout 0 nbias vref fb sense ldo_008_fer_mirror_ota +.save v(vout) v(vdd) +.control +set numdgt=12 +op +ac dec 300 10 10meg +let psrr_db=db(v(vdd)/v(vout)) +meas ac psrr_1khz_db find psrr_db at=1k +meas ac psrr_1mhz_db find psrr_db at=1meg +write ac.raw frequency v(vdd) v(vout) psrr_db +quit +.endc +.end diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/schematic.svg index fcd8999fec0b97e50f6279e9d8d21b378be4669e..ed1756df3551ce78dc52b244662a31b88de03b7a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/schematic.svg @@ -1 +1,2 @@ -ldo_008_fer_mirror_ota{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.ldo_008_fer_mirror_ota", "netlist_sha256": "810d7fc0b63340bbd097f338e2a5c7fed29aaa5a51370abe30fc28b80297e1db", "project_sha256": "58a5056d43499d5b933cb986212661a22df039ea0b1ec5c9701f00a75b780c8e", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["ldo_008_fer_mirror_ota", "Bank1_40x_cap_cmim"], "banks": [{"name": "Bank1_40x_cap_cmim", "count": 40, "model": "cap_cmim", "params": {"w": "51.64u", "l": "51.64u", "m": "1"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 3}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}ldo_008_fer_mirror_otaczerovoutvssnbiasegatevddvssvoutfbegatevoutczeroczerovddwell_vddvsssubsensevrefnbiasvssvddegatetailldiodevddvoutvssnbiasvreffbsenseldo_008_fer_mirror_otaihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Error amplifierMMLD8/0.5 ×4MMLM8/0.5 ×4MMDF6/0.3 ×4MMDR6/0.3 ×4MMNT8/0.5 ×4P bulk → well_vddN bulk → sub02 Bias referenceMMNB8/0.5N bulk → sub03 Pass device and dividerMMP8/0.2 ×60RRT_01/6.24RRB_01/6.24P bulk → well_vddR substrate → sub04 CompensationRRC_01/1.32XBANK1Bank1_40x_cap_cmimR substrate → sub05 Substrate contacts / repeated banksRRtap_vddA=730 µm²RRptapA=942 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · rhigh \ No newline at end of file +ldo_008_fer_mirror_ota{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ldo_008_fer_mirror_ota","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ldo_008_fer_mirror_ota","Bank1_40x_cap_cmim"],"banks":[{"name":"Bank1_40x_cap_cmim","count":40,"model":"cap_cmim","params":{"w":"51.64u","l":"51.64u","m":"1"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":3},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ldo_008_fer_mirror_ota"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/design/ldo_008_fer_mirror_ota.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.ldo_008_fer_mirror_otaczerovoutvssnbiasegatevddvssvoutfbegatevoutczeroczerovddwell_vddvsssubsensevrefnbiasvssvddegatetailldiodevddvoutvssnbiasvreffbsenseldo_008_fer_mirror_otaihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresError amplifierMMLD8/0.5 ×4MMLM8/0.5 ×4MMDF6/0.3 ×4MMDR6/0.3 ×4MMNT8/0.5 ×4P bulk → well_vddN bulk → subBias referenceMMNB8/0.5N bulk → subPass device and dividerMMP8/0.2 ×60RRT_01/6.24RRB_01/6.24P bulk → well_vddR substrate → subCompensationRRC_01/1.32XBANK1Bank1_40x_cap_cmimR substrate → subBulk ties and device bankRRtap_vddA=730 µm²RRptapA=942 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · rhigh + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/startup.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/startup.spice index 81a0b8d8b8f8e0f8e9a07d7cd8fcb0b56451321e..eee8077c5cc3549f1da4dcbd53a74208500f10d6 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/startup.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/startup.spice @@ -12,9 +12,10 @@ IBIAS vdd nbias pwl(0 0 {ramp_s} 20u) RLOAD vout 0 {load_ohm} VPROBE sense fb 0 XDUT vdd vout 0 nbias vref fb sense ldo_008_fer_mirror_ota +.save v(vout) v(vdd) v(vref) i(VDD) i(VREF) .control set numdgt=12 -tran 2n 30u 0 2n uic +tran 2n 30u 0 10n uic let err=abs(v(vout)-1.0) meas tran startup_error_v max err from=25u to=30u meas tran peak_v max v(vout) from=0 to=30u diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/sweeps.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/sweeps.spice index 2569d6a59d587db8b2cffc397e7ecf46f04777ec..fcf9f706b11ebd49b3df329c7f8371abc21f1b94 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/sweeps.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/sweeps.spice @@ -12,6 +12,7 @@ IBIAS vdd nbias 20u ILOAD vout 0 {load_a} VPROBE sense fb 0 XDUT vdd vout 0 nbias vref fb sense ldo_008_fer_mirror_ota +.save v(vout) v(vdd) i(VDD) .control set numdgt=12 dc VDD 1.3 0.8 -0.001 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/testbench.spice index bbf8b288c55684249803d9ea325985461bc6e428..e05eac7726ea7d4f94326ca18dbda075179bee21 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/materials/testbench.spice @@ -13,6 +13,7 @@ VPROBE sense fb dc 0 ac 1 IINJ 0 sense dc 0 ac 0 ILOAD vout 0 dc {load_a} pulse({load_a} {2*load_a} 2u 20n 20n 8u 16u) XDUT vdd vout 0 nbias vref fb sense ldo_008_fer_mirror_ota +.save v(vout) v(nbias) v(vdd) v(sense) v(fb) i(VDD) i(VPROBE) @iload[current] .control set numdgt=12 op @@ -57,7 +58,7 @@ print minimum_return_distance return_phase_excursion_deg final_phase_margin_deg write ac.raw frequency v(sense) v(fb) i(VPROBE) aa bb cc dd transfer forward reverse gain_db phase_deg reset -tran 1n 18u 0 1n +tran 1n 18u 0 5n let err=abs(v(vout)-1.0) let supply=-v(vdd)*i(VDD) meas tran minimum_v min v(vout) from=2u to=18u diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/problem.md index 47270a0d797087a56fbcbfa14df67df55a571e21..eb8e71b0aa4cb54734b649de4b21273056f2ad91 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_008_fer_mirror_ota/problem.md @@ -29,6 +29,7 @@ output-connected capacitance. This is not a claim of zero internal storage. - `materials/testbench.spice`: DC bias, bilateral loop measurements and load steps. - `materials/startup.spice`: zero-state resistive-load startup. - `materials/sweeps.spice`: DC line/load and regulation-headroom sweeps. +- `materials/psrr.spice`: closed-loop small-signal supply rejection. - `materials/fast.spice`: short, finely resolved load-impulse response. Ordered ports: `vdd vout vss nbias vref fb sense`. VDD/VSS are supply/return; @@ -47,7 +48,7 @@ parallel finger arrangements require native LVS and every other check to pass. Use typical IHP LV MOS, MIM and resistor models at 27 C. Main conditions are all combinations of VDD=1.2/1.3 V and initial load 0.1/0.5 mA. The current load doubles at 2–2.02 us and returns at 10.02–10.04 us. Run to 18 us with -1 ns maximum step, Gear order 2, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` +5 ns maximum step, Gear order 2, `rshunt=1e12`, `reltol=1e-5`, `abstol=1e-14` and `vntol=1e-8`. Startup and fast tests use the same accuracy tolerances. For AC, independent supply/reference/load sources have no AC excitation. @@ -64,6 +65,16 @@ both directional transmissions and port loading. The old voltage-only `−V(FB)/V(SENSE)` is not the accepted loop metric. Reset the circuit before transient analysis; neither AC experiment changes its DC or transient topology. +The separate supply-rejection suite uses the same four DC operating points +(VDD=1.2/1.3 V and ILOAD=0.1/0.5 mA) at 27 C. VDD receives a normalized 1 V +small-signal AC excitation around each DC value; VREF, IBIAS and ILOAD have zero +AC excitation. VPROBE remains a zero-volt connection with zero AC magnitude, +and IINJ is zero, so the feedback loop remains closed. Sweep 10 Hz–10 MHz at +300 points/decade. At 1 kHz and 1 MHz, measure +`PSRR=20*log10(abs(VDD/VOUT))` in dB. This is source-paired small-signal +rejection for the declared external bias fixture, not large-signal ripple +immunity or rejection of an internal bias generator. + This measures the declared external feedback loop with the internal circuit retained. It is not an exhaustive pole proof for all internal device loops or an RF/model-validity claim beyond the declared tests. Both first and final crossing phase margins must lie in [0, 180] degrees. @@ -73,7 +84,7 @@ quality without adding a stability acceptance screen. Startup uses 1/10 kohm loads and simultaneous linear supply/reference/bias ramps from zero over 1/10 us: eight combinations including both supplies. -Run with `uic`, no internal-node initial conditions, to 30 us with 2 ns +Run with `uic`, no internal-node initial conditions, to 30 us with 10 ns maximum step. Startup qualification is resistive-load and synchronized-ramp only, not arbitrary reference sequencing or constant-current startup. @@ -85,7 +96,7 @@ is a boundary probe, not an extended qualified operating range. Separately sweep load 0.1–1 mA by 10 uA at each qualified supply, retaining both endpoints. Fast conditions use the four main DC biases and a +1 uA load pulse beginning -at 1 ns, 5 ps rise/fall and 1 ns high time. Run 100 ns with 5 ps maximum step. +at 1 ns, 5 ps rise/fall and 1 ns high time. Run 100 ns with 25 ps maximum step. It probes fast recovery around the solved operating point without modifying compensation, adding an output capacitor or clamping an internal node. @@ -107,43 +118,23 @@ signoff and arbitrary-load stability are outside qualification. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_target / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Joint attainment of the electrical and area goals scores 100 points; a feasible reference may score far below 100, and better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +For metrics declaring `saturating_ratio`, q = 2(b+s)/(b+x+2*s), using the quality anchor b and the positive scale s in the metric’s units. Equality to the anchor gives quality 1; improvements approach 2. Normalize each condition before selecting the worst quality. These scales and targets do not add acceptance cutoffs. + +The functional voltage envelope is unipolar 0 to 1.3 V; reversed polarity or operation beyond the supplied rail is outside the regulator interface. The first and final unity crossings must retain the stable 0 to 180 degree negative-feedback phase-margin branch. Net supply consumption and headroom must be nonnegative for this non-boosting regulator. Magnitudes, absolute errors, ranges and physical crossing coordinates must represent their declared measurement domains; missing crossings remain measurement errors. These functional/domain bounds have explicit rationales in `case.toml`. Their positive values remain quality objectives, with no minimum quality score or additional performance cutoff. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.3 | 1.3 | bias | | `bias_v` | DC operating point: `v(nbias)`. | V | target / target | 0 … 1.3 | 1.3 | bias | @@ -151,66 +142,55 @@ source condition; a group uses its worst paired quality. | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `dc_gain_db` | AC: Value of `(db((T))) at=0.01`. | dB | maximize / db20 | −∞ … +∞ | — | response | | `unity_hz` | AC: Crossing coordinate where `(db((T)))=0 fall=1`. | Hz | maximize / ratio | 0 … +∞ | — | response | -| `phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | +| `phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=1)`. | deg | target / target | 0 … 180 | 10 | response | | `final_unity_hz` | AC: Crossing coordinate where `(db((T)))=0 fall=last`. | Hz | maximize / ratio | 0 … +∞ | — | response | -| `final_phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=last)`. | deg | target / target | 0 … 180 | 180 | response | -| `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 1g`. | 1 | target / target | 0 … +∞ | 1.0 | response | +| `final_phase_margin_deg` | AC: `180+(find (180*cph((T))/pi) when (db((T)))=0 fall=last)`. | deg | target / target | 0 … 180 | 10 | response | +| `minimum_return_distance` | AC: `vecmin((mag(1+(T))))`; sweep `dec 300 0.01 1g`. | 1 | target / target | 0 … +∞ | 1 | response | | `return_phase_excursion_deg` | AC: `vecmax(abs(180*cph(1+(T))/pi))`; sweep `dec 300 0.01 1g`. | deg | minimize / ratio | 0 … +∞ | 1e-12 | response | | `hf_gain_db` | AC: Maximum of `(db((T))) from=200meg to=1g`. | dB | minimize / db20 | −∞ … +∞ | — | response | +| `psrr_1khz_db` | PSRR deck: `20*log10(abs(VDD/VOUT))` at 1 kHz for all four VDD/ILOAD DC combinations. | dB | maximize / db20 | −∞ … +∞ | — | response | +| `psrr_1mhz_db` | PSRR deck: `20*log10(abs(VDD/VOUT))` at 1 MHz for all four VDD/ILOAD DC combinations. | dB | maximize / db20 | −∞ … +∞ | — | response | | `minimum_v` | TRAN: Minimum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `maximum_v` | TRAN: Maximum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | -| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 0.0005 | response | +| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 0.0005 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=25u to=30u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-1.0)) from=25u to=30u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `startup_peak_v` | TRAN: Maximum of `v(vout) from=0 to=30u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `startup_minimum_v` | TRAN: Minimum of `v(vout) from=0 to=30u`. | V | target / target | −∞ … +∞ | 1.3 | response | | `regulation_floor_v` | DC: Crossing coordinate where `(abs(v(vout)-1.0))=0.03 rise=1`. | V | target / target | 0 … 1.3 | 1.3 | response | -| `headroom_v` | DC sweep: `(when (abs(v(vout)-1.0))=0.03 rise=1)-(find v(vout) when (abs(v(vout)-1.0))=0.03 rise=1)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `headroom_v` | DC sweep: `(when (abs(v(vout)-1.0))=0.03 rise=1)-(find v(vout) when (abs(v(vout)-1.0))=0.03 rise=1)`. | V | minimize / ratio | 0 … +∞ | 0.001 | response | +| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | response | +| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / saturating_ratio | 0 … +∞ | 0.001 | response | | `fast_peak_v` | Maximum absolute deviation of transient VOUT from its initial DC operating-point value over 0–100 ns in the fast load-pulse deck. | V | target / target | 0 … 1.3 | 1.3 | response | | `fast_tail_v` | The same absolute deviation from initial DC VOUT over 80–100 ns. | V | target / target | 0 … 1.3 | 1.3 | response | -Area reference: **172708.78 um2**. 126 expanded device instances; sum of device/contact envelopes 114596.5905 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **9**; it is independent of -the reference-relative task score. - - -### Score weights - -IHP regulators: regulation and headroom 22.5%; load recovery 22.5%; startup 13.5%; loop stability 13.5%; AC transfer and extrema 4.5%; internal bias 1.8%; quiescent current 7.2%; power 4.5%; area 10%. Each objective's weight is divided equally among its metrics. - -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `headroom_v` | 0.045000000000 | -| `line_span_v` | 0.045000000000 | -| `load_span_v` | 0.045000000000 | -| `output_v` | 0.045000000000 | -| `regulation_floor_v` | 0.045000000000 | -| `recovery_load_v` | 0.112500000000 | -| `recovery_release_v` | 0.112500000000 | -| `startup_error_v` | 0.045000000000 | -| `startup_minimum_v` | 0.045000000000 | -| `startup_peak_v` | 0.045000000000 | -| `final_phase_margin_deg` | 0.033750000000 | -| `minimum_return_distance` | 0.033750000000 | -| `phase_margin_deg` | 0.033750000000 | -| `return_phase_excursion_deg` | 0.033750000000 | -| `dc_gain_db` | 0.005625000000 | -| `fast_peak_v` | 0.005625000000 | -| `fast_tail_v` | 0.005625000000 | -| `final_unity_hz` | 0.005625000000 | -| `hf_gain_db` | 0.005625000000 | -| `maximum_v` | 0.005625000000 | -| `minimum_v` | 0.005625000000 | -| `unity_hz` | 0.005625000000 | -| `bias_v` | 0.018000000000 | -| `quiescent_a` | 0.072000000000 | -| `mean_power_w` | 0.022500000000 | -| `power_w` | 0.022500000000 | + +The capability coefficient is **9**, independent of this task's reference-normalized score. + +### Quality targets and weights + +The area quality target is **70000 um2**, independent of the current feasibility witness. It is not a hard area limit or a process minimum. + +The 70000 um2 footprint carries 35%. Load/release recovery carry 15%/10%; load span 10%; line span, headroom, each PSRR frequency and quiescent current carry 5% each. First and final phase-margin preservation share 5% with 10-degree scales. The 5 mV recovery, 1 mV line span, 10 mV load span and 20 mV headroom goals are explicit quality goals. Startup extrema and repeated power/loop summaries remain diagnostic; all functional startup and stability checks remain. + +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 70000 | um2 | — | 0.35 | +| `headroom_v` | 0.02 | V | 0.001 | 0.05 | +| `line_span_v` | 0.001 | V | 0.0001 | 0.05 | +| `load_span_v` | 0.01 | V | 0.001 | 0.1 | +| `psrr_1khz_db` | paired source | dB | — | 0.05 | +| `psrr_1mhz_db` | paired source | dB | — | 0.05 | +| `recovery_load_v` | 0.005 | V | 0.0005 | 0.15 | +| `recovery_release_v` | 0.005 | V | 0.0005 | 0.1 | +| `final_phase_margin_deg` | paired source | deg | 10 | 0.025 | +| `phase_margin_deg` | paired source | deg | 10 | 0.025 | +| `quiescent_a` | paired source | A | 1e-12 | 0.05 | + +Zero-weight paired diagnostics: `output_v`, `regulation_floor_v`, `startup_error_v`, `startup_minimum_v`, `startup_peak_v`, `minimum_return_distance`, `return_phase_excursion_deg`, `dc_gain_db`, `fast_peak_v`, `fast_tail_v`, `final_unity_hz`, `hf_gain_db`, `maximum_v`, `minimum_v`, `unity_hz`, `bias_v`, `mean_power_w`, `power_w`. All unweighted measurements and functional requirements remain checked. + +The targets above affect continuous quality only. A complete feasible reference is allowed to miss them; there is no minimum qualifying score. ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/case.toml b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/case.toml index ac8a2cf2c1e4be792d3fcdaabb4fefb080e9d374..40e53bd5377ec08eb7fb77c544fee075e944be50 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.ldo_009_fer_5t_pass" title = "Unity-Feedback Regulator with Internal Output Storage" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "a279f4b3ed0723afb7820726864463091b3e798ef96c9d02c538d0f58ef61775" +sha256 = "f4e11e7de05a4ed825aadc39c01100ba0c80d50e284936738d4eab157e3e49f6" [[assets]] path = "reference/ldo_009_fer_5t_pass.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-ldo_009_fer_5t_pass-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "c12dbc0a1d5ecd04385f67eb6fb1d0c6d08da88996514b2ad90a365cfe368609" +sha256 = "26e4b028ddd752a1de8c3e787cc03f3e21396dce0c6773acfb25014fca52cff7" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "1788fa17f1811dd7e6596e6edc5c2edde837c878b590084fd239855c89ba50a4" subcircuit = "ldo_009_fer_5t_pass" +sha256 = "1788fa17f1811dd7e6596e6edc5c2edde837c878b590084fd239855c89ba50a4" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "c84213af26654bd33e11f941270548ecc5c2dd4a3e9dde78636967710c66e7a4" +sha256 = "2f5773c21c686c495a1d8aa1e0c5bca1f9412065ad4093fa5ce6d7600708a25c" [task.inputs.simulation] path = "materials/circuit.spice" @@ -49,12 +49,12 @@ sha256 = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.inputs.startup] path = "materials/startup.spice" format = "spice" -sha256 = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +sha256 = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" [task.inputs.sweeps] path = "materials/sweeps.spice" format = "spice" -sha256 = "d6c1c67a33cef7e7db4fc16929a88dc1abe4a445aab46cd7723dc5d6eb72b414" +sha256 = "1eca6b13dc3c9c0bea2e27060c11dfb192cb7fc8d8e5d3ed4c41ec7978783c01" [task.constraints] quality = [ @@ -850,8 +850,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "bias_v" @@ -874,8 +877,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "quiescent_a" @@ -897,9 +903,12 @@ baseline = [ "source_condition_3:quiescent_a", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "power_w" category = "performance" @@ -920,9 +929,12 @@ baseline = [ "source_condition_3:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "dc_gain_db" category = "performance" @@ -964,7 +976,10 @@ baseline = [ "source_condition_3:unity_hz", ] normalization = "ratio" + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." [[task.evaluation.metrics]] id = "phase_margin_deg" @@ -987,8 +1002,11 @@ baseline = [ ] normalization = "target" scale = 180 + +[task.evaluation.metrics.requirement] lower = 0 upper = 180 +rationale = "The declared negative-feedback loop must stay on the measured 0 to 180 degree stable-feedback branch at the required unity crossing; the amount of positive phase margin remains a scored objective." [[task.evaluation.metrics]] id = "minimum_v" @@ -1011,8 +1029,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "maximum_v" @@ -1035,8 +1056,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "recovery_load_v" @@ -1057,10 +1081,13 @@ baseline = [ "source_condition_2:recovery_load_v", "source_condition_3:recovery_load_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_release_v" category = "performance" @@ -1080,10 +1107,13 @@ baseline = [ "source_condition_2:recovery_release_v", "source_condition_3:recovery_release_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" category = "performance" @@ -1104,9 +1134,12 @@ baseline = [ "source_condition_3:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "startup_error_v" category = "performance" @@ -1134,10 +1167,13 @@ baseline = [ "source_startup_6:startup_error_v", "source_startup_7:startup_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "startup_peak_v" category = "performance" @@ -1167,8 +1203,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "startup_minimum_v" @@ -1221,8 +1260,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "headroom_v" @@ -1245,7 +1287,10 @@ baseline = [ ] normalization = "ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [[task.evaluation.metrics]] id = "line_span_v" @@ -1266,9 +1311,12 @@ baseline = [ "source_sweeps_2:line_span_v", "source_sweeps_3:line_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [[task.evaluation.metrics]] id = "load_span_v" @@ -1289,15 +1337,18 @@ baseline = [ "source_sweeps_2:load_span_v", "source_sweeps_3:load_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." [task.evaluation.pre_layout] -source_report_sha256 = "d85ca1bee37b6f82346ed01a1dccea60e258f0a0bb15c746d60f861bad13edcb" +source_report_sha256 = "2fc0f3dbd5a0ae18c4450f187eb4cbc47b04837dd709d3570eb7c1b6bbb1e7ed" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"d2b4333ef2207319c48c845f3888e9159cbfdd0398551f93d78d208944e36156\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1335,7 +1386,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "c84213af26654bd33e11f941270548ecc5c2dd4a3e9dde78636967710c66e7a4" +deck = "2f5773c21c686c495a1d8aa1e0c5bca1f9412065ad4093fa5ce6d7600708a25c" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.bias_v] @@ -1386,6 +1437,11 @@ unit = "V" value = 3238258.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "091872bc0f151f404c55acb1588e312f8b6cbdcdaf92f0380ad22768e0053a90" +ac = "ba32e12db14b649abc69b957d5bbc8951462dea21bf01398807dca3010d62d18" +transient = "ee318f9bda27425814f929aec5a95b1e2358b4322adbfdd66371d38778e62dac" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1422,7 +1478,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "c84213af26654bd33e11f941270548ecc5c2dd4a3e9dde78636967710c66e7a4" +deck = "2f5773c21c686c495a1d8aa1e0c5bca1f9412065ad4093fa5ce6d7600708a25c" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.bias_v] @@ -1473,6 +1529,11 @@ unit = "V" value = 4054834.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "79a29d31d44b1bd22f017ec887aacb4bf211980d0838e2ae5f9ac9acaed76733" +ac = "b94e3f4b262ba70992089d3af177f2d442a04abad52c7ae1572d4ea9854c90d0" +transient = "be833f89037bf54c0db98d3eb8141bfb8ea06570413aa20687f319a4c03f6d08" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1509,7 +1570,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "c84213af26654bd33e11f941270548ecc5c2dd4a3e9dde78636967710c66e7a4" +deck = "2f5773c21c686c495a1d8aa1e0c5bca1f9412065ad4093fa5ce6d7600708a25c" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.bias_v] @@ -1560,6 +1621,11 @@ unit = "V" value = 4806067.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "e2872493377a6accd84aa7f6731900d8cf729d8853d54f83f92575ce4d800a38" +ac = "c1dd87fba703ac83460b47e6a76909c4f0d3eb0fd438d205746d70ea7bdc9e00" +transient = "a62426a71872ec198e52edbe1e5ef31d87ed9f8cf89dfd1760a1492e93c292a5" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1596,7 +1662,7 @@ ac = "ac.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "c84213af26654bd33e11f941270548ecc5c2dd4a3e9dde78636967710c66e7a4" +deck = "2f5773c21c686c495a1d8aa1e0c5bca1f9412065ad4093fa5ce6d7600708a25c" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.bias_v] @@ -1647,6 +1713,11 @@ unit = "V" value = 5728183.0 unit = "Hz" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "2ae1304300b123b04b89fe3e9245d16a7c04da7e980a3ee381a38b9afbb28aa0" +ac = "e9e560d7ed8de4b8ac76ba675a3a774c0fb2cd3d1a0ba31269937130fa60febf" +transient = "73397bbe7052dbdfe4f0bd386d522472ea4bca78b5cbeb041c93fbf377839ba2" + [task.evaluation.pre_layout.jobs.source_startup_0] operation = "circuit.simulate" @@ -1671,7 +1742,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_0.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_0.measurements.minimum_v] @@ -1686,6 +1757,9 @@ unit = "V" value = 0.004095411 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_0.output_sha256] +transient = "68345de58493ea4c83ba610182359b3b4b6c0260edadeb62ddb64826ed216765" + [task.evaluation.pre_layout.jobs.source_startup_1] operation = "circuit.simulate" @@ -1710,7 +1784,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_1.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_1.measurements.minimum_v] @@ -1725,6 +1799,9 @@ unit = "V" value = 0.004095411 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_1.output_sha256] +transient = "436c6d2a2d9527b5a7d2f7828a199b5520ccd0c51217d93e86f19d671578a339" + [task.evaluation.pre_layout.jobs.source_startup_2] operation = "circuit.simulate" @@ -1749,7 +1826,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_2.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_2.measurements.minimum_v] @@ -1764,6 +1841,9 @@ unit = "V" value = 0.02267805 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_2.output_sha256] +transient = "9149d1ee84caf4a3dbc40502266c72c74bbdb22820f74c7e248a2ce14a6c5cc9" + [task.evaluation.pre_layout.jobs.source_startup_3] operation = "circuit.simulate" @@ -1788,7 +1868,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_3.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_3.measurements.minimum_v] @@ -1803,6 +1883,9 @@ unit = "V" value = 0.02267805 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_3.output_sha256] +transient = "e29cba3b60b70635f4ff3a417a4c1ab5071fa2d02b08a7080bd4801137ca6d45" + [task.evaluation.pre_layout.jobs.source_startup_4] operation = "circuit.simulate" @@ -1827,7 +1910,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_4.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_4.measurements.minimum_v] @@ -1842,6 +1925,9 @@ unit = "V" value = 0.002141717 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_4.output_sha256] +transient = "f3e5c88363a577f2b392426f220eb4da00f7ad8850240f04e26770d66f07d695" + [task.evaluation.pre_layout.jobs.source_startup_5] operation = "circuit.simulate" @@ -1866,7 +1952,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_5.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_5.measurements.minimum_v] @@ -1881,6 +1967,9 @@ unit = "V" value = 0.002141717 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_5.output_sha256] +transient = "19e6b2c1f1ce9050938f0e2fed3e9989ba236ca3ba780062ea1e9ee4c0d2f4a6" + [task.evaluation.pre_layout.jobs.source_startup_6] operation = "circuit.simulate" @@ -1905,7 +1994,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_6.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_6.measurements.minimum_v] @@ -1920,6 +2009,9 @@ unit = "V" value = 0.01440403 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_6.output_sha256] +transient = "0480fda8a71dff0deef632546ceff757fe35d9060188ccc591e2a1603277db93" + [task.evaluation.pre_layout.jobs.source_startup_7] operation = "circuit.simulate" @@ -1944,7 +2036,7 @@ minimum_v = "V" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_startup_7.input_sha256] -deck = "baa06b4c3f35a5cc0c2254f0dc4d75f247c7f1c707449444d0cb266f053c57f3" +deck = "0e92bcbeba0c8e7ba39bcd5ba0ed0061fda2ad6439a9847e11b74cc8c825b132" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_startup_7.measurements.minimum_v] @@ -1959,6 +2051,9 @@ unit = "V" value = 0.01440403 unit = "V" +[task.evaluation.pre_layout.jobs.source_startup_7.output_sha256] +transient = "49f5c58d565e4c5159d63801c77ddeef22a5c7b3f37f0b0446d6df654b5f93ea" + [task.evaluation.pre_layout.jobs.source_sweeps_0] operation = "circuit.simulate" @@ -1985,7 +2080,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_0.input_sha256] -deck = "d6c1c67a33cef7e7db4fc16929a88dc1abe4a445aab46cd7723dc5d6eb72b414" +deck = "1eca6b13dc3c9c0bea2e27060c11dfb192cb7fc8d8e5d3ed4c41ec7978783c01" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_sweeps_0.measurements.headroom_v] @@ -2004,6 +2099,10 @@ unit = "V" value = 1.184926 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_0.output_sha256] +line = "dd4b9579edf9a0402b50ed9b27b89783253c446dced904af4449dc13bdfbcea8" +load = "1344720a12813cc4d3e4ed8693c3926f835db36b5bd3d3d81b30661089210576" + [task.evaluation.pre_layout.jobs.source_sweeps_1] operation = "circuit.simulate" @@ -2030,7 +2129,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_1.input_sha256] -deck = "d6c1c67a33cef7e7db4fc16929a88dc1abe4a445aab46cd7723dc5d6eb72b414" +deck = "1eca6b13dc3c9c0bea2e27060c11dfb192cb7fc8d8e5d3ed4c41ec7978783c01" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_sweeps_1.measurements.headroom_v] @@ -2049,6 +2148,10 @@ unit = "V" value = 1.029643 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_1.output_sha256] +line = "3915b1539aa88ed74c0dc9e64e7ba48b4d8061d4abb4ce531cc04c8e491f8e97" +load = "1344720a12813cc4d3e4ed8693c3926f835db36b5bd3d3d81b30661089210576" + [task.evaluation.pre_layout.jobs.source_sweeps_2] operation = "circuit.simulate" @@ -2075,7 +2178,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_2.input_sha256] -deck = "d6c1c67a33cef7e7db4fc16929a88dc1abe4a445aab46cd7723dc5d6eb72b414" +deck = "1eca6b13dc3c9c0bea2e27060c11dfb192cb7fc8d8e5d3ed4c41ec7978783c01" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_sweeps_2.measurements.headroom_v] @@ -2094,6 +2197,10 @@ unit = "V" value = 1.184926 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_2.output_sha256] +line = "dd4b9579edf9a0402b50ed9b27b89783253c446dced904af4449dc13bdfbcea8" +load = "3c34fdde2505ca1f9936e1a4bd8509c95c8ff5137544d5d668e0e49bf1186979" + [task.evaluation.pre_layout.jobs.source_sweeps_3] operation = "circuit.simulate" @@ -2120,7 +2227,7 @@ line = "line.raw" load = "load.raw" [task.evaluation.pre_layout.jobs.source_sweeps_3.input_sha256] -deck = "d6c1c67a33cef7e7db4fc16929a88dc1abe4a445aab46cd7723dc5d6eb72b414" +deck = "1eca6b13dc3c9c0bea2e27060c11dfb192cb7fc8d8e5d3ed4c41ec7978783c01" dut = "d92b6fe6a5f22380be4b7663ffcaaef72f5a0c76e79177a57801c24554157a54" [task.evaluation.pre_layout.jobs.source_sweeps_3.measurements.headroom_v] @@ -2139,6 +2246,10 @@ unit = "V" value = 1.029643 unit = "V" +[task.evaluation.pre_layout.jobs.source_sweeps_3.output_sha256] +line = "3915b1539aa88ed74c0dc9e64e7ba48b4d8061d4abb4ce531cc04c8e491f8e97" +load = "3c34fdde2505ca1f9936e1a4bd8509c95c8ff5137544d5d668e0e49bf1186979" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -2151,7 +2262,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -2162,7 +2273,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -2175,7 +2286,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2188,7 +2299,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2202,7 +2313,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2212,7 +2323,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/schematic.svg index 54ae2b3ffb5aea8541b36c3a08df3c505bc99c4b..13fb875c1b4c9a364f500362329e080a86872bb2 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/schematic.svg @@ -1 +1,2 @@ -ldo_009_fer_5t_pass{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.ldo_009_fer_5t_pass", "netlist_sha256": "1788fa17f1811dd7e6596e6edc5c2edde837c878b590084fd239855c89ba50a4", "project_sha256": "10de06e2d74382dc8a6d51804632eb777dab25345ff6e60e0db7016098ec1377", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["ldo_009_fer_5t_pass", "Bank1_5x_cap_cmim", "Bank2_13x_cap_cmim"], "banks": [{"name": "Bank1_5x_cap_cmim", "count": 5, "model": "cap_cmim", "params": {"w": "36.515u", "l": "36.515u", "m": "1"}}, {"name": "Bank2_13x_cap_cmim", "count": 13, "model": "cap_cmim", "params": {"w": "50.635u", "l": "50.635u", "m": "1"}}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 5}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}ldo_009_fer_5t_passvoutotaovoutvssvssref0vrefnbiasvddvssotaovoutvoutvoutvssrbld1rbld2rbld3vddwell_vddvsssubsensevrefnbiasvssvddotaotailotaxvddvoutvssnbiasref0senseldo_009_fer_5t_passihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Error amplifierMMLD4/0.4MMLM4/0.4MMIP8/0.4 ×2MMIN8/0.4 ×2MMNT4/0.4 ×2P bulk → well_vddN bulk → sub02 Reference and biasMMNB4/0.4RRREF_01/6.94N bulk → subR substrate → sub03 Pass device and compensationMMP8/0.2 ×20XBANK1Bank1_5x_cap_cmimXBANK2Bank2_13x_cap_cmimP bulk → well_vdd04 Bleeder chainRRBLD_01/17.5RRBLD_11/17.5RRBLD_21/17.5RRBLD_31/17.5R substrate → sub05 Substrate contacts / repeated banksRRtap_vddA=248 µm²RRptapA=395 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · rhigh \ No newline at end of file +ldo_009_fer_5t_pass{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.ldo_009_fer_5t_pass","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["ldo_009_fer_5t_pass","Bank1_5x_cap_cmim","Bank2_13x_cap_cmim"],"banks":[{"name":"Bank1_5x_cap_cmim","count":5,"model":"cap_cmim","params":{"w":"36.515u","l":"36.515u","m":"1"}},{"name":"Bank2_13x_cap_cmim","count":13,"model":"cap_cmim","params":{"w":"50.635u","l":"50.635u","m":"1"}}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":5},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["ldo_009_fer_5t_pass"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/design/ldo_009_fer_5t_pass.icproj.json"}}Main-sheet overview; 2 child sheets are available in the editable .icproj.json project. Equal net labels connect.ldo_009_fer_5t_passvoutotaovoutvssvssref0vrefnbiasvddvssotaovoutvoutvoutvssrbld1rbld2rbld3vddwell_vddvsssubsensevrefnbiasvssvddotaotailotaxvddvoutvssnbiasref0senseldo_009_fer_5t_passihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresError amplifierMMLD4/0.4MMLM4/0.4MMIP8/0.4 ×2MMIN8/0.4 ×2MMNT4/0.4 ×2P bulk → well_vddN bulk → subReference and biasMMNB4/0.4RRREF_01/6.94N bulk → subR substrate → subPass device and compensationMMP8/0.2 ×20XBANK1Bank1_5x_cap_cmimXBANK2Bank2_13x_cap_cmimP bulk → well_vddBleeder chainRRBLD_01/17.5RRBLD_11/17.5RRBLD_21/17.5RRBLD_31/17.5R substrate → subBulk ties and device banksRRtap_vddA=248 µm²RRptapA=395 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ntap1 · ptap1 · rhigh + diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/startup.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/startup.spice index 88b571ffb1df0c2111aa73f06400039770f075fe..5d298f6e775d200dab9b102b6bfe33e1040fd59e 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/startup.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/startup.spice @@ -14,6 +14,7 @@ VPROBE sense vout 0 XDUT vdd vout 0 nbias ref0 sense ldo_009_fer_5t_pass .control set numdgt=12 +save i(vdd) i(vref) v(ref0) v(vdd) v(vout) tran 2n 30u 0 2n uic let err=abs(v(vout)-0.9) meas tran startup_error_v max err from=25u to=30u diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/sweeps.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/sweeps.spice index 9489a5a663be1d7114c41db04e666d9bbcdc5e6b..98ecffde782030c2be261eb6a8c5574b142bd24f 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/sweeps.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/sweeps.spice @@ -14,6 +14,7 @@ VPROBE sense vout 0 XDUT vdd vout 0 nbias ref0 sense ldo_009_fer_5t_pass .control set numdgt=12 +save v(vout) dc VDD 1.3 0.8 -0.001 let error_v=abs(v(vout)-0.9) meas dc regulation_floor_v when error_v=0.03 rise=1 diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/testbench.spice index eaa26324baccc755fcf66bc558c29f9909ae4a35..a38e119e89a152c35952227d586e2f2245e583af 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/materials/testbench.spice @@ -21,6 +21,7 @@ let quiescent_a=-i(VDD)-@iload[current] let bias_v=v(nbias) print output_v power_w quiescent_a bias_v write op.raw v(vout) v(nbias) i(VDD) @iload[current] +save i(vdd) v(nbias) v(sense) v(vdd) v(vout) ac dec 150 0.01 1g let transfer=-v(vout)/v(sense) let gain_db=db(transfer) diff --git a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/problem.md b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/problem.md index 2475371f60a61073482258b2d20cbe7d0da54c30..890d4eb8a518d2d37e7741954d4982a8d1da4a70 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/ldo_009_fer_5t_pass/problem.md @@ -23,7 +23,6 @@ and 0.9 V reference are external. The raw zero-volt loop measurement source becomes an external zero-volt link between distinct output and sense ports; it is not a manufactured voltage-source device or an ideal common-mode servo. - ## Inputs and Interface - `materials/circuit.cdl`: authoritative native LVS circuit. @@ -97,43 +96,21 @@ fabrication signoff remain unqualified. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`startup_error_v`, `recovery_load_v`, `recovery_release_v`, `line_span_v`, `load_span_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.3 | 1.3 | bias | | `bias_v` | DC operating point: `v(nbias)`. | V | target / target | 0 … 1.3 | 1.3 | bias | @@ -144,26 +121,24 @@ source condition; a group uses its worst paired quality. | `phase_margin_deg` | AC: `180+(find (180*cph((-v(vout)/v(sense)))/pi) when (db((-v(vout)/v(sense))))=0 fall=1)`. | deg | target / target | 0 … 180 | 180 | response | | `minimum_v` | TRAN: Minimum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `maximum_v` | TRAN: Maximum of `v(vout) from=2u to=18u`. | V | target / target | 0 … 1.3 | 1.3 | response | -| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_load_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_release_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=25u to=30u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `startup_error_v` | TRAN: Maximum of `(abs(v(vout)-0.9)) from=25u to=30u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `startup_peak_v` | TRAN: Maximum of `v(vout) from=0 to=30u`. | V | target / target | 0 … 1.3 | 1.3 | response | | `startup_minimum_v` | TRAN: Minimum of `v(vout) from=0 to=30u`. | V | target / target | −∞ … +∞ | 1.3 | response | | `regulation_floor_v` | DC: Crossing coordinate where `(abs(v(vout)-0.9))=0.03 rise=1`. | V | target / target | 0 … 1.3 | 1.3 | response | | `headroom_v` | DC sweep: `(when (abs(v(vout)-0.9))=0.03 rise=1)-0.9`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | - -Area reference: **65470.09 um2**. 54 expanded device instances; sum of device/contact envelopes 43312.7759 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. +| `line_span_v` | DC sweep: `(max v(vout) from=1.3 to=1.2)-(min v(vout) from=1.3 to=1.2)`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `load_span_v` | DC sweep: `(max v(vout))-(min v(vout))`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | -The capability coefficient remains **8**; it is independent of -the reference-relative task score. +Area reference: **65470.09 um2**. The expanded circuit has 54 device instances, a sum of device/contact envelopes 43312.7759 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **8**, independent of this task's reference-normalized score. ### Score weights -IHP regulators: regulation and headroom 22.5%; load recovery 22.5%; startup 13.5%; loop stability 13.5%; AC transfer and extrema 4.5%; internal bias 1.8%; quiescent current 7.2%; power 4.5%; area 10%. Each objective's weight is divided equally among its metrics. +IHP regulator: regulation and dropout 22.5%, load recovery 22.5%, startup 13.5%, loop stability 13.5%, AC transfer and extrema 4.5%, internal bias 1.8%, quiescent current 7.2%, power 4.5%, area 10%; each objective weight is divided equally among its metrics. | Metric | Weight | | --- | ---: | diff --git a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/case.toml b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/case.toml index 0e517797c8f855ba849f662f5e9a4f4d34e72afe..e9d52a50770b2d61e15c8f5ac754774e6a952147 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.smp_001_nmos_th" title = "Physical NMOS Sample-and-Hold: Headroom and Retention" status = "qualified" +in_core = true [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "7d6d4cab7ba14de2cd099f1826834875923b21d430b673deff221a27a2667ed1" +sha256 = "30cbe250b9fc7222f5a975d96250268c43bcd02d8b0df95be4769dbb039399c8" [[assets]] path = "reference/smp_001_nmos_th.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-smp_001_nmos_th-tt-retention-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "af3b5158f27517245b48e1d8cabfbd1d3b3ce32ce5c45997fdc6a167c325a10d" +sha256 = "9dab8c5caf691dc67d6c18c95bb95fb1796a67de63485853dc5a9ad07e3b5cf6" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "846cb6797fae4bca4b793d23239e778299f46ec0b3342e44d2a014ca5d6b3802" subcircuit = "smp_001_nmos_th" +sha256 = "846cb6797fae4bca4b793d23239e778299f46ec0b3342e44d2a014ca5d6b3802" [task.inputs.performance] path = "materials/testbench.spice" @@ -247,17 +247,17 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 661.39 -rationale = "Track/hold switches: acquisition 35%; hold fidelity 45%; clock energy 10%; area 10%. Each objective's weight is divided equally among its metrics." +area_target = 300.0 +rationale = "The 300 um2 footprint carries 30%. Held-value accuracy carries 25%; pedestal, off-state feedthrough, tracking and clock energy carry 10% each; reacquisition carries 5%. Hold drift is retained as a diagnostic decomposition of held-value error. Explicit physical goals avoid defining perfect accuracy from near-zero source samples, while the worst of all 16 sample/temperature/off-state conditions determines each quality factor." [task.evaluation.scoring.weights] -functional_area = 0.1 -reacquire_error_v = 0.175 -track_error_v = 0.175 -feedthrough_peak_v = 0.1125 -hold_drift_v = 0.1125 -hold_error_v = 0.1125 -pedestal_abs_v = 0.1125 +functional_area = 0.3 +reacquire_error_v = 0.05 +track_error_v = 0.1 +feedthrough_peak_v = 0.1 +hold_drift_v = 0.0 +hold_error_v = 0.25 +pedestal_abs_v = 0.1 clock_energy_j = 0.1 [[task.evaluation.jobs]] @@ -1032,9 +1032,16 @@ baseline = [ "source_condition_14:track_error_v", "source_condition_15:track_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 1e-05 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.001 +rationale = "Aim for at most 1 mV tracking error before clock turn-off." [[task.evaluation.metrics]] id = "pedestal_abs_v" @@ -1079,9 +1086,16 @@ baseline = [ "source_condition_14:pedestal_abs_v", "source_condition_15:pedestal_abs_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.0001 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.003 +rationale = "Aim for at most 3 mV clock turn-off pedestal across the declared sample matrix." [[task.evaluation.metrics]] id = "feedthrough_peak_v" @@ -1126,9 +1140,16 @@ baseline = [ "source_condition_14:feedthrough_peak_v", "source_condition_15:feedthrough_peak_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 5e-06 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 5e-05 +rationale = "Aim for at most 50 uV peak feedthrough from the off-state input transition." [[task.evaluation.metrics]] id = "hold_drift_v" @@ -1173,10 +1194,13 @@ baseline = [ "source_condition_14:hold_drift_v", "source_condition_15:hold_drift_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "hold_error_v" category = "performance" @@ -1220,9 +1244,16 @@ baseline = [ "source_condition_14:hold_error_v", "source_condition_15:hold_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 0.001 + +[task.evaluation.metrics.requirement] lower = 0 -scale = 1e-06 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 0.015 +rationale = "Aim for at most 15 mV held-value error across all sampled voltages, off-state input levels and temperatures." [[task.evaluation.metrics]] id = "reacquire_error_v" @@ -1267,10 +1298,17 @@ baseline = [ "source_condition_14:reacquire_error_v", "source_condition_15:reacquire_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[task.evaluation.metrics.quality_target] +value = 5e-06 +rationale = "Aim for at most 5 uV error at the declared reacquisition sample." + [[task.evaluation.metrics]] id = "clock_energy_j" category = "performance" @@ -1315,9 +1353,16 @@ baseline = [ "source_condition_15:clock_energy_j", ] normalization = "ratio" -lower = 0 scale = 1e-21 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + +[task.evaluation.metrics.quality_target] +value = 3e-15 +rationale = "Aim for at most 3 fJ clock-source energy over the declared capture/reacquisition sequence." + [[task.evaluation.metrics]] id = "target" category = "performance" @@ -1594,10 +1639,10 @@ direction = "maximize" aggregation = "max" [task.evaluation.pre_layout] -source_report_sha256 = "06b5b2ddf7903cebd2e0b312151123172d17e4fafff047fcb8f303c54928d8a1" +source_report_sha256 = "dee43385e3a287f0679c0fcd913f1392e60f874fe3dfd857488c793166c6c442" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"bce7f9881914eef1ed5ef8d48c2d22ee7e6b29d513212c048c8e747914b46817\", \"timeout_seconds\": 300.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 300.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1713,6 +1758,9 @@ unit = "V" value = 0.1 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +transient = "30ede828c1f70395e6989213f394d89e83ea37aca698a530898a1d02b9428509" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1827,6 +1875,9 @@ unit = "V" value = 0.1 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +transient = "3277c35af2f65dc65d203c4cc64d145bdc50857fee7c9d2fc121bdaa96e7e30b" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1941,6 +1992,9 @@ unit = "V" value = 0.4 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +transient = "2ad45aeb4482f96c31ec81a8e2c6ac25db2a9a575426183fa8ac74d8efb8d823" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -2055,6 +2109,9 @@ unit = "V" value = 0.4 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +transient = "58f0043327d46d4fea37ab6d4a0baa851ced78385a88c254dae87a0d1117eeae" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -2169,6 +2226,9 @@ unit = "V" value = 0.6 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +transient = "3bfeabaa5bfcd7a669f9cb7608aa99bff776ae2c815d0b41f0ac7b5fd5ace5a8" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -2283,6 +2343,9 @@ unit = "V" value = 0.6 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +transient = "b02f921e1a448cce162a1a153bb39b0d53a52ef7aa3734374b88d4397bd0ce6d" + [task.evaluation.pre_layout.jobs.source_condition_6] operation = "circuit.simulate" @@ -2397,6 +2460,9 @@ unit = "V" value = 0.6999986 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_6.output_sha256] +transient = "482f56312155955fd90f2b0d8c411ce0742aa0cc4dabb8fbdbd0eb4e77407944" + [task.evaluation.pre_layout.jobs.source_condition_7] operation = "circuit.simulate" @@ -2511,6 +2577,9 @@ unit = "V" value = 0.6999986 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_7.output_sha256] +transient = "431ca113e061cd4e3c99610d1cef31ccec1c60477bd7a984d97bca21a2c116a7" + [task.evaluation.pre_layout.jobs.source_condition_8] operation = "circuit.simulate" @@ -2625,6 +2694,9 @@ unit = "V" value = 0.1000001 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_8.output_sha256] +transient = "885c578e3cfca6538115458f9398a89e8b5c10d6633f75feb4a48abbc2c95252" + [task.evaluation.pre_layout.jobs.source_condition_9] operation = "circuit.simulate" @@ -2739,6 +2811,9 @@ unit = "V" value = 0.1000001 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_9.output_sha256] +transient = "41d2110b93c53cbe036cf5e8d552fefea566615ef950c8be19b32411343d6e55" + [task.evaluation.pre_layout.jobs.source_condition_10] operation = "circuit.simulate" @@ -2853,6 +2928,9 @@ unit = "V" value = 0.4 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_10.output_sha256] +transient = "953fa888b150095fa8bfea4650c96672a2f8a44c294646d4e747cf1de6322207" + [task.evaluation.pre_layout.jobs.source_condition_11] operation = "circuit.simulate" @@ -2967,6 +3045,9 @@ unit = "V" value = 0.4 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_11.output_sha256] +transient = "7715008112ea1909cea8f1d7d940771e4d199104adda45c19c76b4c2c29cc35a" + [task.evaluation.pre_layout.jobs.source_condition_12] operation = "circuit.simulate" @@ -3081,6 +3162,9 @@ unit = "V" value = 0.6 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_12.output_sha256] +transient = "56aa099e4598a3261ee7e2ab30ac362a99fd3b7d0fb22724f8be5d2185e6f478" + [task.evaluation.pre_layout.jobs.source_condition_13] operation = "circuit.simulate" @@ -3195,6 +3279,9 @@ unit = "V" value = 0.6 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_13.output_sha256] +transient = "e6ed089c4221fb276bd203230b41f334fdc5e5548e86935d8e0ee700f059b7cc" + [task.evaluation.pre_layout.jobs.source_condition_14] operation = "circuit.simulate" @@ -3309,6 +3396,9 @@ unit = "V" value = 0.7 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_14.output_sha256] +transient = "cee9d3504ff089a1bcfde9211e11a734cf5501232e81ecf7435917c89e42e6f7" + [task.evaluation.pre_layout.jobs.source_condition_15] operation = "circuit.simulate" @@ -3423,6 +3513,9 @@ unit = "V" value = 0.7 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_15.output_sha256] +transient = "4ea93cf9c9c55d0a91d2798628a12db3b670051f127431c716b6cad1d5609fe9" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -3435,7 +3528,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -3446,7 +3539,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -3459,7 +3552,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -3472,7 +3565,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -3486,7 +3579,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -3496,7 +3589,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 300 diff --git a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/schematic.svg index b0b4e613793d5b7d53f7fcff8d21a3f63c958e3a..71aac5ee2100e74aeed36d2b1ff5d4326970146c 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/schematic.svg @@ -1 +1,2 @@ -smp_001_nmos_th{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.smp_001_nmos_th", "netlist_sha256": "846cb6797fae4bca4b793d23239e778299f46ec0b3342e44d2a014ca5d6b3802", "project_sha256": "c1d09aec7bacb76d6bba220430c3f054249508817a033b96869f434c4161daed", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["smp_001_nmos_th"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}smp_001_nmos_thvinclkvssvoutvsssubvinclkvoutvsssmp_001_nmos_thihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Sampling switch and hold capacitorMM02/0.13CC018.2/18.2N bulk → sub02 Substrate contacts / repeated banksRRPTAPA=16 µm²Models: sg13_lv_nmos · cap_cmim · ptap1 \ No newline at end of file +smp_001_nmos_th{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.smp_001_nmos_th","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["smp_001_nmos_th"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["smp_001_nmos_th"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/design/smp_001_nmos_th.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.smp_001_nmos_thvinclkvssvoutvsssubvinclkvoutvsssmp_001_nmos_thihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresSampling switch and hold capacitorMM02/0.13CC018.2/18.2N bulk → subBulk tapRRPTAPA=16 µm²Models: sg13_lv_nmos · cap_cmim · ptap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/problem.md b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/problem.md index 308a7d61cc0da5ac95f74db6f460d114a8a2aa2c..2917c86f6aff3c730b964357f1e365d318efbf03 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/smp_001_nmos_th/problem.md @@ -69,50 +69,28 @@ fabrication signoff are outside this contract. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations remain required evidence. The explicit quality targets below supply scoring anchors; otherwise the paired source value is used. Reports retain every paired result. + +Let x be the post-layout measurement and b the declared quality target, or the same-condition source measurement when no target is declared: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_target / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Joint attainment of the electrical and area goals scores 100 points; a feasible reference may score far below 100, and better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +For metrics declaring `saturating_ratio`, q = 2(b+s)/(b+x+2*s), using the quality anchor b and the positive scale s in the metric’s units. Equality to the anchor gives quality 1; improvements approach 2. Normalize each condition before selecting the worst quality. These scales and targets do not add acceptance cutoffs. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | -| `track_error_v` | Maximum absolute VOUT minus target over 80–190 ns; target is VSRC sampled at 180 ns. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `pedestal_abs_v` | Absolute difference between VOUT at 220 ns and 180 ns (held minus tracked sample). | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `feedthrough_peak_v` | Maximum absolute VOUT minus its 390 ns sample over 400–450 ns, during the input transition in hold. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `hold_drift_v` | Absolute difference between VOUT at 11 us and 1 us. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `hold_error_v` | Maximum absolute VOUT minus target over 220 ns–11 us; target is VSRC at 180 ns. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `reacquire_error_v` | Maximum absolute VOUT minus target over 11.48–11.69 us; target is VSRC at 180 ns. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `track_error_v` | Maximum absolute VOUT minus target over 80–190 ns; target is VSRC sampled at 180 ns. | V | minimize / saturating_ratio | 0 … +∞ | 1e-05 | response | +| `pedestal_abs_v` | Absolute difference between VOUT at 220 ns and 180 ns (held minus tracked sample). | V | minimize / saturating_ratio | 0 … +∞ | 0.0001 | response | +| `feedthrough_peak_v` | Maximum absolute VOUT minus its 390 ns sample over 400–450 ns, during the input transition in hold. | V | minimize / saturating_ratio | 0 … +∞ | 5e-06 | response | +| `hold_drift_v` | Absolute difference between VOUT at 11 us and 1 us. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `hold_error_v` | Maximum absolute VOUT minus target over 220 ns–11 us; target is VSRC at 180 ns. | V | minimize / saturating_ratio | 0 … +∞ | 0.001 | response | +| `reacquire_error_v` | Maximum absolute VOUT minus target over 11.48–11.69 us; target is VSRC at 180 ns. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `clock_energy_j` | Integral of max(-V(CLK)*I(VCLK), 0) over 0–11.7 us; returned clock energy is excluded. | J | minimize / ratio | 0 … +∞ | 1e-21 | supply | | `target` | TRAN: Value of `v(src) at=180n`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | | `track_v` | TRAN: Value of `v(vout) at=180n`. | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | @@ -126,26 +104,28 @@ source condition; a group uses its worst paired quality. | `feedthrough_v` | Signed VOUT(450 ns) − VOUT(390 ns). | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | | `drift_v` | Signed VOUT(11 us) − VOUT(1 us). | V | diagnostic | −∞ … +∞ | — | unscored diagnostic | -Area reference: **661.39 um2**. 3 expanded device instances; sum of device/contact envelopes 407.6560 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +The capability coefficient is **5**, independent of this task's reference-normalized score. + +### Quality targets and weights + +The area quality target is **300 um2**, independent of the current feasibility witness. It is not a hard area limit or a process minimum. +The 300 um2 footprint carries 30%. Held-value accuracy carries 25%; pedestal, off-state feedthrough, tracking and clock energy carry 10% each; reacquisition carries 5%. Hold drift is retained as a diagnostic decomposition of held-value error. Explicit physical goals avoid defining perfect accuracy from near-zero source samples, while the worst of all 16 sample/temperature/off-state conditions determines each quality factor. -### Score weights +| Metric | Quality anchor | Unit | Scale | Weight | +| --- | --- | --- | --- | ---: | +| `functional_area` | 300 | um2 | — | 0.3 | +| `reacquire_error_v` | 5e-06 | V | 1e-06 | 0.05 | +| `track_error_v` | 0.001 | V | 1e-05 | 0.1 | +| `feedthrough_peak_v` | 5e-05 | V | 5e-06 | 0.1 | +| `hold_error_v` | 0.015 | V | 0.001 | 0.25 | +| `pedestal_abs_v` | 0.003 | V | 0.0001 | 0.1 | +| `clock_energy_j` | 3e-15 | J | 1e-21 | 0.1 | -Track/hold switches: acquisition 35%; hold fidelity 45%; clock energy 10%; area 10%. Each objective's weight is divided equally among its metrics. +Zero-weight paired diagnostics: `hold_drift_v`. All unweighted measurements and functional requirements remain checked. -| Metric | Weight | -| --- | ---: | -| `functional_area` | 0.1 | -| `reacquire_error_v` | 0.175000000000 | -| `track_error_v` | 0.175000000000 | -| `feedthrough_peak_v` | 0.112500000000 | -| `hold_drift_v` | 0.112500000000 | -| `hold_error_v` | 0.112500000000 | -| `pedestal_abs_v` | 0.112500000000 | -| `clock_energy_j` | 0.100000000000 | +The targets above affect continuous quality only. A complete feasible reference is allowed to miss them; there is no minimum qualifying score. ## Tools and Submission diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/case.toml b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/case.toml index fcd54686143da93ce46a49bfdb540b754523c4bb..108d26d71a69635549ea2f9456569f03e95b0346 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.sw_001_transmission_gate_pair" title = "Bidirectional CMOS Transmission Gate" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "8e811a4d7fee5768bd29ec38509effa8eb53045272d6009402d82dccd1d2c183" +sha256 = "94f651d65e8c2a1196c895a51e88aba6cc0b8b5e1d3dc7e2ee67684dcd14e1fd" [[assets]] path = "reference/sw_001_transmission_gate_pair.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-mos-rc-tt" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "a251ae653b52adca55dbcff41ffc6bb264bfda69bb216cba0f79e2c9ba34a7a1" +sha256 = "3c24869d3b94e3cc185342b56bedf9c15d0014bdfa58e0106c3d1032e17e0790" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "541f878fd2a9d6f0eab4f125d64563a2a2e56b0deb4fa7adef4d2db88adc11cf" subcircuit = "sw_001_transmission_gate_pair" +sha256 = "541f878fd2a9d6f0eab4f125d64563a2a2e56b0deb4fa7adef4d2db88adc11cf" [task.inputs.simulation] path = "materials/circuit.spice" @@ -49,12 +49,12 @@ sha256 = "864061d38ce90c87d8f9d9dd0025a54bc4f7f2932a45828b1c5bb20f4c6d4c0c" [task.inputs.forward] path = "materials/forward.spice" format = "spice" -sha256 = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +sha256 = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" [task.inputs.reverse] path = "materials/reverse.spice" format = "spice" -sha256 = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +sha256 = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" [task.constraints] quality = [ @@ -841,7 +841,6 @@ direction = "minimize" dimension = "response" normalization = "ratio" scale = 1 -lower = 0 category = "performance" observations = [ "condition_0:ron_ohm", @@ -860,12 +859,15 @@ baseline = [ "source_condition_5:ron_ohm", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "On-state resistance is the absolute port drop divided by actual source current; a negative resistance cannot represent the declared passive transmission path." + [[task.evaluation.metrics]] id = "on_current_a" unit = "A" aggregation = "max" direction = "minimize" -lower = 1e-09 category = "performance" observations = [ "condition_0:on_current_a", @@ -876,6 +878,10 @@ observations = [ "condition_5:on_current_a", ] +[task.evaluation.metrics.requirement] +lower = 1e-09 +rationale = "The 10 mV on-state port difference must produce a resolved current above the declared 1 nA observation floor. An open or unresolved path cannot establish the on-state resistance measurement." + [[task.evaluation.metrics]] id = "leakage_a" unit = "A" @@ -884,7 +890,6 @@ direction = "minimize" dimension = "bias" normalization = "ratio" scale = 1e-12 -lower = 0 category = "performance" observations = [ "condition_0:leakage_a", @@ -903,6 +908,10 @@ baseline = [ "source_condition_5:leakage_a", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Off-state leakage is an absolute current magnitude; a negative value cannot represent the declared leakage observation." + [[task.evaluation.metrics]] id = "kcl_a" unit = "A" @@ -924,9 +933,8 @@ unit = "V" aggregation = "max" direction = "minimize" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_6:tracking_error_v", @@ -957,15 +965,18 @@ baseline = [ "source_condition_17:tracking_error_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Tracking error is an absolute voltage difference; a negative value cannot represent the declared measurement." + [[task.evaluation.metrics]] id = "feedthrough_v" unit = "V" aggregation = "max" direction = "minimize" dimension = "response" -normalization = "ratio" +normalization = "saturating_ratio" scale = 0.0001 -lower = 0 category = "performance" observations = [ "condition_6:feedthrough_v", @@ -996,6 +1007,10 @@ baseline = [ "source_condition_17:feedthrough_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Feedthrough is an absolute voltage disturbance; a negative value cannot represent the declared measurement." + [[task.evaluation.metrics]] id = "hold_shift_v" unit = "V" @@ -1035,10 +1050,10 @@ baseline = [ ] [task.evaluation.pre_layout] -source_report_sha256 = "2ee3359ee064678a19b065a4c8c3a7dad7db185fd4a4c969ae96b2d7746d0145" +source_report_sha256 = "1d0f8db8ba72d24f8caec35c2e7a77e23b9ad9df552b842e63c8ce19b42403c8" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"ec7be417ea7b6e68e735126bb75d32d0f2f00b961da2b5d109d0c2c9d4908b14\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1085,6 +1100,10 @@ unit = "A" value = 292.5466697433025 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "58a1abad666a07a6380b16818f0a8955d27cdb06ca7d490f1d51163a963d4953" +off = "12d4ae5c8439feb0476a94857e23ac797279e178f9b34011f8cb1edb718c5300" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1130,6 +1149,10 @@ unit = "A" value = 292.545420521782 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "9adfd68a68f8901aad5d0329cae13bbddf8432401b3986dfc6efb3fc29df7889" +off = "dcc12d1fcb6de9bcc4d1784b778f6914910cfeb09455eac45e3a4d3cad4d159d" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1175,6 +1198,10 @@ unit = "A" value = 1082.684555546178 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "9a84dd32cccf53f0bdb4ea8666bc9ed26fa8ea74905de1e577cc82164f5bf7d8" +off = "4c0e855889c3168ef25a80099914be9056603ffd9b2eb1799031263a37f707d0" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1220,6 +1247,10 @@ unit = "A" value = 1082.684867482453 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "c35c96a5f8430fae7607df9bfd65f0883e8a1ef14c40810d6c7de55ce8e2ed46" +off = "e48a2d380ce6c3d79613779c8c31d9cfcd2be3b15f54325695ab791b1a5dedc0" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1265,6 +1296,10 @@ unit = "A" value = 892.7414339388932 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "997038bc723798714cf85838bd33a2a280351a668c7ca6e285c07c0543aebee9" +off = "623ba8be477303609539d6322ce82895f768d6f38f5757cf5b2b341826773904" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1310,6 +1345,10 @@ unit = "A" value = 892.7456236363698 unit = "ohm" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "8dc129194093ea5b94a5f5ab0bbfc57caee6e7eac06e27ad7c884163768f522b" +off = "f8eebd571895f5cd3ea6277b37202f4352e9e00e436b579086dafa00c52c4157" + [task.evaluation.pre_layout.jobs.source_condition_6] operation = "circuit.simulate" @@ -1335,7 +1374,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_6.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_6.measurements.feedthrough_v] @@ -1350,6 +1389,10 @@ unit = "V" value = 3.592214749999999e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_6.output_sha256] +op = "3215aaf3ecbd84b8c454569b3e5ac517c0d771c8c00adf436d767812b47763cc" +transient = "3b57c22d10716375c7d16b2a1028be77433d23e76b02e41b04e740ad9fee5e2c" + [task.evaluation.pre_layout.jobs.source_condition_7] operation = "circuit.simulate" @@ -1375,7 +1418,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_7.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_7.measurements.feedthrough_v] @@ -1390,6 +1433,10 @@ unit = "V" value = 0.0019943776825 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_7.output_sha256] +op = "8033f89bebcbf15c1ed0816b8ed959ee2c9f6239db4291c89c03880ab672c8f5" +transient = "9d7a9c5725ec168dd8c835ef95bc882ca624d2ef3008e81b9ea0f8f643e2d908" + [task.evaluation.pre_layout.jobs.source_condition_8] operation = "circuit.simulate" @@ -1415,7 +1462,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_8.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_8.measurements.feedthrough_v] @@ -1430,6 +1477,10 @@ unit = "V" value = 1.70384e-09 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_8.output_sha256] +op = "9199e552f16eae6c38cab118fad5db54f66118058670bbedcaeef6571e3d7040" +transient = "369d8583ec42c4964d77859e3aa873345c9d438d21a0e0478454bf1337a1ced1" + [task.evaluation.pre_layout.jobs.source_condition_9] operation = "circuit.simulate" @@ -1455,7 +1506,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_9.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_9.measurements.feedthrough_v] @@ -1470,6 +1521,10 @@ unit = "V" value = 0.006039576375 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_9.output_sha256] +op = "3cc141f8bcaeaf8d46785b407c59185cabe98eb53404279bfddd31557f4cc8cd" +transient = "5de5a90cc0d13f5a5d94357d45868c659c49320f4aaab98762ea4edadc80308c" + [task.evaluation.pre_layout.jobs.source_condition_10] operation = "circuit.simulate" @@ -1495,7 +1550,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_10.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_10.measurements.feedthrough_v] @@ -1510,6 +1565,10 @@ unit = "V" value = 2.8690585e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_10.output_sha256] +op = "41a051c87f0a3376c326115e6a218d2241ac0fae4b861555913913d8ec5ef4f4" +transient = "389714a1c97e9ee53e991123d469c9e95f7d819481ec7d52e9e22cac7aaa74e3" + [task.evaluation.pre_layout.jobs.source_condition_11] operation = "circuit.simulate" @@ -1535,7 +1594,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_11.input_sha256] -deck = "bcc2a19f30f00a56351532f9d75a5236d1c0063fb09d2b88f9b6a70bf1b29aa1" +deck = "d8ea737f5eb6ecf9db58db71c05a6dc11b214eaa01dec971b3526a9f55647d4c" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_11.measurements.feedthrough_v] @@ -1550,6 +1609,10 @@ unit = "V" value = 0.005029772400000001 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_11.output_sha256] +op = "252fe027f4dff9a47c0b9059335948891fccbeb3a35fc49d4f175db08587c515" +transient = "592b88d1d31e4229bb881150adf430cb7f945d7e4f3bba87f1f160175d8a605c" + [task.evaluation.pre_layout.jobs.source_condition_12] operation = "circuit.simulate" @@ -1575,7 +1638,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_12.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_12.measurements.feedthrough_v] @@ -1590,6 +1653,10 @@ unit = "V" value = 3.592214749999999e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_12.output_sha256] +op = "2c4ec32c2a61accac0b7d87da33c506655f0eea224679a664b75f6469473e673" +transient = "dfc3f4c18d072edec9c88862a47173f7dd01531301000579c05d9cadf31dfbf7" + [task.evaluation.pre_layout.jobs.source_condition_13] operation = "circuit.simulate" @@ -1615,7 +1682,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_13.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_13.measurements.feedthrough_v] @@ -1630,6 +1697,10 @@ unit = "V" value = 0.0019943776825 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_13.output_sha256] +op = "accdb669fafbf63248f81e5903b4e43deee4c63b986dce2991a69dcd00fd2d32" +transient = "15ec8310563b92c68c21c5ba54687b47c9309d93bd366f5a57e5ecebdf204f47" + [task.evaluation.pre_layout.jobs.source_condition_14] operation = "circuit.simulate" @@ -1655,7 +1726,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_14.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_14.measurements.feedthrough_v] @@ -1670,6 +1741,10 @@ unit = "V" value = 1.70384e-09 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_14.output_sha256] +op = "d3234f6c8a21b253557130d1762e5c5ff4014ebee6063f4b1d4da1d727b78323" +transient = "71a914cb9218ca358843b036761baff0627b1ac76ce58b34f5b8782fb00003f8" + [task.evaluation.pre_layout.jobs.source_condition_15] operation = "circuit.simulate" @@ -1695,7 +1770,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_15.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_15.measurements.feedthrough_v] @@ -1710,6 +1785,10 @@ unit = "V" value = 0.006039576375 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_15.output_sha256] +op = "27bbdbf492cf306ca15b6aaa1c98d99244246476fe3bc84fa5329bda89f54afa" +transient = "b71281f7e635f071e27510e4959776402ea76b401635b053fec5017ef6928f1b" + [task.evaluation.pre_layout.jobs.source_condition_16] operation = "circuit.simulate" @@ -1735,7 +1814,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_16.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_16.measurements.feedthrough_v] @@ -1750,6 +1829,10 @@ unit = "V" value = 2.8690585e-08 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_16.output_sha256] +op = "186291199664a48c1b92478fde7811377c28c6c8ac246050073249aa4b4cc72d" +transient = "ac18ae6f0e08a54c026ad7abd8a85fd36c6121cec9aa797f47d7b8a213d83beb" + [task.evaluation.pre_layout.jobs.source_condition_17] operation = "circuit.simulate" @@ -1775,7 +1858,7 @@ op = "op.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_17.input_sha256] -deck = "0ba443ecbb534fa350a2200cadffdcc5182806d0398fbcdcd3fcf51f06aed0e8" +deck = "6ddd7fbfd989ab09a10c4127ca4746a6b93f33e5469bb63375bf39c904ecafe2" dut = "e8db280b7f1bff9218d038f96d04fc05491137bde1c0b57fac0430e3c5506a3e" [task.evaluation.pre_layout.jobs.source_condition_17.measurements.feedthrough_v] @@ -1790,6 +1873,10 @@ unit = "V" value = 0.005029772400000001 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_17.output_sha256] +op = "1b58ce40e4efc4576e14b2feaf387888c6565664854f4cf8ce7576d69c53df4f" +transient = "4cf320808877a9e28bf0b1ff6826508b8174ad574d54d574d18b7eb7f342d872" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1802,7 +1889,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1813,7 +1900,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/analog-db-klayout" profile = "drc-upstream.json" @@ -1826,7 +1913,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/analog-db-klayout" profile = "lvs-upstream.json" @@ -1839,7 +1926,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/analog-db-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1851,7 +1938,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1861,7 +1948,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-db-analog-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/forward.spice b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/forward.spice index b99e5b7dd1f2d439b06d96f5eb6623bc3ee5d6d3..c5b0a72b1b7026f1ec9d5a8d6a86077c76258795 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/forward.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/forward.spice @@ -21,7 +21,8 @@ set numdgt=15 set measdgt=15 op write op.raw all -tran .05n 180n 0 .05n +save v(drive) v(mid) v(pout) v(vctl) v(vctl_not) +tran .05n 110n 0 .05n let err=abs(v(pout)-v(drive)) let error_area=integ(err) meas tran error_start find error_area at=20n diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/reverse.spice b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/reverse.spice index c12b28a2355b2bd8e64b45333c546f6f5cc32309..28785f7808454a52ffad5ff3d8da0c0089ac52f8 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/reverse.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/reverse.spice @@ -21,7 +21,8 @@ set numdgt=15 set measdgt=15 op write op.raw all -tran .05n 180n 0 .05n +save v(drive) v(mid) v(pout) v(vctl) v(vctl_not) +tran .05n 110n 0 .05n let err=abs(v(pout)-v(drive)) let error_area=integ(err) meas tran error_start find error_area at=20n diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/schematic.svg index 91b54eadf5d4d8433f612d873c50c7b289b91afe..459da922f634235cb84f9071c981580e2e9c56ce 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/schematic.svg @@ -1,2 +1,2 @@ -sw_001_transmission_gate_pair{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.sw_001_transmission_gate_pair","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/circuit.cdl","netlist_sha256":"541f878fd2a9d6f0eab4f125d64563a2a2e56b0deb4fa7adef4d2db88adc11cf","project_sha256":"15a8a1ff7015c1c262c2c0360842315c852084b5935e50d08a2920a969339a4c","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"flat-cdl-project: independent source/project flattened device comparison, schema parse, symbol resolution and netlist export.","license":"licenses/ihp-sg13g2/analog-db/","sheets":["sw_001_transmission_gate_pair"],"banks":[],"limitations":["Structured labelled overview, not a manually composed functional schematic. Equal net labels connect within a sheet.","Physical R/C/Q use external model bindings with X-prefixed internal references; substrate terminals absent from artwork are printed explicitly and retained electrically. Exported decks are for connectivity inspection, not replacement simulation decks.","Banks and pages preserve individual source devices without equivalent-device substitution. No interactive editor walkthrough is claimed."],"known_editor_diagnostics":{},"presentation":{"layout":"Labelled device and hierarchical bank overview","source_precision":"unchanged"},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["sw_001_transmission_gate_pair"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/schematic/sw_001_transmission_gate_pair.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.sw_001_transmission_gate_pairvctlvctl_notvddvsssubport_aport_bvctlsubvddwell_1port_aport_bvctl_notwell_1vssvsssubport_aport_bsw_001_transmission_gate_pairEqual net labels connect. All source devices and exact parameters are retained.RT0ptap1A=4e-12 P=8e-6MM1sg13_lv_nmosw=2u l=0.13um=1RT1ntap1A=4e-12 P=8e-6MM2sg13_lv_pmosw=2u l=0.13um=1RTSUBptap1A=4e-12 P=8e-6 -Complete single-sheet circuit. Equal net labels connect. +sw_001_transmission_gate_pair{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.sw_001_transmission_gate_pair","source_netlist":"tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/materials/circuit.cdl","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["sw_001_transmission_gate_pair"],"banks":[],"limitations":["Physical R/C/Q use external model bindings with X-prefixed internal references; the editable project retains the original terminals and model bindings. Exported decks are for connectivity inspection, not replacement simulation decks."],"known_editor_diagnostics":{},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["sw_001_transmission_gate_pair"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/design/sw_001_transmission_gate_pair.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.sw_001_transmission_gate_pairport_aport_bvctlvctl_notvssvddsubwell_1sw_001_transmission_gate_pairComplementary transmission pathMM1 · NMOSW/L 2/0.13 µm · m=1MM2 · PMOSW/L 2/0.13 µm · m=1NMOS bulk → subPMOS bulk → well_1Well and substrate contactsRT0ptap1 · A=4e-12 P=8e-6RTSUBptap1 · A=4e-12 P=8e-6RT1ntap1 · A=4e-12 P=8e-6 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/problem.md b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/problem.md index 0e5e11935c28c742406dce66335b3e4a3ed3339d..d7236c16902e85ab395a9667c75e1b7591f2de58 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_001_transmission_gate_pair/problem.md @@ -10,62 +10,50 @@ Implement `sw_001_transmission_gate_pair` with the complete fixed topology and m ## Operating Conditions -1.5 V supply. DC on/off conditions use signal common modes 0.15, 0.75 and 1.35 V and both signs of a 10 mV port difference. On controls are 1.5/0 V; off controls are 0/1.5 V. Ron is the absolute port drop divided by actual port-source current, accepted only above 1 nA and independently checked for the correct current direction. Off leakage uses held voltages at both terminals. Dynamic tests drive each direction separately through 100 ohm, with a 1 pF receiving load and 1 Mohm resistor to the selected common mode. Signal steps are common-mode ±50 mV with 1 ns edges starting at 20 ns; separate static-input runs isolate control feedthrough. Complementary controls turn off at 70 ns for 60 ns, with matched 1 ns edges, no extra overlap/dead interval. Runs start from DC and end at 180 ns with maximum 50 ps steps. The finite receiving resistance defines the off-node behavior physically. The isolated window-marker source only schedules exact time breakpoints; it connects to no DUT terminal. +1.5 V supply. DC on/off conditions use signal common modes 0.15, 0.75 and 1.35 V and both signs of a 10 mV port difference. On controls are 1.5/0 V; off controls are 0/1.5 V. Ron is the absolute port drop divided by actual port-source current, accepted only above 1 nA and independently checked for the correct current direction. Off leakage uses held voltages at both terminals. Dynamic tests drive each direction separately through 100 ohm, with a 1 pF receiving load and 1 Mohm resistor to the selected common mode. Signal steps are common-mode ±50 mV with 1 ns edges starting at 20 ns; separate static-input runs isolate control feedthrough. Complementary controls turn off at 70 ns for 60 ns, with matched 1 ns edges, no extra overlap/dead interval. Runs start from DC and end at 110 ns with maximum 50 ps steps. The finite receiving resistance defines the off-node behavior physically. The isolated window-marker source only schedules exact time breakpoints; it connects to no DUT terminal. -All source/candidate jobs share exactly the same fixtures, parameters, nominal TT models and 27 C temperature. Testbench control blocks and frozen runtime parameters define all stimulus and measurement details. Source simulation is independent of the reference GDS. No paper or data-sheet performance number is an acceptance threshold. +Source and candidate jobs use exactly the same test apparatus, parameters, nominal TT models and 27 C temperature. Stimuli and measurements follow the testbench control block and frozen runtime parameters. Source simulation is independent of reference GDS; paper or datasheet performance is not an acceptance bound. ## Physical Requirements Submit a valid GDSII containing top cell `sw_001_transmission_gate_pair`, at most 10485760 bytes. Pass the pinned native DRC profile, named-interface LVS and functional outline checks. Maximum functional width/height are 5000/1000 um. The complete functional layer set is `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]` (layer/datatype pairs); text/annotation geometry is excluded. There are no case-local DRC waivers. Geometry bounds are generous task/resource limits, not an area score anchor. -Post-layout simulation must consume native candidate-GDS-derived distributed wire RC, retaining every physical MOS, resistor and capacitor. Native LVS alone does not substitute for PEX. Magic uses ideal well/substrate tap connections; source simulation retains native finite tap models. This boundary does not establish distributed substrate resistance or substrate-noise accuracy. +Post-layout simulation uses distributed wire RC from native candidate GDS and retains physical MOS, resistors and capacitors; LVS cannot replace PEX. Magic idealizes well/substrate contacts while source simulation retains finite native contact models; no distributed substrate resistance or noise accuracy is claimed. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. +The on-state 10 mV port difference must produce a resolved current above the 1 nA observation floor so that an open or unresolved path cannot establish a usable resistance. Resistance, leakage and absolute voltage disturbances must be nonnegative by their measurement definitions. These bounds have explicit rationales in `case.toml`; no upper resistance, leakage or tracking-error budget rejects an otherwise valid solution. + +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. Coefficient 3 covers local bidirectional analog conduction and loaded control transitions. Tracking error is integrated over exactly 20–60 ns; control-edge excursion uses the inclusive 69–75 ns sample window; held mean shift compares 90–100 ns with 65–69 ns. These are loaded feedthrough/hold observations, not an intrinsic charge-injection constant or perfect floating-node retention. No energy score is claimed: body-rail current alone cannot measure control and signal-driver energy. -Every required condition must yield finite, valid measurements and pass the functional bounds below. Missing or invalid extraction/measurements are evaluation errors, not low performance scores. +Every required condition must produce finite, valid measurements and pass the functional bounds below. Missing or invalid extraction/measurements are evaluation errors and cannot be replaced by a low performance score. + +`tracking_error_v`, `feedthrough_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. -| Metric | Unit | Definition | Dimension / normalization | Functional bounds | +| Metric | Unit | Definition | Dimension / normalization | Functional range | | --- | --- | --- | --- | --- | | `ron_ohm` | ohm | 10 mV DC port drop divided by measured port current | response / ratio; scale 1 | lower=0 | | `on_current_a` | A | Absolute DC on current; excludes numerical-noise division | unscored / functional | lower=1e-09 | | `leakage_a` | A | Off-state current with both ports held at defined voltages | bias / ratio; scale 1e-12 | lower=0 | | `kcl_a` | A | External KCL including control and body sources | diagnostic; unscored | Producer validity guard; see below | -| `tracking_error_v` | V | Mean loaded dynamic tracking error, 20–60 ns | response / ratio; scale 0.0001 | lower=0 | -| `feedthrough_v` | V | Output excursion during turn-off, 69–75 ns | response / ratio; scale 0.0001 | lower=0 | +| `tracking_error_v` | V | Mean loaded dynamic tracking error, 20–60 ns | response / saturating_ratio; scale 0.0001 | lower=0 | +| `feedthrough_v` | V | Output excursion during turn-off, 69–75 ns | response / saturating_ratio; scale 0.0001 | lower=0 | | `hold_shift_v` | V | Finite loaded hold mean 90–100 ns minus 65–69 ns | response / target; scale 0.1 | Finite measurement | -Target normalization preserves the source operating point/transfer using its declared voltage or gain scale. Ratio floors prevent zero-error/noise-floor division; they are numerical normalization units, not acceptance tolerances. Voltage bounds are the declared physical rails; producer validity guards distinguish measurements from numerical noise. There is no source-relative performance hard cutoff. +Target normalization uses declared voltage or gain scales to preserve the source operating point/transfer. Ratio floors prevent division by zero at zero error or the noise floor; they are numeric normalization units, not acceptance tolerances. Voltage bounds are the declared supply rails; measurement-generator validity checks distinguish measurements from numerical noise. No hard cutoff relative to source performance is imposed. The area anchor is **300 um²**: twice the sum of `(W + 6 um) × (L + 8 um)` over every expanded MOS and physical passive unit (2 units, sum 130.080000 um²), rounded upward to 100 um². Contact/well/tap/isolation envelopes are included in the 6/8 um allowances; the factor two allows routing. This is an engineering compact-footprint estimate, independent of measured witness area, not a foundry minimum or demonstrated optimum. Task coefficient: **3**. - ### Score weights Transmission/chopper switches: on-state conduction 21.4%; off-state leakage 17.1%; transfer fidelity 25.7%; switching disturbance 25.7%; area 10%. Each objective's weight is divided equally among its metrics. @@ -83,7 +71,7 @@ Transmission/chopper switches: on-state conduction 21.4%; off-state leakage 17.1 Solve budget: **8 hours**. -Use the runtime task and reviewed PDK resource bundle for the declared native checks, extraction and ngspice measurements. Write `output/final.gds` with the required top cell, then explicitly submit its path through the session submission interface; creating a file alone is not submission. Reference GDS, qualification results and development sources are excluded from standard solver inputs. +Use the runtime task and reviewed PDK resources to complete the declared native checks, extraction and ngspice measurements. Write the required top cell to `output/final.gds`, then explicitly submit its path through the session interface; file generation alone is not submission. Reference GDS, qualification results and development sources are not standard solver inputs. The source and extracted-candidate decks require absolute external DC current conservation residual `kcl_a <= 1e-09 A`. A larger residual aborts diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/case.toml b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/case.toml index e099871fc055d77991d428e61ba3a6f63087165f..bf04c33678788ddb4e5ec27df15ab6ed2e74deb4 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.sw_002_chopper_diff" title = "Differential Polarity-Commutating Switch" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "fa4c4d63813ca0aa7541f21faf9f9da68ab514a8f57801802adad49dbfd8f85e" +sha256 = "93ebbb5de37e1d03b341bd3092195b5ce758de94cb8371f422568b9fb44c99c4" [[assets]] path = "reference/sw_002_chopper_diff.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-sw_002_chopper_diff-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "a0744dca5b491bfc88ae32b27b4b31422112b7617fed60c142bc7a632a64e786" +sha256 = "3d6449d3cd608efb8e7be158e8f07b08b4646e67508c18fa5aa7826cbd74afbb" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "e0b1c58cdd6e35af46612beae826db9d950ca0e83ddb0297ee224699fd9c3c7a" subcircuit = "sw_002_chopper_diff" +sha256 = "e0b1c58cdd6e35af46612beae826db9d950ca0e83ddb0297ee224699fd9c3c7a" [task.inputs.performance] path = "materials/testbench.spice" @@ -516,9 +516,12 @@ baseline = [ "source_condition_3:ron_p", ] normalization = "ratio" -lower = 0 scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "ron_n" category = "performance" @@ -539,9 +542,12 @@ baseline = [ "source_condition_3:ron_n", ] normalization = "ratio" -lower = 0 scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "transfer" category = "performance" @@ -583,10 +589,13 @@ baseline = [ "source_condition_2:common_error_v", "source_condition_3:common_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "straight_gain" category = "performance" @@ -650,10 +659,13 @@ baseline = [ "source_condition_2:common_glitch_v", "source_condition_3:common_glitch_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "differential_glitch_v" category = "performance" @@ -673,10 +685,13 @@ baseline = [ "source_condition_2:differential_glitch_v", "source_condition_3:differential_glitch_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "input_charge_c" category = "performance" @@ -697,9 +712,12 @@ baseline = [ "source_condition_3:input_charge_c", ] normalization = "ratio" -lower = 0 scale = 1e-21 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "clock_power_w" category = "performance" @@ -720,14 +738,17 @@ baseline = [ "source_condition_3:clock_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [task.evaluation.pre_layout] -source_report_sha256 = "10298701f3b60e4e8a6d9229cea91beeb7c108cfb6a2381344986541ac5199e0" +source_report_sha256 = "b4624050ff057da06354429099abd3c7693f5295025317a49755bf2634813a0c" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a5fb74b539734100712b0940a9cd07c4299cf0e803ff8e4831105b2f431bd92d\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -806,6 +827,11 @@ unit = "V/V" value = 0.9014683949203 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "4c7512dd78e64a47b4d477c48f2e13eacaefb2a7076264178c347d17c9b94701" +switching = "10a226fddc532d7fcea42bb2fc79e15d3b9c61bfb697b5cb2999737238550593" +injection = "b89b80030884ec3d5eb4469a2660269da67fcc22618557f98ad7a3e3e69e3911" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -883,6 +909,11 @@ unit = "V/V" value = 0.9014683949203 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "e5582011ca5fa14b7474e87912b7cc99394e79b43cde9348650925945a3b0369" +switching = "5f663421c07fae455a972d499f9dd6322efe65b2b3024ceee63b8189b18627e4" +injection = "b89b80030884ec3d5eb4469a2660269da67fcc22618557f98ad7a3e3e69e3911" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -960,6 +991,11 @@ unit = "V/V" value = 0.9014683949203 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "b94fa9596602bf92532d9acfcafe40665493a8aa841f68c47c2d41632cfff2cf" +switching = "10a226fddc532d7fcea42bb2fc79e15d3b9c61bfb697b5cb2999737238550593" +injection = "b89b80030884ec3d5eb4469a2660269da67fcc22618557f98ad7a3e3e69e3911" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1037,6 +1073,11 @@ unit = "V/V" value = 0.9014683949203 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "e491cfcd58567101a26cebeea9674e0dd627a38565821899c23f386566dde1f1" +switching = "5f663421c07fae455a972d499f9dd6322efe65b2b3024ceee63b8189b18627e4" +injection = "b89b80030884ec3d5eb4469a2660269da67fcc22618557f98ad7a3e3e69e3911" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1049,7 +1090,7 @@ unit = "V/V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1060,7 +1101,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1073,7 +1114,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1086,7 +1127,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1098,7 +1139,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1108,7 +1149,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/input-pair-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/schematic.svg index 440858580d88e987c05481ddd4c57374684589bd..fe792131ab4a6634c062cc4fc19b3adc0f4683bc 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/schematic.svg @@ -1 +1,2 @@ -sw_002_chopper_diff{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.sw_002_chopper_diff", "netlist_sha256": "e0b1c58cdd6e35af46612beae826db9d950ca0e83ddb0297ee224699fd9c3c7a", "project_sha256": "9688ee045a0070095fdd875806f925d3076d72538faad8cdcf637f6823e8812a", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["sw_002_chopper_diff"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}sw_002_chopper_diffvb_nvctlva_pvb_pva_nvctl_notvsssubvddwellvb_pvctl_notva_pvb_nva_nvctlva_pva_nvb_pvb_nvctlvctl_notvddvsssw_002_chopper_diffihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Straight-through phaseMM22/0.13MM42/0.13MM12/0.13MM32/0.13P bulk → wellN bulk → sub02 Cross-connected phaseMM62/0.13MM82/0.13MM52/0.13MM72/0.13P bulk → wellN bulk → sub03 Substrate contacts / repeated banksRRptap1A=130 µm²RRntap1A=65 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 \ No newline at end of file +sw_002_chopper_diff{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.sw_002_chopper_diff","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["sw_002_chopper_diff"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["sw_002_chopper_diff"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/design/sw_002_chopper_diff.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.sw_002_chopper_diffvb_nvctlva_pvb_pva_nvctl_notvsssubvddwellvb_pvctl_notva_pvb_nva_nvctlva_pva_nvb_pvb_nvctlvctl_notvddvsssw_002_chopper_diffihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresStraight-through phaseMM22/0.13MM42/0.13MM12/0.13MM32/0.13P bulk → wellN bulk → subCross-connected phaseMM62/0.13MM82/0.13MM52/0.13MM72/0.13P bulk → wellN bulk → subBulk tapsRRptap1A=130 µm²RRntap1A=65 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/problem.md b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/problem.md index beda4c1f2b401e891cbb4ec5867309e14a98829a..04298a911e4d9fa5385247c5cf43eaddb8acb2f6 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_002_chopper_diff/problem.md @@ -9,7 +9,7 @@ Implement `sw_002_chopper_diff` in ihp-sg13g2 and submit self-contained GDS. Eig `materials/circuit.cdl` is the authoritative physical circuit. `materials/circuit.spice` is its equivalent simulator model-call representation. `materials/testbench.spice` defines measurements, and this problem is the description input. Ordered ports: `va_p va_n vb_p vb_n vctl vctl_not vdd vss`. In order: Positive input, negative input, positive output, negative output, direct-path clock, complementary clock, supply, and return. -Preserve connectivity, W/L/m, passive geometry and body connections. Provide physical contacts. Placement and routing are free; splitting and source/drain interchange are allowed only under the declared LVS equivalences. No statistical matching or common-centroid constraint is scored. Ideal external sources, loads and fixtures belong to the testbench, not the DUT. +Preserve connectivity, W/L/m, passive geometry and body terminals, with physical contacts. Placement and routing are free; splitting and source/drain exchange must satisfy the declared LVS equivalence rules. Statistical matching and common-centroid placement are unscored. Ideal external sources, loads and test apparatus belong to the testbench, outside the DUT. ## Operating Conditions @@ -27,49 +27,34 @@ Every scored simulation consumes the submitted GDS-derived distributed wiring RC All 4 operating conditions must complete. Every finite observation must meet its inclusive band; aggregation cannot hide a failing condition. Missing measurements/crossings or incomplete extraction do not establish success. -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`common_error_v`, `common_glitch_v`, `differential_glitch_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `ron_p` | Absolute (selected positive-output input minus V(vb_p)) / current through its 10 kohm load | ohm | minimize / ratio | 0 … +∞ | 1e-06 | | `ron_n` | Absolute (selected negative-output input minus V(vb_n)) / current through its 10 kohm load | ohm | minimize / ratio | 0 … +∞ | 1e-06 | | `transfer` | DC output differential divided by the selected signed input differential | V/V | target / target | −∞ … +∞ | 1.0 | -| `common_error_v` | Absolute DC output common-mode minus 0.75 V | V | minimize / ratio | 0 … +∞ | 1e-06 | +| `common_error_v` | Absolute DC output common-mode minus 0.75 V | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | | `straight_gain` | Output differential / input differential at 4 us | V/V | target / target | −∞ … +∞ | 1.0 | | `crossed_gain` | Output differential / input differential at 9 us | V/V | target / target | −∞ … +∞ | 1.0 | -| `common_glitch_v` | Maximum absolute output common-mode minus 0.75 V over 1–1.1 us with equal inputs | V | minimize / ratio | 0 … +∞ | 1e-06 | -| `differential_glitch_v` | Maximum absolute output differential over 1–1.1 us with equal inputs | V | minimize / ratio | 0 … +∞ | 1e-06 | +| `common_glitch_v` | Maximum absolute output common-mode minus 0.75 V over 1–1.1 us with equal inputs | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | +| `differential_glitch_v` | Maximum absolute output differential over 1–1.1 us with equal inputs | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | | `input_charge_c` | Absolute integral of I(VAP)+I(VAN) over 1–1.1 us with equal inputs | C | minimize / ratio | 0 … +∞ | 1e-21 | | `clock_power_w` | Average positive supplied power from both clock sources over 2–12 us with equal inputs; returned energy is not credited | W | minimize / ratio | 0 … +∞ | 1e-12 | -Area reference: **459.68 um2**. 10 expanded device instances; sum of device/contact envelopes 278.7760 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **459.68 um2**. The expanded circuit has 10 device instances, a sum of device/contact envelopes 278.7760 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights @@ -93,4 +78,4 @@ Transmission/chopper switches: on-state conduction 23.7%; transfer fidelity 28.4 Solve budget: **3 hours**. -Use reviewed resources from `/protocol/resources.json`. KLayout checks, Magic extracts RC, and ngspice simulates. Frozen constraints and requirements are in `/protocol/task.json`; `/protocol/harness.json` describes the harness. If available, use the published `process-feedback` helper for interim checks. Write `/workspace/output/final.gds` and explicitly submit using `python -I /protocol/submit.py`. +Use the reviewed resources in `/protocol/resources.json`: KLayout for checks, Magic for RC extraction and ngspice for simulation. Frozen constraints and requirements are in `/protocol/task.json`; the runtime protocol is in `/protocol/harness.json`. If `process-feedback` is provided, its public helpers may be used for intermediate checks. Write `/workspace/output/final.gds`, then run `python -I /protocol/submit.py` to submit explicitly. diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/case.toml b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/case.toml index 81811830618c82166650350fa9dd597d77f86a2f..fb245f55811a7a66a8382de3fbc0e8992291f762 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/case.toml @@ -1,15 +1,15 @@ -in_core = true kind = "layout_case" id = "ihp-sg13g2.analog-db.sw_003_binary_capbank" title = "Three-Bit MIM Capacitive Transfer Bank" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "a534ad20d5a346f4e4d38ac68d585fada41fd2a2c978859271113b903572b775" +sha256 = "3aa32a062f793570fe03d1565accf69434e99586adedbb8af23d6ac93b6b3db7" [[assets]] path = "reference/sw_003_binary_capbank.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-sw_003_binary_capbank-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "aeef74a68b4a85bc3aec3b0492c0e8eed5c6e7d33e6d6c808c725ac573a42ae9" +sha256 = "43a6d81e25d3fd800596536e0ccb023d3f062049010cc3ebd72b0323bb71e57f" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "dec8a6b73b1345482fdf6cf69f3065c000b7cf50ddebe04ee1738603f0b24c77" subcircuit = "sw_003_binary_capbank" +sha256 = "dec8a6b73b1345482fdf6cf69f3065c000b7cf50ddebe04ee1738603f0b24c77" [task.inputs.performance] path = "materials/testbench.spice" @@ -46,6 +46,11 @@ path = "materials/circuit.spice" format = "spice" sha256 = "0385c1b450e49529f85643ca78e130f0f969b0694f186b5c18588e2a1179400d" +[task.inputs.transition] +path = "materials/transition.spice" +format = "spice" +sha256 = "78b48b82937ed5e28306b52c1a2c960d513b81c4daf76f4f6972573adf234f7c" + [task.constraints] quality = [ { id = "area", type = "functional_bbox_area", layers_from = "outline" }, @@ -247,19 +252,21 @@ mode = "post_layout" [task.evaluation.scoring] method = "layout" area_metric = "functional_area" -area_target = 9532.78 -rationale = "Binary capacitor bank: code transfer accuracy 54%; recovery 27%; phase 9%; area 10%. Each objective's weight is divided equally among its metrics. Redundant transfer and loading observations are retained with zero weight; their measurement validity and bounds still apply." +area_target = 7626.224 +rationale = "Binary capacitor bank: code transfer accuracy 54%; recovery and 011-to-100 transition response 27%; phase 9%; area 10%. Within the 27% budget, return error is 13.5%, static settling error 4.5%, code midpoint time 4.5%, and transition settling error 4.5%. Redundant transfer and loading observations retain zero weight; their measurement validity and bounds still apply." [task.evaluation.scoring.weights] functional_area = 0.1 gain_error = 0.27 step_error = 0.27 return_error_v = 0.135 -settling_error_v = 0.135 +settling_error_v = 0.045 phase_deg = 0.09 gain_vv = 0.0 input_cap_f = 0.0 step_gain = 0.0 +code_midpoint_time_ns = 0.045 +transition_settling_error_v = 0.045 [[task.evaluation.jobs]] id = "artifact" @@ -603,6 +610,25 @@ settling_error_v = "V" ac = "ac.raw" transient = "transient.raw" +[[task.evaluation.jobs]] +id = "code_transition" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:transition" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +code_midpoint_time_ns = "ns" +transition_settling_error_v = "V" + +[task.evaluation.jobs.parameters.exports] +transient = "transition.raw" + [[task.evaluation.metrics]] id = "functional_area" category = "physical" @@ -701,9 +727,12 @@ baseline = [ "source_condition_7:input_cap_f", ] normalization = "ratio" -lower = 0 scale = 1e-21 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared response magnitude, impedance, capacitance, amplitude or absolute return-ratio diagnostic has a nonnegative measurement domain; its value remains a quality or diagnostic observation." + [[task.evaluation.metrics]] id = "gain_error" category = "performance" @@ -731,10 +760,13 @@ baseline = [ "source_condition_6:gain_error", "source_condition_7:gain_error", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-09 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "step_gain" category = "performance" @@ -792,10 +824,13 @@ baseline = [ "source_condition_6:step_error", "source_condition_7:step_error", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-09 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "return_error_v" category = "performance" @@ -823,10 +858,13 @@ baseline = [ "source_condition_6:return_error_v", "source_condition_7:return_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "settling_error_v" category = "performance" @@ -854,15 +892,57 @@ baseline = [ "source_condition_6:settling_error_v", "source_condition_7:settling_error_v", ] -normalization = "ratio" +normalization = "saturating_ratio" +scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + +[[task.evaluation.metrics]] +id = "code_midpoint_time_ns" +category = "performance" +observations = [ + "code_transition:code_midpoint_time_ns", +] +baseline = [ + "source_code_transition:code_midpoint_time_ns", +] +unit = "ns" +direction = "minimize" +aggregation = "max" +dimension = "response" +normalization = "ratio" + +[task.evaluation.metrics.requirement] +lower = 0.0 +rationale = "The observed frequency or ordered-event interval has a nonnegative measurement domain, and its required crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "transition_settling_error_v" +category = "performance" +observations = [ + "code_transition:transition_settling_error_v", +] +baseline = [ + "source_code_transition:transition_settling_error_v", +] +unit = "V" +direction = "minimize" +aggregation = "max" +dimension = "response" +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0.0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [task.evaluation.pre_layout] -source_report_sha256 = "3091bdd0b961c98aa78a9a9d914848f306e64e260cb8000d5a0afffed52bee86" +source_report_sha256 = "a473410fe8b4f0f463c64682e9a7a5a7d2990c94787a0524635937e3db881234" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"76622a13818ba8797815afba002456e4568683ccb8ef8960078ce2c9369be8a7\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"dce84f0cb44c7192511c807348bb3852682b1b4ec71ee94055876cb79ccbbdb1\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -930,6 +1010,10 @@ unit = "V/V" value = 0.1249970499013 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +ac = "2df5e6b808ce8f81303de5741244a41633cbaa23a0efdaaaa769ea8351bfa279" +transient = "aca2089b7af8b6dac6b66c0d39a0562e8d8e5a3a2953c3bd949ddedf660fad9e" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -996,6 +1080,10 @@ unit = "V/V" value = 0.2499940990772 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +ac = "1b6c15467980b95c7584a038f899ef4735cfb05f7b1720387a2a03d0acf30ed5" +transient = "03f60dac3af87b822422e5f25eb152c76c616632a74cf217d4af9f59eb0350dd" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1062,6 +1150,10 @@ unit = "V/V" value = 0.3749911482528 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +ac = "5eeb9434ebceead669d92741956ca5dff6ec34336c54d91cfd63aff38ec7a928" +transient = "51ecacce54501396cf5c34a84b14ab0baa1aae4ac78f8c523d511067dd2baea3" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1128,6 +1220,10 @@ unit = "V/V" value = 0.4999881474285 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +ac = "85392e1cd23e188876a2b5d54dcb3e031142d92c262ce5137679e846d7d213e2" +transient = "8980f47eb42c2dd0449fce063e8123e367d993b492d14ae2283ef0e291b2119e" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1194,6 +1290,10 @@ unit = "V/V" value = 0.624984996604 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +ac = "2654f76497d29c0592ff66ec5e3a72fa43a19012aa11fbd5a66ecfc7e3dcf51b" +transient = "8c130ac154e68337f10b7c3059718ac3dba592b26a3b31c4f7e461204a5eaafa" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1260,6 +1360,10 @@ unit = "V/V" value = 0.7499824957796 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +ac = "6516d1fa791b43e7825a849ce0cb15f2ae95a9ebd68f3a05a77200f28d0ea229" +transient = "189bf47a705ceef32afd4c0110f35fe586a1b27e4077a0301fc75d53e05a3cf1" + [task.evaluation.pre_layout.jobs.source_condition_6] operation = "circuit.simulate" @@ -1326,6 +1430,10 @@ unit = "V/V" value = 0.8749794949554 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_6.output_sha256] +ac = "146518a5454e2ae5dbeeb816c67f149762f18956356972b25902d146485e1181" +transient = "8a1227272fbd78ea26a6235849faeed4815a29511b0ea28b9a1d8c5018ee3a22" + [task.evaluation.pre_layout.jobs.source_condition_7] operation = "circuit.simulate" @@ -1392,6 +1500,42 @@ unit = "V/V" value = 0.9999764941308 unit = "V/V" +[task.evaluation.pre_layout.jobs.source_condition_7.output_sha256] +ac = "a14436b64daf2a90926d137169bf17d5d2d9420f206c14c3ff0dbe4d4e4d160f" +transient = "cd261a39cb046f5e86f0c86d8ce86d3d18cbf08f5d38670144c82fba897af884" + +[task.evaluation.pre_layout.jobs.source_code_transition] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_code_transition.inputs] +deck = "input:transition" +dut = "input:simulation" + +[task.evaluation.pre_layout.jobs.source_code_transition.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_code_transition.parameters.measurements] +code_midpoint_time_ns = "ns" +transition_settling_error_v = "V" + +[task.evaluation.pre_layout.jobs.source_code_transition.parameters.exports] +transient = "transition.raw" + +[task.evaluation.pre_layout.jobs.source_code_transition.input_sha256] +deck = "78b48b82937ed5e28306b52c1a2c960d513b81c4daf76f4f6972573adf234f7c" +dut = "0385c1b450e49529f85643ca78e130f0f969b0694f186b5c18588e2a1179400d" + +[task.evaluation.pre_layout.jobs.source_code_transition.measurements.code_midpoint_time_ns] +value = 2.04692 +unit = "ns" + +[task.evaluation.pre_layout.jobs.source_code_transition.measurements.transition_settling_error_v] +value = 0.01418454 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_code_transition.output_sha256] +transient = "ba04995209e0cc01e8d2e25e78b903795956041dfdb48be102a67c2fb5ac6408" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1404,7 +1548,7 @@ unit = "V/V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1415,7 +1559,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1428,7 +1572,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -1441,7 +1585,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -1453,7 +1597,7 @@ timeout_seconds = 600 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -1463,7 +1607,10 @@ type = "ngspice-docker" support = "analog-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/input-pair-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/schematic.svg index a22c4d83b1df8153de28c9affbc8e9b5a0f1bcd7..9bac4328c98e6a1a8b5627ae4904490c928d26e2 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/schematic.svg @@ -1 +1,2 @@ -sw_003_binary_capbank{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.sw_003_binary_capbank", "netlist_sha256": "dec8a6b73b1345482fdf6cf69f3065c000b7cf50ddebe04ee1738603f0b24c77", "project_sha256": "1211f93fb10450c1e7ca7b6ea93b8fef69dfedf163d660aa2db263607e4ef0a2", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["sw_003_binary_capbank"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}sw_003_binary_capbankVCMbot0V_D1_NOTvinpV_D1VCMvoutbot1V_D2_NOTvinpV_D2VCMvoutbot2voutvinpVSSsubVDDwellvoutV_D0_NOTvinpV_D0vinpvoutVCMVDDVSSV_D0V_D0_NOTV_D1V_D1_NOTV_D2V_D2_NOTsw_003_binary_capbankihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Bit 0 — one unitMM20.15/0.13MM40.15/0.13MM10.15/0.13MM30.15/0.13CC2_025.9/25.9P bulk → wellN bulk → sub02 Bit 1 — two unitsMM60.15/0.13MM80.15/0.13MM50.15/0.13MM70.15/0.13CC3_025.9/25.9CC3_125.9/25.9P bulk → wellN bulk → sub03 Bit 2 — four unitsMM100.15/0.13MM120.15/0.13MM90.15/0.13MM110.15/0.13CC4_025.9/25.9CC4_125.9/25.9CC4_225.9/25.9CC4_325.9/25.9P bulk → wellN bulk → sub04 Fixed capacitorCC1_025.9/25.905 Substrate contacts / repeated banksRRptap1A=195 µm²RRntap1A=97.6 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim \ No newline at end of file +sw_003_binary_capbank{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.sw_003_binary_capbank","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["sw_003_binary_capbank"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/circuit.cdl","known_editor_diagnostics":{},"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["sw_003_binary_capbank"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/design/sw_003_binary_capbank.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.sw_003_binary_capbankVCMbot0V_D1_NOTvinpV_D1VCMvoutbot1V_D2_NOTvinpV_D2VCMvoutbot2voutvinpVSSsubVDDwellvoutV_D0_NOTvinpV_D0vinpvoutVCMVDDVSSV_D0V_D0_NOTV_D1V_D1_NOTV_D2V_D2_NOTsw_003_binary_capbankihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresBit 0MM20.15/0.13MM40.15/0.13MM10.15/0.13MM30.15/0.13CC2_025.9/25.9P bulk → wellN bulk → subBit 1MM60.15/0.13MM80.15/0.13MM50.15/0.13MM70.15/0.13CC3_025.9/25.9CC3_125.9/25.9P bulk → wellN bulk → subBit 2MM100.15/0.13MM120.15/0.13MM90.15/0.13MM110.15/0.13CC4_025.9/25.9CC4_125.9/25.9CC4_225.9/25.9CC4_325.9/25.9P bulk → wellN bulk → subFixed capacitorCC1_025.9/25.9Bulk tiesRRptap1A=195 µm²RRntap1A=97.6 µm²Models: sg13_lv_nmos · sg13_lv_pmos · ptap1 · ntap1 · cap_cmim + diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/transition.spice b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/transition.spice new file mode 100644 index 0000000000000000000000000000000000000000..08a9aeb6e6290ed24f9b2941b937018c9ea28d21 --- /dev/null +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/materials/transition.spice @@ -0,0 +1,37 @@ +* Nominal TT, 27 C code transition from 011 to 100. +.lib /workspace/support/models/cornerMOSlv.lib mos_tt +.lib /workspace/support/models/cornerRES.lib res_typ +.lib /workspace/support/models/cornerCAP.lib cap_typ +.include dut.spice +.include parameters.spice +.temp 27 +.option rshunt=1e12 method=gear maxord=2 +VDD vdd 0 1.5 +VI vinp 0 0.65 +VC vcm 0 0.75 +VD0 d0 0 PWL(0 1.5 10n 1.5 12n 0 30n 0) +VDN0 dn0 0 PWL(0 0 10n 0 12n 1.5 30n 1.5) +VD1 d1 0 PWL(0 1.5 10n 1.5 12n 0 30n 0) +VDN1 dn1 0 PWL(0 0 10n 0 12n 1.5 30n 1.5) +VD2 d2 0 PWL(0 0 10n 0 12n 1.5 30n 1.5) +VDN2 dn2 0 PWL(0 1.5 10n 1.5 12n 0 30n 0) +RL out 0 1e12 +XD vinp out vcm vdd 0 d0 dn0 d1 dn1 d2 dn2 sw_003_binary_capbank +.save v(out) +.control +set noaskquit +set numdgt=12 +tran 10p 30n 0 10p +meas tran initial_v find v(out) at=9n +meas tran final_v find v(out) at=30n +let midpoint_v=(initial_v+final_v)/2 +meas tran midpoint_time_s when v(out)=midpoint_v cross=1 +let code_midpoint_time_ns=(midpoint_time_s-10n)/1n +let transition_error=abs(v(out)-final_v) +meas tran transition_settling_error_v max transition_error from=12.1n to=30n +print initial_v final_v midpoint_time_s code_midpoint_time_ns +write transition.raw all +quit +.endc +.GLOBAL GND +.end diff --git a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/problem.md b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/problem.md index 005672f44a52ab911a96597b494d9d41f5e23f1d..6f30cace30695e19669dbebbd9646be1b5d3e332 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/sw_003_binary_capbank/problem.md @@ -2,17 +2,19 @@ ## Objective -Implement `sw_003_binary_capbank` in IHP SG13G2 and submit a self-contained GDS. Twelve minimum-size MOS (W/L = 0.15/0.13 um) select the bottom plates of a 1:1:2:4 MIM capacitor bank between vinp and VCM. Eight identical 25.85 by 25.85 um cap_cmim units implement those weights, each nominally about 1.00647 pF. Explicit physical substrate and well taps are included. For code k, the ideal capacitive transfer is (1+k)/8. Qualification covers all eight static codes and bipolar input steps at each fixed code; live code transitions, ADC conversion, charge redistribution after a code change and mismatch linearity are outside scope. +Implement `sw_003_binary_capbank` in IHP SG13G2 and submit a self-contained GDS. Twelve minimum-size MOS (W/L = 0.15/0.13 um) select the bottom plates of a 1:1:2:4 MIM capacitor bank between vinp and VCM. Eight identical 25.85 by 25.85 um cap_cmim units implement those weights, each nominally about 1.00647 pF. Explicit physical substrate and well taps are included. For code k, the ideal capacitive transfer is (1+k)/8. Qualification covers all eight static codes, bipolar input steps at each fixed code, and one specified synchronous live-code transition, 011→100. The transition check measures output midpoint-crossing time and settling under the simultaneous ideal selector waveforms below. It does not cover decoder skew, glitches, arbitrary code sequences, ADC conversion, or mismatch linearity. ## Inputs and Interface `materials/circuit.cdl` is the authoritative physical circuit; `materials/circuit.spice` is its equivalent simulator representation. `materials/testbench.spice` supplies measurement apparatus. This problem is the description input. The ordered ports are `vinp vout VCM VDD VSS V_D0 V_D0_NOT V_D1 V_D1_NOT V_D2 V_D2_NOT`: signal input, floating output, common-mode reference, supply/return and three independent pairs of complementary code controls. SPICE names are case-insensitive; preserve these physical labels. -Preserve connectivity, MOS W/L/m, capacitor dimensions and unit multiplicities, and body/tap connections. Placement and routing are free. Device splitting/combination and source/drain interchange are allowed only when accepted by the declared native LVS equivalences. No common-centroid or statistical matching requirement is scored. All specified ideal external sources, loads and measurement apparatus belong outside the DUT. +Preserve connections, MOS W/L/m, capacitor dimensions and cell multiplicities, and body terminals/contacts. Placement and routing are free; device splitting/merging and source/drain exchange must follow declared native LVS equivalence rules. Common-centroid geometry and statistical matching are not scored; ideal external sources, loads and measurement fixtures remain outside the DUT. ## Operating Conditions -Typical IHP low-voltage MOS, typical resistor and capacitor models at 27 C; VDD = 1.5 V and VSS = 0 V. Each node has the declared 1e12 ohm numerical shunt. Transient integration uses Gear order 2 with a 1 ns output and maximum step. Physical taps have finite source-model resistance; Magic treats well/substrate ties ideally. Distributed silicon substrate resistance, statistical mismatch, PVT, noise and RF/EM are outside scope. +Use typical IHP low-voltage MOS, resistor and capacitor models at 27 C, VDD=1.5 V and VSS=0 V. Each node has a declared 1e12 ohm numerical shunt. Transient uses second-order Gear with both output and maximum steps 1 ns. Source models retain finite body-contact resistance; Magic idealizes well/substrate connections. Distributed substrate resistance, statistical mismatch, PVT, noise and RF/EM are outside coverage. + +The separate code-transition deck uses the same TT, 27 C models and supply. Starting at 0 ns, the ideal complementary selector sources hold code 011 through 10 ns and switch synchronously over 2 ns to code 100. VINP is fixed at 0.65 V and VCM at 0.75 V. The transient ends at 30 ns and uses a 10 ps output and maximum step. Midpoint time is measured from the 10 ns transition start to the first output crossing of the midpoint between the 9 ns and 30 ns output values. Settling error is the maximum absolute deviation from the 30 ns output value over 12.1–30 ns, giving a 100 ps guard after the selector transition. These ideal simultaneous controls intentionally exclude decoder skew and glitch behavior. All eight binary codes are separate required conditions. Bit k is driven by 1.5*bk V and its complement by 1.5*(1-bk) V; controls remain static. VCM = 0.75 V. VINP has DC 0.65 V and unit AC amplitude. AC uses 50 points/decade from 1 kHz to 100 MHz; acceptance measurements are at 10 kHz. VINP stays at 0.65 V through 10 us, rises to 0.85 V at 10.002 us, holds through 30 us, returns to 0.65 V at 30.002 us and holds through 50 us. Vout has an external 1e12 ohm return to ground, in addition to the numerical shunt; no ideal external holding capacitor is added. Absolute output DC is not a retained sample requirement: measurements compare increments. The testbench expected-value voltage source is measurement apparatus only. @@ -20,55 +22,42 @@ All eight binary codes are separate required conditions. Bit k is driven by 1.5* The GDS top cell is `sw_003_binary_capbank`, with a 10 MiB maximum file size. Provide physical, correctly connected and accessible labeled interface metal; retain every named port. Pass IHP main and maximal DRC (density and antenna excluded for this standalone block), strict named-interface LVS and a functional bounding box no larger than 460 by 75 um. No DRC waivers are used. The functional footprint includes device, passive, implant, well and complete routing layers; excludes annotations/pin text and nonfunctional markers. Its explicit GDS layer/datatype set is `[[1, 0], [3, 0], [5, 0], [6, 0], [7, 0], [8, 0], [10, 0], [11, 0], [13, 0], [14, 0], [19, 0], [24, 0], [26, 0], [28, 0], [29, 0], [30, 0], [31, 0], [32, 0], [33, 0], [35, 0], [36, 0], [40, 0], [44, 0], [46, 0], [49, 0], [50, 0], [51, 0], [52, 0], [53, 0], [55, 0], [58, 0], [66, 0], [67, 0], [90, 0], [101, 0], [111, 0], [125, 0], [126, 0], [128, 0], [129, 0], [133, 0], [134, 0], [139, 0], [152, 0]]`. The area is the bounding-box area of those layers, not summed metal area. -The candidate GDS must pass artifact, DRC, LVS and hard geometry before extraction. Magic candidate-derived distributed interconnect resistance and capacitance, with zero coupling-capacitance threshold, feed the supplied testbench. Internal MIM devices remain in candidate extraction. Source simulation alone cannot establish acceptance. This is nominal block qualification, not fabrication signoff. +Candidate GDS first passes file, DRC, LVS and hard geometry checks; Magic then extracts distributed interconnect RC with zero coupling-capacitance threshold and retains internal MIM. The supplied testbench uses the candidate extracted circuit; source simulation cannot replace acceptance. This is nominal module verification, not manufacturing signoff. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +`gain_error`, `step_error`, `return_error_v`, `settling_error_v` and `transition_settling_error_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | | --- | --- | --- | --- | --- | --- | | `gain_vv` | Magnitude V(out)/V(vinp) at 10 kHz, unit AC input | V/V | target / target | −∞ … +∞ | 1.0 | | `phase_deg` | Phase of V(out)/V(vinp) at 10 kHz, in degrees | deg | target / target | −∞ … +∞ | 180 | | `input_cap_f` | Imaginary part of -I(VI), divided by 2 pi f at 10 kHz, unit AC input | F | minimize / ratio | 0 … +∞ | 1e-21 | -| `gain_error` | Absolute gain_vv minus (1+code)/8 | V/V | minimize / ratio | 0 … +∞ | 1e-09 | +| `gain_error` | Absolute gain_vv minus (1+code)/8 | V/V | minimize / saturating_ratio | 0 … +∞ | 1e-09 | | `step_gain` | [V(out) at 29 us minus V(out) at 9 us] / 0.2 V | V/V | target / target | −∞ … +∞ | 1.0 | -| `step_error` | Absolute step_gain minus (1+code)/8 | V/V | minimize / ratio | 0 … +∞ | 1e-09 | -| `return_error_v` | Absolute V(out) at 49 us minus V(out) at 9 us | V | minimize / ratio | 0 … +∞ | 1e-06 | -| `settling_error_v` | Maximum absolute V(out) minus its 29 us value, over 20–29 us | V | minimize / ratio | 0 … +∞ | 1e-06 | - -Area reference: **9532.78 um2**. 22 expanded device instances; sum of device/contact envelopes 6227.9559 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. +| `step_error` | Absolute step_gain minus (1+code)/8 | V/V | minimize / saturating_ratio | 0 … +∞ | 1e-09 | +| `return_error_v` | Absolute V(out) at 49 us minus V(out) at 9 us | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | +| `settling_error_v` | Maximum absolute V(out) minus its 29 us value, over 20–29 us | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | +| `code_midpoint_time_ns` | Time from the start of the simultaneous 011→100 selector transition (10 ns) until V(out) first crosses the midpoint between its 9 ns and 30 ns values | ns | minimize / ratio against same-condition source | 0 … +∞ | source-paired | +| `transition_settling_error_v` | Maximum absolute V(out) minus its 30 ns value, over 12.1–30 ns (after the 2 ns selector transition and a 100 ps guard) | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +The area scoring target is **7626.224 um2**, 80% of the engineering estimate 9532.78 um2. The estimate includes 22 device/contact envelopes totaling 6227.9559 um2, plus 50% routing and total 1.2 um outer allowance, using `ceil(100 * (1.5 * envelope_sum + 1.2 * sqrt(envelope_sum) + 1.2^2 / 4)) / 100`. This benchmark does not represent a process minimum or a verified achievable area, and the target is not a hard outline limit. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights -Binary capacitor bank: code transfer accuracy 54%; recovery 27%; phase 9%; area 10%. Each objective's weight is divided equally among its metrics. Redundant transfer and loading observations are retained with zero weight; their measurement validity and bounds still apply. +Binary capacitor bank: code transfer accuracy 54%; recovery and code-transition response 27%; phase 9%; area 10%. The 27% budget is split across return error (13.5%), static settling error (4.5%), code midpoint time (4.5%) and transition settling error (4.5%). Redundant transfer and loading observations are retained with zero weight; their measurement validity and bounds still apply. The ideal simultaneous selector sources do not model decoder skew or glitch behavior. | Metric | Weight | | --- | ---: | @@ -76,14 +65,16 @@ Binary capacitor bank: code transfer accuracy 54%; recovery 27%; phase 9%; area | `gain_error` | 0.270000000000 | | `step_error` | 0.270000000000 | | `return_error_v` | 0.135000000000 | -| `settling_error_v` | 0.135000000000 | +| `settling_error_v` | 0.045000000000 | | `phase_deg` | 0.090000000000 | | `gain_vv` | 0 | | `input_cap_f` | 0 | | `step_gain` | 0 | +| `code_midpoint_time_ns` | 0.045000000000 | +| `transition_settling_error_v` | 0.045000000000 | ## Tools and Submission Solve budget: **3 hours**. -Use the reviewed SG13G2 device/rule/model resources supplied through `/protocol/resources.json` and the task definitions in `/protocol/task.json`. KLayout supplies layout and physical checks; Magic supplies candidate RC; ngspice consumes the declared deck. Discover available feedback through the runtime harness protocol. Write `output/final.gds` in the workspace and explicitly submit that GDS through the submission protocol. Reference layouts, source checkouts and authoring scripts are not solver inputs. +Use reviewed SG13G2 devices/rules/models from `/protocol/resources.json` and the task from `/protocol/task.json`. KLayout handles layout and physical checks, Magic extracts candidate RC, and ngspice runs declared decks. Discover feedback through the runtime protocol and explicitly submit workspace `output/final.gds`; reference layouts, the source repository and author scripts are not solver inputs. diff --git a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/case.toml b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/case.toml index 8e4f883f75522c2a3969fd0885146213010e6093..dc131beb8a0b022839e49f0f53c8de2786bc7477 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.trm_001_vcr" title = "Resistor-Pullup NMOS Shunt Trim" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "ff616cfe4f634043a761d47f46a472e47d22dc21786455c00ef1ceec5bac68b4" +sha256 = "b883d8512d8989203231d48cefef7f73a6c12f8cfadf628b19bf13f6e185519d" [[assets]] path = "reference/trm_001_vcr.gds" @@ -28,18 +28,18 @@ environment = "ihp-sg13g2-trm_001_vcr-nominal-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "0c2f5dadb263805bc16a544355757812afdee9eb70fbb315782dab8964226709" +sha256 = "e2c8c1a1f25947957e3af9becc719986b911d97ebedf711c55d541b078fc970e" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "ed94062ae8c8856ffe51593d5134a9926c266e6620767f13d491a21ad288136a" subcircuit = "trm_001_vcr" +sha256 = "ed94062ae8c8856ffe51593d5134a9926c266e6620767f13d491a21ad288136a" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +sha256 = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" [task.inputs.simulation] path = "materials/circuit.spice" @@ -713,8 +713,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "power_w" @@ -744,9 +747,12 @@ baseline = [ "source_condition_7:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "high_v" category = "performance" @@ -763,8 +769,6 @@ observations = [ unit = "V" direction = "target" aggregation = "max" -lower = 0 -upper = 1.3 dimension = "response" normalization = "target" scale = 1.3 @@ -779,6 +783,11 @@ baseline = [ "source_condition_7:high_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + [[task.evaluation.metrics]] id = "low_v" category = "performance" @@ -795,8 +804,6 @@ observations = [ unit = "V" direction = "target" aggregation = "max" -lower = 0 -upper = 1.3 dimension = "response" normalization = "target" scale = 1.3 @@ -811,6 +818,11 @@ baseline = [ "source_condition_7:low_v", ] +[task.evaluation.metrics.requirement] +lower = 0 +upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." + [[task.evaluation.metrics]] id = "knee_code_v" category = "performance" @@ -840,8 +852,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "maximum_slope" @@ -872,7 +887,10 @@ baseline = [ ] normalization = "target" scale = 0.1 + +[task.evaluation.metrics.requirement] upper = 0.0 +rationale = "Increasing the NMOS shunt-control voltage must not raise the trim-node output; a positive slope violates the required monotonic control polarity." [[task.evaluation.metrics]] id = "span_v" @@ -903,8 +921,11 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [[task.evaluation.metrics]] id = "conductance_04_s" @@ -1023,10 +1044,13 @@ baseline = [ "source_condition_6:recovery_down_v", "source_condition_7:recovery_down_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "recovery_up_v" category = "performance" @@ -1054,10 +1078,13 @@ baseline = [ "source_condition_6:recovery_up_v", "source_condition_7:recovery_up_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The absolute error, voltage span, charge magnitude or recovery deviation has a nonnegative measurement domain; its positive value remains a continuously scored quality observation." + [[task.evaluation.metrics]] id = "mean_power_w" category = "performance" @@ -1086,9 +1113,12 @@ baseline = [ "source_condition_7:mean_power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit or driven switching network must consume nonnegative net supply/driver energy or quiescent current under the complete stated observation." + [[task.evaluation.metrics]] id = "step_span_v" category = "performance" @@ -1118,14 +1148,17 @@ baseline = [ ] normalization = "target" scale = 1.3 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.3 +rationale = "The declared node voltage or voltage span must remain within its ground-to-supply operating envelope; precision relative to the source remains a scored objective." [task.evaluation.pre_layout] -source_report_sha256 = "cb7ea64e4cca2955a9be0cc33944ebc073d8aa5eb7f2808406736bce5aa17b80" +source_report_sha256 = "a0c1cf2de8ac662a69a3f55cc157300d7ad7f683c06a98df1b4122cf70c78297" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:6562558774d43c085a289bbba696c55959eb8051a0996f96633451fbeb9c652d\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"06b4a65433e351755e628e84885680f49f640a6d979fcb4735c0dc65175310ad\", \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"a202c3d9d407fa71903be9db155aeb1eb3f9bccbb7ed18bfd0eaa1ea925dc151\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 600.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_condition_0] operation = "circuit.simulate" @@ -1167,7 +1200,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_0.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_0.measurements.conductance_04_s] @@ -1230,6 +1263,11 @@ unit = "V" value = 0.45347505 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_0.output_sha256] +op = "67b3589197003aa0f74264d95e8dd2261dd8fb1aae0ca51c5b9dd8788efd2f17" +control = "d4c5322b900af20788a5ee85104dadd45c6acdda0086f6edfa92cdba9ab22f12" +transient = "ae5d0f20b2bbda9eeba07927e99738fbb2e988517afc2d8f8412d2c1dee42b00" + [task.evaluation.pre_layout.jobs.source_condition_1] operation = "circuit.simulate" @@ -1270,7 +1308,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_1.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_1.measurements.conductance_04_s] @@ -1333,6 +1371,11 @@ unit = "V" value = 0.51343948 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_1.output_sha256] +op = "a91d6637be5fdf74c4a61ef4ae726592541374dae2ba6e98bf06603af69d78f2" +control = "2a67b592f42b1fe28b744ee9303204c200b4349c8c826d1689bcb38fcb66f603" +transient = "335b26fb926c7c7019c15b6db849f6b8c39ddf6cb90172f59a95e83928180173" + [task.evaluation.pre_layout.jobs.source_condition_2] operation = "circuit.simulate" @@ -1373,7 +1416,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_2.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_2.measurements.conductance_04_s] @@ -1436,6 +1479,11 @@ unit = "V" value = 0.29636584 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_2.output_sha256] +op = "6894da1d66906017dda27308ee31a6b6743ae649eb347dec72adbef4d88e87c0" +control = "3832bb0276caae111d09eba3723b3aa903504707c5e7714c9b0d2f44421362c9" +transient = "5fc4d4835719020bda841b96f6ade2174318a1cf50f0af2f7fba3bf647b689b2" + [task.evaluation.pre_layout.jobs.source_condition_3] operation = "circuit.simulate" @@ -1476,7 +1524,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_3.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_3.measurements.conductance_04_s] @@ -1539,6 +1587,11 @@ unit = "V" value = 0.32867677 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_3.output_sha256] +op = "2b4edd142c08a4ab45559df87c05ac7bb131895d43d1bfb1008fc9d73aff48a1" +control = "f734cd4556f23b1686ebdc7d8e3c9606fd3e420d960a06b88b7dec2c69bbb111" +transient = "1516c7c5391a04a8532112c8086a3e635f1450bad591c03e33b9af15da48d553" + [task.evaluation.pre_layout.jobs.source_condition_4] operation = "circuit.simulate" @@ -1579,7 +1632,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_4.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_4.measurements.conductance_04_s] @@ -1642,6 +1695,11 @@ unit = "V" value = 0.56264691 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_4.output_sha256] +op = "d21af867bbf07bc7266c75553753e3bdfef4240c1873752c068766130dd8f25f" +control = "8f033159ead9c809ebde734af107c2912b10a73f167758a401004241f25587a8" +transient = "81eb2489ca17e91c27e6efd6811938a25e117c04c3bbce2ed9c01f88bacfc09b" + [task.evaluation.pre_layout.jobs.source_condition_5] operation = "circuit.simulate" @@ -1682,7 +1740,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_5.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_5.measurements.conductance_04_s] @@ -1745,6 +1803,11 @@ unit = "V" value = 0.63795004 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_5.output_sha256] +op = "430818444832b6e9f7be0c4fb31160c354e1f914e82548a79d7a01f2f6494535" +control = "72e70f794998c8747b5a8831cab149d5ac4dfdfc3e9c8ae8fc1db8e8eee03c4c" +transient = "d84726704c5d3b2fc158db53fc9323a56835666f9e8086cea2d030f711bef363" + [task.evaluation.pre_layout.jobs.source_condition_6] operation = "circuit.simulate" @@ -1785,7 +1848,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_6.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_6.measurements.conductance_04_s] @@ -1848,6 +1911,11 @@ unit = "V" value = 0.3970159 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_6.output_sha256] +op = "3660382cf88437925556c2430f49ddc3a80c0ff6c44c78aef12033109461f356" +control = "b2383172c7b893c7e146b591807d0247cb53a68ea081b60fb8316dc2649fec25" +transient = "5921def91288bc65a1be850c703aabccbcbefa0847f0a13c4f67374ba12b493d" + [task.evaluation.pre_layout.jobs.source_condition_7] operation = "circuit.simulate" @@ -1888,7 +1956,7 @@ control = "control.raw" transient = "transient.raw" [task.evaluation.pre_layout.jobs.source_condition_7.input_sha256] -deck = "c9204b415bfb76c62877c48820ba441aa6c96df3988a808b7e8d3ceafd8ab800" +deck = "ad571b8394e5dae6fb5f992cd00c8864bd01881b71f7f90d2a8c54d3edfb6567" dut = "50783e7f3277c5a395028e57b2754bae806f316b1af65da289e30fe04401e57c" [task.evaluation.pre_layout.jobs.source_condition_7.measurements.conductance_04_s] @@ -1951,6 +2019,11 @@ unit = "V" value = 0.44081618 unit = "V" +[task.evaluation.pre_layout.jobs.source_condition_7.output_sha256] +op = "e7a951ad0220a7ac237484328a299e95829027bed281e172f3c78b683756481b" +control = "f7090278512ac9168e6eadb4021bd7397c5705b319f5d8803d1af4e665929491" +transient = "f95245eb6f3c38fac7044df93c4b2a997475bd51948e1a4f6cff70a5595539c9" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -1963,7 +2036,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -1974,7 +2047,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -1987,7 +2060,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2000,7 +2073,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2014,7 +2087,7 @@ grid_subdivision = 2 type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2024,7 +2097,10 @@ type = "ngspice-docker" support = "analog-res-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/analog-res-models" timeout_seconds = 600 diff --git a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/schematic.svg index 9ef31288d6702d2cf4f75170e05236de3bc4b9f7..a33268fbe42bd8b3d83e63efd8cd36c4d870e019 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/schematic.svg @@ -1 +1,2 @@ -trm_001_vcr{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.trm_001_vcr", "netlist_sha256": "ed94062ae8c8856ffe51593d5134a9926c266e6620767f13d491a21ad288136a", "project_sha256": "0832e1c5d288a029f6cad0e98217798364c666300468640c55563d9d01bb6616", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["trm_001_vcr", "Bank1_8series_rhigh"], "banks": [{"name": "Bank1_8series_rhigh", "count": 8, "model": "rhigh", "kind": "series", "members": ["RR0_0", "RR0_1", "RR0_2", "RR0_3", "RR0_4", "RR0_5", "RR0_6", "RR0_7"]}], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/circuit.cdl", "known_editor_diagnostics": {"ERC_ILLEGAL_PIN_NAME": 8}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.", "The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}trm_001_vcrvddvoutsubvddvoutsubvoutvcodevssvsssubvddvcodevoutvsstrm_001_vcrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 Resistive pull-upXBANK1Bank1_8series_rhigh02 Voltage-controlled shuntMM02/0.5N bulk → sub03 Substrate contacts / repeated banksRRptapA=41 µm²Models: sg13_lv_nmos · ptap1 \ No newline at end of file +trm_001_vcr{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.trm_001_vcr","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["trm_001_vcr","Bank1_8series_rhigh"],"banks":[{"name":"Bank1_8series_rhigh","count":8,"model":"rhigh","kind":"series","members":["RR0_0","RR0_1","RR0_2","RR0_3","RR0_4","RR0_5","RR0_6","RR0_7"]}],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/circuit.cdl","known_editor_diagnostics":{"ERC_ILLEGAL_PIN_NAME":8},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks.","The upstream ERC compares imported pins only with visible artwork pins, so it flags hidden resistor B / HBT S terminals. Full terminal connections are retained and independently checked against the source."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["trm_001_vcr"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/design/trm_001_vcr.icproj.json"}}Main-sheet overview; 1 child sheets are available in the editable .icproj.json project. Equal net labels connect.trm_001_vcrvddvoutsubvddvoutsubvoutvcodevssvsssubvddvcodevoutvsstrm_001_vcrihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresResistive pull-upXBANK1Bank1_8series_rhighVoltage-controlled shuntMM02/0.5N bulk → subBulk tapRRptapA=41 µm²Models: sg13_lv_nmos · ptap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/testbench.spice index 62d5931c015cee283722b1e97ad4787e35f6d724..b98dfaff1acc3f3fbb5b8c31423115256b31d17a 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/materials/testbench.spice @@ -17,6 +17,7 @@ let output_v=v(vout) let power_w=-v(vdd)*i(VDD) print output_v power_w write op.raw v(vout) i(VDD) +save i(vdd) v(code) v(vdd) v(vout) dc VCODE 0.2 0.8 0.002 meas dc high_v find v(vout) at=0.2 meas dc low_v find v(vout) at=0.8 diff --git a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/problem.md b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/problem.md index 49050aea97d01190d572c6fa0c6e7916a05ca9d9..2d6bb96b8b7b235f7507df197866af2280179000 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/trm_001_vcr/problem.md @@ -53,43 +53,21 @@ precision trimming and fabrication signoff remain outside qualification. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`recovery_down_v`, `recovery_up_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. The scale retains its declared unit and numerical-floor meaning. Normalize each condition before taking the worst quality; other rules follow their declarations. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `output_v` | DC operating point: `v(vout)`. | V | target / target | 0 … 1.3 | 1.3 | response | | `power_w` | DC operating point: `-v(vdd)*i(VDD)`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | @@ -101,19 +79,17 @@ source condition; a group uses its worst paired quality. | `conductance_04_s` | Shunt conductance [-I(VDD) − VOUT/RLOAD]/VOUT at VCODE=0.4 V; subtract external load current. | S | target / target | −∞ … +∞ | 0.00015 | response | | `conductance_06_s` | The same shunt-conductance definition at VCODE=0.6 V. | S | target / target | −∞ … +∞ | 0.0005 | response | | `conductance_ratio` | conductance_06_s / conductance_04_s, using the same load and temperature. | 1 | target / target | −∞ … +∞ | 5 | response | -| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-(avg v(vout) from=9u to=9.5u))) from=5u to=9.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-(avg v(vout) from=17u to=17.5u))) from=13u to=17.5u`. | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `recovery_down_v` | TRAN: Maximum of `(abs(v(vout)-(avg v(vout) from=9u to=9.5u))) from=5u to=9.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `recovery_up_v` | TRAN: Maximum of `(abs(v(vout)-(avg v(vout) from=17u to=17.5u))) from=13u to=17.5u`. | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `mean_power_w` | TRAN: Mean of `(-v(vdd)*i(VDD)) from=2u to=18u`. | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | | `step_span_v` | Transient: `(avg v(vout) from=17u to=17.5u)-(avg v(vout) from=9u to=9.5u)`. | V | target / target | 0 … 1.3 | 1.3 | response | High/low endpoints are continuous source-paired quality observations. Their 0–1.3 V bounds express the nonnegative, supply-limited output domain; shunt-control function does not require a narrower absolute endpoint range. -Area reference: **636.57 um2**. 10 expanded device instances; sum of device/contact envelopes 391.7515 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **4**; it is independent of -the reference-relative task score. +Area reference: **636.57 um2**. The expanded circuit has 10 device instances, a sum of device/contact envelopes 391.7515 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **4**, independent of this task's reference-normalized score. ### Score weights diff --git a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/case.toml b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/case.toml index 0567918213e2abf82f36209421b0245fa5147f7c..f4f1b46a0196e5857b8ab17554b2ada32a0aba95 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/case.toml +++ b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/case.toml @@ -1,15 +1,15 @@ -in_core = false kind = "layout_case" id = "ihp-sg13g2.analog-db.vref_001_vgs" title = "Mixed LV/HV VGS Reference with Picoampere Load and Zero-State Recovery" status = "qualified" +in_core = false [[assets]] path = "materials/schematic.svg" role = "schematic" visibility = "maintainer" format = "svg" -sha256 = "7fb83fbd473f645ad3f93ccdb40c55984b2d15f409329a84b1e88cac88c5b532" +sha256 = "5b0e6a195c2e5d0303b6605f093d5f5a9c893a76ab6f81b1cb06e373c1842e94" [[assets]] path = "reference/vref_001_vgs.gds" @@ -28,13 +28,13 @@ environment = "ihp-sg13g2-vgs-reference-mixed-mos-rc" [task.inputs.description] path = "problem.md" format = "text" -sha256 = "5f6adcfa4617f138bea3de216283fb5112e3e029bb56f4d5753751a7f48e2764" +sha256 = "859c0d62f3ad014f29948800a89a5b6731b90dfd35dce07f548c2541251f794b" [task.inputs.netlist] path = "materials/circuit.cdl" format = "spice" -sha256 = "4352aeb85c2a7bfb00181738a742d0ccbd5033b422393bafa6a82bd84c1e84b9" subcircuit = "vref_001_vgs" +sha256 = "4352aeb85c2a7bfb00181738a742d0ccbd5033b422393bafa6a82bd84c1e84b9" [task.inputs.simulation] path = "materials/circuit.spice" @@ -44,7 +44,7 @@ sha256 = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" [task.inputs.performance] path = "materials/testbench.spice" format = "spice" -sha256 = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +sha256 = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.constraints] quality = [ @@ -786,8 +786,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "supply_a" @@ -819,9 +822,12 @@ baseline = [ "source_t85_v15:supply_a", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This unloaded two-transistor reference consumes nonnegative DC supply current and power." + [[task.evaluation.metrics]] id = "power_w" category = "performance" @@ -852,9 +858,12 @@ baseline = [ "source_t85_v15:power_w", ] normalization = "ratio" -lower = 0 scale = 1e-12 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "This unloaded two-transistor reference consumes nonnegative DC supply current and power." + [[task.evaluation.metrics]] id = "startup_error_v" category = "performance" @@ -884,10 +893,13 @@ baseline = [ "source_t85_v12:startup_error_v", "source_t85_v15:startup_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." + [[task.evaluation.metrics]] id = "load_error_v" category = "performance" @@ -917,10 +929,13 @@ baseline = [ "source_t85_v12:load_error_v", "source_t85_v15:load_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." + [[task.evaluation.metrics]] id = "release_error_v" category = "performance" @@ -950,10 +965,13 @@ baseline = [ "source_t85_v12:release_error_v", "source_t85_v15:release_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." + [[task.evaluation.metrics]] id = "injection_error_v" category = "performance" @@ -983,10 +1001,13 @@ baseline = [ "source_t85_v12:injection_error_v", "source_t85_v15:injection_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." + [[task.evaluation.metrics]] id = "return_error_v" category = "performance" @@ -1016,10 +1037,13 @@ baseline = [ "source_t85_v12:return_error_v", "source_t85_v15:return_error_v", ] -normalization = "ratio" -lower = 0 +normalization = "saturating_ratio" scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." + [[task.evaluation.metrics]] id = "minimum_v" category = "performance" @@ -1083,8 +1107,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "line_min_v" @@ -1117,8 +1144,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "line_max_v" @@ -1151,8 +1181,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "line_span_v" @@ -1183,9 +1216,12 @@ baseline = [ "source_t85_v12:line_span_v", "source_t85_v15:line_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." [[task.evaluation.metrics]] id = "temperature_min_v" @@ -1218,8 +1254,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "temperature_max_v" @@ -1252,8 +1291,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [[task.evaluation.metrics]] id = "temperature_span_v" @@ -1284,9 +1326,12 @@ baseline = [ "source_t85_v12:temperature_span_v", "source_t85_v15:temperature_span_v", ] -normalization = "ratio" +normalization = "saturating_ratio" scale = 1e-06 + +[task.evaluation.metrics.requirement] lower = 0 +rationale = "Absolute reference errors and sampled voltage spans have nonnegative measurement domains; positive values remain scored quality observations." [[task.evaluation.metrics]] id = "output_resistance_ohm" @@ -1318,9 +1363,12 @@ baseline = [ "source_t85_v15:output_resistance_ohm", ] normalization = "ratio" -lower = 0 scale = 1e-06 +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Withdrawing positive DC load from this unbuffered reference must not raise its output voltage; the declared output resistance must be nonnegative." + [[task.evaluation.metrics]] id = "loaded_reference_v" category = "performance" @@ -1352,8 +1400,11 @@ baseline = [ ] normalization = "target" scale = 1.5 + +[task.evaluation.metrics.requirement] lower = 0 upper = 1.5 +rationale = "The unipolar reference and its declared unloaded/loaded DC observations must stay within the 0 to 1.5 V operating supply envelope." [task.evaluation.scoring] method = "layout" @@ -1383,10 +1434,10 @@ power_w = 0.045 supply_a = 0.045 [task.evaluation.pre_layout] -source_report_sha256 = "0f0c3d2505ec7a650bc02ad9aecf59928d1e5bc45bddb831d059199768387ec8" +source_report_sha256 = "7c4f6cb880d7b1f4dd22ae8f7f6414ff44d0263f43e3fc227d008bed9f717ce5" [task.evaluation.pre_layout.backends] -"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"ef9cb87fa27b849376472663b7362673979b89e012f161ba47bb5f6af6ede8eb\", \"compatibility\": null, \"execution_sha256\": \"5424b579002782bfddf0a729715b8fbf2a5f7f2b4cf14982d7616e352d5de9be\", \"image_id\": \"sha256:34eff92f7ffca7b8b010bcded394c4625c14143c757fda519e873b7ef8e87dc5\", \"limits\": {\"cpus\": 4, \"memory_mb\": 4096, \"pids\": 256}, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"0e8300cc4a3b3deabc59fa9eb15601c87a8bf027f97d60e7ff1cddcf57ff4450\", \"timeout_seconds\": 300.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"9ce793b7b3a5b9dd56576b6027328f240c4fa0049b3437092216154dbf25f137\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 300.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" [task.evaluation.pre_layout.jobs.source_tm20_v10] operation = "circuit.simulate" @@ -1435,7 +1486,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_tm20_v10.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_tm20_v10.measurements.injection_error_v] value = 0.002965899 @@ -1509,6 +1560,13 @@ unit = "V" value = 0.0003539978283933 unit = "V" +[task.evaluation.pre_layout.jobs.source_tm20_v10.output_sha256] +op = "369dc710c2ef3739568a050de530b9d1869812a679da5e0155fc12c3da9bacd4" +transient = "e0733293298e9c103bc1acec689c05c67be729eaf3a8c2ed759057b1f47ec54a" +line = "9fbd2520da185f14c9dfbd587de51143dd8eec50b80d72d5c3106a1c91f408d9" +temperature = "8747423c5a17d03b945c54f36ffc0493c09dcaddf2fdf6c71abc871cc513749a" +load = "721d0003ec20794afe408b76e6e913bed67db727b2524c8b777bf5094817390f" + [task.evaluation.pre_layout.jobs.source_tm20_v12] operation = "circuit.simulate" @@ -1556,7 +1614,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_tm20_v12.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_tm20_v12.measurements.injection_error_v] value = 0.002634407 @@ -1630,6 +1688,13 @@ unit = "V" value = 0.0006252294220225 unit = "V" +[task.evaluation.pre_layout.jobs.source_tm20_v12.output_sha256] +op = "ce187d3fe8f773047d9eeb6c70dbbee8e0cc1d4977b04de49ca7eaf0bf5ae1de" +transient = "1ab0c333c801cfcd69cb172fad065ac983d4872533b55eadd2e0c27f49240363" +line = "9fbd2520da185f14c9dfbd587de51143dd8eec50b80d72d5c3106a1c91f408d9" +temperature = "111bbb97db17a0573dbb882cc9e0c2628023623e093d4092a2d3e437c9080d94" +load = "93fed8fcafcfe055a4e41444bc14ac530d56913d9b8a840ea3d650038393f472" + [task.evaluation.pre_layout.jobs.source_tm20_v15] operation = "circuit.simulate" @@ -1677,7 +1742,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_tm20_v15.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_tm20_v15.measurements.injection_error_v] value = 0.00219733 @@ -1751,6 +1816,13 @@ unit = "V" value = 0.001490668405211 unit = "V" +[task.evaluation.pre_layout.jobs.source_tm20_v15.output_sha256] +op = "aa18c964fc7244969c05dd6d118893048582dca1a21e2d62ccf3737718cb62c4" +transient = "59945e00f6a468465fabf15f7edadb1b1ae55e15b132edb9ffe9a56ed960c44d" +line = "9fbd2520da185f14c9dfbd587de51143dd8eec50b80d72d5c3106a1c91f408d9" +temperature = "bc949bb10ba745d3aa2d244f8824c5d5e6ae338c285c815deaa447d566915f62" +load = "1b13e9fdc5405a67cf0a21843b9793a136c063de0b4861756bdfc6fbc8cba82a" + [task.evaluation.pre_layout.jobs.source_t27_v10] operation = "circuit.simulate" @@ -1798,7 +1870,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t27_v10.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t27_v10.measurements.injection_error_v] value = 0.0002410628 @@ -1872,6 +1944,13 @@ unit = "V" value = 0.0003539978283933 unit = "V" +[task.evaluation.pre_layout.jobs.source_t27_v10.output_sha256] +op = "f9f4e9d2e08d0cb61253967871ecb3e15066ef17b95f48eb52651f1da4117c8d" +transient = "1c00511748b0ee7d510291e9920aa60d1ce520ba64300d3595bf15f7c51d603c" +line = "93474641551a45e9b2ed69d1ee3057f60396b6dc0c350d1a6196694dc37c7ad6" +temperature = "8747423c5a17d03b945c54f36ffc0493c09dcaddf2fdf6c71abc871cc513749a" +load = "1cd4d7611a6bc2a12db42dbca7b2715fa6efa36efb9e2f5600143200fcf62b14" + [task.evaluation.pre_layout.jobs.source_t27_v12] operation = "circuit.simulate" @@ -1919,7 +1998,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t27_v12.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t27_v12.measurements.injection_error_v] value = 0.000217951 @@ -1993,6 +2072,13 @@ unit = "V" value = 0.0006252294220225 unit = "V" +[task.evaluation.pre_layout.jobs.source_t27_v12.output_sha256] +op = "12d7d34185662db36d27c3f4268ba9f088d56d8c1966b0154ae681018e91b1c9" +transient = "9844fb632581fe3def5b7e91f923f1ab84f440d8f2d96290bd186f92425f6059" +line = "93474641551a45e9b2ed69d1ee3057f60396b6dc0c350d1a6196694dc37c7ad6" +temperature = "111bbb97db17a0573dbb882cc9e0c2628023623e093d4092a2d3e437c9080d94" +load = "a4922b7222ba551ff713c81c45800d045e91ae363aa5396fe45e279283427882" + [task.evaluation.pre_layout.jobs.source_t27_v15] operation = "circuit.simulate" @@ -2040,7 +2126,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t27_v15.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t27_v15.measurements.injection_error_v] value = 0.0001923721 @@ -2114,6 +2200,13 @@ unit = "V" value = 0.001490668405211 unit = "V" +[task.evaluation.pre_layout.jobs.source_t27_v15.output_sha256] +op = "0f9f0639a30afc54b3abf7dbfdbf7b6fb5133753ff51ec760309fb2fcbe32e6e" +transient = "105960b28124b02d07434228d3bc97ef0f26956ed88f877b83562446cb8c336b" +line = "93474641551a45e9b2ed69d1ee3057f60396b6dc0c350d1a6196694dc37c7ad6" +temperature = "bc949bb10ba745d3aa2d244f8824c5d5e6ae338c285c815deaa447d566915f62" +load = "ad0bd971427331b74d25bc9200d945f1e17a026574b71a5aeac2fa6c94840559" + [task.evaluation.pre_layout.jobs.source_t85_v10] operation = "circuit.simulate" @@ -2161,7 +2254,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t85_v10.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t85_v10.measurements.injection_error_v] value = 2.293908e-05 @@ -2235,6 +2328,13 @@ unit = "V" value = 0.0003539978283933 unit = "V" +[task.evaluation.pre_layout.jobs.source_t85_v10.output_sha256] +op = "0b75129390de3f22a710b7c64c4c06e9000b7f5d7fef5f96df7ecd1a05bdfbbb" +transient = "1ce62c5a5b2e3d0cdd9ded7f3d4875919fcab016500ed66ddbf1258593eacfd9" +line = "646cf245da651ec2bf0ace73a1d1817caf34a34c919ba248556b8186d7376e15" +temperature = "8747423c5a17d03b945c54f36ffc0493c09dcaddf2fdf6c71abc871cc513749a" +load = "ad13024bc79497cfbb4367f8612ff4bc80c5c875556a216bf3e8f6c057089d0f" + [task.evaluation.pre_layout.jobs.source_t85_v12] operation = "circuit.simulate" @@ -2282,7 +2382,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t85_v12.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t85_v12.measurements.injection_error_v] value = 2.087492e-05 @@ -2356,6 +2456,13 @@ unit = "V" value = 0.0006252294220225 unit = "V" +[task.evaluation.pre_layout.jobs.source_t85_v12.output_sha256] +op = "a0ae701731e093c469f995ab35c2982268b36811a71c97cc58666d576a8d712e" +transient = "2f8ff6b0def8ba72d5c0f9c9f737d41221a68dee205077bee3c64081c52aba53" +line = "646cf245da651ec2bf0ace73a1d1817caf34a34c919ba248556b8186d7376e15" +temperature = "111bbb97db17a0573dbb882cc9e0c2628023623e093d4092a2d3e437c9080d94" +load = "6cb5ebc78ffadafc5ad3ecb4724ef6cda6aad965c1d9f8c8d641d56506dc934c" + [task.evaluation.pre_layout.jobs.source_t85_v15] operation = "circuit.simulate" @@ -2403,7 +2510,7 @@ load = "load.raw" [task.evaluation.pre_layout.jobs.source_t85_v15.input_sha256] dut = "adf8fa7eabe990285cd2e7317bd93a5e7c749bc47881e92fdadb45ec5896fe26" -deck = "42c9b51eeae875f80c606be36c690b41fdb42e34e049cc6c146fbdcece5dde0f" +deck = "6b030a347f17808327f462bc90d6f2564f8d0953f7dd96c02da9e82b3fa9ad92" [task.evaluation.pre_layout.jobs.source_t85_v15.measurements.injection_error_v] value = 1.863711e-05 @@ -2477,6 +2584,13 @@ unit = "V" value = 0.001490668405211 unit = "V" +[task.evaluation.pre_layout.jobs.source_t85_v15.output_sha256] +op = "34ec0143786de01638e8ba81da8f349d24630224e8721610dfc4e89fb742a35a" +transient = "cc453fa88f6469725710d48a8454c362f9aa3dd0a21a15acfd8e43e517072be3" +line = "c6eeaa8760982fa438c0460c8a77ba985928bbdfa0a7ef5e2e661a3ec1798d3e" +temperature = "d753993a52bf3415491f8bc0861b7bf54b4789c68f793be916568dbbbcb33ffa" +load = "245de2d7b564073f22735545cb10c9eac2141902b5993a31bb2a87b0fbc649a9" + [toolchain.bindings] "layout.artifact" = "artifact" "layout.drc" = "drc" @@ -2489,7 +2603,7 @@ unit = "V" type = "klayout-docker" [toolchain.backends.artifact.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "artifact" timeout_seconds = 600 @@ -2500,7 +2614,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.drc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "drc" support = "build/support/input-pair-klayout" profile = "drc-upstream.json" @@ -2513,7 +2627,7 @@ type = "klayout-docker" support = "klayout" [toolchain.backends.lvs.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" check = "lvs" support = "build/support/input-pair-klayout" profile = "lvs-upstream.json" @@ -2526,7 +2640,7 @@ type = "magic-rc-docker" support = "magic" [toolchain.backends.rc.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" support = "build/support/input-pair-magic" technology = "magic/ihp-sg13g2.tech" tech_name = "ihp-sg13g2" @@ -2546,7 +2660,7 @@ label_layers = [ type = "klayout-geometry-docker" [toolchain.backends.geometry.settings] -image = "iclayout-bench-tools:local" +image = "iclayout-eda-open:local" timeout_seconds = 120 [toolchain.backends.simulation] @@ -2556,7 +2670,10 @@ type = "ngspice-docker" support = "mixed-mos-models" [toolchain.backends.simulation.settings] -image = "iclayout-bench-tools:local" +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" support = "build/support/mixed-mos-models" timeout_seconds = 300 diff --git a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/schematic.svg b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/schematic.svg index 15042ff9849863698c765fd9a58c69c97a8e0c54..51f67eedebf6ccd73e7d27ea0929da38087c95a7 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/schematic.svg +++ b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/schematic.svg @@ -1 +1,2 @@ -vref_001_vgs{"format": "iclayout-schematic", "case_id": "ihp-sg13g2.analog-db.vref_001_vgs", "netlist_sha256": "4352aeb85c2a7bfb00181738a742d0ccbd5033b422393bafa6a82bd84c1e84b9", "project_sha256": "a3cdac1cfd2b1f1bebf1d386b91be92b5c465391619baaa11157f06d09cc72df", "authoring_tool": "Analog Canvas", "tool_commit": "cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f", "verification": "Source-to-project terminal, model and parameter comparison; schema parse and netlist export. Physical R/C/Q use explicit external model bindings; original references are shown on the drawing.", "license": "licenses/ihp-sg13g2/analog-db/", "sheets": ["vref_001_vgs"], "banks": [], "source_netlist": "tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/circuit.cdl", "known_editor_diagnostics": {}, "limitations": ["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."], "presentation": {"revision": 2, "significant_figures": 3, "source_precision": "unchanged", "layout": "Case-specific functional groups and direct local wiring"}}vref_001_vgsvddvssvrefvssvddvrefvssvref_001_vgsihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figures01 VGS referenceM02.5/2M11/2N bulk → vss02 Substrate contacts / repeated banksRTAPA=80 µm²Models: sg13_lv_nmos · sg13_hv_nmos · ptap1 \ No newline at end of file +vref_001_vgs{"format":"iclayout-schematic","case_id":"ihp-sg13g2.analog-db.vref_001_vgs","authoring_tool":"Analog Canvas","tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","verification":"Editable project graph matches the source subcircuits, ordered ports, terminal nets, models and literal parameters.","license":"tasks/ihp-sg13g2/analog-db/","sheets":["vref_001_vgs"],"banks":[],"source_netlist":"tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/circuit.cdl","known_editor_diagnostics":{},"limitations":["Physical R/C/Q primitives are represented by external model bindings with X-prefixed internal references; schematic labels show the original references. Exports are for connectivity inspection, not replacement simulation decks."],"svg_export":{"tool_commit":"cbc18ee76ef91d88dd3e2dea9b47dd6d759f2d8f","rendered_sheets":["vref_001_vgs"],"scope":"main-sheet","editable_project":"tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/design/vref_001_vgs.icproj.json"}}Complete single-sheet circuit. Equal net labels connect.vref_001_vgsvddvssvrefvssvddvrefvssvref_001_vgsihp-sg13g2 · analog-db | W/L in µm · display rounded to 3 significant figuresVGS referenceM02.5/2M11/2N bulk → vssBulk tapRTAPA=80 µm²Models: sg13_lv_nmos · sg13_hv_nmos · ptap1 + diff --git a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/testbench.spice b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/testbench.spice index 50b13e99209c36a322990474ce1f203fd89cae39..4fc936e193459325d2df7333880e25ace5325c82 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/testbench.spice +++ b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/materials/testbench.spice @@ -14,6 +14,7 @@ GLOAD vref 0 loadctrl 0 1p XDUT vdd vref 0 vref_001_vgs CLOAD vref 0 100f .ic v(vref)=0 +.save v(vref) v(vdd) i(VDD) .control set numdgt=12 op diff --git a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/problem.md b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/problem.md index f2c352ec1dd873b2300adefaf9fc87a1c7c430dc..4a0b7b49bce598f1fa9ebc0bfda112a64b3cd968 100644 --- a/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/problem.md +++ b/tasks/ihp-sg13g2/analog-db/cases/vref_001_vgs/problem.md @@ -72,68 +72,44 @@ The external 100 fF load is additional to candidate capacitance. ## Electrical Requirements and Scoring -Physical checks and declared functional bounds remain mandatory. Quality has no -fixed allowed-degradation threshold. Each `source_*` job simulates the declared -source circuit with exactly the same testbench, model resources, parameters, -load and measurement window as its paired extracted-candidate job. A source -observation is the 100-point electrical baseline; it is independent of the -submitted GDS. All individual pairs are retained in the evaluation report. - -For a post-layout observation x and its source observation b: - -- Maximize: q = x/b; minimize: q = b/x. When a numerical scale s is declared, - use (x+s)/(b+s) or its inverse. This handles zero-valued error measurements; - s is a normalization floor, not an allowed degradation or pass threshold. -- Amplitude dB: q = 10^((x-b)/20) for maximize, its inverse for minimize. -- Target: q = 1/(1+abs(x-b)/s), with a declared physical scale s. Signed and - zero-valued operating points are never divided directly. - -Scoring uses `layout`. A metric uses its worst paired quality q. The score is -S = 100 * product(q_i ** w_i), including area quality -q_area = area_reference / candidate_functional_area. The weights below sum to -one. Dimensions describe measurements but do not determine their weights. -Physical or functional rejection scores zero; missing or invalid measurements -produce an unknown score, including measurements with zero weight. -Source-equivalent performance at the area reference scores 100; improvements -can exceed 100. A weight expresses a tradeoff, not a hard acceptance limit. - -Measurement definitions below use the supplied SPICE node/source names. -`v(n)` is node voltage and `i(V)` is current into a voltage source; delivered -power therefore uses a minus sign. `db(z)=20*log10(abs(z))`, `mag/abs` -denote magnitude, and `cph` is continuous phase in radians. `find`, `when`, -`from/to`, and `rise/fall` retain the deck's interpolation, window and -crossing conventions; SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/ -milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` -mean the stated window average, extrema and sampled derivative. All -declared conditions are measured separately and paired with the same -source condition; a group uses its worst paired quality. - -| Metric | Definition / observations | Unit | Quality rule | Functional bounds | Scale | Dimension | +Physical checks and the declared functional bounds must pass. Quality scoring imposes no fixed degradation allowance. Each `source_*` job and its corresponding candidate extracted circuit use exactly the same testbench, model resources, parameters, loads and measurement windows. Independent source observations define the 100-point electrical baseline without depending on the submitted GDS; reports retain every paired result. + +Let x be the post-layout measurement and b the source-circuit measurement under the same conditions: + +- Ratio normalization: maximize with q = x/b and minimize with q = b/x. When a numerical scale s is declared, use (x+s)/(b+s) and its reciprocal, respectively. The scale handles zero values as a normalization floor; it is neither an allowed degradation nor an acceptance bound. +- Amplitude in dB: maximize with q = 10^((x-b)/20) and minimize with its reciprocal. +- Target normalization: q = 1/(1+abs(x-b)/s), where s is the declared physical scale. Signed or zero-valued operating points are not divided directly. + +Use `layout` scoring. Each metric takes its worst paired quality q, and the total score is S = 100 * product(q_i ** w_i), with area quality q_area = area_reference / candidate_functional_area. The weights below sum to 1; metric dimensions describe measurements and do not determine weights. Physical or functional rejection scores zero; missing or invalid measurements leave the score unknown, and zero-weight observations must also be valid. Matching source-circuit performance at the reference area scores 100 points; better valid solutions may exceed 100. Weights express quality tradeoffs rather than hard bounds. + +The measurements below use the supplied SPICE node and source names. `v(n)` is a node voltage; `i(V)` is current flowing into a voltage source, so delivered power uses a negative sign. `db(z)=20*log10(abs(z))`; `mag/abs` denote magnitude, and `cph` denotes continuous phase in radians. `find`, `when`, `from/to` and `rise/fall` follow the deck's interpolation, window and crossing conventions. SPICE suffixes p/n/u/m/meg/g mean pico/nano/micro/milli/mega/giga. Nested `avg`, `min`, `max`, `vecmin/vecmax` and `deriv` represent window averages, extrema and sampled derivatives. Measure each operating condition independently, pair it with the source result under that condition, and take the worst paired quality within each metric group. + +`startup_error_v`, `load_error_v`, `release_error_v`, `injection_error_v`, `return_error_v`, `line_span_v`, `temperature_span_v` use `saturating_ratio`: q = 2(b+s)/(b+x+2s), where x is candidate error, b is paired source error and s is the positive scale below. Source equivalence gives q=1; improvement approaches the upper limit 2 with diminishing returns. s retains the declared units and numeric-floor meaning; normalize each condition before taking the worst quality, and apply other rules as declared. + +| Metric | Definition / observation | Unit | Quality normalization | Functional range | Scale | Dimension | | --- | --- | --- | --- | --- | --- | --- | | `reference_v` | Unloaded DC VREF | V | target / target | 0 … 1.5 | 1.5 | bias | | `supply_a` | Unloaded DC −I(VDD) | A | minimize / ratio | 0 … +∞ | 1e-12 | bias | | `power_w` | Unloaded DC −VDD·I(VDD) | W | minimize / ratio | 0 … +∞ | 1e-12 | supply | -| `startup_error_v` | Maximum absolute reference error, 8–9 ms | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `load_error_v` | Same, 18–19 ms under +1 pA | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `release_error_v` | Same, 28–29 ms | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `injection_error_v` | Same, 38–39 ms under −1 pA | V | minimize / ratio | 0 … +∞ | 1e-06 | response | -| `return_error_v` | Same, 48–49 ms | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `startup_error_v` | Maximum absolute reference error, 8–9 ms | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `load_error_v` | Same, 18–19 ms under +1 pA | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `release_error_v` | Same, 28–29 ms | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `injection_error_v` | Same, 38–39 ms under −1 pA | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | +| `return_error_v` | Same, 48–49 ms | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `minimum_v` | Minimum VREF over the full 0–50 ms startup/load transient. | V | target / target | −∞ … +∞ | 1.5 | bias | | `maximum_v` | Maximum VREF over the full 0–50 ms startup/load transient. | V | target / target | 0 … 1.5 | 1.5 | bias | | `line_min_v` | DC sweep: `vecmin(v(vref))`; sweep `VDD 1.0 1.5 .01`. | V | target / target | 0 … 1.5 | 1.5 | bias | | `line_max_v` | DC sweep: `vecmax(v(vref))`; sweep `VDD 1.0 1.5 .01`. | V | target / target | 0 … 1.5 | 1.5 | bias | -| `line_span_v` | Supply-sweep maximum minus minimum | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `line_span_v` | Supply-sweep maximum minus minimum | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `temperature_min_v` | DC sweep: `vecmin(v(vref))`; sweep `temp -20 85 5`. | V | target / target | 0 … 1.5 | 1.5 | bias | | `temperature_max_v` | DC sweep: `vecmax(v(vref))`; sweep `temp -20 85 5`. | V | target / target | 0 … 1.5 | 1.5 | bias | -| `temperature_span_v` | Temperature-sweep maximum minus minimum | V | minimize / ratio | 0 … +∞ | 1e-06 | response | +| `temperature_span_v` | Temperature-sweep maximum minus minimum | V | minimize / saturating_ratio | 0 … +∞ | 1e-06 | response | | `output_resistance_ohm` | (Unloaded DC VREF − DC VREF at +1 pA)/1 pA | ohm | minimize / ratio | 0 … +∞ | 1e-06 | response | | `loaded_reference_v` | DC VREF at +1 pA | V | target / target | 0 … 1.5 | 1.5 | bias | -Area reference: **210.61 um2**. 3 expanded device instances; sum of device/contact envelopes 121.7863 um2, per-side envelope allowance 0.6 um, 50% routing allowance and total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across two opposite sides; the envelope sum is displayed rounded to four decimals. MOS/passive envelopes use declared W/L (or resistor dimensions) and multiplicity; explicit tap areas and HBT emitter/contact envelopes are included. This is a frozen engineering estimate, not a foundry minimum or a feasibility claim. - -The capability coefficient remains **5**; it is independent of -the reference-relative task score. +Area reference: **210.61 um2**. The expanded circuit has 3 device instances, a sum of device/contact envelopes 121.7863 um2, a one-sided envelope margin of 0.6 um, a routing allowance of 50%, and a total outer width/height allowance 1.2 um. Estimate = ceil(100 * (1.5 * envelope_sum + 2 * margin * sqrt(envelope_sum) + margin^2)) / 100. Here margin is the total allowance across both sides, and the envelope sum is displayed to four decimal places. MOS/passive envelopes use W/L (or resistor dimensions) and multiplicity, including explicit contacts and HBT emitter/contact envelopes. This is a frozen engineering estimate, not a process minimum or a proven achievable area. +The capability coefficient is **5**, independent of this task's reference-normalized score. ### Score weights diff --git a/tasks/sky130A/OpenFASOC/LICENSE b/tasks/sky130A/OpenFASOC/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..261eeb9e9f8b2b4b0d119366dda99c6fd7d35c64 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/OpenFASOC/NOTICE b/tasks/sky130A/OpenFASOC/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..5bee483640d4823bddf8d586c90ee23522a5eb88 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/NOTICE @@ -0,0 +1,5 @@ +OpenFASOC GLayout designs +Source: https://github.com/idea-fasoc/OpenFASOC +Commit: 426c17025c7c01d6e7d4d259fb7f9e7d741cc5c4 +Original project and file-specific copyright notices apply. +Local adaptations and verification are described in each case README. diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/case.toml b/tasks/sky130A/OpenFASOC/cases/current_mirror/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..c1a5d6dd99c34c9e11a047e022f7940bcf0e0c93 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/case.toml @@ -0,0 +1,551 @@ +kind = "layout_case" +id = "sky130A.OpenFASOC.current_mirror" +title = "SKY130 1:1 Interdigitated Current Mirror" +status = "qualified" +in_core = true + +[origin] +url = "https://github.com/idea-fasoc/OpenFASOC/tree/426c17025c7c01d6e7d4d259fb7f9e7d741cc5c4/openfasoc/generators/glayout" + +[[assets]] +path = "reference/current_mirror.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "b8c3502e84339b0c676161e3d362e0345e5aadff601d0a020a0056b2540ddb29" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "b3e2638f76ea60891ff3b950fce10ba4b5b77743cc7514f3a1e767dd8ec03c86" + +[task] +kind = "netlist_to_gds" +hours = 3 +family = "sky130_current_mirror" +coefficient = 1 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "d554150d4035950fe8ba3dd1e26f429e8f2255bc48ad5d350200e6d0fce85401" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "CMIRROR" +sha256 = "d4466dab26872619dd7ef0f5e9848ad2af1d517836be300a7f49a531d5047c42" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "ad21bb466a0ecc25683584ea68183bec328ea50204321d28da49369d0bbe6658" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "CMIRROR" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 60 +max_height_um = 60 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "VREF", + "VCOPY", + "VSS", + "VB", +] + +[[task.evaluation.jobs]] +id = "low" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.jobs.parameters.values] +reference_current = 1e-05 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "nominal" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.jobs.parameters.values] +reference_current = 3e-05 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "high" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.jobs.parameters.values] +reference_current = 6e-05 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "ratio_error" +category = "performance" +observations = [ + "low:ratio_error_max", + "nominal:ratio_error_max", + "high:ratio_error_max", +] +baseline = [ + "source_low:ratio_error_max", + "source_nominal:ratio_error_max", + "source_high:ratio_error_max", +] +unit = "1" +direction = "minimize" +aggregation = "max" +dimension = "response" +normalization = "saturating_ratio" +scale = 0.005 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared absolute current-ratio or endpoint-fit linearity error has a nonnegative measurement domain; precision is a scored quality observation or an unweighted diagnostic." + +[task.evaluation.metrics.quality_target] +value = 0.03 +rationale = "Aim for at most 3% worst current-transfer error over 10/30/60 uA and the complete 0.6–1.8 V output sweep; this is a quality goal, not a functional cutoff." + +[[task.evaluation.metrics]] +id = "bias_voltage" +category = "performance" +observations = [ + "low:bias_voltage", + "nominal:bias_voltage", + "high:bias_voltage", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 0.3 +upper = 1.2 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 100.0 +rationale = "A 100 um2 functional footprint is a compact 10-by-10 um integration budget. Area and worst current-ratio error each carry 50%, so a loose generator footprint cannot earn 100 from near-source electrical behavior alone. The 3% current-transfer error goal applies across all three reference currents and the entire output-voltage sweep; a 0.5 percentage-point scale resolves meaningful changes. This deterministic compliance-and-routing metric makes no mismatch-yield claim. The feasible reference may miss both goals." + +[task.evaluation.scoring.weights] +ratio_error = 0.5 +functional_area = 0.5 + +[task.evaluation.pre_layout] +source_report_sha256 = "9059e845f35da77d2437a1d8f9a71f3b58711b6446c5e3754318102e8ec4de98" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"0f975b3ce7692fcbe19ec46cf8a89bcd3d7d718eed443f714afa3033f9e33834\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"4256875a12feacdc7b1c992999ca2d58c01501a4bc6f5ac8e9a9fa379d26502b\", \"image_id\": \"sha256:f3d0db2bd3aa5dfbcc44bb75b7cfbe8f24356a8b32fe1bce2433431f624e7afe\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Wed Oct 7 12:04:25 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_low] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_low.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_low.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_low.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.pre_layout.jobs.source_low.parameters.values] +reference_current = 1e-05 + +[task.evaluation.pre_layout.jobs.source_low.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_low.input_sha256] +deck = "ad21bb466a0ecc25683584ea68183bec328ea50204321d28da49369d0bbe6658" +dut = "d4466dab26872619dd7ef0f5e9848ad2af1d517836be300a7f49a531d5047c42" + +[task.evaluation.pre_layout.jobs.source_low.measurements.bias_voltage] +value = 0.6908003 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_low.measurements.ratio_error_max] +value = 0.07135705 +unit = "1" + +[task.evaluation.pre_layout.jobs.source_nominal] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_nominal.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_nominal.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.values] +reference_current = 3e-05 + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_nominal.input_sha256] +deck = "ad21bb466a0ecc25683584ea68183bec328ea50204321d28da49369d0bbe6658" +dut = "d4466dab26872619dd7ef0f5e9848ad2af1d517836be300a7f49a531d5047c42" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.bias_voltage] +value = 0.7934223 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.ratio_error_max] +value = 0.04446092 +unit = "1" + +[task.evaluation.pre_layout.jobs.source_high] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_high.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_high.outputs] +op = "ngspice-raw" +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_high.parameters.measurements] +bias_voltage = "V" +ratio_error_max = "1" + +[task.evaluation.pre_layout.jobs.source_high.parameters.values] +reference_current = 6e-05 + +[task.evaluation.pre_layout.jobs.source_high.parameters.exports] +op = "op.raw" +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_high.input_sha256] +deck = "ad21bb466a0ecc25683584ea68183bec328ea50204321d28da49369d0bbe6658" +dut = "d4466dab26872619dd7ef0f5e9848ad2af1d517836be300a7f49a531d5047c42" + +[task.evaluation.pre_layout.jobs.source_high.measurements.bias_voltage] +value = 0.8948801 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_high.measurements.ratio_error_max] +value = 0.03185621 +unit = "1" + +[qualification] +reference = "reference/current_mirror.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 240 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Power & references" +summary = "Copies a reference current with a 1:1 interdigitated current mirror across the declared output-voltage range." diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/circuit.spice b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..7753ee68f20b37640d262a9e18919ea18152fbec --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/circuit.spice @@ -0,0 +1,6 @@ +* Fixed SKY130 GLayout current mirror: dimensions in micrometres. +.subckt CMIRROR VREF VCOPY VSS VB +XA VREF VREF VSS VB sky130_fd_pr__nfet_01v8 l=2 w=3 m=3 +XB VCOPY VREF VSS VB sky130_fd_pr__nfet_01v8 l=2 w=3 m=3 +XDUMMY VB VB VB VB sky130_fd_pr__nfet_01v8 l=2 w=3 m=2 +.ends CMIRROR diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/schematic.svg b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..4767cfc9f24880a4cac9fbd7fcca45bc4677b85f --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/schematic.svg @@ -0,0 +1 @@ +CMIRRORVREFVSSVBVREFVCOPYVSSVBVBVBVBVBVREFVREFVCOPYVSSVBCMIRRORXAnfet_01v8l=2 w=3m=3XBnfet_01v8l=2 w=3m=3XDUMMYnfet_01v8l=2 w=3m=2 diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/testbench.spice b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..8a13113ca51f41749f914853f563f2d245da2469 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/materials/testbench.spice @@ -0,0 +1,21 @@ +* DC transfer of a fixed 1:1 current mirror, TT at 27 C. +.include /workspace/support/models.spice +.include parameters.spice +.include dut.spice +.temp 27 +Ireference 0 ref {reference_current} +Vout out 0 0.9 +Xdut ref out 0 0 CMIRROR +.control +op +let bias_voltage=v(ref) +print bias_voltage +write op.raw all +save @ireference[dc] i(vout) v(ref) +dc Vout 0.6 1.8 0.05 +let ratio_error=abs(-i(vout)/@ireference[dc]-1) +meas dc ratio_error_max MAX ratio_error +write dc.raw all +quit +.endc +.end diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/problem.md b/tasks/sky130A/OpenFASOC/cases/current_mirror/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..0bacbfb49cea376d6c24b2c45d1d1f9f19b8f095 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/problem.md @@ -0,0 +1,35 @@ +# SKY130 1:1 Interdigitated Current Mirror Layout Task + +## Objective + +Implement `CMIRROR` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `VREF VCOPY VSS VB`. Declared inputs include `problem.md`, `materials/circuit.spice` and `materials/testbench.spice`. The runtime provides models and process resources; reference layouts, author code and qualification evidence are maintainer-only materials. + +## Operating Conditions + +Supply 1.8 V; reference currents 10, 30, 60 uA. Sweep output voltage from 0.6 to 1.8 V in 50 mV steps. Observe maximum relative current error and bias voltage. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `CMIRROR`. Functional geometry must fit within the 60 × 60 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +Absolute current-ratio error must be nonnegative; bias must be within the declared 0.3–1.2 V operating range. The current-transfer quality target is 3% worst absolute relative error across every declared current and the full output-voltage sweep, with a 0.5 percentage-point normalization scale. It is a challenging continuous quality goal, not a rejection threshold. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 50% | +| `ratio_error` | 0 … +∞ 1 | max | 50% | +| `bias_voltage` | 0.3 … 1.2 V | max | 0% | + +Retain independent source-netlist observations under exactly the same conditions. For each candidate worst-sweep error `x`, quality is `2*(t+s)/(t+x+2*s)`, with target `t=0.03` and scale `s=0.005`; take the worst quality across the three currents. Reports distinguish the measured source errors from the declared target. This deterministic metric covers compliance and routing effects; it does not measure statistical matching yield. Zero-weight observations still undergo measurement and functional checks. + +Area quality is `100 um² / candidate functional area`. This compact 10 × 10 um integration budget rewards diffusion sharing, efficient finger placement and short connections, while preserving the declared devices and body contacts. It is independent of the loose feasibility witness and is not a hard area limit. Total score is `100 × sqrt(q_error × q_area)`. Joint attainment of the 3% transfer-error goal and 100 um² footprint scores 100, and better valid solutions may exceed 100. The feasible reference is allowed to miss both goals. Physical or functional invalidity scores zero; missing or unusable measurements make the score unknown. Capability coefficient `1` is independent of this quality score. + +## Tools and Submission + +Solve budget: 3 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/OpenFASOC/cases/current_mirror/reference/current_mirror.gds b/tasks/sky130A/OpenFASOC/cases/current_mirror/reference/current_mirror.gds new file mode 100644 index 0000000000000000000000000000000000000000..f0d978cbc207fd702c10df991ef6c006418a2785 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/current_mirror/reference/current_mirror.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:b8c3502e84339b0c676161e3d362e0345e5aadff601d0a020a0056b2540ddb29 +size 102042 diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/case.toml b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..034419b6b2413adb23b3386c28848c0fc51a748b --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/case.toml @@ -0,0 +1,677 @@ +kind = "layout_case" +id = "sky130A.OpenFASOC.two_stage_opamp" +title = "SKY130 Two-Stage Miller Operational Amplifier" +status = "qualified" +in_core = false + +[origin] +url = "https://github.com/idea-fasoc/OpenFASOC/tree/426c17025c7c01d6e7d4d259fb7f9e7d741cc5c4" + +[[assets]] +path = "reference/two_stage_opamp.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "e7564dc65ad2636828d3f60f110400e10f41e11ac0a7ebb7e96d823dd509d995" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "c679fe969f7f390639e58bb8d601e109a7d11ff74656a2e5c10117206a49d682" + +[task] +kind = "netlist_to_gds" +hours = 8 +family = "sky130_opamp" +coefficient = 3 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "d85387f229f27b84bd6c84d7d42da297f8e4dd286a901ee4637ba6b5af0df50b" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "OPAMP_TWO_STAGE" +sha256 = "f49f855271aef32cc4b890fd261f376a632d2d389b936a73f944de8d50503b89" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "77e9a05834a6a73aa1d0b3a1750529a321ab664be231b7bde8c99a72707b8cdd" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "OPAMP_TWO_STAGE" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 200 +max_height_um = 200 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "VDD", + "GND", + "DIFFPAIR_BIAS", + "VP", + "VN", + "CS_BIAS", + "VOUT", +] + +[[task.evaluation.jobs]] +id = "light" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 1e-13 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "nominal" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 5e-13 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "heavy" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 1e-12 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "gain_low" +category = "performance" +observations = [ + "light:gain_low", + "nominal:gain_low", + "heavy:gain_low", +] +unit = "dB" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_light:gain_low", + "source_nominal:gain_low", + "source_heavy:gain_low", +] +normalization = "db20" +dimension = "response" + +[[task.evaluation.metrics]] +id = "loop_bandwidth" +category = "performance" +observations = [ + "light:loop_bandwidth", + "nominal:loop_bandwidth", + "heavy:loop_bandwidth", +] +unit = "Hz" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_light:loop_bandwidth", + "source_nominal:loop_bandwidth", + "source_heavy:loop_bandwidth", +] +normalization = "ratio" +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "supply_power" +category = "performance" +observations = [ + "light:supply_power", + "nominal:supply_power", + "heavy:supply_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_light:supply_power", + "source_nominal:supply_power", + "source_heavy:supply_power", +] +normalization = "saturating_ratio" +dimension = "supply" +scale = 0.0001 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + +[[task.evaluation.metrics]] +id = "phase_margin" +category = "performance" +observations = [ + "light:phase_margin", + "nominal:phase_margin", + "heavy:phase_margin", +] +unit = "deg" +direction = "target" +aggregation = "min" + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 180 +rationale = "The declared negative-feedback loop must remain on its measured 0 to 180 degree stable-feedback branch at the specified crossing; the previous 45 degree design margin is not a validity cutoff." + +[[task.evaluation.metrics]] +id = "bias_voltage" +category = "performance" +observations = [ + "light:bias_voltage", + "nominal:bias_voltage", + "heavy:bias_voltage", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 0.3 +upper = 1.5 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 14329.60165 +rationale = "Low-frequency voltage gain and noise-gain-10 loop bandwidth each carry 30%, supply power 20%, and physical area 20%. Source and extracted fixtures use 0.1/0.5/1 pF and 100 Mohm loads, TT at 27 C, 1.8 V supply, 0.9 V common mode and 20/100 uA biases. The loop must retain its stable 0 to 180 degree phase-margin branch at |A|=10; no fixed gain, bandwidth, power or 45 degree margin budget is a validity cutoff. Area target is the frozen reference functional footprint." + +[task.evaluation.scoring.weights] +gain_low = 0.3 +loop_bandwidth = 0.3 +supply_power = 0.2 +functional_area = 0.2 + +[task.evaluation.pre_layout] +source_report_sha256 = "690d3a9377b469ff8ad2e7fdc421ff529c024481d745565c4735d32d4730ef26" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_light] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_light.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_light.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_light.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_light.parameters.values] +load_capacitance = 1e-13 + +[task.evaluation.pre_layout.jobs.source_light.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_light.input_sha256] +deck = "77e9a05834a6a73aa1d0b3a1750529a321ab664be231b7bde8c99a72707b8cdd" +dut = "f49f855271aef32cc4b890fd261f376a632d2d389b936a73f944de8d50503b89" + +[task.evaluation.pre_layout.jobs.source_light.measurements.bias_voltage] +value = 0.8976443 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_light.measurements.gain_low] +value = 84.0858 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_light.measurements.loop_bandwidth] +value = 3109660.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_light.measurements.phase_margin] +value = 92.93702 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_light.measurements.supply_power] +value = 0.0006164687 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_light.output_sha256] +op = "7fa339476d62b16155bb3476710f0742294f1fdd0534736f7c8290fca5527ae4" +ac = "c2a225a80691b52eff1ed1eb93b31cbf80185242a63283163307b91839b93f93" + +[task.evaluation.pre_layout.jobs.source_nominal] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_nominal.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_nominal.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.values] +load_capacitance = 5e-13 + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_nominal.input_sha256] +deck = "77e9a05834a6a73aa1d0b3a1750529a321ab664be231b7bde8c99a72707b8cdd" +dut = "f49f855271aef32cc4b890fd261f376a632d2d389b936a73f944de8d50503b89" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.bias_voltage] +value = 0.8976443 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.gain_low] +value = 84.0858 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.loop_bandwidth] +value = 3111258.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.phase_margin] +value = 92.61441 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.supply_power] +value = 0.0006164687 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +op = "77ae864549561e6890ce8585c3235e5c02c8583bc144537a3d8872f56d904aed" +ac = "c86a1485730390008a328109d36cff41100bede0796fa7bd7ff0f60af760bdeb" + +[task.evaluation.pre_layout.jobs.source_heavy] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_heavy.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_heavy.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +loop_bandwidth = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.values] +load_capacitance = 1e-12 + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_heavy.input_sha256] +deck = "77e9a05834a6a73aa1d0b3a1750529a321ab664be231b7bde8c99a72707b8cdd" +dut = "f49f855271aef32cc4b890fd261f376a632d2d389b936a73f944de8d50503b89" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.bias_voltage] +value = 0.8976443 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.gain_low] +value = 84.0858 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.loop_bandwidth] +value = 3113117.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.phase_margin] +value = 92.21015 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.supply_power] +value = 0.0006164687 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_heavy.output_sha256] +op = "9bf3841786582904a43d05bc6174abdb69b0998542a8d4ea4d865e03d948ea19" +ac = "c446e408c733663164ad79ae2e7beb2836baba16f09577dd3d706351c702dd7b" + +[qualification] +reference = "reference/two_stage_opamp.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 240 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Amplifiers & RF" +summary = "Amplifies differential inputs with a two-stage Miller amplifier characterized at noise gain ten." diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/circuit.spice b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..75fad750737f810cbaaec55b69bc40d46fd4359c --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/circuit.spice @@ -0,0 +1,28 @@ +.subckt OPAMP_TWO_STAGE VDD GND DIFFPAIR_BIAS VP VN CS_BIAS VOUT +X0 n_wire0 VN n_X0_wire0 GND sky130_fd_pr__nfet_01v8 l=1.0 w=6.0 m=8 +X1 GND GND GND GND sky130_fd_pr__nfet_01v8 l=1.0 w=6.0 m=2 +X2 n_wire1 VP n_X0_wire0 GND sky130_fd_pr__nfet_01v8 l=1.0 w=6.0 m=8 +X3 GND GND GND GND sky130_fd_pr__nfet_01v8 l=1.0 w=6.0 m=2 +X4 DIFFPAIR_BIAS DIFFPAIR_BIAS GND GND sky130_fd_pr__nfet_01v8 l=2.0 w=6.0 m=4 +X5 n_X0_wire0 DIFFPAIR_BIAS GND GND sky130_fd_pr__nfet_01v8 l=2.0 w=6.0 m=4 +X6 n_X1_X0_X0_V1 n_wire0 VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=6 m=8 +X7 n_X1_wire0 n_wire0 VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=6 m=8 +X8 n_wire0 n_wire0 n_X1_X0_X0_V1 VDD sky130_fd_pr__pfet_01v8 l=1 w=6 m=12 +X9 n_wire1 n_wire0 n_X1_wire0 VDD sky130_fd_pr__pfet_01v8 l=1 w=6 m=12 +X10 VOUT n_wire1 VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=30 +X11 VDD VDD VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=3 +X12 VDD VDD VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=3 +X13 VOUT n_wire1 VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=30 +X14 VDD VDD VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=3 +X15 VDD VDD VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=7 m=3 +X16 CS_BIAS CS_BIAS GND GND sky130_fd_pr__nfet_01v8 l=2 w=6 m=16 +X17 VOUT CS_BIAS GND GND sky130_fd_pr__nfet_01v8 l=2 w=6 m=32 +X18 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +X19 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +X20 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +X21 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +X22 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +X23 VOUT n_X1_wire0 sky130_fd_pr__cap_mim_m3_1 l=12.0 w=12.0 +XNDUMMY GND GND GND GND sky130_fd_pr__nfet_01v8 l=2 w=6 m=14 +XPDUMMY VDD VDD VDD VDD sky130_fd_pr__pfet_01v8 l=1 w=6 m=10 +.ends OPAMP_TWO_STAGE diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/schematic.svg b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..a75ba6d83cc8e86e8f42e32d085187ccfdfcabba --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/schematic.svg @@ -0,0 +1 @@ +OPAMP_TWO_STAGEGNDGNDDIFFPAIR_BIASDIFFPAIR_BIASGNDVNGNDDIFFPAIR_BIASn_X0_wire0VDDVDDn_wire0n_X1_X0_X0_V1VDDn_wire0VDDn_wire0n_X1_wire0VDDn_wire0n_wire0n_X1_X0_X0_V1VDDn_wire0n_X0_wire0n_wire1n_X1_wire0VDDVDDVOUTn_wire1VDDVDDVDDVDDVDDVDDVDDVDDGNDVDDVDDVOUTn_wire1VDDVDDVDDVDDVDDGNDVDDVDDVDDGNDGNDCS_BIASCS_BIASGNDGNDGNDCS_BIASVOUTVOUTn_X1_wire0VOUTn_X1_wire0VOUTGNDn_X1_wire0VOUTn_X1_wire0VOUTn_X1_wire0VOUTn_X1_wire0GNDGNDGNDGNDVDDVDDVDDVDDGNDVDDGNDDIFFPAIR_BIASVPVNCS_BIASVOUTVPn_X0_wire0n_wire1GNDGNDGNDGNDGNDOPAMP_TWO_STAGEX0nfet_01v8l=1.0 w=6.0m=8X1nfet_01v8l=1.0 w=6.0m=2X2nfet_01v8l=1.0 w=6.0m=8X3nfet_01v8l=1.0 w=6.0m=2X4nfet_01v8l=2.0 w=6.0m=4X5nfet_01v8l=2.0 w=6.0m=4X6pfet_01v8l=1 w=6m=8X7pfet_01v8l=1 w=6m=8X8pfet_01v8l=1 w=6m=12X9pfet_01v8l=1 w=6m=12X10pfet_01v8l=1 w=7m=30X11pfet_01v8l=1 w=7m=3X12pfet_01v8l=1 w=7m=3X13pfet_01v8l=1 w=7m=30X14pfet_01v8l=1 w=7m=3X15pfet_01v8l=1 w=7m=3X16nfet_01v8l=2 w=6m=16X17nfet_01v8l=2 w=6m=32X18cap_mim_m3_1l=12.0 w=12.0X19cap_mim_m3_1l=12.0 w=12.0X20cap_mim_m3_1l=12.0 w=12.0X21cap_mim_m3_1l=12.0 w=12.0X22cap_mim_m3_1l=12.0 w=12.0X23cap_mim_m3_1l=12.0 w=12.0XNDUMMYnfet_01v8l=2 w=6m=14XPDUMMYpfet_01v8l=1 w=6m=10 diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/testbench.spice b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..e77d795d1b7969c242925980543991e915ad40c1 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/materials/testbench.spice @@ -0,0 +1,35 @@ +* Open-loop small-signal response with DC-only unity feedback. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +Vdd vdd 0 1.8 +Iref1 vdd bias1 20u +Iref2 vdd bias2 100u +Vin inp 0 DC 0.9 AC 1 +Rfb out feedback 9meg +Rref feedback common 1meg +Vcommon common 0 0.9 +Lfb feedback inm 1e12 +Cfb inm 0 1e12 +Xdut vdd 0 bias1 inp inm bias2 out OPAMP_TWO_STAGE +Cload out 0 {load_capacitance} +Rload out 0 100meg +.control +op +let bias_voltage=v(out) +let supply_power=-1.8*i(Vdd) +print bias_voltage supply_power +write op.raw v(out) i(Vdd) +save i(vdd) v(inm) v(inp) v(out) +ac dec 100 1 1e9 +let gain_db=db(v(out)) +let magnitude=mag(v(out)) +let phase_margin_curve=180+180/PI*cph(v(out)) +meas ac gain_low FIND gain_db AT=1 +meas ac loop_bandwidth WHEN magnitude=10 FALL=1 +meas ac phase_margin FIND phase_margin_curve WHEN magnitude=10 FALL=1 +write ac.raw v(out) v(inp) v(inm) +quit +.endc +.end diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/problem.md b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..cdfb34cc1d427b2cac1625b4ae4d57c62c722401 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/problem.md @@ -0,0 +1,38 @@ +# SKY130 Two-Stage Miller Operational Amplifier Layout Task + +## Objective + +Implement `OPAMP_TWO_STAGE` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `VDD GND DIFFPAIR_BIAS VP VN CS_BIAS VOUT`. Declared inputs include `problem.md`, `materials/circuit.spice` and `materials/testbench.spice`. The runtime provides models and process resources; reference layouts, author code and qualification evidence are maintainer-only materials. + +## Operating Conditions + +Supply 1.8 V, input common mode 0.9 V, and external input-stage/common-source-stage bias currents 20, 100 uA, respectively. Use output capacitances 0.1, 0.5, 1 pF and a 100 Mohm resistive load. Feedback 9 Mohm and reference 1 Mohm resistors set noise gain 10; external large inductance/capacitance closes DC feedback and breaks AC feedback, measuring loop bandwidth and phase margin where open-loop magnitude falls to 10. This fixture does not prove unity-gain stability. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `OPAMP_TWO_STAGE`. Functional geometry must fit within the 200 × 200 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +Output bias must be 0.3–1.5 V; phase margin at the specified crossing must lie on the stable-feedback branch within 0–180 degrees, and the crossing must exist. Gain, bandwidth and power are quality targets; no 40 dB, 100 kHz, 5 mW or 45 degree design-budget rejection thresholds are imposed. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 20% | +| `gain_low` | No fixed performance bound | min | 30% | +| `loop_bandwidth` | 0 … +∞ Hz | min | 30% | +| `supply_power` | 0 … +∞ W | max | 20% | +| `phase_margin` | 0 … 180 deg | min | 0% | +| `bias_voltage` | 0.3 … 1.5 V | max | 0% | + +Pair electrical quality with independent source-netlist observations under exactly the same conditions, taking the worst paired quality for each metric. Gain in dB uses `10^((x-b)/20)`; target quantities use `1/(1+abs(x-b)/s)`; ratio quantities use `x/b` or `b/x` according to optimization direction; cost quantities declaring `saturating_ratio` use `2*(b+s)/(b+x+2*s)`. `x` is the candidate observation, `b` is the source observation and `s` is the contract's physical normalization scale. These define no degradation allowance. Zero-weight observations still undergo measurement and functional checks. + +Area quality is `14329.60165 um² / candidate functional area`; the area target is the original reference layout's functional-footprint soft target, and a separate envelope constraint controls functional bounds. Total score is `100 × product(q_i^w_i)`, using the contract's `layout` method and original weights. Source-equivalent performance at target area scores 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; missing or unusable measurements make the score unknown. Capability coefficient `3` is independent of this quality score. + +## Tools and Submission + +Solve budget: 8 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/reference/two_stage_opamp.gds b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/reference/two_stage_opamp.gds new file mode 100644 index 0000000000000000000000000000000000000000..4f3ae8dda3ebac2873ce59990edec038764fcf80 --- /dev/null +++ b/tasks/sky130A/OpenFASOC/cases/two_stage_opamp/reference/two_stage_opamp.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:e7564dc65ad2636828d3f60f110400e10f41e11ac0a7ebb7e96d823dd509d995 +size 2625270 diff --git a/tasks/sky130A/README.md b/tasks/sky130A/README.md new file mode 100644 index 0000000000000000000000000000000000000000..24604b32d577e8846de27bc5515b375f308b11b0 --- /dev/null +++ b/tasks/sky130A/README.md @@ -0,0 +1,26 @@ +# SKY130A Process Scope + +The seven SKY130A tasks use the Ciel installation pinned in [pdk.toml](pdk.toml). +Each case contract defines its own supplies, loads, stimuli and electrical +bounds. The published fixtures use TT models at 27 C. The standard solver input +contains the declared circuit and testbenches; reference GDS and maintainer +schematics are not solver inputs. + +The evaluator runs artifact checks, full Magic DRC, Netgen LVS, geometry checks, +Magic distributed RC extraction and ngspice simulation through the declared +tool image and external process resources. The manifest retains drawn HVI, RPM +and URPM mask hints on GDS import. Its diode extraction adaptation avoids +applying SI-to-micrometre area and perimeter factors twice in the selected +`ngspice()` variants. These adaptations are part of the pinned resource +declaration, not changes to the installed PDK. + +The cases cover block-level behavior under their listed fixtures: current +mirroring, two amplifiers, a comparator, power-on reset, sample-and-hold and an +eight-bit buffered DAC. The two-stage amplifier is evaluated at noise gain 10; +the rail-to-rail amplifier uses its declared load range. The DAC evaluates all +256 static codes and full-scale transitions. These tests do not establish +PVT yield, mismatch, ESD, electromigration or manufacturing signoff. + +Core membership is set only by each case's `in_core` field. All seven cases +remain in the complete corpus; see the root [selection rationale](../../README.md#core-selection-rationale). +Collection-specific licenses and notices accompany the task materials. diff --git a/tasks/sky130A/pdk.toml b/tasks/sky130A/pdk.toml new file mode 100644 index 0000000000000000000000000000000000000000..4e741847868b4c6221b293efbceaa1afe914d630 --- /dev/null +++ b/tasks/sky130A/pdk.toml @@ -0,0 +1,93 @@ +[source] +kind = "ciel" +family = "sky130" +version = "1689ac3f2dc763876eaf967227c7dfe831b031ae" +libraries = [ + "sky130_fd_pr", + "sky130_fd_sc_hvl", +] +license = "Apache-2.0; retained component notices" + +[agent] +id = "sky130A" +support_profiles = [ + "models", + "magic", +] +checks = [ + [ + "python", + "-c", + "import os; from pathlib import Path; p=Path(os.environ['PDK_PATH']); assert (p/'libs.tech/magic/sky130A.tech').is_file(); assert (p/'libs.tech/ngspice/sky130.lib.spice').is_file()", + ], +] + +[agent.sources.sky130A] +installation = true +path = "sky130A" + +[agent.environment] +USER = "agent" +ICLAYOUT_BENCH_PDK = "sky130A" +PDK_ROOT = "/resources/pdks" +PDK_PATH = "/resources/pdks/sky130A" + +[profiles.models] +check = [ + "python", + "/resources/pdk-check.py", + "models", + "sky130_fd_pr__nfet_01v8", + "models.spice", + "--subcircuit", + "--voltage", + "1.8", + "--length", + "1", + "--width", + "3", +] + +[profiles.models.files.sky130A] +path = "sky130A" +format = "directory" + +[profiles.models.generated."models.spice"] +format = "spice" +content = ".lib \"/workspace/support/sky130A/libs.tech/ngspice/sky130.lib.spice\" tt\n" + +[profiles.models.generated.".spiceinit"] +format = "text" +content = "set ngbehavior=hsa\nset num_threads=1\nset sourcepath=( . /workspace/support )\n" + +[profiles.magic.files."sky130A.tech"] +path = "sky130A/libs.tech/magic/sky130A.tech" +format = "text" + +[[profiles.magic.files."sky130A.tech".replace]] +old = " templayer boundary BOUND,STDCELL,PADCELL" +new = " templayer retained_hvi HVI\n mask-hints HVI\n templayer retained_rpm RPM\n mask-hints RPM\n templayer retained_urpm URPM\n mask-hints URPM\n templayer boundary BOUND,STDCELL,PADCELL" + +[[profiles.magic.files."sky130A.tech".replace]] +old = " # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area*1E12 p=perim*1E6\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area*1E12 p=perim*1E6" +new = " # Diode models use um^2 and um numerical area/perimeter.\n # ngspice() already scales extracted geometry to microns; do not scale twice.\n variants (si)\n # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area*1E12 p=perim*1E6\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area*1E12 p=perim*1E6\n variants (),(hrhc),(lrhc),(hrlc),(lrlc)\n # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area p=perim\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area p=perim\n variants (),(si),(hrhc),(lrhc),(hrlc),(lrlc)" + +[profiles.physical.files.sky130A] +path = "sky130A" +format = "directory" + +[profiles.physical.files."sky130A.tech"] +path = "sky130A/libs.tech/magic/sky130A.tech" +format = "text" + +[[profiles.physical.files."sky130A.tech".replace]] +old = " templayer boundary BOUND,STDCELL,PADCELL" +new = " templayer retained_hvi HVI\n mask-hints HVI\n templayer retained_rpm RPM\n mask-hints RPM\n templayer retained_urpm URPM\n mask-hints URPM\n templayer boundary BOUND,STDCELL,PADCELL" + +[[profiles.physical.files."sky130A.tech".replace]] +old = " # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area*1E12 p=perim*1E6\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area*1E12 p=perim*1E6" +new = " # Diode models use um^2 and um numerical area/perimeter.\n # ngspice() already scales extracted geometry to microns; do not scale twice.\n variants (si)\n # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area*1E12 p=perim*1E6\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area*1E12 p=perim*1E6\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area*1E12 p=perim*1E6\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area*1E12 p=perim*1E6\n variants (),(hrhc),(lrhc),(hrlc),(lrlc)\n # NOTE: SkyWater diode models have bizarre units requiring bizarre scaling\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area p=perim\n device subcircuit sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area p=perim\n\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area p=perim\n device msubcircuit sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area p=perim\n variants (),(si),(hrhc),(lrhc),(hrlc),(lrlc)" + +[profiles.physical.files."sky130A_setup.tcl"] +path = "sky130A/libs.tech/netgen/sky130A_setup.tcl" +format = "text" diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/LICENSE b/tasks/sky130A/sky130_ef_ip__ccomp3v/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..261eeb9e9f8b2b4b0d119366dda99c6fd7d35c64 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/NOTICE b/tasks/sky130A/sky130_ef_ip__ccomp3v/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..b4149af9750259adce69f710c8981f7136b07756 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/NOTICE @@ -0,0 +1,5 @@ +Efabless SKY130 continuous comparator, Apache-2.0. +Upstream https://github.com/efabless/sky130_ef_ip__ccomp3v +Commit b051f6131efe5c1169e52a826f893c1a4f65eff0. +The ccomp3v_cl variant provides the synchronized source/layout pair. +HVL subcircuits from the pinned SkyWater PDK are Apache-2.0. diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/case.toml b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..7887f0eb5f2987d6a5c02c3f82663afeaecef5d9 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/case.toml @@ -0,0 +1,724 @@ +kind = "layout_case" +id = "sky130A.sky130_ef_ip__ccomp3v.ccomp3v" +title = "SKY130 Continuous Comparator with Complementary Input Load" +status = "qualified" +in_core = false + +[[assets]] +path = "reference/ccomp3v.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "b672f8dbc89b170681fb59d62561b11a1e500b690e788dc0bad00d2e02893a7b" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "4059a9a26dc6665306b7bc6a43e974e86653f885f8e200fa6523013307c38586" + +[origin] +url = "https://github.com/efabless/sky130_ef_ip__ccomp3v/tree/b051f6131efe5c1169e52a826f893c1a4f65eff0" + +[task] +kind = "netlist_to_gds" +hours = 8 +family = "sky130_comparator" +coefficient = 3 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "9ad3c1bdbedbb6f8ec29c7da7f11e3b2e2c9425b08b4c8e68e6aa1b0366e0fb9" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "sky130_ef_ip__ccomp3v_cl" +sha256 = "7fd17ed297a1e263a2169ee7965be2d7dcb5adfb9efc97ec1d62a17f9d9d59c5" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "61657a4eac2599e1d246bf61b613eef45bc0ba2f161c3eed86c04096574dadd0" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "sky130_ef_ip__ccomp3v_cl" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 120 +max_height_um = 120 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "VOUT", + "DVDD", + "DVSS", + "VDD", + "VSS", + "VINP", + "VINM", + "CLOAD", + "ENA", +] + +[[task.evaluation.jobs]] +id = "low_cm" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.jobs.parameters.values] +common_mode = 0.5 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "mid_cm" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.jobs.parameters.values] +common_mode = 1.65 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "high_cm" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.jobs.parameters.values] +common_mode = 2.8 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "trip_voltage" +category = "performance" +observations = [ + "low_cm:trip_voltage", + "mid_cm:trip_voltage", + "high_cm:trip_voltage", +] +unit = "V" +direction = "target" +aggregation = "max" +baseline = [ + "source_low_cm:trip_voltage", + "source_mid_cm:trip_voltage", + "source_high_cm:trip_voltage", +] +normalization = "target" +scale = 0.001 +dimension = "bias" + +[[task.evaluation.metrics]] +id = "rise_delay" +category = "performance" +observations = [ + "low_cm:rise_delay", + "mid_cm:rise_delay", + "high_cm:rise_delay", +] +unit = "s" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_low_cm:rise_delay", + "source_mid_cm:rise_delay", + "source_high_cm:rise_delay", +] +normalization = "saturating_ratio" +scale = 1e-08 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "fall_delay" +category = "performance" +observations = [ + "low_cm:fall_delay", + "mid_cm:fall_delay", + "high_cm:fall_delay", +] +unit = "s" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_low_cm:fall_delay", + "source_mid_cm:fall_delay", + "source_high_cm:fall_delay", +] +normalization = "saturating_ratio" +scale = 1e-08 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "supply_power" +category = "performance" +observations = [ + "low_cm:supply_power", + "mid_cm:supply_power", + "high_cm:supply_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_low_cm:supply_power", + "source_mid_cm:supply_power", + "source_high_cm:supply_power", +] +normalization = "saturating_ratio" +scale = 0.0001 +dimension = "supply" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + +[[task.evaluation.metrics]] +id = "high_level" +category = "performance" +observations = [ + "low_cm:high_level", + "mid_cm:high_level", + "high_cm:high_level", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 1.6 +upper = 1.9 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[[task.evaluation.metrics]] +id = "low_level" +category = "performance" +observations = [ + "low_cm:low_level", + "mid_cm:low_level", + "high_cm:low_level", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = -0.1 +upper = 0.2 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 4542.708625 +rationale = "Offset preservation, rising delay, falling delay, supply power and area each carry 20%. Timing uses +/-20 mV overdrive and 1 pF output load at three input common modes; CLOAD is held at the same common mode. A 1 mV offset scale, 10 ns timing scale and 100 uW power scale avoid singular error ratios. Output logic levels remain functional requirements; offset, propagation delay and supply power are continuous quality objectives without fixed budget cutoffs." + +[task.evaluation.scoring.weights] +trip_voltage = 0.2 +rise_delay = 0.2 +fall_delay = 0.2 +supply_power = 0.2 +functional_area = 0.2 + +[task.evaluation.pre_layout] +source_report_sha256 = "99a0103db1a120380431a7c1029bc4f5c570ee41ac66eef1c1bcb264bfc54920" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 900.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_low_cm] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_low_cm.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_low_cm.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_low_cm.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.pre_layout.jobs.source_low_cm.parameters.values] +common_mode = 0.5 + +[task.evaluation.pre_layout.jobs.source_low_cm.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_low_cm.input_sha256] +deck = "61657a4eac2599e1d246bf61b613eef45bc0ba2f161c3eed86c04096574dadd0" +dut = "7fd17ed297a1e263a2169ee7965be2d7dcb5adfb9efc97ec1d62a17f9d9d59c5" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.fall_delay] +value = 5.420744e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.high_level] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.low_level] +value = 5.11301e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.rise_delay] +value = 1.605907e-07 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.supply_power] +value = 0.0004509336 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_low_cm.measurements.trip_voltage] +value = 0.0001247708 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_low_cm.output_sha256] +dc = "8f1aacd6b0ed76f5a369749159a794a129224a27296a2cf9162bc61f68372260" +transient = "45190c96dea76783e69e93f02b457c91ec01c0e7f93f0dd3d6f0bf0d1c19bd09" + +[task.evaluation.pre_layout.jobs.source_mid_cm] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_mid_cm.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_mid_cm.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_mid_cm.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.pre_layout.jobs.source_mid_cm.parameters.values] +common_mode = 1.65 + +[task.evaluation.pre_layout.jobs.source_mid_cm.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_mid_cm.input_sha256] +deck = "61657a4eac2599e1d246bf61b613eef45bc0ba2f161c3eed86c04096574dadd0" +dut = "7fd17ed297a1e263a2169ee7965be2d7dcb5adfb9efc97ec1d62a17f9d9d59c5" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.fall_delay] +value = 3.096436e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.high_level] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.low_level] +value = 5.113104e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.rise_delay] +value = 1.154989e-07 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.supply_power] +value = 0.0006039166 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_mid_cm.measurements.trip_voltage] +value = 0.0001250029 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_mid_cm.output_sha256] +dc = "10bc1bc906899f67b3f68c86ee8a5055af0812cc820286f6d0d4d508f339f6e7" +transient = "c00612d16e8beb40b0a0a1832cd8c5d56f6f2a623b9c1ffcf58eea0901821ee5" + +[task.evaluation.pre_layout.jobs.source_high_cm] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_high_cm.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_high_cm.outputs] +dc = "ngspice-raw" +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_high_cm.parameters.measurements] +trip_voltage = "V" +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" +supply_power = "W" + +[task.evaluation.pre_layout.jobs.source_high_cm.parameters.values] +common_mode = 2.8 + +[task.evaluation.pre_layout.jobs.source_high_cm.parameters.exports] +dc = "dc.raw" +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_high_cm.input_sha256] +deck = "61657a4eac2599e1d246bf61b613eef45bc0ba2f161c3eed86c04096574dadd0" +dut = "7fd17ed297a1e263a2169ee7965be2d7dcb5adfb9efc97ec1d62a17f9d9d59c5" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.fall_delay] +value = 3.280079e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.high_level] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.low_level] +value = 5.11316e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.rise_delay] +value = 1.197226e-07 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.supply_power] +value = 0.0005314422 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_high_cm.measurements.trip_voltage] +value = 0.0001250002 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_high_cm.output_sha256] +dc = "858cb2b9928c85c8bb478d5d6801f3a26743b5d44714af9e4a599d1f4c32b8d7" +transient = "426ef739eb2bb71e47262a1f45029265f6552ea19fa3de4c56ec738e351227be" + +[qualification] +reference = "reference/ccomp3v.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 900 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Mixed-signal" +summary = "Compares differential inputs across three common-mode voltages with a complementary input load." diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/circuit.spice b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..36180e4e1bfa1a272b92c548236432d1fe17cb04 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/circuit.spice @@ -0,0 +1,142 @@ +** sch_path: /source/xschem/sky130_ef_ip__ccomp3v_cl.sch +.subckt sky130_ef_ip__ccomp3v_cl VOUT DVDD DVSS VDD VSS VINP VINM CLOAD ENA +*.PININFO VDD:I VOUT:O VSS:I VINP:I VINM:I DVDD:I DVSS:I CLOAD:I ENA:I +x2 VDD VSS VBP VBN ena3v3 comparator_bias +x3 VDD VBP VBN VSS VINP VOUT VINM DVDD CLOAD ena3v3 comparator_core_cload +x1 ENA DVDD DVSS DVSS VDD VDD ena3v3 sky130_fd_sc_hvl__lsbuflv2hv_1 +x4 ENA DVSS DVSS VDD VDD sky130_fd_sc_hvl__diode_2 +x5 DVSS DVSS VDD VDD sky130_fd_sc_hvl__decap_4 +.ends + +* expanding symbol: comparator_bias.sym # of pins=5 +** sym_path: /source/xschem/comparator_bias.sym +** sch_path: /source/xschem/comparator_bias.sch +.subckt comparator_bias VDD VSS VBP VBN ena3v3 +*.PININFO VBP:O VBN:O VDD:B VSS:B ena3v3:I +XM3 net1 net2 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=20 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM4 net3 net1 net2 VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=20 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 VBN VBN net2 VDD sky130_fd_pr__pfet_g5v0d10v5 L=15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM7 VBP VBP VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=1 W=4 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM1 VBN VBN VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net1 VBN VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM6 VBP VBN VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net3 ena3v3 VBN VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net1 VSS VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 VBP VSS VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 net2 VDD VDD sky130_fd_pr__res_high_po_1p41 L=135 mult=1 m=1 +.ends + + +* expanding symbol: comparator_core_cload.sym # of pins=10 +** sym_path: /source/xschem/comparator_core_cload.sym +** sch_path: /source/xschem/comparator_core_cload.sch +.subckt comparator_core_cload VDD VBP VBN VSS VINP VOUT VINM DVDD CLOAD ena3v3 +*.PININFO VINP:I VINM:I VBN:I VBP:I VDD:B VSS:B VOUT:O DVDD:B CLOAD:I ena3v3:I +XM3 net10 VBN VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM4 net4 net4 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=3 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM5 net11 net4 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=3 W=15 nf=3 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM6 net3 net3 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM7 net2 net2 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM8 net4 net3 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=3 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM9 VOUTANALOG net2 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=3 W=15 nf=3 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM10 net6 VINM net5 VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM11 net7 VINP net5 VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM12 net12 VBP VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM13 net8 net8 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM14 VOUTANALOG net8 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=15 nf=3 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM15 net6 net6 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM16 net7 net7 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM17 net8 net6 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM18 VOUTANALOG net7 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=15 nf=3 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM19 net9 VOUTANALOG VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=20 nf=4 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM20 net9 VOUTANALOG VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM21 VOUT net9 DVDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM22 VOUT net9 VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM23 net1 VSS VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM24 net5 VDD VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM25 VSS VSS VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=7 m=7 +XM26 VDD VDD VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=7 m=7 +XM1 net3 VINM net1 VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM2 net2 VINP net1 VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM27 net1 VBP net10 VSS sky130_fd_pr__nfet_g5v0d10v5 L=8 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM28 VOUTANALOG VBP net11 VSS sky130_fd_pr__nfet_g5v0d10v5 L=1.75 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM29 net5 VBN net12 VDD sky130_fd_pr__pfet_g5v0d10v5 L=8 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2 +XM30 VSS CLOAD VSS VSS sky130_fd_pr__nfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM31 VDD CLOAD VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=2 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=4 m=4 +XM32 VOUTANALOG ena3v3 VDD VDD sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +.ends + + +.subckt sky130_fd_sc_hvl__lsbuflv2hv_1 A LVPWR VGND VNB VPB VPWR X +X0 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X2 X a_1711_885# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X3 X a_1711_885# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X4 VGND A a_404_1133# VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X5 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 VPWR a_1197_107# a_504_1221# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +X7 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X8 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X9 a_772_151# a_404_1133# VGND VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X10 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X11 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X12 LVPWR A a_404_1133# LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X13 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X14 VPWR a_504_1221# a_1711_885# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X15 VGND a_504_1221# a_1711_885# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X16 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X17 a_772_151# a_404_1133# LVPWR LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X18 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X19 VPWR a_504_1221# a_1197_107# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +.ends + +.subckt sky130_fd_sc_hvl__diode_2 DIODE VGND VNB VPB VPWR +XD0 VNB DIODE sky130_fd_pr__diode_pw2nd_11v0 perim=3.16 area=0.6072 +.ends + +.subckt sky130_fd_sc_hvl__decap_4 VGND VNB VPB VPWR +X0 VGND VPWR VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=1e+06u +X1 VPWR VGND VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1e+06u l=1e+06u +.ends diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/schematic.svg b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..5f434a2af470632115e41e2658f6a9bf5496ca95 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/schematic.svg @@ -0,0 +1 @@ +sky130_ef_ip__ccomp3v_clALVPWRVGNDVNBVPBVPWRXVDDVSSVBPVBNena3v3VDDVBPVBNVSSVINPVOUTVINMDVDDCLOADena3v3DIODEVGNDVNBVPBVPWRVGNDVNBVPBVPWRVDDVDDVSSENAena3v3DVSSDVSSVDDVDDENADVSSDVSSVDDVBPVDDVOUTDVDDDVSSVDDVSSVINPVINMCLOADENAVBNena3v3VOUTDVDDVDDVSSVINPVINMVDDCLOADVBPVBNena3v3DVDDDVSSDVSSccomp3v_clx2comparator_biasx3comparator_core_cloadx1lsbuflv2hv_1x4diode_2x5decap_4 diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/testbench.spice b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..b89b1c9fb7e0bf8a781750f66f16f07105835d38 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/materials/testbench.spice @@ -0,0 +1,31 @@ +* Continuous comparator: DC offset and +/-20 mV transient overdrive. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +.option klu rshunt=1e12 method=gear +Va avdd 0 3.3 +Vd dvdd 0 1.8 +Ven ena 0 1.8 +Vcm cm 0 {common_mode} +Vdiff inp cm DC 0 PULSE(-20m 20m 10u 2n 2n 5u 10u) +Xdut out dvdd 0 avdd 0 inp cm cm ena sky130_ef_ip__ccomp3v_cl +Cload out 0 1p +.control +save i(va) i(vd) i(ven) v(cm) v(inp) v(out) +dc Vdiff -0.05 0.05 0.00025 +let input_difference=v(inp)-v(cm) +meas dc trip_voltage FIND input_difference WHEN v(out)=0.9 RISE=1 +write dc.raw input_difference v(out) +tran 2n 28u +let transient_difference=v(inp)-v(cm) +meas tran rise_delay TRIG transient_difference VAL=0 RISE=1 TARG v(out) VAL=0.9 RISE=1 +meas tran fall_delay TRIG transient_difference VAL=0 FALL=1 TARG v(out) VAL=0.9 FALL=1 +meas tran high_level FIND v(out) AT=14u +meas tran low_level FIND v(out) AT=19u +let power=-3.3*i(Va)-1.8*i(Vd)-1.8*i(Ven) +meas tran supply_power AVG power FROM=10u TO=28u +write transient.raw v(inp) v(cm) v(out) +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/problem.md b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..52a8f44b326c431beb76615558eb1ca08abe58c9 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/problem.md @@ -0,0 +1,39 @@ +# SKY130 Continuous Comparator with Complementary Input Load Layout Task + +## Objective + +Implement `sky130_ef_ip__ccomp3v_cl` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `VOUT DVDD DVSS VDD VSS VINP VINM CLOAD ENA`. Declared inputs include `problem.md`, `materials/circuit.spice` and `materials/testbench.spice`. The runtime provides models and process resources; reference layouts, author code and qualification evidence are maintainer-only materials. + +## Operating Conditions + +Use the synchronized _cl circuit/layout variant from the source. Analog supply is 3.3 V, digital supply and enable 1.8 V, output load 1 pF. Input common modes are 0.5, 1.65, 2.8 V, with CLOAD connected to the same common mode. DC differential-input sweep is -50 to +50 mV in 0.25 mV steps; transient uses ±20 mV overdrive and 2 ns edges. Measure switching point, rising/falling delay and logic levels separately. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `sky130_ef_ip__ccomp3v_cl`. Functional geometry must fit within the 120 × 120 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +At all three common modes, high levels must be 1.6–1.9 V and low levels -0.1–0.2 V; required crossings in both directions must exist. Switching offset, propagation delay and power are scored continuously; original 10 mV, 1 us and 5 mW budgets are no longer rejection thresholds. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 20% | +| `trip_voltage` | No fixed performance bound | max | 20% | +| `rise_delay` | 0 … +∞ s | max | 20% | +| `fall_delay` | 0 … +∞ s | max | 20% | +| `supply_power` | 0 … +∞ W | max | 20% | +| `high_level` | 1.6 … 1.9 V | max | 0% | +| `low_level` | -0.1 … 0.2 V | max | 0% | + +Pair electrical quality with independent source-netlist observations under exactly the same conditions, taking the worst paired quality for each metric. Gain in dB uses `10^((x-b)/20)`; target quantities use `1/(1+abs(x-b)/s)`; ratio quantities use `x/b` or `b/x` according to optimization direction; cost quantities declaring `saturating_ratio` use `2*(b+s)/(b+x+2*s)`. `x` is the candidate observation, `b` is the source observation and `s` is the contract's physical normalization scale. These define no degradation allowance. Zero-weight observations still undergo measurement and functional checks. + +Area quality is `4542.708625 um² / candidate functional area`; the area target is the original reference layout's functional-footprint soft target, and a separate envelope constraint controls functional bounds. Total score is `100 × product(q_i^w_i)`, using the contract's `layout` method and original weights. Source-equivalent performance at target area scores 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; missing or unusable measurements make the score unknown. Capability coefficient `3` is independent of this quality score. + +## Tools and Submission + +Solve budget: 8 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/reference/ccomp3v.gds b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/reference/ccomp3v.gds new file mode 100644 index 0000000000000000000000000000000000000000..6f8d140ff56707f148823be06e38bbb1137e2e7e --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__ccomp3v/cases/ccomp3v/reference/ccomp3v.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:b672f8dbc89b170681fb59d62561b11a1e500b690e788dc0bad00d2e02893a7b +size 1020580 diff --git a/tasks/sky130A/sky130_ef_ip__opamp/LICENSE b/tasks/sky130A/sky130_ef_ip__opamp/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..261eeb9e9f8b2b4b0d119366dda99c6fd7d35c64 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/sky130_ef_ip__opamp/NOTICE b/tasks/sky130A/sky130_ef_ip__opamp/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..cd08c76a3373170b5fb4c398f93e109ff2391424 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/NOTICE @@ -0,0 +1,4 @@ +Efabless SKY130 operational amplifier, Apache-2.0. +Upstream https://github.com/efabless/sky130_ef_ip__opamp +Commit f0eb5cd47112d90fd6d7792ba68e763beacac8e7 +Local source and geometry adaptations are recorded in cases/opamp/design/provenance.json. diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/case.toml b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..85a1989db475b77b619162944b47481f43066171 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/case.toml @@ -0,0 +1,676 @@ +kind = "layout_case" +id = "sky130A.sky130_ef_ip__opamp.opamp" +title = "SKY130 3.3 V Rail-to-Rail Operational Amplifier" +status = "qualified" +in_core = false + +[[assets]] +path = "reference/opamp.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "5c516a05ccbdfdcaf508963c885356f61b7fb0eaa337d7abec6a69746ec3bada" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "fb9d0c474edb448b2b9266d09c9492f936002fffb9019170f7efc5f76bd8da0e" + +[origin] +url = "https://github.com/efabless/sky130_ef_ip__opamp/tree/f0eb5cd47112d90fd6d7792ba68e763beacac8e7" + +[task] +kind = "netlist_to_gds" +hours = 8 +family = "sky130_opamp" +coefficient = 3 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "c0f1fb66eda614eb2be5958f2df02384ccd40542be04e8dca9a97f33ba485861" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "sky130_ef_ip__opamp" +sha256 = "12b9a110d6e630c1d51f61891154997f19672dce63c6d65883c740d4ae67882a" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "8a445a3cbb29766dbfafa634a369c25f82df226c1d319a7f2aa80ae10f9b4537" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "sky130_ef_ip__opamp" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 80 +max_height_um = 100 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "vdd", + "out", + "ena", + "vss", + "inp", + "inm", +] + +[[task.evaluation.jobs]] +id = "light" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 1e-13 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "nominal" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 5e-13 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.jobs]] +id = "heavy" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.jobs.parameters.values] +load_capacitance = 1e-12 + +[task.evaluation.jobs.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "gain_low" +category = "performance" +observations = [ + "light:gain_low", + "nominal:gain_low", + "heavy:gain_low", +] +unit = "dB" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_light:gain_low", + "source_nominal:gain_low", + "source_heavy:gain_low", +] +normalization = "db20" +dimension = "response" + +[[task.evaluation.metrics]] +id = "unity_hz" +category = "performance" +observations = [ + "light:unity_hz", + "nominal:unity_hz", + "heavy:unity_hz", +] +unit = "Hz" +direction = "maximize" +aggregation = "min" +baseline = [ + "source_light:unity_hz", + "source_nominal:unity_hz", + "source_heavy:unity_hz", +] +normalization = "ratio" +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[[task.evaluation.metrics]] +id = "supply_power" +category = "performance" +observations = [ + "light:supply_power", + "nominal:supply_power", + "heavy:supply_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_light:supply_power", + "source_nominal:supply_power", + "source_heavy:supply_power", +] +normalization = "saturating_ratio" +dimension = "supply" +scale = 0.0001 + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + +[[task.evaluation.metrics]] +id = "phase_margin" +category = "performance" +observations = [ + "light:phase_margin", + "nominal:phase_margin", + "heavy:phase_margin", +] +unit = "deg" +direction = "target" +aggregation = "min" + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 180 +rationale = "The declared negative-feedback loop must remain on its measured 0 to 180 degree stable-feedback branch at the specified crossing; the previous 45 degree design margin is not a validity cutoff." + +[[task.evaluation.metrics]] +id = "bias_voltage" +category = "performance" +observations = [ + "light:bias_voltage", + "nominal:bias_voltage", + "heavy:bias_voltage", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 1 +upper = 2.3 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 2118.8931 +rationale = "Voltage gain and unity-gain bandwidth carry 60%, supply power 20%, and area 20%. The same source and extracted fixtures use 0.1/0.5/1 pF and 100 Mohm loads at TT, 27 C, 3.3 V supply and 1.8 V enable. A stable 0 to 180 degree phase-margin branch and valid output bias are functional requirements; gain, bandwidth and power have no fixed design-budget cutoff. Area target is the frozen reference functional footprint." + +[task.evaluation.scoring.weights] +gain_low = 0.3 +unity_hz = 0.3 +supply_power = 0.2 +functional_area = 0.2 + +[task.evaluation.pre_layout] +source_report_sha256 = "6126a840789ce0d901476faaca9ece5797f7ef7bd8f22c6cd9c84d20a9614725" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_light] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_light.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_light.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_light.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_light.parameters.values] +load_capacitance = 1e-13 + +[task.evaluation.pre_layout.jobs.source_light.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_light.input_sha256] +deck = "8a445a3cbb29766dbfafa634a369c25f82df226c1d319a7f2aa80ae10f9b4537" +dut = "12b9a110d6e630c1d51f61891154997f19672dce63c6d65883c740d4ae67882a" + +[task.evaluation.pre_layout.jobs.source_light.measurements.bias_voltage] +value = 1.648869 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_light.measurements.gain_low] +value = 54.34573 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_light.measurements.phase_margin] +value = 81.74539 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_light.measurements.supply_power] +value = 0.0003807927 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_light.measurements.unity_hz] +value = 32851740.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_light.output_sha256] +op = "7a0b5909e973a5890443a4f011827a5669018ec78e6d8dc0bb53c658a132850f" +ac = "0618f1ffac75e792207d67c8e47a718d00c7f9127b3546cca63eab7448514eda" + +[task.evaluation.pre_layout.jobs.source_nominal] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_nominal.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_nominal.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.values] +load_capacitance = 5e-13 + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_nominal.input_sha256] +deck = "8a445a3cbb29766dbfafa634a369c25f82df226c1d319a7f2aa80ae10f9b4537" +dut = "12b9a110d6e630c1d51f61891154997f19672dce63c6d65883c740d4ae67882a" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.bias_voltage] +value = 1.648869 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.gain_low] +value = 54.34573 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.phase_margin] +value = 75.9951 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.supply_power] +value = 0.0003807927 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.unity_hz] +value = 32396710.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +op = "20527807e84bdaed92d8e7593822363275d8061b96b1a1bb37d3e825dbd68a9a" +ac = "e4584a915d8b184f3684377507e72b8c02885b723b713327b0c67b3865535e0b" + +[task.evaluation.pre_layout.jobs.source_heavy] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_heavy.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_heavy.outputs] +op = "ngspice-raw" +ac = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.measurements] +bias_voltage = "V" +supply_power = "W" +gain_low = "dB" +unity_hz = "Hz" +phase_margin = "deg" + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.values] +load_capacitance = 1e-12 + +[task.evaluation.pre_layout.jobs.source_heavy.parameters.exports] +op = "op.raw" +ac = "ac.raw" + +[task.evaluation.pre_layout.jobs.source_heavy.input_sha256] +deck = "8a445a3cbb29766dbfafa634a369c25f82df226c1d319a7f2aa80ae10f9b4537" +dut = "12b9a110d6e630c1d51f61891154997f19672dce63c6d65883c740d4ae67882a" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.bias_voltage] +value = 1.648869 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.gain_low] +value = 54.34573 +unit = "dB" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.phase_margin] +value = 69.55286 +unit = "deg" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.supply_power] +value = 0.0003807927 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_heavy.measurements.unity_hz] +value = 31488070.0 +unit = "Hz" + +[task.evaluation.pre_layout.jobs.source_heavy.output_sha256] +op = "dde9a9510d695792cee05363a268b3409c798fd2507017db37e2f4e28c2e931f" +ac = "e33b2a82e761deac964ae829a8d2d7d3bec7f148f274619375c34c8e19900773" + +[qualification] +reference = "reference/opamp.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 240 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Amplifiers & RF" +summary = "Amplifies differential inputs with a 3.3 V rail-to-rail operational amplifier under the declared capacitive loads." diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/circuit.spice b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..1e600700e7f9630abd5780658f2f58ad4046076c --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/circuit.spice @@ -0,0 +1,52 @@ +** sch_path: /source/xschem/sky130_ef_ip__opamp.sch +.subckt sky130_ef_ip__opamp vdd out ena vss inp inm +*.PININFO inp:I vdd:I vss:I out:O ena:I inm:I +XM4 pdrv1 net1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 vdd net1 net1 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 vcomn1 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 vss nbias nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=4 nf=4 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net4 vdd vss sky130_fd_pr__res_xhigh_po_0p35 L=100 mult=1 m=1 +XM20 out pdrv1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=200 nf=200 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM22 out ndrv vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=120 nf=120 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM24 pbias nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM25 vdd pbias pbias vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM26 vcomp pbias vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM27 net2 inm vcomp vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM28 vcomp inp ndrv vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM29 ndrv net2 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM30 vss net2 net2 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM1 net1 inm vcomn1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 vcomn1 inp pdrv1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM3 pdrv2 net3 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM6 vdd net3 net3 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM7 vcomn2 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net3 inm vcomn2 vss sky130_fd_pr__nfet_03v3_nvt L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 vcomn2 inp pdrv2 vss sky130_fd_pr__nfet_03v3_nvt L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 vdd pdrv2 out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=200 nf=200 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD1 vss inp sky130_fd_pr__diode_pw2nd_05v5 area=0.36 perim=2.4 +XM13 net4 ena nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD2 vss ena sky130_fd_pr__diode_pw2nd_05v5 area=0.36 perim=2.4 +XXD3 vss inm sky130_fd_pr__diode_pw2nd_05v5 area=0.36 perim=2.4 +.ends diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/schematic.svg b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..0b2d02c3a10491a53eb1292ee6ce4eeaf0e98dac --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/schematic.svg @@ -0,0 +1 @@ +sky130_ef_ip__opampvddnet4vddvddoutpdrv1vddoutvssvssndrvvssvssnbiaspbiaspdrv1vddvddpbiaspbiasvddvddpbiasvcompnet1vddinmvcompnet2vddinpndrvvcompvssvssndrvnet2vssvssnet2net2vddvssinmnet1vcomn1vssinppdrv1vcomn1vddvddvddpdrv2net3vddvddnet3net3net1vssvssnbiasvcomn2vssinmnet3vcomn2net1vssinppdrv2vcomn2vddvddoutpdrv2vssinpenavssnbiasnet4enavssvssvssinmvddoutenavssinpinmvssvcomn1nbiasvssvssvddnbiasnbiasopampXM4pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM5pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM9nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM10nfet_g5v0d10v5L=0.5 W=4nf=4 mult=1m=1XR1res_xhigh_po_0p35L=100 mult=1m=1Substrate: B=vssXM20pfet_g5v0d10v5L=0.5 W=200nf=200 mult=1m=1XM22nfet_g5v0d10v5L=0.5 W=120nf=120 mult=1m=1XM24nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM25pfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM26pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM27pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM28pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM29nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM30nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM1nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM2nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM3pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM6pfet_g5v0d10v5L=0.5 W=2nf=2 mult=1m=1XM7nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XM8nfet_03v3_nvtL=0.5 W=1nf=1 mult=1m=1XM11nfet_03v3_nvtL=0.5 W=1nf=1 mult=1m=1XM12pfet_g5v0d10v5L=0.5 W=200nf=200 mult=1m=1XXD1diode_pw2nd_05v5area=0.36 perim=2.4XM13nfet_g5v0d10v5L=0.5 W=1nf=1 mult=1m=1XXD2diode_pw2nd_05v5area=0.36 perim=2.4XXD3diode_pw2nd_05v5area=0.36 perim=2.4 diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/testbench.spice b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..c87d367611d0d21a921429c798288b4147965fa1 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/materials/testbench.spice @@ -0,0 +1,31 @@ +* Open-loop small-signal response with DC-only unity feedback. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +Vdd vdd 0 3.3 +Vena ena 0 1.8 +Vin inp 0 DC 1.65 AC 1 +Lfb out inm 1e12 +Cfb inm 0 1e12 +Xdut vdd out ena 0 inp inm sky130_ef_ip__opamp +Cload out 0 {load_capacitance} +Rload out 0 100meg +.control +op +let bias_voltage=v(out) +let supply_power=-3.3*i(Vdd)-1.8*i(Vena) +print bias_voltage supply_power +write op.raw v(out) i(Vdd) i(Vena) +save i(vdd) i(vena) v(inm) v(inp) v(out) +ac dec 100 1 1e9 +let gain_db=db(v(out)) +let magnitude=mag(v(out)) +let phase_margin_curve=180+180/PI*cph(v(out)) +meas ac gain_low FIND gain_db AT=1 +meas ac unity_hz WHEN magnitude=1 FALL=1 +meas ac phase_margin FIND phase_margin_curve WHEN magnitude=1 FALL=1 +write ac.raw v(out) v(inp) v(inm) +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/problem.md b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..4fe02ca802a9d0b8c9aa8d77c116013728e25ec0 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/problem.md @@ -0,0 +1,38 @@ +# SKY130 3.3 V Operational Amplifier Layout Task + +## Objective + +Implement `sky130_ef_ip__opamp` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `vdd out ena vss inp inm`. Declared inputs include `problem.md`, `materials/circuit.spice` and `materials/testbench.spice`. The runtime provides models and process resources; reference layouts, author code and qualification evidence are maintainer-only materials. + +## Operating Conditions + +Supply 3.3 V, enable 1.8 V, input common mode 1.65 V. Use output loads 0.1, 0.5, 1 pF and 100 Mohm resistance; the declared large-inductance/capacitance fixture closes DC feedback and breaks AC feedback. Measure low-frequency gain, unity-gain crossing, phase margin and supply power. 5 pF is outside this task's operating conditions. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `sky130_ef_ip__opamp`. Functional geometry must fit within the 80 × 100 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +Output bias must be 1.0–2.3 V; phase margin at the unity-gain crossing must lie on the stable-feedback branch within 0–180 degrees, and the crossing must exist. Gain, bandwidth and power are scored continuously, without fixed 40 dB, 1 MHz, 5 mW or 45 degree design-budget rejection thresholds. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 20% | +| `gain_low` | No fixed performance bound | min | 30% | +| `unity_hz` | 0 … +∞ Hz | min | 30% | +| `supply_power` | 0 … +∞ W | max | 20% | +| `phase_margin` | 0 … 180 deg | min | 0% | +| `bias_voltage` | 1 … 2.3 V | max | 0% | + +Pair electrical quality with independent source-netlist observations under exactly the same conditions, taking the worst paired quality for each metric. Gain in dB uses `10^((x-b)/20)`; target quantities use `1/(1+abs(x-b)/s)`; ratio quantities use `x/b` or `b/x` according to optimization direction; cost quantities declaring `saturating_ratio` use `2*(b+s)/(b+x+2*s)`. `x` is the candidate observation, `b` is the source observation and `s` is the contract's physical normalization scale. These define no degradation allowance. Zero-weight observations still undergo measurement and functional checks. + +Area quality is `2118.8931 um² / candidate functional area`; the area target is the original reference layout's functional-footprint soft target, and a separate envelope constraint controls functional bounds. Total score is `100 × product(q_i^w_i)`, using the contract's `layout` method and original weights. Source-equivalent performance at target area scores 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; missing or unusable measurements make the score unknown. Capability coefficient `3` is independent of this quality score. + +## Tools and Submission + +Solve budget: 8 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/reference/opamp.gds b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/reference/opamp.gds new file mode 100644 index 0000000000000000000000000000000000000000..954ed5b47b6934397f9aa87e3abc722129d9cedc --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__opamp/cases/opamp/reference/opamp.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:5c516a05ccbdfdcaf508963c885356f61b7fb0eaa337d7abec6a69746ec3bada +size 1024460 diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/LICENSE b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..261eeb9e9f8b2b4b0d119366dda99c6fd7d35c64 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/NOTICE b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..d989c25f10f6fa2425c36ee9399f2af522e96fcb --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/NOTICE @@ -0,0 +1,6 @@ +Efabless SKY130 8-bit resistor DAC, Apache-2.0. +https://github.com/efabless/sky130_ef_ip__rdac3v_8bit +Commit 51a71b1af27fbb5e328536fa7c55e97698676015. +Includes the pinned samplehold follower and Apache-2.0 HVL cell definitions. +Samplehold dependency: https://github.com/efabless/sky130_ef_ip__samplehold +Commit 5d5c1e9e172c4afc1a48adc3fe18fbe62642ca39 (parent gitlink). diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/case.toml b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..30debcdd98cd791e6634283b9d52ba703884b054 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/case.toml @@ -0,0 +1,909 @@ +kind = "layout_case" +id = "sky130A.sky130_ef_ip__rdac3v_8bit.rdac3v_8bit" +title = "SKY130 8-Bit Buffered Resistor DAC" +status = "qualified" +in_core = true + +[[assets]] +path = "reference/rdac3v_8bit.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "b7df0ee8876a782b945760da0c570d1eba72ccda9d3bf5c9a5e99c50e75514a7" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "c3d2c3d9bf5e6fe722096ae4188b26ab1bedc4982531ca2428c4de43b5868952" + +[origin] +url = "https://github.com/efabless/sky130_ef_ip__rdac3v_8bit/tree/51a71b1af27fbb5e328536fa7c55e97698676015" + +[task] +kind = "netlist_to_gds" +hours = 12 +family = "sky130_dac" +coefficient = 4 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "95305538159bf6be78b63d229775af59049500b590178dc6c53e90d19283ac86" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "sky130_ef_ip__rdac3v_8bit" +sha256 = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.inputs.dc] +path = "materials/testbench_dc.spice" +format = "spice" +sha256 = "ec3defe3131749e741e5843cabf3ba8af057d3b37d145e6d4cc45fe15ba1d1dc" + +[task.inputs.transient] +path = "materials/testbench_transient.spice" +format = "spice" +sha256 = "be65c5e4c51cb2c4a61da501fc96b73f7467063f1a8cf54ab55ca08ba7436744" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "sky130_ef_ip__rdac3v_8bit" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 250 +max_height_um = 300 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "dvdd", + "avss", + "dvss", + "avdd", + "b[7]", + "b[6]", + "b[5]", + "b[4]", + "b[3]", + "b[2]", + "b[1]", + "b[0]", + "Vhigh", + "out", + "ena", + "Vlow", +] + +[[task.evaluation.jobs]] +id = "codes_0" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:dc" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.jobs.parameters.values] +code_start = 0 +code_stop = 64 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "codes_1" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:dc" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.jobs.parameters.values] +code_start = 64 +code_stop = 128 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "codes_2" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:dc" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.jobs.parameters.values] +code_start = 128 +code_stop = 192 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "codes_3" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:dc" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +dc = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.jobs.parameters.values] +code_start = 192 +code_stop = 255 + +[task.evaluation.jobs.parameters.exports] +dc = "dc.raw" + +[[task.evaluation.jobs]] +id = "transition" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:transient" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "inl_max" +category = "performance" +observations = [ + "codes_0:inl_max", + "codes_1:inl_max", + "codes_2:inl_max", + "codes_3:inl_max", +] +unit = "LSB" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_codes_0:inl_max", + "source_codes_1:inl_max", + "source_codes_2:inl_max", + "source_codes_3:inl_max", +] +normalization = "saturating_ratio" +scale = 0.05 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared absolute current-ratio or endpoint-fit linearity error has a nonnegative measurement domain; precision is a scored quality observation or an unweighted diagnostic." + +[task.evaluation.metrics.quality_target] +value = 0.15 +rationale = "Aim for at most 0.15 LSB endpoint-fit INL over every one of the 256 output codes." + +[[task.evaluation.metrics]] +id = "dnl_max" +category = "performance" +observations = [ + "codes_0:dnl_max", + "codes_1:dnl_max", + "codes_2:dnl_max", + "codes_3:dnl_max", +] +unit = "LSB" +direction = "minimize" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared absolute current-ratio or endpoint-fit linearity error has a nonnegative measurement domain; precision is a scored quality observation or an unweighted diagnostic." + +[[task.evaluation.metrics]] +id = "span" +category = "performance" +observations = [ + "codes_0:span", + "codes_1:span", + "codes_2:span", + "codes_3:span", +] +unit = "V" +direction = "maximize" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 1.5 +upper = 1.7 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[[task.evaluation.metrics]] +id = "min_step" +category = "performance" +observations = [ + "codes_0:min_step", + "codes_1:min_step", + "codes_2:min_step", + "codes_3:min_step", +] +unit = "V" +direction = "maximize" +aggregation = "min" + +[task.evaluation.metrics.requirement] +lower = 1e-06 +rationale = "Every adjacent DAC code must increase the output by at least 1 uV, a numerical monotonicity allowance far below the approximately 6 mV LSB; a flat or decreasing code is not the declared converter function." + +[[task.evaluation.metrics]] +id = "dc_power" +category = "performance" +observations = [ + "codes_0:dc_power", + "codes_1:dc_power", + "codes_2:dc_power", + "codes_3:dc_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_codes_0:dc_power", + "source_codes_1:dc_power", + "source_codes_2:dc_power", + "source_codes_3:dc_power", +] +normalization = "saturating_ratio" +scale = 1e-06 +dimension = "supply" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + +[[task.evaluation.metrics]] +id = "rise_delay" +category = "performance" +observations = [ + "transition:rise_delay", +] +unit = "s" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_transition:rise_delay", +] +normalization = "saturating_ratio" +scale = 1e-09 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[task.evaluation.metrics.quality_target] +value = 2e-08 +rationale = "Reach the declared rising-output threshold within 20 ns after the full-scale code switch at 1 pF." + +[[task.evaluation.metrics]] +id = "fall_delay" +category = "performance" +observations = [ + "transition:fall_delay", +] +unit = "s" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_transition:fall_delay", +] +normalization = "saturating_ratio" +scale = 1e-09 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation." + +[task.evaluation.metrics.quality_target] +value = 3e-08 +rationale = "Reach the declared falling-output threshold within 30 ns after the full-scale code switch at 1 pF." + +[[task.evaluation.metrics]] +id = "high_level" +category = "performance" +observations = [ + "transition:high_level", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 2.35 +upper = 2.45 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[[task.evaluation.metrics]] +id = "low_level" +category = "performance" +observations = [ + "transition:low_level", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 0.75 +upper = 0.85 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 10000.0 +rationale = "The 10000 um2 footprint rewards a compact resistor array and decoder/buffer interconnect. INL 40% and area 35% dominate; separate rising/falling full-scale delays each receive 10%, with 1 ns scales so parasitic delay is visible. The 0.15 LSB target is a precision goal, not a monotonicity cutoff. DC power carries 5% because fixed bias largely sets it." + +[task.evaluation.scoring.weights] +inl_max = 0.4 +rise_delay = 0.1 +fall_delay = 0.1 +dc_power = 0.05 +functional_area = 0.35 + +[task.evaluation.pre_layout] +source_report_sha256 = "ae3bf800a6f61e50af24117fbe5a8af9d4f133f69fd48708fb377031341eda54" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 2400.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_codes_0] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_codes_0.inputs] +deck = "input:dc" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_codes_0.outputs] +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_codes_0.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.pre_layout.jobs.source_codes_0.parameters.values] +code_start = 0 +code_stop = 64 + +[task.evaluation.pre_layout.jobs.source_codes_0.parameters.exports] +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_codes_0.input_sha256] +deck = "ec3defe3131749e741e5843cabf3ba8af057d3b37d145e6d4cc45fe15ba1d1dc" +dut = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.evaluation.pre_layout.jobs.source_codes_0.measurements.dc_power] +value = 8.916166e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_codes_0.measurements.dnl_max] +value = 0.00180807 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_0.measurements.inl_max] +value = 0.09331731 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_0.measurements.min_step] +value = 0.00624381 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_0.measurements.span] +value = 1.595056 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_0.output_sha256] +dc = "4e5a78185853483fd02d1016ae795c049be7ba045587bb44ac8e96560104bf59" + +[task.evaluation.pre_layout.jobs.source_codes_1] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_codes_1.inputs] +deck = "input:dc" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_codes_1.outputs] +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_codes_1.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.pre_layout.jobs.source_codes_1.parameters.values] +code_start = 64 +code_stop = 128 + +[task.evaluation.pre_layout.jobs.source_codes_1.parameters.exports] +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_codes_1.input_sha256] +deck = "ec3defe3131749e741e5843cabf3ba8af057d3b37d145e6d4cc45fe15ba1d1dc" +dut = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.evaluation.pre_layout.jobs.source_codes_1.measurements.dc_power] +value = 9.360371e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_codes_1.measurements.dnl_max] +value = 0.001746836 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_1.measurements.inl_max] +value = 0.1859137 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_1.measurements.min_step] +value = 0.006244193 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_1.measurements.span] +value = 1.595056 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_1.output_sha256] +dc = "dd1719776ed53d739092fcaf005c41c5376d1ce50c193f5e3d763ccf46903b00" + +[task.evaluation.pre_layout.jobs.source_codes_2] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_codes_2.inputs] +deck = "input:dc" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_codes_2.outputs] +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_codes_2.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.pre_layout.jobs.source_codes_2.parameters.values] +code_start = 128 +code_stop = 192 + +[task.evaluation.pre_layout.jobs.source_codes_2.parameters.exports] +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_codes_2.input_sha256] +deck = "ec3defe3131749e741e5843cabf3ba8af057d3b37d145e6d4cc45fe15ba1d1dc" +dut = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.evaluation.pre_layout.jobs.source_codes_2.measurements.dc_power] +value = 9.644762e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_codes_2.measurements.dnl_max] +value = 0.001058925 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_2.measurements.inl_max] +value = 0.2179267 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_2.measurements.min_step] +value = 0.006248496 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_2.measurements.span] +value = 1.595056 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_2.output_sha256] +dc = "0a8485a549caa217f499572c4dccfc1f06b68f0d6d87e14a4fd30ebaf977be8a" + +[task.evaluation.pre_layout.jobs.source_codes_3] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_codes_3.inputs] +deck = "input:dc" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_codes_3.outputs] +dc = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_codes_3.parameters.measurements] +span = "V" +inl_max = "LSB" +dnl_max = "LSB" +min_step = "V" +dc_power = "W" + +[task.evaluation.pre_layout.jobs.source_codes_3.parameters.values] +code_start = 192 +code_stop = 255 + +[task.evaluation.pre_layout.jobs.source_codes_3.parameters.exports] +dc = "dc.raw" + +[task.evaluation.pre_layout.jobs.source_codes_3.input_sha256] +deck = "ec3defe3131749e741e5843cabf3ba8af057d3b37d145e6d4cc45fe15ba1d1dc" +dut = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.evaluation.pre_layout.jobs.source_codes_3.measurements.dc_power] +value = 9.665266e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_codes_3.measurements.dnl_max] +value = 0.01143132 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_3.measurements.inl_max] +value = 0.2171134 +unit = "LSB" + +[task.evaluation.pre_layout.jobs.source_codes_3.measurements.min_step] +value = 0.006256336 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_3.measurements.span] +value = 1.595056 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_codes_3.output_sha256] +dc = "b6dcc2b5c247514d516095300fc92f891c3a2a8f222667bf9cb133e49b21b329" + +[task.evaluation.pre_layout.jobs.source_transition] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_transition.inputs] +deck = "input:transient" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_transition.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_transition.parameters.measurements] +rise_delay = "s" +fall_delay = "s" +high_level = "V" +low_level = "V" + +[task.evaluation.pre_layout.jobs.source_transition.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_transition.input_sha256] +deck = "be65c5e4c51cb2c4a61da501fc96b73f7467063f1a8cf54ab55ca08ba7436744" +dut = "1b3ee3925d5039310ed0b43b71db844f42f701245c81f6b90094a60e1b6d03e5" + +[task.evaluation.pre_layout.jobs.source_transition.measurements.fall_delay] +value = 3.36876e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_transition.measurements.high_level] +value = 2.406643 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_transition.measurements.low_level] +value = 0.8115874 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_transition.measurements.rise_delay] +value = 1.010096e-08 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_transition.output_sha256] +transient = "cdd0ed91d29f548c0ecc8ea69b29c9d613f3d8a091bbda1aee6f8fa7070c6113" + +[qualification] +reference = "reference/rdac3v_8bit.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 2400 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Mixed-signal" +summary = "Converts all 256 digital codes to buffered analog voltages within the characterized reference interval." diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/circuit.spice b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..6595fc333ad643dce0cd289f10c9e5459a29301b --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/circuit.spice @@ -0,0 +1,292 @@ +** sch_path: /source/xschem/sky130_ef_ip__rdac3v_8bit.sch +.subckt sky130_ef_ip__rdac3v_8bit dvdd avss dvss avdd b[7] b[6] b[5] b[4] b[3] b[2] b[1] b[0] Vhigh out ena Vlow +*.PININFO out:O avss:B avdd:B Vhigh:B Vlow:B ena:I b[7:0]:I dvdd:B dvss:B +x1 avdd avss b3a b4a b3b b4b b5a Vhigh b6a b0a net3 b6b b5b b0b b1a b1b b2a b2b net1 net6 net5 dac_half +x2 avdd avss b3a b4a b3b b4b b5a net6 b6a b0a net5 b6b b5b b0b b1a b1b b2a b2b net2 Vlow net4 dac_half +x3 avdd b7b out_unbuf net1 b7a avss passtrans +x7 avdd dvdd b7a b7b b[7] dvss level_shifter +x8 avdd dvdd b6a b6b b[6] dvss level_shifter +x9 avdd dvdd b5a b5b b[5] dvss level_shifter +x10 avdd dvdd b4a b4b b[4] dvss level_shifter +x11 avdd dvdd b3a b3b b[3] dvss level_shifter +x12 avdd dvdd b2a b2b b[2] dvss level_shifter +x13 avdd dvdd b1a b1b b[1] dvss level_shifter +x14 avdd dvdd b0a b0b b[0] dvss level_shifter +x15 avdd b7a out_unbuf net2 b7b avss passtrans +x18 avdd net4 Vlow net7 avss net8 dac_column_dummy +x5 avdd net8 net7 net9 avss net9 dac_column_dummy +x4 avdd net10 net11 Vhigh avss net3 dac_column_dummy +x16 avdd net12 net12 net11 avss net10 dac_column_dummy +x6 avdd out ena avss out_unbuf dvss follower_amp +.ends + +* expanding symbol: dac_half.sym # of pins=21 +** sym_path: /source/xschem/dac_half.sym +** sch_path: /source/xschem/dac_half.sch +.subckt dac_half vdd vss b3 b4 b3b b4b b5 res_in b6 b0 dum_in b6b b5b b0b b1 b1b b2 b2b out res_out dum_out +*.PININFO res_in:B res_out:B out:B vdd:B vss:B b3:I b3b:I b5:I b5b:I b6:I b6b:I dum_out:B dum_in:B b4:I b4b:I b0:I b0b:I b1:I +*+ b1b:I b2:I b2b:I +x1 b2 b2b b1 b1b b0 b0b vdd net9 net8 net44 net16 vss net15 dac_column +x2 b2 b2b b1 b1b b0 b0b vdd net10 net7 net43 net8 vss net9 dac_column +x3 b2 b2b b1 b1b b0 b0b vdd net11 net6 net42 net7 vss net10 dac_column +x4 b2 b2b b1 b1b b0 b0b vdd net12 net5 net41 net6 vss net11 dac_column +x5 b2 b2b b1 b1b b0 b0b vdd net13 net4 net40 net5 vss net12 dac_column +x6 b2 b2b b1 b1b b0 b0b vdd net14 net3 net39 net4 vss net13 dac_column +x7 b2 b2b b1 b1b b0 b0b vdd net2 net1 net38 net3 vss net14 dac_column +x8 b2 b2b b1 b1b b0 b0b vdd dum_in res_in net37 net1 vss net2 dac_column +x9 b2 b2b b1 b1b b0 b0b vdd net25 net24 net52 res_out vss dum_out dac_column +x10 b2 b2b b1 b1b b0 b0b vdd net26 net23 net51 net24 vss net25 dac_column +x11 b2 b2b b1 b1b b0 b0b vdd net27 net22 net50 net23 vss net26 dac_column +x12 b2 b2b b1 b1b b0 b0b vdd net28 net21 net49 net22 vss net27 dac_column +x13 b2 b2b b1 b1b b0 b0b vdd net29 net20 net48 net21 vss net28 dac_column +x14 b2 b2b b1 b1b b0 b0b vdd net30 net19 net47 net20 vss net29 dac_column +x15 b2 b2b b1 b1b b0 b0b vdd net18 net17 net46 net19 vss net30 dac_column +x16 b2 b2b b1 b1b b0 b0b vdd net15 net16 net45 net17 vss net18 dac_column +x17 vdd b4 net31 net54 b4b vss passtrans +x18 vdd b4b net31 net53 b4 vss passtrans +x19 vdd b4 net32 net55 b4b vss passtrans +x20 vdd b4b net32 net56 b4 vss passtrans +x21 vdd b4 net33 net57 b4b vss passtrans +x22 vdd b4b net33 net58 b4 vss passtrans +x23 vdd b4 net34 net59 b4b vss passtrans +x24 vdd b4b net34 net60 b4 vss passtrans +x25 vdd b5b net36 net34 b5 vss passtrans +x26 vdd b5 net36 net33 b5b vss passtrans +x27 vdd b5b net35 net32 b5 vss passtrans +x28 vdd b5 net35 net31 b5b vss passtrans +x29 vdd b6b out net36 b6 vss passtrans +x30 vdd b6 out net35 b6b vss passtrans +x33 vdd b3b net60 net37 b3 vss passtrans +x31 vdd b3 net60 net38 b3b vss passtrans +x32 vdd b3b net59 net39 b3 vss passtrans +x34 vdd b3 net59 net40 b3b vss passtrans +x35 vdd b3b net58 net41 b3 vss passtrans +x36 vdd b3 net58 net42 b3b vss passtrans +x37 vdd b3b net57 net43 b3 vss passtrans +x38 vdd b3 net57 net44 b3b vss passtrans +x39 vdd b3b net56 net45 b3 vss passtrans +x40 vdd b3 net56 net46 b3b vss passtrans +x41 vdd b3b net55 net47 b3 vss passtrans +x42 vdd b3 net55 net48 b3b vss passtrans +x43 vdd b3b net53 net49 b3 vss passtrans +x44 vdd b3 net53 net50 b3b vss passtrans +x45 vdd b3b net54 net51 b3 vss passtrans +x46 vdd b3 net54 net52 b3b vss passtrans +x47 vdd vdd net61 net61 vss vss passtrans +.ends + + +* expanding symbol: passtrans.sym # of pins=6 +** sym_path: /source/xschem/passtrans.sym +** sch_path: /source/xschem/passtrans.sch +.subckt passtrans vdd enab out in ena vss +*.PININFO enab:I ena:I vss:B vdd:B in:B out:B +XM1 in ena out vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.65 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 in enab out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +.ends + + +* expanding symbol: level_shifter.sym # of pins=6 +** sym_path: /source/xschem/level_shifter.sym +** sch_path: /source/xschem/level_shifter.sch +.subckt level_shifter vdd dvdd bit_out bitb_out bit_in dvss +*.PININFO bit_in:I bit_out:O bitb_out:O dvss:I dvdd:I vdd:I +x1 bit_in dvdd dvss dvss vdd vdd net1 sky130_fd_sc_hvl__lsbuflv2hv_1 +x2 net1 dvss dvss vdd vdd net2 sky130_fd_sc_hvl__inv_2 +x3 net2 dvss dvss vdd vdd net3 sky130_fd_sc_hvl__inv_4 +x4 net3 dvss dvss vdd vdd bitb_out sky130_fd_sc_hvl__inv_8 +x5 bitb_out dvss dvss vdd vdd bit_out sky130_fd_sc_hvl__inv_8 +XXD1 dvss bit_in sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +.ends + + +* expanding symbol: dac_column_dummy.sym # of pins=6 +** sym_path: /source/xschem/dac_column_dummy.sym +** sch_path: /source/xschem/dac_column_dummy.sch +.subckt dac_column_dummy vdd dum_in res_in res_out vss dum_out +*.PININFO res_in:B vss:B vdd:B dum_in:B res_out:B dum_out:B +x1 vdd vdd net17 net1 vss vss passtrans +XR1 res_out net1 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +x2 vdd vdd net16 net2 vss vss passtrans +x3 vdd vdd net15 net3 vss vss passtrans +x4 vdd vdd net14 net4 vss vss passtrans +x5 vdd vdd net13 net5 vss vss passtrans +x6 vdd vdd net12 net6 vss vss passtrans +x7 vdd vdd net10 net7 vss vss passtrans +x8 vdd vdd net11 res_in vss vss passtrans +x9 vdd vdd net8 dum_in vss vss passtrans +x10 vdd vdd net9 res_out vss vss passtrans +XR2 net1 net2 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR3 net2 net3 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR4 net3 net4 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR5 net4 net5 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR6 net5 net6 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR7 net6 net7 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR9 net7 res_in vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR10 res_in dum_in vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR12 dum_out res_out vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +x11 vdd vdd net12 net12 vss vss passtrans +x12 vdd vdd net13 net13 vss vss passtrans +x13 vdd vdd net14 net14 vss vss passtrans +x14 vdd vdd net15 net15 vss vss passtrans +x15 vdd vdd net11 net11 vss vss passtrans +x16 vdd vdd net16 net16 vss vss passtrans +x17 vdd vdd net8 net8 vss vss passtrans +x18 vdd vdd net9 net9 vss vss passtrans +x19 vdd vdd net10 net10 vss vss passtrans +x20 vdd vdd net17 net17 vss vss passtrans +.ends + + +* expanding symbol: follower_amp.sym # of pins=6 +** sym_path: /source/ip/sky130_ef_ip__samplehold/xschem/follower_amp.sym +** sch_path: /source/ip/sky130_ef_ip__samplehold/xschem/follower_amp.sch +.subckt follower_amp vdd out ena vss in vsub +*.PININFO in:I vdd:I vss:I out:O ena:I vsub:I +XM4 pdrv1 net1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 vdd net1 net1 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 vss nbias nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM20 out pdrv1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=280 nf=280 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM22 out ndrv vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=4 nf=4 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM24 pbias nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM25 vdd pbias pbias vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM26 vcomp pbias vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM27 net2 out vcomp vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM28 vcomp in ndrv vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM29 ndrv net2 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM30 vss net2 net2 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM1 net1 out vcomn1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 vcomn1 in pdrv1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM3 pdrv2 net3 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM6 vdd net3 net3 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM7 vcomn2 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 vdd pdrv2 out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=20 nf=20 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD1 vss in sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +XM13 net4 ena nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD2 vss ena sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +XM11 pdrv2 in vcomn2 vss sky130_fd_pr__nfet_05v0_nvt L=0.9 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net3 out vcomn2 vss sky130_fd_pr__nfet_05v0_nvt L=0.9 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 vcomn1 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 net4 vdd vss sky130_fd_pr__res_xhigh_po_0p35 L=140 mult=1 m=1 +.ends + + +* expanding symbol: dac_column.sym # of pins=13 +** sym_path: /source/xschem/dac_column.sym +** sch_path: /source/xschem/dac_column.sch +.subckt dac_column b2 b2b b1 b1b b0 b0b vdd dum_in res_in out res_out vss dum_out +*.PININFO res_in:B vss:B vdd:B out:B b0:I b0b:I b1:I b1b:I b2:I b2b:I dum_in:B res_out:B dum_out:B +x1 vdd b0 net8 net1 b0b vss passtrans +XR1 res_out net1 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +x2 vdd b0b net8 net2 b0 vss passtrans +x3 vdd b0 net9 net3 b0b vss passtrans +x4 vdd b0b net9 net4 b0 vss passtrans +x5 vdd b0 net10 net5 b0b vss passtrans +x6 vdd b0b net10 net6 b0 vss passtrans +x7 vdd b0 net11 net7 b0b vss passtrans +x8 vdd b0b net11 res_in b0 vss passtrans +x9 vdd vdd net15 dum_in vss vss passtrans +x10 vdd vdd net12 res_out vss vss passtrans +XR2 net1 net2 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR3 net2 net3 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR4 net3 net4 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR5 net4 net5 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR6 net5 net6 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR7 net6 net7 vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR9 net7 res_in vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR10 res_in dum_in vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +XR12 dum_out res_out vss sky130_fd_pr__res_high_po_0p35 L=3.16 mult=1 m=1 +x11 vdd b1b net14 net11 b1 vss passtrans +x12 vdd b1 net14 net10 b1b vss passtrans +x13 vdd b1b net13 net9 b1 vss passtrans +x14 vdd b1 net13 net8 b1b vss passtrans +x15 vdd b2b out net14 b2 vss passtrans +x16 vdd b2 out net13 b2b vss passtrans +x17 vdd vdd net15 net15 vss vss passtrans +x18 vdd vdd net12 net12 vss vss passtrans +.ends + + +.subckt sky130_fd_sc_hvl__lsbuflv2hv_1 A LVPWR VGND VNB VPB VPWR X +X0 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X2 X a_1711_885# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X3 X a_1711_885# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X4 VGND A a_404_1133# VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X5 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 VPWR a_1197_107# a_504_1221# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +X7 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X8 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X9 a_772_151# a_404_1133# VGND VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X10 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X11 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X12 LVPWR A a_404_1133# LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X13 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X14 VPWR a_504_1221# a_1711_885# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X15 VGND a_504_1221# a_1711_885# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X16 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X17 a_772_151# a_404_1133# LVPWR LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X18 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X19 VPWR a_504_1221# a_1197_107# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +.ends + +.subckt sky130_fd_sc_hvl__inv_2 A VGND VNB VPB VPWR Y +X0 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X3 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +.ends + +.subckt sky130_fd_sc_hvl__inv_8 A VGND VNB VPB VPWR Y +X0 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X3 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X4 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X8 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X9 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X11 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X12 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X13 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X14 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X15 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +.ends + +.subckt sky130_fd_sc_hvl__inv_4 A VGND VNB VPB VPWR Y +X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X3 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X4 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X5 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +.ends diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/schematic.svg b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..0e3dcd234e5e957f8689b3b938bed79ce38f9df5 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/schematic.svg @@ -0,0 +1 @@ +sky130_ef_ip__rdac3v_8bitvddvssb3b4b3bb4bb5res_inb6b0dum_inb6bb5bb0bb1b1bb2b2boutres_outdum_outvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssvddenaboutinenavssvdddum_inres_inres_outvssdum_outvdddum_inres_inres_outvssdum_outvddvssb3b4b3bb4bb5res_inb6b0dum_inb6bb5bb0bb1b1bb2b2boutres_outdum_outvddenaboutinenavssvdddum_inres_inres_outvssdum_outvdddum_inres_inres_outvssdum_outvddoutenavssinvsubvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssvdddvddbit_outbitb_outbit_indvssnet6net5avddavssavddVlowb3ab4ab3bb4bb5ab6ab0aVhighb6bb5bb0bb1ab1bb2ab2bnet6net5net2b3anet4avssavddnet1b7bout_unbufb7advdddvssb4aavddb[7]b7bb7advdddvssavddb[6]b6ab6bb3bdvdddvssavddb[5]b5ab5bdvdddvssavddb4bb[4]b4ab4bdvdddvssavddb[3]b3ab3bb5advdddvssavddb[2]b2ab2bdvdddvssavddb[1]b6ab1ab1bdvdddvssavddb[0]b0ab0bavssb0aavddnet2b7bout_unbufb7aavssavddVlownet4net3net7net8avssavddnet7net8net9net9avssavssavddb6bVhighnet3net10net11avssavddnet10net11net12b5bnet12avssdvssavddoutenaout_unbufdvddavssdvssb0bavddb[7]b[6]b[5]b[4]b[3]b[2]b[1]b[0]Vhighb1aoutenaVlowb1bb2ab2bnet1rdac3v_8bitx1dac_halfx2dac_halfx3passtransx7level_shifterx8level_shifterx9level_shifterx10level_shifterx11level_shifterx12level_shifterx13level_shifterx14level_shifterx15passtransx18dac_column_dummyx5dac_column_dummyx4dac_column_dummyx16dac_column_dummyx6follower_amp diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_dc.spice b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_dc.spice new file mode 100644 index 0000000000000000000000000000000000000000..f342c845106befb721cdb5df81070b0fe87ca249 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_dc.spice @@ -0,0 +1,51 @@ +* All-code DC linearity and full-scale transient response. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +.option klu rshunt=1e12 itl1=100 method=gear +Va avdd 0 3.3 +Vd dvdd 0 1.8 +Ven ena 0 1.8 +Vhi high 0 2.4 +Vlo low 0 0.8 +Vcode code 0 0 +Vmode mode 0 0 +Vpulse pulse 0 PULSE(0 1.8 10u 2n 2n 20u 40u) +B0 b0 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/1)-2*floor((v(code)+0.5)/2))) +B1 b1 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/2)-2*floor((v(code)+0.5)/4))) +B2 b2 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/4)-2*floor((v(code)+0.5)/8))) +B3 b3 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/8)-2*floor((v(code)+0.5)/16))) +B4 b4 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/16)-2*floor((v(code)+0.5)/32))) +B5 b5 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/32)-2*floor((v(code)+0.5)/64))) +B6 b6 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/64)-2*floor((v(code)+0.5)/128))) +B7 b7 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/128)-2*floor((v(code)+0.5)/256))) +Xdut dvdd 0 0 avdd b7 b6 b5 b4 b3 b2 b1 b0 high out ena low sky130_ef_ip__rdac3v_8bit +Cload out 0 1p + +.csparam first_code={code_start} +.csparam last_code={code_stop} +.csparam last_index={code_stop-code_start} +.csparam previous_index={code_stop-code_start-1} +.control +* Each block independently measures the same full-range endpoints. +save i(va) i(vd) i(ven) i(vhi) i(vlo) v(code) v(mode) v(out) v(pulse) +dc Vcode 0 255 255 +let low_reference=v(out)[0] +let full_span=v(out)[1]-v(out)[0] +let full_lsb=full_span/255 +dc Vcode $&first_code $&last_code 1 +let span=dc1.full_span +let ideal=dc1.low_reference+dc1.full_lsb*v(code) +let inl=abs((v(out)-ideal)/dc1.full_lsb) +let delta=v(out)[1,$&last_index]-v(out)[0,$&previous_index] +let dnl=abs(delta/dc1.full_lsb-1) +let inl_max=vecmax(inl) +let dnl_max=vecmax(dnl) +let min_step=vecmin(delta) +let dc_power=vecmax(-3.3*i(Va)-1.8*i(Vd)-1.8*i(Ven)-2.4*i(Vhi)-0.8*i(Vlo)) +print span inl_max dnl_max min_step dc_power +write dc.raw v(code) v(out) inl +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_transient.spice b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_transient.spice new file mode 100644 index 0000000000000000000000000000000000000000..acaef0afe3fe0d3a675b164fef49266ca860cd70 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/materials/testbench_transient.spice @@ -0,0 +1,35 @@ +* All-code DC linearity and full-scale transient response. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +.option klu rshunt=1e12 itl1=100 method=gear +Va avdd 0 3.3 +Vd dvdd 0 1.8 +Ven ena 0 1.8 +Vhi high 0 2.4 +Vlo low 0 0.8 +Vcode code 0 0 +Vmode mode 0 1 +Vpulse pulse 0 PULSE(0 1.8 10u 2n 2n 20u 40u) +B0 b0 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/1)-2*floor((v(code)+0.5)/2))) +B1 b1 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/2)-2*floor((v(code)+0.5)/4))) +B2 b2 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/4)-2*floor((v(code)+0.5)/8))) +B3 b3 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/8)-2*floor((v(code)+0.5)/16))) +B4 b4 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/16)-2*floor((v(code)+0.5)/32))) +B5 b5 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/32)-2*floor((v(code)+0.5)/64))) +B6 b6 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/64)-2*floor((v(code)+0.5)/128))) +B7 b7 0 V=(v(mode)>0.5 ? v(pulse) : 1.8*(floor((v(code)+0.5)/128)-2*floor((v(code)+0.5)/256))) +Xdut dvdd 0 0 avdd b7 b6 b5 b4 b3 b2 b1 b0 high out ena low sky130_ef_ip__rdac3v_8bit +Cload out 0 1p +.control +save v(code) v(mode) v(out) v(pulse) +tran 20n 60u +meas tran rise_delay TRIG v(pulse) VAL=0.9 RISE=1 TARG v(out) VAL=2.2 RISE=1 +meas tran fall_delay TRIG v(pulse) VAL=0.9 FALL=1 TARG v(out) VAL=1.0 FALL=1 +meas tran high_level FIND v(out) AT=29u +meas tran low_level FIND v(out) AT=49u +write transient.raw v(pulse) v(out) +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/problem.md b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..54b9436d15a52b084512b0bbef34152088b08f66 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/problem.md @@ -0,0 +1,51 @@ +# SKY130 Eight-Bit Buffered Resistor DAC Layout Task + +## Objective + +Implement `sky130_ef_ip__rdac3v_8bit` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `dvdd avss dvss avdd b[7] b[6] b[5] b[4] b[3] b[2] b[1] b[0] Vhigh out ena Vlow`. Declared inputs include `problem.md`, `materials/circuit.spice`, `materials/testbench_dc.spice`, `materials/testbench_transient.spice`. The runtime environment supplies models and process resources; reference layouts, author code and qualification evidence are maintainer-only. + +## Operating Conditions + +Analog/digital supplies are 3.3/1.8 V, enable 1.8 V, low/high references 0.8/2.4 V, and output load 1 pF. Four overlapping DC code blocks 0–64, 64–128, 128–192, 192–255 cover all integer codes and adjacent steps; each block also measures codes 0 and 255, using matching full-range endpoints to compute LSB=output span/255. Supply and reference power use the worst value over all codes. Transient switches all eight digital inputs simultaneously with 2 ns edges, timing the rising output crossing of 2.2 V and falling crossing of 1.0 V separately. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `sky130_ef_ip__rdac3v_8bit`. Functional geometry must fit within the 250 × 300 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +Every adjacent-code step must be at least 1 uV, ensuring numerically resolvable strict monotonicity; full-range span must be 1.5–1.7 V, and transient high/low endpoints 2.35–2.45 V and 0.75–0.85 V, respectively, implementing the declared buffer linear-output range. Absolute INL and DNL must be nonnegative; DNL is diagnostic without weight. INL, delay and power use the weights below for continuous quality, without 2 LSB, 1 LSB, 10 us or 20 mW accuracy/power rejection thresholds. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 35% | +| `inl_max` | 0 … +∞ LSB | max | 40% | +| `dnl_max` | 0 … +∞ LSB | max | 0% | +| `span` | 1.5 … 1.7 V | max | 0% | +| `min_step` | 1e-06 … +∞ V | min | 0% | +| `dc_power` | 0 … +∞ W | max | 5% | +| `rise_delay` | 0 … +∞ s | max | 10% | +| `fall_delay` | 0 … +∞ s | max | 10% | +| `high_level` | 2.35 … 2.45 V | max | 0% | +| `low_level` | 0.75 … 0.85 V | max | 0% | + +The 10000 um2 footprint rewards a compact resistor array and decoder/buffer interconnect. INL 40% and area 35% dominate; separate rising/falling full-scale delays each receive 10%, with 1 ns scales so parasitic delay is visible. The 0.15 LSB target is a precision goal, not a monotonicity cutoff. DC power carries 5% because fixed bias largely sets it. + +| Metric | Quality anchor | Unit | Normalization | Scale | +| --- | --- | --- | --- | --- | +| `inl_max` | 0.15 | LSB | saturating_ratio | 0.05 | +| `dc_power` | paired source | W | saturating_ratio | 1e-06 | +| `rise_delay` | 2e-08 | s | saturating_ratio | 1e-09 | +| `fall_delay` | 3e-08 | s | saturating_ratio | 1e-09 | + +Independent source/candidate measurements remain paired under identical conditions. For a cost measurement x, saturating quality is `2*(b+s)/(b+x+2*s)`; target quality is `1/(1+abs(x-b)/s)`. Here b is the quality anchor above, and s is the declared scale. Take the worst quality across each metric’s conditions. Targets and scales do not add acceptance cutoffs; zero-weight observations remain checked. + +Area quality is `10000 um² / candidate functional area`. Total score is `100 × product(q_i^w_i)`, including area. Joint attainment of the goals scores 100; a feasible reference may score far below 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; unusable measurements leave the score unknown. + +## Tools and Submission + +Solve budget: 12 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/reference/rdac3v_8bit.gds b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/reference/rdac3v_8bit.gds new file mode 100644 index 0000000000000000000000000000000000000000..2d14130d4dc865bcdadf78628fd059ae71690aa6 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__rdac3v_8bit/cases/rdac3v_8bit/reference/rdac3v_8bit.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:b7df0ee8876a782b945760da0c570d1eba72ccda9d3bf5c9a5e99c50e75514a7 +size 7310288 diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/LICENSE b/tasks/sky130A/sky130_ef_ip__samplehold/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..261eeb9e9f8b2b4b0d119366dda99c6fd7d35c64 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/LICENSE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/NOTICE b/tasks/sky130A/sky130_ef_ip__samplehold/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..c4ce66ec9d3c03331f53c77083af0048ea6e1b41 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/NOTICE @@ -0,0 +1,4 @@ +Efabless SKY130 sample and hold, Apache-2.0. +https://github.com/efabless/sky130_ef_ip__samplehold +Commit 5d5c1e9e172c4afc1a48adc3fe18fbe62642ca39. +Includes Apache-2.0 HVL cell definitions from the pinned PDK. diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/case.toml b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..741db35bb166deee0b6650e17f4ffa88235f9bb3 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/case.toml @@ -0,0 +1,608 @@ +kind = "layout_case" +id = "sky130A.sky130_ef_ip__samplehold.samplehold" +title = "SKY130 Buffered Sample and Hold" +status = "qualified" +in_core = true + +[[assets]] +path = "reference/samplehold.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "ecf8e4b7dfd4502f16b77b7994419310ce9eded44b4bc71f84cc2f96791accd4" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "2c2ade1c5379d83dbe491bd6e6b2c1fb7bc758e5174d9b55e46ee0b6d0e6450c" + +[origin] +url = "https://github.com/efabless/sky130_ef_ip__samplehold/tree/5d5c1e9e172c4afc1a48adc3fe18fbe62642ca39" + +[task] +kind = "netlist_to_gds" +hours = 10 +family = "sky130_samplehold" +coefficient = 4 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "bc4bc2b0dcd7e0acefa18695ea1b73f826b402292e41dfba577372acb777afd5" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "sky130_ef_ip__samplehold" +sha256 = "a21526db3ce690a5ba08ef84f7af7a3679523c79024654357708880e0801f8cb" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "3d030c29c01f89988f2fe55b573dc9cae33c52e133c1e9559ff8bd44b6728fd0" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "sky130_ef_ip__samplehold" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 160 +max_height_um = 160 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "dvdd", + "dvss", + "hold", + "vdd", + "out", + "in", + "ena", + "vss", +] + +[[task.evaluation.jobs]] +id = "rising" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +track_error = "V" +hold_error = "V" +droop = "V" +reacquire_error = "V" +supply_power = "W" + +[task.evaluation.jobs.parameters.values] +start_voltage = 0.8 +sample_voltage = 2.4 + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "falling" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +track_error = "V" +hold_error = "V" +droop = "V" +reacquire_error = "V" +supply_power = "W" + +[task.evaluation.jobs.parameters.values] +start_voltage = 2.4 +sample_voltage = 0.8 + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "track_error" +category = "performance" +observations = [ + "rising:track_error", + "falling:track_error", +] +unit = "V" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_rising:track_error", + "source_falling:track_error", +] +normalization = "saturating_ratio" +scale = 0.001 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Tracking error is an absolute voltage difference; a negative value cannot represent the declared measurement." + +[task.evaluation.metrics.quality_target] +value = 0.02 +rationale = "Aim for no more than 20 mV tracking error at 19 us for either acquisition direction." + +[[task.evaluation.metrics]] +id = "hold_error" +category = "performance" +observations = [ + "rising:hold_error", + "falling:hold_error", +] +unit = "V" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_rising:hold_error", + "source_falling:hold_error", +] +normalization = "saturating_ratio" +scale = 0.001 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Held-value error is an absolute voltage difference; a negative value cannot represent the declared measurement." + +[task.evaluation.metrics.quality_target] +value = 0.015 +rationale = "Aim for no more than 15 mV held-value error at 39 us after the input reverses during hold." + +[[task.evaluation.metrics]] +id = "droop" +category = "performance" +observations = [ + "rising:droop", + "falling:droop", +] +unit = "V" +direction = "minimize" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Droop is an absolute held-voltage change; a negative value cannot represent the declared measurement." + +[[task.evaluation.metrics]] +id = "reacquire_error" +category = "performance" +observations = [ + "rising:reacquire_error", + "falling:reacquire_error", +] +unit = "V" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_rising:reacquire_error", + "source_falling:reacquire_error", +] +normalization = "saturating_ratio" +scale = 0.001 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "Reacquisition error is an absolute voltage difference; a negative value cannot represent the declared measurement." + +[task.evaluation.metrics.quality_target] +value = 0.02 +rationale = "Aim for no more than 20 mV error at 59 us after reacquisition in either direction." + +[[task.evaluation.metrics]] +id = "supply_power" +category = "performance" +observations = [ + "rising:supply_power", + "falling:supply_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_rising:supply_power", + "source_falling:supply_power", +] +normalization = "saturating_ratio" +scale = 0.0001 +dimension = "supply" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The enabled sample-and-hold circuit consumes energy from its analog and digital supplies; negative delivered power would not represent this powered interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 3000.0 +rationale = "The 3000 um2 footprint is a compact buffered-sampler goal. Area receives 50%; held-value error after input reversal receives 25%, tracking 15%, and reacquisition and power 5% each. Tracking and reacquisition approach the same equilibrium, so their repeated observation no longer doubles the main accuracy reward. Error targets refer to the declared sampling times and do not claim faster acquisition or additional corners." + +[task.evaluation.scoring.weights] +track_error = 0.15 +hold_error = 0.25 +reacquire_error = 0.05 +supply_power = 0.05 +functional_area = 0.5 + +[task.evaluation.pre_layout] +source_report_sha256 = "668588ebd1f73ddd8f265fc80f917369cf7f25e5ea8a61c873ea412fef35f847" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_rising] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_rising.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_rising.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_rising.parameters.measurements] +track_error = "V" +hold_error = "V" +droop = "V" +reacquire_error = "V" +supply_power = "W" + +[task.evaluation.pre_layout.jobs.source_rising.parameters.values] +start_voltage = 0.8 +sample_voltage = 2.4 + +[task.evaluation.pre_layout.jobs.source_rising.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_rising.input_sha256] +deck = "3d030c29c01f89988f2fe55b573dc9cae33c52e133c1e9559ff8bd44b6728fd0" +dut = "a21526db3ce690a5ba08ef84f7af7a3679523c79024654357708880e0801f8cb" + +[task.evaluation.pre_layout.jobs.source_rising.measurements.droop] +value = 8.9e-05 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_rising.measurements.hold_error] +value = 0.018503 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_rising.measurements.reacquire_error] +value = 0.0122614 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_rising.measurements.supply_power] +value = 0.0003477607 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_rising.measurements.track_error] +value = 0.019117 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_rising.output_sha256] +transient = "acfabcd69b6e7456ba2ca38a1a3607702703721130b5123ca38f237e883e6efa" + +[task.evaluation.pre_layout.jobs.source_falling] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_falling.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_falling.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_falling.parameters.measurements] +track_error = "V" +hold_error = "V" +droop = "V" +reacquire_error = "V" +supply_power = "W" + +[task.evaluation.pre_layout.jobs.source_falling.parameters.values] +start_voltage = 2.4 +sample_voltage = 0.8 + +[task.evaluation.pre_layout.jobs.source_falling.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_falling.input_sha256] +deck = "3d030c29c01f89988f2fe55b573dc9cae33c52e133c1e9559ff8bd44b6728fd0" +dut = "a21526db3ce690a5ba08ef84f7af7a3679523c79024654357708880e0801f8cb" + +[task.evaluation.pre_layout.jobs.source_falling.measurements.droop] +value = 6.5e-06 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_falling.measurements.hold_error] +value = 0.0119921 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_falling.measurements.reacquire_error] +value = 0.019117 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_falling.measurements.supply_power] +value = 0.0003441492 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_falling.measurements.track_error] +value = 0.0122614 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_falling.output_sha256] +transient = "64760a96d32457aca5b6800ced93cd0cad361df13b3749e4e3b6902bd17a6759" + +[qualification] +reference = "reference/samplehold.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 240 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Mixed-signal" +summary = "Tracks, holds and reacquires an analog input using a buffered sample-and-hold circuit." diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/circuit.spice b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..80152a7c73e64c3ed676c78393d4548b39fdca69 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/circuit.spice @@ -0,0 +1,120 @@ +** sch_path: /source/xschem/sky130_ef_ip__samplehold.sch +.subckt sky130_ef_ip__samplehold dvdd dvss hold vdd out in ena vss +*.PININFO vdd:I hold:I in:I vss:I out:O dvdd:I dvss:I ena:I +XC1 holdval vss sky130_fd_pr__cap_mim_m3_1 W=5 L=5 MF=48 m=48 +XC2 vss holdval sky130_fd_pr__cap_mim_m3_2 W=5 L=5 MF=48 m=48 +x1 hold3v vss holdval net1 vdd balanced_switch +x2 vdd out ena3v vss holdval dvss follower_amp +x3 vdd net1 ena3v vss in dvss follower_amp +x4 hold dvdd dvss dvss vdd vdd hold3v sky130_fd_sc_hvl__lsbuflv2hv_1 +XXD1 dvss hold sky130_fd_pr__diode_pw2nd_05v5 area=0.36 perim=2.4 +x5 ena dvdd dvss dvss vdd vdd ena3v sky130_fd_sc_hvl__lsbuflv2hv_1 +XXD2 dvss ena sky130_fd_pr__diode_pw2nd_05v5 area=0.36 perim=2.4 +.ends + +* expanding symbol: balanced_switch.sym # of pins=5 +** sym_path: /source/xschem/balanced_switch.sym +** sch_path: /source/xschem/balanced_switch.sch +.subckt balanced_switch hold vss out in vdd +*.PININFO in:I out:O vss:I vdd:I hold:I +XM1 in holdb out vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=4 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 in holdp out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=10 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM3 out holdp out vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM4 out holdb out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 in holdp in vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM6 in holdb in vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ++ ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM7 holdb hold vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 holdb hold vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 holdp holdb vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 holdp holdb vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD1 vss hold sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +.ends + + +* expanding symbol: follower_amp.sym # of pins=6 +** sym_path: /source/xschem/follower_amp.sym +** sch_path: /source/xschem/follower_amp.sch +.subckt follower_amp vdd out ena vss in vsub +*.PININFO in:I vdd:I vss:I out:O ena:I vsub:I +XM4 pdrv1 net1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 vdd net1 net1 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 vss nbias nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM20 out pdrv1 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=280 nf=280 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM22 out ndrv vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=4 nf=4 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM24 pbias nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM25 vdd pbias pbias vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM26 vcomp pbias vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM27 net2 out vcomp vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM28 vcomp in ndrv vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM29 ndrv net2 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM30 vss net2 net2 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM1 net1 out vcomn1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 vcomn1 in pdrv1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM3 pdrv2 net3 vdd vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM6 vdd net3 net3 vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM7 vcomn2 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 vdd pdrv2 out vdd sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=20 nf=20 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD1 vss in sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +XM13 net4 ena nbias vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XXD2 vss ena sky130_fd_pr__diode_pw2nd_05v5 area=0.2025 perim=1.8 +XM11 pdrv2 in vcomn2 vss sky130_fd_pr__nfet_05v0_nvt L=0.9 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net3 out vcomn2 vss sky130_fd_pr__nfet_05v0_nvt L=0.9 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 vcomn1 nbias vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 net4 vdd vss sky130_fd_pr__res_xhigh_po_0p35 L=140 mult=1 m=1 +.ends + + +.subckt sky130_fd_sc_hvl__lsbuflv2hv_1 A LVPWR VGND VNB VPB VPWR X +X0 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X2 X a_1711_885# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X3 X a_1711_885# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X4 VGND A a_404_1133# VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X5 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 VPWR a_1197_107# a_504_1221# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +X7 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X8 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X9 a_772_151# a_404_1133# VGND VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u +X10 a_504_1221# a_404_1133# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X11 VGND a_404_1133# a_504_1221# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X12 LVPWR A a_404_1133# LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X13 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X14 VPWR a_504_1221# a_1711_885# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X15 VGND a_504_1221# a_1711_885# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X16 VGND a_772_151# a_1197_107# VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X17 a_772_151# a_404_1133# LVPWR LVPWR sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u +X18 a_1197_107# a_772_151# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=1.5e+06u l=500000u +X19 VPWR a_504_1221# a_1197_107# VPB sky130_fd_pr__pfet_g5v0d10v5 w=420000u l=1e+06u +.ends diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/schematic.svg b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..dde1e5bf7deb8bbd73bdc83e27497e7f8d575cf5 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/schematic.svg @@ -0,0 +1 @@ +sky130_ef_ip__sampleholdholdvssoutinvddvddoutenavssinvsubvddoutenavssinvsubALVPWRVGNDVNBVPBVPWRXALVPWRVGNDVNBVPBVPWRXinvssnet1ena3vdvddholdvaldvssdvssholdvddvddhold3vdvssholddvdddvssdvssvddvddenaena3vdvssenavssdvdddvssholdvddoutinenavssholdvalvddvssholdvalhold3vnet1dvssvddoutvssvssholdvalena3vdvssvddsampleholdXC1cap_mim_m3_1W=5 L=5m=48XC2cap_mim_m3_2W=5 L=5m=48x1balanced_switchx2follower_ampx3follower_ampx4lsbuflv2hv_1XXD1diode_pw2nd_05v5area=0.36 perim=2.4x5lsbuflv2hv_1XXD2diode_pw2nd_05v5area=0.36 perim=2.4 diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/testbench.spice b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..e917e3af71c0aae5cfe3f793601d483993bf39cc --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/materials/testbench.spice @@ -0,0 +1,33 @@ +* Track, hold under input reversal, and reacquire at TT 27 C. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +.option klu rshunt=1e12 method=gear +Va avdd 0 3.3 +Vd dvdd 0 1.8 +Ven ena 0 PWL(0 0 2u 0 2.01u 1.8) +Vhold hold 0 PULSE(0 1.8 20u 2n 2n 20u 80u) +Vin inp 0 PWL(0 {start_voltage} 10u {start_voltage} 10.02u {sample_voltage} 25u {sample_voltage} 25.02u {start_voltage}) +Xdut dvdd 0 hold avdd out inp ena 0 sky130_ef_ip__samplehold +Cload out 0 1p +.save v(inp) v(hold) v(out) i(Va) i(Vd) i(Ven) +.control +tran 20n 60u +let power=-3.3*i(Va)-1.8*i(Vd)-1.8*i(Ven) +meas tran supply_power AVG power FROM=10u TO=60u +meas tran track_value FIND v(out) AT=19u +meas tran sampled_input FIND v(inp) AT=19u +meas tran hold_start FIND v(out) AT=21u +meas tran hold_end FIND v(out) AT=39u +meas tran final_value FIND v(out) AT=59u +meas tran final_input FIND v(inp) AT=59u +let track_error=abs(track_value-sampled_input) +let hold_error=abs(hold_end-sampled_input) +let droop=abs(hold_end-hold_start) +let reacquire_error=abs(final_value-final_input) +print track_error hold_error droop reacquire_error +write transient.raw v(inp) v(hold) v(out) +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/problem.md b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..881177d1871b8581168ea535cbd942018a8b5dfc --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/problem.md @@ -0,0 +1,68 @@ +# SKY130 Buffered Sample-and-Hold Layout Task + +## Objective + +Implement the supplied transistor-level buffered sample-and-hold in SKY130A, preserving topology, device parameters, body connections and ordered ports; perform acquisition in both directions, hold during input reversal, and reacquisition. + +## Inputs and Interface + +Inputs are this description, `materials/circuit.spice` (authoritative circuit) and `materials/testbench.spice` (excitation and measurements). Both the top-level GDS cell and LVS subcircuit are `sky130_ef_ip__samplehold`, with ordered ports: + +```text +dvdd dvss hold vdd out in ena vss +``` + +Reference layout and maintainer schematic are not solver inputs. The supplied testbench defines measurement details. + +## Operating Conditions + +Use pinned TT models at 27 C, analog supply 3.3 V, digital supply and control 1.8 V, and external output load 1 pF. Test 0.8→2.4 V and 2.4→0.8 V acquisition separately. + +| Event or observation | Time | +| --- | --- | +| Enable rise | 2 us | +| Input step | 10 us | +| Tracking-error sample | 19 us | +| HOLD high | 20–40 us | +| Input reversal during hold | 25 us | +| Held-value-error sample | 39 us | +| Hold-drift observation | 21–39 us | +| Reacquisition-error sample | 59 us | + +Coverage is limited to the operating range above; no PVT, mismatch, reliability or product signoff is claimed. + +## Physical Requirements + +Submit nonempty, readable GDS of at most 10485760 bytes, preserving the declared top cell and port labels. Functional geometry must fit within 160 × 160 um; see the runtime task contract for the complete layer set. + +Independent evaluation sequentially runs file checks, full Magic DRC, Netgen LVS, functional geometry measurement, distributed RC extraction and declared electrical tests. Physical and functional requirements must pass; source simulation cannot replace evaluation after candidate extraction. + +## Electrical Requirements and Scoring + +Every condition must produce finite, usable measurements. Absolute errors and voltage changes must be nonnegative, and circuit supply energy must represent consumption rather than generation. Missing or unusable measurements are evaluation errors. + +| Metric | Measurement domain | Observation aggregation | Weight | +| --- | --- | --- | --- | +| `functional_area` (um2) | Functional area measured on declared layers | max | 50% | +| `track_error` (V) | Nonnegative absolute tracking error | max | 15% | +| `hold_error` (V) | Nonnegative absolute hold error | max | 25% | +| `droop` (V) | Nonnegative absolute voltage change | max | 0% | +| `reacquire_error` (V) | Nonnegative absolute reacquisition error | max | 5% | +| `supply_power` (W) | Nonnegative supply consumption | max | 5% | + +The 3000 um2 footprint is a compact buffered-sampler goal. Area receives 50%; held-value error after input reversal receives 25%, tracking 15%, and reacquisition and power 5% each. Tracking and reacquisition approach the same equilibrium, so their repeated observation no longer doubles the main accuracy reward. Error targets refer to the declared sampling times and do not claim faster acquisition or additional corners. + +| Metric | Quality anchor | Unit | Normalization | Scale | +| --- | --- | --- | --- | --- | +| `track_error` | 0.02 | V | saturating_ratio | 0.001 | +| `hold_error` | 0.015 | V | saturating_ratio | 0.001 | +| `reacquire_error` | 0.02 | V | saturating_ratio | 0.001 | +| `supply_power` | paired source | W | saturating_ratio | 0.0001 | + +Independent source/candidate measurements remain paired under identical conditions. For a cost measurement x, saturating quality is `2*(b+s)/(b+x+2*s)`; target quality is `1/(1+abs(x-b)/s)`. Here b is the quality anchor above, and s is the declared scale. Take the worst quality across each metric’s conditions. Targets and scales do not add acceptance cutoffs; zero-weight observations remain checked. + +Area quality is `3000 um² / candidate functional area`. Total score is `100 × product(q_i^w_i)`, including area. Joint attainment of the goals scores 100; a feasible reference may score far below 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; unusable measurements leave the score unknown. + +## Tools and Submission + +Solve budget: **10 hours**. Use the installed toolchain and SKY130 resources explicitly supplied by the task. Write top cell `sky130_ef_ip__samplehold` into `output/final.gds` and explicitly submit through the session submission interface. diff --git a/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/reference/samplehold.gds b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/reference/samplehold.gds new file mode 100644 index 0000000000000000000000000000000000000000..020eedc5e84da64ae92d5acc2270704629e66109 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__samplehold/cases/samplehold/reference/samplehold.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:ecf8e4b7dfd4502f16b77b7994419310ce9eded44b4bc71f84cc2f96791accd4 +size 2365084 diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/LICENSE b/tasks/sky130A/sky130_ef_ip__simple_por/LICENSE new file mode 100644 index 0000000000000000000000000000000000000000..d645695673349e3947e8e5ae42332d0ac3164cd7 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/LICENSE @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. Definitions. + + "License" shall mean the terms and conditions for use, reproduction, + and distribution as defined by Sections 1 through 9 of this document. + + "Licensor" shall mean the copyright owner or entity authorized by + the copyright owner that is granting the License. + + "Legal Entity" shall mean the union of the acting entity and all + other entities that control, are controlled by, or are under common + control with that entity. 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We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [yyyy] [name of copyright owner] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/NOTICE b/tasks/sky130A/sky130_ef_ip__simple_por/NOTICE new file mode 100644 index 0000000000000000000000000000000000000000..fe8b9b1061d44f0490af335b62066087158231ca --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/NOTICE @@ -0,0 +1,4 @@ +SKY130 simple power-on reset: Efabless, Apache-2.0. +Upstream: https://github.com/efabless/sky130_ef_ip__simple_por +Commit: d8a9581533238bdb99cb0389fd4387587969dc12 +Included SKY130 HVL cells: SkyWater PDK, Apache-2.0, Ciel pin in ../pdk.toml. diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/case.toml b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/case.toml new file mode 100644 index 0000000000000000000000000000000000000000..ff3442c92b141c7824d75a62a723ebb505f3449c --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/case.toml @@ -0,0 +1,704 @@ +kind = "layout_case" +id = "sky130A.sky130_ef_ip__simple_por.simple_por" +title = "SKY130 Dual-Supply Power-On Reset" +status = "qualified" +in_core = true + +[origin] +url = "https://github.com/efabless/sky130_ef_ip__simple_por/tree/d8a9581533238bdb99cb0389fd4387587969dc12" + +[[assets]] +path = "reference/simple_por.gds" +role = "reference" +visibility = "maintainer" +format = "gds" +sha256 = "35433f6de882b75252512575d1f917b52a1f462ebf1091c3aa3a4a46ad8af037" + +[[assets]] +path = "materials/schematic.svg" +role = "schematic" +visibility = "maintainer" +format = "svg" +sha256 = "abd7761300329fe23cb7f0aadc30ddc594d64158262cccbf8110e9d48456d429" + +[task] +kind = "netlist_to_gds" +hours = 6 +family = "sky130_power_on_reset" +coefficient = 2 +environment = "sky130A-tt-rc" + +[task.inputs.description] +path = "problem.md" +format = "text" +sha256 = "1dc0b2440c9e6f0a948622b1736f12eaad17ed03ce32e616fb3ecbea8283d628" + +[task.inputs.netlist] +path = "materials/circuit.spice" +format = "spice" +subcircuit = "sky130_ef_ip__simple_por" +sha256 = "f90ab6095d6c49a8009519251c598c9ed91da9a69c08b0b55f6ed0bf14780bda" + +[task.inputs.performance] +path = "materials/testbench.spice" +format = "spice" +sha256 = "35e3bfce2d4c4690b3531d13f4b91a206d8ebd51ac58dc68981ab75e566e338b" + +[task.output] +path = "output/final.gds" +format = "gds" +top_cell = "sky130_ef_ip__simple_por" +max_bytes = 10485760 + +[task.constraints] +quality = [ + { id = "area", type = "functional_bbox_area", layers_from = "outline" }, +] + +[[task.constraints.hard]] +id = "outline" +type = "bbox_max" +functional_layers = [ + [ + 64, + 20, + ], + [ + 65, + 20, + ], + [ + 65, + 44, + ], + [ + 66, + 20, + ], + [ + 66, + 44, + ], + [ + 67, + 20, + ], + [ + 67, + 44, + ], + [ + 68, + 20, + ], + [ + 68, + 44, + ], + [ + 69, + 20, + ], + [ + 69, + 44, + ], + [ + 70, + 20, + ], + [ + 70, + 44, + ], + [ + 71, + 20, + ], + [ + 71, + 44, + ], + [ + 72, + 20, + ], + [ + 93, + 44, + ], + [ + 94, + 20, + ], +] +max_width_um = 200 +max_height_um = 200 + +[task.evaluation] +mode = "post_layout" + +[[task.evaluation.jobs]] +id = "artifact" +stage = "check" +operation = "layout.artifact" +gate = "artifact" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "drc" +stage = "check" +operation = "layout.drc" +gate = "drc" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[[task.evaluation.jobs]] +id = "lvs" +stage = "check" +operation = "layout.lvs" +gate = "lvs" + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +netlist = "input:netlist" + +[[task.evaluation.jobs]] +id = "geometry" +stage = "check" +operation = "layout.geometry" +gate = "constraint" +requires = [ + "artifact", + "drc", + "lvs", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" +constraints = "input:constraints" + +[[task.evaluation.jobs]] +id = "parasitics" +stage = "extract" +operation = "layout.extract_rc" +requires = [ + "artifact", + "drc", + "lvs", + "geometry", +] + +[task.evaluation.jobs.inputs] +layout = "candidate" +task = "task" + +[task.evaluation.jobs.outputs] +netlist = "spice" + +[task.evaluation.jobs.parameters] +ports = [ + "vdd3v3", + "vdd1v8", + "porb_h", + "porb_l", + "por_l", + "vss", +] + +[[task.evaluation.jobs]] +id = "fast" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.jobs.parameters.values] +ramp_time = 0.001 + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "nominal" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.jobs.parameters.values] +ramp_time = 0.005 + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.jobs]] +id = "slow" +stage = "simulate" +operation = "circuit.simulate" + +[task.evaluation.jobs.inputs] +deck = "input:performance" +dut = "job:parasitics:netlist" + +[task.evaluation.jobs.outputs] +transient = "ngspice-raw" + +[task.evaluation.jobs.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.jobs.parameters.values] +ramp_time = 0.01 + +[task.evaluation.jobs.parameters.exports] +transient = "transient.raw" + +[[task.evaluation.metrics]] +id = "functional_area" +category = "physical" +observations = [ + "geometry:area", +] +unit = "um2" +direction = "minimize" +aggregation = "max" + +[[task.evaluation.metrics]] +id = "release_time" +category = "performance" +observations = [ + "fast:release_time", + "nominal:release_time", + "slow:release_time", +] +unit = "s" +direction = "target" +aggregation = "max" +baseline = [ + "source_fast:release_time", + "source_nominal:release_time", + "source_slow:release_time", +] +normalization = "target" +scale = 0.0001 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 0.03 +rationale = "The required reset-release crossing must exist during the complete 0 to 30 ms startup observation; timing relative to the source fixture remains a quality objective." + +[[task.evaluation.metrics]] +id = "low_domain_release" +category = "performance" +observations = [ + "fast:low_domain_release", + "nominal:low_domain_release", + "slow:low_domain_release", +] +unit = "s" +direction = "target" +aggregation = "max" +baseline = [ + "source_fast:low_domain_release", + "source_nominal:low_domain_release", + "source_slow:low_domain_release", +] +normalization = "target" +scale = 0.0001 +dimension = "response" + +[task.evaluation.metrics.requirement] +lower = 0 +upper = 0.03 +rationale = "The required reset-release crossing must exist during the complete 0 to 30 ms startup observation; timing relative to the source fixture remains a quality objective." + +[[task.evaluation.metrics]] +id = "startup_power" +category = "performance" +observations = [ + "fast:startup_power", + "nominal:startup_power", + "slow:startup_power", +] +unit = "W" +direction = "minimize" +aggregation = "max" +baseline = [ + "source_fast:startup_power", + "source_nominal:startup_power", + "source_slow:startup_power", +] +normalization = "saturating_ratio" +scale = 1e-06 +dimension = "supply" + +[task.evaluation.metrics.requirement] +lower = 0 +rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective." + +[[task.evaluation.metrics]] +id = "high_final" +category = "performance" +observations = [ + "fast:high_final", + "nominal:high_final", + "slow:high_final", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 3.0 +upper = 3.4 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[[task.evaluation.metrics]] +id = "low_final" +category = "performance" +observations = [ + "fast:low_final", + "nominal:low_final", + "slow:low_final", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = 1.6 +upper = 1.9 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[[task.evaluation.metrics]] +id = "reset_final" +category = "performance" +observations = [ + "fast:reset_final", + "nominal:reset_final", + "slow:reset_final", +] +unit = "V" +direction = "target" +aggregation = "max" + +[task.evaluation.metrics.requirement] +lower = -0.1 +upper = 0.2 +rationale = "The declared output or bias must stay in its specified operating or logic-level interval under the supplied rail, feedback or full-scale reference conditions; an out-of-range output violates that interface." + +[task.evaluation.scoring] +method = "layout" +area_metric = "functional_area" +area_target = 1500.0 +rationale = "The 1500 um2 area goal rewards compact placement of the startup network. Release timing remains centered on each ramp-specific source crossing: earlier release is not automatically better. A 100 us deviation scale makes parasitic shifts visible without imposing a timing tolerance. Area receives 45%, the two domain-release metrics 20% each, and startup energy rate 15%; both output domains remain functionally checked." + +[task.evaluation.scoring.weights] +release_time = 0.2 +low_domain_release = 0.2 +startup_power = 0.15 +functional_area = 0.45 + +[task.evaluation.pre_layout] +source_report_sha256 = "ac765824cae4287ee2d91e0f4eb3b459933747b52ab3db3bdd2fb05a0d15616b" + +[task.evaluation.pre_layout.backends] +"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": \"hsa\", \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"cba8c3811d06b88752a21414d16575ef72011a8b2f05214e29076a9ae90ffb9c\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 240.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}" + +[task.evaluation.pre_layout.jobs.source_fast] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_fast.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_fast.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_fast.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.pre_layout.jobs.source_fast.parameters.values] +ramp_time = 0.001 + +[task.evaluation.pre_layout.jobs.source_fast.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_fast.input_sha256] +deck = "35e3bfce2d4c4690b3531d13f4b91a206d8ebd51ac58dc68981ab75e566e338b" +dut = "f90ab6095d6c49a8009519251c598c9ed91da9a69c08b0b55f6ed0bf14780bda" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.high_final] +value = 3.3 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.low_domain_release] +value = 0.01156506 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.low_final] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.release_time] +value = 0.01156505 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.reset_final] +value = 5.002317e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_fast.measurements.startup_power] +value = 2.672761e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_fast.output_sha256] +transient = "08cd1d93a72e9af6bd549e034f319c274eb64814cb48ecafcd99ec4d54cde383" + +[task.evaluation.pre_layout.jobs.source_nominal] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_nominal.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_nominal.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.values] +ramp_time = 0.005 + +[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_nominal.input_sha256] +deck = "35e3bfce2d4c4690b3531d13f4b91a206d8ebd51ac58dc68981ab75e566e338b" +dut = "f90ab6095d6c49a8009519251c598c9ed91da9a69c08b0b55f6ed0bf14780bda" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.high_final] +value = 3.3 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.low_domain_release] +value = 0.0152751 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.low_final] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.release_time] +value = 0.0152751 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.reset_final] +value = 5.002317e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_nominal.measurements.startup_power] +value = 2.61099e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_nominal.output_sha256] +transient = "fdbbafd18a2f9fd3ddccca5647fd394f28e82a6dbd9042afb2569a1aa272be1c" + +[task.evaluation.pre_layout.jobs.source_slow] +operation = "circuit.simulate" + +[task.evaluation.pre_layout.jobs.source_slow.inputs] +deck = "input:performance" +dut = "input:netlist" + +[task.evaluation.pre_layout.jobs.source_slow.outputs] +transient = "ngspice-raw" + +[task.evaluation.pre_layout.jobs.source_slow.parameters.measurements] +release_time = "s" +low_domain_release = "s" +high_final = "V" +low_final = "V" +reset_final = "V" +startup_power = "W" + +[task.evaluation.pre_layout.jobs.source_slow.parameters.values] +ramp_time = 0.01 + +[task.evaluation.pre_layout.jobs.source_slow.parameters.exports] +transient = "transient.raw" + +[task.evaluation.pre_layout.jobs.source_slow.input_sha256] +deck = "35e3bfce2d4c4690b3531d13f4b91a206d8ebd51ac58dc68981ab75e566e338b" +dut = "f90ab6095d6c49a8009519251c598c9ed91da9a69c08b0b55f6ed0bf14780bda" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.high_final] +value = 3.3 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.low_domain_release] +value = 0.01991391 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.low_final] +value = 1.8 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.release_time] +value = 0.01991391 +unit = "s" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.reset_final] +value = 5.002317e-09 +unit = "V" + +[task.evaluation.pre_layout.jobs.source_slow.measurements.startup_power] +value = 2.533789e-05 +unit = "W" + +[task.evaluation.pre_layout.jobs.source_slow.output_sha256] +transient = "0954341c76c9e29e06c2c62025b5a0ca3744544275a05ff88a1deca21e7e21b6" + +[qualification] +reference = "reference/simple_por.gds" + +[toolchain.bindings] +"layout.artifact" = "artifact" +"layout.drc" = "drc" +"layout.lvs" = "lvs" +"layout.geometry" = "geometry" +"layout.extract_rc" = "rc" +"circuit.simulate" = "simulation" + +[toolchain.backends.artifact] +type = "klayout-docker" + +[toolchain.backends.artifact.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "artifact" + +[toolchain.backends.drc] +type = "magic-physical-docker" + +[toolchain.backends.drc.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "drc" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "drc(full)" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.drc.support_profiles] +support = "physical" + +[toolchain.backends.lvs] +type = "magic-physical-docker" + +[toolchain.backends.lvs.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 +check = "lvs" +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +setup = "sky130A_setup.tcl" +grid_subdivision = 2 +support = "external-cache/physical" + +[toolchain.backends.lvs.support_profiles] +support = "physical" + +[toolchain.backends.geometry] +type = "klayout-geometry-docker" + +[toolchain.backends.geometry.settings] +image = "iclayout-eda-open:local" +timeout_seconds = 240 + +[toolchain.backends.rc] +type = "magic-rc-docker" + +[toolchain.backends.rc.settings] +gds_readonly = false +image = "iclayout-eda-open:local" +timeout_seconds = 240 +technology = "sky130A.tech" +tech_name = "sky130A" +style = "ngspice()" +grid_subdivision = 2 +support = "external-cache/magic" + +[toolchain.backends.rc.support_profiles] +support = "magic" + +[toolchain.backends.simulation] +type = "ngspice-docker" + +[toolchain.backends.simulation.settings] +max_parallel_jobs = 8 +threads = 1 +cpu_budget = 8 +image = "iclayout-eda-open:local" +timeout_seconds = 240 +compatibility = "hsa" +support = "external-cache/models" + +[toolchain.backends.simulation.support_profiles] +support = "models" + +[presentation] +category = "Power & references" +summary = "Generates reset outputs during staggered dual-supply startup and releases them after the supply ramps." diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/circuit.spice b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/circuit.spice new file mode 100644 index 0000000000000000000000000000000000000000..96b0bc907c7c0a3ff2b90a3547dff1c002404870 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/circuit.spice @@ -0,0 +1,92 @@ +** sch_path: /source/xschem/sky130_ef_ip__simple_por.sch +.subckt sky130_ef_ip__simple_por vdd3v3 vdd1v8 porb_h porb_l por_l vss +*.PININFO vdd3v3:B vss:B porb_h:O porb_l:O por_l:O vdd1v8:B vss:B +XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1 +XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1 +XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1 +XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1 +XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2 +x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 +x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 +x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 +x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1 +.ends + +.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VNB VPB VPWR X +X0 a_117_181# A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u +X1 a_117_181# A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u +X2 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u +X3 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u +X4 a_231_463# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u +X5 a_64_207# a_117_181# a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u +X6 VGND a_117_181# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X7 VPWR a_117_181# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X8 a_217_207# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=420000u l=500000u +X9 a_78_463# a_117_181# a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 w=750000u l=500000u +.ends + +.subckt sky130_fd_sc_hvl__inv_8 A VGND VNB VPB VPWR Y +X0 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X3 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X4 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X6 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X8 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X9 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X11 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X12 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X13 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X14 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X15 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +.ends + +.subckt sky130_fd_sc_hvl__buf_8 A VGND VNB VPB VPWR X +X0 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X1 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X2 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X3 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X4 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X5 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X6 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X7 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X8 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X9 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X10 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X11 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X12 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X13 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X14 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X15 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X16 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X17 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X18 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X19 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 w=750000u l=500000u +X20 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +X21 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+06u l=500000u +.ends diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/schematic.svg b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/schematic.svg new file mode 100644 index 0000000000000000000000000000000000000000..9571d64c4251e2f4a2846ce82e0923453f664543 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/schematic.svg @@ -0,0 +1 @@ +sky130_ef_ip__simple_porAVGNDVNBVPBVPWRXAVGNDVNBVPBVPWRXAVGNDVNBVPBVPWRYAVGNDVNBVPBVPWRXvdd3v3vdd3v3net5net6vssnet9vssnet3net3vssnet4vdd3v3net2net2net1vdd3v3vdd3v3net1net1vssvssvssnet7net4vdd3v3net7net7net6vdd3v3net9vdd3v3net6net6vdd3v3vdd3v3net1net8vdd3v3net9net2net8vssvssvdd3v3vdd3v3porb_hvssvdd3v3vssnet10vdd1v8vdd1v8porb_lvssvssnet10vdd1v8net3vdd1v8por_lvssvssnet10vdd3v3vdd3v3vssvssnet7net9net10vdd3v3vdd1v8porb_hporb_lpor_lvssnet5vssvssnet3net2vssvdd3v3net4simple_porXC1cap_mim_m3_1W=30 L=30m=1XC2cap_mim_m3_2W=30 L=30m=1XM1pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM2nfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XR1res_xhigh_po_0p69L=500 mult=1m=1Substrate: B=vssXM4pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM5nfet_g5v0d10v5L=0.8 W=14nf=7 mult=1m=1XR2res_xhigh_po_0p69L=150 mult=1m=1Substrate: B=vssXM7pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM8pfet_g5v0d10v5L=0.8 W=14nf=7 mult=1m=1XM10nfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM9pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM11pfet_g5v0d10v5L=0.8 W=16nf=8 mult=1m=1XM12pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XM13pfet_g5v0d10v5L=0.8 W=2nf=1 mult=1m=1XR3res_xhigh_po_0p69L=25 mult=2m=2Substrate: B=vssx2buf_8x3buf_8x4inv_8x5schmittbuf_1 diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/testbench.spice b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/testbench.spice new file mode 100644 index 0000000000000000000000000000000000000000..123aa2b05ab712e2348f0e0b038466201d3a87c0 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/materials/testbench.spice @@ -0,0 +1,26 @@ +* Dual-supply POR startup, external load 1 pF per output. +.include "/workspace/support/models.spice" +.include "parameters.spice" +.include "dut.spice" +.temp 27 +.option klu rshunt=1e12 method=gear +Va avdd 0 PWL(0 0 100u 0 {ramp_time} 3.3) +Vd dvdd 0 PWL(0 0 300u 0 {ramp_time+300u} 1.8) +Xdut avdd dvdd porbh porbl porl 0 sky130_ef_ip__simple_por +Ch porbh 0 1p +Cl porbl 0 1p +Ci porl 0 1p +.control +save i(va) i(vd) v(avdd) v(dvdd) v(porbh) v(porbl) v(porl) +tran 1u 30m +meas tran release_time WHEN v(porbh)=1.65 RISE=1 +meas tran low_domain_release WHEN v(porbl)=0.9 RISE=1 +meas tran high_final FIND v(porbh) AT=29m +meas tran low_final FIND v(porbl) AT=29m +meas tran reset_final FIND v(porl) AT=29m +let supply_power=-v(avdd)*i(Va)-v(dvdd)*i(Vd) +meas tran startup_power AVG supply_power FROM=0 TO=30m +write transient.raw v(avdd) v(dvdd) v(porbh) v(porbl) v(porl) +quit +.endc +.end diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/problem.md b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/problem.md new file mode 100644 index 0000000000000000000000000000000000000000..e949a274e0e173bc2e68ba1200e477a4c9f2312e --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/problem.md @@ -0,0 +1,47 @@ +# SKY130 Dual-Supply Power-On Reset Layout Task + +## Objective + +Implement `sky130_ef_ip__simple_por` from the supplied transistor-level circuit, preserving topology, fixed device parameters, four-terminal body connections and the ordered interface. Submit a candidate GDS for electrical evaluation of its distributed RC extraction. + +## Inputs and Interface + +Ordered ports are `vdd3v3 vdd1v8 porb_h porb_l por_l vss`. Declared inputs include `problem.md`, `materials/circuit.spice` and `materials/testbench.spice`. The runtime provides models and process resources; reference layouts, author code and qualification evidence are maintainer-only materials. + +## Operating Conditions + +The source circuit's two ground domains are explicitly merged into VSS. The 3.3 V supply starts rising at 100 us, and the 1.8 V supply at 300 us; use 1, 5, 10 ms parameters separately with the original deck's exact PWL endpoints. Each output has 1 pF load. Retain the full 30 ms startup observation, measuring reset-release crossings in both domains, output levels at 29 ms and average startup power over 0–30 ms. All electrical experiments use fixed TT models at 27 °C; delivered testbenches define interpolation, edges, loads, sweeps, observation times and power intervals. + +## Physical Requirements + +Submit a nonempty GDS no larger than 10485760 bytes, with top cell `sky130_ef_ip__simple_por`. Functional geometry must fit within the 200 × 200 um envelope on the declared layer set. Pass complete Magic DRC without waivers and independent Netgen LVS checking named ports, models, dimensions, multiplicities and body/contact connections. After physical and geometric checks pass, extract the candidate's distributed interconnect resistance, capacitance and devices, then run every declared experiment. + +## Electrical Requirements and Scoring + +Both required release crossings must exist within the 0–30 ms observation; final high-domain release output must be 3.0–3.4 V, low-domain release output 1.6–1.9 V, and active-high reset output -0.1–0.2 V. Release times are paired with the source circuit under matching conditions for quality; original 0.5–25 ms timing and 1 mW power budgets are not rejection thresholds. Power and absolute errors must be nonnegative; all required measurements must be complete, finite and in correct units. + +| Metric | Functional requirement or measurement domain | Aggregation | Score weight | +| --- | --- | --- | ---: | +| `functional_area` | No fixed performance bound | max | 45% | +| `release_time` | 0 … 0.03 s | max | 20% | +| `low_domain_release` | 0 … 0.03 s | max | 20% | +| `startup_power` | 0 … +∞ W | max | 15% | +| `high_final` | 3.0 … 3.4 V | max | 0% | +| `low_final` | 1.6 … 1.9 V | max | 0% | +| `reset_final` | -0.1 … 0.2 V | max | 0% | + +The 1500 um2 area goal rewards compact placement of the startup network. Release timing remains centered on each ramp-specific source crossing: earlier release is not automatically better. A 100 us deviation scale makes parasitic shifts visible without imposing a timing tolerance. Area receives 45%, the two domain-release metrics 20% each, and startup energy rate 15%; both output domains remain functionally checked. + +| Metric | Quality anchor | Unit | Normalization | Scale | +| --- | --- | --- | --- | --- | +| `release_time` | paired source | s | target | 0.0001 | +| `low_domain_release` | paired source | s | target | 0.0001 | +| `startup_power` | paired source | W | saturating_ratio | 1e-06 | + +Independent source/candidate measurements remain paired under identical conditions. For a cost measurement x, saturating quality is `2*(b+s)/(b+x+2*s)`; target quality is `1/(1+abs(x-b)/s)`. Here b is the quality anchor above, and s is the declared scale. Take the worst quality across each metric’s conditions. Targets and scales do not add acceptance cutoffs; zero-weight observations remain checked. + +Area quality is `1500 um² / candidate functional area`. Total score is `100 × product(q_i^w_i)`, including area. Joint attainment of the goals scores 100; a feasible reference may score far below 100, and better valid solutions may exceed 100. Physical or functional invalidity scores zero; unusable measurements leave the score unknown. + +## Tools and Submission + +Solve budget: 6 hours. Use the task information, tools and SKY130 resources provided by the runtime protocol. Write only the final GDS to `output/final.gds` and explicitly submit through the declared interface. Source simulation serves characterization; accepted results come from complete physical and RC electrical evaluation of the candidate GDS. Conclusions cover only the declared conditions, excluding PVT, mismatch, reliability and product signoff. diff --git a/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/reference/simple_por.gds b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/reference/simple_por.gds new file mode 100644 index 0000000000000000000000000000000000000000..11ee3c19f219880853903148a30e18d1fe78af97 --- /dev/null +++ b/tasks/sky130A/sky130_ef_ip__simple_por/cases/simple_por/reference/simple_por.gds @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:35433f6de882b75252512575d1f917b52a1f462ebf1091c3aa3a4a46ad8af037 +size 489788