kind = "layout_case"
id = "freepdk45.OpenRAM.write_driver"
title = "Complementary SRAM Write Driver"
status = "qualified"
in_core = true
core_order = 12

[[assets]]
path = "reference/write_driver.gds"
role = "reference"
visibility = "maintainer"
format = "gds"
sha256 = "2465c2b5293b138226ebc396cc13dd19bca4b8aba3268dfead8f83893316ba78"

[task]
hours = 1
kind = "netlist_to_gds"
family = "freepdk45_write_driver"
coefficient = 3
environment = "freepdk45-nominal-predictive-rc"

[task.inputs.description]
path = "problem.md"
format = "text"
sha256 = "fc6a076567e6933008d95db0c645b619055bc386c78f998e072fa56e70ed6d3d"

[task.inputs.netlist]
path = "materials/circuit.spice"
format = "spice"
subcircuit = "write_driver"
sha256 = "40cf5d0d27b138b06a7b6b0bbdffefbf6a0569fae6092f1fd6d64c5501a952b4"

[task.inputs.performance]
path = "materials/testbench.spice"
format = "spice"
sha256 = "588e1607eace9ca43fc016350cd2bff550eb90c6aae16a338f47275ba8b2fe4f"

[task.constraints]
quality = [
    { id = "area", type = "functional_bbox_area", layers_from = "outline" },
]

[[task.constraints.hard]]
id = "outline"
type = "bbox_max"
functional_layers = [
    [
        1,
        0,
    ],
    [
        2,
        0,
    ],
    [
        3,
        0,
    ],
    [
        4,
        0,
    ],
    [
        5,
        0,
    ],
    [
        6,
        0,
    ],
    [
        7,
        0,
    ],
    [
        8,
        0,
    ],
    [
        9,
        0,
    ],
    [
        10,
        0,
    ],
    [
        11,
        0,
    ],
    [
        12,
        0,
    ],
    [
        13,
        0,
    ],
    [
        14,
        0,
    ],
    [
        15,
        0,
    ],
    [
        16,
        0,
    ],
    [
        17,
        0,
    ],
    [
        18,
        0,
    ],
    [
        19,
        0,
    ],
    [
        20,
        0,
    ],
    [
        21,
        0,
    ],
    [
        22,
        0,
    ],
    [
        23,
        0,
    ],
    [
        24,
        0,
    ],
    [
        25,
        0,
    ],
    [
        26,
        0,
    ],
    [
        27,
        0,
    ],
    [
        28,
        0,
    ],
    [
        29,
        0,
    ],
]
max_width_um = 100
max_height_um = 100

[task.output]
path = "output/final.gds"
format = "gds"
top_cell = "write_driver"
max_bytes = 10485760

[task.evaluation]
mode = "post_layout"

[[task.evaluation.jobs]]
id = "artifact"
stage = "check"
operation = "layout.artifact"
gate = "artifact"

[task.evaluation.jobs.inputs]
layout = "candidate"
task = "task"

[[task.evaluation.jobs]]
id = "drc"
stage = "check"
operation = "layout.drc"
gate = "drc"

[task.evaluation.jobs.inputs]
layout = "candidate"
task = "task"

[[task.evaluation.jobs]]
id = "lvs"
stage = "check"
operation = "layout.lvs"
gate = "lvs"

[task.evaluation.jobs.inputs]
layout = "candidate"
task = "task"
netlist = "input:netlist"

[task.evaluation.jobs.outputs]
database = "klayout-lvs"
binding = "json"

[[task.evaluation.jobs]]
id = "geometry"
stage = "check"
operation = "layout.geometry"
gate = "constraint"
requires = [
    "artifact",
    "drc",
    "lvs",
]

[task.evaluation.jobs.inputs]
layout = "candidate"
task = "task"
constraints = "input:constraints"
database = "job:lvs:database"
binding = "job:lvs:binding"

[[task.evaluation.jobs]]
id = "parasitics"
stage = "extract"
operation = "layout.extract_rc"
requires = [
    "artifact",
    "drc",
    "lvs",
    "geometry",
]

[task.evaluation.jobs.inputs]
layout = "candidate"
task = "task"

[task.evaluation.jobs.outputs]
netlist = "spice"

[task.evaluation.jobs.parameters]
ports = [
    "din",
    "bl",
    "br",
    "wen",
    "vdd",
    "gnd",
]

[[task.evaluation.jobs]]
id = "nominal"
stage = "simulate"
operation = "circuit.simulate"

[task.evaluation.jobs.inputs]
deck = "input:performance"
dut = "job:parasitics:netlist"

[task.evaluation.jobs.outputs]
waveform = "ngspice-raw"

[task.evaluation.jobs.parameters.exports]
waveform = "waveform.raw"

[task.evaluation.jobs.parameters.measurements]
bl_low = "V"
br_high = "V"
bl_high = "V"
br_low = "V"
z_bl = "V"
z_br = "V"
supply = "W"
data_delay_bl = "s"
data_delay_br = "s"
data_delay_fall_bl = "s"
data_delay_fall_br = "s"

[[task.evaluation.metrics]]
id = "functional_area"
category = "physical"
observations = [
    "geometry:area",
]
unit = "um2"
direction = "minimize"
aggregation = "max"

[[task.evaluation.metrics]]
id = "bl_low"
category = "performance"
observations = [
    "nominal:bl_low",
]
unit = "V"
direction = "minimize"
aggregation = "max"

[task.evaluation.metrics.requirement]
upper = 0.1
rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load."

[[task.evaluation.metrics]]
id = "br_high"
category = "performance"
observations = [
    "nominal:br_high",
]
unit = "V"
direction = "maximize"
aggregation = "min"

[task.evaluation.metrics.requirement]
lower = 0.9
rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load."

[[task.evaluation.metrics]]
id = "bl_high"
category = "performance"
observations = [
    "nominal:bl_high",
]
unit = "V"
direction = "maximize"
aggregation = "min"

[task.evaluation.metrics.requirement]
lower = 0.9
rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load."

[[task.evaluation.metrics]]
id = "br_low"
category = "performance"
observations = [
    "nominal:br_low",
]
unit = "V"
direction = "minimize"
aggregation = "max"

[task.evaluation.metrics.requirement]
upper = 0.1
rationale = "The declared truth-table, SRAM sense or polarity-correct comparator output must reach its stated CMOS logic level at every functional sample under the fixed supply and load."

[[task.evaluation.metrics]]
id = "z_bl"
category = "performance"
observations = [
    "nominal:z_bl",
]
unit = "V"
direction = "target"
aggregation = "max"

[task.evaluation.metrics.requirement]
lower = 0.45
upper = 0.55
rationale = "With the write driver disabled, both outputs must return to the 0.5 V passive load midpoint within 50 mV; this tests the required high-impedance state rather than driven logic."

[[task.evaluation.metrics]]
id = "z_br"
category = "performance"
observations = [
    "nominal:z_br",
]
unit = "V"
direction = "target"
aggregation = "max"

[task.evaluation.metrics.requirement]
lower = 0.45
upper = 0.55
rationale = "With the write driver disabled, both outputs must return to the 0.5 V passive load midpoint within 50 mV; this tests the required high-impedance state rather than driven logic."

[[task.evaluation.metrics]]
id = "supply"
category = "performance"
observations = [
    "nominal:supply",
]
unit = "W"
direction = "minimize"
aggregation = "max"
dimension = "supply"
baseline = [
    "source_nominal:supply",
]
normalization = "ratio"
scale = 1e-12

[task.evaluation.metrics.requirement]
lower = 0
rationale = "The declared powered circuit must consume nonnegative net energy from its supplies and driven references over the stated observation; power magnitude remains a quality objective."

[[task.evaluation.metrics]]
id = "data_delay"
category = "performance"
observations = [
    "nominal:data_delay_bl",
    "nominal:data_delay_br",
    "nominal:data_delay_fall_bl",
    "nominal:data_delay_fall_br",
]
baseline = [
    "source_nominal:data_delay_bl",
    "source_nominal:data_delay_br",
    "source_nominal:data_delay_fall_bl",
    "source_nominal:data_delay_fall_br",
]
unit = "s"
direction = "minimize"
aggregation = "max"
dimension = "response"
normalization = "ratio"

[task.evaluation.metrics.requirement]
lower = 0.0
rationale = "The declared ordered-event interval or crossing frequency has a nonnegative measurement domain, and its crossing must exist for a usable observation."

[task.evaluation.metrics.quality_target]
value = 7e-11
rationale = "Complete every enabled data-to-bitline transition within 70 ps under the declared 10 fF and 100 kohm loads."

[task.evaluation.scoring]
method = "layout"
area_metric = "functional_area"
area_target = 1.8
rationale = "The 1.8 um2 area goal rewards sharing in the two complementary tristate branches, without changing their 12 transistors. Delay receives 50% because four loaded transitions expose routing imbalance; area receives 40% and supply power 10%. The 70 ps timing goal is close to the slowest source transition (about 68 ps); disabled high-impedance behavior remains a functional check."

[task.evaluation.scoring.weights]
functional_area = 0.4
data_delay = 0.5
supply = 0.1

[task.evaluation.pre_layout]
source_report_sha256 = "1c1c0efa051f6fe904269e5969a27eaf6224b66d0296b114ac96319c759f5aee"

[task.evaluation.pre_layout.backends]
"circuit.simulate" = "{\"adapter\": \"ngspice-docker\", \"adapter_sha256\": \"dfbdf2f93297bbe7d8b576fb988504bd0ecf85b93ef47c314a0f2c9c8830c3e7\", \"compatibility\": null, \"cpu_budget\": 8, \"execution_sha256\": \"495aa9623759f70228a236eb4825c2ae443ef6a741816d8cfc17d1830841dcef\", \"image_id\": \"sha256:060fee64f9f6e71a647e5e958b788d723c9d51d2928ff93e6a295db1959bc37f\", \"limits\": {\"cpus\": 8, \"memory_mb\": 4096, \"pids\": 256}, \"max_parallel_jobs\": 8, \"resistor_formulation\": \"conductance\", \"support_sha256\": \"660672961e1ce0632bb9e18bc6dfb1fbd751a36d1fc496f1491763859d76c624\", \"thread_environment\": {\"OMP_NUM_THREADS\": \"1\", \"OMP_THREAD_LIMIT\": \"1\"}, \"threads\": 1, \"timeout_seconds\": 120.0, \"tool_version\": \"******\\n** ngspice-45 : Circuit level simulation program\\n** Compiled with KLU Direct Linear Solver\\n** The U. C. Berkeley CAD Group\\n** Copyright 1985-1994, Regents of the University of California.\\n** Copyright 2001-2025, The ngspice team.\\n** Please get your ngspice manual from https://ngspice.sourceforge.io/docs.html\\n** Please file your bug-reports at http://ngspice.sourceforge.net/bugrep.html\\n** Creation Date: Thu Sep 17 13:42:47 UTC 2026\\n******\"}"

[task.evaluation.pre_layout.jobs.source_nominal]
operation = "circuit.simulate"

[task.evaluation.pre_layout.jobs.source_nominal.inputs]
deck = "input:performance"
dut = "input:netlist"

[task.evaluation.pre_layout.jobs.source_nominal.outputs]
waveform = "ngspice-raw"

[task.evaluation.pre_layout.jobs.source_nominal.parameters.exports]
waveform = "waveform.raw"

[task.evaluation.pre_layout.jobs.source_nominal.parameters.measurements]
bl_high = "V"
bl_low = "V"
br_high = "V"
br_low = "V"
data_delay_bl = "s"
data_delay_br = "s"
data_delay_fall_bl = "s"
data_delay_fall_br = "s"
supply = "W"
z_bl = "V"
z_br = "V"

[task.evaluation.pre_layout.jobs.source_nominal.input_sha256]
deck = "588e1607eace9ca43fc016350cd2bff550eb90c6aae16a338f47275ba8b2fe4f"
dut = "40cf5d0d27b138b06a7b6b0bbdffefbf6a0569fae6092f1fd6d64c5501a952b4"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.bl_high]
value = 0.9860666
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.bl_low]
value = 0.0150365
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.br_high]
value = 0.9886259
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.br_low]
value = 0.02670905
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.data_delay_bl]
value = 5.409058e-11
unit = "s"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.data_delay_br]
value = 6.295051e-11
unit = "s"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.data_delay_fall_bl]
value = 6.78363e-11
unit = "s"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.data_delay_fall_br]
value = 4.749879e-11
unit = "s"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.supply]
value = 2.174283e-05
unit = "W"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.z_bl]
value = 0.5015592
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.measurements.z_br]
value = 0.502349
unit = "V"

[task.evaluation.pre_layout.jobs.source_nominal.output_sha256]
waveform = "319ae9bc6fda9bb4d5e68f3d3f1435e9288ed2a7ff7dec670e469cf3cd08c480"

[toolchain.backends.artifact]
type = "klayout-docker"

[toolchain.backends.artifact.settings]
image = "iclayout-eda-open:local"
check = "artifact"
timeout_seconds = 120

[toolchain.backends.drc]
type = "klayout-docker"

[toolchain.backends.drc.settings]
image = "iclayout-eda-open:local"
check = "drc"
timeout_seconds = 120
support = "build/support/freepdk45-klayout"
profile = "drc.json"

[toolchain.backends.drc.support_profiles]
support = "klayout"

[toolchain.backends.lvs]
type = "klayout-docker"

[toolchain.backends.lvs.settings]
image = "iclayout-eda-open:local"
check = "lvs"
timeout_seconds = 120
support = "build/support/freepdk45-klayout"
profile = "strict-lvs.json"

[toolchain.backends.lvs.support_profiles]
support = "klayout"

[toolchain.backends.geometry]
type = "klayout-geometry-docker"

[toolchain.backends.geometry.settings]
image = "iclayout-eda-open:local"
timeout_seconds = 60

[toolchain.backends.rc]
type = "magic-rc-docker"

[toolchain.backends.rc.settings]
image = "iclayout-eda-open:local"
support = "build/support/freepdk45-magic-vtg"
technology = "freepdk45.tech"
tech_name = "freepdk45"
style = "spice3(sim)"
gds_readonly = false
case_insensitive_ports = true
label_layers = [
    [
        9,
        0,
    ],
    [
        11,
        0,
    ],
    [
        13,
        0,
    ],
    [
        15,
        0,
    ],
    [
        17,
        0,
    ],
    [
        19,
        0,
    ],
    [
        21,
        0,
    ],
    [
        23,
        0,
    ],
    [
        25,
        0,
    ],
    [
        27,
        0,
    ],
    [
        29,
        0,
    ],
]
timeout_seconds = 120

[toolchain.backends.rc.support_profiles]
support = "magic-vtg"

[toolchain.backends.ngspice]
type = "ngspice-docker"

[toolchain.backends.ngspice.settings]
max_parallel_jobs = 8
threads = 1
cpu_budget = 8
image = "iclayout-eda-open:local"
support = "build/support/freepdk45-models"
timeout_seconds = 120

[toolchain.backends.ngspice.support_profiles]
support = "models"

[toolchain.bindings]
"layout.artifact" = "artifact"
"layout.drc" = "drc"
"layout.lvs" = "lvs"
"layout.geometry" = "geometry"
"layout.extract_rc" = "rc"
"circuit.simulate" = "ngspice"

[qualification]
reference = "reference/write_driver.gds"

[origin]
url = "https://github.com/ferdous313/OpenRAM/blob/420a33e731d7d80bf9c7cd54ffbeec3603259847/technology/freepdk45/sp_lib/write_driver.sp"

[presentation]
category = "Logic & memory"
summary = "Drives complementary bitlines during a write and releases them when disabled."