diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openacc/cupti_openacc.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openacc/cupti_openacc.h new file mode 100644 index 0000000000000000000000000000000000000000..b7ea50da7beb2187e77f7606dd70faed0e4b4add --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openacc/cupti_openacc.h @@ -0,0 +1,98 @@ +/* + * Copyright 2017 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#include + +#if !defined(_CUPTI_OPENACC_H_) +#define _CUPTI_OPENACC_H_ + +#ifndef CUPTIAPI +#ifdef _WIN32 +#define CUPTIAPI __stdcall +#else +#define CUPTIAPI +#endif +#endif + +#if defined(__LP64__) +#define CUPTILP64 1 +#elif defined(_WIN64) +#define CUPTILP64 1 +#else +#undef CUPTILP64 +#endif + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility push(default) +#endif + +/** + * \brief Initialize OpenACC support + * + * \param profRegister function of type acc_prof_reg as obtained from acc_register_library + * \param profUnregister function of type acc_prof_reg as obtained from acc_register_library + * \param profLookup function of type acc_prof_lookup as obtained from acc_register_library + */ +CUptiResult CUPTIAPI +cuptiOpenACCInitialize(void *profRegister, void *profUnregister, void *profLookup); + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility pop +#endif + +#if defined(__cplusplus) +} +#endif + +#endif /*_CUPTI_OPENACC_H_*/ + diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/cupti_openmp.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/cupti_openmp.h new file mode 100644 index 0000000000000000000000000000000000000000..303dd42878fb02774d872c197ccc27b17f2af69e --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/cupti_openmp.h @@ -0,0 +1,100 @@ +/* + * Copyright 2018 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#include +#include "Openmp/omp-tools.h" + +#if !defined(_CUPTI_OPENMP_H_) +#define _CUPTI_OPENMP_H_ + +#ifndef CUPTIAPI +#ifdef _WIN32 +#define CUPTIAPI __stdcall +#else +#define CUPTIAPI +#endif +#endif + +#if defined(__LP64__) +#define CUPTILP64 1 +#elif defined(_WIN64) +#define CUPTILP64 1 +#else +#undef CUPTILP64 +#endif + +#if defined(__cplusplus) +extern "C" { +#endif + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility push(default) +#endif + +/** + * \brief Initialize OPENMP support (deprecated, used before OpenMP 5.0) + * + */ +int CUPTIAPI cuptiOpenMpInitialize(ompt_function_lookup_t ompt_fn_lookup, const char *runtime_version, unsigned int ompt_version); + +/** + * \brief Initialize OPENMP support + * + */ +int CUPTIAPI cuptiOpenMpInitialize_v2(ompt_function_lookup_t lookup, int initial_device_num, ompt_data_t *tool_data); + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility pop +#endif + +#if defined(__cplusplus) +} +#endif + +#endif /*_CUPTI_OPENMP_H_*/ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/omp-tools.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/omp-tools.h new file mode 100644 index 0000000000000000000000000000000000000000..276967d07e8f8c0f7686e5b3b15151edf2415ae7 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/Openmp/omp-tools.h @@ -0,0 +1,1083 @@ +/* + * include/50/omp-tools.h.var + */ + +//===----------------------------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.txt for details. +// +//===----------------------------------------------------------------------===// + +#ifndef __OMPT__ +#define __OMPT__ + +/***************************************************************************** + * system include files + *****************************************************************************/ + +#include +#include + +/***************************************************************************** + * iteration macros + *****************************************************************************/ + +#define FOREACH_OMPT_INQUIRY_FN(macro) \ + macro (ompt_enumerate_states) \ + macro (ompt_enumerate_mutex_impls) \ + \ + macro (ompt_set_callback) \ + macro (ompt_get_callback) \ + \ + macro (ompt_get_state) \ + \ + macro (ompt_get_parallel_info) \ + macro (ompt_get_task_info) \ + macro (ompt_get_task_memory) \ + macro (ompt_get_thread_data) \ + macro (ompt_get_unique_id) \ + macro (ompt_finalize_tool) \ + \ + macro(ompt_get_num_procs) \ + macro(ompt_get_num_places) \ + macro(ompt_get_place_proc_ids) \ + macro(ompt_get_place_num) \ + macro(ompt_get_partition_place_nums) \ + macro(ompt_get_proc_id) \ + \ + macro(ompt_get_target_info) \ + macro(ompt_get_num_devices) + +#define FOREACH_OMPT_STATE(macro) \ + \ + /* first available state */ \ + macro (ompt_state_undefined, 0x102) /* undefined thread state */ \ + \ + /* work states (0..15) */ \ + macro (ompt_state_work_serial, 0x000) /* working outside parallel */ \ + macro (ompt_state_work_parallel, 0x001) /* working within parallel */ \ + macro (ompt_state_work_reduction, 0x002) /* performing a reduction */ \ + \ + /* barrier wait states (16..31) */ \ + macro (ompt_state_wait_barrier, 0x010) /* waiting at a barrier */ \ + macro (ompt_state_wait_barrier_implicit_parallel, 0x011) \ + /* implicit barrier at the end of parallel region */\ + macro (ompt_state_wait_barrier_implicit_workshare, 0x012) \ + /* implicit barrier at the end of worksharing */ \ + macro (ompt_state_wait_barrier_implicit, 0x013) /* implicit barrier */ \ + macro (ompt_state_wait_barrier_explicit, 0x014) /* explicit barrier */ \ + \ + /* task wait states (32..63) */ \ + macro (ompt_state_wait_taskwait, 0x020) /* waiting at a taskwait */ \ + macro (ompt_state_wait_taskgroup, 0x021) /* waiting at a taskgroup */ \ + \ + /* mutex wait states (64..127) */ \ + macro (ompt_state_wait_mutex, 0x040) \ + macro (ompt_state_wait_lock, 0x041) /* waiting for lock */ \ + macro (ompt_state_wait_critical, 0x042) /* waiting for critical */ \ + macro (ompt_state_wait_atomic, 0x043) /* waiting for atomic */ \ + macro (ompt_state_wait_ordered, 0x044) /* waiting for ordered */ \ + \ + /* target wait states (128..255) */ \ + macro (ompt_state_wait_target, 0x080) /* waiting for target region */ \ + macro (ompt_state_wait_target_map, 0x081) /* waiting for target data mapping operation */ \ + macro (ompt_state_wait_target_update, 0x082) /* waiting for target update operation */ \ + \ + /* misc (256..511) */ \ + macro (ompt_state_idle, 0x100) /* waiting for work */ \ + macro (ompt_state_overhead, 0x101) /* overhead excluding wait states */ \ + \ + /* implementation-specific states (512..) */ + + +#define FOREACH_KMP_MUTEX_IMPL(macro) \ + macro (kmp_mutex_impl_none, 0) /* unknown implementation */ \ + macro (kmp_mutex_impl_spin, 1) /* based on spin */ \ + macro (kmp_mutex_impl_queuing, 2) /* based on some fair policy */ \ + macro (kmp_mutex_impl_speculative, 3) /* based on HW-supported speculation */ + +#define FOREACH_OMPT_EVENT(macro) \ + \ + /*--- Mandatory Events ---*/ \ + macro (ompt_callback_thread_begin, ompt_callback_thread_begin_t, 1) /* thread begin */ \ + macro (ompt_callback_thread_end, ompt_callback_thread_end_t, 2) /* thread end */ \ + \ + macro (ompt_callback_parallel_begin, ompt_callback_parallel_begin_t, 3) /* parallel begin */ \ + macro (ompt_callback_parallel_end, ompt_callback_parallel_end_t, 4) /* parallel end */ \ + \ + macro (ompt_callback_task_create, ompt_callback_task_create_t, 5) /* task begin */ \ + macro (ompt_callback_task_schedule, ompt_callback_task_schedule_t, 6) /* task schedule */ \ + macro (ompt_callback_implicit_task, ompt_callback_implicit_task_t, 7) /* implicit task */ \ + \ + macro (ompt_callback_target, ompt_callback_target_t, 8) /* target */ \ + macro (ompt_callback_target_data_op, ompt_callback_target_data_op_t, 9) /* target data op */ \ + macro (ompt_callback_target_submit, ompt_callback_target_submit_t, 10) /* target submit */ \ + \ + macro (ompt_callback_control_tool, ompt_callback_control_tool_t, 11) /* control tool */ \ + \ + macro (ompt_callback_device_initialize, ompt_callback_device_initialize_t, 12) /* device initialize */ \ + macro (ompt_callback_device_finalize, ompt_callback_device_finalize_t, 13) /* device finalize */ \ + \ + macro (ompt_callback_device_load, ompt_callback_device_load_t, 14) /* device load */ \ + macro (ompt_callback_device_unload, ompt_callback_device_unload_t, 15) /* device unload */ \ + \ + /* Optional Events */ \ + macro (ompt_callback_sync_region_wait, ompt_callback_sync_region_t, 16) /* sync region wait begin or end */ \ + \ + macro (ompt_callback_mutex_released, ompt_callback_mutex_t, 17) /* mutex released */ \ + \ + macro (ompt_callback_dependences, ompt_callback_dependences_t, 18) /* report task dependences */ \ + macro (ompt_callback_task_dependence, ompt_callback_task_dependence_t, 19) /* report task dependence */ \ + \ + macro (ompt_callback_work, ompt_callback_work_t, 20) /* task at work begin or end */ \ + \ + macro (ompt_callback_master, ompt_callback_master_t, 21) /* task at master begin or end */ \ + \ + macro (ompt_callback_target_map, ompt_callback_target_map_t, 22) /* target map */ \ + \ + macro (ompt_callback_sync_region, ompt_callback_sync_region_t, 23) /* sync region begin or end */ \ + \ + macro (ompt_callback_lock_init, ompt_callback_mutex_acquire_t, 24) /* lock init */ \ + macro (ompt_callback_lock_destroy, ompt_callback_mutex_t, 25) /* lock destroy */ \ + \ + macro (ompt_callback_mutex_acquire, ompt_callback_mutex_acquire_t, 26) /* mutex acquire */ \ + macro (ompt_callback_mutex_acquired, ompt_callback_mutex_t, 27) /* mutex acquired */ \ + \ + macro (ompt_callback_nest_lock, ompt_callback_nest_lock_t, 28) /* nest lock */ \ + \ + macro (ompt_callback_flush, ompt_callback_flush_t, 29) /* after executing flush */ \ + \ + macro (ompt_callback_cancel, ompt_callback_cancel_t, 30) /* cancel innermost binding region */ \ + \ + macro (ompt_callback_reduction, ompt_callback_sync_region_t, 31) /* reduction */ \ + \ + macro (ompt_callback_dispatch, ompt_callback_dispatch_t, 32) /* dispatch of work */ + +/***************************************************************************** + * implementation specific types + *****************************************************************************/ + +typedef enum kmp_mutex_impl_t { +#define kmp_mutex_impl_macro(impl, code) impl = code, + FOREACH_KMP_MUTEX_IMPL(kmp_mutex_impl_macro) +#undef kmp_mutex_impl_macro +} kmp_mutex_impl_t; + +/***************************************************************************** + * definitions generated from spec + *****************************************************************************/ + +typedef enum ompt_callbacks_t { + ompt_callback_thread_begin = 1, + ompt_callback_thread_end = 2, + ompt_callback_parallel_begin = 3, + ompt_callback_parallel_end = 4, + ompt_callback_task_create = 5, + ompt_callback_task_schedule = 6, + ompt_callback_implicit_task = 7, + ompt_callback_target = 8, + ompt_callback_target_data_op = 9, + ompt_callback_target_submit = 10, + ompt_callback_control_tool = 11, + ompt_callback_device_initialize = 12, + ompt_callback_device_finalize = 13, + ompt_callback_device_load = 14, + ompt_callback_device_unload = 15, + ompt_callback_sync_region_wait = 16, + ompt_callback_mutex_released = 17, + ompt_callback_dependences = 18, + ompt_callback_task_dependence = 19, + ompt_callback_work = 20, + ompt_callback_master = 21, + ompt_callback_target_map = 22, + ompt_callback_sync_region = 23, + ompt_callback_lock_init = 24, + ompt_callback_lock_destroy = 25, + ompt_callback_mutex_acquire = 26, + ompt_callback_mutex_acquired = 27, + ompt_callback_nest_lock = 28, + ompt_callback_flush = 29, + ompt_callback_cancel = 30, + ompt_callback_reduction = 31, + ompt_callback_dispatch = 32 +} ompt_callbacks_t; + +typedef enum ompt_record_t { + ompt_record_ompt = 1, + ompt_record_native = 2, + ompt_record_invalid = 3 +} ompt_record_t; + +typedef enum ompt_record_native_t { + ompt_record_native_info = 1, + ompt_record_native_event = 2 +} ompt_record_native_t; + +typedef enum ompt_set_result_t { + ompt_set_error = 0, + ompt_set_never = 1, + ompt_set_impossible = 2, + ompt_set_sometimes = 3, + ompt_set_sometimes_paired = 4, + ompt_set_always = 5 +} ompt_set_result_t; + +typedef uint64_t ompt_id_t; + +typedef uint64_t ompt_device_time_t; + +typedef uint64_t ompt_buffer_cursor_t; + +typedef enum ompt_thread_t { + ompt_thread_initial = 1, + ompt_thread_worker = 2, + ompt_thread_other = 3, + ompt_thread_unknown = 4 +} ompt_thread_t; + +typedef enum ompt_scope_endpoint_t { + ompt_scope_begin = 1, + ompt_scope_end = 2 +} ompt_scope_endpoint_t; + +typedef enum ompt_dispatch_t { + ompt_dispatch_iteration = 1, + ompt_dispatch_section = 2 +} ompt_dispatch_t; + +typedef enum ompt_sync_region_t { + ompt_sync_region_barrier = 1, + ompt_sync_region_barrier_implicit = 2, + ompt_sync_region_barrier_explicit = 3, + ompt_sync_region_barrier_implementation = 4, + ompt_sync_region_taskwait = 5, + ompt_sync_region_taskgroup = 6, + ompt_sync_region_reduction = 7 +} ompt_sync_region_t; + +typedef enum ompt_target_data_op_t { + ompt_target_data_alloc = 1, + ompt_target_data_transfer_to_device = 2, + ompt_target_data_transfer_from_device = 3, + ompt_target_data_delete = 4, + ompt_target_data_associate = 5, + ompt_target_data_disassociate = 6 +} ompt_target_data_op_t; + +typedef enum ompt_work_t { + ompt_work_loop = 1, + ompt_work_sections = 2, + ompt_work_single_executor = 3, + ompt_work_single_other = 4, + ompt_work_workshare = 5, + ompt_work_distribute = 6, + ompt_work_taskloop = 7 +} ompt_work_t; + +typedef enum ompt_mutex_t { + ompt_mutex_lock = 1, + ompt_mutex_test_lock = 2, + ompt_mutex_nest_lock = 3, + ompt_mutex_test_nest_lock = 4, + ompt_mutex_critical = 5, + ompt_mutex_atomic = 6, + ompt_mutex_ordered = 7 +} ompt_mutex_t; + +typedef enum ompt_native_mon_flag_t { + ompt_native_data_motion_explicit = 0x01, + ompt_native_data_motion_implicit = 0x02, + ompt_native_kernel_invocation = 0x04, + ompt_native_kernel_execution = 0x08, + ompt_native_driver = 0x10, + ompt_native_runtime = 0x20, + ompt_native_overhead = 0x40, + ompt_native_idleness = 0x80 +} ompt_native_mon_flag_t; + +typedef enum ompt_task_flag_t { + ompt_task_initial = 0x00000001, + ompt_task_implicit = 0x00000002, + ompt_task_explicit = 0x00000004, + ompt_task_target = 0x00000008, + ompt_task_undeferred = 0x08000000, + ompt_task_untied = 0x10000000, + ompt_task_final = 0x20000000, + ompt_task_mergeable = 0x40000000, + ompt_task_merged = 0x80000000 +} ompt_task_flag_t; + +typedef enum ompt_task_status_t { + ompt_task_complete = 1, + ompt_task_yield = 2, + ompt_task_cancel = 3, + ompt_task_detach = 4, + ompt_task_early_fulfill = 5, + ompt_task_late_fulfill = 6, + ompt_task_switch = 7 +} ompt_task_status_t; + +typedef enum ompt_target_t { + ompt_target = 1, + ompt_target_enter_data = 2, + ompt_target_exit_data = 3, + ompt_target_update = 4 +} ompt_target_t; + +typedef enum ompt_parallel_flag_t { + ompt_parallel_invoker_program = 0x00000001, + ompt_parallel_invoker_runtime = 0x00000002, + ompt_parallel_league = 0x40000000, + ompt_parallel_team = 0x80000000 +} ompt_parallel_flag_t; + +typedef enum ompt_target_map_flag_t { + ompt_target_map_flag_to = 0x01, + ompt_target_map_flag_from = 0x02, + ompt_target_map_flag_alloc = 0x04, + ompt_target_map_flag_release = 0x08, + ompt_target_map_flag_delete = 0x10, + ompt_target_map_flag_implicit = 0x20 +} ompt_target_map_flag_t; + +typedef enum ompt_dependence_type_t { + ompt_dependence_type_in = 1, + ompt_dependence_type_out = 2, + ompt_dependence_type_inout = 3, + ompt_dependence_type_mutexinoutset = 4, + ompt_dependence_type_source = 5, + ompt_dependence_type_sink = 6 +} ompt_dependence_type_t; + +typedef enum ompt_cancel_flag_t { + ompt_cancel_parallel = 0x01, + ompt_cancel_sections = 0x02, + ompt_cancel_loop = 0x04, + ompt_cancel_taskgroup = 0x08, + ompt_cancel_activated = 0x10, + ompt_cancel_detected = 0x20, + ompt_cancel_discarded_task = 0x40 +} ompt_cancel_flag_t; + +typedef uint64_t ompt_hwid_t; + +typedef uint64_t ompt_wait_id_t; + +typedef enum ompt_frame_flag_t { + ompt_frame_runtime = 0x00, + ompt_frame_application = 0x01, + ompt_frame_cfa = 0x10, + ompt_frame_framepointer = 0x20, + ompt_frame_stackaddress = 0x30 +} ompt_frame_flag_t; + +typedef enum ompt_state_t { + ompt_state_work_serial = 0x000, + ompt_state_work_parallel = 0x001, + ompt_state_work_reduction = 0x002, + + ompt_state_wait_barrier = 0x010, + ompt_state_wait_barrier_implicit_parallel = 0x011, + ompt_state_wait_barrier_implicit_workshare = 0x012, + ompt_state_wait_barrier_implicit = 0x013, + ompt_state_wait_barrier_explicit = 0x014, + + ompt_state_wait_taskwait = 0x020, + ompt_state_wait_taskgroup = 0x021, + + ompt_state_wait_mutex = 0x040, + ompt_state_wait_lock = 0x041, + ompt_state_wait_critical = 0x042, + ompt_state_wait_atomic = 0x043, + ompt_state_wait_ordered = 0x044, + + ompt_state_wait_target = 0x080, + ompt_state_wait_target_map = 0x081, + ompt_state_wait_target_update = 0x082, + + ompt_state_idle = 0x100, + ompt_state_overhead = 0x101, + ompt_state_undefined = 0x102 +} ompt_state_t; + +typedef uint64_t (*ompt_get_unique_id_t) (void); + +typedef uint64_t ompd_size_t; + +typedef uint64_t ompd_wait_id_t; + +typedef uint64_t ompd_addr_t; +typedef int64_t ompd_word_t; +typedef uint64_t ompd_seg_t; + +typedef uint64_t ompd_device_t; + +typedef uint64_t ompd_thread_id_t; + +typedef enum ompd_scope_t { + ompd_scope_global = 1, + ompd_scope_address_space = 2, + ompd_scope_thread = 3, + ompd_scope_parallel = 4, + ompd_scope_implicit_task = 5, + ompd_scope_task = 6 +} ompd_scope_t; + +typedef uint64_t ompd_icv_id_t; + +typedef enum ompd_rc_t { + ompd_rc_ok = 0, + ompd_rc_unavailable = 1, + ompd_rc_stale_handle = 2, + ompd_rc_bad_input = 3, + ompd_rc_error = 4, + ompd_rc_unsupported = 5, + ompd_rc_needs_state_tracking = 6, + ompd_rc_incompatible = 7, + ompd_rc_device_read_error = 8, + ompd_rc_device_write_error = 9, + ompd_rc_nomem = 10, +} ompd_rc_t; + +typedef void (*ompt_interface_fn_t) (void); + +typedef ompt_interface_fn_t (*ompt_function_lookup_t) ( + const char *interface_function_name +); + +typedef union ompt_data_t { + uint64_t value; + void *ptr; +} ompt_data_t; + +typedef struct ompt_frame_t { + ompt_data_t exit_frame; + ompt_data_t enter_frame; + int exit_frame_flags; + int enter_frame_flags; +} ompt_frame_t; + +typedef void (*ompt_callback_t) (void); + +typedef void ompt_device_t; + +typedef void ompt_buffer_t; + +typedef void (*ompt_callback_buffer_request_t) ( + int device_num, + ompt_buffer_t **buffer, + size_t *bytes +); + +typedef void (*ompt_callback_buffer_complete_t) ( + int device_num, + ompt_buffer_t *buffer, + size_t bytes, + ompt_buffer_cursor_t begin, + int buffer_owned +); + +typedef void (*ompt_finalize_t) ( + ompt_data_t *tool_data +); + +typedef int (*ompt_initialize_t) ( + ompt_function_lookup_t lookup, + int initial_device_num, + ompt_data_t *tool_data +); + +typedef struct ompt_start_tool_result_t { + ompt_initialize_t initialize; + ompt_finalize_t finalize; + ompt_data_t tool_data; +} ompt_start_tool_result_t; + +typedef struct ompt_record_abstract_t { + ompt_record_native_t rclass; + const char *type; + ompt_device_time_t start_time; + ompt_device_time_t end_time; + ompt_hwid_t hwid; +} ompt_record_abstract_t; + +typedef struct ompt_dependence_t { + ompt_data_t variable; + ompt_dependence_type_t dependence_type; +} ompt_dependence_t; + +typedef int (*ompt_enumerate_states_t) ( + int current_state, + int *next_state, + const char **next_state_name +); + +typedef int (*ompt_enumerate_mutex_impls_t) ( + int current_impl, + int *next_impl, + const char **next_impl_name +); + +typedef ompt_set_result_t (*ompt_set_callback_t) ( + ompt_callbacks_t event, + ompt_callback_t callback +); + +typedef int (*ompt_get_callback_t) ( + ompt_callbacks_t event, + ompt_callback_t *callback +); + +typedef ompt_data_t *(*ompt_get_thread_data_t) (void); + +typedef int (*ompt_get_num_procs_t) (void); + +typedef int (*ompt_get_num_places_t) (void); + +typedef int (*ompt_get_place_proc_ids_t) ( + int place_num, + int ids_size, + int *ids +); + +typedef int (*ompt_get_place_num_t) (void); + +typedef int (*ompt_get_partition_place_nums_t) ( + int place_nums_size, + int *place_nums +); + +typedef int (*ompt_get_proc_id_t) (void); + +typedef int (*ompt_get_state_t) ( + ompt_wait_id_t *wait_id +); + +typedef int (*ompt_get_parallel_info_t) ( + int ancestor_level, + ompt_data_t **parallel_data, + int *team_size +); + +typedef int (*ompt_get_task_info_t) ( + int ancestor_level, + int *flags, + ompt_data_t **task_data, + ompt_frame_t **task_frame, + ompt_data_t **parallel_data, + int *thread_num +); + +typedef int (*ompt_get_task_memory_t)( + void **addr, + size_t *size, + int block +); + +typedef int (*ompt_get_target_info_t) ( + uint64_t *device_num, + ompt_id_t *target_id, + ompt_id_t *host_op_id +); + +typedef int (*ompt_get_num_devices_t) (void); + +typedef void (*ompt_finalize_tool_t) (void); + +typedef int (*ompt_get_device_num_procs_t) ( + ompt_device_t *device +); + +typedef ompt_device_time_t (*ompt_get_device_time_t) ( + ompt_device_t *device +); + +typedef double (*ompt_translate_time_t) ( + ompt_device_t *device, + ompt_device_time_t time +); + +typedef ompt_set_result_t (*ompt_set_trace_ompt_t) ( + ompt_device_t *device, + unsigned int enable, + unsigned int etype +); + +typedef ompt_set_result_t (*ompt_set_trace_native_t) ( + ompt_device_t *device, + int enable, + int flags +); + +typedef int (*ompt_start_trace_t) ( + ompt_device_t *device, + ompt_callback_buffer_request_t request, + ompt_callback_buffer_complete_t complete +); + +typedef int (*ompt_pause_trace_t) ( + ompt_device_t *device, + int begin_pause +); + +typedef int (*ompt_flush_trace_t) ( + ompt_device_t *device +); + +typedef int (*ompt_stop_trace_t) ( + ompt_device_t *device +); + +typedef int (*ompt_advance_buffer_cursor_t) ( + ompt_device_t *device, + ompt_buffer_t *buffer, + size_t size, + ompt_buffer_cursor_t current, + ompt_buffer_cursor_t *next +); + +typedef ompt_record_t (*ompt_get_record_type_t) ( + ompt_buffer_t *buffer, + ompt_buffer_cursor_t current +); + +typedef void *(*ompt_get_record_native_t) ( + ompt_buffer_t *buffer, + ompt_buffer_cursor_t current, + ompt_id_t *host_op_id +); + +typedef ompt_record_abstract_t * +(*ompt_get_record_abstract_t) ( + void *native_record +); + +typedef void (*ompt_callback_thread_begin_t) ( + ompt_thread_t thread_type, + ompt_data_t *thread_data +); + +typedef struct ompt_record_thread_begin_t { + ompt_thread_t thread_type; +} ompt_record_thread_begin_t; + +typedef void (*ompt_callback_thread_end_t) ( + ompt_data_t *thread_data +); + +typedef void (*ompt_callback_parallel_begin_t) ( + ompt_data_t *encountering_task_data, + const ompt_frame_t *encountering_task_frame, + ompt_data_t *parallel_data, + unsigned int requested_parallelism, + int flags, + const void *codeptr_ra +); + +typedef struct ompt_record_parallel_begin_t { + ompt_id_t encountering_task_id; + ompt_id_t parallel_id; + unsigned int requested_parallelism; + int flags; + const void *codeptr_ra; +} ompt_record_parallel_begin_t; + +typedef void (*ompt_callback_parallel_end_t) ( + ompt_data_t *parallel_data, + ompt_data_t *encountering_task_data, + int flags, + const void *codeptr_ra +); + +typedef struct ompt_record_parallel_end_t { + ompt_id_t parallel_id; + ompt_id_t encountering_task_id; + int flags; + const void *codeptr_ra; +} ompt_record_parallel_end_t; + +typedef void (*ompt_callback_work_t) ( + ompt_work_t wstype, + ompt_scope_endpoint_t endpoint, + ompt_data_t *parallel_data, + ompt_data_t *task_data, + uint64_t count, + const void *codeptr_ra +); + +typedef struct ompt_record_work_t { + ompt_work_t wstype; + ompt_scope_endpoint_t endpoint; + ompt_id_t parallel_id; + ompt_id_t task_id; + uint64_t count; + const void *codeptr_ra; +} ompt_record_work_t; + +typedef void (*ompt_callback_dispatch_t) ( + ompt_data_t *parallel_data, + ompt_data_t *task_data, + ompt_dispatch_t kind, + ompt_data_t instance +); + +typedef struct ompt_record_dispatch_t { + ompt_id_t parallel_id; + ompt_id_t task_id; + ompt_dispatch_t kind; + ompt_data_t instance; +} ompt_record_dispatch_t; + +typedef void (*ompt_callback_task_create_t) ( + ompt_data_t *encountering_task_data, + const ompt_frame_t *encountering_task_frame, + ompt_data_t *new_task_data, + int flags, + int has_dependences, + const void *codeptr_ra +); + +typedef struct ompt_record_task_create_t { + ompt_id_t encountering_task_id; + ompt_id_t new_task_id; + int flags; + int has_dependences; + const void *codeptr_ra; +} ompt_record_task_create_t; + +typedef void (*ompt_callback_dependences_t) ( + ompt_data_t *task_data, + const ompt_dependence_t *deps, + int ndeps +); + +typedef struct ompt_record_dependences_t { + ompt_id_t task_id; + ompt_dependence_t dep; + int ndeps; +} ompt_record_dependences_t; + +typedef void (*ompt_callback_task_dependence_t) ( + ompt_data_t *src_task_data, + ompt_data_t *sink_task_data +); + +typedef struct ompt_record_task_dependence_t { + ompt_id_t src_task_id; + ompt_id_t sink_task_id; +} ompt_record_task_dependence_t; + +typedef void (*ompt_callback_task_schedule_t) ( + ompt_data_t *prior_task_data, + ompt_task_status_t prior_task_status, + ompt_data_t *next_task_data +); + +typedef struct ompt_record_task_schedule_t { + ompt_id_t prior_task_id; + ompt_task_status_t prior_task_status; + ompt_id_t next_task_id; +} ompt_record_task_schedule_t; + +typedef void (*ompt_callback_implicit_task_t) ( + ompt_scope_endpoint_t endpoint, + ompt_data_t *parallel_data, + ompt_data_t *task_data, + unsigned int actual_parallelism, + unsigned int index, + int flags +); + +typedef struct ompt_record_implicit_task_t { + ompt_scope_endpoint_t endpoint; + ompt_id_t parallel_id; + ompt_id_t task_id; + unsigned int actual_parallelism; + unsigned int index; + int flags; +} ompt_record_implicit_task_t; + +typedef void (*ompt_callback_master_t) ( + ompt_scope_endpoint_t endpoint, + ompt_data_t *parallel_data, + ompt_data_t *task_data, + const void *codeptr_ra +); + +typedef struct ompt_record_master_t { + ompt_scope_endpoint_t endpoint; + ompt_id_t parallel_id; + ompt_id_t task_id; + const void *codeptr_ra; +} ompt_record_master_t; + +typedef void (*ompt_callback_sync_region_t) ( + ompt_sync_region_t kind, + ompt_scope_endpoint_t endpoint, + ompt_data_t *parallel_data, + ompt_data_t *task_data, + const void *codeptr_ra +); + +typedef struct ompt_record_sync_region_t { + ompt_sync_region_t kind; + ompt_scope_endpoint_t endpoint; + ompt_id_t parallel_id; + ompt_id_t task_id; + const void *codeptr_ra; +} ompt_record_sync_region_t; + +typedef void (*ompt_callback_mutex_acquire_t) ( + ompt_mutex_t kind, + unsigned int hint, + unsigned int impl, + ompt_wait_id_t wait_id, + const void *codeptr_ra +); + +typedef struct ompt_record_mutex_acquire_t { + ompt_mutex_t kind; + unsigned int hint; + unsigned int impl; + ompt_wait_id_t wait_id; + const void *codeptr_ra; +} ompt_record_mutex_acquire_t; + +typedef void (*ompt_callback_mutex_t) ( + ompt_mutex_t kind, + ompt_wait_id_t wait_id, + const void *codeptr_ra +); + +typedef struct ompt_record_mutex_t { + ompt_mutex_t kind; + ompt_wait_id_t wait_id; + const void *codeptr_ra; +} ompt_record_mutex_t; + +typedef void (*ompt_callback_nest_lock_t) ( + ompt_scope_endpoint_t endpoint, + ompt_wait_id_t wait_id, + const void *codeptr_ra +); + +typedef struct ompt_record_nest_lock_t { + ompt_scope_endpoint_t endpoint; + ompt_wait_id_t wait_id; + const void *codeptr_ra; +} ompt_record_nest_lock_t; + +typedef void (*ompt_callback_flush_t) ( + ompt_data_t *thread_data, + const void *codeptr_ra +); + +typedef struct ompt_record_flush_t { + const void *codeptr_ra; +} ompt_record_flush_t; + +typedef void (*ompt_callback_cancel_t) ( + ompt_data_t *task_data, + int flags, + const void *codeptr_ra +); + +typedef struct ompt_record_cancel_t { + ompt_id_t task_id; + int flags; + const void *codeptr_ra; +} ompt_record_cancel_t; + +typedef void (*ompt_callback_device_initialize_t) ( + int device_num, + const char *type, + ompt_device_t *device, + ompt_function_lookup_t lookup, + const char *documentation +); + +typedef void (*ompt_callback_device_finalize_t) ( + int device_num +); + +typedef void (*ompt_callback_device_load_t) ( + int device_num, + const char *filename, + int64_t offset_in_file, + void *vma_in_file, + size_t bytes, + void *host_addr, + void *device_addr, + uint64_t module_id +); + +typedef void (*ompt_callback_device_unload_t) ( + int device_num, + uint64_t module_id +); + +typedef void (*ompt_callback_target_data_op_t) ( + ompt_id_t target_id, + ompt_id_t host_op_id, + ompt_target_data_op_t optype, + void *src_addr, + int src_device_num, + void *dest_addr, + int dest_device_num, + size_t bytes, + const void *codeptr_ra +); + +typedef struct ompt_record_target_data_op_t { + ompt_id_t host_op_id; + ompt_target_data_op_t optype; + void *src_addr; + int src_device_num; + void *dest_addr; + int dest_device_num; + size_t bytes; + ompt_device_time_t end_time; + const void *codeptr_ra; +} ompt_record_target_data_op_t; + +typedef void (*ompt_callback_target_t) ( + ompt_target_t kind, + ompt_scope_endpoint_t endpoint, + int device_num, + ompt_data_t *task_data, + ompt_id_t target_id, + const void *codeptr_ra +); + +typedef struct ompt_record_target_t { + ompt_target_t kind; + ompt_scope_endpoint_t endpoint; + int device_num; + ompt_id_t task_id; + ompt_id_t target_id; + const void *codeptr_ra; +} ompt_record_target_t; + +typedef void (*ompt_callback_target_map_t) ( + ompt_id_t target_id, + unsigned int nitems, + void **host_addr, + void **device_addr, + size_t *bytes, + unsigned int *mapping_flags, + const void *codeptr_ra +); + +typedef struct ompt_record_target_map_t { + ompt_id_t target_id; + unsigned int nitems; + void **host_addr; + void **device_addr; + size_t *bytes; + unsigned int *mapping_flags; + const void *codeptr_ra; +} ompt_record_target_map_t; + +typedef void (*ompt_callback_target_submit_t) ( + ompt_id_t target_id, + ompt_id_t host_op_id, + unsigned int requested_num_teams +); + +typedef struct ompt_record_target_kernel_t { + ompt_id_t host_op_id; + unsigned int requested_num_teams; + unsigned int granted_num_teams; + ompt_device_time_t end_time; +} ompt_record_target_kernel_t; + +typedef int (*ompt_callback_control_tool_t) ( + uint64_t command, + uint64_t modifier, + void *arg, + const void *codeptr_ra +); + +typedef struct ompt_record_control_tool_t { + uint64_t command; + uint64_t modifier; + const void *codeptr_ra; +} ompt_record_control_tool_t; + +typedef struct ompd_address_t { + ompd_seg_t segment; + ompd_addr_t address; +} ompd_address_t; + +typedef struct ompd_frame_info_t { + ompd_address_t frame_address; + ompd_word_t frame_flag; +} ompd_frame_info_t; + +typedef struct _ompd_aspace_handle ompd_address_space_handle_t; +typedef struct _ompd_thread_handle ompd_thread_handle_t; +typedef struct _ompd_parallel_handle ompd_parallel_handle_t; +typedef struct _ompd_task_handle ompd_task_handle_t; + +typedef struct _ompd_aspace_cont ompd_address_space_context_t; +typedef struct _ompd_thread_cont ompd_thread_context_t; + +typedef struct ompd_device_type_sizes_t { + uint8_t sizeof_char; + uint8_t sizeof_short; + uint8_t sizeof_int; + uint8_t sizeof_long; + uint8_t sizeof_long_long; + uint8_t sizeof_pointer; +} ompd_device_type_sizes_t; + +typedef struct ompt_record_ompt_t { + ompt_callbacks_t type; + ompt_device_time_t time; + ompt_id_t thread_id; + ompt_id_t target_id; + union { + ompt_record_thread_begin_t thread_begin; + ompt_record_parallel_begin_t parallel_begin; + ompt_record_parallel_end_t parallel_end; + ompt_record_work_t work; + ompt_record_dispatch_t dispatch; + ompt_record_task_create_t task_create; + ompt_record_dependences_t dependences; + ompt_record_task_dependence_t task_dependence; + ompt_record_task_schedule_t task_schedule; + ompt_record_implicit_task_t implicit_task; + ompt_record_master_t master; + ompt_record_sync_region_t sync_region; + ompt_record_mutex_acquire_t mutex_acquire; + ompt_record_mutex_t mutex; + ompt_record_nest_lock_t nest_lock; + ompt_record_flush_t flush; + ompt_record_cancel_t cancel; + ompt_record_target_t target; + ompt_record_target_data_op_t target_data_op; + ompt_record_target_map_t target_map; + ompt_record_target_kernel_t target_kernel; + ompt_record_control_tool_t control_tool; + } record; +} ompt_record_ompt_t; + +typedef ompt_record_ompt_t *(*ompt_get_record_ompt_t) ( + ompt_buffer_t *buffer, + ompt_buffer_cursor_t current +); + +#define ompt_id_none 0 +#define ompt_data_none {0} +#define ompt_time_none 0 +#define ompt_hwid_none 0 +#define ompt_addr_none ~0 +#define ompt_mutex_impl_none 0 +#define ompt_wait_id_none 0 + +#define ompd_segment_none 0 + +#endif /* __OMPT__ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_runtime_api_meta.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_runtime_api_meta.h new file mode 100644 index 0000000000000000000000000000000000000000..fb28568677699e9396716c6f8d91e9beb0941b8b --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_runtime_api_meta.h @@ -0,0 +1,2316 @@ +// This file is generated. Any changes you make will be lost during the next clean build. + +// CUDA public interface, for type definitions and api function prototypes +#include "cuda_runtime_api.h" + +// ************************************************************************* +// Definitions of structs to hold parameters for each function +// ************************************************************************* + +// Currently used parameter trace structures +typedef struct cudaDeviceSetLimit_v3020_params_st { + enum cudaLimit limit; + size_t value; +} cudaDeviceSetLimit_v3020_params; + +typedef struct cudaDeviceGetLimit_v3020_params_st { + size_t *pValue; + enum cudaLimit limit; +} cudaDeviceGetLimit_v3020_params; + +typedef struct cudaDeviceGetTexture1DLinearMaxWidth_v11010_params_st { + size_t *maxWidthInElements; + const struct cudaChannelFormatDesc *fmtDesc; + int device; +} cudaDeviceGetTexture1DLinearMaxWidth_v11010_params; + +typedef struct cudaDeviceGetCacheConfig_v3020_params_st { + enum cudaFuncCache *pCacheConfig; +} cudaDeviceGetCacheConfig_v3020_params; + +typedef struct cudaDeviceGetStreamPriorityRange_v5050_params_st { + int *leastPriority; + int *greatestPriority; +} cudaDeviceGetStreamPriorityRange_v5050_params; + +typedef struct cudaDeviceSetCacheConfig_v3020_params_st { + enum cudaFuncCache cacheConfig; +} cudaDeviceSetCacheConfig_v3020_params; + +typedef struct cudaDeviceGetByPCIBusId_v4010_params_st { + int *device; + const char *pciBusId; +} cudaDeviceGetByPCIBusId_v4010_params; + +typedef struct cudaDeviceGetPCIBusId_v4010_params_st { + char *pciBusId; + int len; + int device; +} cudaDeviceGetPCIBusId_v4010_params; + +typedef struct cudaIpcGetEventHandle_v4010_params_st { + cudaIpcEventHandle_t *handle; + cudaEvent_t event; +} cudaIpcGetEventHandle_v4010_params; + +typedef struct cudaIpcOpenEventHandle_v4010_params_st { + cudaEvent_t *event; + cudaIpcEventHandle_t handle; +} cudaIpcOpenEventHandle_v4010_params; + +typedef struct cudaIpcGetMemHandle_v4010_params_st { + cudaIpcMemHandle_t *handle; + void *devPtr; +} cudaIpcGetMemHandle_v4010_params; + +typedef struct cudaIpcOpenMemHandle_v4010_params_st { + void **devPtr; + cudaIpcMemHandle_t handle; + unsigned int flags; +} cudaIpcOpenMemHandle_v4010_params; + +typedef struct cudaIpcCloseMemHandle_v4010_params_st { + void *devPtr; +} cudaIpcCloseMemHandle_v4010_params; + +typedef struct cudaDeviceFlushGPUDirectRDMAWrites_v11030_params_st { + enum cudaFlushGPUDirectRDMAWritesTarget target; + enum cudaFlushGPUDirectRDMAWritesScope scope; +} cudaDeviceFlushGPUDirectRDMAWrites_v11030_params; + +typedef struct cudaDeviceRegisterAsyncNotification_v12040_params_st { + int device; + cudaAsyncCallback callbackFunc; + void *userData; + cudaAsyncCallbackHandle_t *callback; +} cudaDeviceRegisterAsyncNotification_v12040_params; + +typedef struct cudaDeviceUnregisterAsyncNotification_v12040_params_st { + int device; + cudaAsyncCallbackHandle_t callback; +} cudaDeviceUnregisterAsyncNotification_v12040_params; + +typedef struct cudaDeviceGetSharedMemConfig_v4020_params_st { + enum cudaSharedMemConfig *pConfig; +} cudaDeviceGetSharedMemConfig_v4020_params; + +typedef struct cudaDeviceSetSharedMemConfig_v4020_params_st { + enum cudaSharedMemConfig config; +} cudaDeviceSetSharedMemConfig_v4020_params; + +typedef struct cudaGetErrorName_v6050_params_st { + cudaError_t error; +} cudaGetErrorName_v6050_params; + +typedef struct cudaGetErrorString_v3020_params_st { + cudaError_t error; +} cudaGetErrorString_v3020_params; + +typedef struct cudaGetDeviceCount_v3020_params_st { + int *count; +} cudaGetDeviceCount_v3020_params; + +typedef struct cudaGetDeviceProperties_v2_v12000_params_st { + struct cudaDeviceProp *prop; + int device; +} cudaGetDeviceProperties_v2_v12000_params; + +typedef struct cudaDeviceGetAttribute_v5000_params_st { + int *value; + enum cudaDeviceAttr attr; + int device; +} cudaDeviceGetAttribute_v5000_params; + +typedef struct cudaDeviceGetDefaultMemPool_v11020_params_st { + cudaMemPool_t *memPool; + int device; +} cudaDeviceGetDefaultMemPool_v11020_params; + +typedef struct cudaDeviceSetMemPool_v11020_params_st { + int device; + cudaMemPool_t memPool; +} cudaDeviceSetMemPool_v11020_params; + +typedef struct cudaDeviceGetMemPool_v11020_params_st { + cudaMemPool_t *memPool; + int device; +} cudaDeviceGetMemPool_v11020_params; + +typedef struct cudaDeviceGetNvSciSyncAttributes_v10020_params_st { + void *nvSciSyncAttrList; + int device; + int flags; +} cudaDeviceGetNvSciSyncAttributes_v10020_params; + +typedef struct cudaDeviceGetP2PAttribute_v8000_params_st { + int *value; + enum cudaDeviceP2PAttr attr; + int srcDevice; + int dstDevice; +} cudaDeviceGetP2PAttribute_v8000_params; + +typedef struct cudaChooseDevice_v3020_params_st { + int *device; + const struct cudaDeviceProp *prop; +} cudaChooseDevice_v3020_params; + +typedef struct cudaInitDevice_v12000_params_st { + int device; + unsigned int deviceFlags; + unsigned int flags; +} cudaInitDevice_v12000_params; + +typedef struct cudaSetDevice_v3020_params_st { + int device; +} cudaSetDevice_v3020_params; + +typedef struct cudaGetDevice_v3020_params_st { + int *device; +} cudaGetDevice_v3020_params; + +typedef struct cudaSetValidDevices_v3020_params_st { + int *device_arr; + int len; +} cudaSetValidDevices_v3020_params; + +typedef struct cudaSetDeviceFlags_v3020_params_st { + unsigned int flags; +} cudaSetDeviceFlags_v3020_params; + +typedef struct cudaGetDeviceFlags_v7000_params_st { + unsigned int *flags; +} cudaGetDeviceFlags_v7000_params; + +typedef struct cudaStreamCreate_v3020_params_st { + cudaStream_t *pStream; +} cudaStreamCreate_v3020_params; + +typedef struct cudaStreamCreateWithFlags_v5000_params_st { + cudaStream_t *pStream; + unsigned int flags; +} cudaStreamCreateWithFlags_v5000_params; + +typedef struct cudaStreamCreateWithPriority_v5050_params_st { + cudaStream_t *pStream; + unsigned int flags; + int priority; +} cudaStreamCreateWithPriority_v5050_params; + +typedef struct cudaStreamGetPriority_ptsz_v7000_params_st { + cudaStream_t hStream; + int *priority; +} cudaStreamGetPriority_ptsz_v7000_params; + +typedef struct cudaStreamGetFlags_ptsz_v7000_params_st { + cudaStream_t hStream; + unsigned int *flags; +} cudaStreamGetFlags_ptsz_v7000_params; + +typedef struct cudaStreamGetId_ptsz_v12000_params_st { + cudaStream_t hStream; + unsigned long long *streamId; +} cudaStreamGetId_ptsz_v12000_params; + +typedef struct cudaStreamCopyAttributes_ptsz_v11000_params_st { + cudaStream_t dst; + cudaStream_t src; +} cudaStreamCopyAttributes_ptsz_v11000_params; + +typedef struct cudaStreamGetAttribute_ptsz_v11000_params_st { + cudaStream_t hStream; + cudaStreamAttrID attr; + cudaStreamAttrValue *value_out; +} cudaStreamGetAttribute_ptsz_v11000_params; + +typedef struct cudaStreamSetAttribute_ptsz_v11000_params_st { + cudaStream_t hStream; + cudaStreamAttrID attr; + const cudaStreamAttrValue *value; +} cudaStreamSetAttribute_ptsz_v11000_params; + +typedef struct cudaStreamDestroy_v5050_params_st { + cudaStream_t stream; +} cudaStreamDestroy_v5050_params; + +typedef struct cudaStreamWaitEvent_ptsz_v7000_params_st { + cudaStream_t stream; + cudaEvent_t event; + unsigned int flags; +} cudaStreamWaitEvent_ptsz_v7000_params; + +typedef struct cudaStreamAddCallback_ptsz_v7000_params_st { + cudaStream_t stream; + cudaStreamCallback_t callback; + void *userData; + unsigned int flags; +} cudaStreamAddCallback_ptsz_v7000_params; + +typedef struct cudaStreamSynchronize_ptsz_v7000_params_st { + cudaStream_t stream; +} cudaStreamSynchronize_ptsz_v7000_params; + +typedef struct cudaStreamQuery_ptsz_v7000_params_st { + cudaStream_t stream; +} cudaStreamQuery_ptsz_v7000_params; + +typedef struct cudaStreamAttachMemAsync_ptsz_v7000_params_st { + cudaStream_t stream; + void *devPtr; + size_t length; + unsigned int flags; +} cudaStreamAttachMemAsync_ptsz_v7000_params; + +typedef struct cudaStreamBeginCapture_ptsz_v10000_params_st { + cudaStream_t stream; + enum cudaStreamCaptureMode mode; +} cudaStreamBeginCapture_ptsz_v10000_params; + +typedef struct cudaStreamBeginCaptureToGraph_ptsz_v12030_params_st { + cudaStream_t stream; + cudaGraph_t graph; + const cudaGraphNode_t *dependencies; + const cudaGraphEdgeData *dependencyData; + size_t numDependencies; + enum cudaStreamCaptureMode mode; +} cudaStreamBeginCaptureToGraph_ptsz_v12030_params; + +typedef struct cudaThreadExchangeStreamCaptureMode_v10010_params_st { + enum cudaStreamCaptureMode *mode; +} cudaThreadExchangeStreamCaptureMode_v10010_params; + +typedef struct cudaStreamEndCapture_ptsz_v10000_params_st { + cudaStream_t stream; + cudaGraph_t *pGraph; +} cudaStreamEndCapture_ptsz_v10000_params; + +typedef struct cudaStreamIsCapturing_ptsz_v10000_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *pCaptureStatus; +} cudaStreamIsCapturing_ptsz_v10000_params; + +typedef struct cudaStreamGetCaptureInfo_v2_ptsz_v11030_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; + cudaGraph_t *graph_out; + const cudaGraphNode_t **dependencies_out; + size_t *numDependencies_out; +} cudaStreamGetCaptureInfo_v2_ptsz_v11030_params; + +typedef struct cudaStreamGetCaptureInfo_v3_ptsz_v12030_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; + cudaGraph_t *graph_out; + const cudaGraphNode_t **dependencies_out; + const cudaGraphEdgeData **edgeData_out; + size_t *numDependencies_out; +} cudaStreamGetCaptureInfo_v3_ptsz_v12030_params; + +typedef struct cudaStreamUpdateCaptureDependencies_ptsz_v11030_params_st { + cudaStream_t stream; + cudaGraphNode_t *dependencies; + size_t numDependencies; + unsigned int flags; +} cudaStreamUpdateCaptureDependencies_ptsz_v11030_params; + +typedef struct cudaStreamUpdateCaptureDependencies_v2_ptsz_v12030_params_st { + cudaStream_t stream; + cudaGraphNode_t *dependencies; + const cudaGraphEdgeData *dependencyData; + size_t numDependencies; + unsigned int flags; +} cudaStreamUpdateCaptureDependencies_v2_ptsz_v12030_params; + +typedef struct cudaEventCreate_v3020_params_st { + cudaEvent_t *event; +} cudaEventCreate_v3020_params; + +typedef struct cudaEventCreateWithFlags_v3020_params_st { + cudaEvent_t *event; + unsigned int flags; +} cudaEventCreateWithFlags_v3020_params; + +typedef struct cudaEventRecord_ptsz_v7000_params_st { + cudaEvent_t event; + cudaStream_t stream; +} cudaEventRecord_ptsz_v7000_params; + +typedef struct cudaEventRecordWithFlags_ptsz_v11010_params_st { + cudaEvent_t event; + cudaStream_t stream; + unsigned int flags; +} cudaEventRecordWithFlags_ptsz_v11010_params; + +typedef struct cudaEventQuery_v3020_params_st { + cudaEvent_t event; +} cudaEventQuery_v3020_params; + +typedef struct cudaEventSynchronize_v3020_params_st { + cudaEvent_t event; +} cudaEventSynchronize_v3020_params; + +typedef struct cudaEventDestroy_v3020_params_st { + cudaEvent_t event; +} cudaEventDestroy_v3020_params; + +typedef struct cudaEventElapsedTime_v3020_params_st { + float *ms; + cudaEvent_t start; + cudaEvent_t end; +} cudaEventElapsedTime_v3020_params; + +typedef struct cudaImportExternalMemory_v10000_params_st { + cudaExternalMemory_t *extMem_out; + const struct cudaExternalMemoryHandleDesc *memHandleDesc; +} cudaImportExternalMemory_v10000_params; + +typedef struct cudaExternalMemoryGetMappedBuffer_v10000_params_st { + void **devPtr; + cudaExternalMemory_t extMem; + const struct cudaExternalMemoryBufferDesc *bufferDesc; +} cudaExternalMemoryGetMappedBuffer_v10000_params; + +typedef struct cudaExternalMemoryGetMappedMipmappedArray_v10000_params_st { + cudaMipmappedArray_t *mipmap; + cudaExternalMemory_t extMem; + const struct cudaExternalMemoryMipmappedArrayDesc *mipmapDesc; +} cudaExternalMemoryGetMappedMipmappedArray_v10000_params; + +typedef struct cudaDestroyExternalMemory_v10000_params_st { + cudaExternalMemory_t extMem; +} cudaDestroyExternalMemory_v10000_params; + +typedef struct cudaImportExternalSemaphore_v10000_params_st { + cudaExternalSemaphore_t *extSem_out; + const struct cudaExternalSemaphoreHandleDesc *semHandleDesc; +} cudaImportExternalSemaphore_v10000_params; + +typedef struct cudaSignalExternalSemaphoresAsync_v2_ptsz_v11020_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreSignalParams *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaSignalExternalSemaphoresAsync_v2_ptsz_v11020_params; + +typedef struct cudaWaitExternalSemaphoresAsync_v2_ptsz_v11020_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreWaitParams *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaWaitExternalSemaphoresAsync_v2_ptsz_v11020_params; + +typedef struct cudaDestroyExternalSemaphore_v10000_params_st { + cudaExternalSemaphore_t extSem; +} cudaDestroyExternalSemaphore_v10000_params; + +typedef struct cudaLaunchKernel_ptsz_v7000_params_st { + const void *func; + dim3 gridDim; + dim3 blockDim; + void **args; + size_t sharedMem; + cudaStream_t stream; +} cudaLaunchKernel_ptsz_v7000_params; + +typedef struct cudaLaunchKernelExC_ptsz_v11060_params_st { + const cudaLaunchConfig_t *config; + const void *func; + void **args; +} cudaLaunchKernelExC_ptsz_v11060_params; + +typedef struct cudaLaunchCooperativeKernel_ptsz_v9000_params_st { + const void *func; + dim3 gridDim; + dim3 blockDim; + void **args; + size_t sharedMem; + cudaStream_t stream; +} cudaLaunchCooperativeKernel_ptsz_v9000_params; + +typedef struct cudaLaunchCooperativeKernelMultiDevice_v9000_params_st { + struct cudaLaunchParams *launchParamsList; + unsigned int numDevices; + unsigned int flags; +} cudaLaunchCooperativeKernelMultiDevice_v9000_params; + +typedef struct cudaFuncSetCacheConfig_v3020_params_st { + const void *func; + enum cudaFuncCache cacheConfig; +} cudaFuncSetCacheConfig_v3020_params; + +typedef struct cudaFuncGetAttributes_v3020_params_st { + struct cudaFuncAttributes *attr; + const void *func; +} cudaFuncGetAttributes_v3020_params; + +typedef struct cudaFuncSetAttribute_v9000_params_st { + const void *func; + enum cudaFuncAttribute attr; + int value; +} cudaFuncSetAttribute_v9000_params; + +typedef struct cudaFuncGetName_v12030_params_st { + const char **name; + const void *func; +} cudaFuncGetName_v12030_params; + +typedef struct cudaFuncGetParamInfo_v12040_params_st { + const void *func; + size_t paramIndex; + size_t *paramOffset; + size_t *paramSize; +} cudaFuncGetParamInfo_v12040_params; + +typedef struct cudaLaunchHostFunc_ptsz_v10000_params_st { + cudaStream_t stream; + cudaHostFn_t fn; + void *userData; +} cudaLaunchHostFunc_ptsz_v10000_params; + +typedef struct cudaFuncSetSharedMemConfig_v4020_params_st { + const void *func; + enum cudaSharedMemConfig config; +} cudaFuncSetSharedMemConfig_v4020_params; + +typedef struct cudaOccupancyMaxActiveBlocksPerMultiprocessor_v6050_params_st { + int *numBlocks; + const void *func; + int blockSize; + size_t dynamicSMemSize; +} cudaOccupancyMaxActiveBlocksPerMultiprocessor_v6050_params; + +typedef struct cudaOccupancyAvailableDynamicSMemPerBlock_v10200_params_st { + size_t *dynamicSmemSize; + const void *func; + int numBlocks; + int blockSize; +} cudaOccupancyAvailableDynamicSMemPerBlock_v10200_params; + +typedef struct cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_v7000_params_st { + int *numBlocks; + const void *func; + int blockSize; + size_t dynamicSMemSize; + unsigned int flags; +} cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_v7000_params; + +typedef struct cudaOccupancyMaxPotentialClusterSize_v11070_params_st { + int *clusterSize; + const void *func; + const cudaLaunchConfig_t *launchConfig; +} cudaOccupancyMaxPotentialClusterSize_v11070_params; + +typedef struct cudaOccupancyMaxActiveClusters_v11070_params_st { + int *numClusters; + const void *func; + const cudaLaunchConfig_t *launchConfig; +} cudaOccupancyMaxActiveClusters_v11070_params; + +typedef struct cudaMallocManaged_v6000_params_st { + void **devPtr; + size_t size; + unsigned int flags; +} cudaMallocManaged_v6000_params; + +typedef struct cudaMalloc_v3020_params_st { + void **devPtr; + size_t size; +} cudaMalloc_v3020_params; + +typedef struct cudaMallocHost_v3020_params_st { + void **ptr; + size_t size; +} cudaMallocHost_v3020_params; + +typedef struct cudaMallocPitch_v3020_params_st { + void **devPtr; + size_t *pitch; + size_t width; + size_t height; +} cudaMallocPitch_v3020_params; + +typedef struct cudaMallocArray_v3020_params_st { + cudaArray_t *array; + const struct cudaChannelFormatDesc *desc; + size_t width; + size_t height; + unsigned int flags; +} cudaMallocArray_v3020_params; + +typedef struct cudaFree_v3020_params_st { + void *devPtr; +} cudaFree_v3020_params; + +typedef struct cudaFreeHost_v3020_params_st { + void *ptr; +} cudaFreeHost_v3020_params; + +typedef struct cudaFreeArray_v3020_params_st { + cudaArray_t array; +} cudaFreeArray_v3020_params; + +typedef struct cudaFreeMipmappedArray_v5000_params_st { + cudaMipmappedArray_t mipmappedArray; +} cudaFreeMipmappedArray_v5000_params; + +typedef struct cudaHostAlloc_v3020_params_st { + void **pHost; + size_t size; + unsigned int flags; +} cudaHostAlloc_v3020_params; + +typedef struct cudaHostRegister_v4000_params_st { + void *ptr; + size_t size; + unsigned int flags; +} cudaHostRegister_v4000_params; + +typedef struct cudaHostUnregister_v4000_params_st { + void *ptr; +} cudaHostUnregister_v4000_params; + +typedef struct cudaHostGetDevicePointer_v3020_params_st { + void **pDevice; + void *pHost; + unsigned int flags; +} cudaHostGetDevicePointer_v3020_params; + +typedef struct cudaHostGetFlags_v3020_params_st { + unsigned int *pFlags; + void *pHost; +} cudaHostGetFlags_v3020_params; + +typedef struct cudaMalloc3D_v3020_params_st { + struct cudaPitchedPtr *pitchedDevPtr; + struct cudaExtent extent; +} cudaMalloc3D_v3020_params; + +typedef struct cudaMalloc3DArray_v3020_params_st { + cudaArray_t *array; + const struct cudaChannelFormatDesc *desc; + struct cudaExtent extent; + unsigned int flags; +} cudaMalloc3DArray_v3020_params; + +typedef struct cudaMallocMipmappedArray_v5000_params_st { + cudaMipmappedArray_t *mipmappedArray; + const struct cudaChannelFormatDesc *desc; + struct cudaExtent extent; + unsigned int numLevels; + unsigned int flags; +} cudaMallocMipmappedArray_v5000_params; + +typedef struct cudaGetMipmappedArrayLevel_v5000_params_st { + cudaArray_t *levelArray; + cudaMipmappedArray_const_t mipmappedArray; + unsigned int level; +} cudaGetMipmappedArrayLevel_v5000_params; + +typedef struct cudaMemcpy3D_ptds_v7000_params_st { + const struct cudaMemcpy3DParms *p; +} cudaMemcpy3D_ptds_v7000_params; + +typedef struct cudaMemcpy3DPeer_ptds_v7000_params_st { + const struct cudaMemcpy3DPeerParms *p; +} cudaMemcpy3DPeer_ptds_v7000_params; + +typedef struct cudaMemcpy3DAsync_ptsz_v7000_params_st { + const struct cudaMemcpy3DParms *p; + cudaStream_t stream; +} cudaMemcpy3DAsync_ptsz_v7000_params; + +typedef struct cudaMemcpy3DPeerAsync_ptsz_v7000_params_st { + const struct cudaMemcpy3DPeerParms *p; + cudaStream_t stream; +} cudaMemcpy3DPeerAsync_ptsz_v7000_params; + +typedef struct cudaMemGetInfo_v3020_params_st { + size_t *free; + size_t *total; +} cudaMemGetInfo_v3020_params; + +typedef struct cudaArrayGetInfo_v4010_params_st { + struct cudaChannelFormatDesc *desc; + struct cudaExtent *extent; + unsigned int *flags; + cudaArray_t array; +} cudaArrayGetInfo_v4010_params; + +typedef struct cudaArrayGetPlane_v11020_params_st { + cudaArray_t *pPlaneArray; + cudaArray_t hArray; + unsigned int planeIdx; +} cudaArrayGetPlane_v11020_params; + +typedef struct cudaArrayGetMemoryRequirements_v11060_params_st { + struct cudaArrayMemoryRequirements *memoryRequirements; + cudaArray_t array; + int device; +} cudaArrayGetMemoryRequirements_v11060_params; + +typedef struct cudaMipmappedArrayGetMemoryRequirements_v11060_params_st { + struct cudaArrayMemoryRequirements *memoryRequirements; + cudaMipmappedArray_t mipmap; + int device; +} cudaMipmappedArrayGetMemoryRequirements_v11060_params; + +typedef struct cudaArrayGetSparseProperties_v11010_params_st { + struct cudaArraySparseProperties *sparseProperties; + cudaArray_t array; +} cudaArrayGetSparseProperties_v11010_params; + +typedef struct cudaMipmappedArrayGetSparseProperties_v11010_params_st { + struct cudaArraySparseProperties *sparseProperties; + cudaMipmappedArray_t mipmap; +} cudaMipmappedArrayGetSparseProperties_v11010_params; + +typedef struct cudaMemcpy_ptds_v7000_params_st { + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpy_ptds_v7000_params; + +typedef struct cudaMemcpyPeer_v4000_params_st { + void *dst; + int dstDevice; + const void *src; + int srcDevice; + size_t count; +} cudaMemcpyPeer_v4000_params; + +typedef struct cudaMemcpy2D_ptds_v7000_params_st { + void *dst; + size_t dpitch; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2D_ptds_v7000_params; + +typedef struct cudaMemcpy2DToArray_ptds_v7000_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DToArray_ptds_v7000_params; + +typedef struct cudaMemcpy2DFromArray_ptds_v7000_params_st { + void *dst; + size_t dpitch; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DFromArray_ptds_v7000_params; + +typedef struct cudaMemcpy2DArrayToArray_ptds_v7000_params_st { + cudaArray_t dst; + size_t wOffsetDst; + size_t hOffsetDst; + cudaArray_const_t src; + size_t wOffsetSrc; + size_t hOffsetSrc; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DArrayToArray_ptds_v7000_params; + +typedef struct cudaMemcpyToSymbol_ptds_v7000_params_st { + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaMemcpyToSymbol_ptds_v7000_params; + +typedef struct cudaMemcpyFromSymbol_ptds_v7000_params_st { + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaMemcpyFromSymbol_ptds_v7000_params; + +typedef struct cudaMemcpyAsync_ptsz_v7000_params_st { + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyAsync_ptsz_v7000_params; + +typedef struct cudaMemcpyPeerAsync_v4000_params_st { + void *dst; + int dstDevice; + const void *src; + int srcDevice; + size_t count; + cudaStream_t stream; +} cudaMemcpyPeerAsync_v4000_params; + +typedef struct cudaMemcpy2DAsync_ptsz_v7000_params_st { + void *dst; + size_t dpitch; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DAsync_ptsz_v7000_params; + +typedef struct cudaMemcpy2DToArrayAsync_ptsz_v7000_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DToArrayAsync_ptsz_v7000_params; + +typedef struct cudaMemcpy2DFromArrayAsync_ptsz_v7000_params_st { + void *dst; + size_t dpitch; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DFromArrayAsync_ptsz_v7000_params; + +typedef struct cudaMemcpyToSymbolAsync_ptsz_v7000_params_st { + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyToSymbolAsync_ptsz_v7000_params; + +typedef struct cudaMemcpyFromSymbolAsync_ptsz_v7000_params_st { + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyFromSymbolAsync_ptsz_v7000_params; + +typedef struct cudaMemset_ptds_v7000_params_st { + void *devPtr; + int value; + size_t count; +} cudaMemset_ptds_v7000_params; + +typedef struct cudaMemset2D_ptds_v7000_params_st { + void *devPtr; + size_t pitch; + int value; + size_t width; + size_t height; +} cudaMemset2D_ptds_v7000_params; + +typedef struct cudaMemset3D_ptds_v7000_params_st { + struct cudaPitchedPtr pitchedDevPtr; + int value; + struct cudaExtent extent; +} cudaMemset3D_ptds_v7000_params; + +typedef struct cudaMemsetAsync_ptsz_v7000_params_st { + void *devPtr; + int value; + size_t count; + cudaStream_t stream; +} cudaMemsetAsync_ptsz_v7000_params; + +typedef struct cudaMemset2DAsync_ptsz_v7000_params_st { + void *devPtr; + size_t pitch; + int value; + size_t width; + size_t height; + cudaStream_t stream; +} cudaMemset2DAsync_ptsz_v7000_params; + +typedef struct cudaMemset3DAsync_ptsz_v7000_params_st { + struct cudaPitchedPtr pitchedDevPtr; + int value; + struct cudaExtent extent; + cudaStream_t stream; +} cudaMemset3DAsync_ptsz_v7000_params; + +typedef struct cudaGetSymbolAddress_v3020_params_st { + void **devPtr; + const void *symbol; +} cudaGetSymbolAddress_v3020_params; + +typedef struct cudaGetSymbolSize_v3020_params_st { + size_t *size; + const void *symbol; +} cudaGetSymbolSize_v3020_params; + +typedef struct cudaMemPrefetchAsync_ptsz_v8000_params_st { + const void *devPtr; + size_t count; + int dstDevice; + cudaStream_t stream; +} cudaMemPrefetchAsync_ptsz_v8000_params; + +typedef struct cudaMemPrefetchAsync_v2_ptsz_v12020_params_st { + const void *devPtr; + size_t count; + struct cudaMemLocation location; + unsigned int flags; + cudaStream_t stream; +} cudaMemPrefetchAsync_v2_ptsz_v12020_params; + +typedef struct cudaMemAdvise_v8000_params_st { + const void *devPtr; + size_t count; + enum cudaMemoryAdvise advice; + int device; +} cudaMemAdvise_v8000_params; + +typedef struct cudaMemAdvise_v2_v12020_params_st { + const void *devPtr; + size_t count; + enum cudaMemoryAdvise advice; + struct cudaMemLocation location; +} cudaMemAdvise_v2_v12020_params; + +typedef struct cudaMemRangeGetAttribute_v8000_params_st { + void *data; + size_t dataSize; + enum cudaMemRangeAttribute attribute; + const void *devPtr; + size_t count; +} cudaMemRangeGetAttribute_v8000_params; + +typedef struct cudaMemRangeGetAttributes_v8000_params_st { + void **data; + size_t *dataSizes; + enum cudaMemRangeAttribute *attributes; + size_t numAttributes; + const void *devPtr; + size_t count; +} cudaMemRangeGetAttributes_v8000_params; + +typedef struct cudaMemcpyToArray_ptds_v7000_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyToArray_ptds_v7000_params; + +typedef struct cudaMemcpyFromArray_ptds_v7000_params_st { + void *dst; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyFromArray_ptds_v7000_params; + +typedef struct cudaMemcpyArrayToArray_ptds_v7000_params_st { + cudaArray_t dst; + size_t wOffsetDst; + size_t hOffsetDst; + cudaArray_const_t src; + size_t wOffsetSrc; + size_t hOffsetSrc; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyArrayToArray_ptds_v7000_params; + +typedef struct cudaMemcpyToArrayAsync_ptsz_v7000_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyToArrayAsync_ptsz_v7000_params; + +typedef struct cudaMemcpyFromArrayAsync_ptsz_v7000_params_st { + void *dst; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyFromArrayAsync_ptsz_v7000_params; + +typedef struct cudaMallocAsync_ptsz_v11020_params_st { + void **devPtr; + size_t size; + cudaStream_t hStream; +} cudaMallocAsync_ptsz_v11020_params; + +typedef struct cudaFreeAsync_ptsz_v11020_params_st { + void *devPtr; + cudaStream_t hStream; +} cudaFreeAsync_ptsz_v11020_params; + +typedef struct cudaMemPoolTrimTo_v11020_params_st { + cudaMemPool_t memPool; + size_t minBytesToKeep; +} cudaMemPoolTrimTo_v11020_params; + +typedef struct cudaMemPoolSetAttribute_v11020_params_st { + cudaMemPool_t memPool; + enum cudaMemPoolAttr attr; + void *value; +} cudaMemPoolSetAttribute_v11020_params; + +typedef struct cudaMemPoolGetAttribute_v11020_params_st { + cudaMemPool_t memPool; + enum cudaMemPoolAttr attr; + void *value; +} cudaMemPoolGetAttribute_v11020_params; + +typedef struct cudaMemPoolSetAccess_v11020_params_st { + cudaMemPool_t memPool; + const struct cudaMemAccessDesc *descList; + size_t count; +} cudaMemPoolSetAccess_v11020_params; + +typedef struct cudaMemPoolGetAccess_v11020_params_st { + enum cudaMemAccessFlags *flags; + cudaMemPool_t memPool; + struct cudaMemLocation *location; +} cudaMemPoolGetAccess_v11020_params; + +typedef struct cudaMemPoolCreate_v11020_params_st { + cudaMemPool_t *memPool; + const struct cudaMemPoolProps *poolProps; +} cudaMemPoolCreate_v11020_params; + +typedef struct cudaMemPoolDestroy_v11020_params_st { + cudaMemPool_t memPool; +} cudaMemPoolDestroy_v11020_params; + +typedef struct cudaMallocFromPoolAsync_ptsz_v11020_params_st { + void **ptr; + size_t size; + cudaMemPool_t memPool; + cudaStream_t stream; +} cudaMallocFromPoolAsync_ptsz_v11020_params; + +typedef struct cudaMemPoolExportToShareableHandle_v11020_params_st { + void *shareableHandle; + cudaMemPool_t memPool; + enum cudaMemAllocationHandleType handleType; + unsigned int flags; +} cudaMemPoolExportToShareableHandle_v11020_params; + +typedef struct cudaMemPoolImportFromShareableHandle_v11020_params_st { + cudaMemPool_t *memPool; + void *shareableHandle; + enum cudaMemAllocationHandleType handleType; + unsigned int flags; +} cudaMemPoolImportFromShareableHandle_v11020_params; + +typedef struct cudaMemPoolExportPointer_v11020_params_st { + struct cudaMemPoolPtrExportData *exportData; + void *ptr; +} cudaMemPoolExportPointer_v11020_params; + +typedef struct cudaMemPoolImportPointer_v11020_params_st { + void **ptr; + cudaMemPool_t memPool; + struct cudaMemPoolPtrExportData *exportData; +} cudaMemPoolImportPointer_v11020_params; + +typedef struct cudaPointerGetAttributes_v4000_params_st { + struct cudaPointerAttributes *attributes; + const void *ptr; +} cudaPointerGetAttributes_v4000_params; + +typedef struct cudaDeviceCanAccessPeer_v4000_params_st { + int *canAccessPeer; + int device; + int peerDevice; +} cudaDeviceCanAccessPeer_v4000_params; + +typedef struct cudaDeviceEnablePeerAccess_v4000_params_st { + int peerDevice; + unsigned int flags; +} cudaDeviceEnablePeerAccess_v4000_params; + +typedef struct cudaDeviceDisablePeerAccess_v4000_params_st { + int peerDevice; +} cudaDeviceDisablePeerAccess_v4000_params; + +typedef struct cudaGraphicsUnregisterResource_v3020_params_st { + cudaGraphicsResource_t resource; +} cudaGraphicsUnregisterResource_v3020_params; + +typedef struct cudaGraphicsResourceSetMapFlags_v3020_params_st { + cudaGraphicsResource_t resource; + unsigned int flags; +} cudaGraphicsResourceSetMapFlags_v3020_params; + +typedef struct cudaGraphicsMapResources_v3020_params_st { + int count; + cudaGraphicsResource_t *resources; + cudaStream_t stream; +} cudaGraphicsMapResources_v3020_params; + +typedef struct cudaGraphicsUnmapResources_v3020_params_st { + int count; + cudaGraphicsResource_t *resources; + cudaStream_t stream; +} cudaGraphicsUnmapResources_v3020_params; + +typedef struct cudaGraphicsResourceGetMappedPointer_v3020_params_st { + void **devPtr; + size_t *size; + cudaGraphicsResource_t resource; +} cudaGraphicsResourceGetMappedPointer_v3020_params; + +typedef struct cudaGraphicsSubResourceGetMappedArray_v3020_params_st { + cudaArray_t *array; + cudaGraphicsResource_t resource; + unsigned int arrayIndex; + unsigned int mipLevel; +} cudaGraphicsSubResourceGetMappedArray_v3020_params; + +typedef struct cudaGraphicsResourceGetMappedMipmappedArray_v5000_params_st { + cudaMipmappedArray_t *mipmappedArray; + cudaGraphicsResource_t resource; +} cudaGraphicsResourceGetMappedMipmappedArray_v5000_params; + +typedef struct cudaGetChannelDesc_v3020_params_st { + struct cudaChannelFormatDesc *desc; + cudaArray_const_t array; +} cudaGetChannelDesc_v3020_params; + +typedef struct cudaCreateChannelDesc_v3020_params_st { + int x; + int y; + int z; + int w; + enum cudaChannelFormatKind f; +} cudaCreateChannelDesc_v3020_params; + +typedef struct cudaCreateTextureObject_v5000_params_st { + cudaTextureObject_t *pTexObject; + const struct cudaResourceDesc *pResDesc; + const struct cudaTextureDesc *pTexDesc; + const struct cudaResourceViewDesc *pResViewDesc; +} cudaCreateTextureObject_v5000_params; + +typedef struct cudaDestroyTextureObject_v5000_params_st { + cudaTextureObject_t texObject; +} cudaDestroyTextureObject_v5000_params; + +typedef struct cudaGetTextureObjectResourceDesc_v5000_params_st { + struct cudaResourceDesc *pResDesc; + cudaTextureObject_t texObject; +} cudaGetTextureObjectResourceDesc_v5000_params; + +typedef struct cudaGetTextureObjectTextureDesc_v5000_params_st { + struct cudaTextureDesc *pTexDesc; + cudaTextureObject_t texObject; +} cudaGetTextureObjectTextureDesc_v5000_params; + +typedef struct cudaGetTextureObjectResourceViewDesc_v5000_params_st { + struct cudaResourceViewDesc *pResViewDesc; + cudaTextureObject_t texObject; +} cudaGetTextureObjectResourceViewDesc_v5000_params; + +typedef struct cudaCreateSurfaceObject_v5000_params_st { + cudaSurfaceObject_t *pSurfObject; + const struct cudaResourceDesc *pResDesc; +} cudaCreateSurfaceObject_v5000_params; + +typedef struct cudaDestroySurfaceObject_v5000_params_st { + cudaSurfaceObject_t surfObject; +} cudaDestroySurfaceObject_v5000_params; + +typedef struct cudaGetSurfaceObjectResourceDesc_v5000_params_st { + struct cudaResourceDesc *pResDesc; + cudaSurfaceObject_t surfObject; +} cudaGetSurfaceObjectResourceDesc_v5000_params; + +typedef struct cudaDriverGetVersion_v3020_params_st { + int *driverVersion; +} cudaDriverGetVersion_v3020_params; + +typedef struct cudaRuntimeGetVersion_v3020_params_st { + int *runtimeVersion; +} cudaRuntimeGetVersion_v3020_params; + +typedef struct cudaGraphCreate_v10000_params_st { + cudaGraph_t *pGraph; + unsigned int flags; +} cudaGraphCreate_v10000_params; + +typedef struct cudaGraphAddKernelNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaKernelNodeParams *pNodeParams; +} cudaGraphAddKernelNode_v10000_params; + +typedef struct cudaGraphKernelNodeGetParams_v10000_params_st { + cudaGraphNode_t node; + struct cudaKernelNodeParams *pNodeParams; +} cudaGraphKernelNodeGetParams_v10000_params; + +typedef struct cudaGraphKernelNodeSetParams_v10000_params_st { + cudaGraphNode_t node; + const struct cudaKernelNodeParams *pNodeParams; +} cudaGraphKernelNodeSetParams_v10000_params; + +typedef struct cudaGraphKernelNodeCopyAttributes_v11000_params_st { + cudaGraphNode_t hSrc; + cudaGraphNode_t hDst; +} cudaGraphKernelNodeCopyAttributes_v11000_params; + +typedef struct cudaGraphKernelNodeGetAttribute_v11000_params_st { + cudaGraphNode_t hNode; + cudaKernelNodeAttrID attr; + cudaKernelNodeAttrValue *value_out; +} cudaGraphKernelNodeGetAttribute_v11000_params; + +typedef struct cudaGraphKernelNodeSetAttribute_v11000_params_st { + cudaGraphNode_t hNode; + cudaKernelNodeAttrID attr; + const cudaKernelNodeAttrValue *value; +} cudaGraphKernelNodeSetAttribute_v11000_params; + +typedef struct cudaGraphAddMemcpyNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaMemcpy3DParms *pCopyParams; +} cudaGraphAddMemcpyNode_v10000_params; + +typedef struct cudaGraphAddMemcpyNodeToSymbol_v11010_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphAddMemcpyNodeToSymbol_v11010_params; + +typedef struct cudaGraphAddMemcpyNodeFromSymbol_v11010_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphAddMemcpyNodeFromSymbol_v11010_params; + +typedef struct cudaGraphAddMemcpyNode1D_v11010_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaGraphAddMemcpyNode1D_v11010_params; + +typedef struct cudaGraphMemcpyNodeGetParams_v10000_params_st { + cudaGraphNode_t node; + struct cudaMemcpy3DParms *pNodeParams; +} cudaGraphMemcpyNodeGetParams_v10000_params; + +typedef struct cudaGraphMemcpyNodeSetParams_v10000_params_st { + cudaGraphNode_t node; + const struct cudaMemcpy3DParms *pNodeParams; +} cudaGraphMemcpyNodeSetParams_v10000_params; + +typedef struct cudaGraphMemcpyNodeSetParamsToSymbol_v11010_params_st { + cudaGraphNode_t node; + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphMemcpyNodeSetParamsToSymbol_v11010_params; + +typedef struct cudaGraphMemcpyNodeSetParamsFromSymbol_v11010_params_st { + cudaGraphNode_t node; + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphMemcpyNodeSetParamsFromSymbol_v11010_params; + +typedef struct cudaGraphMemcpyNodeSetParams1D_v11010_params_st { + cudaGraphNode_t node; + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaGraphMemcpyNodeSetParams1D_v11010_params; + +typedef struct cudaGraphAddMemsetNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaMemsetParams *pMemsetParams; +} cudaGraphAddMemsetNode_v10000_params; + +typedef struct cudaGraphMemsetNodeGetParams_v10000_params_st { + cudaGraphNode_t node; + struct cudaMemsetParams *pNodeParams; +} cudaGraphMemsetNodeGetParams_v10000_params; + +typedef struct cudaGraphMemsetNodeSetParams_v10000_params_st { + cudaGraphNode_t node; + const struct cudaMemsetParams *pNodeParams; +} cudaGraphMemsetNodeSetParams_v10000_params; + +typedef struct cudaGraphAddHostNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaHostNodeParams *pNodeParams; +} cudaGraphAddHostNode_v10000_params; + +typedef struct cudaGraphHostNodeGetParams_v10000_params_st { + cudaGraphNode_t node; + struct cudaHostNodeParams *pNodeParams; +} cudaGraphHostNodeGetParams_v10000_params; + +typedef struct cudaGraphHostNodeSetParams_v10000_params_st { + cudaGraphNode_t node; + const struct cudaHostNodeParams *pNodeParams; +} cudaGraphHostNodeSetParams_v10000_params; + +typedef struct cudaGraphAddChildGraphNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + cudaGraph_t childGraph; +} cudaGraphAddChildGraphNode_v10000_params; + +typedef struct cudaGraphChildGraphNodeGetGraph_v10000_params_st { + cudaGraphNode_t node; + cudaGraph_t *pGraph; +} cudaGraphChildGraphNodeGetGraph_v10000_params; + +typedef struct cudaGraphAddEmptyNode_v10000_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; +} cudaGraphAddEmptyNode_v10000_params; + +typedef struct cudaGraphAddEventRecordNode_v11010_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + cudaEvent_t event; +} cudaGraphAddEventRecordNode_v11010_params; + +typedef struct cudaGraphEventRecordNodeGetEvent_v11010_params_st { + cudaGraphNode_t node; + cudaEvent_t *event_out; +} cudaGraphEventRecordNodeGetEvent_v11010_params; + +typedef struct cudaGraphEventRecordNodeSetEvent_v11010_params_st { + cudaGraphNode_t node; + cudaEvent_t event; +} cudaGraphEventRecordNodeSetEvent_v11010_params; + +typedef struct cudaGraphAddEventWaitNode_v11010_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + cudaEvent_t event; +} cudaGraphAddEventWaitNode_v11010_params; + +typedef struct cudaGraphEventWaitNodeGetEvent_v11010_params_st { + cudaGraphNode_t node; + cudaEvent_t *event_out; +} cudaGraphEventWaitNodeGetEvent_v11010_params; + +typedef struct cudaGraphEventWaitNodeSetEvent_v11010_params_st { + cudaGraphNode_t node; + cudaEvent_t event; +} cudaGraphEventWaitNodeSetEvent_v11010_params; + +typedef struct cudaGraphAddExternalSemaphoresSignalNode_v11020_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaExternalSemaphoreSignalNodeParams *nodeParams; +} cudaGraphAddExternalSemaphoresSignalNode_v11020_params; + +typedef struct cudaGraphExternalSemaphoresSignalNodeGetParams_v11020_params_st { + cudaGraphNode_t hNode; + struct cudaExternalSemaphoreSignalNodeParams *params_out; +} cudaGraphExternalSemaphoresSignalNodeGetParams_v11020_params; + +typedef struct cudaGraphExternalSemaphoresSignalNodeSetParams_v11020_params_st { + cudaGraphNode_t hNode; + const struct cudaExternalSemaphoreSignalNodeParams *nodeParams; +} cudaGraphExternalSemaphoresSignalNodeSetParams_v11020_params; + +typedef struct cudaGraphAddExternalSemaphoresWaitNode_v11020_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + const struct cudaExternalSemaphoreWaitNodeParams *nodeParams; +} cudaGraphAddExternalSemaphoresWaitNode_v11020_params; + +typedef struct cudaGraphExternalSemaphoresWaitNodeGetParams_v11020_params_st { + cudaGraphNode_t hNode; + struct cudaExternalSemaphoreWaitNodeParams *params_out; +} cudaGraphExternalSemaphoresWaitNodeGetParams_v11020_params; + +typedef struct cudaGraphExternalSemaphoresWaitNodeSetParams_v11020_params_st { + cudaGraphNode_t hNode; + const struct cudaExternalSemaphoreWaitNodeParams *nodeParams; +} cudaGraphExternalSemaphoresWaitNodeSetParams_v11020_params; + +typedef struct cudaGraphAddMemAllocNode_v11040_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + struct cudaMemAllocNodeParams *nodeParams; +} cudaGraphAddMemAllocNode_v11040_params; + +typedef struct cudaGraphMemAllocNodeGetParams_v11040_params_st { + cudaGraphNode_t node; + struct cudaMemAllocNodeParams *params_out; +} cudaGraphMemAllocNodeGetParams_v11040_params; + +typedef struct cudaGraphAddMemFreeNode_v11040_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + void *dptr; +} cudaGraphAddMemFreeNode_v11040_params; + +typedef struct cudaGraphMemFreeNodeGetParams_v11040_params_st { + cudaGraphNode_t node; + void *dptr_out; +} cudaGraphMemFreeNodeGetParams_v11040_params; + +typedef struct cudaDeviceGraphMemTrim_v11040_params_st { + int device; +} cudaDeviceGraphMemTrim_v11040_params; + +typedef struct cudaDeviceGetGraphMemAttribute_v11040_params_st { + int device; + enum cudaGraphMemAttributeType attr; + void *value; +} cudaDeviceGetGraphMemAttribute_v11040_params; + +typedef struct cudaDeviceSetGraphMemAttribute_v11040_params_st { + int device; + enum cudaGraphMemAttributeType attr; + void *value; +} cudaDeviceSetGraphMemAttribute_v11040_params; + +typedef struct cudaGraphClone_v10000_params_st { + cudaGraph_t *pGraphClone; + cudaGraph_t originalGraph; +} cudaGraphClone_v10000_params; + +typedef struct cudaGraphNodeFindInClone_v10000_params_st { + cudaGraphNode_t *pNode; + cudaGraphNode_t originalNode; + cudaGraph_t clonedGraph; +} cudaGraphNodeFindInClone_v10000_params; + +typedef struct cudaGraphNodeGetType_v10000_params_st { + cudaGraphNode_t node; + enum cudaGraphNodeType *pType; +} cudaGraphNodeGetType_v10000_params; + +typedef struct cudaGraphGetNodes_v10000_params_st { + cudaGraph_t graph; + cudaGraphNode_t *nodes; + size_t *numNodes; +} cudaGraphGetNodes_v10000_params; + +typedef struct cudaGraphGetRootNodes_v10000_params_st { + cudaGraph_t graph; + cudaGraphNode_t *pRootNodes; + size_t *pNumRootNodes; +} cudaGraphGetRootNodes_v10000_params; + +typedef struct cudaGraphGetEdges_v10000_params_st { + cudaGraph_t graph; + cudaGraphNode_t *from; + cudaGraphNode_t *to; + size_t *numEdges; +} cudaGraphGetEdges_v10000_params; + +typedef struct cudaGraphGetEdges_v2_v12030_params_st { + cudaGraph_t graph; + cudaGraphNode_t *from; + cudaGraphNode_t *to; + cudaGraphEdgeData *edgeData; + size_t *numEdges; +} cudaGraphGetEdges_v2_v12030_params; + +typedef struct cudaGraphNodeGetDependencies_v10000_params_st { + cudaGraphNode_t node; + cudaGraphNode_t *pDependencies; + size_t *pNumDependencies; +} cudaGraphNodeGetDependencies_v10000_params; + +typedef struct cudaGraphNodeGetDependencies_v2_v12030_params_st { + cudaGraphNode_t node; + cudaGraphNode_t *pDependencies; + cudaGraphEdgeData *edgeData; + size_t *pNumDependencies; +} cudaGraphNodeGetDependencies_v2_v12030_params; + +typedef struct cudaGraphNodeGetDependentNodes_v10000_params_st { + cudaGraphNode_t node; + cudaGraphNode_t *pDependentNodes; + size_t *pNumDependentNodes; +} cudaGraphNodeGetDependentNodes_v10000_params; + +typedef struct cudaGraphNodeGetDependentNodes_v2_v12030_params_st { + cudaGraphNode_t node; + cudaGraphNode_t *pDependentNodes; + cudaGraphEdgeData *edgeData; + size_t *pNumDependentNodes; +} cudaGraphNodeGetDependentNodes_v2_v12030_params; + +typedef struct cudaGraphAddDependencies_v10000_params_st { + cudaGraph_t graph; + const cudaGraphNode_t *from; + const cudaGraphNode_t *to; + size_t numDependencies; +} cudaGraphAddDependencies_v10000_params; + +typedef struct cudaGraphAddDependencies_v2_v12030_params_st { + cudaGraph_t graph; + const cudaGraphNode_t *from; + const cudaGraphNode_t *to; + const cudaGraphEdgeData *edgeData; + size_t numDependencies; +} cudaGraphAddDependencies_v2_v12030_params; + +typedef struct cudaGraphRemoveDependencies_v10000_params_st { + cudaGraph_t graph; + const cudaGraphNode_t *from; + const cudaGraphNode_t *to; + size_t numDependencies; +} cudaGraphRemoveDependencies_v10000_params; + +typedef struct cudaGraphRemoveDependencies_v2_v12030_params_st { + cudaGraph_t graph; + const cudaGraphNode_t *from; + const cudaGraphNode_t *to; + const cudaGraphEdgeData *edgeData; + size_t numDependencies; +} cudaGraphRemoveDependencies_v2_v12030_params; + +typedef struct cudaGraphDestroyNode_v10000_params_st { + cudaGraphNode_t node; +} cudaGraphDestroyNode_v10000_params; + +typedef struct cudaGraphInstantiate_v12000_params_st { + cudaGraphExec_t *pGraphExec; + cudaGraph_t graph; + unsigned long long flags; +} cudaGraphInstantiate_v12000_params; + +typedef struct cudaGraphInstantiateWithFlags_v11040_params_st { + cudaGraphExec_t *pGraphExec; + cudaGraph_t graph; + unsigned long long flags; +} cudaGraphInstantiateWithFlags_v11040_params; + +typedef struct cudaGraphInstantiateWithParams_ptsz_v12000_params_st { + cudaGraphExec_t *pGraphExec; + cudaGraph_t graph; + cudaGraphInstantiateParams *instantiateParams; +} cudaGraphInstantiateWithParams_ptsz_v12000_params; + +typedef struct cudaGraphExecGetFlags_v12000_params_st { + cudaGraphExec_t graphExec; + unsigned long long *flags; +} cudaGraphExecGetFlags_v12000_params; + +typedef struct cudaGraphExecKernelNodeSetParams_v10010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + const struct cudaKernelNodeParams *pNodeParams; +} cudaGraphExecKernelNodeSetParams_v10010_params; + +typedef struct cudaGraphExecMemcpyNodeSetParams_v10020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + const struct cudaMemcpy3DParms *pNodeParams; +} cudaGraphExecMemcpyNodeSetParams_v10020_params; + +typedef struct cudaGraphExecMemcpyNodeSetParamsToSymbol_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphExecMemcpyNodeSetParamsToSymbol_v11010_params; + +typedef struct cudaGraphExecMemcpyNodeSetParamsFromSymbol_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaGraphExecMemcpyNodeSetParamsFromSymbol_v11010_params; + +typedef struct cudaGraphExecMemcpyNodeSetParams1D_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaGraphExecMemcpyNodeSetParams1D_v11010_params; + +typedef struct cudaGraphExecMemsetNodeSetParams_v10020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + const struct cudaMemsetParams *pNodeParams; +} cudaGraphExecMemsetNodeSetParams_v10020_params; + +typedef struct cudaGraphExecHostNodeSetParams_v10020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + const struct cudaHostNodeParams *pNodeParams; +} cudaGraphExecHostNodeSetParams_v10020_params; + +typedef struct cudaGraphExecChildGraphNodeSetParams_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t node; + cudaGraph_t childGraph; +} cudaGraphExecChildGraphNodeSetParams_v11010_params; + +typedef struct cudaGraphExecEventRecordNodeSetEvent_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + cudaEvent_t event; +} cudaGraphExecEventRecordNodeSetEvent_v11010_params; + +typedef struct cudaGraphExecEventWaitNodeSetEvent_v11010_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + cudaEvent_t event; +} cudaGraphExecEventWaitNodeSetEvent_v11010_params; + +typedef struct cudaGraphExecExternalSemaphoresSignalNodeSetParams_v11020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + const struct cudaExternalSemaphoreSignalNodeParams *nodeParams; +} cudaGraphExecExternalSemaphoresSignalNodeSetParams_v11020_params; + +typedef struct cudaGraphExecExternalSemaphoresWaitNodeSetParams_v11020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + const struct cudaExternalSemaphoreWaitNodeParams *nodeParams; +} cudaGraphExecExternalSemaphoresWaitNodeSetParams_v11020_params; + +typedef struct cudaGraphNodeSetEnabled_v11060_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + unsigned int isEnabled; +} cudaGraphNodeSetEnabled_v11060_params; + +typedef struct cudaGraphNodeGetEnabled_v11060_params_st { + cudaGraphExec_t hGraphExec; + cudaGraphNode_t hNode; + unsigned int *isEnabled; +} cudaGraphNodeGetEnabled_v11060_params; + +typedef struct cudaGraphExecUpdate_v10020_params_st { + cudaGraphExec_t hGraphExec; + cudaGraph_t hGraph; + cudaGraphExecUpdateResultInfo *resultInfo; +} cudaGraphExecUpdate_v10020_params; + +typedef struct cudaGraphUpload_ptsz_v10000_params_st { + cudaGraphExec_t graphExec; + cudaStream_t stream; +} cudaGraphUpload_ptsz_v10000_params; + +typedef struct cudaGraphLaunch_ptsz_v10000_params_st { + cudaGraphExec_t graphExec; + cudaStream_t stream; +} cudaGraphLaunch_ptsz_v10000_params; + +typedef struct cudaGraphExecDestroy_v10000_params_st { + cudaGraphExec_t graphExec; +} cudaGraphExecDestroy_v10000_params; + +typedef struct cudaGraphDestroy_v10000_params_st { + cudaGraph_t graph; +} cudaGraphDestroy_v10000_params; + +typedef struct cudaGraphDebugDotPrint_v11030_params_st { + cudaGraph_t graph; + const char *path; + unsigned int flags; +} cudaGraphDebugDotPrint_v11030_params; + +typedef struct cudaUserObjectCreate_v11030_params_st { + cudaUserObject_t *object_out; + void *ptr; + cudaHostFn_t destroy; + unsigned int initialRefcount; + unsigned int flags; +} cudaUserObjectCreate_v11030_params; + +typedef struct cudaUserObjectRetain_v11030_params_st { + cudaUserObject_t object; + unsigned int count; +} cudaUserObjectRetain_v11030_params; + +typedef struct cudaUserObjectRelease_v11030_params_st { + cudaUserObject_t object; + unsigned int count; +} cudaUserObjectRelease_v11030_params; + +typedef struct cudaGraphRetainUserObject_v11030_params_st { + cudaGraph_t graph; + cudaUserObject_t object; + unsigned int count; + unsigned int flags; +} cudaGraphRetainUserObject_v11030_params; + +typedef struct cudaGraphReleaseUserObject_v11030_params_st { + cudaGraph_t graph; + cudaUserObject_t object; + unsigned int count; +} cudaGraphReleaseUserObject_v11030_params; + +typedef struct cudaGraphAddNode_v12020_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + size_t numDependencies; + struct cudaGraphNodeParams *nodeParams; +} cudaGraphAddNode_v12020_params; + +typedef struct cudaGraphAddNode_v2_v12030_params_st { + cudaGraphNode_t *pGraphNode; + cudaGraph_t graph; + const cudaGraphNode_t *pDependencies; + const cudaGraphEdgeData *dependencyData; + size_t numDependencies; + struct cudaGraphNodeParams *nodeParams; +} cudaGraphAddNode_v2_v12030_params; + +typedef struct cudaGraphNodeSetParams_v12020_params_st { + cudaGraphNode_t node; + struct cudaGraphNodeParams *nodeParams; +} cudaGraphNodeSetParams_v12020_params; + +typedef struct cudaGraphExecNodeSetParams_v12020_params_st { + cudaGraphExec_t graphExec; + cudaGraphNode_t node; + struct cudaGraphNodeParams *nodeParams; +} cudaGraphExecNodeSetParams_v12020_params; + +typedef struct cudaGraphConditionalHandleCreate_v12030_params_st { + cudaGraphConditionalHandle *pHandle_out; + cudaGraph_t graph; + unsigned int defaultLaunchValue; + unsigned int flags; +} cudaGraphConditionalHandleCreate_v12030_params; + +typedef struct cudaGetDriverEntryPoint_ptsz_v11030_params_st { + const char *symbol; + void **funcPtr; + unsigned long long flags; + enum cudaDriverEntryPointQueryResult *driverStatus; +} cudaGetDriverEntryPoint_ptsz_v11030_params; + +typedef struct cudaGetDriverEntryPointByVersion_ptsz_v12050_params_st { + const char *symbol; + void **funcPtr; + unsigned int cudaVersion; + unsigned long long flags; + enum cudaDriverEntryPointQueryResult *driverStatus; +} cudaGetDriverEntryPointByVersion_ptsz_v12050_params; + +typedef struct cudaGetFuncBySymbol_v11000_params_st { + cudaFunction_t *functionPtr; + const void *symbolPtr; +} cudaGetFuncBySymbol_v11000_params; + +typedef struct cudaGetKernel_v12000_params_st { + cudaKernel_t *kernelPtr; + const void *entryFuncAddr; +} cudaGetKernel_v12000_params; + +typedef struct cudaMemcpy_v3020_params_st { + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpy_v3020_params; + +typedef struct cudaMemcpyToSymbol_v3020_params_st { + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaMemcpyToSymbol_v3020_params; + +typedef struct cudaMemcpyFromSymbol_v3020_params_st { + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; +} cudaMemcpyFromSymbol_v3020_params; + +typedef struct cudaMemcpy2D_v3020_params_st { + void *dst; + size_t dpitch; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2D_v3020_params; + +typedef struct cudaMemcpyToArray_v3020_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyToArray_v3020_params; + +typedef struct cudaMemcpy2DToArray_v3020_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DToArray_v3020_params; + +typedef struct cudaMemcpyFromArray_v3020_params_st { + void *dst; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyFromArray_v3020_params; + +typedef struct cudaMemcpy2DFromArray_v3020_params_st { + void *dst; + size_t dpitch; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DFromArray_v3020_params; + +typedef struct cudaMemcpyArrayToArray_v3020_params_st { + cudaArray_t dst; + size_t wOffsetDst; + size_t hOffsetDst; + cudaArray_const_t src; + size_t wOffsetSrc; + size_t hOffsetSrc; + size_t count; + enum cudaMemcpyKind kind; +} cudaMemcpyArrayToArray_v3020_params; + +typedef struct cudaMemcpy2DArrayToArray_v3020_params_st { + cudaArray_t dst; + size_t wOffsetDst; + size_t hOffsetDst; + cudaArray_const_t src; + size_t wOffsetSrc; + size_t hOffsetSrc; + size_t width; + size_t height; + enum cudaMemcpyKind kind; +} cudaMemcpy2DArrayToArray_v3020_params; + +typedef struct cudaMemcpy3D_v3020_params_st { + const struct cudaMemcpy3DParms *p; +} cudaMemcpy3D_v3020_params; + +typedef struct cudaMemcpy3DPeer_v4000_params_st { + const struct cudaMemcpy3DPeerParms *p; +} cudaMemcpy3DPeer_v4000_params; + +typedef struct cudaMemset_v3020_params_st { + void *devPtr; + int value; + size_t count; +} cudaMemset_v3020_params; + +typedef struct cudaMemset2D_v3020_params_st { + void *devPtr; + size_t pitch; + int value; + size_t width; + size_t height; +} cudaMemset2D_v3020_params; + +typedef struct cudaMemset3D_v3020_params_st { + struct cudaPitchedPtr pitchedDevPtr; + int value; + struct cudaExtent extent; +} cudaMemset3D_v3020_params; + +typedef struct cudaMemcpyAsync_v3020_params_st { + void *dst; + const void *src; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyAsync_v3020_params; + +typedef struct cudaMemcpyToSymbolAsync_v3020_params_st { + const void *symbol; + const void *src; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyToSymbolAsync_v3020_params; + +typedef struct cudaMemcpyFromSymbolAsync_v3020_params_st { + void *dst; + const void *symbol; + size_t count; + size_t offset; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyFromSymbolAsync_v3020_params; + +typedef struct cudaMemcpy2DAsync_v3020_params_st { + void *dst; + size_t dpitch; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DAsync_v3020_params; + +typedef struct cudaMemcpyToArrayAsync_v3020_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyToArrayAsync_v3020_params; + +typedef struct cudaMemcpy2DToArrayAsync_v3020_params_st { + cudaArray_t dst; + size_t wOffset; + size_t hOffset; + const void *src; + size_t spitch; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DToArrayAsync_v3020_params; + +typedef struct cudaMemcpyFromArrayAsync_v3020_params_st { + void *dst; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t count; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpyFromArrayAsync_v3020_params; + +typedef struct cudaMemcpy2DFromArrayAsync_v3020_params_st { + void *dst; + size_t dpitch; + cudaArray_const_t src; + size_t wOffset; + size_t hOffset; + size_t width; + size_t height; + enum cudaMemcpyKind kind; + cudaStream_t stream; +} cudaMemcpy2DFromArrayAsync_v3020_params; + +typedef struct cudaMemcpy3DAsync_v3020_params_st { + const struct cudaMemcpy3DParms *p; + cudaStream_t stream; +} cudaMemcpy3DAsync_v3020_params; + +typedef struct cudaMemcpy3DPeerAsync_v4000_params_st { + const struct cudaMemcpy3DPeerParms *p; + cudaStream_t stream; +} cudaMemcpy3DPeerAsync_v4000_params; + +typedef struct cudaMemsetAsync_v3020_params_st { + void *devPtr; + int value; + size_t count; + cudaStream_t stream; +} cudaMemsetAsync_v3020_params; + +typedef struct cudaMemset2DAsync_v3020_params_st { + void *devPtr; + size_t pitch; + int value; + size_t width; + size_t height; + cudaStream_t stream; +} cudaMemset2DAsync_v3020_params; + +typedef struct cudaMemset3DAsync_v3020_params_st { + struct cudaPitchedPtr pitchedDevPtr; + int value; + struct cudaExtent extent; + cudaStream_t stream; +} cudaMemset3DAsync_v3020_params; + +typedef struct cudaStreamQuery_v3020_params_st { + cudaStream_t stream; +} cudaStreamQuery_v3020_params; + +typedef struct cudaStreamGetFlags_v5050_params_st { + cudaStream_t hStream; + unsigned int *flags; +} cudaStreamGetFlags_v5050_params; + +typedef struct cudaStreamGetId_v12000_params_st { + cudaStream_t hStream; + unsigned long long *streamId; +} cudaStreamGetId_v12000_params; + +typedef struct cudaStreamGetPriority_v5050_params_st { + cudaStream_t hStream; + int *priority; +} cudaStreamGetPriority_v5050_params; + +typedef struct cudaEventRecord_v3020_params_st { + cudaEvent_t event; + cudaStream_t stream; +} cudaEventRecord_v3020_params; + +typedef struct cudaEventRecordWithFlags_v11010_params_st { + cudaEvent_t event; + cudaStream_t stream; + unsigned int flags; +} cudaEventRecordWithFlags_v11010_params; + +typedef struct cudaStreamWaitEvent_v3020_params_st { + cudaStream_t stream; + cudaEvent_t event; + unsigned int flags; +} cudaStreamWaitEvent_v3020_params; + +typedef struct cudaStreamAddCallback_v5000_params_st { + cudaStream_t stream; + cudaStreamCallback_t callback; + void *userData; + unsigned int flags; +} cudaStreamAddCallback_v5000_params; + +typedef struct cudaStreamAttachMemAsync_v6000_params_st { + cudaStream_t stream; + void *devPtr; + size_t length; + unsigned int flags; +} cudaStreamAttachMemAsync_v6000_params; + +typedef struct cudaStreamSynchronize_v3020_params_st { + cudaStream_t stream; +} cudaStreamSynchronize_v3020_params; + +typedef struct cudaLaunchKernel_v7000_params_st { + const void *func; + dim3 gridDim; + dim3 blockDim; + void **args; + size_t sharedMem; + cudaStream_t stream; +} cudaLaunchKernel_v7000_params; + +typedef struct cudaLaunchKernelExC_v11060_params_st { + const cudaLaunchConfig_t *config; + const void *func; + void **args; +} cudaLaunchKernelExC_v11060_params; + +typedef struct cudaLaunchCooperativeKernel_v9000_params_st { + const void *func; + dim3 gridDim; + dim3 blockDim; + void **args; + size_t sharedMem; + cudaStream_t stream; +} cudaLaunchCooperativeKernel_v9000_params; + +typedef struct cudaLaunchHostFunc_v10000_params_st { + cudaStream_t stream; + cudaHostFn_t fn; + void *userData; +} cudaLaunchHostFunc_v10000_params; + +typedef struct cudaMemPrefetchAsync_v8000_params_st { + const void *devPtr; + size_t count; + int dstDevice; + cudaStream_t stream; +} cudaMemPrefetchAsync_v8000_params; + +typedef struct cudaMemPrefetchAsync_v2_v12020_params_st { + const void *devPtr; + size_t count; + struct cudaMemLocation location; + unsigned int flags; + cudaStream_t stream; +} cudaMemPrefetchAsync_v2_v12020_params; + +typedef struct cudaSignalExternalSemaphoresAsync_v10000_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreSignalParams_v1 *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaSignalExternalSemaphoresAsync_v10000_params; + +typedef struct cudaSignalExternalSemaphoresAsync_ptsz_v10000_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreSignalParams_v1 *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaSignalExternalSemaphoresAsync_ptsz_v10000_params; + +typedef struct cudaSignalExternalSemaphoresAsync_v2_v11020_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreSignalParams *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaSignalExternalSemaphoresAsync_v2_v11020_params; + +typedef struct cudaWaitExternalSemaphoresAsync_v10000_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreWaitParams_v1 *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaWaitExternalSemaphoresAsync_v10000_params; + +typedef struct cudaWaitExternalSemaphoresAsync_ptsz_v10000_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreWaitParams_v1 *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaWaitExternalSemaphoresAsync_ptsz_v10000_params; + +typedef struct cudaWaitExternalSemaphoresAsync_v2_v11020_params_st { + const cudaExternalSemaphore_t *extSemArray; + const struct cudaExternalSemaphoreWaitParams *paramsArray; + unsigned int numExtSems; + cudaStream_t stream; +} cudaWaitExternalSemaphoresAsync_v2_v11020_params; + +typedef struct cudaGraphInstantiateWithParams_v12000_params_st { + cudaGraphExec_t *pGraphExec; + cudaGraph_t graph; + cudaGraphInstantiateParams *instantiateParams; +} cudaGraphInstantiateWithParams_v12000_params; + +typedef struct cudaGraphUpload_v10000_params_st { + cudaGraphExec_t graphExec; + cudaStream_t stream; +} cudaGraphUpload_v10000_params; + +typedef struct cudaGraphLaunch_v10000_params_st { + cudaGraphExec_t graphExec; + cudaStream_t stream; +} cudaGraphLaunch_v10000_params; + +typedef struct cudaStreamBeginCapture_v10000_params_st { + cudaStream_t stream; + enum cudaStreamCaptureMode mode; +} cudaStreamBeginCapture_v10000_params; + +typedef struct cudaStreamBeginCaptureToGraph_v12030_params_st { + cudaStream_t stream; + cudaGraph_t graph; + const cudaGraphNode_t *dependencies; + const cudaGraphEdgeData *dependencyData; + size_t numDependencies; + enum cudaStreamCaptureMode mode; +} cudaStreamBeginCaptureToGraph_v12030_params; + +typedef struct cudaStreamEndCapture_v10000_params_st { + cudaStream_t stream; + cudaGraph_t *pGraph; +} cudaStreamEndCapture_v10000_params; + +typedef struct cudaStreamIsCapturing_v10000_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *pCaptureStatus; +} cudaStreamIsCapturing_v10000_params; + +typedef struct cudaStreamGetCaptureInfo_v10010_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; +} cudaStreamGetCaptureInfo_v10010_params; + +typedef struct cudaStreamGetCaptureInfo_ptsz_v10010_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; +} cudaStreamGetCaptureInfo_ptsz_v10010_params; + +typedef struct cudaStreamGetCaptureInfo_v2_v11030_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; + cudaGraph_t *graph_out; + const cudaGraphNode_t **dependencies_out; + size_t *numDependencies_out; +} cudaStreamGetCaptureInfo_v2_v11030_params; + +typedef struct cudaStreamGetCaptureInfo_v3_v12030_params_st { + cudaStream_t stream; + enum cudaStreamCaptureStatus *captureStatus_out; + unsigned long long *id_out; + cudaGraph_t *graph_out; + const cudaGraphNode_t **dependencies_out; + const cudaGraphEdgeData **edgeData_out; + size_t *numDependencies_out; +} cudaStreamGetCaptureInfo_v3_v12030_params; + +typedef struct cudaStreamUpdateCaptureDependencies_v11030_params_st { + cudaStream_t stream; + cudaGraphNode_t *dependencies; + size_t numDependencies; + unsigned int flags; +} cudaStreamUpdateCaptureDependencies_v11030_params; + +typedef struct cudaStreamUpdateCaptureDependencies_v2_v12030_params_st { + cudaStream_t stream; + cudaGraphNode_t *dependencies; + const cudaGraphEdgeData *dependencyData; + size_t numDependencies; + unsigned int flags; +} cudaStreamUpdateCaptureDependencies_v2_v12030_params; + +typedef struct cudaStreamCopyAttributes_v11000_params_st { + cudaStream_t dstStream; + cudaStream_t srcStream; +} cudaStreamCopyAttributes_v11000_params; + +typedef struct cudaStreamGetAttribute_v11000_params_st { + cudaStream_t stream; + cudaStreamAttrID attr; + cudaStreamAttrValue *value; +} cudaStreamGetAttribute_v11000_params; + +typedef struct cudaStreamSetAttribute_v11000_params_st { + cudaStream_t stream; + cudaStreamAttrID attr; + const cudaStreamAttrValue *param; +} cudaStreamSetAttribute_v11000_params; + +typedef struct cudaMallocAsync_v11020_params_st { + void **devPtr; + size_t size; + cudaStream_t hStream; +} cudaMallocAsync_v11020_params; + +typedef struct cudaFreeAsync_v11020_params_st { + void *devPtr; + cudaStream_t hStream; +} cudaFreeAsync_v11020_params; + +typedef struct cudaMallocFromPoolAsync_v11020_params_st { + void **ptr; + size_t size; + cudaMemPool_t memPool; + cudaStream_t stream; +} cudaMallocFromPoolAsync_v11020_params; + +typedef struct cudaGetDriverEntryPoint_v11030_params_st { + const char *symbol; + void **funcPtr; + unsigned long long flags; + enum cudaDriverEntryPointQueryResult *driverStatus; +} cudaGetDriverEntryPoint_v11030_params; + +typedef struct cudaGetDriverEntryPointByVersion_v12050_params_st { + const char *symbol; + void **funcPtr; + unsigned int cudaVersion; + unsigned long long flags; + enum cudaDriverEntryPointQueryResult *driverStatus; +} cudaGetDriverEntryPointByVersion_v12050_params; + +typedef struct cudaGetDeviceProperties_v3020_params_st { + struct cudaDeviceProp *prop; + int device; +} cudaGetDeviceProperties_v3020_params; + +// Parameter trace structures for removed functions + + +// End of parameter trace structures diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_vdpau_interop_meta.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_vdpau_interop_meta.h new file mode 100644 index 0000000000000000000000000000000000000000..88e79d1957925c4bbacd381e9461d5072de88f24 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cuda_vdpau_interop_meta.h @@ -0,0 +1,38 @@ +// This file is generated. Any changes you make will be lost during the next clean build. + +// CUDA public interface, for type definitions and api function prototypes +#include "cuda_vdpau_interop.h" + +// ************************************************************************* +// Definitions of structs to hold parameters for each function +// ************************************************************************* + +// Currently used parameter trace structures +typedef struct cudaVDPAUGetDevice_v3020_params_st { + int *device; + VdpDevice vdpDevice; + VdpGetProcAddress *vdpGetProcAddress; +} cudaVDPAUGetDevice_v3020_params; + +typedef struct cudaVDPAUSetVDPAUDevice_v3020_params_st { + int device; + VdpDevice vdpDevice; + VdpGetProcAddress *vdpGetProcAddress; +} cudaVDPAUSetVDPAUDevice_v3020_params; + +typedef struct cudaGraphicsVDPAURegisterVideoSurface_v3020_params_st { + struct cudaGraphicsResource **resource; + VdpVideoSurface vdpSurface; + unsigned int flags; +} cudaGraphicsVDPAURegisterVideoSurface_v3020_params; + +typedef struct cudaGraphicsVDPAURegisterOutputSurface_v3020_params_st { + struct cudaGraphicsResource **resource; + VdpOutputSurface vdpSurface; + unsigned int flags; +} cudaGraphicsVDPAURegisterOutputSurface_v3020_params; + +// Parameter trace structures for removed functions + + +// End of parameter trace structures diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cudart_removed_meta.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cudart_removed_meta.h new file mode 100644 index 0000000000000000000000000000000000000000..a0fc27a71bb3fc883db9fe7562eea3f28145430d --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_cudart_removed_meta.h @@ -0,0 +1,162 @@ +// This file is generated. Any changes you make will be lost during the next clean build. + +// CUDA public interface, for type definitions and api function prototypes +#include "cudart_removed.h" + +// ************************************************************************* +// Definitions of structs to hold parameters for each function +// ************************************************************************* + +// Currently used parameter trace structures +typedef struct cudaStreamDestroy_v3020_params_st { + cudaStream_t stream; +} cudaStreamDestroy_v3020_params; + +typedef struct cudaOccupancyMaxActiveBlocksPerMultiprocessor_v6000_params_st { + int *numBlocks; + const void *func; + size_t numDynamicSmemBytes; +} cudaOccupancyMaxActiveBlocksPerMultiprocessor_v6000_params; + +typedef struct cudaConfigureCall_v3020_params_st { + dim3 gridDim; + dim3 blockDim; + size_t sharedMem __dv; + cudaStream_t stream __dv; +} cudaConfigureCall_v3020_params; + +typedef struct cudaSetupArgument_v3020_params_st { + const void *arg; + size_t size; + size_t offset; +} cudaSetupArgument_v3020_params; + +typedef struct cudaLaunch_v3020_params_st { + const void *func; +} cudaLaunch_v3020_params; + +typedef struct cudaLaunch_ptsz_v7000_params_st { + const void *func; +} cudaLaunch_ptsz_v7000_params; + +typedef struct cudaStreamSetFlags_v10200_params_st { + cudaStream_t hStream; + unsigned int flags; +} cudaStreamSetFlags_v10200_params; + +typedef struct cudaStreamSetFlags_ptsz_v10200_params_st { + cudaStream_t hStream; + unsigned int flags; +} cudaStreamSetFlags_ptsz_v10200_params; + +typedef struct cudaProfilerInitialize_v4000_params_st { + const char *configFile; + const char *outputFile; + cudaOutputMode_t outputMode; +} cudaProfilerInitialize_v4000_params; + +typedef struct cudaThreadSetLimit_v3020_params_st { + enum cudaLimit limit; + size_t value; +} cudaThreadSetLimit_v3020_params; + +typedef struct cudaThreadGetLimit_v3020_params_st { + size_t *pValue; + enum cudaLimit limit; +} cudaThreadGetLimit_v3020_params; + +typedef struct cudaThreadGetCacheConfig_v3020_params_st { + enum cudaFuncCache *pCacheConfig; +} cudaThreadGetCacheConfig_v3020_params; + +typedef struct cudaThreadSetCacheConfig_v3020_params_st { + enum cudaFuncCache cacheConfig; +} cudaThreadSetCacheConfig_v3020_params; + +typedef struct cudaSetDoubleForDevice_v3020_params_st { + double *d; +} cudaSetDoubleForDevice_v3020_params; + +typedef struct cudaSetDoubleForHost_v3020_params_st { + double *d; +} cudaSetDoubleForHost_v3020_params; + +typedef struct cudaCreateTextureObject_v2_v11080_params_st { + cudaTextureObject_t *pTexObject; + const struct cudaResourceDesc *pResDesc; + const struct cudaTextureDesc *pTexDesc; + const struct cudaResourceViewDesc *pResViewDesc; +} cudaCreateTextureObject_v2_v11080_params; + +typedef struct cudaGetTextureObjectTextureDesc_v2_v11080_params_st { + struct cudaTextureDesc *pTexDesc; + cudaTextureObject_t texObject; +} cudaGetTextureObjectTextureDesc_v2_v11080_params; + +typedef struct cudaBindTexture_v3020_params_st { + size_t *offset; + const struct textureReference *texref; + const void *devPtr; + const struct cudaChannelFormatDesc *desc; + size_t size __dv; +} cudaBindTexture_v3020_params; + +typedef struct cudaBindTexture2D_v3020_params_st { + size_t *offset; + const struct textureReference *texref; + const void *devPtr; + const struct cudaChannelFormatDesc *desc; + size_t width; + size_t height; + size_t pitch; +} cudaBindTexture2D_v3020_params; + +typedef struct cudaBindTextureToArray_v3020_params_st { + const struct textureReference *texref; + cudaArray_const_t array; + const struct cudaChannelFormatDesc *desc; +} cudaBindTextureToArray_v3020_params; + +typedef struct cudaBindTextureToMipmappedArray_v5000_params_st { + const struct textureReference *texref; + cudaMipmappedArray_const_t mipmappedArray; + const struct cudaChannelFormatDesc *desc; +} cudaBindTextureToMipmappedArray_v5000_params; + +typedef struct cudaUnbindTexture_v3020_params_st { + const struct textureReference *texref; +} cudaUnbindTexture_v3020_params; + +typedef struct cudaGetTextureAlignmentOffset_v3020_params_st { + size_t *offset; + const struct textureReference *texref; +} cudaGetTextureAlignmentOffset_v3020_params; + +typedef struct cudaGetTextureReference_v3020_params_st { + const struct textureReference **texref; + const void *symbol; +} cudaGetTextureReference_v3020_params; + +typedef struct cudaBindSurfaceToArray_v3020_params_st { + const struct surfaceReference *surfref; + cudaArray_const_t array; + const struct cudaChannelFormatDesc *desc; +} cudaBindSurfaceToArray_v3020_params; + +typedef struct cudaGetSurfaceReference_v3020_params_st { + const struct surfaceReference **surfref; + const void *symbol; +} cudaGetSurfaceReference_v3020_params; + +typedef struct cudaGraphInstantiate_v10000_params_st { + cudaGraphExec_t *pGraphExec; + cudaGraph_t graph; + cudaGraphNode_t *pErrorNode; + char *pLogBuffer; + size_t bufferSize; +} cudaGraphInstantiate_v10000_params; + +// Parameter trace structures for removed functions + + +// End of parameter trace structures diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_nvtx_meta.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_nvtx_meta.h new file mode 100644 index 0000000000000000000000000000000000000000..ed8877e21f0651fe1564151090850694eb495cfb --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/generated_nvtx_meta.h @@ -0,0 +1,247 @@ +/* + * Copyright 2013-2018 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility push(default) +#endif + +// ************************************************************************* +// Definitions of structs to hold parameters for each function +// ************************************************************************* + +typedef struct nvtxMarkEx_params_st { + const nvtxEventAttributes_t* eventAttrib; +} nvtxMarkEx_params; + +typedef struct nvtxMarkA_params_st { + const char* message; +} nvtxMarkA_params; + +typedef struct nvtxMarkW_params_st { + const wchar_t* message; +} nvtxMarkW_params; + +typedef struct nvtxRangeStartEx_params_st { + const nvtxEventAttributes_t* eventAttrib; +} nvtxRangeStartEx_params; + +typedef struct nvtxRangeStartA_params_st { + const char* message; +} nvtxRangeStartA_params; + +typedef struct nvtxRangeStartW_params_st { + const wchar_t* message; +} nvtxRangeStartW_params; + +typedef struct nvtxRangeEnd_params_st { + nvtxRangeId_t id; +} nvtxRangeEnd_params; + +typedef struct nvtxRangePushEx_params_st { + const nvtxEventAttributes_t* eventAttrib; +} nvtxRangePushEx_params; + +typedef struct nvtxRangePushA_params_st { + const char* message; +} nvtxRangePushA_params; + +typedef struct nvtxRangePushW_params_st { + const wchar_t* message; +} nvtxRangePushW_params; + +typedef struct nvtxRangePop_params_st { + /* WAR: Windows compiler doesn't allow empty structs */ + /* This field shouldn't be used */ + void *dummy; +} nvtxRangePop_params; + +typedef struct nvtxNameCategoryA_params_st { + uint32_t category; + const char* name; +} nvtxNameCategoryA_params; + +typedef struct nvtxNameCategoryW_params_st { + uint32_t category; + const wchar_t* name; +} nvtxNameCategoryW_params; + +typedef struct nvtxNameOsThreadA_params_st { + uint32_t threadId; + const char* name; +} nvtxNameOsThreadA_params; + +typedef struct nvtxNameOsThreadW_params_st { + uint32_t threadId; + const wchar_t* name; +} nvtxNameOsThreadW_params; + +typedef struct nvtxNameCuDeviceA_params_st { + CUdevice device; + const char* name; +} nvtxNameCuDeviceA_params; + +typedef struct nvtxNameCuDeviceW_params_st { + CUdevice device; + const wchar_t* name; +} nvtxNameCuDeviceW_params; + +typedef struct nvtxNameCuContextA_params_st { + CUcontext context; + const char* name; +} nvtxNameCuContextA_params; + +typedef struct nvtxNameCuContextW_params_st { + CUcontext context; + const wchar_t* name; +} nvtxNameCuContextW_params; + +typedef struct nvtxNameCuStreamA_params_st { + CUstream stream; + const char* name; +} nvtxNameCuStreamA_params; + +typedef struct nvtxNameCuStreamW_params_st { + CUstream stream; + const wchar_t* name; +} nvtxNameCuStreamW_params; + +typedef struct nvtxNameCuEventA_params_st { + CUevent event; + const char* name; +} nvtxNameCuEventA_params; + +typedef struct nvtxNameCuEventW_params_st { + CUevent event; + const wchar_t* name; +} nvtxNameCuEventW_params; + +typedef struct nvtxNameCudaDeviceA_params_st { + int device; + const char* name; +} nvtxNameCudaDeviceA_params; + +typedef struct nvtxNameCudaDeviceW_params_st { + int device; + const wchar_t* name; +} nvtxNameCudaDeviceW_params; + +typedef struct nvtxNameCudaStreamA_params_st { + cudaStream_t stream; + const char* name; +} nvtxNameCudaStreamA_params; + +typedef struct nvtxNameCudaStreamW_params_st { + cudaStream_t stream; + const wchar_t* name; +} nvtxNameCudaStreamW_params; + +typedef struct nvtxNameCudaEventA_params_st { + cudaEvent_t event; + const char* name; +} nvtxNameCudaEventA_params; + +typedef struct nvtxNameCudaEventW_params_st { + cudaEvent_t event; + const wchar_t* name; +} nvtxNameCudaEventW_params; + +typedef struct nvtxDomainCreateA_params_st { + const char* name; +} nvtxDomainCreateA_params; + +typedef struct nvtxDomainDestroy_params_st { + nvtxDomainHandle_t domain; +} nvtxDomainDestroy_params; + +typedef struct nvtxDomainMarkEx_params_st { + nvtxDomainHandle_t domain; + nvtxMarkEx_params core; +} nvtxDomainMarkEx_params; + +typedef struct nvtxDomainRangeStartEx_params_st { + nvtxDomainHandle_t domain; + nvtxRangeStartEx_params core; +} nvtxDomainRangeStartEx_params; + +typedef struct nvtxDomainRangeEnd_params_st { + nvtxDomainHandle_t domain; + nvtxRangeEnd_params core; +} nvtxDomainRangeEnd_params; + +typedef struct nvtxDomainRangePushEx_params_st { + nvtxDomainHandle_t domain; + nvtxRangePushEx_params core; +} nvtxDomainRangePushEx_params; + +typedef struct nvtxDomainRangePop_params_st { + nvtxDomainHandle_t domain; +} nvtxDomainRangePop_params; + +typedef struct nvtxSyncUserCreate_params_st { + nvtxDomainHandle_t domain; + const nvtxSyncUserAttributes_t* attribs; +} nvtxSyncUserCreate_params; + +typedef struct nvtxSyncUserCommon_params_st { + nvtxSyncUser_t handle; +} nvtxSyncUserCommon_params; + +typedef struct nvtxDomainRegisterStringA_params_st { + nvtxDomainHandle_t domain; + const char* string; +} nvtxDomainRegisterStringA_params; + +typedef struct nvtxDomainRegisterStringW_params_st { + nvtxDomainHandle_t domain; + const char* string; +} nvtxDomainRegisterStringW_params; + +#if defined(__GNUC__) && defined(CUPTI_LIB) + #pragma GCC visibility pop +#endif diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_common.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_common.h new file mode 100644 index 0000000000000000000000000000000000000000..0ed01f7bc2851f43678e58efe34fc5579cca3a35 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_common.h @@ -0,0 +1,393 @@ +#ifndef NVPERF_COMMON_H +#define NVPERF_COMMON_H + +/* + * Copyright 2014-2024 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO USER: + * + * This source code is subject to NVIDIA ownership rights under U.S. and + * international Copyright laws. + * + * This software and the information contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions + * of a form of NVIDIA software license agreement. + * + * NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE + * CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR + * IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, + * OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS + * OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE + * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE + * OR PERFORMANCE OF THIS SOURCE CODE. + * + * U.S. Government End Users. This source code is a "commercial item" as + * that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of + * "commercial computer software" and "commercial computer software + * documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) + * and is provided to the U.S. Government only as a commercial end item. + * Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through + * 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the + * source code with only those rights set forth herein. + * + * Any use of this source code in individual and commercial software must + * include, in the user documentation and internal comments to the code, + * the above Disclaimer and U.S. Government End Users Notice. + */ + +#include +#include + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility push(default) + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL __attribute__ ((visibility ("hidden"))) + #endif +#else + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL + #endif +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @file nvperf_common.h + */ + +#ifndef NVPERF_NVPA_STATUS_DEFINED +#define NVPERF_NVPA_STATUS_DEFINED + + /// Error codes. + typedef enum NVPA_Status + { + /// Success + NVPA_STATUS_SUCCESS = 0, + /// Generic error. + NVPA_STATUS_ERROR = 1, + /// Internal error. Please file a bug! + NVPA_STATUS_INTERNAL_ERROR = 2, + /// NVPW_InitializeTarget() or NVPW_InitializeHost() has not been called yet. + NVPA_STATUS_NOT_INITIALIZED = 3, + /// The NvPerf DLL/DSO could not be loaded during NVPW_Initialize*(). Please ensure they are placed in the + /// appropriate location that can be founder by a dynamic linker. And on Linux systems, confirm that the + /// LD_LIBRARY_PATH environment variable is set correctly. Alternatively, you may utilize + /// NVPW_SetLibraryLoadPaths() to define additional library search paths. + NVPA_STATUS_NOT_LOADED = 4, + /// The function was not found in this version of the NvPerf DLL/DSO. Or if you are directly calling + /// NVPA_GetProcAddress(), please ensure the function name is spelled correctly. + NVPA_STATUS_FUNCTION_NOT_FOUND = 5, + /// The request was intentionally not supported. + NVPA_STATUS_NOT_SUPPORTED = 6, + /// The request was not implemented by this version. + NVPA_STATUS_NOT_IMPLEMENTED = 7, + /// Invalid argument. + NVPA_STATUS_INVALID_ARGUMENT = 8, + /// UNUSED + NVPA_STATUS_INVALID_METRIC_ID = 9, + /// No driver has been loaded via NVPW_*_LoadDriver(). + NVPA_STATUS_DRIVER_NOT_LOADED = 10, + /// Failed memory allocation. + NVPA_STATUS_OUT_OF_MEMORY = 11, + /// UNUSED + NVPA_STATUS_INVALID_THREAD_STATE = 12, + /// UNUSED + NVPA_STATUS_FAILED_CONTEXT_ALLOC = 13, + /// The specified GPU is not supported. It is recommended to call IsGpuSupported() for more information + NVPA_STATUS_UNSUPPORTED_GPU = 14, + /// The installed NVIDIA driver is too old. + NVPA_STATUS_INSUFFICIENT_DRIVER_VERSION = 15, + /// UNUSED + NVPA_STATUS_OBJECT_NOT_REGISTERED = 16, + /// Profiling permission not granted; see https://developer.nvidia.com/nvidia-development-tools-solutions- + /// ERR_NVGPUCTRPERM-permission-issue-performance-counters + NVPA_STATUS_INSUFFICIENT_PRIVILEGE = 17, + /// UNUSED + NVPA_STATUS_INVALID_CONTEXT_STATE = 18, + /// UNUSED + NVPA_STATUS_INVALID_OBJECT_STATE = 19, + /// The request could not be fulfilled because a system resource is already in use. + NVPA_STATUS_RESOURCE_UNAVAILABLE = 20, + /// UNUSED + NVPA_STATUS_DRIVER_LOADED_TOO_LATE = 21, + /// The provided buffer is not large enough. + NVPA_STATUS_INSUFFICIENT_SPACE = 22, + /// UNUSED + NVPA_STATUS_OBJECT_MISMATCH = 23, + /// Virtualized GPU (vGPU) is not supported. + NVPA_STATUS_VIRTUALIZED_DEVICE_NOT_SUPPORTED = 24, + /// Profiling permission was not granted or the device was disabled. + NVPA_STATUS_PROFILING_NOT_ALLOWED = 25, + NVPA_STATUS__COUNT + } NVPA_Status; + + + inline void NVPW_NVPAStatusToString(NVPA_Status status, const char** ppStatusStr, const char** ppCommentStr) + { + switch (status) + { + case NVPA_STATUS_SUCCESS: + *ppStatusStr = "NVPA_STATUS_SUCCESS"; + *ppCommentStr = "Success"; + return; + case NVPA_STATUS_ERROR: + *ppStatusStr = "NVPA_STATUS_ERROR"; + *ppCommentStr = "Generic error."; + return; + case NVPA_STATUS_INTERNAL_ERROR: + *ppStatusStr = "NVPA_STATUS_INTERNAL_ERROR"; + *ppCommentStr = "Internal error. Please file a bug!"; + return; + case NVPA_STATUS_NOT_INITIALIZED: + *ppStatusStr = "NVPA_STATUS_NOT_INITIALIZED"; + *ppCommentStr = "NVPW_InitializeTarget() or NVPW_InitializeHost() has not been called yet."; + return; + case NVPA_STATUS_NOT_LOADED: + *ppStatusStr = "NVPA_STATUS_NOT_LOADED"; + *ppCommentStr = "The NvPerf DLL/DSO could not be loaded during NVPW_Initialize*(). Please ensure they are placed in the appropriate location that can be founder by a dynamic linker. And on Linux systems, confirm that the LD_LIBRARY_PATH environment variable is set correctly. Alternatively, you may utilize NVPW_SetLibraryLoadPaths() to define additional library search paths."; + return; + case NVPA_STATUS_FUNCTION_NOT_FOUND: + *ppStatusStr = "NVPA_STATUS_FUNCTION_NOT_FOUND"; + *ppCommentStr = "The function was not found in this version of the NvPerf DLL/DSO. Or if you are directly calling NVPA_GetProcAddress(), please ensure the function name is spelled correctly."; + return; + case NVPA_STATUS_NOT_SUPPORTED: + *ppStatusStr = "NVPA_STATUS_NOT_SUPPORTED"; + *ppCommentStr = "The request was intentionally not supported."; + return; + case NVPA_STATUS_NOT_IMPLEMENTED: + *ppStatusStr = "NVPA_STATUS_NOT_IMPLEMENTED"; + *ppCommentStr = "The request was not implemented by this version."; + return; + case NVPA_STATUS_INVALID_ARGUMENT: + *ppStatusStr = "NVPA_STATUS_INVALID_ARGUMENT"; + *ppCommentStr = "Invalid argument."; + return; + case NVPA_STATUS_INVALID_METRIC_ID: + *ppStatusStr = "NVPA_STATUS_INVALID_METRIC_ID"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_DRIVER_NOT_LOADED: + *ppStatusStr = "NVPA_STATUS_DRIVER_NOT_LOADED"; + *ppCommentStr = "No driver has been loaded via NVPW_*_LoadDriver()."; + return; + case NVPA_STATUS_OUT_OF_MEMORY: + *ppStatusStr = "NVPA_STATUS_OUT_OF_MEMORY"; + *ppCommentStr = "Failed memory allocation."; + return; + case NVPA_STATUS_INVALID_THREAD_STATE: + *ppStatusStr = "NVPA_STATUS_INVALID_THREAD_STATE"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_FAILED_CONTEXT_ALLOC: + *ppStatusStr = "NVPA_STATUS_FAILED_CONTEXT_ALLOC"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_UNSUPPORTED_GPU: + *ppStatusStr = "NVPA_STATUS_UNSUPPORTED_GPU"; + *ppCommentStr = "The specified GPU is not supported. It is recommended to call IsGpuSupported() for more information"; + return; + case NVPA_STATUS_INSUFFICIENT_DRIVER_VERSION: + *ppStatusStr = "NVPA_STATUS_INSUFFICIENT_DRIVER_VERSION"; + *ppCommentStr = "The installed NVIDIA driver is too old."; + return; + case NVPA_STATUS_OBJECT_NOT_REGISTERED: + *ppStatusStr = "NVPA_STATUS_OBJECT_NOT_REGISTERED"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_INSUFFICIENT_PRIVILEGE: + *ppStatusStr = "NVPA_STATUS_INSUFFICIENT_PRIVILEGE"; + *ppCommentStr = "Profiling permission not granted; see https://developer.nvidia.com/nvidia-development-tools-solutions-ERR_NVGPUCTRPERM-permission-issue-performance-counters"; + return; + case NVPA_STATUS_INVALID_CONTEXT_STATE: + *ppStatusStr = "NVPA_STATUS_INVALID_CONTEXT_STATE"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_INVALID_OBJECT_STATE: + *ppStatusStr = "NVPA_STATUS_INVALID_OBJECT_STATE"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_RESOURCE_UNAVAILABLE: + *ppStatusStr = "NVPA_STATUS_RESOURCE_UNAVAILABLE"; + *ppCommentStr = "The request could not be fulfilled because a system resource is already in use."; + return; + case NVPA_STATUS_DRIVER_LOADED_TOO_LATE: + *ppStatusStr = "NVPA_STATUS_DRIVER_LOADED_TOO_LATE"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_INSUFFICIENT_SPACE: + *ppStatusStr = "NVPA_STATUS_INSUFFICIENT_SPACE"; + *ppCommentStr = "The provided buffer is not large enough."; + return; + case NVPA_STATUS_OBJECT_MISMATCH: + *ppStatusStr = "NVPA_STATUS_OBJECT_MISMATCH"; + *ppCommentStr = "UNUSED"; + return; + case NVPA_STATUS_VIRTUALIZED_DEVICE_NOT_SUPPORTED: + *ppStatusStr = "NVPA_STATUS_VIRTUALIZED_DEVICE_NOT_SUPPORTED"; + *ppCommentStr = "Virtualized GPU (vGPU) is not supported."; + return; + case NVPA_STATUS_PROFILING_NOT_ALLOWED: + *ppStatusStr = "NVPA_STATUS_PROFILING_NOT_ALLOWED"; + *ppCommentStr = "Profiling permission was not granted or the device was disabled."; + return; + default: + *ppStatusStr = "Unrecognized status"; + *ppCommentStr = "This status is unrecognized. Is it coming from a newer version of NvPerf library?"; + return; + } + } + + +#endif // NVPERF_NVPA_STATUS_DEFINED + + +#ifndef NVPERF_NVPA_ACTIVITY_KIND_DEFINED +#define NVPERF_NVPA_ACTIVITY_KIND_DEFINED + + /// The configuration's activity-kind dictates which types of data may be collected. + typedef enum NVPA_ActivityKind + { + /// Invalid value. + NVPA_ACTIVITY_KIND_INVALID = 0, + /// A workload-centric activity for serialized and pipelined collection. + /// + /// Profiler is capable of collecting both serialized and pipelined metrics. The library introduces any + /// synchronization required to collect serialized metrics. + NVPA_ACTIVITY_KIND_PROFILER, + /// A realtime activity for sampling counters from the CPU or GPU. + NVPA_ACTIVITY_KIND_REALTIME_SAMPLED, + /// A realtime activity for profiling counters from the CPU or GPU without CPU/GPU synchronizations. + NVPA_ACTIVITY_KIND_REALTIME_PROFILER, + NVPA_ACTIVITY_KIND__COUNT + } NVPA_ActivityKind; + + +#endif // NVPERF_NVPA_ACTIVITY_KIND_DEFINED + + +#ifndef NVPERF_NVPA_BOOL_DEFINED +#define NVPERF_NVPA_BOOL_DEFINED + /// The type used for boolean values. + typedef uint8_t NVPA_Bool; +#endif // NVPERF_NVPA_BOOL_DEFINED + +#ifndef NVPA_STRUCT_SIZE +#define NVPA_STRUCT_SIZE(type_, lastfield_) (offsetof(type_, lastfield_) + sizeof(((type_*)0)->lastfield_)) +#endif // NVPA_STRUCT_SIZE + +#ifndef NVPW_FIELD_EXISTS +#define NVPW_FIELD_EXISTS(pParams_, name_) \ + ((pParams_)->structSize >= (size_t)((const uint8_t*)(&(pParams_)->name_) + sizeof(pParams_)->name_ - (const uint8_t*)(pParams_))) +#endif // NVPW_FIELD_EXISTS + + +#ifndef NVPERF_NVPA_GETPROCADDRESS_DEFINED +#define NVPERF_NVPA_GETPROCADDRESS_DEFINED + +typedef NVPA_Status (*NVPA_GenericFn)(void); + + + /// + /// Gets the address of an NvPerf API function. + /// + /// \return A function pointer to the function, or NULL if the function is not available. + /// + /// \param pFunctionName [in] Name of the function to retrieve. + NVPA_GenericFn NVPA_GetProcAddress(const char* pFunctionName); + +#endif + +#ifndef NVPERF_NVPW_SETLIBRARYLOADPATHS_DEFINED +#define NVPERF_NVPW_SETLIBRARYLOADPATHS_DEFINED + + + typedef struct NVPW_SetLibraryLoadPaths_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] number of paths in ppPaths + size_t numPaths; + /// [in] array of null-terminated paths + const char** ppPaths; + } NVPW_SetLibraryLoadPaths_Params; +#define NVPW_SetLibraryLoadPaths_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_SetLibraryLoadPaths_Params, ppPaths) + + /// Sets library search path for \ref NVPW_InitializeHost() and \ref NVPW_InitializeTarget(). + /// \ref NVPW_InitializeHost() and \ref NVPW_InitializeTarget load the NvPerf DLL/DSO. This function sets + /// ordered paths that will be searched with the LoadLibrary() or dlopen() call. + /// If load paths are set by this function, the default set of load paths + /// will not be attempted. + /// Each path must point at a directory (not a file name). + /// This function is not thread-safe. + /// Example Usage: + /// \code + /// const char* paths[] = { + /// "path1", "path2", etc + /// }; + /// NVPW_SetLibraryLoadPaths_Params params{NVPW_SetLibraryLoadPaths_Params_STRUCT_SIZE}; + /// params.numPaths = sizeof(paths)/sizeof(paths[0]); + /// params.ppPaths = paths; + /// NVPW_SetLibraryLoadPaths(¶ms); + /// NVPW_InitializeHost(); + /// params.numPaths = 0; + /// params.ppPaths = NULL; + /// NVPW_SetLibraryLoadPaths(¶ms); + /// \endcode + NVPA_Status NVPW_SetLibraryLoadPaths(NVPW_SetLibraryLoadPaths_Params* pParams); + + typedef struct NVPW_SetLibraryLoadPathsW_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] number of paths in ppwPaths + size_t numPaths; + /// [in] array of null-terminated paths + const wchar_t** ppwPaths; + } NVPW_SetLibraryLoadPathsW_Params; +#define NVPW_SetLibraryLoadPathsW_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_SetLibraryLoadPathsW_Params, ppwPaths) + + /// Sets library search path for \ref NVPW_InitializeHost() and \ref NVPW_InitializeTarget(). + /// \ref NVPW_InitializeHost() and \ref NVPW_InitializeTarget load the NvPerf DLL/DSO. This function sets + /// ordered paths that will be searched with the LoadLibrary() or dlopen() call. + /// If load paths are set by this function, the default set of load paths + /// will not be attempted. + /// Each path must point at a directory (not a file name). + /// This function is not thread-safe. + /// Example Usage: + /// \code + /// const wchar_t* wpaths[] = { + /// L"path1", L"path2", etc + /// }; + /// NVPW_SetLibraryLoadPathsW_Params params{NVPW_SetLibraryLoadPathsW_Params_STRUCT_SIZE}; + /// params.numPaths = sizeof(wpaths)/sizeof(wpaths[0]); + /// params.ppwPaths = wpaths; + /// NVPW_SetLibraryLoadPathsW(¶ms); + /// NVPW_InitializeHost(); + /// params.numPaths = 0; + /// params.ppwPaths = NULL; + /// NVPW_SetLibraryLoadPathsW(¶ms); + /// \endcode + NVPA_Status NVPW_SetLibraryLoadPathsW(NVPW_SetLibraryLoadPathsW_Params* pParams); + +#endif + + + +#ifdef __cplusplus +} // extern "C" +#endif + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility pop +#endif + +#endif // NVPERF_COMMON_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_cuda_host.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_cuda_host.h new file mode 100644 index 0000000000000000000000000000000000000000..9b4533b25148b7cd28e0ed30be022893514415a5 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_cuda_host.h @@ -0,0 +1,179 @@ +#ifndef NVPERF_CUDA_HOST_H +#define NVPERF_CUDA_HOST_H + +/* + * Copyright 2014-2024 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO USER: + * + * This source code is subject to NVIDIA ownership rights under U.S. and + * international Copyright laws. + * + * This software and the information contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions + * of a form of NVIDIA software license agreement. + * + * NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE + * CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR + * IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, + * OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS + * OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE + * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE + * OR PERFORMANCE OF THIS SOURCE CODE. + * + * U.S. Government End Users. This source code is a "commercial item" as + * that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of + * "commercial computer software" and "commercial computer software + * documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) + * and is provided to the U.S. Government only as a commercial end item. + * Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through + * 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the + * source code with only those rights set forth herein. + * + * Any use of this source code in individual and commercial software must + * include, in the user documentation and internal comments to the code, + * the above Disclaimer and U.S. Government End Users Notice. + */ + +#include +#include +#include "nvperf_common.h" +#include "nvperf_host.h" + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility push(default) + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL __attribute__ ((visibility ("hidden"))) + #endif +#else + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL + #endif +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @file nvperf_cuda_host.h + */ + + typedef struct NVPW_CUDA_RawMetricsConfig_Create_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + NVPA_ActivityKind activityKind; + /// [in] + const char* pChipName; + /// [out] new NVPA_RawMetricsConfig object + struct NVPA_RawMetricsConfig* pRawMetricsConfig; + } NVPW_CUDA_RawMetricsConfig_Create_Params; +#define NVPW_CUDA_RawMetricsConfig_Create_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CUDA_RawMetricsConfig_Create_Params, pRawMetricsConfig) + + NVPA_Status NVPW_CUDA_RawMetricsConfig_Create(NVPW_CUDA_RawMetricsConfig_Create_Params* pParams); + + typedef struct NVPW_CUDA_RawMetricsConfig_Create_V2_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + NVPA_ActivityKind activityKind; + /// [in] accepted for chips supported at the time-of-release. + const char* pChipName; + /// [in] buffer with counter availability image - required for future chip support + const uint8_t* pCounterAvailabilityImage; + /// [out] new NVPA_RawMetricsConfig object + struct NVPA_RawMetricsConfig* pRawMetricsConfig; + } NVPW_CUDA_RawMetricsConfig_Create_V2_Params; +#define NVPW_CUDA_RawMetricsConfig_Create_V2_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CUDA_RawMetricsConfig_Create_V2_Params, pRawMetricsConfig) + + /// Use either 'pChipName' or 'pCounterAvailabilityImage'. + NVPA_Status NVPW_CUDA_RawMetricsConfig_Create_V2(NVPW_CUDA_RawMetricsConfig_Create_V2_Params* pParams); + + typedef struct NVPW_CUDA_CounterDataBuilder_Create_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] accepted for chips supported at the time-of-release. + const char* pChipName; + /// [in] buffer with counter availability image - required for future chip support + const uint8_t* pCounterAvailabilityImage; + /// [out] new NVPA_CounterDataBuilder object + struct NVPA_CounterDataBuilder* pCounterDataBuilder; + } NVPW_CUDA_CounterDataBuilder_Create_Params; +#define NVPW_CUDA_CounterDataBuilder_Create_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CUDA_CounterDataBuilder_Create_Params, pCounterDataBuilder) + + /// Use either 'pChipName' or 'pCounterAvailabilityImage'. + NVPA_Status NVPW_CUDA_CounterDataBuilder_Create(NVPW_CUDA_CounterDataBuilder_Create_Params* pParams); + + typedef struct NVPW_MetricsEvaluator NVPW_MetricsEvaluator; + + typedef struct NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] accepted for chips supported at the time-of-release. + const char* pChipName; + /// [in] buffer with counter availability image - required for future chip support + const uint8_t* pCounterAvailabilityImage; + /// [out] + size_t scratchBufferSize; + } NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize_Params; +#define NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize_Params, scratchBufferSize) + + /// Use either 'pChipName' or 'pCounterAvailabilityImage'. + NVPA_Status NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize(NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize_Params* pParams); + + typedef struct NVPW_CUDA_MetricsEvaluator_Initialize_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + uint8_t* pScratchBuffer; + /// [in] the size of the 'pScratchBuffer' array, should be at least the size of the 'scratchBufferSize' returned + /// by 'NVPW_CUDA_MetricsEvaluator_CalculateScratchBufferSize' + size_t scratchBufferSize; + /// [in] accepted for chips supported at the time-of-release. + const char* pChipName; + /// [in] buffer with counter availability image - required for future chip support + const uint8_t* pCounterAvailabilityImage; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] must be provided if 'pCounterDataImage' is not NULL + size_t counterDataImageSize; + /// [out] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + } NVPW_CUDA_MetricsEvaluator_Initialize_Params; +#define NVPW_CUDA_MetricsEvaluator_Initialize_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CUDA_MetricsEvaluator_Initialize_Params, pMetricsEvaluator) + + /// Use one of 'pChipName', 'pCounterAvailabilityImage', or 'pCounterDataImage'. 'pChipName' or + /// 'pCounterAvailabilityImage' will create a metrics evaluator based on a virtual device while 'pCounterDataImage' + /// will create a metrics evaluator based on the actual device. + NVPA_Status NVPW_CUDA_MetricsEvaluator_Initialize(NVPW_CUDA_MetricsEvaluator_Initialize_Params* pParams); + + + +#ifdef __cplusplus +} // extern "C" +#endif + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility pop +#endif + +#endif // NVPERF_CUDA_HOST_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_host.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_host.h new file mode 100644 index 0000000000000000000000000000000000000000..824fda055ebe65f5cf66b71d096f2ecdfa4b5b92 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_host.h @@ -0,0 +1,1152 @@ +#ifndef NVPERF_HOST_H +#define NVPERF_HOST_H + +/* + * Copyright 2014-2024 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO USER: + * + * This source code is subject to NVIDIA ownership rights under U.S. and + * international Copyright laws. + * + * This software and the information contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions + * of a form of NVIDIA software license agreement. + * + * NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE + * CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR + * IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, + * OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS + * OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE + * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE + * OR PERFORMANCE OF THIS SOURCE CODE. + * + * U.S. Government End Users. This source code is a "commercial item" as + * that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of + * "commercial computer software" and "commercial computer software + * documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) + * and is provided to the U.S. Government only as a commercial end item. + * Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through + * 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the + * source code with only those rights set forth herein. + * + * Any use of this source code in individual and commercial software must + * include, in the user documentation and internal comments to the code, + * the above Disclaimer and U.S. Government End Users Notice. + */ + +#include +#include +#include "nvperf_common.h" + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility push(default) + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL __attribute__ ((visibility ("hidden"))) + #endif +#else + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL + #endif +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @file nvperf_host.h + */ + + +// Guard against multiple definition of NvPerf host types +#ifndef NVPERF_HOST_API_DEFINED +#define NVPERF_HOST_API_DEFINED + + +/***************************************************************************//** + * @name Host Configuration + * @{ + */ + + typedef struct NVPW_InitializeHost_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + } NVPW_InitializeHost_Params; +#define NVPW_InitializeHost_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_InitializeHost_Params, pPriv) + + /// Load the host library. + NVPA_Status NVPW_InitializeHost(NVPW_InitializeHost_Params* pParams); + + typedef struct NVPW_CounterData_CalculateCounterDataImageCopySize_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// The CounterDataPrefix generated from e.g. nvperf2 initdata or + /// NVPW_CounterDataBuilder_GetCounterDataPrefix(). Must be align(8). + const uint8_t* pCounterDataPrefix; + size_t counterDataPrefixSize; + /// max number of ranges that can be profiled + uint32_t maxNumRanges; + /// max number of RangeTree nodes; must be >= maxNumRanges + uint32_t maxNumRangeTreeNodes; + /// max string length of each RangeName, including the trailing NUL character + uint32_t maxRangeNameLength; + const uint8_t* pCounterDataSrc; + /// [out] required size of the copy buffer + size_t copyDataImageCounterSize; + } NVPW_CounterData_CalculateCounterDataImageCopySize_Params; +#define NVPW_CounterData_CalculateCounterDataImageCopySize_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_CalculateCounterDataImageCopySize_Params, copyDataImageCounterSize) + + NVPA_Status NVPW_CounterData_CalculateCounterDataImageCopySize(NVPW_CounterData_CalculateCounterDataImageCopySize_Params* pParams); + + typedef struct NVPW_CounterData_InitializeCounterDataImageCopy_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// The CounterDataPrefix generated from e.g. nvperf2 initdata or + /// NVPW_CounterDataBuilder_GetCounterDataPrefix(). Must be align(8). + const uint8_t* pCounterDataPrefix; + size_t counterDataPrefixSize; + /// max number of ranges that can be profiled + uint32_t maxNumRanges; + /// max number of RangeTree nodes; must be >= maxNumRanges + uint32_t maxNumRangeTreeNodes; + /// max string length of each RangeName, including the trailing NUL character + uint32_t maxRangeNameLength; + const uint8_t* pCounterDataSrc; + uint8_t* pCounterDataDst; + } NVPW_CounterData_InitializeCounterDataImageCopy_Params; +#define NVPW_CounterData_InitializeCounterDataImageCopy_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_InitializeCounterDataImageCopy_Params, pCounterDataDst) + + NVPA_Status NVPW_CounterData_InitializeCounterDataImageCopy(NVPW_CounterData_InitializeCounterDataImageCopy_Params* pParams); + + typedef struct NVPW_CounterData_ExtractCounterDataPrefix_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// The source buffer to extract the prefix from. + const uint8_t* pCounterDataSrc; + size_t counterDataSrcSize; + /// [in] If not NULL, the prefix will be copied into this buffer. + uint8_t* pCounterDataPrefix; + /// [inout] if 'pCounterDataPrefix' is NULL, size of counter data prefix will be returned; otherwise it should + /// be set to the size of buffer allocated for 'pCounterDataPrefix'. + size_t counterDataPrefixSize; + } NVPW_CounterData_ExtractCounterDataPrefix_Params; +#define NVPW_CounterData_ExtractCounterDataPrefix_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_ExtractCounterDataPrefix_Params, counterDataPrefixSize) + + NVPA_Status NVPW_CounterData_ExtractCounterDataPrefix(NVPW_CounterData_ExtractCounterDataPrefix_Params* pParams); + + typedef struct NVPA_CounterDataCombiner NVPA_CounterDataCombiner; + + typedef struct NVPW_CounterDataCombiner_Create_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// The destination counter data into which the source datas will be combined + uint8_t* pCounterDataDst; + /// [out] The created counter data combiner + NVPA_CounterDataCombiner* pCounterDataCombiner; + } NVPW_CounterDataCombiner_Create_Params; +#define NVPW_CounterDataCombiner_Create_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_Create_Params, pCounterDataCombiner) + + NVPA_Status NVPW_CounterDataCombiner_Create(NVPW_CounterDataCombiner_Create_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_Destroy_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataCombiner* pCounterDataCombiner; + } NVPW_CounterDataCombiner_Destroy_Params; +#define NVPW_CounterDataCombiner_Destroy_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_Destroy_Params, pCounterDataCombiner) + + NVPA_Status NVPW_CounterDataCombiner_Destroy(NVPW_CounterDataCombiner_Destroy_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_CreateRange_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataCombiner* pCounterDataCombiner; + size_t numDescriptions; + const char* const* ppDescriptions; + /// [out] + size_t rangeIndexDst; + } NVPW_CounterDataCombiner_CreateRange_Params; +#define NVPW_CounterDataCombiner_CreateRange_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_CreateRange_Params, rangeIndexDst) + + NVPA_Status NVPW_CounterDataCombiner_CreateRange(NVPW_CounterDataCombiner_CreateRange_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_CopyIntoRange_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + NVPA_CounterDataCombiner* pCounterDataCombiner; + /// [in] + size_t rangeIndexDst; + /// [in] + const uint8_t* pCounterDataSrc; + /// [in] + size_t rangeIndexSrc; + } NVPW_CounterDataCombiner_CopyIntoRange_Params; +#define NVPW_CounterDataCombiner_CopyIntoRange_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_CopyIntoRange_Params, rangeIndexSrc) + + /// In order to use this API, the source counter data and the destination counter data must have identical counters + NVPA_Status NVPW_CounterDataCombiner_CopyIntoRange(NVPW_CounterDataCombiner_CopyIntoRange_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_AccumulateIntoRange_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataCombiner* pCounterDataCombiner; + size_t rangeIndexDst; + uint32_t dstMultiplier; + const uint8_t* pCounterDataSrc; + size_t rangeIndexSrc; + uint32_t srcMultiplier; + } NVPW_CounterDataCombiner_AccumulateIntoRange_Params; +#define NVPW_CounterDataCombiner_AccumulateIntoRange_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_AccumulateIntoRange_Params, srcMultiplier) + + NVPA_Status NVPW_CounterDataCombiner_AccumulateIntoRange(NVPW_CounterDataCombiner_AccumulateIntoRange_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_SumIntoRange_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataCombiner* pCounterDataCombiner; + size_t rangeIndexDst; + const uint8_t* pCounterDataSrc; + size_t rangeIndexSrc; + } NVPW_CounterDataCombiner_SumIntoRange_Params; +#define NVPW_CounterDataCombiner_SumIntoRange_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_SumIntoRange_Params, rangeIndexSrc) + + NVPA_Status NVPW_CounterDataCombiner_SumIntoRange(NVPW_CounterDataCombiner_SumIntoRange_Params* pParams); + + typedef struct NVPW_CounterDataCombiner_WeightedSumIntoRange_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataCombiner* pCounterDataCombiner; + size_t rangeIndexDst; + double dstMultiplier; + const uint8_t* pCounterDataSrc; + size_t rangeIndexSrc; + double srcMultiplier; + } NVPW_CounterDataCombiner_WeightedSumIntoRange_Params; +#define NVPW_CounterDataCombiner_WeightedSumIntoRange_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataCombiner_WeightedSumIntoRange_Params, srcMultiplier) + + NVPA_Status NVPW_CounterDataCombiner_WeightedSumIntoRange(NVPW_CounterDataCombiner_WeightedSumIntoRange_Params* pParams); + +/** + * @} + ******************************************************************************/ + +/***************************************************************************//** + * @name Metrics Configuration + * @{ + */ + + typedef struct NVPA_RawMetricsConfig NVPA_RawMetricsConfig; + + typedef struct NVPA_RawMetricRequest + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// in + const char* pMetricName; + /// in + NVPA_Bool isolated; + /// in; ignored by AddMetric but observed by CounterData initialization + NVPA_Bool keepInstances; + } NVPA_RawMetricRequest; +#define NVPA_RAW_METRIC_REQUEST_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPA_RawMetricRequest, keepInstances) + + typedef struct NVPW_GetSupportedChipNames_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [out] + const char* const* ppChipNames; + /// [out] + size_t numChipNames; + } NVPW_GetSupportedChipNames_Params; +#define NVPW_GetSupportedChipNames_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_GetSupportedChipNames_Params, numChipNames) + + NVPA_Status NVPW_GetSupportedChipNames(NVPW_GetSupportedChipNames_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_Destroy_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + } NVPW_RawMetricsConfig_Destroy_Params; +#define NVPW_RawMetricsConfig_Destroy_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_Destroy_Params, pRawMetricsConfig) + + NVPA_Status NVPW_RawMetricsConfig_Destroy(NVPW_RawMetricsConfig_Destroy_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_SetCounterAvailability_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [in] buffer with counter availability image + const uint8_t* pCounterAvailabilityImage; + } NVPW_RawMetricsConfig_SetCounterAvailability_Params; +#define NVPW_RawMetricsConfig_SetCounterAvailability_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_SetCounterAvailability_Params, pCounterAvailabilityImage) + + NVPA_Status NVPW_RawMetricsConfig_SetCounterAvailability(NVPW_RawMetricsConfig_SetCounterAvailability_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_BeginPassGroup_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + size_t maxPassCount; + } NVPW_RawMetricsConfig_BeginPassGroup_Params; +#define NVPW_RawMetricsConfig_BeginPassGroup_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_BeginPassGroup_Params, maxPassCount) + + NVPA_Status NVPW_RawMetricsConfig_BeginPassGroup(NVPW_RawMetricsConfig_BeginPassGroup_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_EndPassGroup_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + } NVPW_RawMetricsConfig_EndPassGroup_Params; +#define NVPW_RawMetricsConfig_EndPassGroup_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_EndPassGroup_Params, pRawMetricsConfig) + + NVPA_Status NVPW_RawMetricsConfig_EndPassGroup(NVPW_RawMetricsConfig_EndPassGroup_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetNumMetrics_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [out] + size_t numMetrics; + } NVPW_RawMetricsConfig_GetNumMetrics_Params; +#define NVPW_RawMetricsConfig_GetNumMetrics_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetNumMetrics_Params, numMetrics) + + NVPA_Status NVPW_RawMetricsConfig_GetNumMetrics(NVPW_RawMetricsConfig_GetNumMetrics_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetMetricProperties_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + size_t metricIndex; + /// [out] + const char* pMetricName; + /// [out] + NVPA_Bool supportsPipelined; + /// [out] + NVPA_Bool supportsIsolated; + } NVPW_RawMetricsConfig_GetMetricProperties_Params; +#define NVPW_RawMetricsConfig_GetMetricProperties_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetMetricProperties_Params, supportsIsolated) + + NVPA_Status NVPW_RawMetricsConfig_GetMetricProperties(NVPW_RawMetricsConfig_GetMetricProperties_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetMetricProperties_V2_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + size_t metricIndex; + /// [out] + const char* pMetricName; + } NVPW_RawMetricsConfig_GetMetricProperties_V2_Params; +#define NVPW_RawMetricsConfig_GetMetricProperties_V2_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetMetricProperties_V2_Params, pMetricName) + + NVPA_Status NVPW_RawMetricsConfig_GetMetricProperties_V2(NVPW_RawMetricsConfig_GetMetricProperties_V2_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_AddMetrics_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + const NVPA_RawMetricRequest* pRawMetricRequests; + size_t numMetricRequests; + } NVPW_RawMetricsConfig_AddMetrics_Params; +#define NVPW_RawMetricsConfig_AddMetrics_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_AddMetrics_Params, numMetricRequests) + + NVPA_Status NVPW_RawMetricsConfig_AddMetrics(NVPW_RawMetricsConfig_AddMetrics_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_IsAddMetricsPossible_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + const NVPA_RawMetricRequest* pRawMetricRequests; + size_t numMetricRequests; + /// [out] + NVPA_Bool isPossible; + } NVPW_RawMetricsConfig_IsAddMetricsPossible_Params; +#define NVPW_RawMetricsConfig_IsAddMetricsPossible_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_IsAddMetricsPossible_Params, isPossible) + + NVPA_Status NVPW_RawMetricsConfig_IsAddMetricsPossible(NVPW_RawMetricsConfig_IsAddMetricsPossible_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GenerateConfigImage_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [in] If true, all existing pass groups may be merged to reduce number of passes. + /// If merge was successful, distribution of counters in passes may be updated as a side-effect. The effects + /// will be persistent in pRawMetricsConfig. + NVPA_Bool mergeAllPassGroups; + } NVPW_RawMetricsConfig_GenerateConfigImage_Params; +#define NVPW_RawMetricsConfig_GenerateConfigImage_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GenerateConfigImage_Params, mergeAllPassGroups) + + /// This API may fail if called inside a pass group with `mergeAllPassGroups` = true. + NVPA_Status NVPW_RawMetricsConfig_GenerateConfigImage(NVPW_RawMetricsConfig_GenerateConfigImage_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetConfigImage_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [in] Number of bytes allocated for pBuffer + size_t bytesAllocated; + /// [out] [optional] Buffer receiving the config image + uint8_t* pBuffer; + /// [out] Count of bytes that would be copied into pBuffer + size_t bytesCopied; + } NVPW_RawMetricsConfig_GetConfigImage_Params; +#define NVPW_RawMetricsConfig_GetConfigImage_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetConfigImage_Params, bytesCopied) + + NVPA_Status NVPW_RawMetricsConfig_GetConfigImage(NVPW_RawMetricsConfig_GetConfigImage_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetNumPasses_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [out] + size_t numPipelinedPasses; + /// [out] + size_t numIsolatedPasses; + } NVPW_RawMetricsConfig_GetNumPasses_Params; +#define NVPW_RawMetricsConfig_GetNumPasses_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetNumPasses_Params, numIsolatedPasses) + + /// Total num passes = numPipelinedPasses + numIsolatedPasses * numNestingLevels + NVPA_Status NVPW_RawMetricsConfig_GetNumPasses(NVPW_RawMetricsConfig_GetNumPasses_Params* pParams); + + typedef struct NVPW_RawMetricsConfig_GetNumPasses_V2_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const NVPA_RawMetricsConfig* pRawMetricsConfig; + /// [out] + size_t numPasses; + } NVPW_RawMetricsConfig_GetNumPasses_V2_Params; +#define NVPW_RawMetricsConfig_GetNumPasses_V2_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_RawMetricsConfig_GetNumPasses_V2_Params, numPasses) + + /// Total num passes = numPasses * numNestingLevels + NVPA_Status NVPW_RawMetricsConfig_GetNumPasses_V2(NVPW_RawMetricsConfig_GetNumPasses_V2_Params* pParams); + + typedef struct NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] Typically created by e.g. NVPW_RawMetricsConfig_GetConfigImage(), must be align(8). + const uint8_t* pConfig; + /// [in] + size_t configSize; + /// [out] + size_t sampleSize; + } NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize_Params; +#define NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize_Params, sampleSize) + + /// Estimate per sample records size based on a virtual device + NVPA_Status NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize(NVPW_PeriodicSampler_Config_GetSocEstimatedSampleSize_Params* pParams); + + typedef struct NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] Typically created by e.g. NVPW_RawMetricsConfig_GetConfigImage(), must be align(8). + const uint8_t* pConfig; + /// [in] + size_t configSize; + /// [out] + size_t sampleSize; + } NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize_Params; +#define NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize_Params, sampleSize) + + /// Estimate per sample records size based on a virtual device + NVPA_Status NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize(NVPW_PeriodicSampler_Config_GetGpuEstimatedSampleSize_Params* pParams); + +/** + * @} + ******************************************************************************/ + + typedef struct NVPW_Config_GetRawCounterInfo_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pConfig; + /// [in] + size_t configSize; + /// [in] + const char* pRawCounterName; + /// [inout] array containing indices of passes the counter resides in. 'pPassIndices' is in, '*pPassIndices' is + /// out. + size_t* pPassIndices; + /// [inout] if 'pPassIndices' is NULL, the count of passes this counter resides in will be returned; otherwise + /// it should be set to the capacity of 'pPassIndices' array, and on return, it will be overwritten to reflect + /// the actual count filled into 'pPassIndices' + size_t numPassIndices; + } NVPW_Config_GetRawCounterInfo_Params; +#define NVPW_Config_GetRawCounterInfo_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetRawCounterInfo_Params, numPassIndices) + + NVPA_Status NVPW_Config_GetRawCounterInfo(NVPW_Config_GetRawCounterInfo_Params* pParams); + + typedef struct NVPW_Config_GetRawCounters_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pConfig; + /// [in] + size_t configSize; + /// [in] + size_t passIndex; + /// [inout] array containing raw counter names. 'ppRawCounterNames' is in, '*ppRawCounterNames' is out. + const char** ppRawCounterNames; + /// [inout] if 'ppRawCounterNames' is NULL, the count of raw counters will be returned; otherwise it should be + /// set to the capacity of 'ppRawCounterNames' array, and on return, it will be overwritten to reflect the + /// actual count filled into 'ppRawCounterNames' + size_t numRawCounters; + } NVPW_Config_GetRawCounters_Params; +#define NVPW_Config_GetRawCounters_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetRawCounters_Params, numRawCounters) + + NVPA_Status NVPW_Config_GetRawCounters(NVPW_Config_GetRawCounters_Params* pParams); + +/***************************************************************************//** + * @name CounterData Creation + * @{ + */ + + typedef struct NVPA_CounterDataBuilder NVPA_CounterDataBuilder; + + typedef struct NVPW_CounterDataBuilder_Create_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [out] + NVPA_CounterDataBuilder* pCounterDataBuilder; + const char* pChipName; + } NVPW_CounterDataBuilder_Create_Params; +#define NVPW_CounterDataBuilder_Create_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataBuilder_Create_Params, pChipName) + + NVPA_Status NVPW_CounterDataBuilder_Create(NVPW_CounterDataBuilder_Create_Params* pParams); + + typedef struct NVPW_CounterDataBuilder_Destroy_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataBuilder* pCounterDataBuilder; + } NVPW_CounterDataBuilder_Destroy_Params; +#define NVPW_CounterDataBuilder_Destroy_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataBuilder_Destroy_Params, pCounterDataBuilder) + + NVPA_Status NVPW_CounterDataBuilder_Destroy(NVPW_CounterDataBuilder_Destroy_Params* pParams); + + typedef struct NVPW_CounterDataBuilder_AddMetrics_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataBuilder* pCounterDataBuilder; + const NVPA_RawMetricRequest* pRawMetricRequests; + size_t numMetricRequests; + } NVPW_CounterDataBuilder_AddMetrics_Params; +#define NVPW_CounterDataBuilder_AddMetrics_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataBuilder_AddMetrics_Params, numMetricRequests) + + NVPA_Status NVPW_CounterDataBuilder_AddMetrics(NVPW_CounterDataBuilder_AddMetrics_Params* pParams); + + typedef struct NVPW_CounterDataBuilder_GetCounterDataPrefix_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + NVPA_CounterDataBuilder* pCounterDataBuilder; + /// [in] Number of bytes allocated for pBuffer + size_t bytesAllocated; + /// [out] [optional] Buffer receiving the counter data prefix + uint8_t* pBuffer; + /// [out] Count of bytes that would be copied to pBuffer + size_t bytesCopied; + } NVPW_CounterDataBuilder_GetCounterDataPrefix_Params; +#define NVPW_CounterDataBuilder_GetCounterDataPrefix_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterDataBuilder_GetCounterDataPrefix_Params, bytesCopied) + + NVPA_Status NVPW_CounterDataBuilder_GetCounterDataPrefix(NVPW_CounterDataBuilder_GetCounterDataPrefix_Params* pParams); + +/** + * @} + ******************************************************************************/ + +/***************************************************************************//** + * @name Metrics Evaluator + * @{ + */ + + typedef struct NVPW_MetricsEvaluator NVPW_MetricsEvaluator; + +#ifndef NVPW_DIM_UNIT_DEFINED +#define NVPW_DIM_UNIT_DEFINED + typedef enum NVPW_DimUnitName + { + NVPW_DIM_UNIT_INVALID = 3518299157, + NVPW_DIM_UNIT_UNITLESS = 2126137902, + NVPW_DIM_UNIT_ATTRIBUTES = 3776338729, + NVPW_DIM_UNIT_BYTES = 3797850191, + NVPW_DIM_UNIT_CTAS = 1960564139, + NVPW_DIM_UNIT_CTC_CYCLES = 2224883873, + NVPW_DIM_UNIT_DRAM_CYCLES = 2650981327, + NVPW_DIM_UNIT_FBP_CYCLES = 1785238957, + NVPW_DIM_UNIT_FE_OPS = 2919159083, + NVPW_DIM_UNIT_GPC_CYCLES = 1222631184, + NVPW_DIM_UNIT_IDC_REQUESTS = 2012649669, + NVPW_DIM_UNIT_INSTRUCTIONS = 1418625543, + NVPW_DIM_UNIT_KILOBYTES = 1335980302, + NVPW_DIM_UNIT_L1DATA_BANK_ACCESSES = 1479493682, + NVPW_DIM_UNIT_L1DATA_BANK_CONFLICTS = 3433170787, + NVPW_DIM_UNIT_L1TEX_REQUESTS = 1306473767, + NVPW_DIM_UNIT_L1TEX_TAGS = 26573010, + NVPW_DIM_UNIT_L1TEX_WAVEFRONTS = 129373765, + NVPW_DIM_UNIT_L2_REQUESTS = 1143695106, + NVPW_DIM_UNIT_L2_SECTORS = 3424101564, + NVPW_DIM_UNIT_L2_TAGS = 3755612781, + NVPW_DIM_UNIT_MCC_CYCLES = 1826685787, + NVPW_DIM_UNIT_NANOSECONDS = 3047500672, + NVPW_DIM_UNIT_NVLRX_CYCLES = 4059934930, + NVPW_DIM_UNIT_NVLTX_CYCLES = 1814350488, + NVPW_DIM_UNIT_PCIE_CYCLES = 1230450943, + NVPW_DIM_UNIT_PERCENT = 1284354694, + NVPW_DIM_UNIT_PIXELS = 4227616663, + NVPW_DIM_UNIT_PIXEL_SHADER_BARRIERS = 3705502518, + NVPW_DIM_UNIT_PRIMITIVES = 2373084002, + NVPW_DIM_UNIT_QUADS = 1539753497, + NVPW_DIM_UNIT_REGISTERS = 2837260947, + NVPW_DIM_UNIT_SAMPLES = 746046551, + NVPW_DIM_UNIT_SECONDS = 1164825258, + NVPW_DIM_UNIT_SYS_CYCLES = 3310821688, + NVPW_DIM_UNIT_TEXELS = 1293214069, + NVPW_DIM_UNIT_THREADS = 164261907, + NVPW_DIM_UNIT_VERTICES = 1873662209, + NVPW_DIM_UNIT_WARPS = 97951949, + NVPW_DIM_UNIT_WORKLOADS = 1728142656 + } NVPW_DimUnitName; +#endif //NVPW_DIM_UNIT_DEFINED + +#ifndef NVPW_HW_UNIT_DEFINED +#define NVPW_HW_UNIT_DEFINED + typedef enum NVPW_HwUnit + { + NVPW_HW_UNIT_INVALID = 3498035701, + NVPW_HW_UNIT_CROP = 2872137846, + NVPW_HW_UNIT_DRAM = 1662616918, + NVPW_HW_UNIT_DRAMC = 1401232876, + NVPW_HW_UNIT_FBP = 2947194306, + NVPW_HW_UNIT_FBPA = 690045803, + NVPW_HW_UNIT_FE = 2204924321, + NVPW_HW_UNIT_GPC = 1911735839, + NVPW_HW_UNIT_GPU = 1014363534, + NVPW_HW_UNIT_GR = 2933618517, + NVPW_HW_UNIT_IDC = 842765289, + NVPW_HW_UNIT_L1TEX = 893940957, + NVPW_HW_UNIT_LTS = 2333266697, + NVPW_HW_UNIT_MCC = 3980130194, + NVPW_HW_UNIT_NVLRX = 3091684901, + NVPW_HW_UNIT_NVLTX = 869679659, + NVPW_HW_UNIT_PCIE = 3433264174, + NVPW_HW_UNIT_PDA = 345193251, + NVPW_HW_UNIT_PES = 804128425, + NVPW_HW_UNIT_PROP = 3339255507, + NVPW_HW_UNIT_RASTER = 187932504, + NVPW_HW_UNIT_SM = 724224710, + NVPW_HW_UNIT_SMSP = 2837616917, + NVPW_HW_UNIT_SYS = 768990063, + NVPW_HW_UNIT_TPC = 1889024613, + NVPW_HW_UNIT_VAF = 753670509, + NVPW_HW_UNIT_VPC = 275561583, + NVPW_HW_UNIT_ZROP = 979500456 + } NVPW_HwUnit; +#endif //NVPW_HW_UNIT_DEFINED + + typedef enum NVPW_RollupOp + { + NVPW_ROLLUP_OP_AVG = 0, + NVPW_ROLLUP_OP_MAX, + NVPW_ROLLUP_OP_MIN, + NVPW_ROLLUP_OP_SUM, + NVPW_ROLLUP_OP__COUNT + } NVPW_RollupOp; + + typedef enum NVPW_MetricType + { + NVPW_METRIC_TYPE_COUNTER = 0, + NVPW_METRIC_TYPE_RATIO, + NVPW_METRIC_TYPE_THROUGHPUT, + NVPW_METRIC_TYPE__COUNT + } NVPW_MetricType; + + typedef enum NVPW_Submetric + { + NVPW_SUBMETRIC_NONE = 0, + NVPW_SUBMETRIC_PEAK_SUSTAINED = 1, + NVPW_SUBMETRIC_PEAK_SUSTAINED_ACTIVE = 2, + NVPW_SUBMETRIC_PEAK_SUSTAINED_ACTIVE_PER_SECOND = 3, + NVPW_SUBMETRIC_PEAK_SUSTAINED_ELAPSED = 4, + NVPW_SUBMETRIC_PEAK_SUSTAINED_ELAPSED_PER_SECOND = 5, + NVPW_SUBMETRIC_PEAK_SUSTAINED_FRAME = 6, + NVPW_SUBMETRIC_PEAK_SUSTAINED_FRAME_PER_SECOND = 7, + NVPW_SUBMETRIC_PEAK_SUSTAINED_REGION = 8, + NVPW_SUBMETRIC_PEAK_SUSTAINED_REGION_PER_SECOND = 9, + NVPW_SUBMETRIC_PER_CYCLE_ACTIVE = 10, + NVPW_SUBMETRIC_PER_CYCLE_ELAPSED = 11, + NVPW_SUBMETRIC_PER_CYCLE_IN_FRAME = 12, + NVPW_SUBMETRIC_PER_CYCLE_IN_REGION = 13, + NVPW_SUBMETRIC_PER_SECOND = 14, + NVPW_SUBMETRIC_PCT_OF_PEAK_SUSTAINED_ACTIVE = 15, + NVPW_SUBMETRIC_PCT_OF_PEAK_SUSTAINED_ELAPSED = 16, + NVPW_SUBMETRIC_PCT_OF_PEAK_SUSTAINED_FRAME = 17, + NVPW_SUBMETRIC_PCT_OF_PEAK_SUSTAINED_REGION = 18, + NVPW_SUBMETRIC_MAX_RATE = 19, + NVPW_SUBMETRIC_PCT = 20, + NVPW_SUBMETRIC_RATIO = 21, + NVPW_SUBMETRIC__COUNT + } NVPW_Submetric; + + typedef struct NVPW_MetricEvalRequest + { + /// the metric index as in 'NVPW_MetricsEvaluator_GetMetricNames' + size_t metricIndex; + /// one of 'NVPW_MetricType' + uint8_t metricType; + /// one of 'NVPW_RollupOp', required for Counter and Throughput, doesn't apply to Ratio + uint8_t rollupOp; + /// one of 'NVPW_Submetric', required for Ratio and Throughput, optional for Counter + uint16_t submetric; + } NVPW_MetricEvalRequest; +#define NVPW_MetricEvalRequest_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricEvalRequest, submetric) + + typedef struct NVPW_DimUnitFactor + { + /// one of 'NVPW_DimUnitName' + uint32_t dimUnit; + int8_t exponent; + } NVPW_DimUnitFactor; +#define NVPW_DimUnitFactor_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_DimUnitFactor, exponent) + + typedef struct NVPW_MetricsEvaluator_Destroy_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + } NVPW_MetricsEvaluator_Destroy_Params; +#define NVPW_MetricsEvaluator_Destroy_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_Destroy_Params, pMetricsEvaluator) + + NVPA_Status NVPW_MetricsEvaluator_Destroy(NVPW_MetricsEvaluator_Destroy_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetMetricNames_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] one of 'NVPW_MetricType' + uint8_t metricType; + /// [out] + const char* pMetricNames; + /// [out] + const size_t* pMetricNameBeginIndices; + /// [out] + size_t numMetrics; + } NVPW_MetricsEvaluator_GetMetricNames_Params; +#define NVPW_MetricsEvaluator_GetMetricNames_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetMetricNames_Params, numMetrics) + + NVPA_Status NVPW_MetricsEvaluator_GetMetricNames(NVPW_MetricsEvaluator_GetMetricNames_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetMetricTypeAndIndex_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] can be either a base metric or a metric + const char* pMetricName; + /// [out] one of 'NVPW_MetricType' + uint8_t metricType; + /// [out] the metric index as in 'NVPW_MetricsEvaluator_GetMetricNames' + size_t metricIndex; + } NVPW_MetricsEvaluator_GetMetricTypeAndIndex_Params; +#define NVPW_MetricsEvaluator_GetMetricTypeAndIndex_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetMetricTypeAndIndex_Params, metricIndex) + + NVPA_Status NVPW_MetricsEvaluator_GetMetricTypeAndIndex(NVPW_MetricsEvaluator_GetMetricTypeAndIndex_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] + const char* pMetricName; + /// [inout] 'pMetricEvalRequest' is in, '*pMetricEvalRequest' is out + struct NVPW_MetricEvalRequest* pMetricEvalRequest; + /// [in] set to 'NVPW_MetricEvalRequest_STRUCT_SIZE' + size_t metricEvalRequestStructSize; + } NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest_Params; +#define NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest_Params, metricEvalRequestStructSize) + + NVPA_Status NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest(NVPW_MetricsEvaluator_ConvertMetricNameToMetricEvalRequest_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_HwUnitToString_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] one of 'NVPW_HwUnit' + uint32_t hwUnit; + /// [out] + const char* pHwUnitName; + } NVPW_MetricsEvaluator_HwUnitToString_Params; +#define NVPW_MetricsEvaluator_HwUnitToString_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_HwUnitToString_Params, pHwUnitName) + + NVPA_Status NVPW_MetricsEvaluator_HwUnitToString(NVPW_MetricsEvaluator_HwUnitToString_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetCounterProperties_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] the metric index as in 'NVPW_MetricsEvaluator_GetMetricNames' + size_t counterIndex; + /// [out] + const char* pDescription; + /// [out] one of 'NVPW_HwUnit' + uint32_t hwUnit; + } NVPW_MetricsEvaluator_GetCounterProperties_Params; +#define NVPW_MetricsEvaluator_GetCounterProperties_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetCounterProperties_Params, hwUnit) + + NVPA_Status NVPW_MetricsEvaluator_GetCounterProperties(NVPW_MetricsEvaluator_GetCounterProperties_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetRatioMetricProperties_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] the metric index as in 'NVPW_MetricsEvaluator_GetMetricNames' + size_t ratioMetricIndex; + /// [out] + const char* pDescription; + /// [out] + uint64_t hwUnit; + } NVPW_MetricsEvaluator_GetRatioMetricProperties_Params; +#define NVPW_MetricsEvaluator_GetRatioMetricProperties_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetRatioMetricProperties_Params, hwUnit) + + NVPA_Status NVPW_MetricsEvaluator_GetRatioMetricProperties(NVPW_MetricsEvaluator_GetRatioMetricProperties_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetThroughputMetricProperties_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] the metric index as in 'NVPW_MetricsEvaluator_GetMetricNames' + size_t throughputMetricIndex; + /// [out] + const char* pDescription; + /// [out] + uint32_t hwUnit; + /// [out] number of constituent counters for the throughput metric + size_t numCounters; + /// [out] metric indices as in 'NVPW_MetricsEvaluator_GetMetricNames', valid if 'numCounters' > 0, otherwise + /// returned as nullptr + const size_t* pCounterIndices; + /// [out] number of constituent sub-throughputs for the throughput metric + size_t numSubThroughputs; + /// [out] metric indices as in 'NVPW_MetricsEvaluator_GetMetricNames', valid if 'numSubThroughputs' > 0, + /// otherwise returned as nullptr + const size_t* pSubThroughputIndices; + } NVPW_MetricsEvaluator_GetThroughputMetricProperties_Params; +#define NVPW_MetricsEvaluator_GetThroughputMetricProperties_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetThroughputMetricProperties_Params, pSubThroughputIndices) + + NVPA_Status NVPW_MetricsEvaluator_GetThroughputMetricProperties(NVPW_MetricsEvaluator_GetThroughputMetricProperties_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetSupportedSubmetrics_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] one of 'NVPW_MetricType' + uint8_t metricType; + /// [out] an array of 'NVPW_Submetric' + const uint16_t* pSupportedSubmetrics; + /// [out] + size_t numSupportedSubmetrics; + } NVPW_MetricsEvaluator_GetSupportedSubmetrics_Params; +#define NVPW_MetricsEvaluator_GetSupportedSubmetrics_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetSupportedSubmetrics_Params, numSupportedSubmetrics) + + NVPA_Status NVPW_MetricsEvaluator_GetSupportedSubmetrics(NVPW_MetricsEvaluator_GetSupportedSubmetrics_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetMetricRawDependencies_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] + const struct NVPW_MetricEvalRequest* pMetricEvalRequests; + /// [in] + size_t numMetricEvalRequests; + /// [in] set to 'NVPW_MetricEvalRequest_STRUCT_SIZE' + size_t metricEvalRequestStructSize; + /// [in] set to sizeof('NVPW_MetricEvalRequest') + size_t metricEvalRequestStrideSize; + /// [inout] 'ppRawDependencies' is in, '*ppRawDependencies' is out + const char** ppRawDependencies; + /// [inout] if 'ppRawDependencies' is NULL, number of raw dependencies available will be returned; otherwise it + /// should be set to the number of elements allocated for 'ppRawDependencies', and on return, it will be + /// overwritten by number of elements copied to 'ppRawDependencies' + size_t numRawDependencies; + /// [inout] 'ppOptionalRawDependencies' is in, '*ppOptionalRawDependencies' is out + const char** ppOptionalRawDependencies; + /// [inout] if 'ppOptionalRawDependencies' is NULL, number of optional raw dependencies available will be + /// returned; otherwise it should be set to the number of elements allocated for 'ppOptionalRawDependencies', + /// and on return, it will be overwritten by number of elements copied to 'ppOptionalRawDependencies' + size_t numOptionalRawDependencies; + } NVPW_MetricsEvaluator_GetMetricRawDependencies_Params; +#define NVPW_MetricsEvaluator_GetMetricRawDependencies_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetMetricRawDependencies_Params, numOptionalRawDependencies) + + NVPA_Status NVPW_MetricsEvaluator_GetMetricRawDependencies(NVPW_MetricsEvaluator_GetMetricRawDependencies_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_DimUnitToString_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] one of 'NVPW_DimUnitName' + uint32_t dimUnit; + /// [out] + const char* pSingularName; + /// [out] + const char* pPluralName; + } NVPW_MetricsEvaluator_DimUnitToString_Params; +#define NVPW_MetricsEvaluator_DimUnitToString_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_DimUnitToString_Params, pPluralName) + + NVPA_Status NVPW_MetricsEvaluator_DimUnitToString(NVPW_MetricsEvaluator_DimUnitToString_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_GetMetricDimUnits_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] + const struct NVPW_MetricEvalRequest* pMetricEvalRequest; + /// [in] set to 'NVPW_MetricEvalRequest_STRUCT_SIZE' + size_t metricEvalRequestStructSize; + /// [inout] 'pDimUnits' is in, '*pDimUnits' is out + NVPW_DimUnitFactor* pDimUnits; + /// [inout] if 'pDimUnits' is NULL, number of dim-units available will be returned; otherwise it should be set + /// to the number of elements allocated for 'pDimUnits', and on return, it will be overwritten by number of + /// elements copied to 'pDimUnits' + size_t numDimUnits; + /// [in] set to 'NVPW_DimUnitFactor_STRUCT_SIZE' + size_t dimUnitFactorStructSize; + } NVPW_MetricsEvaluator_GetMetricDimUnits_Params; +#define NVPW_MetricsEvaluator_GetMetricDimUnits_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_GetMetricDimUnits_Params, dimUnitFactorStructSize) + + NVPA_Status NVPW_MetricsEvaluator_GetMetricDimUnits(NVPW_MetricsEvaluator_GetMetricDimUnits_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_SetUserData_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] duration in ns of user defined frame + double frameDuration; + /// [in] duration in ns of user defined region + double regionDuration; + /// [in] + NVPA_Bool isolated; + } NVPW_MetricsEvaluator_SetUserData_Params; +#define NVPW_MetricsEvaluator_SetUserData_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_SetUserData_Params, isolated) + + NVPA_Status NVPW_MetricsEvaluator_SetUserData(NVPW_MetricsEvaluator_SetUserData_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_EvaluateToGpuValues_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] + const struct NVPW_MetricEvalRequest* pMetricEvalRequests; + /// [in] + size_t numMetricEvalRequests; + /// [in] set to 'NVPW_MetricEvalRequest_STRUCT_SIZE' + size_t metricEvalRequestStructSize; + /// [in] set to sizeof('NVPW_MetricEvalRequest') + size_t metricEvalRequestStrideSize; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [in] + size_t rangeIndex; + /// [in] + NVPA_Bool isolated; + /// [inout] 'pMetricValues' is in, '*pMetricValues' is out + double* pMetricValues; + } NVPW_MetricsEvaluator_EvaluateToGpuValues_Params; +#define NVPW_MetricsEvaluator_EvaluateToGpuValues_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_EvaluateToGpuValues_Params, pMetricValues) + + NVPA_Status NVPW_MetricsEvaluator_EvaluateToGpuValues(NVPW_MetricsEvaluator_EvaluateToGpuValues_Params* pParams); + + typedef struct NVPW_MetricsEvaluator_SetDeviceAttributes_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct NVPW_MetricsEvaluator* pMetricsEvaluator; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + } NVPW_MetricsEvaluator_SetDeviceAttributes_Params; +#define NVPW_MetricsEvaluator_SetDeviceAttributes_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_MetricsEvaluator_SetDeviceAttributes_Params, counterDataImageSize) + + NVPA_Status NVPW_MetricsEvaluator_SetDeviceAttributes(NVPW_MetricsEvaluator_SetDeviceAttributes_Params* pParams); + +/** + * @} + ******************************************************************************/ + + +#endif // NVPERF_HOST_API_DEFINED + + + + +#ifdef __cplusplus +} // extern "C" +#endif + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility pop +#endif + +#endif // NVPERF_HOST_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_target.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_target.h new file mode 100644 index 0000000000000000000000000000000000000000..a8ee051da76a97013be9815f84f1b98cb359977b --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/include/nvperf_target.h @@ -0,0 +1,595 @@ +#ifndef NVPERF_TARGET_H +#define NVPERF_TARGET_H + +/* + * Copyright 2014-2024 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO USER: + * + * This source code is subject to NVIDIA ownership rights under U.S. and + * international Copyright laws. + * + * This software and the information contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions + * of a form of NVIDIA software license agreement. + * + * NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE + * CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR + * IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, + * OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS + * OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE + * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE + * OR PERFORMANCE OF THIS SOURCE CODE. + * + * U.S. Government End Users. This source code is a "commercial item" as + * that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of + * "commercial computer software" and "commercial computer software + * documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995) + * and is provided to the U.S. Government only as a commercial end item. + * Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through + * 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the + * source code with only those rights set forth herein. + * + * Any use of this source code in individual and commercial software must + * include, in the user documentation and internal comments to the code, + * the above Disclaimer and U.S. Government End Users Notice. + */ + +#include +#include +#include "nvperf_common.h" + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility push(default) + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL __attribute__ ((visibility ("hidden"))) + #endif +#else + #if !defined(NVPW_LOCAL) + #define NVPW_LOCAL + #endif +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @file nvperf_target.h + */ + +#ifndef NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED +#define NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED + /// GPU architecture support level + typedef enum NVPW_GpuArchitectureSupportLevel + { + NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_UNSUPPORTED, + NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_SUPPORTED + } NVPW_GpuArchitectureSupportLevel; +#endif //NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED + +#ifndef NVPW_SLI_SUPPORT_LEVEL_DEFINED +#define NVPW_SLI_SUPPORT_LEVEL_DEFINED + /// SLI configuration support level + typedef enum NVPW_SliSupportLevel + { + NVPW_SLI_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_SLI_SUPPORT_LEVEL_UNSUPPORTED, + /// Only Non-SLI configurations are supported. + NVPW_SLI_SUPPORT_LEVEL_SUPPORTED_NON_SLI_CONFIGURATION + } NVPW_SliSupportLevel; +#endif //NVPW_SLI_SUPPORT_LEVEL_DEFINED + +#ifndef NVPW_VGPU_SUPPORT_LEVEL_DEFINED +#define NVPW_VGPU_SUPPORT_LEVEL_DEFINED + /// Virtualized GPU configuration support level + typedef enum NVPW_VGpuSupportLevel + { + NVPW_VGPU_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_VGPU_SUPPORT_LEVEL_UNSUPPORTED, + /// Supported but not allowed by system admin. + NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_DISALLOWED, + NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_ALLOWED, + NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_NON_VGPU_CONFIGURATION + } NVPW_VGpuSupportLevel; +#endif //NVPW_VGPU_SUPPORT_LEVEL_DEFINED + +#ifndef NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED +#define NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED + /// Confidential Compute mode support level + typedef enum NVPW_ConfidentialComputeSupportLevel + { + NVPW_CONF_COMPUTE_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_CONF_COMPUTE_SUPPORT_LEVEL_UNSUPPORTED, + NVPW_CONF_COMPUTE_SUPPORT_LEVEL_SUPPORTED_NON_CONF_COMPUTE_CONFIGURATION, + NVPW_CONF_COMPUTE_SUPPORT_LEVEL_SUPPORTED_CONF_COMPUTE_DEVTOOLS_MODE + } NVPW_ConfidentialComputeSupportLevel; +#endif //NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED + +#ifndef NVPW_CMP_SUPPORT_LEVEL_DEFINED +#define NVPW_CMP_SUPPORT_LEVEL_DEFINED + /// CMP support level + typedef enum NVPW_CmpSupportLevel + { + NVPW_CMP_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_CMP_SUPPORT_LEVEL_UNSUPPORTED, + NVPW_CMP_SUPPORT_LEVEL_SUPPORTED_NON_CMP_CONFIGURATON + } NVPW_CmpSupportLevel; +#endif //NVPW_CMP_SUPPORT_LEVEL_DEFINED + +#ifndef NVPW_WSL_SUPPORT_LEVEL_DEFINED +#define NVPW_WSL_SUPPORT_LEVEL_DEFINED + /// WSL support level + typedef enum NVPW_WslSupportLevel + { + NVPW_WSL_SUPPORT_LEVEL_UNKNOWN = 0, + NVPW_WSL_SUPPORT_LEVEL_UNSUPPORTED_INSUFFICIENT_DRIVER_VERSION, + NVPW_WSL_SUPPORT_LEVEL_SUPPORTED, + NVPW_WSL_SUPPORT_LEVEL_SUPPORTED_NON_WSL_CONFIGURATION + } NVPW_WslSupportLevel; +#endif //NVPW_WSL_SUPPORT_LEVEL_DEFINED + + typedef struct NVPW_InitializeTarget_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + } NVPW_InitializeTarget_Params; +#define NVPW_InitializeTarget_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_InitializeTarget_Params, pPriv) + + /// Load the target library. + NVPA_Status NVPW_InitializeTarget(NVPW_InitializeTarget_Params* pParams); + + typedef struct NVPW_GetDeviceCount_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + size_t numDevices; + } NVPW_GetDeviceCount_Params; +#define NVPW_GetDeviceCount_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_GetDeviceCount_Params, numDevices) + + NVPA_Status NVPW_GetDeviceCount(NVPW_GetDeviceCount_Params* pParams); + + typedef struct NVPW_Device_GetNames_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + size_t deviceIndex; + const char* pDeviceName; + const char* pChipName; + } NVPW_Device_GetNames_Params; +#define NVPW_Device_GetNames_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetNames_Params, pChipName) + + NVPA_Status NVPW_Device_GetNames(NVPW_Device_GetNames_Params* pParams); + + typedef struct NVPW_PciBusId + { + /// The PCI domain on which the device bus resides. + uint32_t domain; + /// The bus on which the device resides. + uint16_t bus; + /// device ID. + uint16_t device; + } NVPW_PciBusId; +#define NVPW_PciBusId_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PciBusId, device) + + typedef struct NVPW_Device_GetPciBusIds_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] caller-allocated array of NVPW_PciBusId, indexed by NVPW deviceIndex + NVPW_PciBusId* pBusIds; + /// [in] size of the pBusIDs array; use result from NVPW_GetDeviceCount + size_t numDevices; + } NVPW_Device_GetPciBusIds_Params; +#define NVPW_Device_GetPciBusIds_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetPciBusIds_Params, numDevices) + + NVPA_Status NVPW_Device_GetPciBusIds(NVPW_Device_GetPciBusIds_Params* pParams); + + +#define NVPW_DEVICE_MIG_GPU_INSTANCE_ID_INVALID 0xFFFFFFFFu +#define NVPW_DEVICE_MIG_GPU_INSTANCE_ID_FULLCHIP 0xFFFFFFFEu + + + typedef struct NVPW_Device_GetMigAttributes_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + size_t deviceIndex; + /// [out] + NVPA_Bool isMigPartition; + /// [out] + uint32_t gpuInstanceId; + /// [out] + uint32_t computeInstanceId; + } NVPW_Device_GetMigAttributes_Params; +#define NVPW_Device_GetMigAttributes_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetMigAttributes_Params, computeInstanceId) + + NVPA_Status NVPW_Device_GetMigAttributes(NVPW_Device_GetMigAttributes_Params* pParams); + + typedef struct NVPW_Adapter_GetDeviceIndex_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + struct IDXGIAdapter* pAdapter; + /// [in] + size_t sliIndex; + /// [out] + size_t deviceIndex; + } NVPW_Adapter_GetDeviceIndex_Params; +#define NVPW_Adapter_GetDeviceIndex_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Adapter_GetDeviceIndex_Params, deviceIndex) + + NVPA_Status NVPW_Adapter_GetDeviceIndex(NVPW_Adapter_GetDeviceIndex_Params* pParams); + + typedef struct NVPW_CounterData_GetNumRanges_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const uint8_t* pCounterDataImage; + size_t numRanges; + } NVPW_CounterData_GetNumRanges_Params; +#define NVPW_CounterData_GetNumRanges_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetNumRanges_Params, numRanges) + + NVPA_Status NVPW_CounterData_GetNumRanges(NVPW_CounterData_GetNumRanges_Params* pParams); + + typedef struct NVPW_CounterData_GetChipName_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [out] + const char* pChipName; + } NVPW_CounterData_GetChipName_Params; +#define NVPW_CounterData_GetChipName_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetChipName_Params, pChipName) + + NVPA_Status NVPW_CounterData_GetChipName(NVPW_CounterData_GetChipName_Params* pParams); + + typedef struct NVPW_Config_GetNumPasses_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pConfig; + /// [out] + size_t numPipelinedPasses; + /// [out] + size_t numIsolatedPasses; + } NVPW_Config_GetNumPasses_Params; +#define NVPW_Config_GetNumPasses_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetNumPasses_Params, numIsolatedPasses) + + /// Total num passes = numPipelinedPasses + numIsolatedPasses * numNestingLevels + NVPA_Status NVPW_Config_GetNumPasses(NVPW_Config_GetNumPasses_Params* pParams); + + typedef struct NVPW_Config_GetNumPasses_V2_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pConfig; + /// [out] + size_t numPasses; + } NVPW_Config_GetNumPasses_V2_Params; +#define NVPW_Config_GetNumPasses_V2_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetNumPasses_V2_Params, numPasses) + + /// Total num passes = numPasses * numNestingLevels + NVPA_Status NVPW_Config_GetNumPasses_V2(NVPW_Config_GetNumPasses_V2_Params* pParams); + +#define NVPW_API_SET_CUDA_PROFILER 0x18209d0775b2f89dULL + +#define NVPW_API_SET_D3D11_PROFILER 0xca55c6738445db2bULL + +#define NVPW_API_SET_D3D12_PROFILER 0xc0c2d46dd7c7ad78ULL + +#define NVPW_API_SET_EGL_PROFILER 0x3c3747dae1f9565cULL + +#define NVPW_API_SET_GPU_PERIODICSAMPLER 0x9f4c2571fc0b2e8aULL + +#define NVPW_API_SET_METRICSEVALUATOR 0x0368a8768d811af9ULL + +#define NVPW_API_SET_METRICS_AD10X_COMP 0xbe57278e12cb5288ULL + +#define NVPW_API_SET_METRICS_AD10X_GRFX 0x5cbf0774f81bf491ULL + +#define NVPW_API_SET_METRICS_GA100_COMP 0x16b7d8c20d8b4915ULL + +#define NVPW_API_SET_METRICS_GA100_GRFX 0xc94eaabec04a94faULL + +#define NVPW_API_SET_METRICS_GA10X_COMP 0xb5d6391c2e299ab5ULL + +#define NVPW_API_SET_METRICS_GA10X_GRFX 0x6ebc121178b5ce0bULL + +#define NVPW_API_SET_METRICS_GV100_COMP 0x863705cc57919f72ULL + +#define NVPW_API_SET_METRICS_GV100_GRFX 0x9900da75d164fecfULL + +#define NVPW_API_SET_METRICS_GV11B_COMP 0xd3f79a859235848fULL + +#define NVPW_API_SET_METRICS_GV11B_GRFX 0xeb8e26220106e227ULL + +#define NVPW_API_SET_METRICS_TU10X_COMP 0x70f40be0afd35da8ULL + +#define NVPW_API_SET_METRICS_TU10X_GRFX 0xdf219cb838db6968ULL + +#define NVPW_API_SET_METRICS_TU11X_COMP 0xeb0069d7d0956678ULL + +#define NVPW_API_SET_METRICS_TU11X_GRFX 0x0977d9342bd62743ULL + +#define NVPW_API_SET_OPENGL_PROFILER 0xe4cd9ea40f2ee777ULL + +#define NVPW_API_SET_VULKAN_PROFILER 0x8c56b6a03d779689ULL + +#define NVPW_SDK_VERSION 0x1e128b6f001423fcULL + + typedef struct NVPW_QueryVersionNumber_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + uint64_t apiSet; + /// [out] + uint32_t major; + /// [out] + uint32_t minor; + /// [out] + uint32_t patch; + /// [out] + uint32_t relMajor; + /// [out] + uint32_t relMinor; + /// [out] + uint32_t relPatch; + } NVPW_QueryVersionNumber_Params; +#define NVPW_QueryVersionNumber_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_QueryVersionNumber_Params, relPatch) + + /// Query version number of an API set + NVPA_Status NVPW_QueryVersionNumber(NVPW_QueryVersionNumber_Params* pParams); + + typedef enum NVPW_Device_ClockStatus + { + /// clock status is unknown + NVPW_DEVICE_CLOCK_STATUS_UNKNOWN, + /// clocks are locked to rated tdp values + NVPW_DEVICE_CLOCK_STATUS_LOCKED_TO_RATED_TDP, + /// clocks are not locked and can boost above rated tdp + NVPW_DEVICE_CLOCK_STATUS_BOOST_ENABLED, + /// clocks are not locked and will not go above rated tdp + NVPW_DEVICE_CLOCK_STATUS_BOOST_DISABLED, + NVPW_DEVICE_CLOCK_STATUS__COUNT + } NVPW_Device_ClockStatus; + + typedef struct NVPW_Device_GetClockStatus_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + size_t deviceIndex; + /// [in] + NVPW_Device_ClockStatus clockStatus; + } NVPW_Device_GetClockStatus_Params; +#define NVPW_Device_GetClockStatus_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetClockStatus_Params, clockStatus) + + NVPA_Status NVPW_Device_GetClockStatus(NVPW_Device_GetClockStatus_Params* pParams); + + typedef enum NVPW_Device_ClockSetting + { + /// invalid op, specify valid clocks operation during profiling + NVPW_DEVICE_CLOCK_SETTING_INVALID, + /// default to driver/application config (normally unlocked and not boosted, but could be unlocked boosted, or + /// locked to rated TDP) + NVPW_DEVICE_CLOCK_SETTING_DEFAULT, + /// lock clocks at rated tdp base values + NVPW_DEVICE_CLOCK_SETTING_LOCK_TO_RATED_TDP, + NVPW_DEVICE_CLOCK_SETTING__COUNT + } NVPW_Device_ClockSetting; + + typedef struct NVPW_Device_SetClockSetting_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + size_t deviceIndex; + /// [in] + NVPW_Device_ClockSetting clockSetting; + } NVPW_Device_SetClockSetting_Params; +#define NVPW_Device_SetClockSetting_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_SetClockSetting_Params, clockSetting) + + NVPA_Status NVPW_Device_SetClockSetting(NVPW_Device_SetClockSetting_Params* pParams); + + typedef struct NVPW_CounterData_GetRangeDescriptions_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const uint8_t* pCounterDataImage; + size_t rangeIndex; + /// [inout] Number of descriptions allocated in ppDescriptions + size_t numDescriptions; + const char** ppDescriptions; + } NVPW_CounterData_GetRangeDescriptions_Params; +#define NVPW_CounterData_GetRangeDescriptions_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetRangeDescriptions_Params, ppDescriptions) + + NVPA_Status NVPW_CounterData_GetRangeDescriptions(NVPW_CounterData_GetRangeDescriptions_Params* pParams); + + typedef struct NVPW_Profiler_CounterData_GetRangeDescriptions_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + const uint8_t* pCounterDataImage; + size_t rangeIndex; + /// [inout] Number of descriptions allocated in ppDescriptions + size_t numDescriptions; + const char** ppDescriptions; + } NVPW_Profiler_CounterData_GetRangeDescriptions_Params; +#define NVPW_Profiler_CounterData_GetRangeDescriptions_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Profiler_CounterData_GetRangeDescriptions_Params, ppDescriptions) + + NVPA_Status NVPW_Profiler_CounterData_GetRangeDescriptions(NVPW_Profiler_CounterData_GetRangeDescriptions_Params* pParams); + +#ifndef NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED +#define NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED + typedef enum NVPW_PeriodicSampler_CounterData_AppendMode + { + NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_LINEAR = 0, + NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_CIRCULAR = 1, + NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE__COUNT + } NVPW_PeriodicSampler_CounterData_AppendMode; +#endif //NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED + + typedef struct NVPW_PeriodicSampler_CounterData_GetSampleTime_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t rangeIndex; + /// [out] + uint64_t timestampStart; + /// [out] + uint64_t timestampEnd; + } NVPW_PeriodicSampler_CounterData_GetSampleTime_Params; +#define NVPW_PeriodicSampler_CounterData_GetSampleTime_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetSampleTime_Params, timestampEnd) + + NVPA_Status NVPW_PeriodicSampler_CounterData_GetSampleTime(NVPW_PeriodicSampler_CounterData_GetSampleTime_Params* pParams); + + typedef struct NVPW_PeriodicSampler_CounterData_TrimInPlace_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [out] + size_t counterDataImageTrimmedSize; + } NVPW_PeriodicSampler_CounterData_TrimInPlace_Params; +#define NVPW_PeriodicSampler_CounterData_TrimInPlace_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_TrimInPlace_Params, counterDataImageTrimmedSize) + + NVPA_Status NVPW_PeriodicSampler_CounterData_TrimInPlace(NVPW_PeriodicSampler_CounterData_TrimInPlace_Params* pParams); + + typedef struct NVPW_PeriodicSampler_CounterData_GetInfo_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [out] total number of ranges in the counter data + size_t numTotalRanges; + /// [out] if in "linear" mode, this API returns the number of "populated" ranges; if it's in "circular" mode, + /// then it returns the last "populated" range index + 1, when there is no such range, it returns 0. + size_t numPopulatedRanges; + /// [out] if in "linear" mode, this API returns the number of "completed" ranges; if it's in "circular" mode, + /// then it returns the last "completed" range index + 1, when there is no such range, it returns 0. + size_t numCompletedRanges; + } NVPW_PeriodicSampler_CounterData_GetInfo_Params; +#define NVPW_PeriodicSampler_CounterData_GetInfo_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetInfo_Params, numCompletedRanges) + + /// In periodic sampler, a range in counter data stores exactly one sample's data. For better performance, periodic + /// sampler may operate in an out-of-order fashion when populating sample data, i.e. it may not fully populate all + /// counters of a sample/range before starting to populate the next sample/range. As a result, we have two concepts + /// here, "populated" & "completed": a range is considered "populated" even if only partial counters have been + /// written; on the other hand, a range is only considered "completed" if all the collecting counters have been + /// written. + NVPA_Status NVPW_PeriodicSampler_CounterData_GetInfo(NVPW_PeriodicSampler_CounterData_GetInfo_Params* pParams); + + typedef struct NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [in] + size_t rangeIndex; + /// [out] + uint32_t triggerCount; + } NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params; +#define NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params, triggerCount) + + NVPA_Status NVPW_PeriodicSampler_CounterData_GetTriggerCount(NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params* pParams); + + typedef struct NVPW_PeriodicSampler_CounterData_IsDataComplete_Params + { + /// [in] + size_t structSize; + /// [in] assign to NULL + void* pPriv; + /// [in] + const uint8_t* pCounterDataImage; + /// [in] + size_t counterDataImageSize; + /// [in] + size_t rangeIndex; + /// [out] + NVPA_Bool isComplete; + } NVPW_PeriodicSampler_CounterData_IsDataComplete_Params; +#define NVPW_PeriodicSampler_CounterData_IsDataComplete_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_IsDataComplete_Params, isComplete) + + /// Checks whether a given sample's data is complete. See also 'NVPW_PeriodicSampler_CounterData_GetInfo' + NVPA_Status NVPW_PeriodicSampler_CounterData_IsDataComplete(NVPW_PeriodicSampler_CounterData_IsDataComplete_Params* pParams); + + + typedef struct NVPW_TimestampReport + { + uint32_t payload; + uint8_t reserved0004[4]; + uint64_t timestamp; + } NVPW_TimestampReport; + + + + +#ifdef __cplusplus +} // extern "C" +#endif + +#if defined(__GNUC__) && defined(NVPA_SHARED_LIB) + #pragma GCC visibility pop +#endif + +#endif // NVPERF_TARGET_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/lib/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_cupti/lib/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/include/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/include/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/include/nvrtc.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/include/nvrtc.h new file mode 100644 index 0000000000000000000000000000000000000000..8aff162e26860e755addd9d2b221c5365cb89f40 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/include/nvrtc.h @@ -0,0 +1,876 @@ +// +// NVIDIA_COPYRIGHT_BEGIN +// +// Copyright (c) 2014-2024, NVIDIA CORPORATION. All rights reserved. +// +// NVIDIA CORPORATION and its licensors retain all intellectual property +// and proprietary rights in and to this software, related documentation +// and any modifications thereto. Any use, reproduction, disclosure or +// distribution of this software and related documentation without an express +// license agreement from NVIDIA CORPORATION is strictly prohibited. +// +// NVIDIA_COPYRIGHT_END +// + +#ifndef __NVRTC_H__ +#define __NVRTC_H__ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#include + + +/*************************************************************************//** + * + * \defgroup error Error Handling + * + * NVRTC defines the following enumeration type and function for API call + * error handling. + * + ****************************************************************************/ + + +/** + * \ingroup error + * \brief The enumerated type nvrtcResult defines API call result codes. + * NVRTC API functions return nvrtcResult to indicate the call + * result. + */ +typedef enum { + NVRTC_SUCCESS = 0, + NVRTC_ERROR_OUT_OF_MEMORY = 1, + NVRTC_ERROR_PROGRAM_CREATION_FAILURE = 2, + NVRTC_ERROR_INVALID_INPUT = 3, + NVRTC_ERROR_INVALID_PROGRAM = 4, + NVRTC_ERROR_INVALID_OPTION = 5, + NVRTC_ERROR_COMPILATION = 6, + NVRTC_ERROR_BUILTIN_OPERATION_FAILURE = 7, + NVRTC_ERROR_NO_NAME_EXPRESSIONS_AFTER_COMPILATION = 8, + NVRTC_ERROR_NO_LOWERED_NAMES_BEFORE_COMPILATION = 9, + NVRTC_ERROR_NAME_EXPRESSION_NOT_VALID = 10, + NVRTC_ERROR_INTERNAL_ERROR = 11, + NVRTC_ERROR_TIME_FILE_WRITE_FAILED = 12 +} nvrtcResult; + + +/** + * \ingroup error + * \brief nvrtcGetErrorString is a helper function that returns a string + * describing the given nvrtcResult code, e.g., NVRTC_SUCCESS to + * \c "NVRTC_SUCCESS". + * For unrecognized enumeration values, it returns + * \c "NVRTC_ERROR unknown". + * + * \param [in] result CUDA Runtime Compilation API result code. + * \return Message string for the given #nvrtcResult code. + */ +const char *nvrtcGetErrorString(nvrtcResult result); + + +/*************************************************************************//** + * + * \defgroup query General Information Query + * + * NVRTC defines the following function for general information query. + * + ****************************************************************************/ + + +/** + * \ingroup query + * \brief nvrtcVersion sets the output parameters \p major and \p minor + * with the CUDA Runtime Compilation version number. + * + * \param [out] major CUDA Runtime Compilation major version number. + * \param [out] minor CUDA Runtime Compilation minor version number. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * + */ +nvrtcResult nvrtcVersion(int *major, int *minor); + + +/** + * \ingroup query + * \brief nvrtcGetNumSupportedArchs sets the output parameter \p numArchs + * with the number of architectures supported by NVRTC. This can + * then be used to pass an array to ::nvrtcGetSupportedArchs to + * get the supported architectures. + * + * \param [out] numArchs number of supported architectures. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * + * see ::nvrtcGetSupportedArchs + */ +nvrtcResult nvrtcGetNumSupportedArchs(int* numArchs); + + +/** + * \ingroup query + * \brief nvrtcGetSupportedArchs populates the array passed via the output parameter + * \p supportedArchs with the architectures supported by NVRTC. The array is + * sorted in the ascending order. The size of the array to be passed can be + * determined using ::nvrtcGetNumSupportedArchs. + * + * \param [out] supportedArchs sorted array of supported architectures. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * + * see ::nvrtcGetNumSupportedArchs + */ +nvrtcResult nvrtcGetSupportedArchs(int* supportedArchs); + + +/*************************************************************************//** + * + * \defgroup compilation Compilation + * + * NVRTC defines the following type and functions for actual compilation. + * + ****************************************************************************/ + + +/** + * \ingroup compilation + * \brief nvrtcProgram is the unit of compilation, and an opaque handle for + * a program. + * + * To compile a CUDA program string, an instance of nvrtcProgram must be + * created first with ::nvrtcCreateProgram, then compiled with + * ::nvrtcCompileProgram. + */ +typedef struct _nvrtcProgram *nvrtcProgram; + + +/** + * \ingroup compilation + * \brief nvrtcCreateProgram creates an instance of nvrtcProgram with the + * given input parameters, and sets the output parameter \p prog with + * it. + * + * \param [out] prog CUDA Runtime Compilation program. + * \param [in] src CUDA program source. + * \param [in] name CUDA program name.\n + * \p name can be \c NULL; \c "default_program" is + * used when \p name is \c NULL or "". + * \param [in] numHeaders Number of headers used.\n + * \p numHeaders must be greater than or equal to 0. + * \param [in] headers Sources of the headers.\n + * \p headers can be \c NULL when \p numHeaders is + * 0. + * \param [in] includeNames Name of each header by which they can be + * included in the CUDA program source.\n + * \p includeNames can be \c NULL when \p numHeaders + * is 0. These headers must be included with the exact + * names specified here. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_OUT_OF_MEMORY \endlink + * - \link #nvrtcResult NVRTC_ERROR_PROGRAM_CREATION_FAILURE \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcDestroyProgram + */ +nvrtcResult nvrtcCreateProgram(nvrtcProgram *prog, + const char *src, + const char *name, + int numHeaders, + const char * const *headers, + const char * const *includeNames); + + +/** + * \ingroup compilation + * \brief nvrtcDestroyProgram destroys the given program. + * + * \param [in] prog CUDA Runtime Compilation program. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcCreateProgram + */ +nvrtcResult nvrtcDestroyProgram(nvrtcProgram *prog); + + +/** + * \ingroup compilation + * \brief nvrtcCompileProgram compiles the given program. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [in] numOptions Number of compiler options passed. + * \param [in] options Compiler options in the form of C string array.\n + * \p options can be \c NULL when \p numOptions is 0. + * + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_OUT_OF_MEMORY \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_OPTION \endlink + * - \link #nvrtcResult NVRTC_ERROR_COMPILATION \endlink + * - \link #nvrtcResult NVRTC_ERROR_BUILTIN_OPERATION_FAILURE \endlink + * - \link #nvrtcResult NVRTC_ERROR_TIME_FILE_WRITE_FAILED \endlink + * + * It supports compile options listed in \ref options. + */ +nvrtcResult nvrtcCompileProgram(nvrtcProgram prog, + int numOptions, const char * const *options); + + +/** + * \ingroup compilation + * \brief nvrtcGetPTXSize sets the value of \p ptxSizeRet with the size of the PTX + * generated by the previous compilation of \p prog (including the + * trailing \c NULL). + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] ptxSizeRet Size of the generated PTX (including the trailing + * \c NULL). + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetPTX + */ +nvrtcResult nvrtcGetPTXSize(nvrtcProgram prog, size_t *ptxSizeRet); + + +/** + * \ingroup compilation + * \brief nvrtcGetPTX stores the PTX generated by the previous compilation + * of \p prog in the memory pointed by \p ptx. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] ptx Compiled result. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetPTXSize + */ +nvrtcResult nvrtcGetPTX(nvrtcProgram prog, char *ptx); + + +/** + * \ingroup compilation + * \brief nvrtcGetCUBINSize sets the value of \p cubinSizeRet with the size of the cubin + * generated by the previous compilation of \p prog. The value of + * cubinSizeRet is set to 0 if the value specified to \c -arch is a + * virtual architecture instead of an actual architecture. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] cubinSizeRet Size of the generated cubin. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetCUBIN + */ +nvrtcResult nvrtcGetCUBINSize(nvrtcProgram prog, size_t *cubinSizeRet); + + +/** + * \ingroup compilation + * \brief nvrtcGetCUBIN stores the cubin generated by the previous compilation + * of \p prog in the memory pointed by \p cubin. No cubin is available + * if the value specified to \c -arch is a virtual architecture instead + * of an actual architecture. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] cubin Compiled and assembled result. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetCUBINSize + */ +nvrtcResult nvrtcGetCUBIN(nvrtcProgram prog, char *cubin); + + +#if defined(_WIN32) +# define __DEPRECATED__(msg) __declspec(deprecated(msg)) +#elif (defined(__GNUC__) && (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 5 && !defined(__clang__)))) +# define __DEPRECATED__(msg) __attribute__((deprecated)) +#elif (defined(__GNUC__)) +# define __DEPRECATED__(msg) __attribute__((deprecated(msg))) +#else +# define __DEPRECATED__(msg) +#endif + +/** + * \ingroup compilation + * \brief + * DEPRECATION NOTICE: This function will be removed in a future release. Please use + * nvrtcGetLTOIRSize (and nvrtcGetLTOIR) instead. + */ +__DEPRECATED__("This function will be removed in a future release. Please use nvrtcGetLTOIRSize instead") +nvrtcResult nvrtcGetNVVMSize(nvrtcProgram prog, size_t *nvvmSizeRet); + +/** + * \ingroup compilation + * \brief + * DEPRECATION NOTICE: This function will be removed in a future release. Please use + * nvrtcGetLTOIR (and nvrtcGetLTOIRSize) instead. + */ +__DEPRECATED__("This function will be removed in a future release. Please use nvrtcGetLTOIR instead") +nvrtcResult nvrtcGetNVVM(nvrtcProgram prog, char *nvvm); + +#undef __DEPRECATED__ + +/** + * \ingroup compilation + * \brief nvrtcGetLTOIRSize sets the value of \p LTOIRSizeRet with the size of the LTO IR + * generated by the previous compilation of \p prog. The value of + * LTOIRSizeRet is set to 0 if the program was not compiled with + * \c -dlto. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] LTOIRSizeRet Size of the generated LTO IR. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetLTOIR + */ +nvrtcResult nvrtcGetLTOIRSize(nvrtcProgram prog, size_t *LTOIRSizeRet); + + +/** + * \ingroup compilation + * \brief nvrtcGetLTOIR stores the LTO IR generated by the previous compilation + * of \p prog in the memory pointed by \p LTOIR. No LTO IR is available + * if the program was compiled without \c -dlto. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] LTOIR Compiled result. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetLTOIRSize + */ +nvrtcResult nvrtcGetLTOIR(nvrtcProgram prog, char *LTOIR); + + +/** + * \ingroup compilation + * \brief nvrtcGetOptiXIRSize sets the value of \p optixirSizeRet with the size of the OptiX IR + * generated by the previous compilation of \p prog. The value of + * nvrtcGetOptiXIRSize is set to 0 if the program was compiled with + * options incompatible with OptiX IR generation. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] optixirSizeRet Size of the generated LTO IR. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetOptiXIR + */ +nvrtcResult nvrtcGetOptiXIRSize(nvrtcProgram prog, size_t *optixirSizeRet); + + +/** + * \ingroup compilation + * \brief nvrtcGetOptiXIR stores the OptiX IR generated by the previous compilation + * of \p prog in the memory pointed by \p optixir. No OptiX IR is available + * if the program was compiled with options incompatible with OptiX IR generation. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] Optix IR Compiled result. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetOptiXIRSize + */ +nvrtcResult nvrtcGetOptiXIR(nvrtcProgram prog, char *optixir); + +/** + * \ingroup compilation + * \brief nvrtcGetProgramLogSize sets \p logSizeRet with the size of the + * log generated by the previous compilation of \p prog (including the + * trailing \c NULL). + * + * Note that compilation log may be generated with warnings and informative + * messages, even when the compilation of \p prog succeeds. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] logSizeRet Size of the compilation log + * (including the trailing \c NULL). + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetProgramLog + */ +nvrtcResult nvrtcGetProgramLogSize(nvrtcProgram prog, size_t *logSizeRet); + + +/** + * \ingroup compilation + * \brief nvrtcGetProgramLog stores the log generated by the previous + * compilation of \p prog in the memory pointed by \p log. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [out] log Compilation log. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * + * \see ::nvrtcGetProgramLogSize + */ +nvrtcResult nvrtcGetProgramLog(nvrtcProgram prog, char *log); + + +/** + * \ingroup compilation + * \brief nvrtcAddNameExpression notes the given name expression + * denoting the address of a __global__ function + * or __device__/__constant__ variable. + * + * The identical name expression string must be provided on a subsequent + * call to nvrtcGetLoweredName to extract the lowered name. + * \param [in] prog CUDA Runtime Compilation program. + * \param [in] name_expression constant expression denoting the address of + * a __global__ function or __device__/__constant__ variable. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_NO_NAME_EXPRESSIONS_AFTER_COMPILATION \endlink + * + * \see ::nvrtcGetLoweredName + */ +nvrtcResult nvrtcAddNameExpression(nvrtcProgram prog, + const char * const name_expression); + +/** + * \ingroup compilation + * \brief nvrtcGetLoweredName extracts the lowered (mangled) name + * for a __global__ function or __device__/__constant__ variable, + * and updates *lowered_name to point to it. The memory containing + * the name is released when the NVRTC program is destroyed by + * nvrtcDestroyProgram. + * The identical name expression must have been previously + * provided to nvrtcAddNameExpression. + * + * \param [in] prog CUDA Runtime Compilation program. + * \param [in] name_expression constant expression denoting the address of + * a __global__ function or __device__/__constant__ variable. + * \param [out] lowered_name initialized by the function to point to a + * C string containing the lowered (mangled) + * name corresponding to the provided name expression. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_NO_LOWERED_NAMES_BEFORE_COMPILATION \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_PROGRAM \endlink + * - \link #nvrtcResult NVRTC_ERROR_INVALID_INPUT \endlink + * - \link #nvrtcResult NVRTC_ERROR_NAME_EXPRESSION_NOT_VALID \endlink + * + * \see ::nvrtcAddNameExpression + */ +nvrtcResult nvrtcGetLoweredName(nvrtcProgram prog, + const char *const name_expression, + const char** lowered_name); + + +/** + * \defgroup options Supported Compile Options + * + * NVRTC supports the compile options below. + * Option names with two preceding dashs (\c --) are long option names and + * option names with one preceding dash (\c -) are short option names. + * Short option names can be used instead of long option names. + * When a compile option takes an argument, an assignment operator (\c =) + * is used to separate the compile option argument from the compile option + * name, e.g., \c "--gpu-architecture=compute_60". + * Alternatively, the compile option name and the argument can be specified in + * separate strings without an assignment operator, .e.g, + * \c "--gpu-architecture" \c "compute_60". + * Single-character short option names, such as \c -D, \c -U, and \c -I, do + * not require an assignment operator, and the compile option name and the + * argument can be present in the same string with or without spaces between + * them. + * For instance, \c "-D=", \c "-D", and \c "-D " are all + * supported. + * + * The valid compiler options are: + * + * - Compilation targets + * - \c --gpu-architecture=\ (\c -arch)\n + * Specify the name of the class of GPU architectures for which the + * input must be compiled.\n + * - Valid \s: + * - \c compute_50 + * - \c compute_52 + * - \c compute_53 + * - \c compute_60 + * - \c compute_61 + * - \c compute_62 + * - \c compute_70 + * - \c compute_72 + * - \c compute_75 + * - \c compute_80 + * - \c compute_87 + * - \c compute_89 + * - \c compute_90 + * - \c compute_90a + * - \c sm_50 + * - \c sm_52 + * - \c sm_53 + * - \c sm_60 + * - \c sm_61 + * - \c sm_62 + * - \c sm_70 + * - \c sm_72 + * - \c sm_75 + * - \c sm_80 + * - \c sm_87 + * - \c sm_89 + * - \c sm_90 + * - \c sm_90a + * - Default: \c compute_52 + * - Separate compilation / whole-program compilation + * - \c --device-c (\c -dc)\n + * Generate relocatable code that can be linked with other relocatable + * device code. It is equivalent to --relocatable-device-code=true. + * - \c --device-w (\c -dw)\n + * Generate non-relocatable code. It is equivalent to + * \c --relocatable-device-code=false. + * - \c --relocatable-device-code={true|false} (\c -rdc)\n + * Enable (disable) the generation of relocatable device code. + * - Default: \c false + * - \c --extensible-whole-program (\c -ewp)\n + * Do extensible whole program compilation of device code. + * - Default: \c false + * - Debugging support + * - \c --device-debug (\c -G)\n + * Generate debug information. If --dopt is not specified, + * then turns off all optimizations. + * - \c --generate-line-info (\c -lineinfo)\n + * Generate line-number information. + * - Code generation + * - \c --dopt on (\c -dopt)\n + * - \c --dopt=on \n + * Enable device code optimization. When specified along with '-G', enables + * limited debug information generation for optimized device code (currently, + * only line number information). + * When '-G' is not specified, '-dopt=on' is implicit. + * - \c --ptxas-options \ (\c -Xptxas)\n + * - \c --ptxas-options=\ \n + * Specify options directly to ptxas, the PTX optimizing assembler. + * - \c --maxrregcount=\ (\c -maxrregcount)\n + * Specify the maximum amount of registers that GPU functions can use. + * Until a function-specific limit, a higher value will generally + * increase the performance of individual GPU threads that execute this + * function. However, because thread registers are allocated from a + * global register pool on each GPU, a higher value of this option will + * also reduce the maximum thread block size, thereby reducing the amount + * of thread parallelism. Hence, a good maxrregcount value is the result + * of a trade-off. If this option is not specified, then no maximum is + * assumed. Value less than the minimum registers required by ABI will + * be bumped up by the compiler to ABI minimum limit. + * - \c --ftz={true|false} (\c -ftz)\n + * When performing single-precision floating-point operations, flush + * denormal values to zero or preserve denormal values. + * \c --use_fast_math implies \c --ftz=true. + * - Default: \c false + * - \c --prec-sqrt={true|false} (\c -prec-sqrt)\n + * For single-precision floating-point square root, use IEEE + * round-to-nearest mode or use a faster approximation. + * \c --use_fast_math implies \c --prec-sqrt=false. + * - Default: \c true + * - \c --prec-div={true|false} (\c -prec-div)\n + * For single-precision floating-point division and reciprocals, use IEEE + * round-to-nearest mode or use a faster approximation. + * \c --use_fast_math implies \c --prec-div=false. + * - Default: \c true + * - \c --fmad={true|false} (\c -fmad)\n + * Enables (disables) the contraction of floating-point multiplies and + * adds/subtracts into floating-point multiply-add operations (FMAD, + * FFMA, or DFMA). \c --use_fast_math implies \c --fmad=true. + * - Default: \c true + * - \c --use_fast_math (\c -use_fast_math)\n + * Make use of fast math operations. + * \c --use_fast_math implies \c --ftz=true \c --prec-div=false + * \c --prec-sqrt=false \c --fmad=true. + * - \c --extra-device-vectorization (\c -extra-device-vectorization)\n + * Enables more aggressive device code vectorization in the NVVM optimizer. + * - \c --modify-stack-limit={true|false} (\c -modify-stack-limit)\n + * On Linux, during compilation, use \c setrlimit() to increase stack size + * to maximum allowed. The limit is reset to the previous value at the + * end of compilation. + * Note: \c setrlimit() changes the value for the entire process. + * - Default: \c true + * - \c --dlink-time-opt (\c -dlto)\n + * Generate intermediate code for later link-time optimization. + * It implies \c -rdc=true. + * Note: when this option is used the nvrtcGetLTOIR API should be used, + * as PTX or Cubin will not be generated. + * - \c --gen-opt-lto (\c -gen-opt-lto)\n + * Run the optimizer passes before generating the LTO IR. + * - \c --optix-ir (\c -optix-ir)\n + * Generate OptiX IR. The Optix IR is only intended for consumption by OptiX + * through appropriate APIs. This feature is not supported with + * link-time-optimization (\c -dlto)\n. + * Note: when this option is used the nvrtcGetOptiX API should be used, + * as PTX or Cubin will not be generated. + * - \c --jump-table-density=[0-101] (\c -jtd)\n + * Specify the case density percentage in switch statements, and use it as + * a minimal threshold to determine whether jump table(brx.idx instruction) + * will be used to implement a switch statement. Default value is 101. The + * percentage ranges from 0 to 101 inclusively. + * - \c --device-stack-protector={true|false} (\c -device-stack-protector)\n + * Enable (disable) the generation of stack canaries in device code.\n + * - Default: \c false + * - Preprocessing + * - \c --define-macro=\ (\c -D)\n + * \c \ can be either \c \ or \c \. + * - \c \ \n + * Predefine \c \ as a macro with definition \c 1. + * - \c \=\ \n + * The contents of \c \ are tokenized and preprocessed + * as if they appeared during translation phase three in a \c \#define + * directive. In particular, the definition will be truncated by + * embedded new line characters. + * - \c --undefine-macro=\ (\c -U)\n + * Cancel any previous definition of \c \. + * - \c --include-path=\ (\c -I)\n + * Add the directory \c \ to the list of directories to be + * searched for headers. These paths are searched after the list of + * headers given to ::nvrtcCreateProgram. + * - \c --pre-include=\ (\c -include)\n + * Preinclude \c \ during preprocessing. + * - \c --no-source-include (\c -no-source-include) + * The preprocessor by default adds the directory of each input sources + * to the include path. This option disables this feature and only + * considers the path specified explicitly. + * - Language Dialect + * - \c --std={c++03|c++11|c++14|c++17|c++20} + * (\c -std={c++11|c++14|c++17|c++20})\n + * Set language dialect to C++03, C++11, C++14, C++17 or C++20 + * - Default: \c c++17 + * - \c --builtin-move-forward={true|false} (\c -builtin-move-forward)\n + * Provide builtin definitions of \c std::move and \c std::forward, + * when C++11 or later language dialect is selected. + * - Default: \c true + * - \c --builtin-initializer-list={true|false} + * (\c -builtin-initializer-list)\n + * Provide builtin definitions of \c std::initializer_list class and + * member functions when C++11 or later language dialect is selected. + * - Default: \c true + * - Misc. + * - \c --disable-warnings (\c -w)\n + * Inhibit all warning messages. + * - \c --restrict (\c -restrict)\n + * Programmer assertion that all kernel pointer parameters are restrict + * pointers. + * - \c --device-as-default-execution-space + * (\c -default-device)\n + * Treat entities with no execution space annotation as \c __device__ + * entities. + * - \c --device-int128 (\c -device-int128)\n + * Allow the \c __int128 type in device code. Also causes the macro \c __CUDACC_RTC_INT128__ + * to be defined. + * - \c --optimization-info=\ (\c -opt-info)\n + * Provide optimization reports for the specified kind of optimization. + * The following kind tags are supported: + * - \c inline : emit a remark when a function is inlined. + * - \c --display-error-number (\c -err-no)\n + * Display diagnostic number for warning messages. (Default) + * - \c --no-display-error-number (\c -no-err-no)\n + * Disables the display of a diagnostic number for warning messages. + * - \c --diag-error=,... (\c -diag-error)\n + * Emit error for specified diagnostic message number(s). Message numbers can be separated by comma. + * - \c --diag-suppress=,... (\c -diag-suppress)\n + * Suppress specified diagnostic message number(s). Message numbers can be separated by comma. + * - \c --diag-warn=,... (\c -diag-warn)\n + * Emit warning for specified diagnostic message number(s). Message numbers can be separated by comma. + * - \c --brief-diagnostics={true|false} (\c -brief-diag)\n + * This option disables or enables showing source line and column info + * in a diagnostic. + * The --brief-diagnostics=true will not show the source line and column info. + * - Default: \c false + * - \c --time= (\c -time)\n + * Generate a comma separated value table with the time taken by each compilation + * phase, and append it at the end of the file given as the option argument. + * If the file does not exist, the column headings are generated in the first row + * of the table. If the file name is '-', the timing data is written to the compilation log. + * - \c --split-compile= (\c -split-compile=)\n + * Perform compiler optimizations in parallel. + * Split compilation attempts to reduce compile time by enabling the compiler to run certain + * optimization passes concurrently. This option accepts a numerical value that specifies the + * maximum number of threads the compiler can use. One can also allow the compiler to use the maximum + * threads available on the system by setting --split-compile=0. + * Setting --split-compile=1 will cause this option to be ignored. + * - \c --fdevice-syntax-only (\c -fdevice-syntax-only)\n + * Ends device compilation after front-end syntax checking. This option does not generate valid + * device code. + * - \c --minimal (\c -minimal)\n + * Omit certain language features to reduce compile time for small programs. + * In particular, the following are omitted: + * - Texture and surface functions and associated types, e.g., \c cudaTextureObject_t. + * - CUDA Runtime Functions that are provided by the cudadevrt device code library, + * typically named with prefix "cuda", e.g., \c cudaMalloc. + * - Kernel launch from device code. + * - Types and macros associated with CUDA Runtime and Driver APIs, + * provided by cuda/tools/cudart/driver_types.h, typically named with prefix "cuda", e.g., \c cudaError_t. + * - \c --device-stack-protector (\c -device-stack-protector)\n + * Enable stack canaries in device code. + * Stack canaries make it more difficult to exploit certain types of memory safety bugs involving stack-local variables. + * The compiler uses heuristics to assess the risk of such a bug in each function. Only those functions which are deemed high-risk make use of a stack canary. + * + */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + + +/* The utility function 'nvrtcGetTypeName' is not available by default. Define + the macro 'NVRTC_GET_TYPE_NAME' to a non-zero value to make it available. +*/ + +#if NVRTC_GET_TYPE_NAME || __DOXYGEN_ONLY__ + +#if NVRTC_USE_CXXABI || __clang__ || __GNUC__ || __DOXYGEN_ONLY__ +#include +#include + +#elif defined(_WIN32) +#include +#include +#endif /* NVRTC_USE_CXXABI || __clang__ || __GNUC__ */ + + +#include +#include + +template struct __nvrtcGetTypeName_helper_t { }; + +/*************************************************************************//** + * + * \defgroup hosthelper Host Helper + * + * NVRTC defines the following functions for easier interaction with host code. + * + ****************************************************************************/ + +/** + * \ingroup hosthelper + * \brief nvrtcGetTypeName stores the source level name of a type in the given + * std::string location. + * + * This function is only provided when the macro NVRTC_GET_TYPE_NAME is + * defined with a non-zero value. It uses abi::__cxa_demangle or UnDecorateSymbolName + * function calls to extract the type name, when using gcc/clang or cl.exe compilers, + * respectively. If the name extraction fails, it will return NVRTC_INTERNAL_ERROR, + * otherwise *result is initialized with the extracted name. + * + * Windows-specific notes: + * - nvrtcGetTypeName() is not multi-thread safe because it calls UnDecorateSymbolName(), + * which is not multi-thread safe. + * - The returned string may contain Microsoft-specific keywords such as __ptr64 and __cdecl. + * + * \param [in] tinfo: reference to object of type std::type_info for a given type. + * \param [in] result: pointer to std::string in which to store the type name. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INTERNAL_ERROR \endlink + * + */ +inline nvrtcResult nvrtcGetTypeName(const std::type_info &tinfo, std::string *result) +{ +#if USE_CXXABI || __clang__ || __GNUC__ + const char *name = tinfo.name(); + int status; + char *undecorated_name = abi::__cxa_demangle(name, 0, 0, &status); + if (status == 0) { + *result = undecorated_name; + free(undecorated_name); + return NVRTC_SUCCESS; + } +#elif defined(_WIN32) + const char *name = tinfo.raw_name(); + if (!name || *name != '.') { + return NVRTC_ERROR_INTERNAL_ERROR; + } + char undecorated_name[4096]; + //name+1 skips over the '.' prefix + if(UnDecorateSymbolName(name+1, undecorated_name, + sizeof(undecorated_name) / sizeof(*undecorated_name), + //note: doesn't seem to work correctly without UNDNAME_NO_ARGUMENTS. + UNDNAME_NO_ARGUMENTS | UNDNAME_NAME_ONLY ) ) { + *result = undecorated_name; + return NVRTC_SUCCESS; + } +#endif /* USE_CXXABI || __clang__ || __GNUC__ */ + + return NVRTC_ERROR_INTERNAL_ERROR; +} + +/** + * \ingroup hosthelper + * \brief nvrtcGetTypeName stores the source level name of the template type argument + * T in the given std::string location. + * + * This function is only provided when the macro NVRTC_GET_TYPE_NAME is + * defined with a non-zero value. It uses abi::__cxa_demangle or UnDecorateSymbolName + * function calls to extract the type name, when using gcc/clang or cl.exe compilers, + * respectively. If the name extraction fails, it will return NVRTC_INTERNAL_ERROR, + * otherwise *result is initialized with the extracted name. + * + * Windows-specific notes: + * - nvrtcGetTypeName() is not multi-thread safe because it calls UnDecorateSymbolName(), + * which is not multi-thread safe. + * - The returned string may contain Microsoft-specific keywords such as __ptr64 and __cdecl. + * + * \param [in] result: pointer to std::string in which to store the type name. + * \return + * - \link #nvrtcResult NVRTC_SUCCESS \endlink + * - \link #nvrtcResult NVRTC_ERROR_INTERNAL_ERROR \endlink + * + */ + +template +nvrtcResult nvrtcGetTypeName(std::string *result) +{ + nvrtcResult res = nvrtcGetTypeName(typeid(__nvrtcGetTypeName_helper_t), + result); + if (res != NVRTC_SUCCESS) + return res; + + std::string repr = *result; + std::size_t idx = repr.find("__nvrtcGetTypeName_helper_t"); + idx = (idx != std::string::npos) ? repr.find("<", idx) : idx; + std::size_t last_idx = repr.find_last_of('>'); + if (idx == std::string::npos || last_idx == std::string::npos) { + return NVRTC_ERROR_INTERNAL_ERROR; + } + ++idx; + *result = repr.substr(idx, last_idx - idx); + return NVRTC_SUCCESS; +} + +#endif /* NVRTC_GET_TYPE_NAME */ + +#endif /* __NVRTC_H__ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/lib/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_nvrtc/lib/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/__init__.py b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/__init__.py new file mode 100644 index 0000000000000000000000000000000000000000..e69de29bb2d1d6434b8b29ae775ad8c2e48c5391 diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/builtin_types.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/builtin_types.h new file mode 100644 index 0000000000000000000000000000000000000000..5247c40807f0dd36a886513ab1bff5d2977364db --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/builtin_types.h @@ -0,0 +1,64 @@ +/* + * Copyright 1993-2014 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +/******************************************************************************* +* * +* * +* * +*******************************************************************************/ + +#include "device_types.h" +#if !defined(__CUDACC_RTC__) +#define EXCLUDE_FROM_RTC +#include "driver_types.h" +#undef EXCLUDE_FROM_RTC +#endif /* !__CUDACC_RTC__ */ +#include "surface_types.h" +#include "texture_types.h" +#include "vector_types.h" diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/channel_descriptor.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/channel_descriptor.h new file mode 100644 index 0000000000000000000000000000000000000000..c6f039db8effce996015f901562009ebe976d832 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/channel_descriptor.h @@ -0,0 +1,588 @@ +/* + * Copyright 1993-2012 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#if !defined(__CHANNEL_DESCRIPTOR_H__) +#define __CHANNEL_DESCRIPTOR_H__ + +#if defined(__cplusplus) + +/******************************************************************************* +* * +* * +* * +*******************************************************************************/ + +#include "cuda_runtime_api.h" + +/******************************************************************************* +* * +* * +* * +*******************************************************************************/ + +/** + * \addtogroup CUDART_HIGHLEVEL + * + * @{ + */ + +/** + * \brief \hl Returns a channel descriptor using the specified format + * + * Returns a channel descriptor with format \p f and number of bits of each + * component \p x, \p y, \p z, and \p w. The ::cudaChannelFormatDesc is + * defined as: + * \code + struct cudaChannelFormatDesc { + int x, y, z, w; + enum cudaChannelFormatKind f; + }; + * \endcode + * + * where ::cudaChannelFormatKind is one of ::cudaChannelFormatKindSigned, + * ::cudaChannelFormatKindUnsigned, cudaChannelFormatKindFloat, + * ::cudaChannelFormatKindSignedNormalized8X1, ::cudaChannelFormatKindSignedNormalized8X2, + * ::cudaChannelFormatKindSignedNormalized8X4, + * ::cudaChannelFormatKindUnsignedNormalized8X1, ::cudaChannelFormatKindUnsignedNormalized8X2, + * ::cudaChannelFormatKindUnsignedNormalized8X4, + * ::cudaChannelFormatKindSignedNormalized16X1, ::cudaChannelFormatKindSignedNormalized16X2, + * ::cudaChannelFormatKindSignedNormalized16X4, + * ::cudaChannelFormatKindUnsignedNormalized16X1, ::cudaChannelFormatKindUnsignedNormalized16X2, + * ::cudaChannelFormatKindUnsignedNormalized16X4 + * or ::cudaChannelFormatKindNV12. + * + * The format is specified by the template specialization. + * + * The template function specializes for the following scalar types: + * char, signed char, unsigned char, short, unsigned short, int, unsigned int, long, unsigned long, and float. + * The template function specializes for the following vector types: + * char{1|2|4}, uchar{1|2|4}, short{1|2|4}, ushort{1|2|4}, int{1|2|4}, uint{1|2|4}, long{1|2|4}, ulong{1|2|4}, float{1|2|4}. + * The template function specializes for following cudaChannelFormatKind enum values: + * ::cudaChannelFormatKind{Uns|S}ignedNormalized{8|16}X{1|2|4}, and ::cudaChannelFormatKindNV12. + * + * Invoking the function on a type without a specialization defaults to creating a channel format of kind ::cudaChannelFormatKindNone + * + * \return + * Channel descriptor with format \p f + * + * \sa \ref ::cudaCreateChannelDesc(int,int,int,int,cudaChannelFormatKind) "cudaCreateChannelDesc (Low level)", + * ::cudaGetChannelDesc, + */ +template __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(0, 0, 0, 0, cudaChannelFormatKindNone); +} + +static __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDescHalf(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindFloat); +} + +static __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDescHalf1(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindFloat); +} + +static __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDescHalf2(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindFloat); +} + +static __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDescHalf4(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindFloat); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(char) * 8; + +#if defined(_CHAR_UNSIGNED) || defined(__CHAR_UNSIGNED__) + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +#else /* _CHAR_UNSIGNED || __CHAR_UNSIGNED__ */ + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +#endif /* _CHAR_UNSIGNED || __CHAR_UNSIGNED__ */ +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(signed char) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned char) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(signed char) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned char) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(signed char) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned char) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(signed char) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned char) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(short) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(short) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned short) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(int) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned int) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(int) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned int) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(int) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned int) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(int) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned int) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindUnsigned); +} + +#if !defined(__LP64__) + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(long) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned long) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(long) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned long) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(long) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned long) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindUnsigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(long) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindSigned); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(unsigned long) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindUnsigned); +} + +#endif /* !__LP64__ */ + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(float) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindFloat); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(float) * 8; + + return cudaCreateChannelDesc(e, 0, 0, 0, cudaChannelFormatKindFloat); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(float) * 8; + + return cudaCreateChannelDesc(e, e, 0, 0, cudaChannelFormatKindFloat); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + int e = (int)sizeof(float) * 8; + + return cudaCreateChannelDesc(e, e, e, e, cudaChannelFormatKindFloat); +} + +static __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDescNV12(void) +{ + int e = (int)sizeof(char) * 8; + + return cudaCreateChannelDesc(e, e, e, 0, cudaChannelFormatKindNV12); +} + +template __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(0, 0, 0, 0, cudaChannelFormatKindNone); +} + +/* Signed 8-bit normalized integer formats */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 0, 0, 0, cudaChannelFormatKindSignedNormalized8X1); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 0, 0, cudaChannelFormatKindSignedNormalized8X2); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindSignedNormalized8X4); +} + +/* Unsigned 8-bit normalized integer formats */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 0, 0, 0, cudaChannelFormatKindUnsignedNormalized8X1); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 0, 0, cudaChannelFormatKindUnsignedNormalized8X2); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedNormalized8X4); +} + +/* Signed 16-bit normalized integer formats */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 0, 0, 0, cudaChannelFormatKindSignedNormalized16X1); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 0, 0, cudaChannelFormatKindSignedNormalized16X2); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 16, 16, cudaChannelFormatKindSignedNormalized16X4); +} + +/* Unsigned 16-bit normalized integer formats */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 0, 0, 0, cudaChannelFormatKindUnsignedNormalized16X1); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 0, 0, cudaChannelFormatKindUnsignedNormalized16X2); +} + +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 16, 16, cudaChannelFormatKindUnsignedNormalized16X4); +} + +/* NV12 format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 0, cudaChannelFormatKindNV12); +} + +/* BC1 format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed1); +} + +/* BC1sRGB format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed1SRGB); +} + +/* BC2 format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed2); +} + +/* BC2sRGB format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed2SRGB); +} + +/* BC3 format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed3); +} + +/* BC3sRGB format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed3SRGB); +} + +/* BC4 unsigned format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 0, 0, 0, cudaChannelFormatKindUnsignedBlockCompressed4); +} + +/* BC4 signed format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 0, 0, 0, cudaChannelFormatKindSignedBlockCompressed4); +} + +/* BC5 unsigned format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 0, 0, cudaChannelFormatKindUnsignedBlockCompressed5); +} + +/* BC5 signed format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 0, 0, cudaChannelFormatKindSignedBlockCompressed5); +} + +/* BC6H unsigned format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 16, 0, cudaChannelFormatKindUnsignedBlockCompressed6H); +} + +/* BC6H signed format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(16, 16, 16, 0, cudaChannelFormatKindSignedBlockCompressed6H); +} + +/* BC7 format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed7); +} + +/* BC7sRGB format */ +template<> __inline__ __host__ cudaChannelFormatDesc cudaCreateChannelDesc(void) +{ + return cudaCreateChannelDesc(8, 8, 8, 8, cudaChannelFormatKindUnsignedBlockCompressed7SRGB); +} + +#endif /* __cplusplus */ + +/** @} */ +/** @} */ /* END CUDART_TEXTURE_HL */ + +#endif /* !__CHANNEL_DESCRIPTOR_H__ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/common_functions.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/common_functions.h new file mode 100644 index 0000000000000000000000000000000000000000..5f8ea3d242640f2196b789c7da6c05d2ed1bed3e --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/common_functions.h @@ -0,0 +1,65 @@ +/* + * Copyright 1993-2018 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#if !defined(__CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__) +#if defined(_MSC_VER) +#pragma message("common_functions.h is an internal header file and must not be used directly. This file will be removed in a future CUDA release. Please use cuda_runtime_api.h or cuda_runtime.h instead.") +#else +#warning "common_functions.h is an internal header file and must not be used directly. This file will be removed in a future CUDA release. Please use cuda_runtime_api.h or cuda_runtime.h instead." +#endif +#define __CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__ +#define __UNDEF_CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS_COMMON_FUNCTIONS_H_WRAPPER__ +#endif + +#include "crt/common_functions.h" + +#if defined(__UNDEF_CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS_COMMON_FUNCTIONS_H_WRAPPER__) +#undef __CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS__ +#undef __UNDEF_CUDA_INCLUDE_COMPILER_INTERNAL_HEADERS_COMMON_FUNCTIONS_H_WRAPPER__ +#endif diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups.h new file mode 100644 index 0000000000000000000000000000000000000000..0532a97bbaba37b6aa8540426d9d89adef6f4612 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups.h @@ -0,0 +1,1743 @@ +/* + * Copyright 1993-2021 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _COOPERATIVE_GROUPS_H_ +#define _COOPERATIVE_GROUPS_H_ + +#if defined(__cplusplus) && defined(__CUDACC__) + +#include "cooperative_groups/details/info.h" +#include "cooperative_groups/details/driver_abi.h" +#include "cooperative_groups/details/helpers.h" +#include "cooperative_groups/details/memory.h" + +#if defined(_CG_HAS_STL_ATOMICS) +#include +#define _CG_THREAD_SCOPE(scope) _CG_STATIC_CONST_DECL cuda::thread_scope thread_scope = scope; +#else +#define _CG_THREAD_SCOPE(scope) +#endif + +_CG_BEGIN_NAMESPACE + +namespace details { + _CG_CONST_DECL unsigned int coalesced_group_id = 1; + _CG_CONST_DECL unsigned int multi_grid_group_id = 2; + _CG_CONST_DECL unsigned int grid_group_id = 3; + _CG_CONST_DECL unsigned int thread_block_id = 4; + _CG_CONST_DECL unsigned int multi_tile_group_id = 5; + _CG_CONST_DECL unsigned int cluster_group_id = 6; +} + +/** + * class thread_group; + * + * Generic thread group type, into which all groups are convertible. + * It acts as a container for all storage necessary for the derived groups, + * and will dispatch the API calls to the correct derived group. This means + * that all derived groups must implement the same interface as thread_group. + */ +class thread_group +{ +protected: + struct group_data { + unsigned int _unused : 1; + unsigned int type : 7, : 0; + }; + + struct gg_data { + details::grid_workspace *gridWs; + }; + +#if defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) + struct mg_data { + unsigned long long _unused : 1; + unsigned long long type : 7; + unsigned long long handle : 56; + const details::multi_grid::multi_grid_functions *functions; + }; +#endif + + struct tg_data { + unsigned int is_tiled : 1; + unsigned int type : 7; + unsigned int size : 24; + // packed to 4b + unsigned int metaGroupSize : 16; + unsigned int metaGroupRank : 16; + // packed to 8b + unsigned int mask; + // packed to 12b + unsigned int _res; + }; + + friend _CG_QUALIFIER thread_group tiled_partition(const thread_group& parent, unsigned int tilesz); + friend class thread_block; + + union __align__(8) { + group_data group; + tg_data coalesced; + gg_data grid; +#if defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) + mg_data multi_grid; +#endif + } _data; + + _CG_QUALIFIER thread_group operator=(const thread_group& src); + + _CG_QUALIFIER thread_group(unsigned int type) { + _data.group.type = type; + _data.group._unused = false; + } + +#ifdef _CG_CPP11_FEATURES + static_assert(sizeof(tg_data) <= 16, "Failed size check"); + static_assert(sizeof(gg_data) <= 16, "Failed size check"); +# ifdef _CG_ABI_EXPERIMENTAL + static_assert(sizeof(mg_data) <= 16, "Failed size check"); +# endif +#endif + +public: + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_device) + + _CG_QUALIFIER unsigned long long size() const; + _CG_QUALIFIER unsigned long long num_threads() const; + _CG_QUALIFIER unsigned long long thread_rank() const; + _CG_QUALIFIER void sync() const; + _CG_QUALIFIER unsigned int get_type() const { + return _data.group.type; + } + +}; + +template +struct thread_group_base : public thread_group { + _CG_QUALIFIER thread_group_base() : thread_group(TyId) {} + _CG_STATIC_CONST_DECL unsigned int id = TyId; +}; + +#if defined(_CG_HAS_MULTI_GRID_GROUP) + +/** + * class multi_grid_group; + * + * Threads within this this group are guaranteed to be co-resident on the + * same system, on multiple devices within the same launched kernels. + * To use this group, the kernel must have been launched with + * cuLaunchCooperativeKernelMultiDevice (or the CUDA Runtime equivalent), + * and the device must support it (queryable device attribute). + * + * Constructed via this_multi_grid(); + */ + + +# if defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) +class multi_grid_group; + +// Multi grid group requires these functions to be templated to prevent ptxas from trying to use CG syscalls +template +__device__ _CG_DEPRECATED multi_grid_group this_multi_grid(); + +class multi_grid_group : public thread_group_base +{ +private: + template + _CG_QUALIFIER multi_grid_group() { + _data.multi_grid.functions = details::multi_grid::load_grid_intrinsics(); + _data.multi_grid.handle = _data.multi_grid.functions->get_intrinsic_handle(); + } + + friend multi_grid_group this_multi_grid(); + +public: + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_system) + + _CG_QUALIFIER bool is_valid() const { + return (_data.multi_grid.handle != 0); + } + + _CG_QUALIFIER void sync() const { + if (!is_valid()) { + _CG_ABORT(); + } + _data.multi_grid.functions->sync(_data.multi_grid.handle); + } + + _CG_QUALIFIER unsigned long long num_threads() const { + _CG_ASSERT(is_valid()); + return _data.multi_grid.functions->size(_data.multi_grid.handle); + } + + _CG_QUALIFIER unsigned long long size() const { + return num_threads(); + } + + _CG_QUALIFIER unsigned long long thread_rank() const { + _CG_ASSERT(is_valid()); + return _data.multi_grid.functions->thread_rank(_data.multi_grid.handle); + } + + _CG_QUALIFIER unsigned int grid_rank() const { + _CG_ASSERT(is_valid()); + return (_data.multi_grid.functions->grid_rank(_data.multi_grid.handle)); + } + + _CG_QUALIFIER unsigned int num_grids() const { + _CG_ASSERT(is_valid()); + return (_data.multi_grid.functions->num_grids(_data.multi_grid.handle)); + } +}; +# else +class multi_grid_group +{ +private: + unsigned long long _handle; + unsigned int _size; + unsigned int _rank; + + friend _CG_QUALIFIER multi_grid_group this_multi_grid(); + + _CG_QUALIFIER multi_grid_group() { + _handle = details::multi_grid::get_intrinsic_handle(); + _size = details::multi_grid::size(_handle); + _rank = details::multi_grid::thread_rank(_handle); + } + +public: + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_system) + + _CG_QUALIFIER _CG_DEPRECATED bool is_valid() const { + return (_handle != 0); + } + + _CG_QUALIFIER _CG_DEPRECATED void sync() const { + if (!is_valid()) { + _CG_ABORT(); + } + details::multi_grid::sync(_handle); + } + + _CG_QUALIFIER _CG_DEPRECATED unsigned long long num_threads() const { + _CG_ASSERT(is_valid()); + return _size; + } + + _CG_QUALIFIER _CG_DEPRECATED unsigned long long size() const { + return num_threads(); + } + + _CG_QUALIFIER _CG_DEPRECATED unsigned long long thread_rank() const { + _CG_ASSERT(is_valid()); + return _rank; + } + + _CG_QUALIFIER _CG_DEPRECATED unsigned int grid_rank() const { + _CG_ASSERT(is_valid()); + return (details::multi_grid::grid_rank(_handle)); + } + + _CG_QUALIFIER _CG_DEPRECATED unsigned int num_grids() const { + _CG_ASSERT(is_valid()); + return (details::multi_grid::num_grids(_handle)); + } +}; +# endif + +/** + * multi_grid_group this_multi_grid() + * + * Constructs a multi_grid_group + */ +# if defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) +template +__device__ +#else +_CG_QUALIFIER +# endif +_CG_DEPRECATED +multi_grid_group this_multi_grid() +{ + return multi_grid_group(); +} +#endif + +/** + * class grid_group; + * + * Threads within this this group are guaranteed to be co-resident on the + * same device within the same launched kernel. To use this group, the kernel + * must have been launched with cuLaunchCooperativeKernel (or the CUDA Runtime equivalent), + * and the device must support it (queryable device attribute). + * + * Constructed via this_grid(); + */ +class grid_group : public thread_group_base +{ + _CG_STATIC_CONST_DECL unsigned int _group_id = details::grid_group_id; + friend _CG_QUALIFIER grid_group this_grid(); + +private: + _CG_QUALIFIER grid_group(details::grid_workspace *gridWs) { + _data.grid.gridWs = gridWs; + } + + public: + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_device) + + _CG_QUALIFIER bool is_valid() const { + return (_data.grid.gridWs != NULL); + } + + _CG_QUALIFIER void sync() const { + if (!is_valid()) { + _CG_ABORT(); + } + details::grid::sync(&_data.grid.gridWs->barrier); + } + +#if defined(_CG_CPP11_FEATURES) + using arrival_token = unsigned int; + + _CG_QUALIFIER arrival_token barrier_arrive() const { + if (!is_valid()) { + _CG_ABORT(); + } + return details::grid::barrier_arrive(&_data.grid.gridWs->barrier); + } + + _CG_QUALIFIER void barrier_wait(arrival_token&& token) const { + details::grid::barrier_wait(token, &_data.grid.gridWs->barrier); + } +#endif + + _CG_STATIC_QUALIFIER unsigned long long size() { + return details::grid::size(); + } + + _CG_STATIC_QUALIFIER dim3 group_dim() { + return details::grid::grid_dim(); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() { + return details::grid::dim_threads(); + } + + _CG_STATIC_QUALIFIER unsigned long long num_threads() { + return details::grid::num_threads(); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() { + return details::grid::thread_index(); + } + + _CG_STATIC_QUALIFIER unsigned long long thread_rank() { + return details::grid::thread_rank(); + } + + _CG_STATIC_QUALIFIER dim3 dim_blocks() { + return details::grid::dim_blocks(); + } + + _CG_STATIC_QUALIFIER unsigned long long num_blocks() { + return details::grid::num_blocks(); + } + + _CG_STATIC_QUALIFIER dim3 block_index() { + return details::grid::block_index(); + } + + _CG_STATIC_QUALIFIER unsigned long long block_rank() { + return details::grid::block_rank(); + } + +# if defined(_CG_HAS_CLUSTER_GROUP) + _CG_STATIC_QUALIFIER dim3 dim_clusters() { + return details::grid::dim_clusters(); + } + + _CG_STATIC_QUALIFIER unsigned long long num_clusters() { + return details::grid::num_clusters(); + } + + _CG_STATIC_QUALIFIER dim3 cluster_index() { + return details::grid::cluster_index(); + } + + _CG_STATIC_QUALIFIER unsigned long long cluster_rank() { + return details::grid::cluster_rank(); + } +# endif +}; + +_CG_QUALIFIER grid_group this_grid() { + // Load a workspace from the driver + grid_group gg(details::get_grid_workspace()); +#ifdef _CG_DEBUG + // *all* threads must be available to synchronize + gg.sync(); +#endif // _CG_DEBUG + return gg; +} + +#if defined(_CG_HAS_CLUSTER_GROUP) +/** + * class cluster_group + * + * Every GPU kernel is executed by a grid of thread blocks. A grid can be evenly + * divided along all dimensions to form groups of blocks, each group of which is + * a block cluster. Clustered grids are subject to various restrictions and + * limitations. Primarily, a cluster consists of at most 8 blocks by default + * (although the user is allowed to opt-in to non-standard sizes,) and clustered + * grids are subject to additional occupancy limitations due to per-cluster + * hardware resource consumption. In exchange, a block cluster is guaranteed to + * be a cooperative group, with access to all cooperative group capabilities, as + * well as cluster specific capabilities and accelerations. A cluster_group + * represents a block cluster. + * + * Constructed via this_cluster_group(); + */ +class cluster_group : public thread_group_base +{ + // Friends + friend _CG_QUALIFIER cluster_group this_cluster(); + + // Disable constructor + _CG_QUALIFIER cluster_group() + { + } + + public: + //_CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_cluster) + + using arrival_token = struct {}; + + // Functionality exposed by the group + _CG_STATIC_QUALIFIER void sync() + { + return details::cluster::sync(); + } + + _CG_STATIC_QUALIFIER arrival_token barrier_arrive() + { + details::cluster::barrier_arrive(); + return arrival_token(); + } + + _CG_STATIC_QUALIFIER void barrier_wait() + { + return details::cluster::barrier_wait(); + } + + _CG_STATIC_QUALIFIER void barrier_wait(arrival_token&&) + { + return details::cluster::barrier_wait(); + } + + _CG_STATIC_QUALIFIER unsigned int query_shared_rank(const void *addr) + { + return details::cluster::query_shared_rank(addr); + } + + template + _CG_STATIC_QUALIFIER T* map_shared_rank(T *addr, int rank) + { + return details::cluster::map_shared_rank(addr, rank); + } + + _CG_STATIC_QUALIFIER dim3 block_index() + { + return details::cluster::block_index(); + } + + _CG_STATIC_QUALIFIER unsigned int block_rank() + { + return details::cluster::block_rank(); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() + { + return details::cluster::thread_index(); + } + + _CG_STATIC_QUALIFIER unsigned int thread_rank() + { + return details::cluster::thread_rank(); + } + + _CG_STATIC_QUALIFIER dim3 dim_blocks() + { + return details::cluster::dim_blocks(); + } + + _CG_STATIC_QUALIFIER unsigned int num_blocks() + { + return details::cluster::num_blocks(); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() + { + return details::cluster::dim_threads(); + } + + _CG_STATIC_QUALIFIER unsigned int num_threads() + { + return details::cluster::num_threads(); + } + + // Legacy aliases + _CG_STATIC_QUALIFIER unsigned int size() + { + return num_threads(); + } +}; + +/* + * cluster_group this_cluster() + * + * Constructs a cluster_group + */ +_CG_QUALIFIER cluster_group this_cluster() +{ + cluster_group cg; +#ifdef _CG_DEBUG + cg.sync(); +#endif + return cg; +} +#endif + +#if defined(_CG_CPP11_FEATURES) +class thread_block; +template +_CG_QUALIFIER thread_block this_thread_block(block_tile_memory& scratch); +#endif + +/** + * class thread_block + * + * Every GPU kernel is executed by a grid of thread blocks, and threads within + * each block are guaranteed to reside on the same streaming multiprocessor. + * A thread_block represents a thread block whose dimensions are not known until runtime. + * + * Constructed via this_thread_block(); + */ +class thread_block : public thread_group_base +{ + // Friends + friend _CG_QUALIFIER thread_block this_thread_block(); + friend _CG_QUALIFIER thread_group tiled_partition(const thread_group& parent, unsigned int tilesz); + friend _CG_QUALIFIER thread_group tiled_partition(const thread_block& parent, unsigned int tilesz); + +#if defined(_CG_CPP11_FEATURES) + template + friend _CG_QUALIFIER thread_block this_thread_block(block_tile_memory& scratch); + template + friend class __static_size_multi_warp_tile_base; + + details::multi_warp_scratch* const tile_memory; + + template + _CG_QUALIFIER thread_block(block_tile_memory& scratch) : + tile_memory(details::get_scratch_ptr(&scratch)) { +#ifdef _CG_DEBUG + if (num_threads() > MaxBlockSize) { + details::abort(); + } +#endif + + +#if defined(_CG_USER_PROVIDED_SHARED_MEMORY) +#define _CG_SKIP_BARRIER_INIT_TARGET NV_NO_TARGET +#else +#define _CG_SKIP_BARRIER_INIT_TARGET NV_PROVIDES_SM_80 +#endif + NV_IF_ELSE_TARGET( + _CG_SKIP_BARRIER_INIT_TARGET, + // skip if clause + , + (tile_memory->init_barriers(thread_rank()); + sync();) + ) + } +#endif +#undef _CG_SKIP_BARRIER_INIT_TARGET + + // Disable constructor + _CG_QUALIFIER thread_block() +#if defined(_CG_CPP11_FEATURES) + : tile_memory(details::get_scratch_ptr(NULL)) +#endif + { } + + // Internal Use + _CG_QUALIFIER thread_group _get_tiled_threads(unsigned int tilesz) const { + const bool pow2_tilesz = ((tilesz & (tilesz - 1)) == 0); + + // Invalid, immediately fail + if (tilesz == 0 || (tilesz > 32) || !pow2_tilesz) { + details::abort(); + return (thread_block()); + } + + unsigned int mask; + unsigned int base_offset = thread_rank() & (~(tilesz - 1)); + unsigned int masklength = min((unsigned int)size() - base_offset, tilesz); + + mask = (unsigned int)(-1) >> (32 - masklength); + mask <<= (details::laneid() & ~(tilesz - 1)); + thread_group tile = thread_group(details::coalesced_group_id); + tile._data.coalesced.mask = mask; + tile._data.coalesced.size = __popc(mask); + tile._data.coalesced.metaGroupSize = (details::cta::size() + tilesz - 1) / tilesz; + tile._data.coalesced.metaGroupRank = details::cta::thread_rank() / tilesz; + tile._data.coalesced.is_tiled = true; + return (tile); + } + + public: + _CG_STATIC_CONST_DECL unsigned int _group_id = details::thread_block_id; + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_block) + + _CG_STATIC_QUALIFIER void sync() { + details::cta::sync(); + } + +#if defined(_CG_CPP11_FEATURES) + struct arrival_token {}; + + _CG_QUALIFIER arrival_token barrier_arrive() const { + return arrival_token(); + } + + _CG_QUALIFIER void barrier_wait(arrival_token&&) const { + details::cta::sync(); + } +#endif + + _CG_STATIC_QUALIFIER unsigned int size() { + return details::cta::size(); + } + + _CG_STATIC_QUALIFIER unsigned int thread_rank() { + return details::cta::thread_rank(); + } + + // Additional functionality exposed by the group + _CG_STATIC_QUALIFIER dim3 group_index() { + return details::cta::group_index(); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() { + return details::cta::thread_index(); + } + + _CG_STATIC_QUALIFIER dim3 group_dim() { + return details::cta::block_dim(); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() { + return details::cta::dim_threads(); + } + + _CG_STATIC_QUALIFIER unsigned int num_threads() { + return details::cta::num_threads(); + } + +}; + +/** + * thread_block this_thread_block() + * + * Constructs a thread_block group + */ +_CG_QUALIFIER thread_block this_thread_block() +{ + return (thread_block()); +} + +#if defined(_CG_CPP11_FEATURES) +template +_CG_QUALIFIER thread_block this_thread_block(block_tile_memory& scratch) { + return (thread_block(scratch)); +} +#endif + +/** + * class coalesced_group + * + * A group representing the current set of converged threads in a warp. + * The size of the group is not guaranteed and it may return a group of + * only one thread (itself). + * + * This group exposes warp-synchronous builtins. + * Constructed via coalesced_threads(); + */ +class coalesced_group : public thread_group_base +{ +private: + friend _CG_QUALIFIER coalesced_group coalesced_threads(); + friend _CG_QUALIFIER thread_group tiled_partition(const thread_group& parent, unsigned int tilesz); + friend _CG_QUALIFIER coalesced_group tiled_partition(const coalesced_group& parent, unsigned int tilesz); + friend class details::_coalesced_group_data_access; + + _CG_QUALIFIER unsigned int _packLanes(unsigned laneMask) const { + unsigned int member_pack = 0; + unsigned int member_rank = 0; + for (int bit_idx = 0; bit_idx < 32; bit_idx++) { + unsigned int lane_bit = _data.coalesced.mask & (1 << bit_idx); + if (lane_bit) { + if (laneMask & lane_bit) + member_pack |= 1 << member_rank; + member_rank++; + } + } + return (member_pack); + } + + // Internal Use + _CG_QUALIFIER coalesced_group _get_tiled_threads(unsigned int tilesz) const { + const bool pow2_tilesz = ((tilesz & (tilesz - 1)) == 0); + + // Invalid, immediately fail + if (tilesz == 0 || (tilesz > 32) || !pow2_tilesz) { + details::abort(); + return (coalesced_group(0)); + } + if (size() <= tilesz) { + return (*this); + } + + if ((_data.coalesced.is_tiled == true) && pow2_tilesz) { + unsigned int base_offset = (thread_rank() & (~(tilesz - 1))); + unsigned int masklength = min((unsigned int)size() - base_offset, tilesz); + unsigned int mask = (unsigned int)(-1) >> (32 - masklength); + + mask <<= (details::laneid() & ~(tilesz - 1)); + coalesced_group coalesced_tile = coalesced_group(mask); + coalesced_tile._data.coalesced.metaGroupSize = size() / tilesz; + coalesced_tile._data.coalesced.metaGroupRank = thread_rank() / tilesz; + coalesced_tile._data.coalesced.is_tiled = true; + return (coalesced_tile); + } + else if ((_data.coalesced.is_tiled == false) && pow2_tilesz) { + unsigned int mask = 0; + unsigned int member_rank = 0; + int seen_lanes = (thread_rank() / tilesz) * tilesz; + for (unsigned int bit_idx = 0; bit_idx < 32; bit_idx++) { + unsigned int lane_bit = _data.coalesced.mask & (1 << bit_idx); + if (lane_bit) { + if (seen_lanes <= 0 && member_rank < tilesz) { + mask |= lane_bit; + member_rank++; + } + seen_lanes--; + } + } + coalesced_group coalesced_tile = coalesced_group(mask); + // Override parent with the size of this group + coalesced_tile._data.coalesced.metaGroupSize = (size() + tilesz - 1) / tilesz; + coalesced_tile._data.coalesced.metaGroupRank = thread_rank() / tilesz; + return coalesced_tile; + } + else { + // None in _CG_VERSION 1000 + details::abort(); + } + + return (coalesced_group(0)); + } + + protected: + _CG_QUALIFIER coalesced_group(unsigned int mask) { + _data.coalesced.mask = mask; + _data.coalesced.size = __popc(mask); + _data.coalesced.metaGroupRank = 0; + _data.coalesced.metaGroupSize = 1; + _data.coalesced.is_tiled = false; + } + + _CG_QUALIFIER unsigned int get_mask() const { + return (_data.coalesced.mask); + } + + public: + _CG_STATIC_CONST_DECL unsigned int _group_id = details::coalesced_group_id; + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_block) + + _CG_QUALIFIER unsigned int num_threads() const { + return _data.coalesced.size; + } + + _CG_QUALIFIER unsigned int size() const { + return num_threads(); + } + + _CG_QUALIFIER unsigned int thread_rank() const { + return (__popc(_data.coalesced.mask & details::lanemask32_lt())); + } + + // Rank of this group in the upper level of the hierarchy + _CG_QUALIFIER unsigned int meta_group_rank() const { + return _data.coalesced.metaGroupRank; + } + + // Total num partitions created out of all CTAs when the group was created + _CG_QUALIFIER unsigned int meta_group_size() const { + return _data.coalesced.metaGroupSize; + } + + _CG_QUALIFIER void sync() const { + __syncwarp(_data.coalesced.mask); + } + +#ifdef _CG_CPP11_FEATURES + template > + _CG_QUALIFIER TyRet shfl(TyElem&& elem, int srcRank) const { + unsigned int lane = (srcRank == 0) ? __ffs(_data.coalesced.mask) - 1 : + (size() == 32) ? srcRank : __fns(_data.coalesced.mask, 0, (srcRank + 1)); + + return details::tile::shuffle_dispatch::shfl( + _CG_STL_NAMESPACE::forward(elem), _data.coalesced.mask, lane, 32); + } + + template > + _CG_QUALIFIER TyRet shfl_down(TyElem&& elem, unsigned int delta) const { + if (size() == 32) { + return details::tile::shuffle_dispatch::shfl_down( + _CG_STL_NAMESPACE::forward(elem), 0xFFFFFFFF, delta, 32); + } + + unsigned int lane = __fns(_data.coalesced.mask, details::laneid(), delta + 1); + + if (lane >= 32) + lane = details::laneid(); + + return details::tile::shuffle_dispatch::shfl( + _CG_STL_NAMESPACE::forward(elem), _data.coalesced.mask, lane, 32); + } + + template > + _CG_QUALIFIER TyRet shfl_up(TyElem&& elem, int delta) const { + if (size() == 32) { + return details::tile::shuffle_dispatch::shfl_up( + _CG_STL_NAMESPACE::forward(elem), 0xFFFFFFFF, delta, 32); + } + + unsigned lane = __fns(_data.coalesced.mask, details::laneid(), -(delta + 1)); + if (lane >= 32) + lane = details::laneid(); + + return details::tile::shuffle_dispatch::shfl( + _CG_STL_NAMESPACE::forward(elem), _data.coalesced.mask, lane, 32); + } +#else + template + _CG_QUALIFIER TyIntegral shfl(TyIntegral var, unsigned int src_rank) const { + details::assert_if_not_arithmetic(); + unsigned int lane = (src_rank == 0) ? __ffs(_data.coalesced.mask) - 1 : + (size() == 32) ? src_rank : __fns(_data.coalesced.mask, 0, (src_rank + 1)); + return (__shfl_sync(_data.coalesced.mask, var, lane, 32)); + } + + template + _CG_QUALIFIER TyIntegral shfl_up(TyIntegral var, int delta) const { + details::assert_if_not_arithmetic(); + if (size() == 32) { + return (__shfl_up_sync(0xFFFFFFFF, var, delta, 32)); + } + unsigned lane = __fns(_data.coalesced.mask, details::laneid(), -(delta + 1)); + if (lane >= 32) lane = details::laneid(); + return (__shfl_sync(_data.coalesced.mask, var, lane, 32)); + } + + template + _CG_QUALIFIER TyIntegral shfl_down(TyIntegral var, int delta) const { + details::assert_if_not_arithmetic(); + if (size() == 32) { + return (__shfl_down_sync(0xFFFFFFFF, var, delta, 32)); + } + unsigned int lane = __fns(_data.coalesced.mask, details::laneid(), delta + 1); + if (lane >= 32) lane = details::laneid(); + return (__shfl_sync(_data.coalesced.mask, var, lane, 32)); + } +#endif + + _CG_QUALIFIER int any(int predicate) const { + return (__ballot_sync(_data.coalesced.mask, predicate) != 0); + } + _CG_QUALIFIER int all(int predicate) const { + return (__ballot_sync(_data.coalesced.mask, predicate) == _data.coalesced.mask); + } + _CG_QUALIFIER unsigned int ballot(int predicate) const { + if (size() == 32) { + return (__ballot_sync(0xFFFFFFFF, predicate)); + } + unsigned int lane_ballot = __ballot_sync(_data.coalesced.mask, predicate); + return (_packLanes(lane_ballot)); + } + +#ifdef _CG_HAS_MATCH_COLLECTIVE + + template + _CG_QUALIFIER unsigned int match_any(TyIntegral val) const { + details::assert_if_not_arithmetic(); + if (size() == 32) { + return (__match_any_sync(0xFFFFFFFF, val)); + } + unsigned int lane_match = __match_any_sync(_data.coalesced.mask, val); + return (_packLanes(lane_match)); + } + + template + _CG_QUALIFIER unsigned int match_all(TyIntegral val, int &pred) const { + details::assert_if_not_arithmetic(); + if (size() == 32) { + return (__match_all_sync(0xFFFFFFFF, val, &pred)); + } + unsigned int lane_match = __match_all_sync(_data.coalesced.mask, val, &pred); + return (_packLanes(lane_match)); + } + +#endif /* !_CG_HAS_MATCH_COLLECTIVE */ + +}; + +_CG_QUALIFIER coalesced_group coalesced_threads() +{ + return (coalesced_group(__activemask())); +} + +namespace details { + template struct verify_thread_block_tile_size; + template <> struct verify_thread_block_tile_size<32> { typedef void OK; }; + template <> struct verify_thread_block_tile_size<16> { typedef void OK; }; + template <> struct verify_thread_block_tile_size<8> { typedef void OK; }; + template <> struct verify_thread_block_tile_size<4> { typedef void OK; }; + template <> struct verify_thread_block_tile_size<2> { typedef void OK; }; + template <> struct verify_thread_block_tile_size<1> { typedef void OK; }; + +#ifdef _CG_CPP11_FEATURES + template + using _is_power_of_2 = _CG_STL_NAMESPACE::integral_constant; + + template + using _is_single_warp = _CG_STL_NAMESPACE::integral_constant; + template + using _is_multi_warp = + _CG_STL_NAMESPACE::integral_constant 32) && (Size <= 1024)>; + + template + using _is_valid_single_warp_tile = + _CG_STL_NAMESPACE::integral_constant::value && _is_single_warp::value>; + template + using _is_valid_multi_warp_tile = + _CG_STL_NAMESPACE::integral_constant::value && _is_multi_warp::value>; +#else + template + struct _is_multi_warp { + static const bool value = false; + }; +#endif +} + +template +class __static_size_tile_base +{ +protected: + _CG_STATIC_CONST_DECL unsigned int numThreads = Size; + +public: + _CG_THREAD_SCOPE(cuda::thread_scope::thread_scope_block) + + // Rank of thread within tile + _CG_STATIC_QUALIFIER unsigned int thread_rank() { + return (details::cta::thread_rank() & (numThreads - 1)); + } + + // Number of threads within tile + _CG_STATIC_CONSTEXPR_QUALIFIER unsigned int num_threads() { + return numThreads; + } + + _CG_STATIC_CONSTEXPR_QUALIFIER unsigned int size() { + return num_threads(); + } +}; + +template +class __static_size_thread_block_tile_base : public __static_size_tile_base +{ + friend class details::_coalesced_group_data_access; + typedef details::tile::tile_helpers th; + +#ifdef _CG_CPP11_FEATURES + static_assert(details::_is_valid_single_warp_tile::value, "Size must be one of 1/2/4/8/16/32"); +#else + typedef typename details::verify_thread_block_tile_size::OK valid; +#endif + using __static_size_tile_base::numThreads; + _CG_STATIC_CONST_DECL unsigned int fullMask = 0xFFFFFFFF; + + protected: + _CG_STATIC_QUALIFIER unsigned int build_mask() { + unsigned int mask = fullMask; + if (numThreads != 32) { + // [0,31] representing the current active thread in the warp + unsigned int laneId = details::laneid(); + // shift mask according to the partition it belongs to + mask = th::tileMask << (laneId & ~(th::laneMask)); + } + return (mask); + } + +public: + _CG_STATIC_CONST_DECL unsigned int _group_id = details::coalesced_group_id; + + _CG_STATIC_QUALIFIER void sync() { + __syncwarp(build_mask()); + } + +#ifdef _CG_CPP11_FEATURES + // PTX supported collectives + template > + _CG_QUALIFIER TyRet shfl(TyElem&& elem, int srcRank) const { + return details::tile::shuffle_dispatch::shfl( + _CG_STL_NAMESPACE::forward(elem), build_mask(), srcRank, numThreads); + } + + template > + _CG_QUALIFIER TyRet shfl_down(TyElem&& elem, unsigned int delta) const { + return details::tile::shuffle_dispatch::shfl_down( + _CG_STL_NAMESPACE::forward(elem), build_mask(), delta, numThreads); + } + + template > + _CG_QUALIFIER TyRet shfl_up(TyElem&& elem, unsigned int delta) const { + return details::tile::shuffle_dispatch::shfl_up( + _CG_STL_NAMESPACE::forward(elem), build_mask(), delta, numThreads); + } + + template > + _CG_QUALIFIER TyRet shfl_xor(TyElem&& elem, unsigned int laneMask) const { + return details::tile::shuffle_dispatch::shfl_xor( + _CG_STL_NAMESPACE::forward(elem), build_mask(), laneMask, numThreads); + } +#else + template + _CG_QUALIFIER TyIntegral shfl(TyIntegral var, int srcRank) const { + details::assert_if_not_arithmetic(); + return (__shfl_sync(build_mask(), var, srcRank, numThreads)); + } + + template + _CG_QUALIFIER TyIntegral shfl_down(TyIntegral var, unsigned int delta) const { + details::assert_if_not_arithmetic(); + return (__shfl_down_sync(build_mask(), var, delta, numThreads)); + } + + template + _CG_QUALIFIER TyIntegral shfl_up(TyIntegral var, unsigned int delta) const { + details::assert_if_not_arithmetic(); + return (__shfl_up_sync(build_mask(), var, delta, numThreads)); + } + + template + _CG_QUALIFIER TyIntegral shfl_xor(TyIntegral var, unsigned int laneMask) const { + details::assert_if_not_arithmetic(); + return (__shfl_xor_sync(build_mask(), var, laneMask, numThreads)); + } +#endif //_CG_CPP11_FEATURES + + _CG_QUALIFIER int any(int predicate) const { + unsigned int lane_ballot = __ballot_sync(build_mask(), predicate); + return (lane_ballot != 0); + } + _CG_QUALIFIER int all(int predicate) const { + unsigned int lane_ballot = __ballot_sync(build_mask(), predicate); + return (lane_ballot == build_mask()); + } + _CG_QUALIFIER unsigned int ballot(int predicate) const { + unsigned int lane_ballot = __ballot_sync(build_mask(), predicate); + return (lane_ballot >> (details::laneid() & (~(th::laneMask)))); + } + +#ifdef _CG_HAS_MATCH_COLLECTIVE + template + _CG_QUALIFIER unsigned int match_any(TyIntegral val) const { + details::assert_if_not_arithmetic(); + unsigned int lane_match = __match_any_sync(build_mask(), val); + return (lane_match >> (details::laneid() & (~(th::laneMask)))); + } + + template + _CG_QUALIFIER unsigned int match_all(TyIntegral val, int &pred) const { + details::assert_if_not_arithmetic(); + unsigned int lane_match = __match_all_sync(build_mask(), val, &pred); + return (lane_match >> (details::laneid() & (~(th::laneMask)))); + } +#endif + +}; + +template +class __static_parent_thread_block_tile_base +{ +public: + // Rank of this group in the upper level of the hierarchy + _CG_STATIC_QUALIFIER unsigned int meta_group_rank() { + return ParentT::thread_rank() / Size; + } + + // Total num partitions created out of all CTAs when the group was created + _CG_STATIC_QUALIFIER unsigned int meta_group_size() { + return (ParentT::size() + Size - 1) / Size; + } +}; + +/** + * class thread_block_tile + * + * Statically-sized group type, representing one tile of a thread block. + * The only specializations currently supported are those with native + * hardware support (1/2/4/8/16/32) + * + * This group exposes warp-synchronous builtins. + * Can only be constructed via tiled_partition(ParentT&) + */ + +template +class __single_warp_thread_block_tile : + public __static_size_thread_block_tile_base, + public __static_parent_thread_block_tile_base +{ + typedef __static_parent_thread_block_tile_base staticParentBaseT; + friend class details::_coalesced_group_data_access; + +protected: + _CG_QUALIFIER __single_warp_thread_block_tile() { }; + _CG_QUALIFIER __single_warp_thread_block_tile(unsigned int, unsigned int) { }; + + _CG_STATIC_QUALIFIER unsigned int get_mask() { + return __static_size_thread_block_tile_base::build_mask(); + } +}; + +template +class __single_warp_thread_block_tile : + public __static_size_thread_block_tile_base, + public thread_group_base +{ + _CG_STATIC_CONST_DECL unsigned int numThreads = Size; + + template friend class __single_warp_thread_block_tile; + friend class details::_coalesced_group_data_access; + + typedef __static_size_thread_block_tile_base staticSizeBaseT; + +protected: + _CG_QUALIFIER __single_warp_thread_block_tile(unsigned int meta_group_rank = 0, unsigned int meta_group_size = 1) { + _data.coalesced.mask = staticSizeBaseT::build_mask(); + _data.coalesced.size = numThreads; + _data.coalesced.metaGroupRank = meta_group_rank; + _data.coalesced.metaGroupSize = meta_group_size; + _data.coalesced.is_tiled = true; + } + + _CG_QUALIFIER unsigned int get_mask() const { + return (_data.coalesced.mask); + } + +public: + using staticSizeBaseT::sync; + using staticSizeBaseT::size; + using staticSizeBaseT::num_threads; + using staticSizeBaseT::thread_rank; + + _CG_QUALIFIER unsigned int meta_group_rank() const { + return _data.coalesced.metaGroupRank; + } + + _CG_QUALIFIER unsigned int meta_group_size() const { + return _data.coalesced.metaGroupSize; + } +}; + +/** + * Outer level API calls + * void sync(GroupT) - see .sync() + * void thread_rank(GroupT) - see .thread_rank() + * void group_size(GroupT) - see .size() + */ +template +_CG_QUALIFIER void sync(GroupT const &g) +{ + g.sync(); +} + +// TODO: Use a static dispatch to determine appropriate return type +// C++03 is stuck with unsigned long long for now +#ifdef _CG_CPP11_FEATURES +template +_CG_QUALIFIER auto thread_rank(GroupT const& g) -> decltype(g.thread_rank()) { + return g.thread_rank(); +} + + +template +_CG_QUALIFIER auto group_size(GroupT const &g) -> decltype(g.num_threads()) { + return g.num_threads(); +} +#else +template +_CG_QUALIFIER unsigned long long thread_rank(GroupT const& g) { + return static_cast(g.thread_rank()); +} + + +template +_CG_QUALIFIER unsigned long long group_size(GroupT const &g) { + return static_cast(g.num_threads()); +} +#endif + + +/** + * tiled_partition + * + * The tiled_partition(parent, tilesz) method is a collective operation that + * partitions the parent group into a one-dimensional, row-major, tiling of subgroups. + * + * A total of ((size(parent)+tilesz-1)/tilesz) subgroups will + * be created where threads having identical k = (thread_rank(parent)/tilesz) + * will be members of the same subgroup. + * + * The implementation may cause the calling thread to wait until all the members + * of the parent group have invoked the operation before resuming execution. + * + * Functionality is limited to power-of-two sized subgorup instances of at most + * 32 threads. Only thread_block, thread_block_tile<>, and their subgroups can be + * tiled_partition() in _CG_VERSION 1000. + */ +_CG_QUALIFIER thread_group tiled_partition(const thread_group& parent, unsigned int tilesz) +{ + if (parent.get_type() == details::coalesced_group_id) { + const coalesced_group *_cg = static_cast(&parent); + return _cg->_get_tiled_threads(tilesz); + } + else { + const thread_block *_tb = static_cast(&parent); + return _tb->_get_tiled_threads(tilesz); + } +} + +// Thread block type overload: returns a basic thread_group for now (may be specialized later) +_CG_QUALIFIER thread_group tiled_partition(const thread_block& parent, unsigned int tilesz) +{ + return (parent._get_tiled_threads(tilesz)); +} + +// Coalesced group type overload: retains its ability to stay coalesced +_CG_QUALIFIER coalesced_group tiled_partition(const coalesced_group& parent, unsigned int tilesz) +{ + return (parent._get_tiled_threads(tilesz)); +} + +namespace details { + template + class internal_thread_block_tile : public __single_warp_thread_block_tile {}; + + template + _CG_QUALIFIER internal_thread_block_tile tiled_partition_internal() { + return internal_thread_block_tile(); + } + + template + _CG_QUALIFIER TyVal multi_warp_collectives_helper( + const GroupT& group, + WarpLambda warp_lambda, + InterWarpLambda inter_warp_lambda) { + return group.template collectives_scheme(warp_lambda, inter_warp_lambda); + } + + template + _CG_QUALIFIER T* multi_warp_scratch_location_getter(const GroupT& group, unsigned int warp_id) { + return group.template get_scratch_location(warp_id); + } + + template + _CG_QUALIFIER details::barrier_t* multi_warp_sync_location_getter(const GroupT& group) { + return group.get_sync_location(); + } + +} +/** + * tiled_partition + * + * The tiled_partition(parent) method is a collective operation that + * partitions the parent group into a one-dimensional, row-major, tiling of subgroups. + * + * A total of ((size(parent)/tilesz) subgroups will be created, + * therefore the parent group size must be evenly divisible by the tilesz. + * The allow parent groups are thread_block or thread_block_tile. + * + * The implementation may cause the calling thread to wait until all the members + * of the parent group have invoked the operation before resuming execution. + * + * Functionality is limited to native hardware sizes, 1/2/4/8/16/32. + * The size(parent) must be greater than the template Size parameter + * otherwise the results are undefined. + */ + +#if defined(_CG_CPP11_FEATURES) +template +class __static_size_multi_warp_tile_base : public __static_size_tile_base +{ + static_assert(details::_is_valid_multi_warp_tile::value, "Size must be one of 64/128/256/512"); + + template + friend __device__ TyVal details::multi_warp_collectives_helper( + const GroupT& group, + WarpLambda warp_lambda, + InterWarpLambda inter_warp_lambda); + template + friend __device__ T* details::multi_warp_scratch_location_getter(const GroupT& group, unsigned int warp_id); + template + friend __device__ details::barrier_t* details::multi_warp_sync_location_getter(const GroupT& group); + template + friend class __static_size_multi_warp_tile_base; + using WarpType = details::internal_thread_block_tile<32, __static_size_multi_warp_tile_base>; + using ThisType = __static_size_multi_warp_tile_base; + _CG_STATIC_CONST_DECL int numWarps = Size / 32; + +protected: + details::multi_warp_scratch* const tile_memory; + + template + _CG_QUALIFIER __static_size_multi_warp_tile_base(const GroupT& g) : tile_memory(g.tile_memory) { +#if !defined(_CG_USER_PROVIDED_SHARED_MEMORY) + NV_IF_TARGET(NV_PROVIDES_SM_80, + details::sync_warps_reset(get_sync_location(), details::cta::thread_rank()); + g.sync(); + ) +#endif + } + + +private: + _CG_QUALIFIER details::barrier_t* get_sync_location() const { + // Different group sizes use different barriers, all groups of a given size share one barrier. + unsigned int sync_id = details::log2(Size / 64); + return &tile_memory->barriers[sync_id]; + } + + template + _CG_QUALIFIER T* get_scratch_location(unsigned int warp_id) const { + unsigned int scratch_id = (details::cta::thread_rank() - thread_rank()) / 32 + warp_id; + return reinterpret_cast(&tile_memory->communication_memory[scratch_id]); + } + + template + _CG_QUALIFIER T* get_scratch_location() const { + unsigned int scratch_id = details::cta::thread_rank() / 32; + return reinterpret_cast(&tile_memory->communication_memory[scratch_id]); + } + + template + _CG_QUALIFIER TyVal shfl_impl(TyVal val, unsigned int src) const { + unsigned int src_warp = src / 32; + auto warp = details::tiled_partition_internal<32, ThisType>(); + details::barrier_t* sync_location = get_sync_location(); + + // Get warp slot of the source threads warp. + TyVal* warp_scratch_location = get_scratch_location(src_warp); + + if (warp.meta_group_rank() == src_warp) { + warp.sync(); + // Put shuffled value into my warp slot and let my warp arrive at the barrier. + if (thread_rank() == src) { + *warp_scratch_location = val; + } + details::sync_warps_arrive(sync_location, details::cta::thread_rank(), numWarps); + TyVal result = *warp_scratch_location; + details::sync_warps_wait(sync_location, details::cta::thread_rank()); + return result; + } + else { + // Wait for the source warp to arrive on the barrier. + details::sync_warps_wait_for_specific_warp(sync_location, + (details::cta::thread_rank() / 32 - warp.meta_group_rank() + src_warp)); + TyVal result = *warp_scratch_location; + details::sync_warps(sync_location, details::cta::thread_rank(), numWarps); + return result; + } + } + + template + _CG_QUALIFIER TyVal collectives_scheme(const WarpLambda& warp_lambda, const InterWarpLambda& inter_warp_lambda) const { + static_assert(sizeof(TyVal) <= details::multi_warp_scratch::communication_size, + "Collectives with tiles larger than 32 threads are limited to types smaller then 8 bytes"); + auto warp = details::tiled_partition_internal<32, ThisType>(); + details::barrier_t* sync_location = get_sync_location(); + TyVal* warp_scratch_location = get_scratch_location(); + + warp_lambda(warp, warp_scratch_location); + + if (details::sync_warps_last_releases(sync_location, details::cta::thread_rank(), numWarps)) { + auto subwarp = details::tiled_partition_internal(); + if (subwarp.meta_group_rank() == 0) { + TyVal* thread_scratch_location = get_scratch_location(subwarp.thread_rank()); + inter_warp_lambda(subwarp, thread_scratch_location); + } + warp.sync(); + details::sync_warps_release(sync_location, warp.thread_rank() == 0, details::cta::thread_rank(), numWarps); + } + TyVal result = *warp_scratch_location; + return result; + } + +public: + _CG_STATIC_CONST_DECL unsigned int _group_id = details::multi_tile_group_id; + + using __static_size_tile_base::thread_rank; + + template + _CG_QUALIFIER TyVal shfl(TyVal val, unsigned int src) const { + static_assert(sizeof(TyVal) <= details::multi_warp_scratch::communication_size, + "Collectives with tiles larger than 32 threads are limited to types smaller then 8 bytes"); + return shfl_impl(val, src); + } + + _CG_QUALIFIER void sync() const { + details::sync_warps(get_sync_location(), details::cta::thread_rank(), numWarps); + } + + _CG_QUALIFIER int any(int predicate) const { + auto warp_lambda = [=] (WarpType& warp, int* warp_scratch_location) { + *warp_scratch_location = __any_sync(0xFFFFFFFF, predicate); + }; + auto inter_warp_lambda = + [] (details::internal_thread_block_tile& subwarp, int* thread_scratch_location) { + *thread_scratch_location = __any_sync(0xFFFFFFFFU >> (32 - numWarps), *thread_scratch_location); + }; + return collectives_scheme(warp_lambda, inter_warp_lambda); + } + + _CG_QUALIFIER int all(int predicate) const { + auto warp_lambda = [=] (WarpType& warp, int* warp_scratch_location) { + *warp_scratch_location = __all_sync(0xFFFFFFFF, predicate); + }; + auto inter_warp_lambda = + [] (details::internal_thread_block_tile& subwarp, int* thread_scratch_location) { + *thread_scratch_location = __all_sync(0xFFFFFFFFU >> (32 - numWarps), *thread_scratch_location); + }; + return collectives_scheme(warp_lambda, inter_warp_lambda); + } +}; + + +template +class __multi_warp_thread_block_tile : + public __static_size_multi_warp_tile_base, + public __static_parent_thread_block_tile_base +{ + typedef __static_parent_thread_block_tile_base staticParentBaseT; + typedef __static_size_multi_warp_tile_base staticTileBaseT; +protected: + _CG_QUALIFIER __multi_warp_thread_block_tile(const ParentT& g) : + __static_size_multi_warp_tile_base(g) {} +}; + +template +class __multi_warp_thread_block_tile : public __static_size_multi_warp_tile_base +{ + const unsigned int metaGroupRank; + const unsigned int metaGroupSize; + +protected: + template + _CG_QUALIFIER __multi_warp_thread_block_tile(const __multi_warp_thread_block_tile& g) : + __static_size_multi_warp_tile_base(g), metaGroupRank(g.meta_group_rank()), metaGroupSize(g.meta_group_size()) {} + +public: + _CG_QUALIFIER unsigned int meta_group_rank() const { + return metaGroupRank; + } + + _CG_QUALIFIER unsigned int meta_group_size() const { + return metaGroupSize; + } +}; +#endif + +template +class thread_block_tile; + +namespace details { + template + class thread_block_tile_impl; + + template + class thread_block_tile_impl: public __single_warp_thread_block_tile + { + protected: + template + _CG_QUALIFIER thread_block_tile_impl(const thread_block_tile_impl& g) : + __single_warp_thread_block_tile(g.meta_group_rank(), g.meta_group_size()) {} + + _CG_QUALIFIER thread_block_tile_impl(const thread_block& g) : + __single_warp_thread_block_tile() {} + }; + +#if defined(_CG_CPP11_FEATURES) + template + class thread_block_tile_impl : public __multi_warp_thread_block_tile + { + protected: + template + _CG_QUALIFIER thread_block_tile_impl(const GroupT& g) : + __multi_warp_thread_block_tile(g) {} + }; +#else + template + class thread_block_tile_impl + { + protected: + template + _CG_QUALIFIER thread_block_tile_impl(const GroupT& g) {} + }; +#endif +} + +template +class thread_block_tile : public details::thread_block_tile_impl::value> +{ + friend _CG_QUALIFIER thread_block_tile<1, void> this_thread(); + +protected: + _CG_QUALIFIER thread_block_tile(const ParentT& g) : + details::thread_block_tile_impl::value>(g) {} + +public: + _CG_QUALIFIER operator thread_block_tile() const { + return thread_block_tile(*this); + } +}; + +template +class thread_block_tile : public details::thread_block_tile_impl::value> +{ + template + friend class thread_block_tile; + +protected: + template + _CG_QUALIFIER thread_block_tile(const thread_block_tile& g) : + details::thread_block_tile_impl::value>(g) {} + +public: + template + _CG_QUALIFIER thread_block_tile(const thread_block_tile& g) : + details::thread_block_tile_impl::value>(g) {} +}; + +namespace details { + template + struct tiled_partition_impl; + + template + struct tiled_partition_impl : public thread_block_tile { + _CG_QUALIFIER tiled_partition_impl(const thread_block& g) : + thread_block_tile(g) {} + }; + + // ParentT = static thread_block_tile specialization + template + struct tiled_partition_impl > : + public thread_block_tile > { +#ifdef _CG_CPP11_FEATURES + static_assert(Size < ParentSize, "Tile size bigger or equal to the parent group size"); +#endif + _CG_QUALIFIER tiled_partition_impl(const thread_block_tile& g) : + thread_block_tile >(g) {} + }; + +} + +template +_CG_QUALIFIER thread_block_tile tiled_partition(const ParentT& g) +{ + return details::tiled_partition_impl(g); +} + +/** + * thread_group this_thread() + * + * Constructs a generic thread_group containing only the calling thread + */ +_CG_QUALIFIER thread_block_tile<1, void> this_thread() +{ + // Make thread_block_tile<1, thread_block> parent of the returned group, so it will have its + // meta group rank and size set to 0 and 1 respectively. + return thread_block_tile<1, thread_block_tile<1, thread_block> >(this_thread_block()); +} + +/** + * .sync() + * + * Executes a barrier across the group + * + * Implements both a compiler fence and an architectural fence to prevent, + * memory reordering around the barrier. + */ +_CG_QUALIFIER void thread_group::sync() const +{ + switch (_data.group.type) { + case details::coalesced_group_id: + cooperative_groups::sync(*static_cast(this)); + break; + case details::thread_block_id: + cooperative_groups::sync(*static_cast(this)); + break; + case details::grid_group_id: + cooperative_groups::sync(*static_cast(this)); + break; +#if defined(_CG_HAS_MULTI_GRID_GROUP) && defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) + case details::multi_grid_group_id: + cooperative_groups::sync(*static_cast(this)); + break; +#endif +#if defined(_CG_HAS_CLUSTER_GROUP) + case details::cluster_group_id: + cooperative_groups::sync(*static_cast(this)); + break; +#endif + default: + break; + } +} + +/** + * .size() + * + * Returns the total number of threads in the group. + */ +_CG_QUALIFIER unsigned long long thread_group::size() const +{ + unsigned long long size = 0; + switch (_data.group.type) { + case details::coalesced_group_id: + size = cooperative_groups::group_size(*static_cast(this)); + break; + case details::thread_block_id: + size = cooperative_groups::group_size(*static_cast(this)); + break; + case details::grid_group_id: + size = cooperative_groups::group_size(*static_cast(this)); + break; +#if defined(_CG_HAS_MULTI_GRID_GROUP) && defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) + case details::multi_grid_group_id: + size = cooperative_groups::group_size(*static_cast(this)); + break; +#endif +#if defined(_CG_HAS_CLUSTER_GROUP) + case details::cluster_group_id: + size = cooperative_groups::group_size(*static_cast(this)); + break; +#endif + default: + break; + } + return size; +} + +/** + * .thread_rank() + * + * Returns the linearized rank of the calling thread along the interval [0, size()). + */ +_CG_QUALIFIER unsigned long long thread_group::thread_rank() const +{ + unsigned long long rank = 0; + switch (_data.group.type) { + case details::coalesced_group_id: + rank = cooperative_groups::thread_rank(*static_cast(this)); + break; + case details::thread_block_id: + rank = cooperative_groups::thread_rank(*static_cast(this)); + break; + case details::grid_group_id: + rank = cooperative_groups::thread_rank(*static_cast(this)); + break; +#if defined(_CG_HAS_MULTI_GRID_GROUP) && defined(_CG_CPP11_FEATURES) && defined(_CG_ABI_EXPERIMENTAL) + case details::multi_grid_group_id: + rank = cooperative_groups::thread_rank(*static_cast(this)); + break; +#endif +#if defined(_CG_HAS_CLUSTER_GROUP) + case details::cluster_group_id: + rank = cooperative_groups::thread_rank(*static_cast(this)); + break; +#endif + default: + break; + } + return rank; +} + +_CG_END_NAMESPACE + +#include +#if (!defined(_MSC_VER) || defined(_WIN64)) +# include +#endif + +# endif /* ! (__cplusplus, __CUDACC__) */ + +#endif /* !_COOPERATIVE_GROUPS_H_ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/async.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/async.h new file mode 100644 index 0000000000000000000000000000000000000000..1b7dcb2433f2cb7d1ef61290995ac871a901b1e8 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/async.h @@ -0,0 +1,452 @@ +/* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_ASYNC_H +#define _CG_ASYNC_H + +#include "helpers.h" +#include "info.h" + +#include + +_CG_BEGIN_NAMESPACE + +namespace details { +// Groups supported by memcpy_async +template +struct _async_copy_group_supported : public _CG_STL_NAMESPACE::false_type {}; + +template +struct _async_copy_group_supported> + : public _CG_STL_NAMESPACE::true_type {}; +template <> +struct _async_copy_group_supported : public _CG_STL_NAMESPACE::true_type {}; +template <> +struct _async_copy_group_supported : public _CG_STL_NAMESPACE::true_type {}; + +template +using async_copy_group_supported = _async_copy_group_supported>; + +// Groups that require optimization +template +struct _async_copy_optimize_tile : public _CG_STL_NAMESPACE::false_type {}; + +template +struct _async_copy_optimize_tile> + : public _CG_STL_NAMESPACE::false_type {}; + +template +struct _async_copy_optimize_tile> + : public _CG_STL_NAMESPACE::true_type {}; + +template +using async_copy_optimize_tile = _async_copy_optimize_tile>; + +// SFINAE helpers for tile optimizations +template +using enable_tile_optimization = + typename _CG_STL_NAMESPACE::enable_if::value, void *>::type; + +template +using disable_tile_optimization = + typename _CG_STL_NAMESPACE::enable_if::value, void *>::type; + +// Segment for punning to aligned types +template +struct _Segment { + int _seg[N]; +}; + +// Trivial layout guaranteed-aligned copy-async compatible segments +template +struct Segment; +template <> +struct __align__(4) Segment<1> : public _Segment<1>{}; +template <> +struct __align__(8) Segment<2> : public _Segment<2>{}; +template <> +struct __align__(16) Segment<4> : public _Segment<4>{}; + +// Interleaved element by element copies from source to dest +template +_CG_STATIC_QUALIFIER void inline_copy(TyGroup &group, TyElem *__restrict__ dst, const TyElem *__restrict__ src, + size_t count) { + const unsigned int rank = group.thread_rank(); + const unsigned int stride = group.size(); + + for (size_t idx = rank; idx < count; idx += stride) { + dst[idx] = src[idx]; + } +} + +template = nullptr> +_CG_STATIC_QUALIFIER void accelerated_async_copy(TyGroup &group, TyElem *__restrict__ dst, + const TyElem *__restrict__ src, size_t count) { + static_assert(async_copy_group_supported::value, + "Async copy is only supported for groups that represent private shared memory"); + + if (count == 0) { + return; + } + + const bool dstIsNotShared = !__isShared(dst); + const bool srcIsNotGlobal = !__isGlobal(src); + + if (dstIsNotShared || srcIsNotGlobal) { + inline_copy(group, dst, src, count); + return; + } + + const unsigned int stride = group.size(); + const unsigned int rank = group.thread_rank(); + // Efficient copies require warps to operate on the same amount of work at each step. + // remainders are handled in a separate stage to prevent branching + const unsigned int subWarpMask = (stride - 1); + const unsigned int subwarpCopies = (subWarpMask & (unsigned int)count); + const unsigned int maxSubwarpRank = min(rank, subwarpCopies - 1); + + const size_t warpCopies = (count & (~subWarpMask)); + + for (size_t idx = 0; idx < warpCopies; idx += stride) { + size_t _srcIdx = rank + idx; + size_t _dstIdx = rank + idx; + __pipeline_memcpy_async(dst + _dstIdx, src + _srcIdx, sizeof(TyElem)); + } + + if (subwarpCopies) { + size_t _srcIdx = warpCopies + maxSubwarpRank; + size_t _dstIdx = warpCopies + maxSubwarpRank; + __pipeline_memcpy_async(dst + _dstIdx, src + _srcIdx, sizeof(TyElem)); + } +} + +template = nullptr> +_CG_STATIC_QUALIFIER void accelerated_async_copy(TyGroup &group, TyElem *__restrict__ dst, + const TyElem *__restrict__ src, size_t count) { + static_assert(async_copy_group_supported::value, + "Async copy is only supported for groups that represent private shared memory"); + + const bool dstIsNotShared = !__isShared(dst); + const bool srcIsNotGlobal = !__isGlobal(src); + + if (dstIsNotShared || srcIsNotGlobal) { + inline_copy(group, dst, src, count); + return; + } + + unsigned int stride = group.size(); + unsigned int rank = group.thread_rank(); + + for (size_t idx = rank; idx < count; idx += stride) { + size_t _srcIdx = idx; + size_t _dstIdx = idx; + __pipeline_memcpy_async(dst + _dstIdx, src + _srcIdx, sizeof(TyElem)); + } +} + +// Determine best possible alignment given an input and initial conditions +// Attempts to generate as little code as possible, most likely should only be used with 1 and 2 byte alignments +template +_CG_STATIC_QUALIFIER uint32_t find_best_alignment(void *__restrict__ dst, const void *__restrict__ src) { + // Narrowing conversion intentional + uint32_t base1 = (uint32_t) reinterpret_cast(src); + uint32_t base2 = (uint32_t) reinterpret_cast(dst); + + uint32_t diff = ((base1) ^ (base2)) & (MaxAlignment - 1); + + // range [MaxAlignment, alignof(elem)], step: x >> 1 + // over range of possible alignments, choose best available out of range + uint32_t out = MaxAlignment; +#pragma unroll + for (uint32_t alignment = (MaxAlignment >> 1); alignment >= MinAlignment; alignment >>= 1) { + if (alignment & diff) + out = alignment; + } + + return out; +} + +// Determine best possible alignment given an input and initial conditions +// Attempts to generate as little code as possible, most likely should only be used with 1 and 2 byte alignments +template +_CG_STATIC_QUALIFIER void copy_like(const TyGroup &group, void *__restrict__ _dst, const void *__restrict__ _src, + size_t count) { + const char *src = reinterpret_cast(_src); + char *dst = reinterpret_cast(_dst); + + constexpr uint32_t targetAlignment = (uint32_t)alignof(TyType); + + uint32_t base = (uint32_t) reinterpret_cast(src); + uint32_t alignOffset = ((~base) + 1) & (targetAlignment - 1); + + inline_copy(group, dst, src, alignOffset); + count -= alignOffset; + src += alignOffset; + dst += alignOffset; + + // Copy using the best available alignment, async_copy expects n-datums, not bytes + size_t asyncCount = count / sizeof(TyType); + accelerated_async_copy(group, reinterpret_cast(dst), reinterpret_cast(src), asyncCount); + asyncCount *= sizeof(TyType); + + count -= asyncCount; + src += asyncCount; + dst += asyncCount; + inline_copy(group, dst, src, count); +} + +// We must determine alignment and manually align src/dst ourselves +template +struct _memcpy_async_align_dispatch { + template + _CG_STATIC_QUALIFIER void copy(TyGroup &group, void *__restrict__ dst, const void *__restrict__ src, size_t count) { + uint32_t alignment = find_best_alignment(dst, src); + + // Avoid copying the extra bytes if desired copy count is smaller + alignment = count < alignment ? AlignHint : alignment; + + switch (alignment) { + default: + case 1: + inline_copy(group, reinterpret_cast(dst), reinterpret_cast(src), count); + break; + case 2: + inline_copy(group, reinterpret_cast(dst), reinterpret_cast(src), count >> 1); + break; + case 4: + copy_like>(group, dst, src, count); + break; + case 8: + copy_like>(group, dst, src, count); + break; + case 16: + copy_like>(group, dst, src, count); + break; + } + } +}; + +// Specialization for 4 byte alignments +template <> +struct _memcpy_async_align_dispatch<4> { + template + _CG_STATIC_QUALIFIER void copy(TyGroup &group, void *__restrict__ _dst, const void *__restrict__ _src, + size_t count) { + const Segment<1> *src = reinterpret_cast *>(_src); + Segment<1> *dst = reinterpret_cast *>(_dst); + + // Dispatch straight to aligned LDGSTS calls + accelerated_async_copy(group, dst, src, count / sizeof(*dst)); + } +}; + +// Specialization for 8 byte alignments +template <> +struct _memcpy_async_align_dispatch<8> { + template + _CG_STATIC_QUALIFIER void copy(TyGroup &group, void *__restrict__ _dst, const void *__restrict__ _src, + size_t count) { + const Segment<2> *src = reinterpret_cast *>(_src); + Segment<2> *dst = reinterpret_cast *>(_dst); + + // Dispatch straight to aligned LDGSTS calls + accelerated_async_copy(group, dst, src, count / sizeof(*dst)); + } +}; + +// Alignments over 16 are truncated to 16 and bypass alignment +// This is the highest performing memcpy available +template <> +struct _memcpy_async_align_dispatch<16> { + template + _CG_STATIC_QUALIFIER void copy(TyGroup &group, void *__restrict__ _dst, const void *__restrict__ _src, + size_t count) { + const Segment<4> *src = reinterpret_cast *>(_src); + Segment<4> *dst = reinterpret_cast *>(_dst); + + // Dispatch straight to aligned LDGSTS calls + accelerated_async_copy(group, dst, src, count / sizeof(*dst)); + } +}; + +// byte-wide API +template +_CG_STATIC_QUALIFIER void _memcpy_async_dispatch_to_aligned_copy(const TyGroup &group, void *__restrict__ _dst, + const void *__restrict__ _src, size_t count) { + static_assert(!(Alignment & (Alignment - 1)), "Known static alignment dispatch must be a power of 2"); + details::_memcpy_async_align_dispatch::copy(group, _dst, _src, count); +} + +// Internal dispatch APIs +// These deduce the alignments and sizes necessary to invoke the underlying copy engine +template +using is_void = _CG_STL_NAMESPACE::is_same; + +template +using enable_if_not_void = typename _CG_STL_NAMESPACE::enable_if::value, void *>::type; + +template +using enable_if_void = typename _CG_STL_NAMESPACE::enable_if::value, void *>::type; + +template +using enable_if_integral = + typename _CG_STL_NAMESPACE::enable_if<_CG_STL_NAMESPACE::is_integral::value, void *>::type; + +// byte-wide API using aligned_sized_t +template typename Alignment, size_t Hint> +_CG_STATIC_QUALIFIER void _memcpy_async_bytes(const TyGroup &group, void *__restrict__ _dst, + const void *__restrict__ _src, const Alignment &count) { + constexpr size_t _align = (Hint > 16) ? 16 : Hint; + + details::_memcpy_async_dispatch_to_aligned_copy<_align>(group, _dst, _src, (size_t)count); +} + +// byte-wide API using type for aligment +template = nullptr, enable_if_integral = nullptr> +_CG_STATIC_QUALIFIER void _memcpy_async_bytes(const TyGroup &group, TyElem *__restrict__ _dst, + const TyElem *__restrict__ _src, const TySize& count) { + constexpr size_t _align = (Hint > 16) ? 16 : Hint; + + details::_memcpy_async_dispatch_to_aligned_copy<_align>(group, _dst, _src, count); +} + +// byte-wide API with full alignment deduction required +template = nullptr, + enable_if_integral = nullptr> +_CG_STATIC_QUALIFIER void _memcpy_async_bytes(const TyGroup &group, TyElem *__restrict__ _dst, + const TyElem *__restrict__ _src, const TySize& count) { + details::_memcpy_async_dispatch_to_aligned_copy<1>(group, _dst, _src, count); +} + +// 1d-datum API +template +_CG_STATIC_QUALIFIER void _memcpy_async_datum(const TyGroup &group, TyElem *__restrict__ dst, const size_t dstCount, + const TyElem *__restrict__ src, const size_t srcCount) { + constexpr unsigned int _align = Hint; + const size_t totalCount = min(dstCount, srcCount) * sizeof(TyElem); + + details::_memcpy_async_dispatch_to_aligned_copy<_align>(group, dst, src, totalCount); +} + +// 1d-datum API using aligned_size_t +template typename Alignment, size_t Hint> +_CG_STATIC_QUALIFIER void _memcpy_async_datum(const TyGroup &group, TyElem *__restrict__ dst, const Alignment &dstCount, + const TyElem *__restrict__ src, const Alignment &srcCount) { + constexpr unsigned int _align = Hint; + const size_t totalCount = min((size_t)dstCount, (size_t)srcCount) * sizeof(TyElem); + + details::_memcpy_async_dispatch_to_aligned_copy<_align>(group, dst, src, totalCount); +} + +} // namespace details + +/* + * Group submit batch of async-copy to cover contiguous 1D array + * and commit that batch to eventually wait for completion. + */ +template +_CG_STATIC_QUALIFIER void memcpy_async(const TyGroup &group, TyElem *__restrict__ _dst, const TyElem *__restrict__ _src, + const TySizeT &count) { + details::_memcpy_async_bytes(group, _dst, _src, count); + __pipeline_commit(); +} + +/* + * Group submit batch of async-copy to cover contiguous 1D array + * and commit that batch to eventually wait for completion. + * Object counts are in datum sized chunks, not bytes. + */ +template +_CG_STATIC_QUALIFIER void memcpy_async(const TyGroup &group, TyElem *__restrict__ dst, const DstLayout &dstLayout, + const TyElem *__restrict__ src, const SrcLayout &srcLayout) { + details::_memcpy_async_datum(group, dst, dstLayout, src, srcLayout); + __pipeline_commit(); +} + +/* Group wait for prior Nth stage of memcpy_async to complete. */ +template +_CG_STATIC_QUALIFIER void wait_prior(const TyGroup &group) { + __pipeline_wait_prior(Stage); + group.sync(); +} + +/* Group wait all previously submitted memcpy_async to complete. */ +template +_CG_STATIC_QUALIFIER void wait(const TyGroup &group) { + __pipeline_wait_prior(0); + group.sync(); +} + +/***************** CG APIs including pipeline are deprecated *****************/ + +/* Group submit batch of async-copy to cover of contiguous 1D array + to a pipeline and commit the batch*/ +template +_CG_DEPRECATED _CG_STATIC_QUALIFIER void memcpy_async(TyGroup &group, TyElem *dst, size_t dstCount, const TyElem *src, size_t srcCount, + nvcuda::experimental::pipeline &pipe) { + details::_memcpy_async_datum(group, dst, dstCount, src, srcCount); + pipe.commit(); +} + +/* Group wait for prior Nth stage of memcpy_async to complete. */ +template +_CG_DEPRECATED _CG_STATIC_QUALIFIER void wait_prior(TyGroup &group, nvcuda::experimental::pipeline &pipe) { + pipe.wait_prior(); + group.sync(); +} + +/* Group wait for stage-S of memcpy_async to complete. */ +template +_CG_DEPRECATED _CG_STATIC_QUALIFIER void wait(TyGroup &group, nvcuda::experimental::pipeline &pipe, size_t stage) { + pipe.wait(stage); + group.sync(); +} +_CG_END_NAMESPACE + +#endif // _CG_ASYNC_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_reduce.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_reduce.h new file mode 100644 index 0000000000000000000000000000000000000000..7ba03fc9e4d0c78f07e3e5e1f97aff03e7a3d6f8 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_reduce.h @@ -0,0 +1,95 @@ + /* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_COALESCED_REDUCE_H_ +#define _CG_COALESCED_REDUCE_H_ + +#include "info.h" +#include "helpers.h" +#include "cooperative_groups.h" +#include "partitioning.h" +#include "coalesced_scan.h" + +_CG_BEGIN_NAMESPACE + +namespace details { + +template +_CG_QUALIFIER auto coalesced_reduce(const __single_warp_thread_block_tile& group, + TyVal&& val, + TyOp&& op) -> decltype(op(val, val)) { + auto out = val; + for (int mask = TySize >> 1; mask > 0; mask >>= 1) { + out = op(out, group.shfl_xor(out, mask)); + } + + return out; +} + +template +_CG_QUALIFIER auto coalesced_reduce(const coalesced_group& group, TyVal&& val, TyOp&& op) -> decltype(op(val, val)) { + if (group.size() == 32) { + // Full coalesced group can go through faster path by being treated as a tile of size 32 + auto tile = details::tiled_partition_internal<32, void>(); + return coalesced_reduce(tile, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + } + else { + auto scan_result = + inclusive_scan_non_contiguous(group, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + unsigned int group_mask = _coalesced_group_data_access::get_mask(group); + unsigned int last_thread_id = 31 - __clz(group_mask); + return details::tile::shuffle_dispatch::shfl( + _CG_STL_NAMESPACE::forward(scan_result), group_mask, last_thread_id, 32); + } +} + +} // details + +_CG_END_NAMESPACE + +#endif // _CG_COALESCED_REDUCE_H_ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_scan.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_scan.h new file mode 100644 index 0000000000000000000000000000000000000000..383f4bde059dd8daad7d1c56e99152ea7ee28a08 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/coalesced_scan.h @@ -0,0 +1,174 @@ +/* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_COALESCED_SCAN_H_ +#define _CG_COALESCED_SCAN_H_ + +#include "info.h" +#include "helpers.h" +#include "cooperative_groups.h" +#include "partitioning.h" +#include "functional.h" + +_CG_BEGIN_NAMESPACE + +namespace details { + +template +_CG_QUALIFIER auto inclusive_scan_contiguous(const TyGroup& group, TyVal&& val, TyOp&& op) -> decltype(op(val, val)) { + auto out = val; + for (int mask = 1; mask < group.size(); mask <<= 1) { + auto tmp = group.shfl_up(out, mask); + if (mask <= group.thread_rank()) { + out = op(out, tmp); + } + } + + return out; +} + +template +_CG_QUALIFIER auto inclusive_scan_non_contiguous(const TyGroup& group, TyVal&& val, TyOp&& op) -> decltype(op(val, val)) { + const unsigned int groupSize = group.size(); + auto out = val; + + const unsigned int mask = details::_coalesced_group_data_access::get_mask(group); + unsigned int lanemask = details::lanemask32_lt() & mask; + unsigned int srcLane = details::laneid(); + + const unsigned int base = __ffs(mask)-1; /* lane with rank == 0 */ + const unsigned int rank = __popc(lanemask); + + for (unsigned int i = 1, j = 1; i < groupSize; i <<= 1) { + if (i <= rank) { + srcLane -= j; + j = i; /* maximum possible lane */ + + unsigned int begLane = base + rank - i; /* minimum possible lane */ + + /* Next source lane is in the range [ begLane .. srcLane ] + * If begLane < srcLane then do a binary search. + */ + while (begLane < srcLane) { + const unsigned int halfLane = (begLane + srcLane) >> 1; + const unsigned int halfMask = lanemask >> halfLane; + const unsigned int d = __popc(halfMask); + if (d < i) { + srcLane = halfLane - 1; /* halfLane too large */ + } + else if ((i < d) || !(halfMask & 0x01)) { + begLane = halfLane + 1; /* halfLane too small */ + } + else { + begLane = srcLane = halfLane; /* happen to hit */ + } + } + } + + auto tmp = details::tile::shuffle_dispatch::shfl(out, mask, srcLane, 32); + if (i <= rank) { + out = op(out, tmp); + } + } + return out; +} + +template +_CG_QUALIFIER auto coalesced_inclusive_scan(const __single_warp_thread_block_tile& group, + TyVal&& val, + TyOp&& op) -> decltype(op(val, val)) { + return inclusive_scan_contiguous(group, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); +} + +template +_CG_QUALIFIER auto coalesced_inclusive_scan(const coalesced_group& group, TyVal&& val, TyOp&& op) -> decltype(op(val, val)) { + if (group.size() == 32) { + return inclusive_scan_contiguous(group, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + } + else { + return inclusive_scan_non_contiguous(group, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + } +} + +template +struct scan_choose_convertion; + +template<> +struct scan_choose_convertion { + template + _CG_STATIC_QUALIFIER details::remove_qual convert_inclusive_to_exclusive(const TyGroup& group, TyRes& result, TyVal&& val) { + return result - val; + } +}; + +template<> +struct scan_choose_convertion { + template + _CG_STATIC_QUALIFIER details::remove_qual convert_inclusive_to_exclusive(const TyGroup& group, TyRes& result, TyVal&& val) { + auto ret = group.shfl_up(result, 1); + if (group.thread_rank() == 0) { + return {}; + } + else { + return ret; + } + } +}; + +template +_CG_QUALIFIER auto convert_inclusive_to_exclusive(const TyGroup& group, TyRes& result, TyVal&& val, TyFn&& op) -> decltype(op(val, val)) { + using conversion = scan_choose_convertion<_CG_STL_NAMESPACE::is_same, cooperative_groups::plus>>::value + && _CG_STL_NAMESPACE::is_integral>::value>; + return conversion::convert_inclusive_to_exclusive(group, result, _CG_STL_NAMESPACE::forward(val)); +} + +} // details + +_CG_END_NAMESPACE + +#endif // _CG_COALESCED_SCAN_H_ \ No newline at end of file diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/driver_abi.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/driver_abi.h new file mode 100644 index 0000000000000000000000000000000000000000..9c866fcf740beb709a106057d28e8a2a1ac37924 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/driver_abi.h @@ -0,0 +1,99 @@ + /* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_DRIVER_API_H +#define _CG_DRIVER_API_H + +#include "info.h" + +_CG_BEGIN_NAMESPACE + +namespace details { + template + _CG_QUALIFIER unsigned int load_env_reg() { + // Abort by default + _CG_ABORT(); + return 0; + } + + template + _CG_QUALIFIER unsigned long long load_env_reg64() { + unsigned long long registerLo = load_env_reg(); + unsigned long long registerHi = load_env_reg(); + + return (registerHi << 32) | registerLo; + } + +// inline PTX for accessing registers requires an immediate for the special reg +# define LOAD_ENVREG(NUMBER) \ + template <> _CG_QUALIFIER unsigned int load_env_reg() { \ + unsigned int r; \ + asm ("mov.u32 %0, %%envreg" #NUMBER ";" : "=r"(r)); \ + return r; \ + } + + // Instantiate loaders for registers used + LOAD_ENVREG(0); + LOAD_ENVREG(1); + LOAD_ENVREG(2); +# undef LOAD_ENVREG + + struct grid_workspace { + unsigned int wsSize; + unsigned int barrier; + }; + + _CG_QUALIFIER grid_workspace* get_grid_workspace() { + unsigned long long gridWsAbiAddress = load_env_reg64<1, 2>(); + // Interpret the address from envreg 1 and 2 as the driver's grid workspace + return (reinterpret_cast(gridWsAbiAddress)); + } +} +_CG_END_NAMESPACE + +#endif // _CG_DRIVER_API_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/functional.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/functional.h new file mode 100644 index 0000000000000000000000000000000000000000..0f151fe2c270421ba56e22935e84c4bf93790eff --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/functional.h @@ -0,0 +1,212 @@ + /* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_FUNCTIONAL_H +#define _CG_FUNCTIONAL_H + +#include "info.h" +#include "helpers.h" + +#ifdef _CG_CPP11_FEATURES +#ifdef _CG_USE_CUDA_STL +# include +#endif + +_CG_BEGIN_NAMESPACE + +namespace details { +#ifdef _CG_USE_CUDA_STL + using cuda::std::plus; + using cuda::std::bit_and; + using cuda::std::bit_xor; + using cuda::std::bit_or; +#else + template struct plus {__device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const {return arg1 + arg2;}}; + template struct bit_and {__device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const {return arg1 & arg2;}}; + template struct bit_xor {__device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const {return arg1 ^ arg2;}}; + template struct bit_or {__device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const {return arg1 | arg2;}}; +#endif // _CG_USE_PLATFORM_STL +} // details + +template +struct plus : public details::plus {}; + +template +struct less { + __device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const { + return (arg2 < arg1) ? arg2 : arg1; + } +}; + +template +struct greater { + __device__ __forceinline__ Ty operator()(Ty arg1, Ty arg2) const { + return (arg1 < arg2) ? arg2 : arg1; + } +}; + +template +struct bit_and : public details::bit_and {}; + +template +struct bit_xor : public details::bit_xor {}; + +template +struct bit_or : public details::bit_or {}; + +#if defined(_CG_HAS_STL_ATOMICS) +namespace details { + template + using _atomic_is_type_supported = _CG_STL_NAMESPACE::integral_constant::value && (sizeof(Ty) == 4 || sizeof(Ty) == 8)>; + + template struct _atomic_op_supported : public _CG_STL_NAMESPACE::false_type {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + template struct _atomic_op_supported> : public _atomic_is_type_supported {}; + + template + _CG_QUALIFIER remove_qual atomic_cas_fallback(TyAtomic&& atomic, TyVal&& val, TyOp&& op) { + auto old = atomic.load(cuda::std::memory_order_relaxed); + while(!atomic.compare_exchange_weak(old, op(old, val), cuda::std::memory_order_relaxed)); + return old; + } + + template + struct op_picker; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_add(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_min(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_max(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_and(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_xor(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct op_picker> { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val) { + return atomic.fetch_or(val, cuda::std::memory_order_relaxed); + } + }; + + template + struct atomic_update_dispatch {}; + + template<> + struct atomic_update_dispatch { + template + _CG_STATIC_QUALIFIER remove_qual atomic_update(TyAtomic& atomic, TyVal&& val, TyOp&& op) { + return atomic_cas_fallback(atomic, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + } + }; + + template<> + struct atomic_update_dispatch { + template + _CG_STATIC_QUALIFIER TyVal atomic_update(TyAtomic& atomic, TyVal val, TyOp&& op) { + using dispatch = op_picker>; + + return dispatch::atomic_update(atomic, val); + } + }; + + template + _CG_QUALIFIER remove_qual atomic_update(TyAtomic& atomic, TyVal&& val, TyOp&& op) { + using dispatch = atomic_update_dispatch<_atomic_op_supported>::value>; + + return dispatch::atomic_update(atomic, _CG_STL_NAMESPACE::forward(val), _CG_STL_NAMESPACE::forward(op)); + } + + template + _CG_QUALIFIER void atomic_store(TyAtomic& atomic, TyVal&& val) { + atomic.store(val, cuda::std::memory_order_relaxed); + } +} +#endif + +_CG_END_NAMESPACE + +#endif +#endif //_CG_FUNCTIONAL_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/helpers.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/helpers.h new file mode 100644 index 0000000000000000000000000000000000000000..1485d9f503daa8d518af75775f7a7a415cb031d4 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/helpers.h @@ -0,0 +1,693 @@ + /* Copyright 1993-2021 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _COOPERATIVE_GROUPS_HELPERS_H_ +# define _COOPERATIVE_GROUPS_HELPERS_H_ + +#include "info.h" +#include "sync.h" + +_CG_BEGIN_NAMESPACE + +namespace details { +#ifdef _CG_CPP11_FEATURES + template struct _is_float_or_half : public _CG_STL_NAMESPACE::is_floating_point {}; +# ifdef _CG_HAS_FP16_COLLECTIVE + template <> struct _is_float_or_half<__half> : public _CG_STL_NAMESPACE::true_type {}; + template <> struct _is_float_or_half<__half2> : public _CG_STL_NAMESPACE::true_type {}; +# endif + template + using is_float_or_half = _is_float_or_half::type>; + + // Non-STL utility templates + template + using remove_qual = typename _CG_STL_NAMESPACE::remove_cv::type>::type; + + template + using is_op_type_same = _CG_STL_NAMESPACE::is_same, remove_qual + >; +#endif + + template + _CG_STATIC_QUALIFIER TyTrunc vec3_to_linear(dim3 index, dim3 nIndex) { + return ((TyTrunc)index.z * nIndex.y * nIndex.x) + + ((TyTrunc)index.y * nIndex.x) + + (TyTrunc)index.x; + } + + namespace cta { + + _CG_STATIC_QUALIFIER void sync() + { + __barrier_sync(0); + } + + _CG_STATIC_QUALIFIER unsigned int num_threads() + { + return static_cast(blockDim.x * blockDim.y * blockDim.z); + } + + _CG_STATIC_QUALIFIER unsigned int thread_rank() + { + return vec3_to_linear(threadIdx, blockDim); + } + + _CG_STATIC_QUALIFIER dim3 group_index() + { + return dim3(blockIdx.x, blockIdx.y, blockIdx.z); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() + { + return dim3(threadIdx.x, threadIdx.y, threadIdx.z); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() + { + return dim3(blockDim.x, blockDim.y, blockDim.z); + } + + // Legacy aliases + _CG_STATIC_QUALIFIER unsigned int size() + { + return num_threads(); + } + + _CG_STATIC_QUALIFIER dim3 block_dim() + { + return dim_threads(); + } + + }; + + class _coalesced_group_data_access { + public: + // Retrieve mask of coalesced groups and tiles + template + _CG_STATIC_QUALIFIER unsigned int get_mask(const TyGroup &group) { + return group.get_mask(); + } + + template + _CG_STATIC_QUALIFIER TyGroup construct_from_mask(unsigned int mask) { + return TyGroup(mask); + } + + template + _CG_STATIC_QUALIFIER void modify_meta_group(TyGroup &group, unsigned int mgRank, unsigned int mgSize) { + group._data.coalesced.metaGroupRank = mgRank; + group._data.coalesced.metaGroupSize = mgSize; + } + }; + + namespace tile { + template + struct _tile_helpers{ + _CG_STATIC_CONST_DECL unsigned int tileCount = TileCount; + _CG_STATIC_CONST_DECL unsigned int tileMask = TileMask; + _CG_STATIC_CONST_DECL unsigned int laneMask = LaneMask; + _CG_STATIC_CONST_DECL unsigned int shiftCount = ShiftCount; + }; + + template struct tile_helpers; + template <> struct tile_helpers<32> : public _tile_helpers<1, 0xFFFFFFFF, 0x1F, 5> {}; + template <> struct tile_helpers<16> : public _tile_helpers<2, 0x0000FFFF, 0x0F, 4> {}; + template <> struct tile_helpers<8> : public _tile_helpers<4, 0x000000FF, 0x07, 3> {}; + template <> struct tile_helpers<4> : public _tile_helpers<8, 0x0000000F, 0x03, 2> {}; + template <> struct tile_helpers<2> : public _tile_helpers<16, 0x00000003, 0x01, 1> {}; + template <> struct tile_helpers<1> : public _tile_helpers<32, 0x00000001, 0x00, 0> {}; + +#ifdef _CG_CPP11_FEATURES + namespace shfl { + /*********************************************************************************** + * Recursively Sliced Shuffle + * Purpose: + * Slices an input type a number of times into integral types so that shuffles + * are well defined + * Expectations: + * This object *should not* be used from a reinterpret_cast pointer unless + * some alignment guarantees can be met. Use a memcpy to guarantee that loads + * from the integral types stored within are aligned and correct. + **********************************************************************************/ + template + struct recursive_sliced_shuffle_helper; + + template + struct recursive_sliced_shuffle_helper { + int val; + + template + _CG_QUALIFIER void invoke_shuffle(const TyFn &shfl) { + val = shfl(val); + } + }; + + template + struct recursive_sliced_shuffle_helper { + int val; + recursive_sliced_shuffle_helper next; + + template + _CG_QUALIFIER void invoke_shuffle(const TyFn &shfl) { + val = shfl(val); + next.invoke_shuffle(shfl); + } + }; + } + + struct _memory_shuffle { + template + _CG_STATIC_QUALIFIER TyElem _shfl_internal(TyElem elem, const TyShflFn& fn) { + static_assert(sizeof(TyElem) <= 32, "Cooperative groups collectives are limited to types smaller than 32B"); + return TyElem{}; + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl(TyElem&& elem, unsigned int gMask, unsigned int srcRank, unsigned int threads) { + auto shfl = [=](int val) -> int { + return 0; + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_down(TyElem&& elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + auto shfl = [=](int val) -> int { + return 0; + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_up(TyElem&& elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + auto shfl = [=](int val) -> int { + return 0; + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_xor(TyElem&& elem, unsigned int gMask, unsigned int lMask, unsigned int threads) { + auto shfl = [=](int val) -> int { + return 0; + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + }; + + /*********************************************************************************** + * Intrinsic Device Function Shuffle + * Purpose: + * Uses a shuffle helper that has characteristics best suited for moving + * elements between threads + * Expectations: + * Object given will be forced into an l-value type so that it can be used + * with a helper structure that reinterprets the data into intrinsic compatible + * types + * Notes: + * !! TyRet is required so that objects are returned by value and not as + * dangling references depending on the value category of the passed object + **********************************************************************************/ + struct _intrinsic_compat_shuffle { + template + using shfl_helper = shfl::recursive_sliced_shuffle_helper; + + template + _CG_STATIC_QUALIFIER TyElem _shfl_internal(TyElem elem, const TyShflFn& fn) { + static_assert(__is_trivially_copyable(TyElem), "Type is not compatible with device shuffle"); + shfl_helper helper; + memcpy(&helper, &elem, sizeof(TyElem)); + helper.invoke_shuffle(fn); + memcpy(&elem, &helper, sizeof(TyElem)); + return elem; + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl(TyElem&& elem, unsigned int gMask, unsigned int srcRank, unsigned int threads) { + auto shfl = [=](int val) -> int { + return __shfl_sync(gMask, val, srcRank, threads); + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_down(TyElem&& elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + auto shfl = [=](int val) -> int { + return __shfl_down_sync(gMask, val, delta, threads); + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_up(TyElem&& elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + auto shfl = [=](int val) -> int { + return __shfl_up_sync(gMask, val, delta, threads); + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + + template > + _CG_STATIC_QUALIFIER TyRet shfl_xor(TyElem&& elem, unsigned int gMask, unsigned int lMask, unsigned int threads) { + auto shfl = [=](int val) -> int { + return __shfl_xor_sync(gMask, val, lMask, threads); + }; + + return _shfl_internal(_CG_STL_NAMESPACE::forward(elem), shfl); + } + }; + + struct _native_shuffle { + template + _CG_STATIC_QUALIFIER TyElem shfl( + TyElem elem, unsigned int gMask, unsigned int srcRank, unsigned int threads) { + return static_cast(__shfl_sync(gMask, elem, srcRank, threads)); + } + + template + _CG_STATIC_QUALIFIER TyElem shfl_down( + TyElem elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + return static_cast(__shfl_down_sync(gMask, elem, delta, threads)); + } + + template + _CG_STATIC_QUALIFIER TyElem shfl_up( + TyElem elem, unsigned int gMask, unsigned int delta, unsigned int threads) { + return static_cast(__shfl_up_sync(gMask, elem, delta, threads)); + } + + template + _CG_STATIC_QUALIFIER TyElem shfl_xor( + TyElem elem, unsigned int gMask, unsigned int lMask, unsigned int threads) { + return static_cast(__shfl_xor_sync(gMask, elem, lMask, threads)); + } + }; + + // Almost all arithmetic types are supported by native shuffle + // Vector types are the exception + template + using use_native_shuffle = _CG_STL_NAMESPACE::integral_constant< + bool, + _CG_STL_NAMESPACE::is_integral< + remove_qual>::value || + details::is_float_or_half< + remove_qual>::value + >; + + constexpr unsigned long long _MemoryShuffleCutoff = 32; + + template ::value, + bool InMem = (sizeof(TyElem) > _MemoryShuffleCutoff)> + struct shuffle_dispatch; + + template + struct shuffle_dispatch : public _native_shuffle {}; + + template + struct shuffle_dispatch : public _intrinsic_compat_shuffle {}; + + template + struct shuffle_dispatch : public _memory_shuffle {}; + +#endif //_CG_CPP11_FEATURES + }; + + namespace multi_grid { + struct multi_grid_functions; + }; + + namespace grid { + _CG_STATIC_QUALIFIER unsigned int barrier_arrive(unsigned int *bar) { + return details::sync_grids_arrive(bar); + } + + _CG_STATIC_QUALIFIER void barrier_wait(unsigned int token, unsigned int *bar) { + details::sync_grids_wait(token, bar); + } + + _CG_STATIC_QUALIFIER void sync(unsigned int *bar) { + unsigned int token = details::sync_grids_arrive(bar); + details::sync_grids_wait(token, bar); + } + + _CG_STATIC_QUALIFIER unsigned long long num_blocks() + { + // grid.y * grid.z -> [max(65535) * max(65535)] fits within 4b, promote after multiplication + // grid.x * (grid.y * grid.z) -> [max(2^31-1) * max(65535 * 65535)] exceeds 4b, promote before multiplication + return (unsigned long long)gridDim.x * (gridDim.y * gridDim.z); + } + + _CG_STATIC_QUALIFIER unsigned long long num_threads() + { + return num_blocks() * cta::num_threads(); + } + + _CG_STATIC_QUALIFIER unsigned long long block_rank() + { + return vec3_to_linear(blockIdx, gridDim); + } + + _CG_STATIC_QUALIFIER unsigned long long thread_rank() + { + return block_rank() * cta::num_threads() + cta::thread_rank(); + } + + _CG_STATIC_QUALIFIER dim3 dim_blocks() + { + return dim3(gridDim.x, gridDim.y, gridDim.z); + } + + _CG_STATIC_QUALIFIER dim3 block_index() + { + return dim3(blockIdx.x, blockIdx.y, blockIdx.z); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() + { + return dim3(gridDim.x * blockDim.x, gridDim.y * blockDim.y, gridDim.z * blockDim.z); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() + { + return dim3(blockIdx.x * blockDim.x + threadIdx.x, + blockIdx.y * blockDim.y + threadIdx.y, + blockIdx.z * blockDim.z + threadIdx.z); + } + +#if defined(_CG_HAS_CLUSTER_GROUP) + _CG_STATIC_QUALIFIER dim3 dim_clusters() { + return __clusterGridDimInClusters(); + } + + _CG_STATIC_QUALIFIER unsigned long long num_clusters() { + const dim3 dimClusters = dim_clusters(); + return dimClusters.x * dimClusters.y * dimClusters.z; + } + + _CG_STATIC_QUALIFIER dim3 cluster_index() { + return __clusterIdx(); + } + + _CG_STATIC_QUALIFIER unsigned long long cluster_rank() { + return vec3_to_linear(cluster_index(), dim_clusters()); + } +#endif + + // Legacy aliases + _CG_STATIC_QUALIFIER unsigned long long size() + { + return num_threads(); + } + + _CG_STATIC_QUALIFIER dim3 grid_dim() + { + return dim_blocks(); + } + }; + + +#if defined(_CG_HAS_MULTI_GRID_GROUP) + + namespace multi_grid { + _CG_STATIC_QUALIFIER unsigned long long get_intrinsic_handle() + { +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + return (cudaCGGetIntrinsicHandle(cudaCGScopeMultiGrid)); +#else /* !(__CUDACC_RDC__ || __CUDACC_EWP__) */ + return 0; +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + } + + _CG_STATIC_QUALIFIER void sync(const unsigned long long handle) + { +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + cudaError_t err = cudaCGSynchronize(handle, 0); +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + } + + _CG_STATIC_QUALIFIER unsigned int size(const unsigned long long handle) + { + unsigned int numThreads = 0; +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + cudaCGGetSize(&numThreads, NULL, handle); +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + return numThreads; + } + + _CG_STATIC_QUALIFIER unsigned int thread_rank(const unsigned long long handle) + { + unsigned int threadRank = 0; +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + cudaCGGetRank(&threadRank, NULL, handle); +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + return threadRank; + } + + _CG_STATIC_QUALIFIER unsigned int grid_rank(const unsigned long long handle) + { + unsigned int gridRank = 0; +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + cudaCGGetRank(NULL, &gridRank, handle); +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + return gridRank; + } + + _CG_STATIC_QUALIFIER unsigned int num_grids(const unsigned long long handle) + { + unsigned int numGrids = 0; +#if defined(__CUDACC_RDC__) || defined(__CUDACC_EWP__) + //this function is defined in device runtime library + //which requires separate compilation mode (__CUDACC_RDC__) + //or extended whole program mode (__CUDACC_EWP__) + cudaCGGetSize(NULL, &numGrids, handle); +#endif /* __CUDACC_RDC__ || __CUDACC_EWP__ */ + return numGrids; + } + +# ifdef _CG_CPP11_FEATURES + struct multi_grid_functions { + decltype(multi_grid::get_intrinsic_handle) *get_intrinsic_handle; + decltype(multi_grid::sync) *sync; + decltype(multi_grid::size) *size; + decltype(multi_grid::thread_rank) *thread_rank; + decltype(multi_grid::grid_rank) *grid_rank; + decltype(multi_grid::num_grids) *num_grids; + }; + + template + _CG_STATIC_QUALIFIER const multi_grid_functions* load_grid_intrinsics() { + __constant__ static const multi_grid_functions mgf { + &multi_grid::get_intrinsic_handle, + &multi_grid::sync, + &multi_grid::size, + &multi_grid::thread_rank, + &multi_grid::grid_rank, + &multi_grid::num_grids + }; + + return &mgf; + } +# endif + }; +#endif + +#if defined(_CG_HAS_CLUSTER_GROUP) + namespace cluster { + + _CG_STATIC_QUALIFIER bool isReal() + { + return __clusterDimIsSpecified(); + } + + _CG_STATIC_QUALIFIER void barrier_arrive() + { + __cluster_barrier_arrive(); + } + + _CG_STATIC_QUALIFIER void barrier_wait() + { + __cluster_barrier_wait(); + } + + _CG_STATIC_QUALIFIER void sync() + { + barrier_arrive(); + barrier_wait(); + } + + _CG_STATIC_QUALIFIER unsigned int query_shared_rank(const void *addr) + { + return __cluster_query_shared_rank(addr); + } + + template + _CG_STATIC_QUALIFIER T* map_shared_rank(T *addr, int rank) + { + return static_cast(__cluster_map_shared_rank(addr, rank)); + } + + _CG_STATIC_QUALIFIER dim3 block_index() + { + return __clusterRelativeBlockIdx(); + } + + _CG_STATIC_QUALIFIER unsigned int block_rank() + { + return __clusterRelativeBlockRank(); + } + + _CG_STATIC_QUALIFIER dim3 thread_index() + { + const dim3 blockIndex = block_index(); + return dim3(blockIndex.x * blockDim.x + threadIdx.x, + blockIndex.y * blockDim.y + threadIdx.y, + blockIndex.z * blockDim.z + threadIdx.z); + } + + _CG_STATIC_QUALIFIER unsigned int thread_rank() + { + return block_rank() * cta::num_threads() + cta::thread_rank(); + } + + _CG_STATIC_QUALIFIER dim3 dim_blocks() + { + return __clusterDim(); + } + + _CG_STATIC_QUALIFIER unsigned int num_blocks() + { + return __clusterSizeInBlocks(); + } + + _CG_STATIC_QUALIFIER dim3 dim_threads() + { + const dim3 dimBlocks = dim_blocks(); + const unsigned int x = dimBlocks.x * blockDim.x; + const unsigned int y = dimBlocks.y * blockDim.y; + const unsigned int z = dimBlocks.z * blockDim.z; + return dim3(x, y, z); + } + + _CG_STATIC_QUALIFIER unsigned int num_threads() + { + return num_blocks() * cta::num_threads(); + } + + }; +#endif + + _CG_STATIC_QUALIFIER unsigned int laneid() + { + unsigned int laneid; + asm ("mov.u32 %0, %%laneid;" : "=r"(laneid)); + return laneid; + } + + _CG_STATIC_QUALIFIER unsigned int lanemask32_eq() + { + unsigned int lanemask32_eq; + asm ("mov.u32 %0, %%lanemask_eq;" : "=r"(lanemask32_eq)); + return (lanemask32_eq); + } + + _CG_STATIC_QUALIFIER unsigned int lanemask32_lt() + { + unsigned int lanemask32_lt; + asm ("mov.u32 %0, %%lanemask_lt;" : "=r"(lanemask32_lt)); + return (lanemask32_lt); + } + + _CG_STATIC_QUALIFIER void abort() + { + _CG_ABORT(); + } + + template + _CG_QUALIFIER void assert_if_not_arithmetic() { +#ifdef _CG_CPP11_FEATURES + static_assert( + _CG_STL_NAMESPACE::is_integral::value || + details::is_float_or_half::value, + "Error: Ty is neither integer or float" + ); +#endif //_CG_CPP11_FEATURES + } + +#ifdef _CG_CPP11_FEATURES + _CG_STATIC_QUALIFIER constexpr unsigned int log2(unsigned int x) { + return x == 1 ? 0 : 1 + log2(x / 2); + } +#endif //_CG_CPP11_FEATURES + +}; // !Namespace internal + +_CG_END_NAMESPACE + +#endif /* !_COOPERATIVE_GROUPS_HELPERS_H_ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/info.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/info.h new file mode 100644 index 0000000000000000000000000000000000000000..6abbea1e1ec5b0a92c18baabec7485929fe91c0d --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/info.h @@ -0,0 +1,345 @@ + /* Copyright 1993-2021 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + + +#include + +#ifndef _CG_INFO_H_ +#define _CG_INFO_H_ +/* +** Define: _CG_VERSION +*/ +#define _CG_VERSION 1000 + +/* +** Define: _CG_ABI_VERSION +*/ +#ifndef _CG_ABI_VERSION +# define _CG_ABI_VERSION 1 +#endif + +/* +** Define: _CG_ABI_EXPERIMENTAL +** Desc: If enabled, sets all features enabled (ABI-breaking or experimental) +*/ +#if defined(_CG_ABI_EXPERIMENTAL) +#endif + +#define _CG_CONCAT_INNER(x, y) x ## y +#define _CG_CONCAT_OUTER(x, y) _CG_CONCAT_INNER(x, y) +#define _CG_NAMESPACE _CG_CONCAT_OUTER(__v, _CG_ABI_VERSION) + +#define _CG_BEGIN_NAMESPACE \ + namespace cooperative_groups { namespace _CG_NAMESPACE { +#define _CG_END_NAMESPACE \ + }; using namespace _CG_NAMESPACE; }; + +#if (defined(__cplusplus) && (__cplusplus >= 201103L)) || (defined(_MSC_VER) && (_MSC_VER >= 1900)) +# define _CG_CPP11_FEATURES +#endif + +#if !defined(_CG_QUALIFIER) +# define _CG_QUALIFIER __forceinline__ __device__ +#endif +#if !defined(_CG_STATIC_QUALIFIER) +# define _CG_STATIC_QUALIFIER static __forceinline__ __device__ +#endif +#if !defined(_CG_CONSTEXPR_QUALIFIER) +# if defined(_CG_CPP11_FEATURES) +# define _CG_CONSTEXPR_QUALIFIER constexpr __forceinline__ __device__ +# else +# define _CG_CONSTEXPR_QUALIFIER _CG_QUALIFIER +# endif +#endif +#if !defined(_CG_STATIC_CONSTEXPR_QUALIFIER) +# if defined(_CG_CPP11_FEATURES) +# define _CG_STATIC_CONSTEXPR_QUALIFIER static constexpr __forceinline__ __device__ +# else +# define _CG_STATIC_CONSTEXPR_QUALIFIER _CG_STATIC_QUALIFIER +# endif +#endif + +#if defined(_MSC_VER) +# define _CG_DEPRECATED __declspec(deprecated) +#else +# define _CG_DEPRECATED __attribute__((deprecated)) +#endif + +#if defined(__CUDA_MINIMUM_ARCH__) +# define _CG_CUDA_ARCH __CUDA_MINIMUM_ARCH__ +#elif defined(__CUDA_ARCH__) +# define _CG_CUDA_ARCH __CUDA_ARCH__ +#endif + +#if (_CG_CUDA_ARCH >= 600) || !defined(_CG_CUDA_ARCH) +# define _CG_HAS_GRID_GROUP +#endif +#if (_CG_CUDA_ARCH >= 600) || !defined(_CG_CUDA_ARCH) +# define _CG_HAS_MULTI_GRID_GROUP +#endif +#if (_CG_CUDA_ARCH >= 700) || !defined(_CG_CUDA_ARCH) +# define _CG_HAS_MATCH_COLLECTIVE +#endif + +#if ((_CG_CUDA_ARCH >= 800) || !defined(_CG_CUDA_ARCH)) && !defined(_CG_USER_PROVIDED_SHARED_MEMORY) +# define _CG_HAS_RESERVED_SHARED +#endif + +#if ((_CG_CUDA_ARCH >= 900) || !defined(_CG_CUDA_ARCH)) && \ + (defined(__NVCC__) || defined(__CUDACC_RTC__) || defined(_CG_CLUSTER_INTRINSICS_AVAILABLE)) && \ + defined(_CG_CPP11_FEATURES) +# define _CG_HAS_CLUSTER_GROUP +#endif + +#if (_CG_CUDA_ARCH >= 900) || !defined(_CG_CUDA_ARCH) +# define _CG_HAS_INSTR_ELECT +#endif + +// Has __half and __half2 +// Only usable if you include the cuda_fp16.h extension, and +// _before_ including cooperative_groups.h +#ifdef __CUDA_FP16_TYPES_EXIST__ +# define _CG_HAS_FP16_COLLECTIVE +#endif + +// Include libcu++ where supported. +#if defined(_CG_CPP11_FEATURES) && !defined(__ibmxl__) && (!defined(_MSC_VER) || defined(_WIN64)) && \ + !defined(_CG_LIMIT_INCLUDED_DEPENDENCIES) +# define _CG_USE_CUDA_STL +#else +# define _CG_USE_OWN_TRAITS +#endif + +#if defined(_CG_USE_CUDA_STL) && !defined(__QNX__) && (!defined(__CUDA_ARCH__) || \ + ((!defined(_MSC_VER) && __CUDA_ARCH__ >= 600) || (defined(_MSC_VER) && __CUDA_ARCH__ >= 700))) +# define _CG_HAS_STL_ATOMICS +#endif + +#ifdef _CG_CPP11_FEATURES +// Use cuda::std:: for type_traits +# if defined(_CG_USE_CUDA_STL) +# define _CG_STL_NAMESPACE cuda::std +# include +// Use CG's implementation of type traits +# else +# define _CG_STL_NAMESPACE cooperative_groups::details::templates +# endif +#endif + +#ifdef _CG_CPP11_FEATURES +# define _CG_STATIC_CONST_DECL static constexpr +# define _CG_CONST_DECL constexpr +#else +# define _CG_STATIC_CONST_DECL static const +# define _CG_CONST_DECL const +#endif + +#if (defined(_MSC_VER) && !defined(_WIN64)) || defined(__arm__) +# define _CG_ASM_PTR_CONSTRAINT "r" +#else +# define _CG_ASM_PTR_CONSTRAINT "l" +#endif + +/* +** Define: CG_DEBUG +** What: Enables various runtime safety checks +*/ +#if defined(__CUDACC_DEBUG__) && defined(CG_DEBUG) && !defined(NDEBUG) +# define _CG_DEBUG +#endif + +#if defined(_CG_DEBUG) +# include +# define _CG_ASSERT(x) assert((x)); +# define _CG_ABORT() assert(0); +#else +# define _CG_ASSERT(x) +# define _CG_ABORT() __trap(); +#endif + +_CG_BEGIN_NAMESPACE + +namespace details { + _CG_STATIC_CONST_DECL unsigned int default_max_block_size = 1024; + +#if defined(_CG_CPP11_FEATURES) && !defined(_CG_USE_CUDA_STL) +namespace templates { + +/** + * Integral constants + **/ +template +struct integral_constant { + static constexpr Ty value = Val; + typedef Ty type; + + _CG_QUALIFIER constexpr operator type() const noexcept { return value; } + _CG_QUALIFIER constexpr type operator()() const noexcept { return value; } +}; + +typedef integral_constant true_type; +typedef integral_constant false_type; + +/** + * CV Qualifiers + **/ +template struct is_lvalue_reference : public details::templates::false_type {}; +template struct is_lvalue_reference : public details::templates::true_type {}; + +template struct remove_reference {typedef Ty type;}; +template struct remove_reference {typedef Ty type;}; +template struct remove_reference {typedef Ty type;}; + +template +using remove_reference_t = typename details::templates::remove_reference::type; + +template struct remove_const {typedef Ty type;}; +template struct remove_const {typedef Ty type;}; + +template struct remove_volatile {typedef Ty type;}; +template struct remove_volatile {typedef Ty type;}; + +template struct remove_cv {typedef typename details::templates::remove_volatile::type>::type type;}; + +template +using remove_cv_t = typename details::templates::remove_cv::type; + +template +_CG_QUALIFIER Ty&& forward(remove_reference_t &t) noexcept { + return static_cast(t); +} + +template +_CG_QUALIFIER Ty&& forward(remove_reference_t &&t) noexcept { + static_assert(!details::templates::is_lvalue_reference::value, "Forwarding an rvalue as an lvalue is not allowed."); + return static_cast(t); +} + +/** + * is_integral + **/ +template struct _is_integral : public details::templates::false_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +template <> struct _is_integral : public details::templates::true_type {}; +//Vector type support? + +template +struct is_integral : public details::templates::_is_integral::type> {}; + +/** + * is_floating_point + **/ +template struct _is_floating_point : public details::templates::false_type {}; +template <> struct _is_floating_point : public details::templates::true_type {}; +template <> struct _is_floating_point : public details::templates::true_type {}; +template <> struct _is_floating_point : public details::templates::true_type {}; +# ifdef __CUDA_FP16_TYPES_EXIST__ +template <> struct _is_floating_point<__half> : public details::templates::true_type {}; +template <> struct _is_floating_point<__half2> : public details::templates::true_type {}; +# endif +//Vector type support? + +template +struct is_floating_point : public details::templates::_is_floating_point::type> {}; + +template +struct is_arithmetic : details::templates::integral_constant< + bool, + details::templates::is_integral::value || + details::templates::is_floating_point::value> {}; + +template ::value> +struct _is_unsigned : details::templates::integral_constant {}; + +template +struct _is_unsigned : details::templates::false_type {}; + +template +struct is_unsigned : _is_unsigned::type> {}; + +template struct _is_pointer : public details::templates::false_type {}; +template struct _is_pointer : public details::templates::true_type {}; + +template +struct is_pointer : _is_pointer::type> {}; + +/** + * programmatic type traits + **/ +template +struct enable_if {}; + +template +struct enable_if { typedef Ty type; }; + +template +using enable_if_t = typename details::templates::enable_if::type; + +template +struct is_same : details::templates::false_type {}; + +template +struct is_same : details::templates::true_type {}; + +} // templates +#endif // _CG_CPP11_FEATURES + +} // details +_CG_END_NAMESPACE + + +#endif // _CG_INFO_H_ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/invoke.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/invoke.h new file mode 100644 index 0000000000000000000000000000000000000000..f00314ce140e390be90a1ab3c328fd73d73c0d46 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/invoke.h @@ -0,0 +1,189 @@ +/* + * Copyright 1993-2022 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_INVOKE_H +#define _CG_INVOKE_H + +#include "info.h" +#include "helpers.h" + +#if defined(_CG_CPP11_FEATURES) + +_CG_BEGIN_NAMESPACE + +namespace details { + + template + struct _elect_group_supported : _CG_STL_NAMESPACE::false_type {}; +#ifdef _CG_HAS_INSTR_ELECT + template<> + struct _elect_group_supported : _CG_STL_NAMESPACE::true_type {}; + template + struct _elect_group_supported> : + _CG_STL_NAMESPACE::integral_constant {}; +#endif + + template + struct elect_group_supported : public _elect_group_supported> {}; + + template + _CG_STATIC_QUALIFIER bool elect_one(const Group& group, unsigned int mask, unsigned int& leader_lane) { + int is_leader = 0; +#ifdef _CG_HAS_INSTR_ELECT + asm("{\n\t" + " .reg .pred p;\n\t" + " elect.sync %0|p, %2;\n\t" + " @p mov.s32 %1, 1;\n\t" + "}" + : "+r"(leader_lane), "+r"(is_leader) : "r" (mask)); +#endif + return is_leader; + } + + template + struct invoke_one_impl {}; + + template<> + struct invoke_one_impl { + template + _CG_STATIC_QUALIFIER void invoke_one(const Group& group, Fn&& fn, Args&&... args) { + auto mask = details::_coalesced_group_data_access::get_mask(group); + unsigned int leader_lane = 0; + + if (elect_one(group, mask, leader_lane)) { + _CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...); + } + } + + template + _CG_STATIC_QUALIFIER auto invoke_one_broadcast(const Group& group, Fn&& fn, Args&&... args) + -> typename _CG_STL_NAMESPACE::remove_reference< + decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...))>::type { + + using ResultType = decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...)); + details::remove_qual result; + auto mask = details::_coalesced_group_data_access::get_mask(group); + unsigned int leader_lane = 0; + + if (elect_one(group, mask, leader_lane)) { + result = _CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...); + } + + // Need to use low level api instead of group.shfl, because elect_one returns lane id, not group rank. + return tile::shuffle_dispatch::shfl(result, mask, leader_lane, 32); + } + }; + + template<> + struct invoke_one_impl { + template + _CG_STATIC_QUALIFIER void invoke_one(const Group& group, Fn&& fn, Args&&... args) { + if (group.thread_rank() == 0) { + _CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...); + } + } + + template + _CG_STATIC_QUALIFIER auto invoke_one_broadcast(const Group& group, Fn&& fn, Args&&... args) + -> typename _CG_STL_NAMESPACE::remove_reference< + decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...))>::type { + + using ResultType = decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...)); + details::remove_qual result; + + if (group.thread_rank() == 0) { + result = _CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...); + } + + return group.shfl(result, 0); + } + }; + + +}; // namespace details + +template +_CG_QUALIFIER void invoke_one(const Group& group, Fn&& fn, Args&&... args) { + using impl = details::invoke_one_impl::value>; + impl::invoke_one(group, _CG_STL_NAMESPACE::forward(fn), _CG_STL_NAMESPACE::forward(args)...); +} + +template +_CG_QUALIFIER auto invoke_one_broadcast(const coalesced_group& group, Fn&& fn, Args&&... args) + -> typename _CG_STL_NAMESPACE::remove_reference< + decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...))>::type { + + using ResultType = decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...)); + static_assert(!_CG_STL_NAMESPACE::is_same::value, + "For invocables returning void invoke_one should be used instead"); + using impl = details::invoke_one_impl::value>; + return impl::invoke_one_broadcast(group, + _CG_STL_NAMESPACE::forward(fn), + _CG_STL_NAMESPACE::forward(args)...); +} + +template +_CG_QUALIFIER auto invoke_one_broadcast(const thread_block_tile& group, Fn&& fn, Args&&... args) + -> typename _CG_STL_NAMESPACE::remove_reference< + decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...))>::type { + + using ResultType = decltype(_CG_STL_NAMESPACE::forward(fn)(_CG_STL_NAMESPACE::forward(args)...)); + static_assert(!_CG_STL_NAMESPACE::is_same::value, + "For invocables returning void invoke_one should be used instead"); + using impl = details::invoke_one_impl>::value>; + return impl::invoke_one_broadcast(group, + _CG_STL_NAMESPACE::forward(fn), + _CG_STL_NAMESPACE::forward(args)...); +} + +_CG_END_NAMESPACE + +#endif //_CG_CPP11_FEATURES + +#endif // _CG_INVOKE_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/memory.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/memory.h new file mode 100644 index 0000000000000000000000000000000000000000..25fdc7646932889a4992b8d3a6249a610c76709a --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/memory.h @@ -0,0 +1,136 @@ +/* Copyright 1993-2022 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _COOPERATIVE_GROUPS_MEMORY_H_ +# define _COOPERATIVE_GROUPS_MEMORY_H_ + +#include "info.h" + +_CG_BEGIN_NAMESPACE + +#if defined(_CG_CPP11_FEATURES) +namespace details { + _CG_STATIC_CONST_DECL int scratch_num_reserved_bytes = 12; + + // Should only be called for SM80+ + _CG_STATIC_QUALIFIER void* reserved_shared_ptr() + { + unsigned long long ptr = 0; + NV_IF_TARGET(NV_PROVIDES_SM_80, + (asm ("{\n\t" + " .reg .u32 start;\n\t" + " .reg .u64 extended;\n\t" + " mov.u32 start, %%reserved_smem_offset_1;\n\t" + " cvt.u64.u32 extended, start;\n\t" + " cvta.shared.u64 %0, extended;\n\t" + "}" + : "=l"(ptr));) + ) + return reinterpret_cast(ptr); + } + + struct multi_warp_scratch { + // One barrier per possible size of the group. + _CG_STATIC_CONST_DECL unsigned int memory_barriers_count = 5; + _CG_STATIC_CONST_DECL size_t sync_memory_size = memory_barriers_count * sizeof(barrier_t); + + using communication_type = unsigned long long; + _CG_STATIC_CONST_DECL size_t communication_size = sizeof(communication_type); + + // Layout of the scratch space: + barrier_t barriers[memory_barriers_count]; + char reserved[scratch_num_reserved_bytes]; // Reserve 12 bytes for future use + communication_type communication_memory[default_max_block_size / 32]; + + _CG_STATIC_CONSTEXPR_QUALIFIER unsigned int scratch_size_needed(unsigned int max_block_size) { + // One slot of collectives memory per warp. + return scratch_num_reserved_bytes + (unsigned int)sync_memory_size + max_block_size / 32 * (unsigned int)communication_size; + } + + _CG_QUALIFIER void init_barriers(unsigned int thread_rank) { + if (thread_rank < memory_barriers_count) { + barriers[thread_rank] = 0; + } + } + }; + +#if defined(_CG_HAS_RESERVED_SHARED) + // CG can expect at least 288 bytes available in reserved shared + static_assert(sizeof(multi_warp_scratch) <= 288, "multi-warp scratch size is too large"); +#endif + + // Make sure the structure can fit into the user provided memory + static_assert(sizeof(multi_warp_scratch) <= multi_warp_scratch::scratch_size_needed(default_max_block_size), + "multi-warp scratch size is too large"); + + + _CG_QUALIFIER multi_warp_scratch* get_scratch_ptr(void* user_scratch) { + void *ptr; + NV_IF_ELSE_TARGET(NV_PROVIDES_SM_80, + (ptr = reserved_shared_ptr();) + , + (ptr = user_scratch;) + ) + return static_cast(ptr); + + } + +} + +template +struct __align__(details::multi_warp_scratch::communication_size) block_tile_memory { +private: +#if !defined(_CG_HAS_RESERVED_SHARED) + char scratch[details::multi_warp_scratch::scratch_size_needed(MaxBlockSize)]; +#endif +}; +#endif + +_CG_END_NAMESPACE + +#endif /* !_COOPERATIVE_GROUPS_MEMORY_H_ */ diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/partitioning.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/partitioning.h new file mode 100644 index 0000000000000000000000000000000000000000..fe66fb926876c045b49a2c8f0b83379dae7599fa --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/partitioning.h @@ -0,0 +1,160 @@ +/* + * Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * This source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * These Licensed Deliverables contained herein is PROPRIETARY and + * CONFIDENTIAL to NVIDIA and is being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. IT IS + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_PARTITIONING_H +#define _CG_PARTITIONING_H + +#include "info.h" +#include "helpers.h" + +_CG_BEGIN_NAMESPACE + +namespace details { + + template + _CG_STATIC_QUALIFIER coalesced_group _binary_partition(const TyGroup &tile, bool pred) { + const unsigned int fullMask = ~0u; + + unsigned int thisMask = _coalesced_group_data_access::get_mask(tile); + unsigned int predMask = pred ? 0 : fullMask; + unsigned int setMask = __ballot_sync(thisMask, pred); + + if (setMask == thisMask || setMask == 0) { + coalesced_group subTile = _coalesced_group_data_access::construct_from_mask(thisMask); + _coalesced_group_data_access::modify_meta_group(subTile, 0, 1); + return subTile; + } + else { + unsigned int subMask = thisMask & (setMask ^ predMask); + coalesced_group subTile = _coalesced_group_data_access::construct_from_mask(subMask); + _coalesced_group_data_access::modify_meta_group(subTile, pred, 2); + return subTile; + } + } + +#if defined(_CG_HAS_MATCH_COLLECTIVE) && defined(_CG_CPP11_FEATURES) + template + struct _labeled_partition_dispatch { + template + _CG_QUALIFIER coalesced_group operator()(const TyGroup &tile, TyPredicate pred) { + unsigned int thisMask = _coalesced_group_data_access::get_mask(tile); + unsigned int subMask = __match_any_sync(thisMask, pred); + unsigned int laneId = details::laneid(); + + coalesced_group subTile = _coalesced_group_data_access::construct_from_mask(subMask); + + int leaderLaneId = __ffs(subMask) - 1; + bool isLeader = leaderLaneId == laneId; + unsigned int leaderMask = __ballot_sync(thisMask, isLeader); + + // Count leaders with lower laneid, that will be the meta rank of this tile + unsigned int tileRank = __popc(leaderMask & ((1 << leaderLaneId) - 1)); + + _coalesced_group_data_access::modify_meta_group(subTile, tileRank, __popc(leaderMask)); + + return subTile; + } + }; + + template <> + struct _labeled_partition_dispatch { + template + _CG_QUALIFIER coalesced_group operator()(const TyGroup &tile, bool pred) { + return _binary_partition(tile, pred); + } + }; + + template + struct _labeled_partition_dispatch { + template + _CG_QUALIFIER coalesced_group operator()(const TyGroup &tile, TyPredicate* pred) { + auto impl = _labeled_partition_dispatch(); + return impl(tile, reinterpret_cast(pred)); + } + }; +#endif +}; // namespace details + +_CG_STATIC_QUALIFIER coalesced_group binary_partition(const coalesced_group &tile, bool pred) { + return details::_binary_partition(tile, pred); +} + +template +_CG_STATIC_QUALIFIER coalesced_group binary_partition(const thread_block_tile &tile, bool pred) { +#ifdef _CG_CPP11_FEATURES + static_assert(Size <= 32, "Binary partition is available only for tiles of size smaller or equal to 32"); +#endif + return details::_binary_partition(tile, pred); +} + + +#if defined(_CG_HAS_MATCH_COLLECTIVE) && defined(_CG_CPP11_FEATURES) +template +_CG_STATIC_QUALIFIER coalesced_group labeled_partition(const coalesced_group &tile, TyPredicate pred) { + static_assert(_CG_STL_NAMESPACE::is_integral::value || + _CG_STL_NAMESPACE::is_pointer::value, + "labeled_partition predicate must be an integral or pointer type"); + auto dispatch = details::_labeled_partition_dispatch>(); + return dispatch(tile, pred); +} + +template +_CG_STATIC_QUALIFIER coalesced_group labeled_partition(const thread_block_tile &tile, TyPredicate pred) { + static_assert(_CG_STL_NAMESPACE::is_integral::value || + _CG_STL_NAMESPACE::is_pointer::value, + "labeled_partition predicate must be an integral or pointer type"); + static_assert(Size <= 32, "Labeled partition is available only for tiles of size smaller or equal to 32"); + auto dispatch = details::_labeled_partition_dispatch>(); + return dispatch(tile, pred); +} +#endif + +_CG_END_NAMESPACE + +#endif // _CG_PARTITIONING_H diff --git a/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/reduce.h b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/reduce.h new file mode 100644 index 0000000000000000000000000000000000000000..b89d7fbaf340c1febd6c8a7de13f346daa1a1371 --- /dev/null +++ b/miniconda3/envs/ladir/lib/python3.10/site-packages/nvidia/cuda_runtime/include/cooperative_groups/details/reduce.h @@ -0,0 +1,424 @@ + /* Copyright 1993-2016 NVIDIA Corporation. All rights reserved. + * + * NOTICE TO LICENSEE: + * + * The source code and/or documentation ("Licensed Deliverables") are + * subject to NVIDIA intellectual property rights under U.S. and + * international Copyright laws. + * + * The Licensed Deliverables contained herein are PROPRIETARY and + * CONFIDENTIAL to NVIDIA and are being provided under the terms and + * conditions of a form of NVIDIA software license agreement by and + * between NVIDIA and Licensee ("License Agreement") or electronically + * accepted by Licensee. Notwithstanding any terms or conditions to + * the contrary in the License Agreement, reproduction or disclosure + * of the Licensed Deliverables to any third party without the express + * written consent of NVIDIA is prohibited. + * + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, NVIDIA MAKES NO REPRESENTATION ABOUT THE + * SUITABILITY OF THESE LICENSED DELIVERABLES FOR ANY PURPOSE. THEY ARE + * PROVIDED "AS IS" WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. + * NVIDIA DISCLAIMS ALL WARRANTIES WITH REGARD TO THESE LICENSED + * DELIVERABLES, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, + * NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE. + * NOTWITHSTANDING ANY TERMS OR CONDITIONS TO THE CONTRARY IN THE + * LICENSE AGREEMENT, IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY + * SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY + * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, + * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS + * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE + * OF THESE LICENSED DELIVERABLES. + * + * U.S. Government End Users. These Licensed Deliverables are a + * "commercial item" as that term is defined at 48 C.F.R. 2.101 (OCT + * 1995), consisting of "commercial computer software" and "commercial + * computer software documentation" as such terms are used in 48 + * C.F.R. 12.212 (SEPT 1995) and are provided to the U.S. Government + * only as a commercial end item. Consistent with 48 C.F.R.12.212 and + * 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), all + * U.S. Government End Users acquire the Licensed Deliverables with + * only those rights set forth herein. + * + * Any use of the Licensed Deliverables in individual and commercial + * software must include, in the user documentation and internal + * comments to the code, the above Disclaimer and U.S. Government End + * Users Notice. + */ + +#ifndef _CG_REDUCE_H_ +#define _CG_REDUCE_H_ + +#include "info.h" +#include "helpers.h" +#include "coalesced_reduce.h" +#include "functional.h" +#include "cooperative_groups.h" + +_CG_BEGIN_NAMESPACE + +namespace details { + + template + using _redux_is_add_supported = _CG_STL_NAMESPACE::integral_constant< + bool, + _CG_STL_NAMESPACE::is_integral::value && (sizeof(Ty) <= 4)>; + + template + using redux_is_add_supported = _redux_is_add_supported; + + // A specialization for 64 bit logical operations is possible + // but for now only accelerate 32 bit bitwise ops + template + using redux_is_logical_supported = redux_is_add_supported; + + // Base operator support case + template struct _redux_op_supported : public _CG_STL_NAMESPACE::false_type {}; + template struct _redux_op_supported, Ty> : public redux_is_add_supported {}; + template struct _redux_op_supported, Ty> : public redux_is_add_supported {}; + template struct _redux_op_supported, Ty> : public redux_is_add_supported {}; + template struct _redux_op_supported, Ty> : public redux_is_logical_supported {}; + template struct _redux_op_supported, Ty> : public redux_is_logical_supported {}; + template struct _redux_op_supported, Ty> : public redux_is_logical_supported {}; + + template class TyOp> + using redux_op_supported = _redux_op_supported< + typename details::remove_qual>, + Ty>; + + // Groups smaller than 16 actually have worse performance characteristics when used with redux + // tiles of size 16 and 32 perform the same or better and have better code generation profiles + template struct _redux_group_optimized : public _CG_STL_NAMESPACE::false_type {}; + + template + struct _redux_group_optimized> : public _CG_STL_NAMESPACE::integral_constant< + bool, + (Sz >= 16)> {}; + template + struct _redux_group_optimized> : public _CG_STL_NAMESPACE::integral_constant< + bool, + (Sz >= 16)> {}; + template <> + struct _redux_group_optimized : public _CG_STL_NAMESPACE::true_type {}; + + template + using redux_group_optimized = _redux_group_optimized>; + + template