{"text": "(*****************************************************************************\n * ESPL --- an embedded security protocol logic\n * http://people.inf.ethz.ch/meiersi/espl/\n *\n * Copyright (c) 2009-2011, Simon Meier, ETH Zurich, Switzerland\n *\n * Extension to compromising adversaries:\n *\n * Copyright (c) 2010-2011, Martin Schaub, ETH Zurich, Switzerland\n *\n * All rights reserved. See file LICENCE for more information.\n ******************************************************************************)\ntheory InferenceRules\nimports\n HOL_ext\n Hints\n ExplicitModel\nbegin\n\n\nsection{* Inference Rules *}\n\nsubsection{* Role Order *}\n\ndefinition roleMap :: \"threadpool \\ tid \\ role\"\nwhere \"roleMap pool \\ (\\(done,todo,skipped). Some (done @ todo)) \\\\<^sub>m pool\"\n\nlemma roleMap_empty [simp]: \"roleMap empty = empty\"\n by(simp add: roleMap_def)\n\nlemma dom_roleMap [simp]: \"dom (roleMap r) = dom r\"\n by(auto simp: dom_def roleMap_def map_comp_def \n split: option.splits)\n\nlemma roleMap_upd [simp]:\n \"roleMap (pool(i \\ (done,todo,skipped))) = \n (roleMap pool)(i \\ (done@todo))\"\n by(rule ext, simp add: roleMap_def map_comp_def)\n\nlemma roleMap_SomeD:\n \"roleMap r i = Some R \\ \n \\ todo done skipped. r i = Some (done, todo, skipped) \\ R = done@todo\"\n by(auto simp: roleMap_def map_comp_def split: option.splits)\n\nlemma roleMap_SomeI:\n \"\\ r i = Some (done, todo, skipped); R = done @ todo \\ \\\n roleMap r i = Some R\"\n by(auto simp: roleMap_def map_comp_def split: option.splits)\n\nlemma roleMap_SomeE:\n assumes role_exists: \"roleMap r i = Some R\"\n obtains \"done\" todo skipped\n where \"r i = Some (done, todo, skipped)\" and \"R = done @ todo\"\nusing role_exists\nby (auto simp: roleMap_def map_comp_def split: option.splits)\n\nlemma roleMap_le_roleMapI [intro!]:\n assumes roleMap_leD: \n \"\\ i done todo skipped. r i = Some (done, todo, skipped) \\ \n \\ done' todo' skipped'. r' i = Some (done', todo', skipped') \\ done@todo = done'@todo'\"\n shows \"roleMap r \\\\<^sub>m roleMap r'\"\nby(auto simp: roleMap_def map_comp_def split: option.splits\n intro!: map_leI dest!: roleMap_leD)\n\nlemma (in reachable_thread) roleMap: \n \"roleMap r i = Some (done@todo)\"\n by(fast intro!: thread_exists roleMap_SomeI)\n\nsubsection{* Prefix Close *}\n\n\ndefinition prefixClose :: \"store \\ explicit_trace \\ role \\ rolestep \\ tid \\ bool\"\nwhere\n\"prefixClose s t R step i = \n (\\ st st'. \n (nextRel (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) st st') \\\n ((recvStep st \\ (\\ m. Some m = inst s i (stepPat st) \\ predOrd t (Ln m) (St (i, st)))) \\\n (matchEqStep st \\ exec_match s i (matchVar st) (stepPat st)) \\\n (notMatchStep st \\ \\ exec_match s i (matchVar st) (stepPat st)) \\\n predOrd t (St (i, st)) (St (i, st')))\n )\"\n\ncontext reachable_state begin\n\nlemma note_filtered_done[iff]:\n \"Note l ty pt \\ set (filter (\\ x. \\ (noteStep x)) done)\"\nby auto\n\nlemma take_while_is_done:\n assumes facts:\n \"r i = Some(done, step # todo, skipped)\"\n \"roleMap r i = Some R\"\n shows isDone:\n \"(takeWhile (\\ x. x \\ step) R) = done\"\nusing facts\nproof -\n interpret reachable_thread P t r s i \"done\" \"step#todo\" skipped\n using facts by unfold_locales auto\n have \"step \\ set (step # todo)\" by auto\n hence \"step \\ set done\" using facts by (fastforce dest!: todo_notin_doneD)\n hence \"(takeWhile (\\ x. x \\ step) done) = done\" by auto\n hence \"(takeWhile (\\ x. x \\ step) (done @ (step # todo))) = done\" by auto\n moreover\n have \"R = (done @ (step # todo))\" using facts by (fastforce dest: roleMap_SomeD)\n ultimately show ?thesis by auto\nqed\n\nlemma note_filtered_role:\n \"Note l ty pt \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) \\ step = (Note l ty pt)\"\nby auto\n\nlemma note_filtered_revRole:\n\"Note l ty pt \\ set (step# rev (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R))) \\ step = (Note l ty pt)\"\nby auto\n\nlemma filtered_role_conv:\n assumes filtered:\n \"st \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step])\"\n shows \"(st \\ set R \\ st \\ (Note l ty pt)) \\ (st = step)\"\nproof -\n have \"st \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R)) \\ (st = step)\" using filtered by auto\n moreover {\n assume inFilter: \"st \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R)) \\ (st \\ step)\"\n hence \"st \\ set (takeWhile (\\ x. x \\ step) R) \\ (st \\ step)\" by auto\n hence \"st \\ set R \\ (st \\ step)\" by (auto dest: set_takeWhileD)\n hence \"st \\ set R\" by auto\n moreover\n have \"st \\ (Note l ty pt)\" using inFilter by (auto dest: note_filtered_role)\n ultimately have ?thesis by auto\n }\n ultimately show ?thesis by auto\nqed\n\nlemma filtered_done_conv:\n assumes isThread:\n \"r i = Some(done, step # todo, skipped)\"\n \"roleMap r i = Some R\"\n and filtered:\n \"st \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step])\"\n shows\n \"(st \\ set done \\ st \\ (Note l ty pt)) \\ (st = step)\"\nproof -\n have \"(st \\ set R \\ st \\ (Note l ty pt)) \\ (st = step)\" using filtered by (fastforce dest: filtered_role_conv)\n moreover\n have \"(takeWhile (\\ x. x \\ step) R) = done\" using isThread by (fastforce dest: take_while_is_done)\n ultimately show ?thesis using isThread and filtered by fastforce\nqed\n\nlemma filtered_in_done:\n assumes step: \"(i, step) \\ steps t\"\n and role_exists: \"roleMap r i = Some R \\ r i = Some(done, todo, skipped)\"\n and inFiltered: \"st \\ set (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step])\"\n shows \"st \\ set done\"\nproof -\n interpret this_thread:\n reachable_thread P t r s i \"done\" todo skipped\n using role_exists by unfold_locales auto\n have \"step \\ set done\"\n using step by (auto dest: this_thread.in_steps_in_done)\n moreover\n then obtain prefix suffix \n where done_split: \"done = prefix @ step # suffix \\ step \\ set prefix\"\n by (auto dest!: split_list_first)\n hence \"takeWhile (\\x. x \\ step) (prefix@step#suffix@todo) = prefix\"\n by (subst takeWhile_append2) auto\n hence \"takeWhile (\\x. x \\ step) R = prefix\"\n using role_exists done_split by (auto elim!: roleMap_SomeE) \n moreover {\n assume \"st \\ step \\ takeWhile (\\x. x \\ step) R = prefix\"\n hence \"st \\ set prefix\" using inFiltered \n by auto\n hence ?thesis using done_split by fastforce\n }\n moreover {\n assume \"st = step \\ step \\ set done\"\n hence ?thesis by auto\n }\n ultimately show ?thesis by auto\nqed\n\n\nlemma recv_roleOrd_imp_predOrd:\n assumes step: \"(i, step) \\ steps t\"\n and role_exists: \"roleMap r i = Some R\"\n and role_ord: \"listOrd R (Recv l pt) step\"\n shows \"St (i, (Recv l pt)) \\ St (i, step)\"\nproof -\n from role_exists\n obtain \"done\" todo skipped\n where \"R = done @ todo\"\n and \"r i = Some (done, todo, skipped)\"\n by (auto elim!: roleMap_SomeE)\n then interpret this_thread:\n reachable_thread P t r s i \"done\" todo skipped\n by unfold_locales auto\n show ?thesis using step role_ord `R = done @ todo`\n by (fast intro!: listOrd_imp_predOrd\n this_thread.listOrd_recv_role_imp_listOrd_trace)\nqed\n\n\nlemma send_roleOrd_imp_predOrd:\n assumes step: \"(i, step) \\ steps t\"\n and role_exists: \"roleMap r i = Some R\"\n and role_ord: \"listOrd R (Send l pt) step\"\n shows \"St (i, (Send l pt)) \\ St (i, step)\"\nproof -\n from role_exists\n obtain \"done\" todo skipped\n where \"R = done @ todo\"\n and \"r i = Some (done, todo, skipped)\"\n by (auto elim!: roleMap_SomeE)\n then interpret this_thread:\n reachable_thread P t r s i \"done\" todo skipped\n by unfold_locales auto\n show ?thesis using step role_ord `R = done @ todo`\n by (fast intro!: listOrd_imp_predOrd\n this_thread.listOrd_send_role_imp_listOrd_trace)\nqed\n\nlemmas roleOrd_imp_predOrd' =\n send_roleOrd_imp_predOrd[OF in_steps_predOrd1, rule_format]\n recv_roleOrd_imp_predOrd[OF in_steps_predOrd1, rule_format]\n\nlemmas roleOrd_imp_step =\n in_steps_predOrd1[OF send_roleOrd_imp_predOrd, rule_format]\n in_steps_predOrd1[OF recv_roleOrd_imp_predOrd, rule_format]\n\nlemmas roleOrd_imp_step' =\n roleOrd_imp_step[OF in_steps_predOrd1, rule_format]\n\nlemma prefixClose_rawI:\n assumes \"\\ st st'. \n \\ nextRel (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) st st';\n recvStep st\n \\ \\ \\ m. Some m = inst s i (stepPat st) \\ Ln m \\ St (i, st)\"\n and \"\\ st st'.\n \\ nextRel (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) st st';\n matchEqStep st\n \\ \\ exec_match s i (matchVar st) (stepPat st)\"\n and \"\\ st st'.\n \\ nextRel (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) st st';\n notMatchStep st\n \\ \\ \\ exec_match s i (matchVar st) (stepPat st)\"\n and \"\\ st st'. \n \\ nextRel (filter (\\ x. \\ (noteStep x)) (takeWhile (\\ x. x \\ step) R) @ [step]) st st'\n \\ \\ St (i, st) \\ St (i, st')\"\n shows \"prefixClose s t R step i\"\nusing assms by (auto simp: prefixClose_def)\n\nlemma prefixCloseI:\n assumes step: \"(i, step) \\ steps t\"\n and role_exists: \"roleMap r i = Some R\"\n shows \"prefixClose s t R step i\"\nproof -\n from role_exists\n obtain \"done\" todo skipped\n where R_split: \"R = done @ todo\"\n and thread_state: \"r i = Some (done, todo,skipped)\"\n by (auto elim!: roleMap_SomeE)\n moreover\n then interpret this_thread:\n reachable_thread P t r s i \"done\" todo skipped\n by unfold_locales auto\n \n from step have \"step \\ set done\"\n by (rule this_thread.in_steps_in_done)\n then obtain prefix suffix \n where done_split: \"done = prefix @ step # suffix \\ step \\ set prefix\"\n by (auto dest!: split_list_first)\n moreover\n hence \"takeWhile (\\x. x \\ step) (prefix@step#suffix@todo) = prefix\"\n by (subst takeWhile_append2) auto\n moreover\n { fix st st'\n assume nextRel: \"nextRel (step#rev (filter (\\ x. \\ (noteStep x)) prefix)) st' st\"\n\n hence in_nextRel: \"st' \\ set (step#rev (filter (\\ x. \\ (noteStep x)) prefix)) \\\n st \\ set (step#rev (filter (\\ x. \\ (noteStep x)) prefix))\"\n by(auto dest: in_set_nextRel1 in_set_nextRel2)\n hence \"st \\ set done\" and \"st' \\ set done\"\n using done_split step role_exists nextRel\n by (auto dest: in_set_nextRel1 in_set_nextRel2 filtered_in_done)\n hence \"st \\ set done \\ st \\ skipped\" and \"st' \\ set done \\ st' \\ skipped\"\n using step in_nextRel\n apply -\n apply(rule conjI, assumption)\n apply(case_tac \"st = step\")\n apply(fastforce dest: this_thread.in_steps_conv_done_skipped[THEN iffD1])\n apply(fastforce dest!: this_thread.note_in_skipped note_filtered_revRole)\n\n apply(rule conjI, assumption)\n apply(case_tac \"st' = step\")\n apply(fastforce dest: this_thread.in_steps_conv_done_skipped[THEN iffD1])\n by(fastforce dest!: this_thread.note_in_skipped note_filtered_revRole)\n hence steps: \"(i, st) \\ steps t\" \"(i, st') \\ steps t\"\n by(auto dest: this_thread.in_steps_conv_done_skipped[THEN iffD1])\n { assume \"recvStep st\"\n hence \"\\ m. Some m = inst s i (stepPat st) \\ Ln m \\ St (i, st)\"\n using steps by (auto dest!: recvStepD Ln_before_inp)\n }\n note input = this\n {\n assume \"matchEqStep st\"\n hence \"exec_match s i (matchVar st) (stepPat st)\"\n using steps by (auto dest!: matchEqStepD match_eq_rule)\n }\n note match_eq = this\n {\n assume \"notMatchStep st\"\n hence \"\\ exec_match s i (matchVar st) (stepPat st)\"\n using steps by (auto dest!: notMatchStepD not_match_rule)\n }\n note not_match = this\n\n have \"listOrd R st st'\" \n using nextRel and R_split and done_split\n by(fastforce dest: nextRel_imp_listOrd listOrd_rev[THEN iffD1] listOrd_filter)\n hence \"St (i, st) \\ St (i, st')\"\n using role_exists steps R_split\n apply -\n apply(drule this_thread.in_steps_conv_done_skipped[THEN iffD1])\n by(fastforce dest!: this_thread.roleOrd_notSkipped_imp_listOrd_trace dest:listOrd_imp_predOrd)+\n note input and match_eq and not_match and this\n }\n ultimately show ?thesis\n by (auto simp: prefixClose_def)\nqed\n\ntext{* Support for the \"prefix\\_close\" command. *}\n\nlemma ext_prefixClose: \n \"\\ (i, step) \\ steps t; roleMap r i = Some R \\ \\\n prefixClose s t R step i \\\n (recvStep step \\ (\\ m. Some m = inst s i (stepPat step) \\ Ln m \\ St (i, step))) \\\n (matchEqStep step \\ exec_match s i (matchVar step) (stepPat step)) \\\n (notMatchStep step \\ \\ exec_match s i (matchVar step) (stepPat step))\"\nby (cases step)\n (auto dest: prefixCloseI Ln_before_inp matchEqStepD match_eq_rule notMatchStepD not_match_rule)\n\ntext{* \n Used for prefix closing assumptions corresponding to a case of\n an annotation completeness induction proof.\n*}\nlemma thread_prefixClose:\n assumes thread_exists: \"r i = Some (step#done, todo, skipped)\"\n and not_skipped: \"step \\ skipped\"\n shows \n \"(\\ st st'. nextRel (step # (filter (\\ x. \\ (noteStep x)) done)) st st' \\\n ((recvStep st \\ \n (\\ m. Some m = inst s i (stepPat st) \\ predOrd t (Ln m) (St (i, st)))\n ) \\\n (matchEqStep st \\ exec_match s i (matchVar st) (stepPat st)) \\\n (notMatchStep st \\ \\ exec_match s i (matchVar st) (stepPat st)) \\\n predOrd t (St (i, st)) (St (i, st')))\n ) \\\n (recvStep (last (step#done)) \\\n (\\ m. Some m = inst s i (stepPat (last (step#done))) \\\n predOrd t (Ln m) (St (i, (last (step#done))))\n )\n ) \\\n (matchEqStep (last (step#done)) \\\n exec_match s i (matchVar (last (step#done))) (stepPat (last (step#done)))\n ) \\\n (notMatchStep (last (step#done)) \\\n \\ exec_match s i (matchVar (last (step#done))) (stepPat (last (step#done)))\n )\"\n (is \"?prefix \\ ?inp_last \\ ?match_eq_last \\ ?not_match_last\")\nproof -\n interpret this_thread: reachable_thread P t r s i \"step#done\" todo skipped\n using thread_exists by unfold_locales auto\n {\n assume recv: \"recvStep (last (step#done))\"\n hence last_step: \"(i, last (step#done)) \\ steps t\"\n proof -\n obtain l pt\n where recv_eq: \"(Recv l pt) = (last (step # done))\"\n using recv by (fastforce dest!: recvStepD)\n hence \"Recv l pt \\ set (step # done)\" by auto\n thus ?thesis\n using thread_exists recv_eq\n by(fastforce dest!: this_thread.in_steps_recv[THEN iffD1])\n qed\n hence \"?inp_last\" by (fastforce dest: recvStepD Ln_before_inp)\n }\n moreover\n {\n assume match: \"matchEqStep (last (step#done))\"\n hence last_step: \"(i, last (step#done)) \\ steps t\"\n proof -\n obtain l v pt\n where match_eq: \"(Match l True v pt) = (last (step # done))\"\n using match by (fastforce dest!: matchEqStepD)\n hence \"Match l True v pt \\ set (step # done)\" by auto\n thus ?thesis\n using thread_exists match_eq\n by(fastforce dest!: this_thread.in_steps_recv[THEN iffD1])\n qed\n hence \"?match_eq_last\" by (fastforce dest: matchEqStepD match_eq_rule)\n }\n moreover\n {\n assume match: \"notMatchStep (last (step#done))\"\n hence last_step: \"(i, last (step#done)) \\ steps t\"\n proof -\n obtain l v pt\n where match_eq: \"(Match l False v pt) = (last (step # done))\"\n using match by (fastforce dest!: notMatchStepD)\n hence \"Match l False v pt \\ set (step # done)\" by auto\n thus ?thesis\n using thread_exists match_eq\n by(fastforce dest!: this_thread.in_steps_recv[THEN iffD1])\n qed\n hence \"?not_match_last\" by (fastforce dest: notMatchStepD not_match_rule)\n }\n moreover\n { \n fix st st'\n assume \"nextRel (step # (filter (\\ x. \\ (noteStep x)) done)) st st'\"\n hence listOrd: \"listOrd (step # [x\\done . \\ noteStep x]) st st'\"\n by (auto dest: nextRel_imp_listOrd)\n hence skipped: \"st \\ skipped \\ st' \\ skipped\"\n proof(cases \"st = step \\ st' \\ set done \\ \\ noteStep st'\")\n case True\n thus \"?thesis\" using listOrd not_skipped by (fastforce dest: this_thread.note_in_skipped)\n next\n case False\n note falseAsms = this\n thus ?thesis using falseAsms listOrd \n by (cases \"listOrd [x\\done . \\ noteStep x] st st'\") \n (auto simp add: dest: this_thread.note_in_skipped in_set_listOrd1 in_set_listOrd2 )\n qed\n hence \"st \\ skipped\" \"st' \\ skipped\" by auto\n\n hence step_ord: \"predOrd t (St (i, st)) (St (i, st'))\"\n proof(cases \"st = step \\ st' \\ set [x\\done . \\ noteStep x]\")\n case True\n hence \"st' \\ set done\" by auto\n thus ?thesis using listOrd skipped True\n apply -\n apply(drule conjunct1,\n drule_tac ?P = \"st = step\" and ?Q = \"st' \\ set done\" in conjI,\n assumption)\n apply(drule_tac ?Q = \"listOrd done st st'\" and ?P = \"st = step \\ st' \\ set done\" in disjI1)\n apply(drule listOrd.simps(2)[THEN iffD2])\n by(fastforce dest: listOrd_imp_predOrd this_thread.listOrd_done_imp_listOrd_trace)\n next\n case False\n note assms = this\n thus ?thesis\n proof(cases \"listOrd [x\\done . \\ noteStep x] st st'\")\n case False\n thus ?thesis using assms listOrd by auto\n next\n case True \n thus ?thesis using assms listOrd skipped\n apply -\n apply(drule listOrd_filter)\n apply(drule_tac ?Q = \"listOrd done st st'\" and ?P = \"st = step \\ st' \\ set done\" in disjI2)\n apply(drule listOrd.simps(2)[THEN iffD2])\n by (fastforce dest: listOrd_imp_predOrd this_thread.listOrd_done_imp_listOrd_trace)\n qed\n qed\n hence recv: \"recvStep st \\ \n \\ m. Some m = inst s i (stepPat st) \\ predOrd t (Ln m) (St (i, st))\"\n using this_thread.roleMap\n by (cases st) (auto dest: Ln_before_inp in_steps_predOrd1)\n from step_ord have matchEq:\n \"matchEqStep st \\ exec_match s i (matchVar st) (stepPat st)\"\n by (cases st) (auto dest: in_steps_predOrd1 matchEqStepD match_eq_rule)\n from step_ord have notMatch:\n \"notMatchStep st \\ \\ exec_match s i (matchVar st) (stepPat st)\"\n by (cases st) (auto dest: in_steps_predOrd1 notMatchStepD not_match_rule)\n note step_ord recv matchEq notMatch\n }\n ultimately\n show ?thesis by blast\nqed\n\nend\n\n(*\n TODO: Find the right place for this lemma. It is used only in\n the \"prefix\\_close\" command.\n*)\nlemma steps_in_steps: \"(i,step) \\ steps t \\ (i,step) \\ steps t\"\n by auto\n\n\nsubsection{* Additional Lemmas on Learning Messages *}\n\n\ncontext reachable_state\nbegin\n\n(* TODO: Move *)\nlemma nothing_before_IK0: \"m \\ IK0 \\ \\ y \\ Ln m\"\nproof(induct arbitrary: y rule: reachable_induct)\n case (send t r s i \"done\" l pt todo m y)\n then interpret this_state: reachable_state P t r s by unfold_locales\n show ?case using send\n by(fastforce dest: this_state.knows_IK0)\nnext\n case (decr t r s m k y)\n then interpret this_state: reachable_state P t r s by unfold_locales\n show ?case using decr\n by(fastforce dest: this_state.knows_IK0)\nnext \n case (lkr t r s a)\n then interpret this_state: reachable_state P t r s by unfold_locales\n show ?case using lkr\n by(fastforce dest: this_state.knows_IK0)\nnext \n case (compr t r s \"done\" l ty pt todo skipped m y)\n then interpret this_state: reachable_state P t r s by unfold_locales\n show ?case using compr\n by(fastforce dest: this_state.knows_IK0)\nqed auto\n\nlemmas nothing_before_IK0_iffs [iff] = in_IK0_simps[THEN nothing_before_IK0]\n\nend (* rechable_state *)\n\nsubsubsection{* Resoning about Variable Contents *}\n\ncontext reachable_state\nbegin\n\nlemma inst_AVar_ineqs [iff]:\n \"s (AVar v, i) \\ Tup x y\"\n \"s (AVar v, i) \\ Enc m k\"\n \"s (AVar v, i) \\ Hash m\"\n \"s (AVar v, i) \\ PK a\"\n \"s (AVar v, i) \\ SK a\"\n \"s (AVar v, i) \\ K a b\"\n \"s (AVar v, i) \\ KShr A\"\n \"s (AVar v, i) \\ Lit (ENonce n i')\"\n \"s (AVar v, i) \\ Lit (EConst c)\"\n \"s (AVar v, i) \\ Lit (EveNonce n)\"\n by (insert inst_AVar_cases[of v i]) \n (auto simp: Agent_def)\n\ndeclare inst_AVar_cases[iff]\ndeclare inst_AVar_ineqs[symmetric, iff]\n\nend\n\nsubsubsection{* Reducing injective to non-injective agreement proofs *}\n\nlemma iagree_to_niagree:\n assumes niagree: \"\\ i. prem i \\ (\\ j. conc i j)\"\n and conc_inj: \"\\ i1 i2 j. \\ conc i1 j \\ conc i2 j \\ \\ i1 = i2\"\n shows \"let prems = prem; \n concs = conc\n in \\f. inj_on f (Collect prems) \\ (\\i. prems i \\ concs i (f i))\"\nproof -\n let ?f = \"\\ i. SOME j. conc i j\"\n have \"inj_on ?f (Collect prem)\"\n apply(auto simp: inj_on_def dest!: niagree)\n apply(rule_tac j=\"(SOME j. conc x j)\" in conc_inj[OF conjI])\n apply(rule someI, simp+)+\n done\n moreover have \"\\ i. prem i \\ conc i (?f i)\"\n by(auto simp: inj_on_def dest!: niagree intro: someI)\n ultimately show ?thesis\n by auto\nqed\n\nend\n", "meta": {"author": "meiersi", "repo": "scyther-proof", "sha": "84e42366a46f66f1b090651be3bfaa3497696280", "save_path": "github-repos/isabelle/meiersi-scyther-proof", "path": "github-repos/isabelle/meiersi-scyther-proof/scyther-proof-84e42366a46f66f1b090651be3bfaa3497696280/data/isabelle/src/ESPLogic/InferenceRules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.29746994883293104, "lm_q1q2_score": 0.1498969427638838}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\n Retype refinement\n*)\n\ntheory Retype_R\nimports VSpace_R\nbegin\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n APIType_map2 :: \"kernel_object + RISCV64_H.object_type \\ Structures_A.apiobject_type\"\nwhere\n \"APIType_map2 ty \\ case ty of\n Inr (APIObjectType ArchTypes_H.Untyped) \\ Structures_A.Untyped\n | Inr (APIObjectType ArchTypes_H.TCBObject) \\ Structures_A.TCBObject\n | Inr (APIObjectType ArchTypes_H.EndpointObject) \\ Structures_A.EndpointObject\n | Inr (APIObjectType ArchTypes_H.NotificationObject) \\ Structures_A.NotificationObject\n | Inr (APIObjectType ArchTypes_H.CapTableObject) \\ Structures_A.CapTableObject\n | Inr LargePageObject \\ ArchObject LargePageObj\n | Inr HugePageObject \\ ArchObject HugePageObj\n | Inr PageTableObject \\ ArchObject PageTableObj\n | Inl (KOArch (KOASIDPool _)) \\ ArchObject ASIDPoolObj\n | _ \\ ArchObject SmallPageObj\"\n\nlemma placeNewObject_def2:\n \"placeNewObject ptr val gb = createObjects' ptr 1 (injectKO val) gb\"\n apply (clarsimp simp:placeNewObject_def placeNewObject'_def\n createObjects'_def shiftL_nat)\n done\n\nlemma createObjects_ret:\n \"\\n < 2^word_bits;n\\ 0\\ \\\n \\\\\\ createObjects y n ko gbits\n \\\\r s. r = map (\\p. ptr_add y (p * 2 ^ objBitsKO ko * 2 ^ gbits))\n [0..< n]\\\"\n unfolding createObjects_def createObjects'_def\n apply (simp add: split_def)\n apply (wp|simp cong: if_cong)+\n apply (clarsimp simp: ptr_add_def upto_enum_def o_def\n unat_sub word_le_nat_alt\n power_sub[symmetric]\n objBits_def[symmetric]\n simp del: upt_Suc)\n apply (clarsimp simp: unat_of_nat_minus_1 word_bits_def\n shiftl_t2n power_add)\n done\n\nlemma objBitsKO_bounded2[simp]:\n \"objBitsKO ko < word_bits\"\n by (simp add: objBits_simps' word_bits_def bit_simps\n split: Structures_H.kernel_object.split arch_kernel_object.split)\n\ndefinition\n APIType_capBits :: \"RISCV64_H.object_type \\ nat \\ nat\"\nwhere\n \"APIType_capBits ty us \\ case ty of\n APIObjectType ArchTypes_H.Untyped \\ us\n | APIObjectType ArchTypes_H.TCBObject \\ objBits (makeObject :: tcb)\n | APIObjectType ArchTypes_H.EndpointObject \\ objBits (makeObject :: endpoint)\n | APIObjectType ArchTypes_H.NotificationObject \\ objBits (makeObject :: Structures_H.notification)\n | APIObjectType ArchTypes_H.CapTableObject \\ objBits (makeObject :: cte) + us\n | SmallPageObject \\ pageBitsForSize RISCVSmallPage\n | LargePageObject \\ pageBitsForSize RISCVLargePage\n | HugePageObject \\ pageBitsForSize RISCVHugePage\n | PageTableObject \\ 12\"\n\ndefinition\n makeObjectKO :: \"bool \\ (kernel_object + RISCV64_H.object_type) \\ kernel_object\"\nwhere\n \"makeObjectKO dev ty \\ case ty of\n Inl KOUserData \\ Some KOUserData\n | Inl (KOArch (KOASIDPool _)) \\ Some (KOArch (KOASIDPool makeObject))\n | Inr (APIObjectType ArchTypes_H.TCBObject) \\ Some (KOTCB makeObject)\n | Inr (APIObjectType ArchTypes_H.EndpointObject) \\ Some (KOEndpoint makeObject)\n | Inr (APIObjectType ArchTypes_H.NotificationObject) \\ Some (KONotification makeObject)\n | Inr (APIObjectType ArchTypes_H.CapTableObject) \\ Some (KOCTE makeObject)\n | Inr PageTableObject \\ Some (KOArch (KOPTE makeObject))\n | Inr SmallPageObject \\ Some (if dev then KOUserDataDevice else KOUserData)\n | Inr LargePageObject \\ Some(if dev then KOUserDataDevice else KOUserData)\n | Inr HugePageObject \\ Some (if dev then KOUserDataDevice else KOUserData)\n | _ \\ None\"\n\ntext \\makeObject etc. lemmas\\\n\nlemma NullCap_valid' [iff]: \"s \\' capability.NullCap\"\n unfolding valid_cap'_def by simp\n\nlemma valid_obj_makeObject_cte [simp]:\n \"valid_obj' (KOCTE makeObject) s\"\n unfolding valid_obj'_def valid_cte'_def\n by (clarsimp simp: makeObject_cte)\n\nlemma valid_obj_makeObject_tcb [simp]:\n \"valid_obj' (KOTCB makeObject) s\"\n unfolding valid_obj'_def valid_tcb'_def valid_tcb_state'_def\n by (clarsimp simp: makeObject_tcb makeObject_cte tcb_cte_cases_def minBound_word cteSizeBits_def)\n\nlemma valid_obj_makeObject_endpoint [simp]:\n \"valid_obj' (KOEndpoint makeObject) s\"\n unfolding valid_obj'_def valid_ep'_def\n by (clarsimp simp: makeObject_endpoint)\n\nlemma valid_obj_makeObject_notification [simp]:\n \"valid_obj' (KONotification makeObject) s\"\n unfolding valid_obj'_def valid_ntfn'_def\n by (clarsimp simp: makeObject_notification)\n\nlemma valid_obj_makeObject_user_data [simp]:\n \"valid_obj' (KOUserData) s\"\n unfolding valid_obj'_def by simp\n\nlemma valid_obj_makeObject_user_data_device [simp]:\n \"valid_obj' (KOUserDataDevice) s\"\n unfolding valid_obj'_def by simp\n\nlemma valid_obj_makeObject_pte[simp]:\n \"valid_obj' (KOArch (KOPTE makeObject)) s\"\n unfolding valid_obj'_def by (simp add: makeObject_pte)\n\nlemma valid_obj_makeObject_asid_pool[simp]:\n \"valid_obj' (KOArch (KOASIDPool makeObject)) s\"\n unfolding valid_obj'_def\n by (simp add: makeObject_asidpool Let_def ran_def dom_def)\n\nlemmas valid_obj_makeObject_rules =\n valid_obj_makeObject_user_data valid_obj_makeObject_tcb\n valid_obj_makeObject_endpoint valid_obj_makeObject_notification\n valid_obj_makeObject_cte valid_obj_makeObject_pte\n valid_obj_makeObject_asid_pool valid_obj_makeObject_user_data_device\n\ntext \\On the abstract side\\\n\ntext \\Lemmas for createNewObjects etc.\\\n\nlemma pspace_dom_upd:\n assumes orth: \"set as \\ dom ps = {}\"\n shows \"pspace_dom (foldr (\\p ps. ps(p \\ ko)) as ps) =\n pspace_dom ps \\ (\\x \\ set as. fst ` obj_relation_cuts ko x)\"\n using orth\n apply (subst foldr_upd_app_if)\n apply (rule set_eqI, simp add: pspace_dom_def)\n apply (rule iffI)\n apply (clarsimp split: if_split_asm)\n apply (rule rev_bexI, erule domI)\n apply (fastforce simp: image_def)\n apply (erule disjE)\n apply clarsimp\n apply (rule rev_bexI)\n apply (clarsimp simp: domIff)\n apply (erule exI)\n apply clarsimp\n apply (intro conjI impI)\n apply (drule equals0D, erule notE, erule IntI, erule domI)\n apply (fastforce simp: image_def)\n apply clarsimp\n apply (rule rev_bexI)\n apply (clarsimp simp: domIff)\n apply (erule(1) notE)\n apply clarsimp\n apply (fastforce simp: image_def)\n done\n\ndefinition\n \"new_cap_addrs \\ \\n ptr ko. map (\\p. ptr + ((of_nat p :: machine_word) << (objBitsKO ko)))\n [0 ..< n]\"\n\ndefinition\n null_filter' :: \"('a \\ cte) \\ ('a \\ cte)\"\nwhere\n \"null_filter' f \\ \\x. if f x = Some (CTE NullCap nullMDBNode) then None else f x\"\n\nlemma across_null_filter_eq':\n assumes eq: \"null_filter' xs = null_filter' ys\"\n shows \"\\ xs x = Some v; ys x = Some v \\ R;\n \\ v = CTE NullCap nullMDBNode; ys x = None \\ \\ R \\\n \\ R\"\n apply (cases \"null_filter' xs x\")\n apply (subgoal_tac \"null_filter' ys x = None\")\n apply (simp add: null_filter'_def split: if_split_asm)\n apply (simp add: eq)\n apply (subgoal_tac \"null_filter' ys x = Some a\")\n apply (simp add: null_filter'_def split: if_split_asm)\n apply (simp add: eq)\n done\n\nlemma null_filter_parent_of'':\n \"\\ null_filter' xs = null_filter' ys; xs \\ x \\ c; c \\ 0 \\\n \\ ys \\ x \\ c\"\n apply (clarsimp simp add: mdb_next_unfold)\n apply (drule arg_cong[where f=\"\\xs. xs x\"])\n apply (simp add: null_filter'_def nullPointer_def split: if_split_asm)\n done\n\nlemma null_filter_parentOf:\n \"\\ null_filter' xs = null_filter' ys; xs \\ x parentOf y \\\n \\ ys \\ x parentOf y\"\n apply (clarsimp simp add: parentOf_def)\n apply (rule across_null_filter_eq'[where x=x], assumption+)\n apply (erule(1) across_null_filter_eq')\n apply clarsimp\n apply simp\n apply simp\n done\n\nlemma null_filter_descendant:\n \"\\ null_filter' xs = null_filter' ys; xs \\ x \\ y \\\n \\ ys \\ x \\ y\"\n apply (erule subtree.induct)\n apply (rule subtree.direct_parent)\n apply (erule(2) null_filter_parent_of'')\n apply assumption\n apply (erule(1) null_filter_parentOf)\n apply (erule subtree.trans_parent)\n apply (erule(2) null_filter_parent_of'')\n apply assumption\n apply (erule(1) null_filter_parentOf)\n done\n\nlemma null_filter_descendants_of':\n \"null_filter' xs = null_filter' ys\n \\ descendants_of' x xs = descendants_of' x ys\"\n apply (simp add: descendants_of'_def)\n apply (rule set_eqI, rule iffI)\n apply simp\n apply (erule(1) null_filter_descendant)\n apply simp\n apply (erule(1) null_filter_descendant[OF sym])\n done\n\nlemma descendants_of_cte_at':\n \"\\ p \\ descendants_of x (cdt s); valid_mdb s \\\n \\ cte_wp_at (\\c. c \\ cap.NullCap) p s\"\n apply (simp add: descendants_of_def)\n apply (drule tranclD2)\n apply (clarsimp simp: cdt_parent_defs valid_mdb_def mdb_cte_at_def\n simp del: split_paired_All)\n apply (fastforce elim: cte_wp_at_weakenE)\n done\n\n\nlemma descendants_of_cte_at2':\n \"\\ p \\ descendants_of x (cdt s); valid_mdb s \\\n \\ cte_wp_at (\\c. c \\ cap.NullCap) x s\"\n apply (simp add: descendants_of_def)\n apply (drule tranclD)\n apply (clarsimp simp: cdt_parent_defs valid_mdb_def mdb_cte_at_def\n simp del: split_paired_All)\n apply (fastforce elim: cte_wp_at_weakenE)\n done\n\nlemma cte_at_next_slot'':\n notes split_paired_All[simp del] split_paired_Ex[simp del]\n shows \"\\valid_list s; valid_mdb s; finite_depth (cdt s)\\\n \\ next_slot p (cdt_list s) (cdt s) = Some n \\ cte_wp_at (\\c. c \\ cap.NullCap) p s\"\n apply(simp add: next_slot_def)\n apply(simp split: if_split_asm)\n apply(drule next_childD, simp)\n apply(rule_tac p=n in descendants_of_cte_at2')\n apply(simp add: child_descendant)\n apply(simp)\n apply(subgoal_tac \"next_not_child_dom (p, cdt_list s, cdt s)\")\n prefer 2\n apply(simp add: next_not_child_termination valid_mdb_def valid_list_def)\n apply(simp split: if_split_asm)\n apply(case_tac \"cdt s p\")\n apply(simp)\n apply(rule descendants_of_cte_at')\n apply(simp add: descendants_of_def cdt_parent_defs)\n apply(rule r_into_trancl, simp)\n apply(simp)\n apply(drule next_sibD)\n apply(elim exE conjE)\n apply(drule after_in_list_in_list)\n apply(rule descendants_of_cte_at')\n apply(simp add: descendants_of_def cdt_parent_defs)\n apply(rule r_into_trancl, simp)\n apply(simp)\n done\n\n\nlemma state_relation_null_filterE:\n \"\\ (s, s') \\ state_relation; t = kheap_update f (ekheap_update ef s);\n \\f' g' h'.\n t' = s'\\ksPSpace := f' (ksPSpace s'), gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\;\n null_filter (caps_of_state t) = null_filter (caps_of_state s);\n null_filter' (ctes_of t') = null_filter' (ctes_of s');\n pspace_relation (kheap t) (ksPSpace t');\n ekheap_relation (ekheap t) (ksPSpace t');\n ghost_relation (kheap t) (gsUserPages t') (gsCNodes t'); valid_list s;\n pspace_aligned' s'; pspace_distinct' s'; valid_objs s; valid_mdb s;\n pspace_aligned' t'; pspace_distinct' t';\n mdb_cte_at (swp (cte_wp_at ((\\) cap.NullCap)) s) (cdt s) \\\n \\ (t, t') \\ state_relation\"\n apply (clarsimp simp: state_relation_def)\n apply (intro conjI)\n apply (simp add: cdt_relation_def cte_wp_at_caps_of_state)\n apply (elim allEI)\n apply clarsimp\n apply (erule(1) across_null_filter_eq)\n apply simp\n apply (rule null_filter_descendants_of', simp)\n apply simp\n apply (case_tac \"cdt s (a, b)\")\n apply (subst mdb_cte_at_no_descendants, assumption)\n apply (simp add: cte_wp_at_caps_of_state swp_def)\n apply (cut_tac s=\"kheap_update f (ekheap_update ef s)\" and\n s'=\"s'\\ksPSpace := f' (ksPSpace s'),\n gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\\"\n in pspace_relation_ctes_ofI, simp_all)[1]\n apply (simp add: trans_state_update[symmetric] del: trans_state_update)\n apply (erule caps_of_state_cteD)\n apply (clarsimp simp: descendants_of'_def)\n apply (case_tac cte)\n apply (erule Null_not_subtree[rotated])\n apply simp\n apply (drule(1) mdb_cte_atD)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply(simp add: cdt_list_relation_def cte_wp_at_caps_of_state)\n apply(elim allEI)\n apply(clarsimp)\n apply(case_tac \"next_slot (a, b) (cdt_list (s)) (cdt s)\")\n apply(simp)\n apply(subgoal_tac \"cte_wp_at (\\c. c \\ cap.NullCap) (a, b) s\")\n apply(drule_tac f=\"\\cs. cs (a, b)\" in arg_cong)\n apply(clarsimp simp: cte_wp_at_caps_of_state)\n apply(clarsimp simp: null_filter_def split: if_split_asm)\n apply(drule_tac f=\"\\ctes. ctes (cte_map (a, b))\" in arg_cong)\n apply(simp add: null_filter'_def cte_wp_at_ctes_of split: if_split_asm)\n apply(frule pspace_relation_cte_wp_at)\n apply(simp add: cte_wp_at_caps_of_state)\n apply(simp)\n apply(simp)\n apply(simp add: cte_wp_at_ctes_of)\n apply (simp add: mdb_cte_at_def)\n apply(frule finite_depth)\n apply(frule(3) cte_at_next_slot'')\n apply simp\n apply (simp add: revokable_relation_def)\n apply (elim allEI, rule impI, drule(1) mp, elim allEI)\n apply (clarsimp elim!: null_filterE)\n apply (drule(3) pspace_relation_cte_wp_at [OF _ caps_of_state_cteD])\n apply (drule_tac f=\"\\ctes. ctes (cte_map (a, b))\" in arg_cong)\n apply (clarsimp simp: null_filter'_def cte_wp_at_ctes_of\n split: if_split_asm)\n done\n\nlemma lookupAround2_pspace_no:\n \"is_aligned ptr sz \\\n (case fst (lookupAround2 (ptr + 2 ^ sz - 1) ps) of None \\ return ()\n | Some (x, y) \\ haskell_assert (x < fromPPtr ptr) [])\n = assert ({ptr..ptr + 2 ^ sz - 1} \\ dom ps = {})\"\n apply (simp add: assert_def split: option.split)\n apply safe\n apply (clarsimp simp: lookupAround2_None1)\n apply (clarsimp simp: lookupAround2_char1)\n apply (clarsimp simp: lookupAround2_char1)\n apply (drule_tac a=a in equals0D)\n apply (simp add: linorder_not_less)\n apply fastforce\n done\n\nlemma pspace_no_overlap_disjoint':\n \"\\pspace_aligned' s;pspace_no_overlap' x n s\\\n \\ {x .. (x && ~~ mask n) + 2 ^ n - 1} \\ dom (ksPSpace s) = {}\"\n unfolding pspace_no_overlap'_def\n apply (rule disjointI)\n apply (rule ccontr)\n apply (clarsimp simp: mask_def add_diff_eq)\n apply (elim allE impE notE)\n apply (simp add:field_simps)+\n apply (erule(2) order_trans[OF _ is_aligned_no_overflow,OF _ pspace_alignedD'])\n apply (erule(1) is_aligned_no_overflow[OF pspace_alignedD'])\n apply (erule order_trans)\n apply (simp add:p_assoc_help)\ndone\n\nlemma foldr_update_ko_wp_at':\n assumes pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n shows\n \"ko_wp_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if p \\ set addrs then P obj\n else ko_wp_at' P p s)\"\n (is \"ko_wp_at' P p ?s' = ?Q\")\n apply (clarsimp simp: ko_wp_at'_def al)\n apply (intro conjI impI)\n apply safe[1]\n apply (rule pspace_distinctD' [OF _ pv'(2)])\n apply simp\n apply safe[1]\n apply (simp add: ps_clear_def dom_if_Some)\n apply blast\n apply simp\n apply (rule pspace_distinctD' [OF _ pv'(2)])\n apply simp\n done\n\nlemma foldr_update_obj_at':\n assumes pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n shows\n \"obj_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if p \\ set addrs then (\\obj'. projectKO_opt obj = Some obj' \\ P obj')\n else obj_at' P p s)\"\n apply (simp only: obj_at'_real_def)\n apply (rule foldr_update_ko_wp_at' [OF pv pv' al])\n done\n\nlemma makeObjectKO_eq:\n assumes x: \"makeObjectKO dev tp = Some v\"\n shows\n \"(v = KOCTE cte) =\n (tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ cte = makeObject)\"\n \"(v = KOTCB tcb) =\n (tp = Inr (APIObjectType ArchTypes_H.TCBObject) \\ tcb = makeObject)\"\n using x\n by (simp add: makeObjectKO_def eq_commute\n split: apiobject_type.split_asm sum.split_asm kernel_object.split_asm\n RISCV64_H.object_type.split_asm arch_kernel_object.split_asm)+\n\nlemma pspace_no_overlap_base':\n \"\\pspace_aligned' s;pspace_no_overlap' x n s; is_aligned x n \\ \\ ksPSpace s x = None\"\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (drule equals0D[where a=x])\n apply (rule ccontr, clarsimp)\n apply (erule is_aligned_get_word_bits)\n apply (erule impE)\n apply (frule mask_out_add_aligned[where q = 0,simplified,symmetric])\n apply (fastforce simp add: is_aligned_no_overflow)\n apply clarsimp+\n done\n\nlemma the_ctes_makeObject:\n \"fst (the (tcb_cte_cases n)) makeObject\n = (if tcb_cte_cases n = None\n then fst (the None :: (Structures_H.tcb \\ cte) \\ ((cte \\ cte) \\ Structures_H.tcb \\ Structures_H.tcb))\n (makeObject :: tcb)\n else makeObject)\"\n apply (simp add: makeObject_tcb)\n apply (clarsimp simp: tcb_cte_cases_def)\n done\n\nlemma cte_wp_at_obj_cases_mask:\n \"cte_wp_at' P p s =\n (obj_at' P p s \\\n (p && mask tcbBlockSizeBits \\ dom tcb_cte_cases\n \\ obj_at' (P \\ fst (the (tcb_cte_cases (p && mask tcbBlockSizeBits))))\n (p && ~~ mask tcbBlockSizeBits) s))\"\n apply (simp add: cte_wp_at_obj_cases')\n apply (rule arg_cong [where f=\"\\x. F \\ x\" for F])\n apply (rule iffI)\n apply (clarsimp simp: obj_at'_def objBits_simps)\n apply (frule(1) tcb_cte_cases_aligned_helpers)\n apply fastforce\n apply (clarsimp simp: obj_at'_def objBits_simps)\n apply (rule bexI[where x=\"p && mask tcbBlockSizeBits\"])\n apply (clarsimp simp: subtract_mask)\n apply fastforce\n done\n\nlemma ps_clearD:\n \"\\ ps_clear x n s; ksPSpace s y = Some v; x < y; y \\ x + 2 ^ n - 1 \\ \\ False\"\n apply (clarsimp simp: ps_clear_def)\n apply (drule_tac a=y in equals0D)\n apply (simp add: dom_def mask_def add_diff_eq)\n apply fastforce\n done\n\nlemma cte_wp_at_retype':\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"cte_wp_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ p \\ set addrs\n \\ tp = Inr (APIObjectType ArchTypes_H.TCBObject)\n \\ (p && ~~ mask tcbBlockSizeBits \\ set addrs) \\ (p && mask tcbBlockSizeBits \\ dom tcb_cte_cases)\n then P (CTE NullCap nullMDBNode)\n else cte_wp_at' P p s)\"\n (is \"cte_wp_at' P p ?s' = ?Q\")\n apply (subgoal_tac \"\\p \\ set addrs. \\(P :: cte \\ bool). \\ obj_at' P p s\")\n apply (subgoal_tac \"\\p \\ set addrs. \\(P :: tcb \\ bool). \\ obj_at' P p s\")\n apply (subgoal_tac \"(\\P :: cte \\ bool. obj_at' P p ?s')\n \\ (\\ (\\P :: tcb \\ bool. obj_at' P (p && ~~ mask tcbBlockSizeBits) ?s'))\")\n apply (simp only: cte_wp_at_obj_cases_mask foldr_update_obj_at'[OF pv pv' al])\n apply (simp add: the_ctes_makeObject makeObjectKO_eq [OF ko] makeObject_cte dom_def\n split del: if_split\n cong: if_cong)\n apply (insert al ko)\n apply (simp, safe, simp_all)\n apply fastforce\n apply fastforce\n apply (clarsimp elim!: obj_atE' simp: objBits_simps)\n apply (drule ps_clearD[where y=p and n=tcbBlockSizeBits])\n apply simp\n apply (rule order_trans_rules(17))\n apply (clarsimp cong: if_cong)\n apply (rule word_and_le2)\n apply (simp add: word_neg_and_le[simplified field_simps])\n apply simp\n apply (clarsimp elim!: obj_atE' simp: pn)\n apply (clarsimp elim!: obj_atE' simp: pn)\n done\n\nlemma ctes_of_retype:\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"map_to_ctes (\\ xa. if xa \\ set addrs then Some obj else ksPSpace s xa)\n = (\\x. if tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ x \\ set addrs\n \\ tp = Inr (APIObjectType ArchTypes_H.TCBObject)\n \\ (x && ~~ mask tcbBlockSizeBits \\ set addrs) \\ (x && mask tcbBlockSizeBits \\ dom tcb_cte_cases)\n then Some (CTE NullCap nullMDBNode)\n else map_to_ctes (ksPSpace s) x)\"\n (is \"map_to_ctes ?ps' = ?map'\")\n using cte_wp_at_retype' [where P=\"(=) cte\" for cte, OF ko pv pv' al pn]\n arg_cong [where f=Not, OF cte_wp_at_retype' [OF ko pv pv' al pn, where P=\"\\\"]]\n apply (simp(no_asm_use) add: cte_wp_at_ctes_of cong: if_cong)\n apply (rule ext)\n apply (case_tac \"map_to_ctes ?ps' x\")\n apply (simp(no_asm_simp))\n apply (simp split: if_split_asm)\n apply simp\n done\n\nlemma None_ctes_of_cte_at:\n \"(None = ctes_of s x) = (\\ cte_at' x s)\"\n by (fastforce simp add: cte_wp_at_ctes_of)\n\nlemma null_filter_ctes_retype:\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"null_filter' (map_to_ctes (foldr (\\addr. data_map_insert addr obj) addrs (ksPSpace s)))\n = null_filter' (map_to_ctes (ksPSpace s))\"\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (subst ctes_of_retype[OF ko pv pv' al pn])\n apply (rule ext)\n apply (clarsimp simp: null_filter'_def None_ctes_of_cte_at)\n apply (intro conjI impI notI)\n apply (elim cte_wp_atE' disjE conjE)\n apply (simp_all add: pn)\n apply (cut_tac x=\"ptr'\" and v=\"if ptr' \\ set addrs then obj else KOTCB tcb\"\n in pspace_distinctD'[OF _ pv'(2)])[1]\n apply simp\n apply (insert ko[symmetric],\n simp add: makeObjectKO_def objBits_simps pn\n split: if_split_asm)[1]\n apply (drule(2) tcb_ctes_clear[where s=\"ksPSpace_update f s\" for f s])\n apply simp\n apply fastforce\n apply (cut_tac x=\"x && ~~ mask tcbBlockSizeBits\" in pspace_distinctD'[OF _ pv'(2)])[1]\n apply simp\n apply (elim cte_wp_atE' disjE conjE)\n apply (insert ko[symmetric], simp add: makeObjectKO_def objBits_simps)\n apply clarsimp\n apply (subst(asm) subtract_mask[symmetric],\n erule_tac v=\"if x \\ set addrs then KOTCB makeObject else KOCTE cte\"\n in tcb_space_clear)\n apply (simp add: is_aligned_mask word_bw_assocs)\n apply assumption\n apply simp\n apply simp\n apply (simp add: pn)\n apply (clarsimp simp: makeObjectKO_def)\n apply (drule(1) tcb_cte_cases_aligned_helpers)\n apply (clarsimp simp: pn)\n done\n\nlemma new_cap_addrs_aligned:\n \"\\ is_aligned ptr (objBitsKO ko) \\\n \\ \\x \\ set (new_cap_addrs n ptr ko). is_aligned x (objBitsKO ko)\"\n apply (clarsimp simp: new_cap_addrs_def)\n apply (erule aligned_add_aligned[OF _ is_aligned_shift])\n apply simp\n done\n\nlemma new_cap_addrs_distinct:\n assumes cover: \"range_cover ptr sz (objBitsKO ko) n\"\n shows \"distinct (new_cap_addrs n ptr ko)\"\n unfolding new_cap_addrs_def\n apply (simp add: distinct_map)\n apply (rule comp_inj_on[where f=of_nat, unfolded o_def])\n apply (rule subset_inj_on)\n apply (rule word_unat.Abs_inj_on)\n apply (clarsimp simp only: unats_def atLeastLessThan_iff\n dest!: less_two_pow_divD)\n apply (insert cover)\n apply (erule less_le_trans)\n apply (insert range_cover.range_cover_n_le[OF cover])\n apply (erule le_trans)\n apply (cases \"objBitsKO ko = 0\")\n apply (simp add:word_bits_def)\n apply (rule less_imp_le)\n apply (rule power_strict_increasing)\n apply (simp add:word_bits_def)\n apply simp\n apply (rule inj_onI)\n apply clarsimp\n apply (drule arg_cong[where f=\"\\x. x >> objBitsKO ko\"])\n apply (cases \"objBitsKO ko = 0\")\n apply simp\n apply (subst(asm) shiftl_shiftr_id, simp add: range_cover_def)\n apply (subst word_unat_power, rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (erule order_less_le_trans)\n apply simp\n apply (subst(asm) shiftl_shiftr_id, simp add: range_cover_def)\n apply (subst word_unat_power, rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (erule order_less_le_trans)\n apply simp\n apply assumption\n done\n\nlemma new_cap_addrs_subset:\n assumes range_cover:\"range_cover ptr sz (objBitsKO ko) n\"\n shows \"set (new_cap_addrs n ptr ko) \\ {ptr .. ptr_add (ptr && ~~ mask sz) (2 ^ sz - 1)}\"\n apply (clarsimp simp add: new_cap_addrs_def shiftl_t2n\n field_simps\n dest!: less_two_pow_divD)\n apply (intro conjI)\n apply (insert range_cover)\n apply (rule machine_word_plus_mono_right_split[OF range_cover.range_cover_compare])\n apply assumption\n apply simp\n apply (simp add:range_cover_def word_bits_def)\n apply (clarsimp simp:ptr_add_def)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n apply (drule(1) range_cover.range_cover_compare)\n apply (rule iffD1[OF le_m1_iff_lt,THEN iffD2])\n using range_cover\n apply (simp add: p2_gt_0 range_cover_def word_bits_def)\n apply (rule iffD2[OF word_less_nat_alt])\n apply (rule le_less_trans[OF unat_plus_gt])\n using range_cover\n apply (clarsimp simp: range_cover_def)\n apply (insert range_cover)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask,OF le_refl ])\n apply (simp add:range_cover_def)+\ndone\n\ndefinition\n obj_relation_retype :: \"Structures_A.kernel_object \\\n Structures_H.kernel_object \\ bool\"\nwhere\n \"obj_relation_retype ko ko' \\\n obj_bits ko \\ objBitsKO ko'\n \\ (\\p. fst ` obj_relation_cuts ko p\n = {p + x * 2 ^ (objBitsKO ko') | x. x < 2 ^ (obj_bits ko - objBitsKO ko')}\n \\ (\\x \\ obj_relation_cuts ko p. snd x ko ko'))\"\n\nlemma obj_relation_retype_cutsD:\n \"\\ (x, P) \\ obj_relation_cuts ko p; obj_relation_retype ko ko' \\\n \\ \\y. x = p + y * 2 ^ (objBitsKO ko') \\ y < 2 ^ (obj_bits ko - objBitsKO ko')\n \\ P ko ko'\"\n apply (clarsimp simp: obj_relation_retype_def)\n apply (drule spec[where x=p])\n apply clarsimp\n apply (drule(1) bspec)\n apply (drule arg_cong[where f=\"\\S. x \\ S\"])\n apply clarsimp\n apply (fastforce simp: image_def)\n done\n\nlemma APIType_map2_Untyped[simp]:\n \"(APIType_map2 tp = Structures_A.Untyped)\n = (tp = Inr (APIObjectType ArchTypes_H.Untyped))\"\n by (simp add: APIType_map2_def\n split: sum.split object_type.split kernel_object.split arch_kernel_object.splits\n apiobject_type.split)\n\nlemma obj_relation_retype_leD:\n \"\\ obj_relation_retype ko ko' \\\n \\ objBitsKO ko' \\ obj_bits ko\"\n by (simp add: obj_relation_retype_def)\n\nlemma obj_relation_retype_default_leD:\n \"\\ obj_relation_retype (default_object (APIType_map2 ty) dev us) ko;\n ty \\ Inr (APIObjectType ArchTypes_H.Untyped) \\\n \\ objBitsKO ko \\ obj_bits_api (APIType_map2 ty) us\"\n by (simp add: obj_relation_retype_def objBits_def obj_bits_dev_irr)\n\nlemma makeObjectKO_Untyped:\n \"makeObjectKO dev ty = Some v \\ ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (clarsimp simp: makeObjectKO_def)\n\nlemma obj_relation_cuts_trivial:\n \"ptr \\ fst ` obj_relation_cuts x ptr\"\n apply (case_tac x)\n apply (rename_tac sz cs)\n apply (clarsimp simp:image_def cte_map_def well_formed_cnode_n_def)\n apply (rule_tac x = \"replicate sz False\" in exI)\n apply clarsimp+\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj)\n apply clarsimp\n apply (simp_all add:image_def pageBits_def)\n apply (rule_tac x = 0 in exI, simp)+\n apply (rule p2_gt_0[THEN iffD2])\n apply (rename_tac vmpage_size)\n by (case_tac vmpage_size;\n clarsimp simp:pageBitsForSize_def bit_simps)\n\nlemma obj_relation_retype_addrs_eq:\n assumes not_unt:\"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n assumes amp: \"m = 2^ ((obj_bits_api (APIType_map2 ty) us) - (objBitsKO ko)) * n\"\n assumes orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n shows \"\\ range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n \\ \\\n (\\x \\ set (retype_addrs ptr (APIType_map2 ty) n us).\n fst ` obj_relation_cuts (default_object (APIType_map2 ty) dev us) x)\n = set (new_cap_addrs m ptr ko)\"\n apply (rule set_eqI, rule iffI)\n apply (clarsimp simp: retype_addrs_def)\n apply (rename_tac p a b)\n apply (drule obj_relation_retype_cutsD[OF _ orr])\n apply (cut_tac obj_relation_retype_default_leD[OF orr not_unt])\n apply (clarsimp simp: new_cap_addrs_def image_def\n dest!: less_two_pow_divD)\n apply (rule_tac x=\"p * 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) + unat y\"\n in rev_bexI)\n apply (simp add: amp obj_bits_api_default_object not_unt obj_bits_dev_irr)\n apply (rule less_le_trans[OF nat_add_left_cancel_less[THEN iffD2]])\n apply (erule unat_mono)\n apply (subst unat_power_lower)\n apply (rule le_less_trans[OF diff_le_self])\n apply (clarsimp simp: range_cover_def\n split: Structures_A.apiobject_type.splits)\n apply (simp add:field_simps,subst mult_Suc[symmetric])\n apply (rule mult_le_mono1)\n apply simp\n apply (simp add: ptr_add_def shiftl_t2n field_simps\n objBits_def[symmetric] word_unat_power[symmetric])\n apply (simp add: power_add[symmetric])\n apply (clarsimp simp: new_cap_addrs_def retype_addrs_def\n dest!: less_two_pow_divD)\n apply (rename_tac p)\n apply (cut_tac obj_relation_retype_default_leD[OF orr not_unt])\n apply (cut_tac obj_relation_retype_leD[OF orr])\n apply (case_tac \"n = 0\")\n apply (simp add:amp)\n apply (case_tac \"p = 0\")\n apply simp\n apply (rule_tac x = 0 in rev_bexI)\n apply simp+\n apply (rule obj_relation_cuts_trivial)\n apply (rule_tac x=\"p div (2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko))\"\n in rev_bexI)\n apply (simp add:amp)\n apply (rule td_gal_lt[THEN iffD1])\n apply (simp add:field_simps)+\n using orr\n apply (clarsimp simp: obj_relation_retype_def ptr_add_def)\n apply (thin_tac \"\\x. P x\" for P)\n apply (rule_tac x=\"of_nat (p mod (2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko)))\" in exI)\n apply (simp only: word_unat_power Abs_fnat_homs shiftl_t2n)\n apply (rule conjI)\n apply (rule arg_cong[where f=of_nat])\n apply (subst mult_div_rearrange)\n apply simp\n apply (subst minus_mod_eq_mult_div[symmetric])\n apply (simp add:diff_mult_distrib2)\n apply (rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (rule le_less_trans[OF diff_le_self])\n apply (clarsimp simp: range_cover_def obj_bits_api_default_object obj_bits_dev_irr\n not_unt word_bits_def)+\ndone\n\nlemma objBits_le_obj_bits_api:\n \"makeObjectKO dev ty = Some ko \\\n objBitsKO ko \\ obj_bits_api (APIType_map2 ty) us\"\n apply (case_tac ty)\n apply (auto simp: default_arch_object_def bit_simps\n makeObjectKO_def objBits_simps' APIType_map2_def obj_bits_api_def slot_bits_def\n split: Structures_H.kernel_object.splits arch_kernel_object.splits object_type.splits\n Structures_H.kernel_object.splits arch_kernel_object.splits apiobject_type.splits)\n done\n\n\nlemma obj_relation_retype_other_obj:\n \"\\ is_other_obj_relation_type (a_type ko); other_obj_relation ko ko' \\\n \\ obj_relation_retype ko ko'\"\n apply (simp add: obj_relation_retype_def)\n apply (subgoal_tac \"objBitsKO ko' = obj_bits ko\")\n apply (clarsimp simp: is_other_obj_relation_type)\n apply (fastforce simp: other_obj_relation_def objBits_simps'\n split: Structures_A.kernel_object.split_asm\n Structures_H.kernel_object.split_asm\n Structures_H.kernel_object.split\n arch_kernel_obj.split_asm arch_kernel_object.split)\n done\n\nlemma retype_pspace_relation:\n assumes sr: \"pspace_relation (kheap s) (ksPSpace s')\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"pspace_relation (foldr (\\p ps. ps(p \\ default_object (APIType_map2 ty) dev us))\n (retype_addrs ptr (APIType_map2 ty) n us) (kheap s))\n (foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko) (ksPSpace s'))\"\n (is \"pspace_relation ?ps ?ps'\")\n unfolding pspace_relation_def\nproof\n have not_unt: \"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (rule makeObjectKO_Untyped[OF ko])\n\n have dom_not_ra:\n \"\\x \\ dom (kheap s). x \\ set (retype_addrs ptr (APIType_map2 ty) n us)\"\n apply clarsimp\n apply (erule(1) pspace_no_overlapC[OF pn _ _ cover vs(1)])\n done\n\n hence dom_Int_ra:\n \"set (retype_addrs ptr (APIType_map2 ty) n us) \\ dom (kheap s) = {}\"\n by auto\n\n note pdom = pspace_dom_upd [OF dom_Int_ra, where ko=\"default_object (APIType_map2 ty) dev us\"]\n\n have pdom': \"dom ?ps' = dom (ksPSpace s') \\ set (new_cap_addrs m ptr ko)\"\n by (clarsimp simp add: foldr_upd_app_if[folded data_map_insert_def]\n dom_if_Some Un_commute\n split del: if_split)\n\n note not_unt = makeObjectKO_Untyped [OF ko]\n\n have \"pspace_dom (kheap s) = dom (ksPSpace s')\"\n using sr by (simp add: pspace_relation_def)\n\n thus \"pspace_dom ?ps = dom ?ps'\"\n apply (simp add: pdom pdom')\n apply (rule arg_cong[where f=\"\\T. S \\ T\" for S])\n apply (rule obj_relation_retype_addrs_eq[OF not_unt num_r orr cover])\n done\n\n have dom_same:\n \"\\x v. kheap s x = Some v \\ ?ps x = Some v\"\n apply (frule bspec [OF dom_not_ra, OF domI])\n apply (simp add: foldr_upd_app_if)\n done\n have cover':\"range_cover ptr sz (objBitsKO ko) m\"\n by (rule range_cover_rel[OF cover objBits_le_obj_bits_api[OF ko] num_r])\n have dom_same':\n \"\\x v. ksPSpace s' x = Some v \\ ?ps' x = Some v\"\n apply (clarsimp simp:foldr_upd_app_if[folded data_map_insert_def])\n apply (drule domI[where m = \"ksPSpace s'\"])\n apply (drule(1) IntI)\n apply (erule_tac A = \"A \\ B\" for A B in in_emptyE[rotated])\n apply (rule disjoint_subset[OF new_cap_addrs_subset[OF cover']])\n apply (clarsimp simp:ptr_add_def field_simps)\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n done\n\n show \"\\x \\ dom ?ps. \\(y, P) \\ obj_relation_cuts (the (?ps x)) x.\n P (the (?ps x)) (the (?ps' y))\"\n using sr\n apply (clarsimp simp: pspace_relation_def)\n apply (simp add: foldr_upd_app_if split: if_split_asm)\n apply (clarsimp simp: foldr_upd_app_if[folded data_map_insert_def])\n apply (rule conjI)\n apply (drule obj_relation_retype_cutsD [OF _ orr], clarsimp)\n apply (rule impI, erule notE)\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (erule rev_bexI)\n apply (simp add: image_def)\n apply (erule rev_bexI, simp)\n apply (drule bspec, erule domI)\n apply clarsimp\n apply (drule(1) bspec, simp)\n apply (subgoal_tac \"a \\ pspace_dom (kheap s)\")\n apply clarsimp\n apply (frule dom_same', simp)\n apply (simp(no_asm) add: pspace_dom_def)\n apply (rule rev_bexI, erule domI)\n apply (simp add: image_def)\n apply (erule rev_bexI, simp)\n done\nqed\n\n\n(*Clagged from Retype_AC*)\nlemma foldr_upd_app_if': \"foldr (\\p ps. ps(p := f p)) as g = (\\x. if x \\ set as then (f x) else g x)\"\n apply (induct as)\n apply simp\n apply simp\n apply (rule ext)\n apply simp\n done\n\nlemma etcb_rel_makeObject: \"etcb_relation default_etcb makeObject\"\n apply (simp add: etcb_relation_def default_etcb_def)\n apply (simp add: makeObject_tcb default_priority_def default_domain_def)\n done\n\n\nlemma ekh_at_tcb_at: \"valid_etcbs_2 ekh kh \\ ekh x = Some y \\ \\tcb. kh x = Some (TCB tcb)\"\n apply (simp add: valid_etcbs_2_def\n st_tcb_at_kh_def obj_at_kh_def\n is_etcb_at'_def obj_at_def)\n apply force\n done\n\nlemma default_etcb_default_domain_futz [simp]:\n \"default_etcb\\tcb_domain := default_domain\\ = default_etcb\"\nunfolding default_etcb_def by simp\n\nlemma retype_ekheap_relation:\n assumes sr: \"ekheap_relation (ekheap s) (ksPSpace s')\"\n and sr': \"pspace_relation (kheap s) (ksPSpace s')\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and et: \"valid_etcbs s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"ekheap_relation (foldr (\\p ps. ps(p := default_ext (APIType_map2 ty) default_domain))\n (retype_addrs ptr (APIType_map2 ty) n us) (ekheap s))\n (foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko) (ksPSpace s'))\"\n (is \"ekheap_relation ?ps ?ps'\")\n proof -\n have not_unt: \"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (rule makeObjectKO_Untyped[OF ko])\n show ?thesis\n apply (case_tac \"ty \\ Inr (APIObjectType apiobject_type.TCBObject)\")\n apply (insert ko)\n apply (cut_tac retype_pspace_relation[OF sr' vs vs' pn pn' ko cover orr num_r])\n apply (simp add: foldr_upd_app_if' foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (insert sr)\n apply (clarsimp simp add: ekheap_relation_def\n pspace_relation_def default_ext_def cong: if_cong\n split: if_split_asm)\n subgoal by (clarsimp simp add: makeObjectKO_def APIType_map2_def cong: if_cong\n split: sum.splits Structures_H.kernel_object.splits\n arch_kernel_object.splits RISCV64_H.object_type.splits apiobject_type.splits)\n\n apply (frule ekh_at_tcb_at[OF et])\n apply (intro impI conjI)\n apply clarsimp\n apply (drule_tac x=a in bspec,force)\n apply (clarsimp simp add: other_obj_relation_def split: if_split_asm)\n apply (case_tac ko,simp_all)\n apply (clarsimp simp add: makeObjectKO_def cong: if_cong split: sum.splits Structures_H.kernel_object.splits\n arch_kernel_object.splits RISCV64_H.object_type.splits\n apiobject_type.splits if_split_asm)\n apply (drule_tac x=xa in bspec,simp)\n subgoal by force\n subgoal by force\n apply (simp add: foldr_upd_app_if' foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (clarsimp simp add: APIType_map2_def default_ext_def ekheap_relation_def\n default_object_def makeObjectKO_def etcb_rel_makeObject\n cong: if_cong\n split: if_split_asm)\n apply force\n done\nqed\n\nlemma pspace_no_overlapD':\n \"\\ ksPSpace s x = Some ko; pspace_no_overlap' p bits s \\\n \\ {x .. x + 2 ^ objBitsKO ko - 1} \\ {p .. (p && ~~ mask bits) + 2 ^ bits - 1} = {}\"\n by (simp add:pspace_no_overlap'_def mask_def add_diff_eq)\n\nlemma new_range_subset:\n assumes\n cover: \"range_cover ptr sz (objBitsKO ko) n\"\n and addr: \"x \\ set (new_cap_addrs n ptr ko)\"\n shows \"mask_range x (objBitsKO ko) \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n (is \"?lhs \\ ?rhs\")\nproof -\n have base_in: \"x \\ {ptr..ptr_add (ptr && ~~ mask sz) (2 ^ sz - 1)}\"\n by (rule set_mp[OF new_cap_addrs_subset[OF cover] addr])\n have aligned: \"is_aligned x (objBitsKO ko)\"\n apply (insert cover)\n apply (clarsimp simp:range_cover_def)\n apply (drule new_cap_addrs_aligned)\n apply (erule bspec[OF _ addr])\n done\n show ?thesis using base_in aligned addr\n apply (intro range_subsetI)\n apply (clarsimp simp:ptr_add_def field_simps)+\n apply (simp add:x_power_minus_1)\n apply (clarsimp simp:new_cap_addrs_def)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n apply (simp add:mask_2pm1[symmetric])\n apply (rule iffD2[OF shiftr_mask_cmp[where c = \"objBitsKO ko\"]])\n apply (insert cover)\n apply (simp add:range_cover_def)\n apply (simp add:range_cover_def word_bits_def)\n apply (subst aligned_shift')\n apply (simp add:mask_lt_2pn range_cover_def word_bits_def )\n apply (drule is_aligned_addD1)\n apply (simp add:range_cover_def)\n apply (rule aligned_add_aligned)\n apply (rule aligned_already_mask)\n apply (fastforce simp:range_cover_def)\n apply (simp_all add: range_cover_def)[3]\n apply (subst shiftr_mask2[symmetric])\n apply (simp add:range_cover_def word_bits_def)\n apply (rule le_shiftr)\n apply (subst le_mask_iff_lt_2n[THEN iffD1])\n apply (simp add:range_cover_def word_bits_def)\n apply (clarsimp simp:word_less_nat_alt)\n apply (rule le_less_trans[OF unat_plus_gt])\n apply (frule(1) range_cover.range_cover_compare)\n apply (clarsimp simp:shiftl_t2n mult.commute range_cover_def)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask])\n apply (rule le_refl)\n apply (simp add:range_cover_def)\n done\nqed\n\nlemma retype_aligned_distinct':\n assumes vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and cover: \"range_cover ptr sz (objBitsKO ko) n \"\n shows\n \"pspace_distinct' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n \"pspace_aligned' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n (is \"pspace_aligned' (s'\\ksPSpace := ?ps\\)\")\nproof -\n have al: \"is_aligned ptr (objBitsKO ko)\"\n using cover\n by (simp add:cover range_cover_def)\n let ?s' = \"s'\\ksPSpace := ?ps\\\"\n note nc_al = bspec [OF new_cap_addrs_aligned [OF al]]\n note nc_al' = nc_al[unfolded objBits_def]\n\n show pa': \"pspace_aligned' ?s'\" using vs'(1)\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (clarsimp simp add: pspace_aligned'_def nc_al'\n split: if_split_asm)\n apply (drule bspec, erule domI, simp)\n done\n\n have okov: \"objBitsKO ko < word_bits\"\n by (simp add: objBits_def)\n\n have new_range_disjoint:\n \"\\x. x \\ set (new_cap_addrs n ptr ko) \\\n ({x .. x + 2 ^ (objBitsKO ko) - 1} - {x}) \\ set (new_cap_addrs n ptr ko) = {}\"\n apply safe\n apply (rule ccontr)\n apply (frule(2) aligned_neq_into_no_overlap [OF _ nc_al nc_al])\n apply (drule_tac a=xa in equals0D)\n apply (clarsimp simp: field_simps is_aligned_no_overflow [OF nc_al])\n done\n note new_range_sub = new_range_subset [OF cover]\n\n show pd': \"pspace_distinct' ?s'\" using vs'(2)\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: pspace_distinct'_def dom_if_Some ball_Un)\n apply (intro conjI ballI impI)\n apply (simp add: ps_clear_def dom_if_Some Int_Un_distrib mask_def add_diff_eq\n objBits_def[symmetric])\n apply (rule conjI)\n apply (erule new_range_disjoint)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (simp only: add_mask_fold)\n apply (erule disjoint_subset[OF new_range_sub])\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (clarsimp simp add: ps_clear_def dom_if_Some Int_Un_distrib mask_def add_diff_eq)\n apply (rule conjI)\n apply (erule new_range_disjoint)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (simp only: add_mask_fold)\n apply (erule disjoint_subset[OF new_range_sub])\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (clarsimp simp add: ps_clear_def dom_if_Some Int_Un_distrib)\n apply (subst Int_commute)\n apply (rule disjoint_subset[OF new_cap_addrs_subset,OF cover])\n apply (subst Int_commute)\n apply (simp add:ptr_add_def field_simps)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (drule pspace_no_overlapD' [OF _ pn'])\n apply (simp add: mask_def add_diff_eq)\n done\nqed\n\ndefinition\n update_gs :: \"Structures_A.apiobject_type \\ nat \\ machine_word set\n \\ 'a kernel_state_scheme \\ 'a kernel_state_scheme\"\nwhere\n \"update_gs ty us ptrs \\\n case ty of\n Structures_A.CapTableObject \\ gsCNodes_update\n (\\cns x. if x \\ ptrs then Some us else cns x)\n | ArchObject SmallPageObj \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some RISCVSmallPage else ups x)\n | ArchObject LargePageObj \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some RISCVLargePage else ups x)\n | ArchObject HugePageObj \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some RISCVHugePage else ups x)\n | _ \\ id\"\n\nlemma ksPSpace_update_gs_eq[simp]:\n \"ksPSpace (update_gs ty us ptrs s) = ksPSpace s\"\n by (simp add: update_gs_def\n split: Structures_A.apiobject_type.splits aobject_type.splits)\n\nend\n\nglobal_interpretation update_gs: PSpace_update_eq \"update_gs ty us ptrs\"\n by (simp add: PSpace_update_eq_def)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma ksMachineState_update_gs[simp]:\n \"ksMachineState (update_gs tp us addrs s) = ksMachineState s\"\n by (simp add: update_gs_def\n split: aobject_type.splits Structures_A.apiobject_type.splits)\n\nlemma update_gs_ksMachineState_update_swap:\n \"update_gs tp us addrs (ksMachineState_update f s) =\n ksMachineState_update f (update_gs tp us addrs s)\"\n by (simp add: update_gs_def\n split: aobject_type.splits Structures_A.apiobject_type.splits)\n\nlemma update_gs_id:\n \"tp \\ no_gs_types \\ update_gs tp us addrs = id\"\n by (simp add: no_gs_types_def update_gs_def\n split: Structures_A.apiobject_type.splits aobject_type.splits)\n\nlemma update_gs_simps[simp]:\n \"update_gs Structures_A.apiobject_type.CapTableObject us ptrs =\n gsCNodes_update (\\cns x. if x \\ ptrs then Some us else cns x)\"\n \"update_gs (ArchObject SmallPageObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some RISCVSmallPage else ups x)\"\n \"update_gs (ArchObject LargePageObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some RISCVLargePage else ups x)\"\n \"update_gs (ArchObject HugePageObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some RISCVHugePage else ups x)\"\n by (simp_all add: update_gs_def)\n\nlemma retype_state_relation:\n notes data_map_insert_def[simp del]\n assumes sr: \"(s, s') \\ state_relation\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and et: \"valid_etcbs s\" \"valid_list s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and api: \"obj_bits_api (APIType_map2 ty) us \\ sz\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"(ekheap_update\n (\\_. foldr (\\p ekh a. if a = p then default_ext (APIType_map2 ty) default_domain else ekh a)\n (retype_addrs ptr (APIType_map2 ty) n us) (ekheap s))\n s\n \\kheap :=\n foldr (\\p. data_map_insert p (default_object (APIType_map2 ty) dev us))\n (retype_addrs ptr (APIType_map2 ty) n us) (kheap s)\\,\n update_gs (APIType_map2 ty) us (set (retype_addrs ptr (APIType_map2 ty) n us))\n (s'\\ksPSpace :=\n foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko)\n (ksPSpace s')\\))\n \\ state_relation\"\n (is \"(ekheap_update (\\_. ?eps) s\\kheap := ?ps\\, update_gs _ _ _ (s'\\ksPSpace := ?ps'\\))\n \\ state_relation\")\n proof (rule state_relation_null_filterE[OF sr refl _ _ _ _ _ _ _ vs'], simp_all add: trans_state_update[symmetric] del: trans_state_update)\n\n have cover':\"range_cover ptr sz (objBitsKO ko) m\"\n by (rule range_cover_rel[OF cover objBits_le_obj_bits_api[OF ko] num_r])\n have al':\"is_aligned ptr (objBitsKO ko)\"\n using cover'\n by (simp add:range_cover_def)\n have sz:\"sz < word_bits\"\n using cover'\n by (simp add:range_cover_def word_bits_def)\n let ?t = \"s\\kheap := ?ps\\\"\n let ?tp = \"APIType_map2 ty\"\n let ?al = \"retype_addrs ptr ?tp n us\"\n let ?t' = \"update_gs ?tp us (set ?al) (s'\\ksPSpace := ?ps'\\)\"\n\n note pad' = retype_aligned_distinct' [OF vs' pn' cover']\n thus pa': \"pspace_aligned' (s'\\ksPSpace := ?ps'\\)\"\n and pd': \"pspace_distinct' (s'\\ksPSpace := ?ps'\\)\"\n by simp_all\n\n note pa'' = pa'[simplified foldr_upd_app_if[folded data_map_insert_def]]\n note pd'' = pd'[simplified foldr_upd_app_if[folded data_map_insert_def]]\n\n note not_unt = makeObjectKO_Untyped [OF ko]\n show \"null_filter (caps_of_state ?t) = null_filter (caps_of_state s)\"\n apply (rule null_filter_caps_of_state_foldr[folded data_map_insert_def])\n apply (simp add: not_unt)\n apply (rule ballI)\n apply (erule pspace_no_overlapD2 [OF pn _ cover vs(1)])\n done\n\n have nc_dis: \"distinct (new_cap_addrs m ptr ko)\"\n by (rule new_cap_addrs_distinct [OF cover'])\n\n note nc_al = bspec [OF new_cap_addrs_aligned [OF al']]\n note nc_al' = nc_al[unfolded objBits_def]\n show \"null_filter' (map_to_ctes ?ps') = null_filter' (ctes_of s')\"\n apply (rule null_filter_ctes_retype [OF ko vs' pa'' pd''])\n apply (simp add: nc_al)\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover']])\n apply (insert pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (drule orthD1)\n apply (simp add:ptr_add_def field_simps)\n apply clarsimp\n done\n\n show \"valid_objs s\" using vs\n by (clarsimp simp: valid_pspace_def)\n\n show \"valid_mdb s\" using vs\n by (clarsimp)\n\n show \"valid_list s\" using et\n by (clarsimp)\n\n show \"mdb_cte_at (swp (cte_wp_at ((\\) cap.NullCap)) s) (cdt s)\" using vs\n by (clarsimp simp: valid_mdb_def)\n\n have pspr: \"pspace_relation (kheap s) (ksPSpace s')\"\n using sr by (simp add: state_relation_def)\n\n thus \"pspace_relation ?ps ?ps'\"\n by (rule retype_pspace_relation [OF _ vs vs' pn pn' ko cover orr num_r,\n folded data_map_insert_def])\n\n have \"ekheap_relation (ekheap (s)) (ksPSpace s')\"\n using sr by (simp add: state_relation_def)\n\n thus \"ekheap_relation ?eps ?ps'\"\n by (fold fun_upd_apply) (rule retype_ekheap_relation[OF _ pspr vs et(1) vs' pn pn' ko cover orr num_r])\n\n have pn2: \"\\a\\set ?al. kheap s a = None\"\n by (rule ccontr) (clarsimp simp: pspace_no_overlapD1[OF pn _ cover vs(1)])\n\n from sr have gr: \"ghost_relation (kheap s) (gsUserPages s') (gsCNodes s')\"\n by (rule state_relationE)\n\n show \"ghost_relation ?ps (gsUserPages ?t') (gsCNodes ?t')\"\n proof (cases ?tp)\n case Untyped thus ?thesis by (simp add: not_unt)\n next\n note data_map_insert_def[simp]\n\n case TCBObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: ups_of_heap_def default_object_def TCBObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: cns_of_heap_def default_object_def TCBObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap, simp add: TCBObject update_gs_def)\n next\n case EndpointObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: ups_of_heap_def default_object_def data_map_insert_def EndpointObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: cns_of_heap_def default_object_def data_map_insert_def EndpointObject)\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: EndpointObject update_gs_def)\n next\n note data_map_insert_def[simp]\n case NotificationObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: ups_of_heap_def\n default_object_def NotificationObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: cns_of_heap_def\n default_object_def NotificationObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: NotificationObject update_gs_def)\n next\n case CapTableObject\n note data_map_insert_def[simp]\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: ups_of_heap_def\n default_object_def CapTableObject)\n have [simp]: \"cns_of_heap ?ps = (\\x. if x \\ set ?al then Some us\n else cns_of_heap (kheap s) x)\"\n by (rule ext, induct (?al),\n simp_all add: cns_of_heap_def wf_empty_bits wf_unique default_object_def CapTableObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: CapTableObject update_gs_def ext)\n next\n case (ArchObject ao)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: cns_of_heap_def data_map_insert_def\n default_object_def ArchObject)\n from pn2 gr show ?thesis\n apply (clarsimp simp add: ghost_relation_of_heap)\n apply (rule conjI[rotated])\n apply (simp add: ArchObject update_gs_def split: aobject_type.splits)\n apply (thin_tac \"cns_of_heap h = g\" for h g)\n apply (drule sym)\n apply (rule ext)\n apply (induct (?al))\n apply (simp add: update_gs_def ArchObject split: aobject_type.splits)\n apply (simp add: update_gs_def ArchObject default_object_def\n default_arch_object_def ups_of_heap_def\n data_map_insert_def\n split: aobject_type.splits)\n done\n qed\n\n show \"\\f' g' h'. ?t' =\n s'\\ksPSpace := f' (ksPSpace s'), gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\\"\n apply (clarsimp simp: update_gs_def\n split: Structures_A.apiobject_type.splits)\n apply (intro conjI impI)\n apply (subst ex_comm, rule_tac x=id in exI,\n subst ex_comm, rule_tac x=id in exI, fastforce)+\n apply (subst ex_comm, rule_tac x=id in exI)\n apply (subst ex_comm)\n apply (rule_tac x=\"\\cns x. if x\\set ?al then Some us else cns x\" in exI,\n simp)\n apply (rule_tac x=\"\\x. foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs m ptr ko) x\" in exI, simp)\n apply clarsimp\n apply (rule_tac x=\"\\x. foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs m ptr ko) x\" in exI)\n apply (subst ex_comm, rule_tac x=id in exI)\n apply (simp split: aobject_type.splits)\n apply (intro conjI impI)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some RISCVSmallPage\n else cns x\" in exI, simp)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some RISCVLargePage\n else cns x\" in exI, simp)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some RISCVHugePage\n else cns x\" in exI, simp)\n apply (rule_tac x=id in exI, simp)+\n done\nqed\n\nlemma new_cap_addrs_fold':\n \"1 \\ n \\\n map (\\n. ptr + (n << objBitsKO ko)) [0.e.n - 1] =\n new_cap_addrs (unat n) ptr ko\"\n by (clarsimp simp:new_cap_addrs_def ptr_add_def upto_enum_red'\n shiftl_t2n power_add field_simps)\n\nlemma objBitsKO_gt_0: \"0 < objBitsKO ko\"\n apply (case_tac ko)\n apply (simp_all add:objBits_simps' pageBits_def)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object)\n apply (simp_all add:archObjSize_def bit_simps)\n done\n\nlemma kheap_ekheap_double_gets:\n \"(\\rv erv rv'. \\pspace_relation rv rv'; ekheap_relation erv rv'\\\n \\ corres r (R rv erv) (R' rv') (b rv erv) (d rv')) \\\n corres r (\\s. R (kheap s) (ekheap s) s) (\\s. R' (ksPSpace s) s)\n (do x \\ gets kheap; xa \\ gets ekheap; b x xa od) (gets ksPSpace >>= d)\"\n apply (rule corres_symb_exec_l)\n apply (rule corres_guard_imp)\n apply (rule_tac r'= \"\\erv rv'. ekheap_relation erv rv' \\ pspace_relation x rv'\"\n in corres_split)\n apply (subst corres_gets[where P=\"\\s. x = kheap s\" and P'=\\])\n apply clarsimp\n apply (simp add: state_relation_def)\n apply clarsimp\n apply assumption\n apply (wp gets_exs_valid | simp)+\n done\n\n(*\n\nSplit out the extended operation that sets the etcb domains.\n\nThis allows the existing corres proofs in this file to more-or-less go\nthrough as they stand.\n\nA more principled fix would be to change the abstract spec and\ngeneralise init_arch_objects to initialise other object types.\n\n*)\n\ndefinition retype_region2_ext :: \"obj_ref list \\ Structures_A.apiobject_type \\ unit det_ext_monad\" where\n \"retype_region2_ext ptrs type \\ modify (\\s. ekheap_update (foldr (\\p ekh. (ekh(p := default_ext type default_domain))) ptrs) s)\"\n\ncrunch all_but_exst[wp]: retype_region2_ext \"all_but_exst P\"\ncrunch (empty_fail) empty_fail[wp]: retype_region2_ext\n\nend\n\ninterpretation retype_region2_ext_extended: is_extended \"retype_region2_ext ptrs type\"\n by (unfold_locales; wp)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n \"retype_region2_extra_ext ptrs type \\\n when (type = Structures_A.TCBObject) (do\n cdom \\ gets cur_domain;\n mapM_x (ethread_set (\\tcb. tcb\\tcb_domain := cdom\\)) ptrs\n od)\"\n\ncrunch all_but_exst[wp]: retype_region2_extra_ext \"all_but_exst P\" (wp: mapM_x_wp)\ncrunch (empty_fail) empty_fail[wp]: retype_region2_extra_ext (wp: mapM_x_wp)\n\nend\n\ninterpretation retype_region2_extra_ext_extended: is_extended \"retype_region2_extra_ext ptrs type\"\n by (unfold_locales; wp)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n retype_region2 :: \"obj_ref \\ nat \\ nat \\ Structures_A.apiobject_type \\ bool \\ (obj_ref list,'z::state_ext) s_monad\"\nwhere\n \"retype_region2 ptr numObjects o_bits type dev \\ do\n obj_size \\ return $ 2 ^ obj_bits_api type o_bits;\n ptrs \\ return $ map (\\p. ptr_add ptr (p * obj_size)) [0..< numObjects];\n when (type \\ Structures_A.Untyped) (do\n kh \\ gets kheap;\n kh' \\ return $ foldr (\\p kh. kh(p \\ default_object type dev o_bits)) ptrs kh;\n do_extended_op (retype_region2_ext ptrs type);\n modify $ kheap_update (K kh')\n od);\n return $ ptrs\n od\"\n\nlemma retype_region_ext_modify_kheap_futz:\n \"(retype_region2_extra_ext ptrs type :: (unit, det_ext) s_monad) >>= (\\_. modify (kheap_update f))\n = (modify (kheap_update f) >>= (\\_. retype_region2_extra_ext ptrs type))\"\n apply (clarsimp simp: retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def when_def bind_assoc)\n apply (subst oblivious_modify_swap)\n defer\n apply (simp add: bind_assoc)\n apply (rule oblivious_bind)\n apply simp\n apply (rule oblivious_mapM_x)\n apply (clarsimp simp: ethread_set_def set_eobject_def)\n apply (rule oblivious_bind)\n apply (simp add: gets_the_def)\n apply (rule oblivious_bind)\n apply (clarsimp simp: get_etcb_def)\n apply simp\n apply (simp add: modify_def[symmetric])\ndone\n\nlemmas retype_region_ext_modify_kheap_futz' = fun_cong[OF arg_cong[where f=NonDetMonad.bind, OF retype_region_ext_modify_kheap_futz[symmetric]], simplified bind_assoc]\n\nlemma foldr_upd_app_if_eta_futz:\n \"foldr (\\p ps. ps(p \\ f p)) as = (\\g x. if x \\ set as then Some (f x) else g x)\"\napply (rule ext)\napply (rule foldr_upd_app_if)\ndone\n\nlemma modify_ekheap_update_comp_futz:\n \"modify (ekheap_update (f \\ g)) = modify (ekheap_update g) >>= (K (modify (ekheap_update f)))\"\nby (simp add: o_def modify_def bind_def gets_def get_def put_def)\n\nlemma mapM_x_modify_futz:\n assumes \"\\ptr\\set ptrs. ekheap s ptr \\ None\"\n shows \"mapM_x (ethread_set F) (rev ptrs) s\n = modify (ekheap_update (foldr (\\p ekh. ekh(p := Some (F (the (ekh p))))) ptrs)) s\" (is \"?lhs ptrs s = ?rhs ptrs s\")\nusing assms\nproof(induct ptrs arbitrary: s)\n case Nil thus ?case by (simp add: mapM_x_Nil return_def simpler_modify_def)\nnext\n case (Cons ptr ptrs s)\n have \"?rhs (ptr # ptrs) s\n = (do modify (ekheap_update (foldr (\\p ekh. ekh(p \\ F (the (ekh p)))) ptrs));\n modify (ekheap_update (\\ekh. ekh(ptr \\ F (the (ekh ptr)))))\n od) s\"\n by (simp only: foldr_Cons modify_ekheap_update_comp_futz) simp\n also have \"... = (do ?lhs ptrs;\n modify (ekheap_update (\\ekh. ekh(ptr \\ F (the (ekh ptr)))))\n od) s\"\n apply (rule monad_eq_split_tail)\n apply simp\n apply (rule Cons.hyps[symmetric])\n using Cons.prems\n apply force\n done\n also have \"... = ?lhs (ptr # ptrs) s\"\n apply (simp add: mapM_x_append mapM_x_singleton)\n apply (rule monad_eq_split2[OF refl, where\n P=\"\\s. \\ptr\\set (ptr # ptrs). ekheap s ptr \\ None\"\n and Q=\"\\_ s. ekheap s ptr \\ None\"])\n apply (simp add: ethread_set_def\n assert_opt_def get_etcb_def gets_the_def gets_def get_def modify_def put_def set_eobject_def\n bind_def fail_def return_def split_def\n split: option.splits)\n apply ((wp mapM_x_wp[OF _ subset_refl] | simp add: ethread_set_def set_eobject_def)+)[1]\n using Cons.prems\n apply force\n done\n finally show ?case by (rule sym)\nqed\n\nlemma awkward_fold_futz:\n \"fold (\\p ekh. ekh(p \\ the (ekh p)\\tcb_domain := cur_domain s\\)) ptrs ekh\n = (\\x. if x \\ set ptrs then Some ((the (ekh x))\\tcb_domain := cur_domain s\\) else ekh x)\"\nby (induct ptrs arbitrary: ekh) (simp_all add: fun_eq_iff)\n\nlemma retype_region2_ext_retype_region_ext_futz:\n \"retype_region2_ext ptrs type >>= (\\_. retype_region2_extra_ext ptrs type)\n = retype_region_ext ptrs type\"\nproof(cases type)\n case TCBObject\n have complete_futz:\n \"\\F x. modify (ekheap_update (\\_. F (cur_domain x) (ekheap x))) x = modify (ekheap_update (\\ekh. F (cur_domain x) ekh)) x\"\n by (simp add: modify_def get_def get_etcb_def put_def bind_def return_def)\n have second_futz:\n \"\\f G.\n do modify (ekheap_update f);\n cdom \\ gets (\\s. cur_domain s);\n G cdom\n od =\n do cdom \\ gets (\\s. cur_domain s);\n modify (ekheap_update f);\n G cdom\n od\"\n by (simp add: bind_def gets_def get_def return_def simpler_modify_def)\n from TCBObject show ?thesis\n apply (clarsimp simp: retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def when_def bind_assoc)\n apply (clarsimp simp: exec_gets fun_eq_iff)\n apply (subst complete_futz)\n apply (simp add: second_futz[simplified] exec_gets)\n apply (simp add: default_ext_def exec_modify)\n apply (subst mapM_x_modify_futz[where ptrs=\"rev ptrs\", simplified])\n apply (simp add: foldr_upd_app_if_eta_futz)\n apply (simp add: modify_def exec_get put_def o_def)\n apply (simp add: foldr_upd_app_if_eta_futz foldr_conv_fold awkward_fold_futz)\n apply (simp cong: if_cong)\n done\nqed (auto simp: fun_eq_iff retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def\n put_def gets_def get_def bind_def return_def mk_ef_def modify_def foldr_upd_app_if' when_def default_ext_def)\n\nlemma retype_region2_ext_retype_region:\n \"(retype_region ptr numObjects o_bits type dev :: (obj_ref list, det_ext) s_monad)\n = (do ptrs \\ retype_region2 ptr numObjects o_bits type dev;\n retype_region2_extra_ext ptrs type;\n return ptrs\n od)\"\napply (clarsimp simp: retype_region_def retype_region2_def when_def bind_assoc)\n apply safe\n defer\n apply (simp add: retype_region2_extra_ext_def)\napply (subst retype_region_ext_modify_kheap_futz'[simplified bind_assoc])\napply (subst retype_region2_ext_retype_region_ext_futz[symmetric])\napply (simp add: bind_assoc)\ndone\n\nlemma getObject_tcb_gets:\n \"getObject addr >>= (\\x::tcb. gets proj >>= (\\y. G x y))\n = gets proj >>= (\\y. getObject addr >>= (\\x. G x y))\"\nby (auto simp: exec_gets fun_eq_iff intro: bind_apply_cong dest!: in_inv_by_hoareD[OF getObject_inv_tcb])\n\nlemma setObject_tcb_gets_ksCurDomain:\n \"setObject addr (tcb::tcb) >>= (\\_. gets ksCurDomain >>= G)\n = gets ksCurDomain >>= (\\x. setObject addr tcb >>= (\\_. G x))\"\napply (clarsimp simp: exec_gets fun_eq_iff)\napply (rule bind_apply_cong)\n apply simp\napply (drule_tac P1=\"\\cdom. cdom = ksCurDomain x\" in use_valid[OF _ setObject_cd_inv])\napply (simp_all add: exec_gets)\ndone\n\nlemma curDomain_mapM_x_futz:\n \"curDomain >>= (\\cdom. mapM_x (threadSet (F cdom)) addrs)\n = mapM_x (\\addr. curDomain >>= (\\cdom. threadSet (F cdom) addr)) addrs\"\nproof(induct addrs)\n case Nil thus ?case\n by (simp add: curDomain_def mapM_x_def sequence_x_def bind_def gets_def get_def return_def)\nnext\n case (Cons addr addrs)\n have H: \"\\G. do cdom \\ curDomain;\n _ \\ threadSet (F cdom) addr;\n G cdom\n od\n = do cdom \\ curDomain;\n threadSet (F cdom) addr;\n cdom \\ curDomain;\n G cdom\n od\"\n by (simp add: bind_assoc curDomain_def threadSet_def setObject_tcb_gets_ksCurDomain\n getObject_tcb_gets double_gets_drop_regets)\n from Cons.hyps show ?case\n apply (simp add: mapM_x_def sequence_x_def)\n apply (simp add: bind_assoc foldr_map o_def)\n apply (subst H)\n apply (simp add: mapM_x_def sequence_x_def)\n done\nqed\n\n(*\n\nThe existing proof continues below.\n\n*)\n\nlemma modify_ekheap_update_ekheap:\n \"modify (\\s. ekheap_update f s) = do s \\ gets ekheap; modify (\\s'. s'\\ekheap := f s\\) od\"\nby (simp add: modify_def gets_def get_def put_def bind_def return_def split_def fun_eq_iff)\n\nlemma corres_retype':\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us =\n objBitsKO ko + gbits\"\n and check: \"(sz < obj_bits_api (APIType_map2 ty) us)\n = (sz < objBitsKO ko + gbits)\"\n and usv: \"APIType_map2 ty = Structures_A.CapTableObject \\ 0 < us\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype\n (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n shows \"corres (\\rv rv'. rv' = g rv)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s)\n (retype_region2 ptr n us (APIType_map2 ty) dev)\n (do addrs \\ createObjects ptr n ko gbits;\n _ \\ modify (update_gs (APIType_map2 ty) us (set addrs));\n return (g addrs) od)\"\n (is \"corres ?r ?P ?P' ?C ?A\")\nproof -\n note data_map_insert_def[simp del]\n have not_zero':\"((of_nat n)::machine_word) \\ 0\"\n by (rule range_cover_not_zero[OF not_zero cover])\n have shiftr_not_zero:\" ((of_nat n)::machine_word) << gbits \\ 0\"\n apply (rule range_cover_not_zero_shift[OF not_zero cover])\n apply (simp add:obj_bits_api)\n done\n have unat_of_nat_shift:\"unat (((of_nat n)::machine_word) << gbits) =\n (n * 2^ gbits)\"\n apply (rule range_cover.unat_of_nat_n_shift[OF cover])\n using obj_bits_api\n apply simp\n done\n have unat_of_nat_shift':\n \"unat (((of_nat n)::machine_word) * 2^(gbits + objBitsKO ko)) =\n n * 2^(gbits + objBitsKO ko)\"\n apply (subst mult.commute)\n apply (simp add:shiftl_t2n[symmetric])\n apply (rule range_cover.unat_of_nat_n_shift[OF cover])\n using obj_bits_api\n apply simp\n done\n have unat_of_nat_n':\n \"unat (((of_nat n)::machine_word) * 2 ^ (gbits + objBitsKO ko)) \\ 0\"\n by (simp add:unat_of_nat_shift' not_zero)\n have bound:\"obj_bits_api (APIType_map2 ty) us \\ sz\"\n using cover\n by (simp add:range_cover_def)\n have n_estimate: \"n < 2 ^ (word_bits - (objBitsKO ko + gbits))\"\n apply (rule le_less_trans)\n apply (rule range_cover.range_cover_n_le(2)[OF cover])\n apply (rule power_strict_increasing)\n apply (simp add:obj_bits_api ko)\n apply (rule diff_less_mono)\n using cover obj_bits_api\n apply (simp_all add:range_cover_def ko word_bits_def)\n done\n\n have set_retype_addrs_fold:\n \"image (\\n. ptr + 2 ^ obj_bits_api (APIType_map2 ty) us * n)\n {x. x \\ of_nat n - 1} =\n set (retype_addrs ptr (APIType_map2 ty) n us)\"\n apply (clarsimp simp: retype_addrs_def image_def Bex_def ptr_add_def\n Collect_eq)\n apply (rule iffI)\n apply (clarsimp simp: field_simps word_le_nat_alt)\n apply (rule_tac x=\"unat x\" in exI)\n apply (simp add: unat_sub_if_size range_cover.unat_of_nat_n[OF cover]\n not_le not_zero\n split: if_split_asm)\n apply (clarsimp simp: field_simps word_le_nat_alt)\n apply (rule_tac x=\"of_nat x\" in exI)\n apply (simp add: unat_sub_if_size range_cover.unat_of_nat_n[OF cover])\n apply (rule nat_le_Suc_less_imp)\n apply (metis le_unat_uoi nat_less_le not_le_imp_less)\n done\n\n have new_caps_adds_fold:\n \"map (\\n. ptr + 2 ^ objBitsKO ko * n) [0.e.2 ^ gbits * of_nat n - 1] =\n new_cap_addrs (2 ^ gbits * n) ptr ko\"\n apply (simp add: new_cap_addrs_def shiftl_t2n)\n apply (subgoal_tac \"1 \\ (2::machine_word) ^ gbits * of_nat n\")\n apply (simp add: upto_enum_red' o_def)\n apply (rule arg_cong2[where f=map, OF refl])\n apply (rule arg_cong2[where f=upt, OF refl])\n apply (metis mult.commute shiftl_t2n unat_of_nat_shift)\n using shiftr_not_zero\n apply (simp add: shiftl_t2n)\n apply (metis word_less_1 word_not_le)\n done\n\n from aligned\n have al': \"is_aligned ptr (obj_bits_api (APIType_map2 ty) us)\"\n by (simp add: obj_bits_api ko)\n show ?thesis\n apply (simp add: when_def retype_region2_def createObjects'_def\n createObjects_def aligned obj_bits_api[symmetric]\n ko[symmetric] al' shiftl_t2n data_map_insert_def[symmetric]\n is_aligned_mask[symmetric] split_def unless_def\n lookupAround2_pspace_no check\n split del: if_split)\n apply (subst retype_addrs_fold)+\n apply (subst if_P)\n using ko\n apply (clarsimp simp: makeObjectKO_def)\n apply (simp add: bind_assoc retype_region2_ext_def)\n apply (rule corres_guard_imp)\n apply (subst modify_ekheap_update_ekheap)\n apply (simp only: bind_assoc)\n apply (rule kheap_ekheap_double_gets)\n apply (rule corres_symb_exec_r)\n apply (simp add: not_less modify_modify bind_assoc[symmetric]\n obj_bits_api[symmetric] shiftl_t2n upto_enum_red'\n range_cover.unat_of_nat_n[OF cover])\n apply (rule corres_split_nor[OF _ corres_trivial])\n apply (rename_tac x eps ps)\n apply (rule_tac P=\"\\s. x = kheap s \\ eps = ekheap (s) \\ ?P s\" and\n P'=\"\\s. ps = ksPSpace s \\ ?P' s\" in corres_modify)\n apply (simp add: set_retype_addrs_fold new_caps_adds_fold)\n apply (erule retype_state_relation[OF _ _ _ _ _ _ _ _ _ cover _ _ orr],\n simp_all add: ko not_zero obj_bits_api\n bound[simplified obj_bits_api ko])[1]\n apply (clarsimp simp: retype_addrs_fold[symmetric] ptr_add_def upto_enum_red' not_zero'\n range_cover.unat_of_nat_n[OF cover] word_le_sub1\n simp del: word_of_nat_eq_0_iff)\n apply (rule_tac f=g in arg_cong)\n apply clarsimp\n apply wp+\n apply (clarsimp split: option.splits)\n apply (intro conjI impI)\n apply (clarsimp|wp)+\n apply (clarsimp split: option.splits)\n apply wpsimp\n apply (clarsimp split: option.splits)\n apply (intro conjI impI)\n apply wp\n apply (clarsimp simp:lookupAround2_char1)\n apply wp\n apply (clarsimp simp: obj_bits_api ko)\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (rule_tac x1 = a in ccontr[OF in_empty_interE])\n apply simp\n apply (clarsimp simp: not_less shiftL_nat)\n apply (erule order_trans)\n apply (subst p_assoc_help)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n using cover\n apply -\n apply (rule iffD2[OF word_le_nat_alt])\n apply (subst word_of_nat_minus)\n using not_zero\n apply simp\n apply (rule le_trans[OF unat_plus_gt])\n apply simp\n apply (subst unat_minus_one)\n apply (subst mult.commute)\n apply (rule word_power_nonzero_64)\n apply (rule of_nat_less_pow_64[OF n_estimate])\n apply (simp add:word_bits_def objBitsKO_gt_0 ko)\n apply (simp add:range_cover_def obj_bits_api ko word_bits_def)\n apply (cut_tac not_zero',clarsimp simp:ko)\n apply(clarsimp simp:field_simps ko)\n apply (subst unat_sub[OF word_1_le_power])\n apply (simp add:range_cover_def)\n apply (subst diff_add_assoc[symmetric])\n apply (cut_tac unat_of_nat_n',simp add:ko)\n apply (clarsimp simp: obj_bits_api ko)\n apply (rule diff_le_mono)\n apply (frule range_cover.range_cover_compare_bound)\n apply (cut_tac obj_bits_api unat_of_nat_shift')\n apply (clarsimp simp:add.commute range_cover_def ko)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask,OF le_refl ])\n apply (simp add:range_cover_def domI)+\n done\nqed\n\nlemma createObjects_corres':\n \"\\corres r P P' f (createObjects a b ko d); ko = injectKO val\\\n \\ corres dc P P' f (createObjects' a b ko d)\"\n apply (clarsimp simp:corres_underlying_def createObjects_def return_def)\n apply (rule conjI)\n apply (clarsimp simp:bind_def split_def)\n apply (drule(1) bspec)\n apply (clarsimp simp:image_def)\n apply (drule(1) bspec)\n apply clarsimp\n apply (erule bexI[rotated])\n apply simp\n apply (clarsimp simp:bind_def split_def image_def)\n apply (drule(1) bspec|clarsimp)+\n done\n\nlemmas retype_aligned_distinct'' = retype_aligned_distinct'\n [unfolded foldr_upd_app_if[folded data_map_insert_def]]\n\nlemma retype_ko_wp_at':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"ko_wp_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (if p \\ set (new_cap_addrs n ptr obj) then P obj\n else ko_wp_at' P p s)\"\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (rule foldr_update_ko_wp_at' [OF vs])\n apply (simp add: retype_aligned_distinct'' [OF vs pn cover])+\n apply (rule new_cap_addrs_aligned)\n using cover\n apply (simp add:range_cover_def cover)\n done\n\nlemma retype_obj_at':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"obj_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (if p \\ set (new_cap_addrs n ptr obj) then (\\ko. projectKO_opt obj = Some ko \\ P ko)\n else obj_at' P p s)\"\n unfolding obj_at'_real_def\n apply (rule retype_ko_wp_at'[OF vs pn cover])\ndone\n\nlemma retype_obj_at_disj':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"obj_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (obj_at' P p s \\ p \\ set (new_cap_addrs n ptr obj)\n \\ (\\ko. projectKO_opt obj = Some ko \\ P ko))\"\n apply (simp add: retype_obj_at' [OF vs pn cover])\n apply (safe, simp_all)\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover]])\n apply (insert pspace_no_overlap_disjoint' [OF vs(1) pn ])\n apply (clarsimp simp: obj_at'_def)\n apply (rule_tac x1 = p in ccontr[OF in_empty_interE])\n apply (simp add:ptr_add_def p_assoc_help domI)+\n done\n\ndeclare word_unat_power[symmetric,simp]\n\nlemma createObjects_ko_at_strg:\n fixes ptr :: machine_word\n assumes cover: \"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n assumes not_0: \"n\\ 0\"\n assumes pi: \"projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n ko gbits\n \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits. ko_at' val (x + (offs << objBitsKO ko)) s\\\"\nproof -\n have shiftr_not_zero:\" 1 \\ ((of_nat n)::machine_word) << gbits\"\n using range_cover_not_zero_shift[OF not_0 cover,where gbits = gbits]\n apply -\n apply (simp add:word_le_sub1)\n done\n note unat_of_nat_shiftl = range_cover.unat_of_nat_n_shift[OF cover,where gbits = gbits,simplified]\n note word_of_nat_eq_0_iff[simp del]\n have in_new:\"\\idx offs. \\idx \\ of_nat n - 1;offs<2 ^ gbits\\\n \\ ptr + (idx << objBitsKO ko + gbits) + (offs << objBitsKO ko)\n \\ set (new_cap_addrs (n * 2 ^ gbits) ptr ko)\"\n apply (insert range_cover_not_zero[OF not_0 cover] not_0)\n apply (clarsimp simp:new_cap_addrs_def image_def)\n apply (rule_tac x =\"unat (2 ^ gbits * idx + offs)\" in bexI)\n apply (subst add.commute)\n apply (simp add:shiftl_shiftl[symmetric])\n apply (simp add:shiftl_t2n distrib_left[symmetric])\n apply simp\n apply (rule unat_less_helper)\n apply (rule less_le_trans)\n apply (erule word_plus_strict_mono_right)\n apply (subst distrib_left[where c = \"1 :: machine_word\",symmetric,simplified])\n apply (subst mult.commute[where a = \"2^gbits\"])+\n apply (insert cover)\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (simp add:p2_gt_0)\n apply (clarsimp simp:range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (rule range_cover.range_cover_le_n_less)\n apply simp\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper)\n apply (erule order_trans[OF _ word_sub_1_le])\n apply (simp add:range_cover_not_zero[OF not_0 cover])\n apply (simp add:word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (erule less_le_trans[OF range_cover.range_cover_le_n_less(1)])\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper[OF inc_le])\n apply (simp add:word_leq_minus_one_le)\n apply (simp add:word_bits_def)\n apply (rule no_plus_overflow_neg)\n apply (rule less_le_trans[where y = \"of_nat n\"])\n apply unat_arith\n using range_cover.range_cover_n_less[OF cover]\n apply (simp add:word_bits_def)\n apply (subst distrib_left[where c = \"1 :: machine_word\",symmetric,simplified])\n apply (subst mult.commute)\n apply simp\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (simp add:p2_gt_0)\n apply (simp add:range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (rule range_cover.range_cover_le_n_less)\n apply simp\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper)\n apply unat_arith\n apply (simp add:word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (erule range_cover.range_cover_le_n_less)\n apply (simp add:range_cover.unat_of_nat_n[OF cover])\n apply (simp add: unat_le_helper)\n apply (simp add:word_bits_def)\n apply unat_arith\n done\n show ?thesis\n apply (simp add: split_def createObjects_def lookupAround2_pspace_no\n alignError_def unless_def createObjects'_def)\n apply (rule hoare_pre)\n apply (wp|simp add:data_map_insert_def[symmetric]\n cong: if_cong del: fun_upd_apply data_map_insert_def)+\n apply (wpc|wp|clarsimp simp del:fun_upd_apply)+\n apply (subst new_cap_addrs_fold'[OF shiftr_not_zero])+\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_obj_at_disj')\n apply (simp add:valid_pspace'_def unat_of_nat_shiftl)+\n apply (rule range_cover_rel[OF cover])\n apply simp+\n apply (subst retype_obj_at_disj')\n apply (simp add:valid_pspace'_def unat_of_nat_shiftl)+\n apply (rule range_cover_rel[OF cover])\n apply simp+\n using range_cover.unat_of_nat_n_shift[OF cover,where gbits = gbits,simplified] pi\n apply (simp add: in_new)\n done\nqed\n\nlemma createObjects_ko_at:\n fixes ptr :: machine_word\n assumes cover: \"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n assumes not_0: \"n\\ 0\"\n assumes pi: \"projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n ko gbits\n \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits. ko_at' val (x + (offs << objBitsKO ko)) s\\\"\n by (wp createObjects_ko_at_strg[OF cover not_0 pi],fastforce)\n\nlemma createObjects_obj_at:\n fixes ptr :: machine_word and val :: \"'a :: pspace_storable\"\n assumes cover:\"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n and not_0:\"n \\ 0\"\n and pi: \"\\(val::'a). projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n ko gbits \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits.\n obj_at' (\\(x::'a). True) (x + (offs << objBitsKO ko)) s\\\"\n apply (rule exE[OF pi])\n apply (erule_tac val1 = x in\n hoare_post_imp [OF _ createObjects_ko_at [OF cover not_0 ],rotated])\n apply (intro allI ballI impI)\n apply (drule(1) bspec)\n apply (drule spec, drule(1) mp)\n apply (clarsimp elim!: obj_at'_weakenE)\n done\n\n(* until we figure out what we really need of page\n mappings it's just alignment, which, fortunately,\n is trivial *)\nlemma createObjects_aligned:\n assumes al: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and bound :\"n < 2 ^ word_bits\" \"n\\0\"\n and bound':\"objBitsKO ko + gbits < word_bits\"\n shows \"\\\\\\ createObjects ptr n ko gbits\n \\\\rv s. \\x \\ set rv. is_aligned x (objBitsKO ko + gbits)\\\"\n apply (rule hoare_strengthen_post)\n apply (rule createObjects_ret[OF bound])\n apply (clarsimp dest!: less_two_pow_divD)\n apply (rule is_aligned_ptr_add_helper[OF al])\n apply (simp_all add:bound')\n done\n\nlemma createObjects_aligned2:\n \"\\\\s. is_aligned ptr (objBitsKO ko + gbits) \\ n < 2 ^ word_bits \\ n \\ 0\n \\ aln < word_bits\n \\ aln = objBitsKO ko + gbits\\\n createObjects ptr n ko gbits\n \\\\rv s. \\x \\ set rv. is_aligned x aln\\\"\n apply (rule hoare_name_pre_state)\n apply simp\n apply (rule hoare_pre, wp createObjects_aligned, simp_all)\n done\n\nlemma range_cover_n_wb:\n \"range_cover (ptr :: obj_ref) sz us n \\ n < 2 ^ word_bits\"\n apply (rule order_le_less_trans, erule range_cover.range_cover_n_le(2))\n apply (clarsimp simp: range_cover_def)\n apply (simp add: word_bits_def)\n done\n\nlemma createObjects_nonzero:\n assumes not_0: \"n \\ 0\"\n assumes cover:\"range_cover ptr sz ((objBitsKO ko) + bits) n\"\n shows \"\\\\s. ptr \\ 0\\\n createObjects ptr n ko bits\n \\\\rv s. \\p \\ set rv. p \\ 0\\\"\n apply (insert not_0)\n apply (rule hoare_pre)\n apply (rule hoare_gen_asm [where P = \"ptr \\ 0\"])\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (erule is_aligned_get_word_bits,simp_all)\n apply (rule hoare_post_imp [OF _ createObjects_ret])\n apply (simp add: ptr_add_def)\n apply (intro allI impI ballI)\n apply (simp add:power_add[symmetric] mult.assoc)\n apply (drule(1) range_cover_no_0[OF _ cover])\n apply (simp add: objBits_def)\n apply (simp add: range_cover_n_wb[OF cover])\n apply simp\n done\n\nlemma objBits_if_dev:\n \"objBitsKO (if dev then KOUserDataDevice else KOUserData) = pageBits\"\n by (simp add: objBitsKO_def)\n\nlemma cwo_ret:\n assumes not_0: \"n \\ 0\"\n assumes cover: \"range_cover ptr sz (pageBits + bs) n\"\n assumes sz: \"bs = pageBitsForSize vmsz - pageBits\"\n shows \"\\pspace_no_overlap' ptr sz and valid_pspace'\\\n createObjects ptr n (if dev then KOUserDataDevice else KOUserData) bs\n \\\\rv s. \\x\\set rv. frame_at' x vmsz dev s\\\"\nproof -\n note create_objs_device = hoare_post_imp [OF _ hoare_conj [OF createObjects_ret\n createObjects_ko_at[where val = UserDataDevice,simplified]]]\n\n note create_objs_normal = hoare_post_imp [OF _ hoare_conj [OF createObjects_ret\n createObjects_ko_at[where val = UserData,simplified]]]\n\n show ?thesis\n unfolding frame_at'_def\n apply (cases dev)\n apply (rule hoare_pre)\n apply (rule create_objs_device)\n apply (clarsimp simp add: sz pageBits_def)\n apply (drule bspec, simp, drule spec, drule(1) mp)\n apply (simp add: typ_at'_def obj_at'_real_def objBits_simps pageBits_def shiftl_t2n field_simps)\n apply (erule ko_wp_at'_weakenE)\n apply (clarsimp simp add: projectKO_opts_defs split: kernel_object.splits)\n apply (rule le_less_trans[OF _ power_strict_increasing])\n apply (rule range_cover.range_cover_n_le(1)[OF cover])\n apply (simp add: word_bits_def pageBits_def not_0)+\n apply (rule range_cover_rel[OF cover])\n apply (simp add: objBitsKO_def pageBits_def not_0)+\n using not_0\n apply simp_all\n apply (rule hoare_pre)\n apply (rule create_objs_normal)\n apply (clarsimp simp add: sz pageBits_def)\n apply (drule bspec, simp, drule spec, drule(1) mp)\n apply (simp add: typ_at'_def obj_at'_real_def objBits_simps pageBits_def shiftl_t2n field_simps)\n apply (erule ko_wp_at'_weakenE)\n apply (clarsimp simp add: projectKO_opts_defs split: kernel_object.splits)\n apply (rule le_less_trans[OF _ power_strict_increasing])\n apply (rule range_cover.range_cover_n_le(1)[OF cover])\n apply (simp add: word_bits_def pageBits_def not_0)+\n apply (rule range_cover_rel[OF cover])\n apply (simp add: objBitsKO_def pageBits_def not_0)+\n done\nqed\n\nlemmas capFreeIndex_update_valid_untyped' =\n capFreeIndex_update_valid_cap'[unfolded valid_cap'_def,simplified,THEN conjunct2,THEN conjunct1]\n\nlemma createNewCaps_valid_cap:\n fixes ptr :: machine_word\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n \"\n assumes not_0: \"n \\ 0\"\n assumes ct: \"ty = APIObjectType ArchTypes_H.CapTableObject \\ 0 < us\"\n \"ty = APIObjectType apiobject_type.Untyped \\ minUntypedSizeBits \\ us \\ us \\ maxUntypedSizeBits\"\n assumes ptr: \"ptr \\ 0\"\n\n assumes ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n assumes ptr_km: \"ptr && ~~ mask sz \\ kernel_mappings\"\n assumes sz_constrained: \"sz \\ maxUntypedSizeBits\"\n\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createNewCaps ty ptr n us dev\n \\\\r s. (\\cap \\ set r. s \\' cap)\\\"\nproof -\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex\n note if_split_def[split del] = if_split\n note createObjects_nonzero' = createObjects_nonzero[OF not_0]\n note cwo_ret' = cwo_ret[OF not_0]\n show ?thesis\n proof(cases \"Types_H.toAPIType ty\")\n case None thus ?thesis\n using not_0\n apply (clarsimp simp: createNewCaps_def Arch_createNewCaps_def)\n using cover\n apply (simp add: range_cover_def)\n using cover\n apply (clarsimp simp: RISCV64_H.toAPIType_def APIType_capBits_def\n split: RISCV64_H.object_type.splits)\n apply (in_case \"HugePageObject\")\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero'\n cwo_ret'[where bs=\"ptTranslationBits + ptTranslationBits\", simplified]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n apply (in_case \"SmallPageObject\")\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero'\n cwo_ret'[where bs=0, simplified]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n apply (in_case \\LargePageObject\\)\n\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero'\n cwo_ret'[where bs=ptTranslationBits, simplified]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n apply (in_case \\PageTableObject\\)\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits)\n apply (rule hoare_chain)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_aligned[OF _ range_cover.range_cover_n_less(1)\n [where 'a=64, unfolded word_bits_len_of, OF cover]\n not_0];\n simp add: objBits_simps bit_simps word_bits_def)\n apply (rule createObjects_obj_at[where 'a=pte, OF _ not_0];\n simp add: objBits_simps bit_simps)\n apply simp\n apply (clarsimp simp: objBits_simps bit_simps page_table_at'_def typ_at_to_obj_at_arches)\n apply (drule (1) bspec)+\n apply (erule_tac x=\"ucast i\" in allE)\n apply (erule impE)\n apply (rule ucast_less[where 'b=\"pt_index_len\" and 'a=\"machine_word_len\", simplified])\n apply simp\n apply clarsimp\n done\n next\n case (Some a) thus ?thesis\n proof(cases a)\n case Untyped with Some cover ct show ?thesis\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: RISCV64_H.toAPIType_def fromIntegral_def\n toInteger_nat fromInteger_nat APIType_capBits_def\n split: RISCV64_H.object_type.splits)\n apply wp\n apply (intro ballI)\n apply (clarsimp simp: image_def upto_enum_red' valid_cap'_def capAligned_def\n split: capability.splits)\n apply (drule word_leq_minus_one_le[rotated])\n apply (rule range_cover_not_zero[OF not_0 cover])\n apply (intro conjI)\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (fastforce simp:range_cover_def word_bits_def)+\n apply (clarsimp simp:valid_untyped'_def ko_wp_at'_def obj_range'_def)\n apply (drule(1) pspace_no_overlapD'[rotated])\n apply (frule(1) range_cover_cell_subset)\n apply (erule disjE)\n apply (simp add: mask_def add_diff_eq)\n apply (drule psubset_imp_subset)\n apply (drule(1) disjoint_subset2[rotated])\n apply (drule(1) disjoint_subset)\n apply (drule(1) range_cover_subset_not_empty)\n apply clarsimp+\n apply (simp add: mask_def add_diff_eq)\n apply blast\n apply (drule(1) range_cover_no_0[OF ptr _ unat_less_helper])\n apply simp\n apply (drule (1) range_cover_in_kernel_mappings[OF _ unat_less_helper ptr_km sz_constrained])\n apply simp\n done\n next\n case TCBObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: RISCV64_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def curDomain_def\n split: RISCV64_H.object_type.splits)\n apply (wp mapM_x_wp' hoare_vcg_const_Ball_lift)+\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a = \"tcb\",OF _ not_0])\n using cover\n apply (clarsimp simp: RISCV64_H.toAPIType_def APIType_capBits_def objBits_simps\n split: RISCV64_H.object_type.splits)\n apply simp\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_tcbI)\n done\n next\n case EndpointObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: RISCV64_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: RISCV64_H.object_type.splits)\n apply wp\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a=endpoint, OF _ not_0])\n using cover\n apply (clarsimp simp: RISCV64_H.toAPIType_def APIType_capBits_def objBits_simps\n split: RISCV64_H.object_type.splits)\n apply (simp)\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_epI)\n done\n next\n case NotificationObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: RISCV64_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: RISCV64_H.object_type.splits)\n apply wp\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a=\"notification\", OF _ not_0])\n using cover\n apply (clarsimp simp: RISCV64_H.toAPIType_def APIType_capBits_def objBits_simps\n split: RISCV64_H.object_type.splits)\n apply (simp)\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_ntfnI)\n done\n next\n case CapTableObject with Some cover ct show ?thesis\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: RISCV64_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: RISCV64_H.object_type.splits)\n apply wp\n apply (clarsimp simp: RISCV64_H.toAPIType_def APIType_capBits_def objBits_simps\n split: RISCV64_H.object_type.split object_type.splits)\n apply (rule hoare_strengthen_post)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_aligned [OF _ _ not_0 ])\n apply ((clarsimp simp:objBits_simps range_cover_def range_cover.range_cover_n_less[where 'a=64, unfolded word_bits_len_of, OF cover])+)[3]\n apply (simp add: word_bits_def)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_ret [OF range_cover.range_cover_n_less(1)[where 'a=64, unfolded word_bits_len_of, OF cover] not_0])\n apply (rule createObjects_obj_at [where 'a=cte, OF _ not_0])\n apply (simp add: objBits_simps APIType_capBits_def)\n apply (simp)\n apply simp\n apply (clarsimp simp: valid_cap'_def capAligned_def objBits_simps\n dest!: less_two_pow_divD)\n apply (thin_tac \"\\x\\S. is_aligned (p x) n\" for S p n)\n apply (intro conjI)\n apply ((simp add:range_cover_def word_bits_def)+)[2]\n apply (clarsimp simp: power_sub)\n apply (drule bspec, simp)\n apply (drule_tac x = \"addr && mask us\" in spec)\n apply (drule mp)\n apply simp\n apply (rule and_mask_less')\n apply (simp add: range_cover_def word_bits_def)\n apply (clarsimp simp add: shiftl_t2n)\n apply simp\n done\n qed\n qed\nqed\n\nlemma other_objs_default_relation:\n \"\\ case ty of Structures_A.EndpointObject \\ ko = injectKO (makeObject :: endpoint)\n | Structures_A.NotificationObject \\ ko = injectKO (makeObject :: Structures_H.notification)\n | Structures_A.TCBObject \\ ko = injectKO (makeObject :: tcb)\n | _ \\ False \\ \\\n obj_relation_retype (default_object ty dev n) ko\"\n apply (rule obj_relation_retype_other_obj)\n apply (clarsimp simp: default_object_def\n is_other_obj_relation_type_def\n split: Structures_A.apiobject_type.split_asm)\n apply (clarsimp simp: other_obj_relation_def default_object_def\n ep_relation_def ntfn_relation_def\n tcb_relation_def default_tcb_def makeObject_tcb\n makeObject_cte new_context_def newContext_def\n default_ep_def makeObject_endpoint default_notification_def\n makeObject_notification default_ntfn_def\n fault_rel_optionation_def\n initContext_def\n arch_tcb_context_get_def atcbContextGet_def\n default_arch_tcb_def newArchTCB_def\n arch_tcb_relation_def\n split: Structures_A.apiobject_type.split_asm)\n done\n\nlemma captable_relation_retype:\n \"n < word_bits \\\n obj_relation_retype (default_object Structures_A.CapTableObject dev n) (KOCTE makeObject)\"\n apply (clarsimp simp: obj_relation_retype_def default_object_def\n wf_empty_bits objBits_simps'\n dom_empty_cnode ex_with_length cte_level_bits_def)\n apply (rule conjI)\n defer\n apply (clarsimp simp: cte_relation_def empty_cnode_def makeObject_cte)\n apply (rule set_eqI, rule iffI)\n apply (clarsimp simp: cte_map_def')\n apply (rule_tac x=\"of_bl y\" in exI)\n apply (simp add: of_bl_length[where 'a=64, folded word_bits_def])\n apply (clarsimp simp: image_def cte_map_def')\n apply (rule_tac x=\"drop (word_bits - n) (to_bl xa)\" in exI)\n apply (simp add: of_drop_to_bl word_bits_def word_size)\n apply (simp add: less_mask_eq)\n done\n\nlemma pagetable_relation_retype:\n \"obj_relation_retype (default_object (ArchObject PageTableObj) dev n)\n (KOArch (KOPTE makeObject))\"\n apply (simp add: default_object_def default_arch_object_def\n makeObject_pte obj_relation_retype_def\n objBits_simps pte_relation_def)\n apply (clarsimp simp: range_composition[symmetric]\n shiftl_t2n field_simps)\n apply (subst image_comp [symmetric, where g=ucast, unfolded o_def])\n apply (simp add: ucast_range_less)\n apply (fastforce simp: bit_simps)\n done\n\nlemmas makeObjectKO_simps = makeObjectKO_def[split_simps RISCV64_H.object_type.split\n apiobject_type.split sum.split kernel_object.split ]\n\nlemma corres_retype:\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us = objBitsKO ko + gbits\"\n and tp: \"APIType_map2 ty \\ no_gs_types\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n shows \"corres (=)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s\n \\ (\\val. ko = injectKO val))\n (retype_region2 ptr n us (APIType_map2 ty) dev) (createObjects ptr n ko gbits)\"\n apply (rule corres_guard_imp)\n apply (rule_tac F = \"(\\val. ko = injectKO val)\" in corres_gen_asm2)\n apply (erule exE)\n apply (rule corres_rel_imp)\n apply (rule corres_retype'[where g=id and ty=ty and sz = sz,OF not_zero aligned _ _ _ ko\n ,simplified update_gs_id[OF tp] modify_id_return,simplified])\n using assms\n apply (simp_all add: objBits_def no_gs_types_def)\n apply auto\n done\n\nlemma init_arch_objects_APIType_map2:\n \"init_arch_objects (APIType_map2 (Inr ty)) ptr bits sz refs =\n (case ty of APIObjectType _ \\ return ()\n | _ \\ init_arch_objects (APIType_map2 (Inr ty)) ptr bits sz refs)\"\n apply (clarsimp split: RISCV64_H.object_type.split)\n apply (simp add: init_arch_objects_def APIType_map2_def\n split: apiobject_type.split)\n done\n\n(* FIXME: move *)\nlemma copyGlobalMappings_cte_wp_at[wp]:\n \"\\\\s. P (cte_wp_at' P' p s)\\\n copyGlobalMappings pd\n \\\\rv s. P (cte_wp_at' P' p s)\\\"\n apply (simp add: copyGlobalMappings_def)\n apply (wp mapM_x_wp')\n done\n\ncrunch ct[wp]: copyGlobalMappings \"\\s. P (ksCurThread s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\ncrunch ksCurDomain[wp]: copyGlobalMappings \"\\s. P (ksCurDomain s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\nlemmas copyGlobalMappings_ctes_of[wp]\n = ctes_of_from_cte_wp_at[where Q=\"\\\", simplified,\n OF copyGlobalMappings_cte_wp_at]\n\nlemmas object_splits =\n apiobject_type.split_asm\n RISCV64_H.object_type.split_asm\n sum.split_asm kernel_object.split_asm\n arch_kernel_object.split_asm\n\ndeclare hoare_in_monad_post[wp del]\ndeclare univ_get_wp[wp del]\ndeclare result_in_set_wp[wp del]\n\ncrunch valid_arch_state'[wp]: copyGlobalMappings \"valid_arch_state'\"\n (wp: crunch_wps)\n\nlemma nullPointer_0_simp[simp]:\n \"(nullPointer = 0) = True\"\n by (simp add: nullPointer_def)\n\nlemma descendants_of_retype':\n assumes P: \"\\p. P p \\ m p = None\"\n shows \"descendants_of' p (\\p. if P p then Some makeObject else m p) =\n descendants_of' p m\"\n apply (rule set_eqI)\n apply (simp add: descendants_of'_def)\n apply (rule iffI)\n apply (erule subtree.induct)\n apply (rule direct_parent)\n apply (clarsimp simp: mdb_next_unfold makeObject_cte split: if_split_asm)\n apply assumption\n apply (clarsimp simp: parentOf_def makeObject_cte split: if_split_asm)\n apply (erule trans_parent)\n apply (clarsimp simp: mdb_next_unfold makeObject_cte split: if_split_asm)\n apply assumption\n apply (clarsimp simp: parentOf_def makeObject_cte split: if_split_asm)\n apply (erule subtree.induct)\n apply (rule direct_parent)\n apply (clarsimp simp: mdb_next_unfold dest!: P)\n apply assumption\n apply (fastforce simp: parentOf_def dest!: P)\n apply (erule trans_parent)\n apply (clarsimp simp: mdb_next_unfold dest!: P)\n apply assumption\n apply (fastforce simp: parentOf_def dest!: P)\n done\n\nlemma capRange_Null [simp]: \"capRange NullCap = {}\"\n by (simp add: capRange_def)\n\nend\n\nlocale retype_mdb = vmdb +\n fixes P n\n assumes P: \"\\p. P p \\ m p = None\"\n assumes 0: \"\\P 0\"\n defines \"n \\ \\p. if P p then Some makeObject else m p\"\nbegin\n\ninterpretation Arch . (*FIXME: arch_split*)\n\nlemma no_0_n: \"no_0 n\"\n using no_0 by (simp add: no_0_def n_def 0)\n\nlemma n_next:\n \"n \\ c \\ c' = (if P c then c' = 0 else m \\ c \\ c')\"\n by (simp add: mdb_next_unfold n_def makeObject_cte nullPointer_def)\n\nlemma n_prev:\n \"n \\ c \\ c' = (if P c' then c = 0 else m \\ c \\ c')\"\n by (simp add: mdb_prev_def n_def makeObject_cte nullPointer_def)\n\nlemma dlist_n: \"valid_dlist n\"\n using dlist no_0 no_0_n\n apply (simp add: valid_dlist_def2)\n apply (clarsimp simp: n_prev n_next)\n apply (rule conjI)\n apply clarsimp\n apply (erule allE, erule (1) impE)\n apply (erule_tac x=c' in allE)\n apply simp\n apply (drule P)\n apply (simp add: mdb_next_unfold)\n apply clarsimp\n apply (erule allE, erule (1) impE)\n apply (erule_tac x=c' in allE)\n apply simp\n apply (drule P)\n apply (simp add: mdb_prev_def)\n done\n\nlemma n_next_trancl:\n \"n \\ c \\\\<^sup>+ c' \\ (if P c then c' = 0 else m \\ c \\\\<^sup>+ c')\"\n apply (insert no_0_n chain)\n apply (erule trancl_induct)\n apply (fastforce simp: n_next)\n apply (simp split: if_split_asm)\n apply (clarsimp simp: mdb_next_unfold)\n apply (simp add: n_next split: if_split_asm)\n apply (simp add: mdb_chain_0_def)\n apply (drule_tac x=c in bspec)\n apply (drule tranclD)\n apply (clarsimp simp: mdb_next_unfold)\n apply assumption\n done\n\nlemma next_not_P:\n \"m \\ c \\ c' \\ \\P c\"\n by (clarsimp simp: mdb_next_unfold dest!: P)\n\nlemma m_next_trancl:\n \"m \\ c \\\\<^sup>+ c' \\ n \\ c \\\\<^sup>+ c'\"\n apply (erule trancl_induct)\n apply (rule r_into_trancl)\n apply (clarsimp simp: n_next)\n apply (drule next_not_P)\n apply simp\n apply (erule trancl_trans)\n apply (rule r_into_trancl)\n apply (clarsimp simp: n_next)\n apply (drule next_not_P)\n apply simp\n done\n\nlemma P_to_0:\n \"P c \\ n \\ c \\\\<^sup>+ 0\"\n by (rule r_into_trancl) (simp add: n_next)\n\nlemma n_trancl_eq:\n \"n \\ c \\\\<^sup>+ c' = (if P c then c' = 0 else m \\ c \\\\<^sup>+ c')\"\n by (auto dest: m_next_trancl n_next_trancl P_to_0)\n\nlemma n_rtrancl_eq:\n \"n \\ c \\\\<^sup>* c' = (if P c then c' = 0 \\ c = c' else m \\ c \\\\<^sup>* c')\"\n by (auto simp: n_trancl_eq rtrancl_eq_or_trancl)\n\nlemma dom_n:\n \"dom n = dom m \\ Collect P\"\n by (auto simp add: n_def)\n\nlemma mdb_chain_0_n: \"mdb_chain_0 n\"\n using chain\n by (auto simp: mdb_chain_0_def dom_n n_trancl_eq)\n\nlemma n_Some_eq:\n \"(n p = Some (CTE cap node)) =\n (if P p then cap = NullCap \\ node = nullMDBNode\n else m p = Some (CTE cap node))\"\n by (auto simp: n_def makeObject_cte)\n\nlemma valid_badges_n: \"valid_badges n\"\nproof -\n from valid\n have \"valid_badges m\" ..\n thus ?thesis\n apply (clarsimp simp: valid_badges_def)\n apply (simp add: n_Some_eq n_next split: if_split_asm)\n apply fastforce\n done\nqed\n\nlemma caps_contained_n: \"caps_contained' n\"\nproof -\n from valid\n have \"caps_contained' m\" ..\n thus ?thesis\n apply (clarsimp simp: caps_contained'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply fastforce\n done\nqed\n\nlemma mdb_chunked_n: \"mdb_chunked n\"\nproof -\n from valid\n have \"mdb_chunked m\" ..\n thus ?thesis\n apply (clarsimp simp: mdb_chunked_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply (simp add: n_Some_eq n_trancl_eq n_rtrancl_eq is_chunk_def)\n apply fastforce\n done\nqed\n\nlemma descendants [simp]:\n \"descendants_of' p n = descendants_of' p m\"\n apply (unfold n_def)\n apply (subst descendants_of_retype')\n apply (erule P)\n apply (rule refl)\n done\n\nlemma untyped_mdb_n: \"untyped_mdb' n\"\nproof -\n from valid\n have \"untyped_mdb' m\" ..\n thus ?thesis\n apply (clarsimp simp: untyped_mdb'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma untyped_inc_n: \"untyped_inc' n\"\nproof -\n from valid\n have \"untyped_inc' m\" ..\n thus ?thesis\n apply (clarsimp simp: untyped_inc'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply blast\n done\nqed\n\nlemma valid_nullcaps_n: \"valid_nullcaps n\"\nproof -\n from valid\n have \"valid_nullcaps m\" ..\n thus ?thesis\n apply (clarsimp simp: valid_nullcaps_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma ut_rev_n: \"ut_revocable' n\"\nproof -\n from valid\n have \"ut_revocable' m\" ..\n thus ?thesis\n apply (clarsimp simp: ut_revocable'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma class_links_m:\n \"class_links m\"\n using valid by (simp add: valid_mdb_ctes_def)\n\nlemma next_not_P2:\n \"\\ m \\ p \\ p'; p' \\ nullPointer \\ \\ \\ P p'\"\n using dlist\n apply (clarsimp simp: mdb_next_unfold)\n apply (erule(1) valid_dlistE)\n apply clarsimp\n apply (clarsimp dest!: P)\n done\n\nlemma class_links_n:\n \"class_links n\"\n using class_links_m\n apply (simp add: class_links_def)\n apply (elim allEI)\n apply clarsimp\n apply (subgoal_tac \"p' \\ nullPointer\")\n apply (simp add: n_next split: if_split_asm)\n apply (case_tac cte, case_tac cte')\n apply (clarsimp simp add: n_Some_eq split: if_split_asm)\n apply (drule(1) next_not_P2)\n apply simp\n apply (clarsimp simp: no_0_n nullPointer_def)\n done\n\nlemma irq_control_n:\n \"irq_control n\"\n apply (clarsimp simp add: irq_control_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply (frule irq_revocable, rule irq_control)\n apply clarsimp\n apply (erule (1) irq_controlD, rule irq_control)\n done\n\nlemma dist_z_m: \"distinct_zombies m\"\n using valid by auto\n\nlemma dist_z_n: \"distinct_zombies n\"\n using dist_z_m\n apply (simp add: n_def distinct_zombies_def\n distinct_zombie_caps_def\n split del: if_split)\n apply (erule allEI, erule allEI)\n apply (clarsimp split del: if_split)\n apply (clarsimp split: if_split_asm simp: makeObject_cte)\n apply (clarsimp simp: isCap_simps)\n done\n\nlemma reply_masters_rvk_fb_m: \"reply_masters_rvk_fb m\"\n using valid by auto\n\nlemma reply_masters_rvk_fb_n: \"reply_masters_rvk_fb n\"\n using reply_masters_rvk_fb_m\n by (simp add: n_def reply_masters_rvk_fb_def\n ball_ran_eq makeObject_cte isCap_simps)\n\nlemma valid_n:\n \"valid_mdb_ctes n\"\n by (simp add: valid_mdb_ctes_def dlist_n no_0_n mdb_chain_0_n\n valid_badges_n caps_contained_n untyped_mdb_n\n untyped_inc_n mdb_chunked_n valid_nullcaps_n ut_rev_n\n class_links_n irq_control_n dist_z_n\n reply_masters_rvk_fb_n)\n\nend\n\ndefinition\n caps_no_overlap'' :: \"machine_word \\ nat \\ kernel_state \\ bool\"\nwhere\n \"caps_no_overlap'' ptr sz s \\ \\cte \\ ran (ctes_of s).\n untypedRange (cteCap cte) \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ {}\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ untypedRange (cteCap cte)\"\n\nlemma obj_range'_subset:\n \"\\range_cover ptr sz (objBitsKO val) n; ptr' \\ set (new_cap_addrs n ptr val)\\\n \\ obj_range' ptr' val \\ {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n unfolding obj_range'_def\n by (rule new_range_subset, auto)\n\nlemma obj_range'_subset_strong:\n assumes \"range_cover ptr sz (objBitsKO val) n\"\n and \"ptr' \\ set (new_cap_addrs n ptr val)\"\n shows \"obj_range' ptr' val \\ {ptr..ptr + (of_nat n * 2 ^ objBitsKO val) - 1}\"\nproof -\n {\n assume cover: \"range_cover ptr sz (objBitsKO val) n\"\n and mem_p: \"ptr' \\ set (new_cap_addrs n ptr val)\"\n and not_0: \"n\\ 0\"\n note n_less = range_cover.range_cover_n_less[OF cover]\n have unat_of_nat_m1: \"unat (of_nat n - (1::machine_word)) < n\"\n using not_0 n_less by (simp add:unat_of_nat_minus_1)\n have decomp:\n \"of_nat n * 2 ^ objBitsKO val =\n of_nat (n - 1) * 2 ^ objBitsKO val + (2 :: machine_word) ^ objBitsKO val\"\n apply (simp add:distrib_right[where b = \"1 :: machine_word\",simplified,symmetric])\n using not_0 n_less\n apply simp\n done\n have \"ptr' + 2 ^ objBitsKO val - 1 \\ ptr + of_nat n * 2 ^ objBitsKO val - 1\"\n using cover\n apply (subst decomp)\n apply (simp add:add.assoc[symmetric])\n apply (simp add:p_assoc_help)\n apply (rule order_trans[OF word_plus_mono_left word_plus_mono_right])\n using mem_p not_0\n apply (clarsimp simp:new_cap_addrs_def shiftl_t2n)\n apply (rule word_plus_mono_right)\n apply (subst mult.commute)\n apply (rule word_mult_le_mono1[OF word_of_nat_le])\n using n_less not_0\n apply (simp add:unat_of_nat_minus_1)\n apply (rule p2_gt_0[THEN iffD2])\n apply (simp add:word_bits_def range_cover_def)\n apply (simp only: word_bits_def[symmetric])\n apply (clarsimp simp: unat_of_nat_minus_1[OF n_less(1) not_0])\n apply (rule nat_less_power_trans2\n [OF range_cover.range_cover_le_n_less(2),OF cover, folded word_bits_def])\n apply (simp add:unat_of_nat_m1 less_imp_le)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule machine_word_plus_mono_right_split[where sz = sz])\n using range_cover.range_cover_compare[OF cover,where p = \"unat (of_nat n - (1::machine_word))\"]\n apply (clarsimp simp:unat_of_nat_m1)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule olen_add_eqv[THEN iffD2])\n apply (subst add.commute[where a = \"2^objBitsKO val - 1\"])\n apply (subst p_assoc_help[symmetric])\n apply (rule is_aligned_no_overflow)\n apply (clarsimp simp:range_cover_def word_bits_def)\n apply (erule aligned_add_aligned[OF _ is_aligned_mult_triv2]; simp)\n apply simp\n by (meson assms(1) is_aligned_add is_aligned_mult_triv2 is_aligned_no_overflow' range_cover_def)\n }\n with assms show ?thesis\n unfolding obj_range'_def\n apply -\n apply (frule(1) obj_range'_subset)\n apply (simp add: obj_range'_def)\n apply (cases \"n = 0\"; clarsimp simp:new_cap_addrs_def mask_def field_simps)\n done\nqed\n\n\nlemma caps_no_overlapD'':\n \"\\cte_wp_at' (\\cap. cteCap cap = c) q s;caps_no_overlap'' ptr sz s\\\n \\ untypedRange c \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ {} \\\n {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ untypedRange c\"\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps caps_no_overlap''_def\n simp del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule_tac x = cte in bspec)\n apply fastforce\n apply (erule(1) impE)\n apply blast\ndone\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma valid_untyped'_helper:\n assumes valid : \"valid_cap' c s\"\n and cte_at : \"cte_wp_at' (\\cap. cteCap cap = c) q s\"\n and cover : \"range_cover ptr sz (objBitsKO val) n\"\n and range : \"caps_no_overlap'' ptr sz s\"\n and pres : \"isUntypedCap c \\ usableUntypedRange c \\ {ptr..ptr + of_nat n * 2 ^ objBitsKO val - 1} = {}\"\n shows \"\\pspace_aligned' s; pspace_distinct' s; pspace_no_overlap' ptr sz s\\\n \\ valid_cap' c (s\\ksPSpace := foldr (\\addr. data_map_insert addr val) (new_cap_addrs n ptr val) (ksPSpace s)\\)\"\n proof -\n note blah[simp del] = atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff\n assume pn : \"pspace_aligned' s\" \"pspace_distinct' s\"\n and no_overlap: \"pspace_no_overlap' ptr sz s\"\n show ?thesis\n using pn pres no_overlap valid cover cte_wp_at_ctes_of[THEN iffD1,OF cte_at]\n caps_no_overlapD''[OF cte_at range]\n apply (clarsimp simp:valid_cap'_def retype_ko_wp_at')\n apply (case_tac \"cteCap cte\";\n simp add: valid_cap'_def cte_wp_at_obj_cases' valid_pspace'_def retype_obj_at_disj'\n split: zombie_type.split_asm)\n apply (clarsimp simp: valid_arch_cap'_def valid_arch_cap_ref'_def retype_obj_at_disj'\n typ_at_to_obj_at_arches frame_at'_def page_table_at'_def\n split: if_split_asm arch_capability.splits)\n unfolding valid_untyped'_def\n apply (intro allI)\n apply (rule ccontr)\n apply clarify\n using cover[unfolded range_cover_def]\n apply (clarsimp simp:isCap_simps retype_ko_wp_at' split:if_split_asm)\n apply (thin_tac \"\\x. Q x\" for Q)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (elim disjE)\n apply (frule(1) obj_range'_subset)\n apply (erule impE)\n apply (drule(1) psubset_subset_trans)\n apply (drule Int_absorb1[OF psubset_imp_subset])\n apply (drule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (simp add:Int_ac add_mask_fold)\n apply (drule(1) subset_trans)\n apply (simp only: add_mask_fold)\n apply (frule(1) obj_range'_subset_strong)\n apply (drule(1) non_disjoing_subset)\n apply blast\n apply (thin_tac \"\\x. Q x\" for Q)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (frule(1) obj_range'_subset)\n apply (drule(1) subset_trans)\n apply (erule impE)\n apply (clarsimp simp: add_mask_fold)\n apply blast\n apply (simp only: add_mask_fold)\n apply blast\n done\nqed\n\ndefinition caps_overlap_reserved' :: \"machine_word set \\ kernel_state \\ bool\"\nwhere\n \"caps_overlap_reserved' S s \\ \\cte \\ ran (ctes_of s).\n (isUntypedCap (cteCap cte) \\ usableUntypedRange (cteCap cte) \\ S = {})\"\n\nlemma retype_canonical':\n assumes pc': \"pspace_canonical' s'\"\n and cover: \"range_cover ptr sz (objBitsKO ko) n\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n shows\n \"pspace_canonical' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n (is \"pspace_canonical' (s'\\ksPSpace := ?ps\\)\")\nproof -\n show \"pspace_canonical' (s'\\ksPSpace := ?ps\\)\" using assms\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (clarsimp simp: pspace_canonical'_def split: if_split_asm)\n apply (clarsimp simp add: new_cap_addrs_def shiftl_t2n)\n apply (fastforce intro: range_cover_canonical_address[OF cover] simp: mult.commute)+\n done\nqed\n\nlemma retype_in_kernel_mappings':\n assumes pc': \"pspace_in_kernel_mappings' s'\"\n and cover: \"range_cover ptr sz (objBitsKO ko) n\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"(ptr && ~~ mask sz) \\ kernel_mappings\"\n shows\n \"pspace_in_kernel_mappings' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n (is \"pspace_in_kernel_mappings' (s'\\ksPSpace := ?ps\\)\")\nproof -\n show \"pspace_in_kernel_mappings' (s'\\ksPSpace := ?ps\\)\" using assms\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (clarsimp simp: pspace_in_kernel_mappings'_def split: if_split_asm)\n apply (clarsimp simp add: new_cap_addrs_def shiftl_t2n)\n apply (fastforce intro: range_cover_in_kernel_mappings[OF cover] simp: mult.commute)+\n done\nqed\n\nlemma createObjects_valid_pspace':\n assumes mko: \"makeObjectKO dev ty = Some val\"\n and not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n and ptr_km: \"ptr && ~~ mask sz \\ kernel_mappings\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat (n * 2^gbits * 2 ^ objBitsKO val ) - 1} s\n \\ ptr \\ 0\\\n createObjects' ptr n val gbits \\\\r. valid_pspace'\\\"\n apply (cut_tac not_0)\n apply (simp add: split_def createObjects'_def\n lookupAround2_pspace_no\n alignError_def unless_def)\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def del:fun_upd_apply)+\n apply (wpc|wp)+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift[OF _ cover])\n apply simp+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift[OF _ cover])\n apply simp+\n apply (subst data_map_insert_def[symmetric])+\n apply (rule impI)\n apply (clarsimp simp: new_cap_addrs_fold'\n valid_pspace'_def linorder_not_less\n objBits_def[symmetric])\n apply (simp only: imp_disjL[symmetric] imp_conjL[symmetric] imp_ex[symmetric]\n range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified])\nproof (intro conjI impI)\n\n fix s\n\n assume pn: \"pspace_no_overlap' ptr sz s\"\n and vo: \"valid_objs' s\"\n and ad: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and cn: \"pspace_canonical' s\"\n and km: \"pspace_in_kernel_mappings' s\"\n and pc: \"caps_no_overlap'' ptr sz s\"\n and mdb: \"valid_mdb' s\"\n and p_0: \"ptr \\ 0\"\n and reserved : \"caps_overlap_reserved' {ptr..ptr + of_nat n *2 ^ gbits * 2 ^ objBitsKO val - 1} s\"\n and no_0_obj': \"no_0_obj' s\"\n have obj': \"objBitsKO val \\ sz\"\n using cover\n by (simp add:range_cover_def)\n\n let ?s' = \"s\\ksPSpace := foldr (\\addr. data_map_insert addr val) (new_cap_addrs (n * 2 ^ gbits) ptr val) (ksPSpace s)\\\"\n\n note cover' = range_cover_rel[where sbit' = \"objBitsKO val\",OF cover _ refl,simplified]\n\n note ad' = retype_aligned_distinct'[OF ad pn cover']\n\n note shift = range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified]\n\n have al: \"is_aligned ptr (objBitsKO val)\"\n using cover'\n by (simp add:range_cover_def)\n\n show pspace_aligned: \"pspace_aligned' ?s'\"\n using ad' shift\n by (simp add:field_simps)\n\n show pspace_canonical: \"pspace_canonical' ?s'\"\n using retype_canonical'[OF cn cover' sz_limit ptr_cn]\n by (clarsimp simp: field_simps)\n\n show pspace_in_kernel_mappings: \"pspace_in_kernel_mappings' ?s'\"\n using retype_in_kernel_mappings'[OF km cover' sz_limit ptr_km]\n by (clarsimp simp: field_simps)\n\n show \"pspace_distinct' ?s'\"\n using ad' shift\n by (simp add:field_simps)\n\n note obj_at_disj = retype_obj_at_disj' [OF ad pn cover']\n\n note obj_at_disj' = obj_at_disj [unfolded foldr_upd_app_if[folded data_map_insert_def]]\n\n have obj_atC: \"\\P x. x \\ set (new_cap_addrs (2 ^ gbits * n) ptr val) \\ \\ obj_at' P x s\"\n apply (clarsimp simp: obj_at'_def)\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover' ]])\n apply (insert pspace_no_overlap_disjoint' [OF ad(1) pn])\n apply (drule domI[where m = \"ksPSpace s\"])\n apply (drule(1) orthD2)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n done\n\n have valid_cap: \"\\cap q. \\ s \\' cap; cte_wp_at' (\\cte. cteCap cte = cap) q s \\\n \\ ?s' \\' cap\"\n apply (rule valid_untyped'_helper[OF _ _ _ pc _ ad pn ])\n apply simp+\n apply (subst mult.commute)\n apply (rule cover')\n using reserved\n apply (clarsimp simp:caps_overlap_reserved'_def cte_wp_at_ctes_of)\n apply (drule_tac x = cte in bspec)\n apply fastforce\n apply simp\n done\n\n show valid_objs: \"valid_objs' ?s'\" using vo\n apply (clarsimp simp: valid_objs'_def\n foldr_upd_app_if[folded data_map_insert_def]\n elim!: ranE\n split: if_split_asm)\n apply (insert sym[OF mko])[1]\n apply (clarsimp simp: makeObjectKO_def\n split: bool.split_asm sum.split_asm\n RISCV64_H.object_type.split_asm\n apiobject_type.split_asm\n kernel_object.split_asm\n arch_kernel_object.split_asm)\n apply (drule bspec, erule ranI)\n apply (subst mult.commute)\n apply (case_tac obj; simp add: valid_obj'_def)\n apply (rename_tac endpoint)\n apply (case_tac endpoint; simp add: valid_ep'_def obj_at_disj')\n apply (rename_tac notification)\n apply (case_tac notification; simp add: valid_ntfn'_def valid_bound_tcb'_def obj_at_disj')\n apply (rename_tac ntfn xa)\n apply (case_tac ntfn, simp_all, (clarsimp simp: obj_at_disj' split:option.splits)+)\n apply (rename_tac tcb)\n apply (case_tac tcb, clarsimp simp add: valid_tcb'_def)\n apply (frule pspace_alignedD' [OF _ ad(1)])\n apply (frule pspace_distinctD' [OF _ ad(2)])\n apply (simp add: objBits_simps)\n apply (subst mult.commute)\n apply (intro conjI ballI)\n apply (clarsimp elim!: ranE)\n apply (rule valid_cap[unfolded foldr_upd_app_if[folded data_map_insert_def]])\n apply (fastforce)\n apply (rule_tac ptr=\"x + xa\" in cte_wp_at_tcbI', assumption+)\n apply fastforce\n apply simp\n apply (rename_tac thread_state mcp priority bool option nat cptr vptr bound user_context)\n apply (case_tac thread_state, simp_all add: valid_tcb_state'_def\n valid_bound_ntfn'_def obj_at_disj'\n split: option.splits)[2]\n apply (simp add: valid_cte'_def)\n apply (frule pspace_alignedD' [OF _ ad(1)])\n apply (frule pspace_distinctD' [OF _ ad(2)])\n apply (simp add: objBits_simps')\n apply (subst mult.commute)\n apply (erule valid_cap[unfolded foldr_upd_app_if[folded data_map_insert_def]])\n apply (erule(2) cte_wp_at_cteI'[unfolded cte_level_bits_def])\n apply simp\n done\n have not_0: \"0 \\ set (new_cap_addrs (2 ^ gbits * n) ptr val)\"\n using p_0\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover'],rotated])\n apply (clarsimp simp:ptr_add_def)\n done\n show \"valid_mdb' ?s'\"\n apply (simp add: valid_mdb'_def foldr_upd_app_if[folded data_map_insert_def])\n apply (subst mult.commute)\n apply (subst ctes_of_retype [OF mko ad])\n apply (rule ad'[unfolded foldr_upd_app_if[folded data_map_insert_def]])+\n apply (simp add: objBits_def[symmetric] new_cap_addrs_aligned [OF al])\n apply (rule ballI, drule subsetD [OF new_cap_addrs_subset [OF cover']])\n apply (insert pspace_no_overlap_disjoint' [OF ad(1) pn])\n apply (drule_tac x = x in orthD1)\n apply (simp add:ptr_add_def p_assoc_help)\n apply fastforce\n apply (fold makeObject_cte)\n apply (rule retype_mdb.valid_n)\n apply unfold_locales\n apply (rule mdb[unfolded valid_mdb'_def])\n apply (rule iffD2 [OF None_ctes_of_cte_at[unfolded cte_wp_at_obj_cases'], THEN sym])\n apply (rule notI)\n apply (elim disjE conjE, simp_all add: obj_atC)[1]\n apply (thin_tac \"S \\ T = {}\" for S T)\n apply (clarsimp simp: obj_at'_def objBits_simps)\n apply (drule pspace_no_overlapD' [OF _ pn])\n apply (drule subsetD [OF new_cap_addrs_subset[OF cover']])\n apply (frule_tac ptr'=p in mask_in_range)\n apply (drule(1) tcb_cte_cases_aligned_helpers)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:objBits_simps)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (frule new_range_subset[OF cover'])\n apply (drule bspec [OF new_cap_addrs_aligned[OF al]])\n apply (drule(1) disjoint_subset[rotated])\n apply (drule_tac a=p in equals0D)\n apply (frule_tac ptr'=p in mask_in_range)\n apply (simp only: add_mask_fold)\n apply (insert sym [OF mko],\n clarsimp simp: objBits_simps makeObjectKO_def obj_at'_def)[1]\n apply (insert sym[OF mko] cover',\n clarsimp simp: obj_at'_def objBits_simps\n makeObjectKO_def)[1]\n apply (drule(1) tcb_cte_cases_aligned_helpers(2))\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset,rotated])\n apply (simp add:objBits_simps)\n apply (drule orthD1)\n apply (fastforce simp:p_assoc_help ptr_add_def)\n apply fastforce\n apply (simp add: not_0)\n done\n\n have data_map_ext: \"\\x y. data_map_insert x y = (\\m. m (x \\ y))\"\n by (rule ext) simp\n show no_0_obj: \"no_0_obj' ?s'\"\n using not_0 no_0_obj'\n by (simp add: no_0_obj'_def data_map_ext field_simps foldr_upd_app_other)\n\nqed\n\nabbreviation\n \"injectKOS \\ (injectKO :: ('a :: pspace_storable) \\ kernel_object)\"\n\nlemma createObjects_valid_pspace_untyped':\n assumes mko: \"makeObjectKO dev ty = Some val\"\n and not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n and ptr_km: \"ptr && ~~ mask sz \\ kernel_mappings\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat (n * 2^gbits * 2 ^ objBitsKO val ) - 1} s \\\n createObjects' ptr n val gbits \\\\r. valid_pspace'\\\"\n apply (wp createObjects_valid_pspace' [OF mko not_0 cover sz_limit ptr_cn ptr_km])\n apply simp\n done\n\nlemma copyGlobalMappings_valid_objs'[wp]:\n \"copyGlobalMappings pt \\valid_objs'\\\"\n unfolding copyGlobalMappings_def by (wpsimp wp: mapM_x_wp')\n\ncrunch pspace_aligned'[wp]: copyGlobalMappings \"pspace_aligned'\"\n (wp: crunch_wps)\ncrunch pspace_canonical'[wp]: copyGlobalMappings \"pspace_canonical'\"\n (wp: crunch_wps)\ncrunch pspace_in_kernel_mappings'[wp]: copyGlobalMappings \"pspace_in_kernel_mappings'\"\n (wp: crunch_wps)\ncrunch pspace_distinct'[wp]: copyGlobalMappings \"pspace_distinct'\"\n (wp: crunch_wps)\n\nlemmas storePTE_valid_mdb[wp]\n = storePTE_ctes[where P=valid_mdb_ctes, folded valid_mdb'_def]\ncrunch valid_mdb[wp]: copyGlobalMappings \"valid_mdb'\"\n (wp: crunch_wps)\n\ncrunch no_0_obj' [wp]: copyGlobalMappings no_0_obj'\n (wp: crunch_wps)\n\nlemma copyGlobalMappings_valid_pspace[wp]:\n \"\\valid_pspace'\\ copyGlobalMappings pt \\\\rv. valid_pspace'\\\"\n by (wpsimp simp: valid_pspace'_def)\n\ndeclare bleeding_obvious [simp]\n\nlemma range_cover_new_cap_addrs_compare:\n assumes not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and ptr_in: \"p \\ set (new_cap_addrs (unat (((of_nat n)::machine_word) << gbits)) ptr val)\"\n shows \"p \\ ptr + of_nat (shiftL n (objBitsKO val + gbits) - Suc 0)\"\nproof -\n note unat_of_nat_shift = range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified]\n have cover' :\"range_cover ptr sz (objBitsKO val) (n*2^gbits)\"\n by (rule range_cover_rel[OF cover],simp+)\n have upbound:\" unat ((((of_nat n)::machine_word) * 2 ^ gbits)) * unat ((2::machine_word) ^ objBitsKO val) < 2 ^ word_bits\"\n using range_cover.range_cover_le_n_less[OF cover' le_refl] cover'\n apply -\n apply (drule nat_less_power_trans)\n apply (simp add:range_cover_def)\n apply (fold word_bits_def)\n using unat_of_nat_shift not_0\n apply (simp add:field_simps shiftl_t2n)\n done\n have not_0': \"(2::machine_word) ^ (objBitsKO val + gbits) * of_nat n \\ 0\"\n apply (rule range_cover_not_zero_shift[OF not_0,unfolded shiftl_t2n,OF _ le_refl])\n apply (rule range_cover_rel[OF cover])\n apply simp+\n done\n have \"gbits < word_bits\"\n using cover\n by (simp add:range_cover_def word_bits_def)\n thus ?thesis\n apply -\n apply (insert not_0 cover ptr_in)\n apply (frule range_cover.range_cover_le_n_less[OF _ le_refl])\n apply (fold word_bits_def)\n apply (simp add:shiftL_nat )\n apply (simp add:range_cover.unat_of_nat_n_shift)\n apply (clarsimp simp:new_cap_addrs_def shiftl_t2n)\n apply (rename_tac pa)\n apply (rule word_plus_mono_right)\n apply (rule order_trans)\n apply (subst mult.commute)\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (clarsimp simp:p2_gt_0 range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"0\"])\n apply (simp+)[2]\n apply (erule less_le_trans[OF range_cover.range_cover_le_n_less(2)])\n apply (clarsimp simp:field_simps power_add)\n apply (rule unat_le_helper)\n apply (rule of_nat_mono_maybe_le[THEN iffD1])\n using range_cover.range_cover_le_n_less[OF cover' le_refl]\n apply (simp_all only:word_bits_def[symmetric])\n apply simp\n apply (drule nat_less_power_trans)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule less_le_trans[OF mult_less_mono1])\n apply (rule unat_mono)\n apply (rule_tac y1= \"pa\" in of_nat_mono_maybe'[THEN iffD1,rotated -1])\n apply (assumption)\n apply (simp add:word_bits_def)\n apply (simp add:word_bits_def)\n apply simp\n using unat_of_nat_shift\n apply (simp add:field_simps shiftl_t2n)\n apply simp\n apply (rule word_less_sub_1)\n apply (simp add:power_add field_simps)\n apply (subst mult.assoc[symmetric])\n apply (rule word_mult_less_mono1)\n apply (rule word_of_nat_less)\n using unat_of_nat_shift\n apply (simp add:shiftl_t2n field_simps)\n apply (meson less_exp objBitsKO_bounded2 of_nat_less_pow_64 word_gt_a_gt_0)\n using upbound\n apply (simp add:word_bits_def)\n apply (rule machine_word_plus_mono_right_split[where sz = sz])\n apply (rule less_le_trans[rotated -1])\n apply (rule range_cover.range_cover_compare_bound[OF cover'])\n apply (simp add: unat_minus_one[OF not_0'])\n using range_cover.unat_of_nat_n_shift[OF cover le_refl]\n apply (simp add:shiftl_t2n power_add field_simps)\n apply (simp add:range_cover_def word_bits_def)\n done\nqed\n\nlemma createObjects_orig_ko_wp_at2':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (ko_wp_at' P' p s)\n \\ (P' val \\ P True)\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (ko_wp_at' P' p s)\\\"\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def del:fun_upd_apply)\n apply (rule hoare_grab_asm)+\n apply (subst new_cap_addrs_fold')\n apply (drule range_cover_not_zero_shift[rotated])\n apply (rule le_add2)\n apply (simp add:word_le_sub1 del:fun_upd_apply)+\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp)+\n apply (clarsimp simp:valid_pspace'_def linorder_not_less simp del:fun_upd_apply)\n apply (subgoal_tac \" range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_ko_wp_at',simp+)+\n apply clarsimp\n apply (cases \"P' val\")\n apply simp\n apply clarsimp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add:lookupAround2_None1)\n apply (intro conjI impI allI)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply (fastforce simp: ko_wp_at'_def)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (simp add:dom_def)\n apply (fastforce simp:ko_wp_at'_def)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\n\nlemma createObjects_orig_obj_at2':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (obj_at' P' p s)\n \\ \\ (case_option False P' (projectKO_opt val))\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (obj_at' P' p s)\\\"\n unfolding obj_at'_real_def\n by (wp createObjects_orig_ko_wp_at2') auto\n\nlemma createObjects_orig_cte_wp_at2':\n \"\\\\s. P (cte_wp_at' P' p s)\n \\ n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ \\ (case_option False P' (projectKO_opt val))\n \\ (\\(getF, setF) \\ ran tcb_cte_cases.\n \\ (case_option False (P' \\ getF) (projectKO_opt val)))\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (cte_wp_at' P' p s)\\\"\n apply (simp add: cte_wp_at'_obj_at')\n apply (rule handy_prop_divs)\n apply (wp createObjects_orig_obj_at2'[where sz = sz], simp)\n apply (simp add: tcb_cte_cases_def cteSizeBits_def)\n including no_pre\n apply (wp handy_prop_divs createObjects_orig_obj_at2'[where sz = sz]\n | simp add: o_def cong: option.case_cong)+\n done\n\nlemma threadSet_cte_wp_at2'T:\n assumes \"\\tcb. \\(getF, setF) \\ ran tcb_cte_cases. getF (F tcb) = getF tcb\"\n shows \"\\\\s. P (cte_wp_at' P' p s)\\ threadSet F t \\\\rv s. P (cte_wp_at' P' p s)\\\"\n using assms by (rule threadSet_cte_wp_at'T)\n\nlemmas threadSet_cte_wp_at2' =\n threadSet_cte_wp_at2'T [OF all_tcbI, OF ball_tcb_cte_casesI]\n\nlemma createNewCaps_cte_wp_at2:\n \"\\\\s. P (cte_wp_at' P' p s) \\ \\ P' makeObject\n \\ n \\ 0\n \\ range_cover ptr sz (APIType_capBits ty objsz) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n objsz dev\n \\\\rv s. P (cte_wp_at' P' p s)\\\"\n including no_pre\n apply (simp add: createNewCaps_def createObjects_def RISCV64_H.toAPIType_def\n split del: if_split)\n apply (case_tac ty; simp add: createNewCaps_def createObjects_def Arch_createNewCaps_def\n split del: if_split cong: if_cong)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp add:createObjects_def)\n apply ((wp createObjects_orig_cte_wp_at2'[where sz = sz]\n mapM_x_wp' threadSet_cte_wp_at2')+\n | assumption\n | clarsimp simp: APIType_capBits_def projectKO_opts_defs\n makeObject_tcb tcb_cte_cases_def cteSizeBits_def\n archObjSize_def bit_simps\n createObjects_def curDomain_def\n objBits_if_dev\n split del: if_split\n | simp add: objBits_simps)+\n done\n\nlemma createObjects_orig_obj_at':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ obj_at' P p s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r. obj_at' P p\\\"\n apply (rule hoare_grab_asm)+\n apply (clarsimp simp: createObjects'_def)\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp+\n apply (wp|simp add:split_def cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp)+\n apply (clarsimp simp del:fun_upd_apply)\n apply (simp add:range_cover_def is_aligned_mask)\n apply (subst data_map_insert_def[symmetric])+\n apply clarsimp\n apply (subgoal_tac \"range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst retype_obj_at',simp+)+\n apply (intro conjI impI allI)\n apply (clarsimp simp:obj_at'_real_def ko_wp_at'_def)\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add:lookupAround2_None1)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply simp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (simp add:dom_def obj_at'_real_def ko_wp_at'_def)\n apply simp+\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\ncrunch ko_wp_at'[wp]: doMachineOp \"\\s. P (ko_wp_at' P' p s)\"\n\nlemma createObjects_orig_cte_wp_at':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ cte_wp_at' P p s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. cte_wp_at' P p s\\\"\n apply (simp add: cte_wp_at'_obj_at' tcb_cte_cases_def cteSizeBits_def)\n apply (rule hoare_pre, wp hoare_vcg_disj_lift createObjects_orig_obj_at'[where sz = sz])\n apply clarsimp\n done\n\nlemma createNewCaps_cte_wp_at':\n \"\\\\s. cte_wp_at' P p s\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us dev\n \\\\rv. cte_wp_at' P p\\\"\n apply (simp add: createNewCaps_def RISCV64_H.toAPIType_def\n split del: if_split)\n apply (case_tac ty; simp add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp)\n apply (wp createObjects_orig_cte_wp_at'[where sz = sz] mapM_x_wp'\n threadSet_cte_wp_at'T\n | clarsimp simp: objBits_simps APIType_capBits_def createObjects_def curDomain_def\n bit_simps\n | intro conjI impI\n | force simp: tcb_cte_cases_def cteSizeBits_def)+\n done\n\nlemma createObjects_obj_at_other:\n assumes cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and not_0: \"n\\ 0\"\n shows \"\\\\s. obj_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\_. obj_at' P p\\\"\n apply (simp add: createObjects_def)\n apply (wp createObjects_orig_obj_at'[where sz = sz])\n using cover not_0\n apply (clarsimp simp: cover not_0 valid_pspace'_def pspace_no_overlap'_def)\n done\n\nlemma valid_cap'_range_no_overlap:\n \"\\untypedRange c \\ {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1} = {}; s \\' c;\n valid_pspace' s; pspace_no_overlap' ptr sz s;\n range_cover ptr sz (objBitsKO val) n\\\n \\ s\\ksPSpace := foldr (\\addr. data_map_insert addr val)\n (new_cap_addrs n ptr val) (ksPSpace s)\\ \\' c\"\n apply (cases c; simp add: valid_cap'_def valid_arch_cap'_def valid_arch_cap_ref'_def\n cte_wp_at_obj_cases' valid_pspace'_def retype_obj_at_disj'\n typ_at_to_obj_at_arches frame_at'_def page_table_at'_def\n split: zombie_type.split_asm arch_capability.splits if_splits\n del: Int_atLeastAtMost)[1]\n apply (rename_tac word nat1 nat2)\n apply (clarsimp simp:valid_untyped'_def retype_ko_wp_at'\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (intro conjI impI)\n apply (intro allI)\n apply (drule_tac x = ptr' in spec)\n apply (rule ccontr)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (erule disjE)\n apply (drule(2) disjoint_subset2 [OF obj_range'_subset])\n apply (drule(1) disjoint_subset2[OF psubset_imp_subset])\n apply (simp add: Int_absorb ptr_add_def p_assoc_help mask_def\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule(1) obj_range'_subset)\n apply (drule_tac A'=\" {word + of_nat nat2..word + 2 ^ nat1 - 1}\" in disjoint_subset[rotated])\n apply clarsimp\n apply (rule is_aligned_no_wrap')\n apply (fastforce simp:capAligned_def)\n apply (erule of_nat_less_pow_64)\n apply (simp add:capAligned_def)\n apply (drule(1) disjoint_subset2)\n apply (simp add: add_mask_fold)\n apply blast\n apply (intro allI)\n apply (drule_tac x = ptr' in spec)\n apply (rule ccontr)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule(2) disjoint_subset2 [OF obj_range'_subset])\n apply (drule(1) disjoint_subset2)\n apply (simp add: Int_absorb ptr_add_def p_assoc_help mask_def\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n done\n\nlemma createObjects_valid_cap':\n \"\\valid_cap' c and valid_pspace' and pspace_no_overlap' ptr sz and\n K (untypedRange c \\ {ptr .. (ptr && ~~ mask sz) + 2^sz - 1} = {} \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\\\n createObjects' ptr n val gbits\n \\\\_. valid_cap' c\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def)\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply fastforce+\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (clarsimp simp: linorder_not_less valid_pspace'_def)\n apply (wpc|wp)+\n apply (subst data_map_insert_def[symmetric])+\n apply clarsimp\n apply (subgoal_tac \" range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst range_cover.unat_of_nat_n_shift,simp+)+\n apply (subst (asm) range_cover.unat_of_nat_n_shift,simp+)+\n apply (intro conjI impI allI)\n apply (erule(4) valid_cap'_range_no_overlap)+\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\nlemma createObjects_cte_wp_at':\n \"\\range_cover ptr sz (objBitsKO val + gbits) n; n \\ 0\\\n \\\\\\s. cte_wp_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\_. cte_wp_at' P p\\\"\n apply (clarsimp simp: valid_def cte_wp_at_obj_cases')\n apply (erule disjE)\n apply (erule use_valid[OF _ ])\n apply (rule createObjects_orig_obj_at')\n apply fastforce\n apply clarsimp\n apply (drule_tac x = na in bspec)\n apply clarsimp\n apply clarsimp\n apply (drule use_valid[OF _ createObjects_orig_obj_at'])\n apply fastforce\n apply simp\n done\n\nlemma createNewCaps_cte_wp_at:\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0 : \"n \\ 0\"\n shows \"\\\\s. cte_wp_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us dev\n \\\\_. cte_wp_at' P p\\\"\n apply (wp createNewCaps_cte_wp_at')\n apply (auto simp: cover not_0)\n done\n\nlemma createObjects_ret2:\n \"\\(\\s. P (map (\\p. ptr_add y (p * 2 ^ (objBitsKO ko + gbits)))\n [0.. n \\ 0)\\\n createObjects y n ko gbits \\\\rv s. P rv\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_chain)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_ret)\n apply simp+\n apply (rule hoare_vcg_prop)\n defer\n apply (clarsimp simp: power_add mult.commute mult.left_commute | assumption)+\n done\n\nlemma state_refs_ko_wp_at_eq:\n \"state_refs_of' s = (\\x. {r. ko_wp_at' (\\ko. r \\ refs_of' ko) x s})\"\n apply (rule ext)\n apply (simp add: state_refs_of'_def ko_wp_at'_def\n split: option.split)\n done\n\nlemma createObjects_state_refs_of'':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ P (state_refs_of' s) \\ refs_of' val = {}\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\rv s. P (state_refs_of' s)\\\"\n apply (clarsimp simp:valid_def lookupAround2_pspace_no state_refs_ko_wp_at_eq)\n apply (erule ssubst[where P = P,rotated])\n apply (rule ext)\n apply (rule set_eqI)\n apply clarsimp\n apply (intro iffI,rule ccontr)\n apply (drule_tac P1=\"\\x. \\ x\" in use_valid[OF _ createObjects_orig_ko_wp_at2'[where sz = sz]])\n apply simp\n apply (intro conjI)\n apply simp+\n apply (drule_tac P1=\"\\x. x\" in use_valid[OF _ createObjects_orig_ko_wp_at2'[where sz = sz]])\n apply simp+\n done\n\ncrunch state_refs_of'[wp]: copyGlobalMappings \"\\s. P (state_refs_of' s)\"\n (wp: crunch_wps)\n\nlemma createNewCaps_state_refs_of':\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0: \"n \\ 0\"\n shows\n \"\\\\s. valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ P (state_refs_of' s)\\\n createNewCaps ty ptr n us dev\n \\\\rv s. P (state_refs_of' s)\\\"\n unfolding createNewCaps_def\n apply (clarsimp simp: RISCV64_H.toAPIType_def\n split del: if_split)\n apply (cases ty; simp add: createNewCaps_def Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp)\n apply (insert cover not_0)\n apply (wp mapM_x_wp' createObjects_state_refs_of'' threadSet_state_refs_of'\n | simp add: not_0 pspace_no_overlap'_def objBitsKO_def APIType_capBits_def\n valid_pspace'_def makeObject_tcb makeObject_endpoint objBits_def\n makeObject_notification archObjSize_def createObjects_def\n curDomain_def bit_simps\n | intro conjI impI)+\n done\n\nlemma createObjects_iflive':\n \"\\\\s. if_live_then_nonz_cap' s \\ \\ live' val\n \\ n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\rv s. if_live_then_nonz_cap' s\\\"\n apply (rule hoare_pre)\n apply (simp only: if_live_then_nonz_cap'_def\n ex_nonz_cap_to'_def imp_conv_disj)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n hoare_vcg_ex_lift createObjects_orig_ko_wp_at2'\n createObjects_orig_cte_wp_at')\n apply clarsimp\n apply (intro conjI allI impI)\n apply simp_all\n apply (rule ccontr)\n apply clarsimp\n apply (drule(1) if_live_then_nonz_capE')\n apply (fastforce simp: ex_nonz_cap_to'_def)\n done\n\ncrunch ksReadyQueues[wp]: copyGlobalMappings \"\\s. P (ksReadyQueues s)\"\n (wp: updateObject_default_inv crunch_wps)\ncrunch ksReadyQueuesL1[wp]: copyGlobalMappings \"\\s. P (ksReadyQueuesL1Bitmap s)\"\n (wp: updateObject_default_inv crunch_wps)\ncrunch ksReadyQueuesL2[wp]: copyGlobalMappings \"\\s. P (ksReadyQueuesL2Bitmap s)\"\n (wp: updateObject_default_inv crunch_wps)\n\ncrunch valid_idle'[wp]: copyGlobalMappings \"valid_idle'\"\n (simp: objBits_simps archObjSize_def\n wp: updateObject_default_inv crunch_wps setObject_idle' refl)\n\ncrunch iflive'[wp]: copyGlobalMappings \"if_live_then_nonz_cap'\"\n (wp: crunch_wps)\n\nlemma createNewCaps_iflive'[wp]:\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0: \"n \\ 0\"\n shows\n \"\\\\s. valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ if_live_then_nonz_cap' s\\\n createNewCaps ty ptr n us dev\n \\\\rv s. if_live_then_nonz_cap' s\\\"\n unfolding createNewCaps_def\n apply (insert cover)\n apply (clarsimp simp: toAPIType_def)\n apply (cases ty, simp_all add: createNewCaps_def Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (rule hoare_pre, wp, simp)\n apply (wp mapM_x_wp' createObjects_iflive' threadSet_iflive'\n | simp add: not_0 pspace_no_overlap'_def createObjects_def\n valid_pspace'_def makeObject_tcb makeObject_endpoint\n makeObject_notification objBitsKO_def\n APIType_capBits_def objBits_def\n archObjSize_def bit_simps\n curDomain_def\n split del:if_split\n | simp split: if_split\n | fastforce)+\n done\n\nlemma createObjects_pspace_only:\n \"\\ \\f s. P (ksPSpace_update f s) = P s \\\n \\ \\P\\ createObjects' ptr n val gbits \\\\rv. P\\\"\n apply (simp add: createObjects_def createObjects'_def unless_def alignError_def\n split_def lookupAround2_pspace_no)\n apply wpsimp\n done\n\nlemma createObjects'_qs[wp]:\n \"\\\\s. P (ksReadyQueues s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueues s)\\\"\n by (rule createObjects_pspace_only, simp)\n\nlemma createObjects'_qsL1[wp]:\n \"\\\\s. P (ksReadyQueuesL1Bitmap s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueuesL1Bitmap s)\\\"\n by (rule createObjects_pspace_only, simp)\n\nlemma createObjects'_qsL2[wp]:\n \"\\\\s. P (ksReadyQueuesL2Bitmap s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueuesL2Bitmap s)\\\"\n by (rule createObjects_pspace_only, simp)\n\n(* FIXME move these 2 to TcbAcc_R *)\nlemma threadSet_qsL1[wp]:\n \"\\\\s. P (ksReadyQueuesL1Bitmap s)\\ threadSet f t \\\\rv s. P (ksReadyQueuesL1Bitmap s)\\\"\n by (simp add: threadSet_def | wp updateObject_default_inv)+\n\nlemma threadSet_qsL2[wp]:\n \"\\\\s. P (ksReadyQueuesL2Bitmap s)\\ threadSet f t \\\\rv s. P (ksReadyQueuesL2Bitmap s)\\\"\n by (simp add: threadSet_def | wp updateObject_default_inv)+\n\ncrunches createObjects, createNewCaps\n for qs[wp]: \"\\s. P (ksReadyQueues s)\"\n and qsL1[wp]: \"\\s. P (ksReadyQueuesL1Bitmap s)\"\n and qsL2[wp]: \"\\s. P (ksReadyQueuesL2Bitmap s)\"\n (simp: crunch_simps wp: crunch_wps)\n\nlemma sch_act_wf_lift_asm:\n assumes tcb: \"\\P t. \\st_tcb_at' P t and Q \\ f \\\\rv. st_tcb_at' P t\\\"\n assumes tcbDomain: \"\\P t. \\obj_at' (\\tcb. P (tcbDomain tcb)) t and Q\\ f \\\\rv. obj_at' (\\tcb. P (tcbDomain tcb)) t\\\"\n assumes kCT: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes kCD: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes ksA: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n shows\n \"\\\\s. sch_act_wf (ksSchedulerAction s) s \\ Q s\\\n f\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (clarsimp simp: valid_def)\n apply (rule use_valid [OF _ ksA], assumption)\n apply (frule use_valid[OF _ kCT[of \"(=) (ksCurThread s)\" for s] refl])\n apply (frule use_valid[OF _ kCD[of \"(=) (ksCurDomain s)\" for s] refl])\n apply (case_tac \"ksSchedulerAction s\")\n apply (simp add: ct_in_state'_def)\n apply (drule use_valid [OF _ tcb])\n apply simp\n apply simp\n apply simp\n apply (clarsimp simp: tcb_in_cur_domain'_def)\n apply (frule use_valid [OF _ tcb], fastforce)\n apply (frule use_valid [OF _ tcbDomain], fastforce)\n apply auto\n done\n\nlemma valid_queues_lift_asm':\n assumes tat: \"\\d p t. \\\\s. \\ obj_at' (inQ d p) t s \\ Q d p s\\ f \\\\_ s. \\ obj_at' (inQ d p) t s\\\"\n and prq: \"\\P. \\\\s. P (ksReadyQueues s)\\ f \\\\_ s. P (ksReadyQueues s)\\\"\n shows \"\\\\s. valid_queues' s \\ (\\d p. Q d p s)\\ f \\\\_. valid_queues'\\\"\n apply (simp only: valid_queues'_def imp_conv_disj)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n tat prq)\n apply simp\n done\n\nlemma createObjects'_ct[wp]:\n \"\\\\s. P (ksCurThread s)\\ createObjects' p n v us \\\\rv s. P (ksCurThread s)\\\"\n by (rule createObjects_pspace_only, simp)\n\ncrunches createObjects, doMachineOp, createNewCaps\n for ct[wp]: \"\\s. P (ksCurThread s)\"\n and ksCurDomain[wp]: \"\\s. P (ksCurDomain s)\"\n (simp: unless_def crunch_simps wp: crunch_wps)\n\nlemma copyGlobalMappings_ko_wp_at:\n \"\\(\\s. P (ko_wp_at' P' p s)) and K (\\pte_x :: pte. P' (injectKO pte_x) = v)\\\n copyGlobalMappings pt\n \\\\rv s. P (ko_wp_at' P' p s)\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: copyGlobalMappings_def storePTE_def)\n apply (wp mapM_x_wp' setObject_ko_wp_at)\n apply simp\n apply (simp add: objBits_simps)\n apply simp\n apply (simp cong: if_cong split del: if_split)\n apply (wp getObject_inv loadObject_default_inv | simp split del: if_split)+\n apply (clarsimp simp: obj_at'_def ko_wp_at'_def)\n apply (wp | simp)+\n done\n\nlemma threadSet_ko_wp_at2':\n \"\\\\s. P (ko_wp_at' P' p s) \\ (\\tcb_x :: tcb. P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n threadSet F ptr\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\n apply (simp add: threadSet_def split del: if_split)\n apply (wp setObject_ko_wp_at getObject_tcb_wp | simp add: objBits_simps')+\n apply (auto simp: ko_wp_at'_def obj_at'_def)\n done\n\nlemma threadSet_ko_wp_at2'_futz:\n \"\\\\s. P (ko_wp_at' P' p s) \\ obj_at' Q ptr s\n \\ (\\tcb_x :: tcb. Q tcb_x \\ P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n threadSet F ptr\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\n apply (simp add: threadSet_def split del: if_split)\n apply (wp setObject_ko_wp_at getObject_tcb_wp | simp add: objBits_simps')+\n apply (auto simp: ko_wp_at'_def obj_at'_def)\n done\n\nlemma mapM_x_threadSet_createNewCaps_futz:\n \"\\\\s. P (ko_wp_at' P' p s) \\ (\\addr\\set addrs. obj_at' (\\tcb. \\tcbQueued tcb \\ tcbState tcb = Inactive) addr s)\n \\ (\\tcb_x :: tcb. tcbQueued (F tcb_x) = tcbQueued tcb_x \\ tcbState (F tcb_x) = tcbState tcb_x)\n \\ (\\tcb_x :: tcb. \\ tcbQueued tcb_x \\ tcbState tcb_x = Inactive \\ P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n mapM_x (threadSet F) addrs\n \\\\_ s. P (ko_wp_at' P' p s)\\\" (is \"\\?PRE\\ _ \\\\_. ?POST\\\")\n apply (rule mapM_x_inv_wp[where P=\"?PRE\"])\n apply simp\n apply (rule hoare_pre)\n apply (wp hoare_vcg_ball_lift threadSet_ko_wp_at2'[where P=\"id\", simplified]\n | wp (once) threadSet_ko_wp_at2'_futz[where Q=\"\\tcb. \\tcbQueued tcb \\ tcbState tcb = Inactive\"]\n | simp)+\n done\n\nlemma createObjects_makeObject_not_tcbQueued:\n assumes \"range_cover ptr sz (objBitsKO tcb) n\"\n assumes \"n \\ 0\" \"tcb = injectKO (makeObject::tcb)\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n tcb 0\n \\\\rv s. \\addr\\set rv. obj_at' (\\tcb. \\ tcbQueued tcb \\ tcbState tcb = Structures_H.thread_state.Inactive) addr s\\\"\n apply (rule hoare_strengthen_post[OF createObjects_ko_at_strg[where 'a=tcb]])\n using assms\n apply (auto simp: obj_at'_def projectKO_opt_tcb objBitsKO_def objBits_def makeObject_tcb)\n done\n\nlemma createObjects_ko_wp_at2:\n \"\\\\s. range_cover ptr sz (objBitsKO ko + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (ko_wp_at' P' p s)\n \\ (P' ko \\ P True)\n \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n ko gbits\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\n apply (simp add: createObjects_def)\n apply (wp createObjects_orig_ko_wp_at2')\n apply auto\n done\n\nlemma createNewCaps_ko_wp_atQ':\n \"\\(\\s. P (ko_wp_at' P' p s)\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s)\n and K (\\d (tcb_x :: tcb). \\tcbQueued tcb_x \\ tcbState tcb_x = Inactive\n \\ P' (injectKO (tcb_x \\ tcbDomain := d \\)) = P' (injectKO tcb_x))\n and K (\\v. makeObjectKO d (Inr ty) = Some v\n \\ P' v \\ P True)\\\n createNewCaps ty ptr n us d\n \\\\rv s. P (ko_wp_at' P' p s)\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: createNewCaps_def RISCV64_H.toAPIType_def\n split del: if_split)\n apply (cases ty, simp_all add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (rule hoare_pre, wp, simp)\n apply (wp mapM_x_threadSet_createNewCaps_futz\n mapM_x_wp'\n createObjects_obj_at\n createObjects_ko_wp_at2 createObjects_makeObject_not_tcbQueued\n copyGlobalMappings_ko_wp_at[where v=\"\\pte :: pte. P' (injectKO pte)\"]\n | simp add: makeObjectKO_def objBitsKO_def archObjSize_def APIType_capBits_def\n objBits_def curDomain_def bit_simps\n split del: if_split\n | intro conjI impI | fastforce\n | split if_split_asm)+\n done\n\nlemmas createNewCaps_ko_wp_at'\n = createNewCaps_ko_wp_atQ'[simplified, unfolded fold_K]\n\nlemmas createNewCaps_obj_at2 =\n createNewCaps_ko_wp_at'\n [where P'=\"\\ko. \\obj :: ('a :: pspace_storable).\n projectKO_opt ko = Some obj \\ P' obj\" for P',\n folded obj_at'_real_def,\n unfolded pred_conj_def, simplified]\n\nlemma createNewCaps_obj_at':\n \"\\\\s. obj_at' (P :: ('a :: pspace_storable) \\ bool) p s\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ (\\tcb d. \\tcbQueued tcb \\ tcbState tcb = Inactive \\\n ((\\obj :: 'a. injectKOS obj = KOTCB (tcb\\tcbDomain := d\\) \\ P obj) \\\n (\\obj :: 'a. injectKOS obj = KOTCB tcb \\ P obj)))\\\n createNewCaps ty ptr n us d\n \\\\rv s. obj_at' P p s\\\"\n apply (simp add: obj_at'_real_def)\n apply (wp createNewCaps_ko_wp_at')\n apply (fastforce simp:project_inject)\n done\n\nlemmas createNewCaps_pred_tcb_at'\n = createNewCaps_obj_at'[where P=\"\\ko. (Q :: 'a :: type \\ bool) (proj (tcb_to_itcb' ko))\" for Q proj,\n folded pred_tcb_at'_def, simplified]\n\nlemma createNewCaps_cur:\n \"\\range_cover ptr sz (APIType_capBits ty us) n ; n \\ 0\\ \\\n \\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n cur_tcb' s\\\n createNewCaps ty ptr n us d\n \\\\rv. cur_tcb'\\\"\n apply (rule hoare_post_imp [where Q=\"\\rv s. \\t. ksCurThread s = t \\ tcb_at' t s\"])\n apply (simp add: cur_tcb'_def)\n apply (wp hoare_vcg_ex_lift createNewCaps_obj_at')\n apply (clarsimp simp: pspace_no_overlap'_def cur_tcb'_def valid_pspace'_def)\n apply auto\n done\n\ncrunch ksInterrupt[wp]: createNewCaps \"\\s. P (ksInterruptState s)\"\n (simp: crunch_simps unless_def\n wp: setObject_ksInterrupt updateObject_default_inv crunch_wps)\n\nlemma createNewCaps_ifunsafe':\n \"\\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0 \\\n if_unsafe_then_cap' s\\\n createNewCaps ty ptr n us d\n \\\\rv s. if_unsafe_then_cap' s\\\"\n apply (simp only: if_unsafe_then_cap'_def ex_cte_cap_to'_def\n imp_conv_disj)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF createNewCaps_ksInterrupt])\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createNewCaps_cte_wp_at2 hoare_vcg_ex_lift)\n apply (simp add: makeObject_cte pspace_no_overlap'_def\n valid_pspace'_def)\n apply auto\n done\n\nlemma createObjects_nosch'[wp]:\n \"\\\\s. P (ksSchedulerAction s)\\\n createObjects' ptr n val gbits\n \\\\rv s. P (ksSchedulerAction s)\\\"\n by (rule createObjects_pspace_only, simp)\n\ncrunch nosch[wp]: copyGlobalMappings \"\\s. P (ksSchedulerAction s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\ncrunches createObjects, createNewCaps\n for nosch[wp]: \"\\s. P (ksSchedulerAction s)\"\n and it[wp]: \"\\s. P (ksIdleThread s)\"\n (simp: crunch_simps wp: crunch_wps)\n\nlemma createObjects_idle':\n \"\\valid_idle' and valid_pspace' and pspace_no_overlap' ptr sz\n and (\\s. \\ case_option False (\\cte. ksIdleThread s \\ capRange (cteCap cte))\n (projectKO_opt val)\n \\ (\\(getF, setF) \\ ran tcb_cte_cases.\n \\ case_option False (\\tcb. ksIdleThread s \\ capRange (cteCap (getF tcb)))\n (projectKO_opt val)))\n and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\\\n createObjects' ptr n val gbits\n \\\\rv. valid_idle'\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_pre)\n apply (clarsimp simp add: valid_idle'_def pred_tcb_at'_def)\n apply (rule hoare_vcg_conj_lift)\n apply (rule hoare_as_subst [OF createObjects'_it])\n apply (wp createObjects_orig_obj_at'\n createObjects_orig_cte_wp_at2'\n hoare_vcg_all_lift | simp)+\n apply (clarsimp simp: valid_idle'_def projectKOs o_def\n pred_tcb_at'_def valid_pspace'_def\n cong: option.case_cong)\n apply auto\n done\n\nlemma createNewCaps_idle'[wp]:\n \"\\valid_idle' and valid_pspace' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_idle'\\\"\n apply (rule hoare_gen_asm)\n apply (clarsimp simp: createNewCaps_def RISCV64_H.toAPIType_def\n split del: if_split)\n apply (cases ty, simp_all add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (wp, simp)\n including no_pre\n apply (wp mapM_x_wp'\n createObjects_idle'\n threadSet_idle'\n | simp add: projectKO_opt_tcb projectKO_opt_cte\n makeObject_cte makeObject_tcb archObjSize_def\n tcb_cte_cases_def objBitsKO_def APIType_capBits_def\n objBits_def createObjects_def bit_simps cteSizeBits_def\n | intro conjI impI\n | fastforce simp: curDomain_def)+\n done\n\ncrunch ksArch[wp]: createNewCaps \"\\s. P (ksArchState s)\"\n (simp: crunch_simps unless_def wp: crunch_wps)\ncrunch gsMaxObjectSize[wp]: createNewCaps \"\\s. P (gsMaxObjectSize s)\"\n (simp: crunch_simps unless_def wp: crunch_wps updateObject_default_inv)\n\nlemma createNewCaps_global_refs':\n \"\\\\s. range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s \\ valid_global_refs' s\n \\ 0 < gsMaxObjectSize s\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_global_refs'\\\"\n apply (simp add: valid_global_refs'_def valid_cap_sizes'_def valid_refs'_def)\n apply (rule_tac Q=\"\\rv s. \\ptr. \\ cte_wp_at' (\\cte. (kernel_data_refs \\ capRange (cteCap cte) \\ {}\n \\ 2 ^ capBits (cteCap cte) > gsMaxObjectSize s)) ptr s \\ global_refs' s \\ kernel_data_refs\"\n in hoare_post_imp)\n apply (auto simp: cte_wp_at_ctes_of linorder_not_less elim!: ranE)[1]\n apply (rule hoare_pre)\n apply (simp add: global_refs'_def)\n apply (rule hoare_use_eq [where f=ksArchState, OF createNewCaps_ksArch])\n apply (rule hoare_use_eq [where f=ksIdleThread, OF createNewCaps_it])\n apply (rule hoare_use_eq [where f=irq_node', OF createNewCaps_ksInterrupt])\n apply (rule hoare_use_eq [where f=gsMaxObjectSize], wp)\n apply (wp hoare_vcg_all_lift createNewCaps_cte_wp_at2[where sz=sz])\n apply (clarsimp simp: cte_wp_at_ctes_of global_refs'_def\n makeObject_cte)\n apply (auto simp: linorder_not_less ball_ran_eq)\n done\n\nlemma koTypeOf_eq_UserDataT:\n \"(koTypeOf ko = UserDataT)\n = (ko = KOUserData)\"\n by (cases ko, simp_all)\n\nlemma createNewCaps_valid_arch_state:\n \"\\(\\s. valid_arch_state' s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ (tp = APIObjectType ArchTypes_H.CapTableObject \\ us > 0))\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_arch_state'\\\"\n apply (simp add: valid_arch_state'_def\n valid_asid_table'_def\n valid_global_pts'_def\n vspace_table_at'_defs\n typ_at_to_obj_at_arches)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=ksArchState, OF createNewCaps_ksArch])\n apply (wp hoare_vcg_const_Ball_lift\n hoare_vcg_prop\n createNewCaps_obj_at'\n createNewCaps_ko_wp_at'\n hoare_vcg_all_lift\n hoare_vcg_const_imp_lift)\n apply (clarsimp simp: valid_pspace'_def o_def)\n apply (intro conjI)\n apply auto\n done\n\nlemma valid_irq_node_lift_asm:\n assumes x: \"\\P. \\\\s. P (irq_node' s)\\ f \\\\rv s. P (irq_node' s)\\\"\n assumes y: \"\\p. \\real_cte_at' p and Q\\ f \\\\rv. real_cte_at' p\\\"\n shows \"\\\\s. valid_irq_node' (irq_node' s) s \\ Q s\\ f \\\\rv s. valid_irq_node' (irq_node' s) s\\\"\n apply (simp add: valid_irq_node'_def)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF x])\n apply (wp hoare_vcg_all_lift y)\n apply simp\n done\n\nlemma valid_irq_handlers_cte_wp_at_form':\n \"valid_irq_handlers' = (\\s. \\irq. irq_issued' irq s \\\n (\\p. \\ cte_wp_at' (\\cte. cteCap cte = IRQHandlerCap irq) p s))\"\n by (auto simp: valid_irq_handlers'_def cteCaps_of_def cte_wp_at_ctes_of\n fun_eq_iff ran_def)\n\nlemma createNewCaps_irq_handlers':\n \"\\valid_irq_handlers' and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_irq_handlers'\\\"\n apply (simp add: valid_irq_handlers_cte_wp_at_form' irq_issued'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createNewCaps_cte_wp_at2)\n apply (clarsimp simp: makeObject_cte)\n apply auto\n done\n\nlemma createObjects'_irq_states' [wp]:\n \"\\valid_irq_states'\\ createObjects' a b c d \\\\_. valid_irq_states'\\\"\n apply (simp add: createObjects'_def split_def)\n apply (wp unless_wp|wpc|simp add: alignError_def)+\n apply fastforce\n done\n\ncrunch irq_states' [wp]: createNewCaps valid_irq_states'\n (wp: crunch_wps no_irq no_irq_clearMemory simp: crunch_simps unless_def)\n\ncrunch ksMachine[wp]: createObjects \"\\s. P (ksMachineState s)\"\n (simp: crunch_simps unless_def)\n\nlemma createNewCaps_valid_queues':\n \"\\valid_queues' and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_queues'\\\"\n apply (wp valid_queues_lift_asm' [OF createNewCaps_obj_at2])\n apply (clarsimp)\n apply (simp add: makeObjectKO_def\n split: object_type.split_asm\n apiobject_type.split_asm)\n apply (clarsimp simp: inQ_def)\n apply (auto simp: makeObject_tcb\n split: object_type.splits apiobject_type.splits)\n done\n\nlemma createNewCaps_valid_queues:\n \"\\valid_queues and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_queues\\\"\n apply (rule hoare_gen_asm)\n apply (wp valid_queues_lift_asm createNewCaps_obj_at2[where sz=sz])\n apply (clarsimp simp: projectKO_opts_defs)\n apply (simp add: inQ_def)\n apply (wp createNewCaps_pred_tcb_at'[where sz=sz] | simp)+\n done\n\nlemma mapM_x_threadSet_valid_pspace:\n \"\\valid_pspace' and K (curdom \\ maxDomain)\\\n mapM_x (threadSet (tcbDomain_update (\\_. curdom))) addrs \\\\y. valid_pspace'\\\"\n apply (rule hoare_gen_asm)\n apply (wp mapM_x_wp' threadSet_valid_pspace')\n apply simp_all\n done\n\nlemma createNewCaps_valid_pspace:\n assumes not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n and ptr_km: \"ptr && ~~ mask sz \\ kernel_mappings\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\n \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0 \\ caps_overlap_reserved' {ptr..ptr + of_nat n * 2^(APIType_capBits ty us) - 1} s \\ ksCurDomain s \\ maxDomain\\\n createNewCaps ty ptr n us dev \\\\r. valid_pspace'\\\"\n unfolding createNewCaps_def Arch_createNewCaps_def\n using valid_obj_makeObject_rules ptr_cn sz_limit ptr_km\n apply (clarsimp simp: RISCV64_H.toAPIType_def\n split del: if_split cong: option.case_cong)\n apply (cases ty, simp_all split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n apply (rule hoare_pre, wp, clarsimp)\n apply (insert cover)\n apply (wp createObjects_valid_pspace_untyped' [OF _ not_0 , where ty=\"Inr ty\" and sz = sz]\n mapM_x_threadSet_valid_pspace mapM_x_wp'\n | simp add: makeObjectKO_def APIType_capBits_def\n objBits_simps not_0 createObjects_def curDomain_def bit_simps\n | intro conjI impI\n | simp add: power_add field_simps)+\n done\n\nlemma copyGlobalMappings_inv[wp]:\n \"\\\\s. P (ksMachineState s)\\\n copyGlobalMappings newPM\n \\\\_ s. P (ksMachineState s)\\\"\n by (simp add: copyGlobalMappings_def storePTE_def split_def\n | wp mapM_x_wp_inv setObject_ksMachine updateObject_default_inv)+\n\nlemma doMachineOp_return_foo:\n \"doMachineOp (do x\\a;return () od) = (do (doMachineOp a); return () od)\"\n apply (clarsimp simp: doMachineOp_def bind_def gets_def\n get_def return_def select_f_def split_def simpler_modify_def)\n apply (rule ext)+\n apply simp\n apply (rule set_eqI)\n apply clarsimp\n done\n\nlemma createNewCaps_vms:\n \"\\pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and\n K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n) and\n valid_machine_state'\\\n createNewCaps ty ptr n us dev\n \\\\archCaps. valid_machine_state'\\\"\n apply (clarsimp simp: valid_machine_state'_def pointerInDeviceData_def\n Arch_createNewCaps_def createNewCaps_def pointerInUserData_def\n typ_at'_def createObjects_def doMachineOp_return_foo\n split del: if_split)\n apply (rule hoare_pre)\n apply (wpc\n | wp hoare_vcg_const_Ball_lift hoare_vcg_disj_lift\n hoare_vcg_all_lift\n doMachineOp_ko_wp_at' createObjects_orig_ko_wp_at2'[where sz = sz]\n hoare_vcg_all_lift\n dmo_lift' mapM_x_wp' copyGlobalMappings_ko_wp_at threadSet_ko_wp_at2'\n | clarsimp simp: createObjects_def Arch_createNewCaps_def curDomain_def Let_def\n split del: if_split\n | assumption)+\n apply (case_tac ty)\n apply (auto simp: APIType_capBits_def objBits_simps\n toAPIType_def object_type.splits bit_simps)\n done\n\nlemma createObjects_pspace_domain_valid':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ pspace_domain_valid s\\\n createObjects' ptr n val gbits\n \\\\_. pspace_domain_valid\\\"\n apply (simp add: createObjects'_def split_def unless_def)\n apply (rule hoare_pre)\n apply (wp | wpc | simp only: alignError_def haskell_assert_def)+\n apply (clarsimp simp: new_cap_addrs_fold' unat_1_0 unat_gt_0\n range_cover_not_zero_shift\n caps_overlap_reserved'_def)\n apply (simp add: pspace_domain_valid_def foldr_upd_app_if\n fun_upd_def[symmetric])\n apply (subgoal_tac \" \\x \\ set (new_cap_addrs (unat (of_nat n << gbits)) ptr val).\n mask_range x (objBitsKO val) \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\")\n apply blast\n\n apply (rule ballI)\n apply (rule new_range_subset)\n apply (erule range_cover_rel, simp+)\n apply (simp add: range_cover.unat_of_nat_n_shift field_simps)\n done\n\nlemma createObjects_pspace_domain_valid:\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ pspace_domain_valid s\\\n createObjects ptr n val gbits\n \\\\_. pspace_domain_valid\\\"\n apply (simp add: createObjects_def)\n apply (wp createObjects_pspace_domain_valid'[where sz=sz])\n apply (simp add: objBits_def)\n done\n\ncrunch pspace_domain_valid[wp]: copyGlobalMappings \"pspace_domain_valid\"\n (wp: crunch_wps)\n\nlemma createNewCaps_pspace_domain_valid[wp]:\n \"\\pspace_domain_valid and K ({ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\n \\ kernel_data_refs = {}\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\\\n createNewCaps ty ptr n us dev\n \\\\rv. pspace_domain_valid\\\"\n apply (simp add: createNewCaps_def)\n apply (rule hoare_pre)\n apply (wp createObjects_pspace_domain_valid[where sz=sz]\n mapM_x_wp'\n | wpc | simp add: Arch_createNewCaps_def curDomain_def Let_def\n split del: if_split)+\n apply (simp add: RISCV64_H.toAPIType_def\n split: object_type.splits)\n apply (auto simp: objBits_simps APIType_capBits_def bit_simps)\n done\n\n(* FIXME: move *)\nlemma ct_idle_or_in_cur_domain'_lift_futz:\n assumes a: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes b: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n assumes c: \"\\P. \\\\s. P (ksIdleThread s)\\ f \\\\_ s. P (ksIdleThread s)\\\"\n assumes d: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes e: \"\\d t. \\\\s. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t s \\ Q s\\\n f\n \\\\_. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t\\\"\n shows \"\\ct_idle_or_in_cur_domain' and ct_active' and Q\\ f \\\\_. ct_idle_or_in_cur_domain'\\\"\nproof -\n from e have e':\n \"\\d t. \\\\s. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t s \\ Q s\\\n f\n \\\\_. obj_at' (\\tcb. d = tcbDomain tcb) t\\\"\n apply (rule hoare_strengthen_post)\n apply (auto simp: obj_at'_def)\n done\n show ?thesis\n apply (simp add: ct_idle_or_in_cur_domain'_def tcb_in_cur_domain'_def)\n apply (rule hoare_pre)\n apply (wps a b c d)\n apply (wp static_imp_wp e' hoare_vcg_disj_lift)\n apply (auto simp: obj_at'_def ct_in_state'_def st_tcb_at'_def)\n done\nqed\n\nlemma createNewCaps_ct_idle_or_in_cur_domain':\n \"\\ct_idle_or_in_cur_domain' and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and ct_active' and K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n) \\\n createNewCaps ty ptr n us dev\n \\\\rv. ct_idle_or_in_cur_domain'\\\"\n apply (wp ct_idle_or_in_cur_domain'_lift_futz createNewCaps_obj_at'[where sz=sz] | simp)+\n done\n\nlemma sch_act_wf_lift_asm_futz:\n assumes tcb: \"\\P t. \\st_tcb_at' P t and Q \\ f \\\\rv. st_tcb_at' P t\\\"\n assumes tcbDomain: \"\\P t. \\obj_at' (\\tcb. runnable' (tcbState tcb) \\ P (tcbDomain tcb)) t and Q\\ f \\\\rv. obj_at' (\\tcb. runnable' (tcbState tcb) \\ P (tcbDomain tcb)) t\\\"\n assumes kCT: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes kCD: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes ksA: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n shows\n \"\\\\s. sch_act_wf (ksSchedulerAction s) s \\ Q s\\\n f\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (clarsimp simp: valid_def)\n apply (rule use_valid [OF _ ksA], assumption)\n apply (frule use_valid [OF _ kCT[of \"(=) (ksCurThread s)\" for s] refl])\n apply (frule use_valid [OF _ kCD[of \"(=) (ksCurDomain s)\" for s] refl])\n apply (case_tac \"ksSchedulerAction s\")\n apply (simp add: ct_in_state'_def)\n apply (drule use_valid [OF _ tcb])\n apply simp\n apply simp\n apply simp\n apply (clarsimp simp: tcb_in_cur_domain'_def)\n apply (frule use_valid [OF _ tcb], fastforce)\n apply simp\n apply (rename_tac word)\n apply (subgoal_tac \"(obj_at' (\\tcb. runnable' (tcbState tcb) \\ ksCurDomain b = tcbDomain tcb) word and Q) s\")\n apply (drule use_valid [OF _ tcbDomain], fastforce)\n apply (auto simp: st_tcb_at'_def o_def obj_at'_def ko_wp_at'_def)\n done\n\nlemma createNewCaps_sch_act_wf:\n \"\\(\\s. sch_act_wf (ksSchedulerAction s) s) and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\\\n createNewCaps ty ptr n us dev\n \\\\_ s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (wp sch_act_wf_lift_asm_futz\n createNewCaps_pred_tcb_at'[where sz=sz]\n createNewCaps_obj_at'[where sz=sz]\n | simp)+\n done\n\nlemma createObjects'_ksDomSchedule[wp]:\n \"\\\\s. P (ksDomSchedule s)\\ createObjects' ptr numObjects val gSize \\\\_ s. P (ksDomSchedule s)\\\"\n apply (simp add: createObjects'_def unless_def alignError_def)\n apply (wp | wpc)+\n apply simp\n done\n\nlemma createObjects'_ksDomScheduleIdx[wp]:\n \"\\\\s. P (ksDomScheduleIdx s)\\ createObjects' ptr numObjects val gSize \\\\_ s. P (ksDomScheduleIdx s)\\\"\n apply (simp add: createObjects'_def unless_def alignError_def)\n apply (wp | wpc)+\n apply simp\n done\n\ncrunch ksDomSchedule[wp]: copyGlobalMappings \"\\s. P (ksDomSchedule s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\ncrunch ksDomSchedule[wp]: createNewCaps \"\\s. P (ksDomSchedule s)\"\n (wp: mapM_x_wp' simp: crunch_simps)\n\ncrunch ksDomScheduleIdx[wp]: createNewCaps \"\\s. P (ksDomScheduleIdx s)\"\n (wp: mapM_x_wp' simp: crunch_simps)\n\nlemma createObjects_null_filter':\n \"\\\\s. P (null_filter' (ctes_of s)) \\ makeObjectKO dev ty = Some val \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\addrs a. P (null_filter' (ctes_of a))\\\"\n apply (clarsimp simp: createObjects'_def split_def)\n apply (wp unless_wp|wpc\n | clarsimp simp: alignError_def split del: if_split simp del:fun_upd_apply)+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply fastforce+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp\n apply assumption\n apply simp\n apply (subst data_map_insert_def[symmetric])+\n apply (frule(2) retype_aligned_distinct'[where ko = val])\n apply (erule range_cover_rel)\n apply simp+\n apply (frule(2) retype_aligned_distinct'(2)[where ko = val])\n apply (erule range_cover_rel)\n apply simp+\n apply (frule null_filter_ctes_retype\n [where addrs = \"(new_cap_addrs (unat (((of_nat n)::machine_word) << gbits)) ptr val)\"])\n apply assumption+\n apply (clarsimp simp:field_simps foldr_upd_app_if[folded data_map_insert_def] shiftl_t2n range_cover.unat_of_nat_shift)+\n apply (rule new_cap_addrs_aligned[THEN bspec])\n apply (erule range_cover.aligned[OF range_cover_rel])\n apply simp+\n apply (clarsimp simp:shiftl_t2n field_simps range_cover.unat_of_nat_shift)\n apply (drule subsetD[OF new_cap_addrs_subset,rotated])\n apply (erule range_cover_rel)\n apply simp\n apply simp\n apply (rule ccontr)\n apply clarify\n apply (frule(1) pspace_no_overlapD')\n apply (erule_tac B = \"{x..x+2^objBitsKO y - 1}\" in in_empty_interE[rotated])\n apply (drule(1) pspace_alignedD')\n apply (clarsimp)\n apply (erule is_aligned_no_overflow)\n apply (simp del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff add:Int_ac ptr_add_def p_assoc_help)\n apply (simp add:field_simps foldr_upd_app_if[folded data_map_insert_def] shiftl_t2n)\n apply auto\n done\n\nlemma createNewCaps_null_filter':\n \"\\(\\s. P (null_filter' (ctes_of s)))\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0) \\\n createNewCaps ty ptr n us dev\n \\\\_ s. P (null_filter' (ctes_of s))\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: createNewCaps_def toAPIType_def\n Arch_createNewCaps_def\n split del: if_split cong: option.case_cong)\n apply (cases ty, simp_all split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n apply (rule hoare_pre, wp,simp)\n apply (simp add: createObjects_def makeObjectKO_def APIType_capBits_def objBits_def\n archObjSize_def curDomain_def objBits_if_dev bit_simps\n split del: if_split\n | wp createObjects_null_filter'[where ty = \"Inr ty\" and sz = sz and dev=dev]\n copyGlobalMappings_ctes_of threadSet_ctes_of mapM_x_wp'\n | simp add: objBits_simps\n | fastforce)+\n done\n\ncrunch gsUntypedZeroRanges[wp]: createNewCaps \"\\s. P (gsUntypedZeroRanges s)\"\n (wp: mapM_x_wp' simp: crunch_simps)\n\nlemma untyped_ranges_zero_inv_null_filter:\n \"untyped_ranges_zero_inv (option_map cteCap o null_filter' ctes)\n = untyped_ranges_zero_inv (option_map cteCap o ctes)\"\n apply (simp add: untyped_ranges_zero_inv_def fun_eq_iff null_filter'_def)\n apply clarsimp\n apply (rule_tac f=\"\\caps. x = ran caps\" for caps in arg_cong)\n apply (clarsimp simp: fun_eq_iff map_comp_def untypedZeroRange_def)\n done\n\nlemma untyped_ranges_zero_inv_null_filter_cteCaps_of:\n \"untyped_ranges_zero_inv (cteCaps_of s)\n = untyped_ranges_zero_inv (option_map cteCap o null_filter' (ctes_of s))\"\n by (simp add: untyped_ranges_zero_inv_null_filter cteCaps_of_def)\n\nlemma createNewCaps_urz:\n \"\\untyped_ranges_zero'\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0) \\\n createNewCaps ty ptr n us dev\n \\\\archCaps. untyped_ranges_zero'\\\"\n apply (simp add: untyped_ranges_zero_inv_null_filter_cteCaps_of)\n apply (rule hoare_pre)\n apply (rule untyped_ranges_zero_lift)\n apply (wp createNewCaps_null_filter')+\n apply (auto simp: o_def)\n done\n\nlemma createNewCaps_invs':\n \"\\(\\s. invs' s \\ ct_active' s \\ pspace_no_overlap' ptr sz s\n \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ caps_overlap_reserved' {ptr..ptr + of_nat n * 2^(APIType_capBits ty us) - 1} s\n \\ (ty = APIObjectType ArchTypes_H.CapTableObject \\ us > 0)\n \\ gsMaxObjectSize s > 0)\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings)\\\n createNewCaps ty ptr n us dev\n \\\\rv. invs'\\\"\n (is \"\\?P and K ?Q\\ ?f \\\\rv. invs'\\\")\nproof (rule hoare_gen_asm, elim conjE)\n assume cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0: \"n \\ 0\"\n and sz_limit: \"sz \\ maxUntypedSizeBits\"\n and ptr_cn: \"canonical_address (ptr && ~~ mask sz)\"\n and ptr_km: \"ptr && ~~ mask sz \\ kernel_mappings\"\n have cnc_ct_not_inQ:\n \"\\ct_not_inQ and valid_pspace' and pspace_no_overlap' ptr sz\\\n createNewCaps ty ptr n us dev \\\\_. ct_not_inQ\\\"\n unfolding ct_not_inQ_def\n apply (rule_tac Q=\"\\s. ksSchedulerAction s = ResumeCurrentThread\n \\ (obj_at' (Not \\ tcbQueued) (ksCurThread s) s\n \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s)\"\n in hoare_pre_imp, clarsimp)\n apply (rule hoare_convert_imp [OF createNewCaps_nosch])\n apply (rule hoare_weaken_pre)\n apply (wps createNewCaps_ct)\n apply (wp createNewCaps_obj_at')\n using cover not_0\n apply (fastforce simp: valid_pspace'_def)\n done\n show \"\\?P\\\n createNewCaps ty ptr n us dev\n \\\\rv. invs'\\\"\n apply (simp add: invs'_def valid_state'_def\n pointerInUserData_def typ_at'_def)\n apply (rule hoare_pre)\n apply (wp createNewCaps_valid_pspace [OF not_0 cover sz_limit ptr_cn ptr_km]\n createNewCaps_state_refs_of' [OF cover not_0 ]\n createNewCaps_iflive' [OF cover not_0 ]\n irqs_masked_lift\n createNewCaps_ifunsafe'\n createNewCaps_cur [OF cover not_0]\n createNewCaps_global_refs'\n createNewCaps_valid_arch_state\n valid_irq_node_lift_asm [unfolded pred_conj_def, OF _ createNewCaps_obj_at']\n createNewCaps_irq_handlers' createNewCaps_vms\n createNewCaps_valid_queues\n createNewCaps_valid_queues'\n createNewCaps_pred_tcb_at' cnc_ct_not_inQ\n createNewCaps_ct_idle_or_in_cur_domain'\n createNewCaps_sch_act_wf\n createNewCaps_urz[where sz=sz]\n | simp)+\n using not_0\n apply (clarsimp simp: valid_pspace'_def)\n using cover\n apply (intro conjI)\n apply simp_all\n done\nqed\n\nlemma createObjects_obj_ranges':\n \"\\\\s. (\\x ko. ksPSpace s x = Some ko \\ (obj_range' x ko) \\ S = {}) \\\n pspace_no_overlap' ptr sz s \\\n pspace_aligned' s \\ pspace_distinct' s \\\n S \\ {ptr..(ptr &&~~ mask sz) + 2^sz - 1} = {} \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\\\n createObjects' ptr n val gbits\n \\\\r s. (\\x ko. ksPSpace s x = Some ko \\ (obj_range' x ko) \\ S = {})\\\"\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def del: fun_upd_apply)\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (subst new_cap_addrs_fold')\n apply (simp add: unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply fastforce+\n apply (clarsimp simp: foldr_fun_upd_value)\n apply (subgoal_tac \"range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (erule(1) disjoint_subset[OF obj_range'_subset])\n apply (simp add: Int_commute)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\nlemma createObjects_pred_tcb_at':\n \"\\pred_tcb_at' proj P t and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\\\n createObjects ptr n val gbits \\\\rv. pred_tcb_at' proj P t\\\"\n apply (simp add: pred_tcb_at'_def createObjects_def)\n apply (wp createObjects_orig_obj_at')\n apply auto\n done\n\nlemma createObjects_ex_cte_cap_to [wp]:\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\ pspace_aligned' s \\\n pspace_distinct' s \\ ex_cte_cap_to' p s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\r. ex_cte_cap_to' p\\\"\n apply (simp add: ex_cte_cap_to'_def createObjects_def)\n apply (rule hoare_lift_Pf2 [where f=\"irq_node'\"])\n apply (wp hoare_vcg_ex_lift createObjects_orig_cte_wp_at'[where sz = sz])\n apply simp\n apply wp\n done\n\nlemma createObjects_orig_obj_at3:\n \"\\\\s. obj_at' P p s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n pspace_aligned' s \\\n pspace_distinct' s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\r. obj_at' P p\\\"\n by (wp createObjects_orig_obj_at'[where sz = sz] | simp add: createObjects_def)+\n\nlemma createObjects_sch:\n \"\\(\\s. sch_act_wf (ksSchedulerAction s) s) and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\\\n createObjects ptr n val gbits\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (rule hoare_gen_asm)\n apply (wp sch_act_wf_lift_asm createObjects_pred_tcb_at' createObjects_orig_obj_at3 | force)+\n done\n\nlemma createObjects_queues:\n \"\\\\s. valid_queues s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\\\n createObjects ptr n val gbits\n \\\\rv. valid_queues\\\"\n apply (wp valid_queues_lift_asm [unfolded pred_conj_def, OF createObjects_orig_obj_at3]\n createObjects_pred_tcb_at' [unfolded pred_conj_def])\n apply fastforce\n apply wp+\n apply fastforce\n done\n\nlemma createObjects_queues':\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. valid_queues' s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\\\n createObjects ptr n val gbits\n \\\\rv. valid_queues'\\\"\n apply (simp add: createObjects_def)\n apply (wp valid_queues_lift_asm')\n apply (wp createObjects_orig_obj_at2')\n apply clarsimp\n apply assumption\n apply wp\n using no_tcb\n apply fastforce\n done\n\nlemma createObjects_no_cte_ifunsafe':\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n if_unsafe_then_cap' s\\\n createObjects ptr n val gbits\n \\\\rv s. if_unsafe_then_cap' s\\\"\n apply (simp only: if_unsafe_then_cap'_def ex_cte_cap_to'_def\n imp_conv_disj)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF createObjects_ksInterrupt])\n apply (simp add: createObjects_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift hoare_vcg_imp_lift\n createObjects_orig_cte_wp_at2' hoare_vcg_ex_lift)\n apply (simp add: valid_pspace'_def disj_imp)\n using no_cte no_tcb\n apply fastforce\n done\n\nlemma createObjects_no_cte_valid_global:\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_global_refs' s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_global_refs' s\\\"\n apply (simp add: valid_global_refs'_def valid_cap_sizes'_def valid_refs'_def)\n apply (rule_tac Q=\"\\rv s. \\ptr. \\ cte_wp_at' (\\cte. (kernel_data_refs \\ capRange (cteCap cte) \\ {}\n \\ 2 ^ capBits (cteCap cte) > gsMaxObjectSize s)) ptr s \\ global_refs' s \\ kernel_data_refs\"\n in hoare_post_imp)\n apply (auto simp: cte_wp_at_ctes_of linorder_not_less elim!: ranE)[1]\n apply (rule hoare_pre)\n apply (simp add: global_refs'_def)\n apply (rule hoare_use_eq [where f=ksArchState, OF createObjects_ksArch])\n apply (rule hoare_use_eq [where f=ksIdleThread, OF createObjects_it])\n apply (rule hoare_use_eq [where f=irq_node', OF createObjects_ksInterrupt])\n apply (rule hoare_use_eq [where f=gsMaxObjectSize], wp)\n apply (simp add: createObjects_def)\n apply (wp hoare_vcg_all_lift createObjects_orig_cte_wp_at2')\n using no_cte no_tcb\n apply (simp add: split_def cte_wp_at_ctes_of split: option.splits)\n apply (clarsimp simp: global_refs'_def)\n apply (auto simp: ball_ran_eq linorder_not_less[symmetric])\n done\n\nlemma createObjects'_typ_at:\n \"\\\\s. n \\ 0 \\\n range_cover ptr sz (objBitsKO val + gbits) n \\\n typ_at' T p s \\\n pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. typ_at' T p s\\\"\n apply (rule hoare_grab_asm)+\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def typ_at'_def)\n apply (subst new_cap_addrs_fold')\n apply (simp add: unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp+\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp)+\n apply (subst data_map_insert_def[symmetric])\n apply clarsimp\n apply (subgoal_tac \"range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_ko_wp_at',simp+)+\n apply clarsimp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add: lookupAround2_None1)\n apply (intro conjI impI allI)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply (fastforce simp: ko_wp_at'_def)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp: ptr_add_def p_assoc_help)\n apply (simp add: dom_def)\n apply (fastforce simp: ko_wp_at'_def)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\nlemma createObjects_valid_arch:\n \"\\\\s. valid_arch_state' s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n createObjects ptr n val gbits\n \\\\rv s. valid_arch_state' s\\\"\n apply (simp add: valid_arch_state'_def valid_asid_table'_def\n valid_global_pts'_def vspace_table_at'_defs)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=ksArchState, OF createObjects_ksArch])\n apply (simp add: createObjects_def)\n apply (wp createObjects'_typ_at hoare_vcg_all_lift hoare_vcg_const_imp_lift\n hoare_vcg_const_Ball_lift)\n apply (simp add: o_def)\n apply auto\n done\n\nlemma createObjects_irq_state:\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_irq_node' (irq_node' s) s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_irq_node' (irq_node' s) s\\\"\n apply (wp valid_irq_node_lift_asm [unfolded pred_conj_def, OF _ createObjects_orig_obj_at3])\n apply auto\n done\n\nlemma createObjects_no_cte_irq_handlers:\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_irq_handlers' s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_irq_handlers' s\\\"\n apply (simp add: valid_irq_handlers_cte_wp_at_form' createObjects_def irq_issued'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createObjects_orig_cte_wp_at2')\n using no_cte no_tcb by (auto simp: split_def split: option.splits)\n\nlemma createObjects_cur':\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n cur_tcb' s\\\n createObjects ptr n val gbits\n \\\\rv s. cur_tcb' s\\\"\n apply (rule hoare_post_imp [where Q=\"\\rv s. \\t. ksCurThread s = t \\ tcb_at' t s\"])\n apply (simp add: cur_tcb'_def)\n apply (wp hoare_vcg_ex_lift createObjects_orig_obj_at3)\n apply (clarsimp simp: cur_tcb'_def)\n apply auto\n done\n\nlemma createObjects_vms'[wp]:\n \"\\(\\_. (range_cover ptr sz (objBitsKO val + gbits) n \\ 0 < n)) and pspace_aligned' and\n pspace_distinct' and pspace_no_overlap' ptr sz and valid_machine_state'\\\n createObjects ptr n val gbits\n \\\\rv. valid_machine_state'\\\"\n apply (simp add: valid_machine_state'_def pointerInUserData_def pointerInDeviceData_def\n typ_at'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift createObjects_orig_ko_wp_at2'\n | simp add: createObjects_def)+\n apply auto\n done\n\nlemma createObjects_ct_idle_or_in_cur_domain':\n \"\\ct_active' and valid_pspace' and pspace_no_overlap' ptr sz\n and ct_idle_or_in_cur_domain'\n and K (range_cover ptr sz (objBitsKO val + gSize) n \\ n \\ 0)\\\n createObjects ptr n val gSize\n \\\\_. ct_idle_or_in_cur_domain'\\\"\n apply (rule hoare_gen_asm)\n apply (wp ct_idle_or_in_cur_domain'_lift_futz createObjects_obj_at_other[where sz=sz])\n apply simp_all\n done\n\nlemma untyped_zero_ranges_cte_def:\n \"untyped_ranges_zero_inv (cteCaps_of s) rs\n = (\\r. (\\p. cte_wp_at' (\\cte. untypedZeroRange (cteCap cte) = Some r) p s)\n = (r \\ rs))\"\n apply (clarsimp simp: untyped_ranges_zero_inv_def cte_wp_at_ctes_of\n cteCaps_of_def set_eq_iff ran_def map_comp_Some_iff)\n apply (safe, metis+)\n done\n\nlemma createObjects_untyped_ranges_zero':\n assumes moKO: \"makeObjectKO dev ty = Some val\"\n shows\n \"\\ct_active' and valid_pspace' and pspace_no_overlap' ptr sz\n and untyped_ranges_zero'\n and K (range_cover ptr sz (objBitsKO val + gSize) n \\ n \\ 0)\\\n createObjects ptr n val gSize\n \\\\_. untyped_ranges_zero'\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: untyped_zero_ranges_cte_def iff_conv_conj_imp\n createObjects_def)\n apply (simp only: imp_conv_disj not_all not_ex)\n apply (rule hoare_pre)\n apply (wp hoare_vcg_all_lift hoare_vcg_ex_lift hoare_vcg_conj_lift\n hoare_vcg_disj_lift createObjects_orig_cte_wp_at2'[where sz=sz])\n apply (clarsimp simp: valid_pspace'_def)\n apply (cut_tac moKO[symmetric])\n apply (simp add: makeObjectKO_def projectKO_opt_tcb projectKO_opt_cte\n split: sum.split_asm kernel_object.split_asm\n arch_kernel_object.split_asm\n object_type.split_asm apiobject_type.split_asm)\n apply (simp add: makeObject_tcb tcb_cte_cases_def cteSizeBits_def makeObject_cte\n untypedZeroRange_def)\n apply (simp add: makeObject_cte untypedZeroRange_def)\n done\n\nlemma createObjects_no_cte_invs:\n assumes moKO: \"makeObjectKO dev ty = Some val\"\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. range_cover ptr sz ((objBitsKO val) + gbits) n \\ n \\ 0\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ invs' s \\ ct_active' s\n \\ pspace_no_overlap' ptr sz s \\ ptr \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ caps_overlap_reserved' {ptr..ptr + of_nat (n * 2 ^ gbits * 2 ^ objBitsKO val) - 1} s\n \\ caps_no_overlap'' ptr sz s \\ refs_of' val = {} \\ \\ live' val\\\n createObjects ptr n val gbits\n \\\\rv. invs'\\\"\nproof -\n have co_ct_not_inQ:\n \"\\range_cover ptr sz ((objBitsKO val) + gbits) n; n \\ 0\\ \\\n \\\\s. ct_not_inQ s \\ pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n val gbits \\\\_. ct_not_inQ\\\"\n (is \"\\ _; _ \\ \\ \\\\s. ct_not_inQ s \\ ?REST s\\ _ \\_\\\")\n apply (simp add: ct_not_inQ_def)\n apply (rule_tac Q=\"\\s. (ksSchedulerAction s = ResumeCurrentThread) \\\n (obj_at' (Not \\ tcbQueued) (ksCurThread s) s \\ ?REST s)\"\n in hoare_pre_imp, clarsimp)\n apply (rule hoare_convert_imp [OF createObjects_nosch])\n apply (rule hoare_weaken_pre)\n apply (wps createObjects_ct)\n apply (wp createObjects_obj_at_other)\n apply (simp)+\n done\n show ?thesis\n apply (rule hoare_grab_asm)+\n apply (clarsimp simp: invs'_def valid_state'_def)\n apply wp\n apply (rule hoare_pre)\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def,wp createObjects_valid_pspace_untyped')\n apply (wp assms | simp add: objBits_def)+\n apply (wp createObjects_sch createObjects_queues)\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_state_refs_of'')\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_iflive')\n apply (wp createObjects_no_cte_ifunsafe' irqs_masked_lift\n createObjects_idle' createObjects_no_cte_valid_global\n createObjects_valid_arch createObjects_irq_state\n createObjects_no_cte_irq_handlers createObjects_cur'\n createObjects_queues' [OF no_tcb]\n assms | simp add: objBits_def )+\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_idle')\n apply (wp createObjects_no_cte_ifunsafe' irqs_masked_lift\n createObjects_idle' createObjects_no_cte_valid_global\n createObjects_valid_arch createObjects_irq_state\n createObjects_no_cte_irq_handlers createObjects_cur'\n createObjects_queues' [OF no_tcb] assms\n createObjects_pspace_domain_valid co_ct_not_inQ\n createObjects_ct_idle_or_in_cur_domain'\n createObjects_untyped_ranges_zero'[OF moKO]\n | simp)+\n apply clarsimp\n using no_cte no_tcb\n apply ((intro conjI; assumption?); simp add: valid_pspace'_def objBits_def)\n apply (fastforce simp add: split_def split: option.splits)\n apply (clarsimp simp: invs'_def no_tcb valid_state'_def no_cte split: option.splits)\n done\nqed\n\nlemma corres_retype_update_gsI:\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us =\n objBitsKO ko + gbits\"\n and check: \"sz < obj_bits_api (APIType_map2 ty) us \\\n sz < objBitsKO ko + gbits\"\n and usv: \"APIType_map2 ty = Structures_A.CapTableObject \\ 0 < us\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype\n (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and f: \"f = update_gs (APIType_map2 ty) us\"\n shows \"corres (\\rv rv'. rv' = g rv)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s)\n (retype_region2 ptr n us (APIType_map2 ty) dev)\n (do addrs \\ createObjects ptr n ko gbits;\n _ \\ modify (f (set addrs));\n return (g addrs)\n od)\"\n using corres_retype' [OF not_zero aligned obj_bits_api check usv ko orr cover]\n by (simp add: f)\n\nlemma gcd_corres: \"corres (=) \\ \\ (gets cur_domain) curDomain\"\n by (simp add: curDomain_def state_relation_def)\n\nlemma retype_region2_extra_ext_mapM_x_corres:\n shows \"corres dc\n (valid_etcbs and (\\s. \\addr\\set addrs. tcb_at addr s))\n (\\s. \\addr\\set addrs. tcb_at' addr s)\n (retype_region2_extra_ext addrs Structures_A.apiobject_type.TCBObject)\n (mapM_x (\\addr. do cdom \\ curDomain;\n threadSet (tcbDomain_update (\\_. cdom)) addr\n od)\n addrs)\"\n apply (rule corres_guard_imp)\n apply (simp add: retype_region2_extra_ext_def curDomain_mapM_x_futz[symmetric] when_def)\n apply (rule corres_split_eqr[OF gcd_corres])\n apply (rule_tac S=\"Id \\ {(x, y). x \\ set addrs}\"\n and P=\"\\s. (\\t \\ set addrs. tcb_at t s) \\ valid_etcbs s\"\n and P'=\"\\s. \\t \\ set addrs. tcb_at' t s\"\n in corres_mapM_x)\n apply simp\n apply (rule corres_guard_imp)\n apply (rule ethread_set_corres, simp_all add: etcb_relation_def non_exst_same_def)[1]\n apply (case_tac tcb')\n apply simp\n apply fastforce\n apply fastforce\n apply (wp hoare_vcg_ball_lift | simp)+\n apply auto[1]\n apply (wp | simp add: curDomain_def)+\n done\n\nlemma retype_region2_extra_ext_trivial:\n \"ty \\ APIType_map2 (Inr (APIObjectType apiobject_type.TCBObject))\n \\ retype_region2_extra_ext ptrs ty = return ()\"\nby (simp add: retype_region2_extra_ext_def when_def APIType_map2_def)\n\nlemma retype_region2_retype_region_PageTableObject:\n \"retype_region ptr n us (APIType_map2 (Inr PageTableObject)) dev =\n (retype_region2 ptr n us (APIType_map2 (Inr PageTableObject)) dev :: obj_ref list det_ext_monad)\"\n by (simp add: retype_region2_ext_retype_region retype_region2_extra_ext_def when_def\n APIType_map2_def)\n\nlemma retype_region2_valid_etcbs[wp]:\"\\valid_etcbs\\ retype_region2 a b c d dev \\\\_. valid_etcbs\\\"\n apply (simp add: retype_region2_def)\n apply (simp add: retype_region2_ext_def bind_assoc)\n apply wp\n apply (clarsimp simp del: fun_upd_apply)\n apply (blast intro: valid_etcb_fold_update)\n done\n\nlemma retype_region2_obj_at:\n assumes tytcb: \"ty = Structures_A.apiobject_type.TCBObject\"\n shows \"\\\\\\ retype_region2 ptr n us ty dev \\\\rv s. \\x \\ set rv. tcb_at x s\\\"\n using tytcb unfolding retype_region2_def\n apply (simp only: return_bind bind_return foldr_upd_app_if fun_app_def K_bind_def)\n apply (wp dxo_wp_weak | simp)+\n apply (auto simp: obj_at_def default_object_def is_tcb_def)\n done\n\nlemma createObjects_tcb_at':\n \"\\range_cover ptr sz (objBitsKO (injectKOS (makeObject::tcb))) n; n \\ 0\\ \\\n \\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n (KOTCB makeObject) 0 \\\\ptrs s. \\addr\\set ptrs. tcb_at' addr s\\\"\n apply (rule hoare_strengthen_post[OF createObjects_ko_at_strg[where val = \"(makeObject :: tcb)\"]])\n apply (auto simp: obj_at'_def project_inject objBitsKO_def objBits_def makeObject_tcb)\n done\n\nlemma init_arch_objects_APIType_map2_noop:\n \"init_arch_objects (APIType_map2 tp) ptr n m addrs = return ()\"\n apply (simp add: init_arch_objects_def APIType_map2_def)\n done\n\nlemma data_page_relation_retype:\n \"obj_relation_retype (ArchObj (DataPage False pgsz)) KOUserData\"\n \"obj_relation_retype (ArchObj (DataPage True pgsz)) KOUserDataDevice\"\n apply (simp_all add: obj_relation_retype_def shiftl_t2n mult_ac\n objBits_simps pbfs_atleast_pageBits)\n apply (clarsimp simp: image_def)+\n done\n\nlemma corres_retype_region_createNewCaps:\n \"corres ((\\r r'. length r = length r' \\ list_all2 cap_relation r r')\n \\ map (\\ref. default_cap (APIType_map2 (Inr ty)) ref us dev))\n (\\s. valid_pspace s \\ valid_mdb s \\ valid_etcbs s \\ valid_list s \\ valid_arch_state s\n \\ caps_no_overlap y sz s \\ pspace_no_overlap_range_cover y sz s\n \\ caps_overlap_reserved {y..y + of_nat n * 2 ^ (obj_bits_api (APIType_map2 (Inr ty)) us) - 1} s\n \\ (\\slot. cte_wp_at (\\c. up_aligned_area y sz \\ cap_range c \\ cap_is_device c = dev) slot s)\n \\ (APIType_map2 (Inr ty) = Structures_A.CapTableObject \\ 0 < us))\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' y sz s\n \\ valid_pspace' s \\ valid_arch_state' s\n \\ range_cover y sz (obj_bits_api (APIType_map2 (Inr ty)) us) n \\ n\\ 0)\n (do x \\ retype_region y n us (APIType_map2 (Inr ty)) dev :: obj_ref list det_ext_monad;\n init_arch_objects (APIType_map2 (Inr ty)) y n us x;\n return x od)\n (createNewCaps ty y n us dev)\"\n apply (rule_tac F=\"range_cover y sz (obj_bits_api (APIType_map2 (Inr ty)) us) n\n \\ n \\ 0 \\ (APIType_map2 (Inr ty) = Structures_A.CapTableObject \\ 0 < us)\"\n in corres_req, simp)\n apply (clarsimp simp add: createNewCaps_def toAPIType_def split del: if_split cong: if_cong)\n apply (subst init_arch_objects_APIType_map2)\n apply (cases ty, simp_all add: Arch_createNewCaps_def split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n \\ \\Untyped\\\n apply (simp add: retype_region_def obj_bits_api_def APIType_map2_def\n split del: if_split cong: if_cong)\n apply (subst upto_enum_red')\n apply (drule range_cover_not_zero[rotated])\n apply simp\n apply unat_arith\n apply (clarsimp simp: list_all2_same enum_word_def range_cover.unat_of_nat_n\n list_all2_map1 list_all2_map2 ptr_add_def fromIntegral_def\n toInteger_nat fromInteger_nat)\n apply (subst unat_of_nat_minus_1)\n apply (rule le_less_trans[OF range_cover.range_cover_n_le(2) power_strict_increasing])\n apply simp\n apply (clarsimp simp: range_cover_def)\n apply (arith+)[4]\n \\ \\TCB, EP, NTFN\\\n apply (simp_all add: retype_region2_ext_retype_region\n bind_cong[OF curDomain_mapM_x_futz refl, unfolded bind_assoc]\n split del: if_split)[8]\n apply (rule corres_guard_imp)\n apply (rule corres_split_eqr)\n apply (rule corres_retype[where 'a = tcb],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def\n APIType_map2_def makeObjectKO_def\n other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply (rule corres_split_nor)\n apply (simp add: APIType_map2_def)\n apply (rule retype_region2_extra_ext_mapM_x_corres)\n apply (rule corres_trivial, simp)\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2\n objBits_simps APIType_map2_def)\n apply wp\n apply wp\n apply ((wp retype_region2_obj_at | simp add: APIType_map2_def)+)[1]\n apply ((wp createObjects_tcb_at'[where sz=sz]\n | simp add: APIType_map2_def objBits_simps' obj_bits_api_def)+)[1]\n apply simp\n apply simp\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: liftM_def[symmetric] split del: if_split)\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype[where 'a = endpoint],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def APIType_map2_def\n makeObjectKO_def other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2 objBits_simps\n APIType_map2_def)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: liftM_def[symmetric] split del: if_split)\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype[where 'a = notification],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def APIType_map2_def\n makeObjectKO_def other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2 objBits_simps\n APIType_map2_def)\n \\ \\CapTable\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (subst bind_assoc_return_reverse[of \"createObjects y n (KOCTE makeObject) us\"])\n apply (subst liftM_def[of \"map (\\addr. capability.CNodeCap addr us 0 0)\", symmetric])\n apply simp\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def APIType_map2_def\n makeObjectKO_def slot_bits_def field_simps ext)[1]\n apply (simp add: range_cover_def)\n apply (rule captable_relation_retype,simp add: range_cover_def word_bits_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2 objBits_simps\n allRights_def APIType_map2_def\n split del: if_split)\n apply (in_case \\HugePageObject\\)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI;\n clarsimp simp: obj_bits_api_def3 APIType_map2_def objBits_simps ext\n default_object_def default_arch_object_def makeObjectKO_def\n data_page_relation_retype bit_simps\n elim!: range_cover.aligned;\n assumption)\n apply fastforce+\n apply (simp add: APIType_map2_def arch_default_cap_def vm_read_write_def vmrights_map_def\n list_all2_map1 list_all2_map2 list_all2_same)\n apply (in_case \\SmallPageObject\\)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI;\n clarsimp simp: obj_bits_api_def3 APIType_map2_def objBits_simps ext\n default_object_def default_arch_object_def makeObjectKO_def\n data_page_relation_retype\n elim!: range_cover.aligned;\n assumption)\n apply fastforce+\n apply (simp add: APIType_map2_def arch_default_cap_def vm_read_write_def vmrights_map_def\n list_all2_map1 list_all2_map2 list_all2_same)\n apply (in_case \\LargePageObject\\)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI;\n clarsimp simp: obj_bits_api_def3 APIType_map2_def objBits_simps ext\n default_object_def default_arch_object_def makeObjectKO_def\n data_page_relation_retype\n elim!: range_cover.aligned;\n assumption)\n apply fastforce+\n apply (simp add: APIType_map2_def arch_default_cap_def vm_read_write_def vmrights_map_def\n list_all2_map1 list_all2_map2 list_all2_same)\n apply (in_case \\PageTableObject\\)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp_all add: corres_liftM2_simp[unfolded liftM_def])\n apply (rule corres_guard_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop)\n apply (rule corres_rel_imp)\n apply (rule corres_retype[where 'a=pte];\n simp add: APIType_map2_def obj_bits_api_def default_arch_object_def objBits_simps\n bit_simps makeObjectKO_def range_cover.aligned)\n apply (rule pagetable_relation_retype)\n apply (wp | simp)+\n apply (clarsimp simp: list_all2_map1 list_all2_map2 list_all2_same\n APIType_map2_def arch_default_cap_def)\n apply fastforce+\n done\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/refine/RISCV64/Retype_R.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5312093733737563, "lm_q2_score": 0.28140560742914383, "lm_q1q2_score": 0.14948529638629676}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__41_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__41_on_rules imports n_g2kAbsAfter_lemma_on_inv__41\nbegin\nsection{*All lemmas on causal relation between inv__41*}\nlemma lemma_inv__41_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__41 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__41) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__41) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__41_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5312093733737563, "lm_q2_score": 0.2814055953761018, "lm_q1q2_score": 0.14948528998360786}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__45_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__45_on_rules imports n_g2kAbsAfter_lemma_on_inv__45\nbegin\nsection{*All lemmas on causal relation between inv__45*}\nlemma lemma_inv__45_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__45 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__45) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__45_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.290980853917813, "lm_q1q2_score": 0.148899734600742}} {"text": "(*\n * Copyright 2016, NICTA\n *\n * This software may be distributed and modified according to the terms of\n * the GNU General Public License version 2. Note that NO WARRANTY is provided.\n * See \"LICENSE_GPLv2.txt\" for details.\n *\n * @TAG(NICTA_GPL)\n *)\n\ntheory OstoreInvS\nimports\n \"../impl/BilbyFs_Shallow_Desugar_Tuples\"\n \"../impl/BilbyFs_ShallowConsts_Desugar_Tuples\"\n \"../spec/OstoreS\"\n \"../spec/SerialS\"\n \"../spec/UbiS\"\n \"../adt/BufferT\"\n \"../adt/RbtT\"\n \"~~/src/HOL/Library/Sublist\"\nbegin\n\ndefinition\n \\_index :: \"IndexState\\<^sub>T \\ (ObjId \\ ObjAddr\\<^sub>T)\"\nwhere\n \"\\_index index_st \\ \\rbt (addrs\\<^sub>f index_st)\"\n\nconsts \\_fsm_gim :: \"(ObjId, GimNode\\<^sub>T) Rbt \\ (ObjId \\ GimNode\\<^sub>T)\"\n\ndefinition\n nopad :: \"U8 list \\ U8 list\"\nwhere\n \"nopad xs \\\n dropWhile (op = bilbyFsPadByte) xs\"\n\nlemma pTrans_termination[simp]:\n \"is_valid_ObjHeader obj (d # data) \\\n Suc (length data) - unat (Obj.len\\<^sub>f obj) < Suc (length data)\"\n \"is_valid_ObjHeader obj data \\\n (length data) - unat (Obj.len\\<^sub>f obj) < (length data)\"\n unfolding bilbyFsObjHeaderSize_def\n by (drule is_valid_ObjHeader_len_facts,\n clarsimp simp add: bilbyFsObjHeaderSize_def, unat_arith)+\n\ntype_synonym Trans = \"Obj\\<^sub>T list\"\nfun\n pTrans :: \"U8 list \\ (U8 list \\ Trans)\"\nwhere\n \"pTrans [] = ([],[])\"\n|pTrans_Cons: \"pTrans data =\n (let obj = pObj data 0\n (* We stop at the first obviously invalid object. *)\n in if \\is_valid_ObjHeader obj data then\n (drop (max (unat bilbyFsObjHeaderSize) (unat (Obj.len\\<^sub>f obj))) data, [])\n else if Obj.trans\\<^sub>f obj = bilbyFsTransIn then\n (\\(d,os). (d, (obj#os))) (pTrans (drop (unat (Obj.len\\<^sub>f obj)) data))\n else\n (drop (unat (Obj.len\\<^sub>f obj)) data, [obj])\n)\"\n\nlemma drop_0_eq[simp]:\n \"\\n. xs = drop n xs\"\n by (rule_tac x=0 in exI, simp)\n\nlemma pTrans_data_is_substring:\n \"(\\n. fst (pTrans data) = drop n data)\"\n by (induct data rule: pTrans.induct) (fastforce simp: Let_def prod.case_eq_if)+\n\nlemma pTrans_length_helper:\nassumes len: \"is_valid_ObjHeader (pObj (d # data) 0) (d # data)\"\nshows\n \"length (fst (pTrans (drop (unat (Obj.len\\<^sub>f (pObj (d # data) 0))) (d # data)))) < length (d # data)\"\n using pTrans_data_is_substring apply clarsimp\n apply (drule_tac x=\"(drop (unat (Obj.len\\<^sub>f (pObj (d # data) 0))) (d # data))\" in meta_spec)\n using is_valid_ObjHeader_len[OF len] apply (clarsimp simp: bilbyFsObjHeaderSize_def)\n apply unat_arith\n done\n\ntext {*\nThe termination proof above does not look at the shape of the returned\nvalues of pTrans, it only shows that the size of the input\ndata list decreases.\nTo prove termination of \\_updates_fun we need to know that the returned data\nlist is smaller than the one received as argument.\nI could not figure a way to reuse the termination proof above to show\nthat \\_updates_fun terminates. I wouldn't be surprise to see that there's\na simpler way to achieve my goal. If you find one, please educate me.\n*}\nlemma pTrans_termination_argument:\n \"(nd#nds, o'#os) = pTrans (d#data) \\ length (nd#nds) < length (d#data)\"\n apply (clarsimp simp del: list.size split:split_if_asm\n simp : bilbyFsObjHeaderSize_def Let_def prod.case_eq_if)\n apply (fastforce dest: pTrans_length_helper simp: prod.case_eq_if)\n done\n\ndefinition\n is_valid_addr :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ ObjAddr\\<^sub>T \\ bool\"\nwhere\n \"is_valid_addr mount_st ostore_st addr \\\n ebnum\\<^sub>f addr < nb_eb\\<^sub>f (super\\<^sub>f mount_st) \\\n bilbyFsFirstLogEbNum \\ ebnum\\<^sub>f addr \\\n bilbyFsMinObjSize \\ ObjAddr.len\\<^sub>f addr \\\n offs\\<^sub>f addr < offs\\<^sub>f addr + ObjAddr.len\\<^sub>f addr \\\n offs\\<^sub>f addr + ObjAddr.len\\<^sub>f addr \\ eb_size\\<^sub>f (super\\<^sub>f mount_st) \\\n (ebnum\\<^sub>f addr = wbuf_eb\\<^sub>f ostore_st \\\n (offs\\<^sub>f addr + ObjAddr.len\\<^sub>f addr \\ used\\<^sub>f ostore_st))\"\n\n\ntext {* It turns out that transactions can be separated by few bilbyFsPadByte bytes. \nThis happens when there isn't enough room for a padding object to fill up a\nhardware page. Thus there cannot be such padding area at an offset corresponding\nto the beginning of a page.\n*}\nfunction\n list_trans :: \"U8 list \\ (U8 list \\ Trans list)\"\nwhere\n\"list_trans data = \n (case pTrans data of\n (_, []) \\ (data, []) (* We return the beginning of an invalid transaction as it's obviously non-empty *)\n | ([],objs) \\ ([], [objs])\n | (newdata, objs) \\\n (*let objs = if length objs = 1 \\\n otype\\<^sub>f (objs!0) = bilbyFsObjTypePad then [] else objs\n in*) (\\(d,txs). (d,objs#txs)) (list_trans (nopad newdata)))\"\n by pat_completeness auto\n termination\n apply (relation \"measure length\")\n apply (clarsimp simp del: pTrans.simps split:prod.splits)\n apply (case_tac \"data\")\n apply clarsimp\n apply (fastforce dest:pTrans_termination_argument\n simp: nopad_def dropWhile_eq_drop)\n done\n\ndefinition\n list_trans_no_pad :: \"U8 list \\ (U8 list \\ Trans list)\"\nwhere\n \"list_trans_no_pad data \\\n (case list_trans data of\n (rem, txs) \\\n (rem, filter (\\tx. \\ (length tx = 1 \\ otype\\<^sub>f (tx!0) = bilbyFsObjTypePad)) txs))\"\n\nlemma list_trans_no_pad_Cons[simp]:\n \"list_trans_no_pad (x#xs) =\n (fst (list_trans (x # xs)), \n [tx\\snd (list_trans (x # xs)). \\ (length tx = 1 \\ otype\\<^sub>f (tx!0) = bilbyFsObjTypePad)])\"\n by (simp add: list_trans_no_pad_def prod.case_eq_if del: list_trans.simps)\n\nlemma list_trans_no_pad_Nil[simp]:\n \"list_trans_no_pad [] = ([], [])\"\n by (simp add: list_trans_no_pad_def)\n\n\ntype_synonym EbLog = \"Trans list\"\n\ndefinition\n list_eb_log :: \"ubi_leb list \\ EbLog list\"\nwhere\n \"list_eb_log wubi \\\n map (snd o list_trans_no_pad) (drop (unat bilbyFsFirstLogEbNum) wubi)\"\n\ndefinition\n prune_ostore :: \"Obj\\<^sub>T \\ ostore_map \\ ostore_map\"\nwhere\n \"prune_ostore del omap \\\n (\\oid. case omap oid of\n option.Some obj \\\n if obj_is_deleted_by obj del then\n option.None\n else\n option.Some obj\n | option.None \\ option.None)\"\n\ndefinition\n trans_order :: \"Obj\\<^sub>T list \\ U64\"\nwhere\n \"trans_order objs \\ Obj.sqnum\\<^sub>f ((sort_key Obj.sqnum\\<^sub>f objs)!0)\"\n \ndefinition\n abstract_mount_\\_ostore :: \"ubi_leb list \\ ostore_map\"\nwhere\n \"abstract_mount_\\_ostore wubi \\\n let alltrans = (concat $ list_eb_log wubi);\n alltrans' = sort_key trans_order alltrans \n in fold id (map ostore_update alltrans') Map.empty\"\n \ntext {* @{term mount_\\_ostore} returns the logical representation of the object\nstore curently stored (synchronised) on medium. *}\ndefinition\n mount_\\_ostore :: \"ubi_leb list \\ ostore_map\"\nwhere\n \"mount_\\_ostore wubi \\ \n let lel = list_eb_log wubi ;\n delobjs = concat $ concat $ map (map (filter obj_is_del)) lel;\n delfree_lel = map (map (filter (Not o obj_is_del))) lel;\n ostore_map = fold id (map (\\ltx. fold id (map ostore_update ltx)) delfree_lel) Map.empty\n in fold prune_ostore delobjs ostore_map\"\n\ndefinition\n ostore_get_obj :: \"OstoreState\\<^sub>T \\ ObjAddr\\<^sub>T \\ Obj\\<^sub>T\"\nwhere\n \"ostore_get_obj ostore_st addr \\\n let buf = (if ebnum\\<^sub>f addr = wbuf_eb\\<^sub>f ostore_st then\n (\\wa $ data\\<^sub>f $ wbuf\\<^sub>f ostore_st)\n else\n \\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st)!(unat $ ebnum\\<^sub>f addr))\n in pObj (take (unat (ObjAddr.offs\\<^sub>f addr) + unat (ObjAddr.len\\<^sub>f addr)) buf) (offs\\<^sub>f addr)\"\n\ndefinition\n \\_ostore_medium :: \"OstoreState\\<^sub>T \\ ostore_map\"\nwhere\n \"\\_ostore_medium ostore_st \\ abstract_mount_\\_ostore (\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st))\"\n \ntext {* \\_updates: returns updates not synchronised to medium yet *}\ndefinition\n \\_updates :: \"OstoreState\\<^sub>T \\ (ostore_map \\ ostore_map) list\"\nwhere\n \"\\_updates ostore_st \\\n (map ostore_update $ snd $ list_trans_no_pad \n (buf_slice (wbuf\\<^sub>f ostore_st) (sync_offs\\<^sub>f ostore_st) (used\\<^sub>f ostore_st)))\"\n\ntext {* \\_ostore_uptodate: returns the logical view of the object store when all\n updates are applied.\n*}\n\ndefinition\n \\_ostore_uptodate :: \"OstoreState\\<^sub>T \\ ostore_map\"\nwhere\n \"\\_ostore_uptodate ostore_st \\\n fold id (\\_updates ostore_st) (\\_ostore_medium ostore_st)\"\n\ndefinition\n \\_ostore_runtime :: \"OstoreState\\<^sub>T \\ ostore_map\"\nwhere\n \"\\_ostore_runtime ostore_st oid \\\n (case (\\_index $ index_st\\<^sub>f ostore_st) oid of\n option.None \\ option.None\n | option.Some addr \\\n option.Some $ ostore_get_obj ostore_st addr)\"\n\ndefinition\n is_valid_ObjIn :: \"Obj\\<^sub>T \\ U8 list \\ bool\"\nwhere\n \"is_valid_ObjIn obj buf \\\n is_valid_ObjHeader obj buf \\ Obj.trans\\<^sub>f (pObj buf 0) = bilbyFsTransIn\"\n\ndefinition\n is_valid_ObjCommit :: \"Obj\\<^sub>T \\ U8 list \\ bool\"\nwhere\n \"is_valid_ObjCommit obj buf \\\n is_valid_ObjHeader obj buf \\ Obj.trans\\<^sub>f (pObj buf 0) = bilbyFsTransCommit\"\n\nlemma bilbyFsTrans_diff[simp]:\n \"bilbyFsTransIn \\ bilbyFsTransCommit\"\n \"bilbyFsTransCommit \\ bilbyFsTransIn\"\n unfolding bilbyFsTransIn_def bilbyFsTransCommit_def\n by simp+\n\nlemmas is_valid_ObjTrans = is_valid_ObjIn_def is_valid_ObjCommit_def\n\nlemma drop_n_ge_0:\n \"0 drop n (v # va) = drop (n - 1) va\"\n by (case_tac n, simp+)\n\nlemma is_valid_ObjHeader_drop_non_zero: \n \"is_valid_ObjHeader (pObj (v # va) 0) (v # va) \\\n drop (unat (Obj.len\\<^sub>f (pObj (v # va) 0))) (v # va) = drop (unat (Obj.len\\<^sub>f (pObj (v # va) 0)) - 1) (va)\n \"\n apply (frule is_valid_ObjHeader_len_facts)\n apply (clarsimp simp: bilbyFsObjHeaderSize_def unat_arith_simps)\n apply (simp add: drop_n_ge_0)\n done\n\n\n\nfun\n valid_trans :: \"U8 list \\ bool\"\nwhere\n\"valid_trans [] = False\"\n|valid_trans_Cons: \"valid_trans buf =\n (if is_valid_ObjIn (pObj buf 0) buf then\n valid_trans (drop (unat $ Obj.len\\<^sub>f $ pObj buf 0) buf)\n else is_valid_ObjCommit (pObj buf 0) buf)\"\n\ndeclare valid_trans.simps[simp del]\n\nlemma valid_trans_simps[simp]:\n \"valid_trans [] = False\"\n \"is_valid_ObjIn (pObj xs 0) xs \\\n valid_trans xs = valid_trans (drop (unat $ Obj.len\\<^sub>f $ pObj xs 0) xs)\"\n \"is_valid_ObjCommit (pObj xs 0) xs \\\n valid_trans xs = True\"\n apply (simp add: valid_trans.simps)\n apply (case_tac xs, (clarsimp simp: is_valid_ObjHeader_len_facts valid_trans.simps is_valid_ObjTrans is_valid_ObjHeader_def bilbyFsObjHeaderSize_def )+)\n apply (case_tac xs, simp)\n apply (frule is_len_and_type_ok_hdr_szD)\n apply (simp add: bilbyFsObjHeaderSize_def, unat_arith)\n apply (simp add: valid_trans.simps is_valid_ObjTrans is_valid_ObjHeader_def)\n done \n\nlemma is_valid_Obj_diff:\n \"is_valid_ObjCommit (pObj buf n) buf \\ \\is_valid_ObjIn (pObj buf n) buf\"\n \"is_valid_ObjIn (pObj buf n) buf \\ \\is_valid_ObjCommit (pObj buf n) buf\"\n by (simp add: is_valid_ObjTrans)+\n\nlemma Nil_not_valid_Obj[simp]:\n \"is_valid_ObjHeader (pObj [] n) [] = False\"\n \"is_valid_ObjIn (pObj [] n) [] = False\"\n \"is_valid_ObjCommit (pObj [] n) [] = False\"\n by (clarsimp simp add: is_valid_ObjTrans,\n frule is_valid_ObjHeader_len_facts,\n simp add: bilbyFsObjHeaderSize_def)+\n\nfun\n trans_len :: \"U8 list \\ nat\"\nwhere\ntrans_len_Nil: \"trans_len [] = max (unat bilbyFsObjHeaderSize) (unat $ Obj.len\\<^sub>f $ pObj [] 0)\"\n|trans_len_Cons: \"trans_len buf =\n (if \\is_valid_ObjHeader (pObj buf 0) buf then\n max (unat bilbyFsObjHeaderSize) (unat $ Obj.len\\<^sub>f $ pObj buf 0)\n else if is_valid_ObjIn (pObj buf 0) buf then\n (unat $ Obj.len\\<^sub>f $ pObj buf 0) + trans_len (drop (unat $ Obj.len\\<^sub>f $ pObj buf 0) buf)\n else\n unat $ Obj.len\\<^sub>f $ pObj buf 0)\"\n\ndeclare trans_len.simps [simp del]\nlemma trans_len_simps[simp]:\n \"trans_len [] = max (unat bilbyFsObjHeaderSize) (unat $ Obj.len\\<^sub>f $ pObj [] 0)\"\n \"is_valid_ObjIn (pObj xs 0) xs \\\n trans_len xs = (unat $ Obj.len\\<^sub>f $ pObj xs 0) + trans_len (drop (unat $ Obj.len\\<^sub>f $ pObj xs 0) xs)\"\n \"is_valid_ObjCommit (pObj xs 0) xs \\\n trans_len xs = unat (Obj.len\\<^sub>f $ pObj xs 0)\"\n apply (case_tac xs, (clarsimp simp: is_valid_ObjTrans is_valid_ObjHeader_def bilbyFsObjHeaderSize_def trans_len.simps)+)\n apply (case_tac xs, (clarsimp simp: is_valid_ObjTrans is_valid_ObjHeader_def bilbyFsObjHeaderSize_def trans_len.simps)+)\n apply (case_tac xs, (clarsimp simp: is_valid_ObjTrans, frule is_len_and_type_ok_hdr_szD, simp add: bilbyFsObjHeaderSize_def, unat_arith))\n apply (clarsimp simp: is_valid_ObjTrans, frule is_len_and_type_ok_hdr_szD,\n clarsimp simp add: bilbyFsObjHeaderSize_def trans_len.simps is_valid_ObjTrans, unat_arith)\n done\n\nlemma trans_len_min_header[simp]:\n \"unat bilbyFsObjHeaderSize - 1 < trans_len xs\"\n apply (rule_tac x=xs in trans_len.cases)\n apply (fastforce simp: bilbyFsObjHeaderSize_def)\n apply (simp only: trans_len_Cons)\n apply (case_tac \"is_valid_ObjIn (pObj (v # va) 0) (v # va)\")\n apply (clarsimp simp: is_valid_Obj_diff is_valid_ObjTrans)\n apply (drule is_valid_ObjHeader_len, simp add: bilbyFsObjHeaderSize_def, unat_arith)\n apply (clarsimp simp: is_valid_ObjTrans)\n apply (auto dest!: is_valid_ObjHeader_len[simplified bilbyFsObjHeaderSize_def], (simp add: bilbyFsObjHeaderSize_def | unat_arith)+)\n done\n\nlemma hdr_sz_le_trans_len:\n \"unat bilbyFsObjHeaderSize \\ trans_len xs\"\n using trans_len_min_header[where xs=xs] by simp\n\nlemma trans_len_non_zero:\n \"0 < trans_len xs\"\n using trans_len_min_header\n by (drule_tac x=xs in meta_spec) fastforce\n\nlemma take_non0:\n \"xs \\ [] \\ 0 < n \\\n take n xs = hd xs#(take (n- 1) (tl xs))\"\nby (case_tac n, auto simp: take_Suc)\n\n\nlemma prefixeq_length_le_Cons:\n \"prefixeq xs (y#ys) \\ length xs \\ Suc (length ys)\"\nby (drule prefixeq_length_le) simp\n\nfunction\n valid_list_trans :: \"U8 list \\ bool\"\nwhere\n\"valid_list_trans [] = False\"\n|\"valid_list_trans (b#buf) =\n (valid_trans (b#buf) \\\n (if nopad (drop (trans_len (b#buf)) (b#buf)) = [] then True\n else valid_list_trans (nopad (drop (trans_len (b#buf)) (b#buf)))))\"\n\nby pat_completeness simp+\ntermination\n apply (relation \"measure (Suc o length)\")\n apply simp\n apply (simp add: dropWhile_eq_drop nopad_def)\n apply (cut_tac xs=\"b # buf\" in trans_len_non_zero)\n apply unat_arith\n done\n\ndefinition\n valid_list_trans_no_pad :: \"U8 list \\ bool\"\nwhere\n \"valid_list_trans_no_pad buf \\\n valid_list_trans buf \\ snd (list_trans_no_pad buf) \\ []\"\n\nlemma valid_list_trans_to_valid_trans:\n \"valid_list_trans buf \\ valid_trans buf\"\nby (erule valid_list_trans.elims, simp)\n\ntext {* \\_summary_updates: returns all the updates included in the summary.\nThis includes the updates already synchronised to medium i.e. wbuf[0:used] and\nupdates only applied in memory i.e. wbuf[used:sync_offs]. (Where wbuf[x:y] is the\nslice of the WordArray U8 maching the medium contents for the erase-block in\nquestion.)\n*}\ndefinition\n \\_summary_updates :: \"OstoreState\\<^sub>T \\ (ostore_map \\ ostore_map) list\"\nwhere\n \"\\_summary_updates ostore_st \\ \n let offs = unat $ (used\\<^sub>f ostore_st);\n buf = take offs (\\wa $ data\\<^sub>f $ wbuf\\<^sub>f ostore_st)\n in (map ostore_update $ snd $ list_trans_no_pad buf)\"\n\ntext {* inv_\\_step_updates: asserts inv is true no matter how many updates we apply. *}\ndefinition\n inv_\\_step_updates :: \"OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_\\_step_updates ostore_st \\\n (let updates = \\_updates ostore_st\n in \\n\\length updates.\n inv_\\_ostore (apply_n_updates n (\\_ostore_medium ostore_st) updates))\"\n\ndefinition\n sum_from_wbuf :: \"Buffer\\<^sub>T \\ Obj\\<^sub>T\"\nwhere\n \"sum_from_wbuf buf \\ \n let data = \\wa $ data\\<^sub>f buf ;\n offs = ple32 data (buf_length buf - 4)\n in pObj data offs\"\n\ntext {*\n summary_map: builds a ostore_map from a summary.\n The resulting map should be the same as applying all updates returned by \\_summary_updates to an empty\n map. (see inv_sum_consistent)\n*}\n\ndefinition\n summary_map :: \"ObjSummary\\<^sub>T \\ OstoreState\\<^sub>T \\ ostore_map\"\nwhere\n \"summary_map summary ostore_st \\\n let nb_entry = unat $ nb_sum_entry\\<^sub>f summary;\n entries = take nb_entry $ \\wa $ entries\\<^sub>f summary;\n nodel = filter (Not o obj_sum_entry_is_del) entries;\n maps = map (\\entry. Map.empty(ObjSumEntry.id\\<^sub>f entry \\ pObj (\\wa $ data\\<^sub>f $ wbuf\\<^sub>f ostore_st) (obj_sum_entry_offs entry))) nodel;\n omap = fold op ++ maps Map.empty;\n dels = filter (obj_sum_entry_is_del) entries\n in fold (\\entry gos.\n (\\oid. if oid_is_deleted_by oid (ObjSumEntry.id\\<^sub>f entry) then\n option.None\n else gos oid)) dels omap\"\n\ndefinition\n inv_sum_consistent :: \"Obj\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_sum_consistent sumobj ostore_st \\\n True\n (* ignore summary consistency for now:\n otype\\<^sub>f sumobj = bilbyFsObjTypeSum \\\n let sum = obj_osummary sumobj\n in summary_map sum ostore_st = fold id (\\_summary_updates ostore_st) Map.empty*)\"\n\ndefinition\n room_for_summary :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"room_for_summary mount_st ostore_st \\\n (\\no_summary\\<^sub>f mount_st \\ used\\<^sub>f ostore_st \\ (eb_size\\<^sub>f $ super\\<^sub>f mount_st)) \\\n (unat (eb_size\\<^sub>f $ super\\<^sub>f mount_st) - unat (used\\<^sub>f ostore_st) \\ unat (serialise_size_summary_Obj (summary\\<^sub>f ostore_st)))\n \"\n\ntext {* \nUnless \"used\" equals \"eb_size\", there must be enough room for the summary\nto be serialised. If \"used\" is equal to \"eb_size\", the summary's been\nserialised already and can be read from the buffer.\n\nnb_sum_entry constrain says that the maximum number of objects in\nan erase-block has to be less than the number of min-size object that fit\nin that buffer (this is an over-approximation because at least one of these\nobjects must be a summary).\n*}\ndefinition\n inv_ostore_summary :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_ostore_summary mount_st ostore_st \\\n True\n (* No summary invariant for now.\n let eb_size = eb_size\\<^sub>f (super\\<^sub>f mount_st)\n in nb_sum_entry\\<^sub>f (summary\\<^sub>f ostore_st) < (eb_size div bilbyFsMinObjSize) \\\n room_for_summary mount_st ostore_st \\\n (if used\\<^sub>f ostore_st = eb_size then\n inv_sum_consistent (sum_from_wbuf (wbuf\\<^sub>f ostore_st)) ostore_st\n else\n used\\<^sub>f ostore_st < used\\<^sub>f ostore_st + os_sum_sz ostore_st \\ \n used\\<^sub>f ostore_st + os_sum_sz ostore_st \\ eb_size \\\n inv_sum_consistent ((sum_obj\\<^sub>f ostore_st)\\ ounion\\<^sub>f:= TObjSummary (summary\\<^sub>f ostore_st) \\) ostore_st)\n *)\n \"\n\ntext {*\n inv_ostore_obj_meta: is the invariant of object meta data in\n relation to the object store state.\n*}\ndefinition\n inv_mem_ostore_obj :: \"OstoreState\\<^sub>T \\ Obj\\<^sub>T \\ bool\"\nwhere\n \"inv_mem_ostore_obj ostore_st obj \\\n Obj.sqnum\\<^sub>f obj < OstoreState.next_sqnum\\<^sub>f ostore_st \\\n ucast (otype\\<^sub>f obj) = bilbyFsObjInode \\\n (inum_from_obj_id $ get_obj_oid obj) < OstoreState.next_inum\\<^sub>f ostore_st\"\n\n\ntext {* @{term pollute_buf} ensures that the buffer does not contain a valid transaction\nat offset @{term offs}. It does not matter what the value is as long as it's not\na valid transaction or padding, mount will stop at this offset.\nNote that we could allow invalid to be prefixed by padding bytes but it's this is Ok for now.\nWe don't use pollute_buf at the moment because we do not care about crash-tolerance.\n*}\ndefinition\n pollute_buf :: \"nat \\ U8 list \\ U8 list\"\nwhere\n \"pollute_buf offs xs = xs[offs:=0xff]\"\n\ntext {* list_eb_log_wbuf: returns the logical view of the log on-flash with the current\nstate of the buffer wbuf instead of the content of the corresponding erase-block.\n*}\ndefinition\n list_eb_log_wbuf :: \"OstoreState\\<^sub>T \\ EbLog list\"\nwhere\n \"list_eb_log_wbuf ostore_st \\\n let eblogs = list_eb_log (\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st));\n wbuflog = snd (list_trans_no_pad ((* pollute_buf *)buf_slice (wbuf\\<^sub>f ostore_st) 0 (used\\<^sub>f ostore_st)))\n in eblogs[unat (wbuf_eb\\<^sub>f ostore_st) - unat bilbyFsFirstLogEbNum:=wbuflog]\"\n\ntext {* Attempt at on-flash invariant.\n\nIt's composed of 3 level of invariant, the top-level being the on that talks\nabout the entire log and relation between objects: inv_flash\nThe next level talks about individual erase-blocks: inv_eb_log\nErase-blocks log are made of multiple transactions: inv_trans\nTransactions are made of objects: inv_obj\n\n*}\n \ndefinition\n ostore_log_objects :: \"EbLog list \\ Obj\\<^sub>T list\"\nwhere\n \"ostore_log_objects \\ concat o concat \"\n\ndefinition\n inv_trans :: \"Obj\\<^sub>T list \\ bool\"\nwhere\n \"inv_trans olist \\ (\\obj\\set olist. \\obj_is_del obj \\ inv_read_obj obj)\"\n\ndefinition\n inv_eb_log :: \"EbLog \\ Obj\\<^sub>T set \\ bool\"\nwhere\n \"inv_eb_log tlist allobjs \\\n (let sumtrans = tlist!(length tlist - 1);\n sumobj = hd sumtrans ;\n sum = obj_osummary sumobj\n in length sumtrans = 1 \\ otype\\<^sub>f sumobj = bilbyFsObjTypeSum \\\n (\\entry\\(set $ \\wa $ ObjSummary.entries\\<^sub>f sum).\n let objs = set $ concat $ tlist\n in \\obj. Obj.offs\\<^sub>f obj = obj_sum_entry_offs entry \\\n get_obj_oid obj = ObjSumEntry.id\\<^sub>f entry \\\n (obj_sum_entry_is_del entry \\\n (otype\\<^sub>f obj = bilbyFsObjTypeDel \\\n card {x. x \\ allobjs \\\n oid_is_deleted_by (get_obj_oid x) (ObjSumEntry.id\\<^sub>f entry) \\\n Obj.sqnum\\<^sub>f obj < ObjSumEntry.sqnum\\<^sub>f entry\n } = unat (ObjSumEntry.count\\<^sub>f entry))) \\\n Obj.len\\<^sub>f obj = ObjSumEntry.len\\<^sub>f entry) \\\n (\\trans \\ set(butlast tlist). inv_trans trans))\"\n\ndefinition\n obj_is_alive :: \"Obj\\<^sub>T \\ Obj\\<^sub>T set \\ bool\"\nwhere\n \"obj_is_alive obj all \\\n (\\delobj \\{x. x\\ all \\ obj_is_del x}. \\obj_is_deleted_by obj delobj)\"\n\ndefinition\n inv_flash :: \"EbLog list \\ bool\"\nwhere\n \"inv_flash flash \\ True\n(*\n let all = ostore_log_objects flash in\n (* The root inode exists, we don't really need to know that for the object store *)\n (* (\\obj\\set all. get_obj_oid obj = obj_id_inode_mk bilbyFsRootIno \\ obj_is_alive obj (set all)) \\ *) \n (* all sqnums are uniq *)\n (card (Obj.sqnum\\<^sub>f ` set all) = length (map Obj.sqnum\\<^sub>f all)) \\\n (\\eblog\\set flash. inv_eb_log eblog (set all)) \\\n (* There is maximum 1 erase-block with garbage, (stripping out unmapped erase-blocks) *)\n length ((filter (op \\ []) $ map (fst o the) $ filter (op \\ option.None) flash)) \\ 1\n (*rel dentarr inode and inode data blocks? no cyclic dependencies in graph? *)\n *)\"\n\ndefinition\n is_obj_addr_consistent :: \"Obj\\<^sub>T \\ ObjAddr\\<^sub>T \\ bool\"\nwhere\n \"is_obj_addr_consistent obj addr \\\n Obj.sqnum\\<^sub>f obj = ObjAddr.sqnum\\<^sub>f addr \\\n Obj.offs\\<^sub>f obj = ObjAddr.offs\\<^sub>f addr \\\n Obj.len\\<^sub>f obj = ObjAddr.len\\<^sub>f addr\"\n\ndefinition\n inv_ostore_index :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_ostore_index mount_st ostore_st \\ \n (\\oid\\dom(\\_index $ index_st\\<^sub>f ostore_st).\n let addr = the $ (\\_index $ index_st\\<^sub>f ostore_st) oid;\n obj = ostore_get_obj ostore_st addr\n in is_valid_addr mount_st ostore_st addr \\\n is_obj_addr_consistent obj addr \\\n get_obj_oid obj = oid)\"\n\ndefinition\n inv_ostore_index_gim_disjoint :: \"OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_ostore_index_gim_disjoint ostore_st \\\n dom (\\_index $ index_st\\<^sub>f ostore_st) \\ dom (\\_fsm_gim $ gim\\<^sub>f $ fsm_st\\<^sub>f ostore_st) = {}\"\n\ndefinition\n inv_fsm_st :: \"MountState\\<^sub>T \\ FsmState\\<^sub>T \\ bool\"\nwhere\n \"inv_fsm_st mount_st fsm_st \\\n length (\\wa $ dirty_space\\<^sub>f $ fsm_st) = unat (nb_eb\\<^sub>f $ super\\<^sub>f mount_st) \\\n length (\\wa $ used_eb\\<^sub>f $ fsm_st) = unat (nb_eb\\<^sub>f $ super\\<^sub>f mount_st)\"\n\ndefinition\n inv_ostore_fsm :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_ostore_fsm mount_st ostore_st \\\n (\\wa $ used_eb\\<^sub>f $ fsm_st\\<^sub>f ostore_st) ! unat (wbuf_eb\\<^sub>f ostore_st) \\ 0 \\\n(* Count on each gimnode is equal to the number of objects with the same oid\n in the log *)\n (\\oid \\ dom(\\_fsm_gim $ gim\\<^sub>f $ fsm_st\\<^sub>f ostore_st).\n let gimnode = the $ (\\_fsm_gim $ gim\\<^sub>f $ fsm_st\\<^sub>f ostore_st) oid\n in unat (GimNode.count\\<^sub>f gimnode) =\n card {x. x \\ (set $ ostore_log_objects $ list_eb_log_wbuf ostore_st) \\\n oid_is_deleted_by (get_obj_oid x) oid}) \\\n\n(* All Ubi erase-block with data are marked as used in the FSM used_eb\\<^sub>f bit map *)\n (\\ebnum\\ {bilbyFsFirstLogEbNum..f (super\\<^sub>f mount_st)}.\n (unat ebnum \\ unat (wbuf_eb\\<^sub>f ostore_st) \\\n ((\\wubi $ OstoreState.ubi_vol\\<^sub>f ostore_st) ! (unat ebnum) = [] \\\n ((\\wa $ used_eb\\<^sub>f $ fsm_st\\<^sub>f ostore_st) ! (unat ebnum) \\ 0))))\n\n(* Dirty space book-keeping (commented out for now) *)\n (* let ebnum = wbuf_eb\\<^sub>f ostore_st in\n ((\\wa $ used_eb\\<^sub>f $ fsm_st\\<^sub>f ostore_st) ! (unat ebnum) \\ 0) \\\n (let eb_log = list_eb_log_wbuf ostore_st ! (unat ebnum);\n eb_size = unat (eb_size\\<^sub>f (super\\<^sub>f mount_st));\n nondirt = listsum (map (unat o Obj.len\\<^sub>f) (concat eb_log)) ;\n nonused = (if ebnum = wbuf_eb\\<^sub>f ostore_st then eb_size - unat (used\\<^sub>f ostore_st) else 0) in\n (unat ((\\wa $ dirty_space\\<^sub>f $ fsm_st\\<^sub>f ostore_st) ! unat ebnum) = eb_size - nondirt - nonused))*)\n\"\n\ndefinition\n inv_bufs :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_bufs mount_st ostore_st \\\n inv_ubi_vol mount_st (OstoreState.ubi_vol\\<^sub>f ostore_st) \\\n (\\ebnum\\{unat bilbyFsFirstLogEbNum.. length ((\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st)))}.\n unat (wbuf_eb\\<^sub>f ostore_st) \\ ebnum \\\n length ((\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st))!ebnum) = unat (eb_size\\<^sub>f (super\\<^sub>f mount_st) )) \\\n (let synced = buf_take (wbuf\\<^sub>f ostore_st) (sync_offs\\<^sub>f ostore_st);\n sync_to_used = buf_slice (wbuf\\<^sub>f ostore_st) (sync_offs\\<^sub>f ostore_st) (used\\<^sub>f ostore_st) in\n \\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st) ! unat (wbuf_eb\\<^sub>f ostore_st) = synced \\\n (sync_offs\\<^sub>f ostore_st < used\\<^sub>f ostore_st \\ valid_list_trans_no_pad sync_to_used) \\\n (used\\<^sub>f ostore_st > 0 \\ valid_list_trans_no_pad synced) \\\n sort_key trans_order (snd (list_trans_no_pad sync_to_used)) =\n snd (list_trans_no_pad sync_to_used))\n(*\n (let nb_eb = nb_eb\\<^sub>f (super\\<^sub>f mount_st) in\n (\\ebnum\\{bilbyFsFirstLogEbNum..nb_eb}.\n (case ubi_to_buf (OstoreState.ubi_vol\\<^sub>f ostore_st) ebnum of\n option.None \\ True |\n option.Some buf \\ valid_list_trans buf)))\n*)\"\n\ndefinition\n inv_log :: \"Trans list list \\ Trans list \\ bool\"\nwhere\n \"inv_log eb_log wbuf_log \\\n (\\x\\set (concat eb_log).\n \\y\\set (wbuf_log). trans_order x < trans_order y) \\\n inj_on trans_order (set $ concat $ eb_log @ [wbuf_log])\"\n\ndefinition\n inv_opad :: \"Obj\\<^sub>T \\ bool\"\nwhere\n \"inv_opad opad \\\n magic\\<^sub>f opad = bilbyFsMagic \\\n otype\\<^sub>f opad = bilbyFsObjTypePad \\ \n trans\\<^sub>f opad = bilbyFsTransCommit \\\n bilbyFsObjHeaderSize \\ Obj.len\\<^sub>f opad \\\n ounion\\<^sub>f (opad) = ObjUnion\\<^sub>1\\<^sub>1\\<^sub>1\\<^sub>1\\<^sub>1\\<^sub>1\\<^sub>1.TObjPad () \\\n Obj.offs\\<^sub>f opad = 0\"\n\n\ntext {*\nFrom inv_ostore, we know that used\\<^sub>f ostore_st \\ eb_size,\nsee lemma inv_ostore_used below.\n*}\ndefinition\n inv_ostore :: \"MountState\\<^sub>T \\ OstoreState\\<^sub>T \\ bool\"\nwhere\n \"inv_ostore mount_st ostore_st \\\n sync_offs\\<^sub>f ostore_st \\ used\\<^sub>f ostore_st \\\n io_size\\<^sub>f (super\\<^sub>f mount_st) udvd sync_offs\\<^sub>f ostore_st \\\n used\\<^sub>f ostore_st \\ eb_size\\<^sub>f (super\\<^sub>f mount_st) \\\n used\\<^sub>f ostore_st < used\\<^sub>f ostore_st + io_size\\<^sub>f (super\\<^sub>f mount_st) \\\n buf_length (rbuf\\<^sub>f ostore_st) = eb_size\\<^sub>f (super\\<^sub>f mount_st) \\\n buf_length (wbuf\\<^sub>f ostore_st) = eb_size\\<^sub>f (super\\<^sub>f mount_st) \\\n buf_bound (wbuf\\<^sub>f ostore_st) = eb_size\\<^sub>f (super\\<^sub>f mount_st) \\\n wbuf_eb\\<^sub>f ostore_st \\ bilbyFsFirstLogEbNum \\\n wbuf_eb\\<^sub>f ostore_st < nb_eb\\<^sub>f (super\\<^sub>f mount_st) \\\n inv_opad (opad\\<^sub>f ostore_st) \\\n \\_ostore_runtime ostore_st = \\_ostore_uptodate ostore_st \\\n inv_ostore_summary mount_st ostore_st \\\n inv_ostore_index mount_st ostore_st \\\n inv_ostore_index_gim_disjoint ostore_st \\\n inv_bufs mount_st ostore_st \\\n inv_fsm_st mount_st (fsm_st\\<^sub>f ostore_st) \\\n inv_ostore_fsm mount_st ostore_st \\\n inv_flash (list_eb_log_wbuf ostore_st) \\\n inv_log (list_eb_log (\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st)))\n (snd $ list_trans_no_pad (buf_slice (wbuf\\<^sub>f ostore_st) (sync_offs\\<^sub>f ostore_st) (used\\<^sub>f ostore_st)))\"\n\nlemmas inv_ostore_simps =\n inv_ostore_def\n inv_ostore_summary_def\n inv_ostore_index_def\n inv_ostore_index_gim_disjoint_def\n inv_bufs_def\n inv_ostore_fsm_def\n inv_flash_def\n inv_eb_log_def\n\n\nlemma inv_summaryD: \"inv_ostore mount_st ostore_st \\ inv_ostore_summary mount_st ostore_st\"\nby (simp add: inv_ostore_def)\n\nlemma inv_ostore_wbuf_lengthD: \"inv_ostore mount_st ostore_st \\ buf_length (wbuf\\<^sub>f ostore_st) = eb_size\\<^sub>f (super\\<^sub>f mount_st)\"\nby (simp add: inv_ostore_def)\n\nlemma inv_ostore_wbuf_boundD: \"inv_ostore mount_st ostore_st \\ buf_bound (wbuf\\<^sub>f ostore_st) = eb_size\\<^sub>f (super\\<^sub>f mount_st)\"\nby (simp add: inv_ostore_def)\n\nlemma inv_ostore_usedD:\n \"inv_ostore mount_st ostore_st \\\n used\\<^sub>f ostore_st \\ eb_size\\<^sub>f (super\\<^sub>f mount_st)\"\nby (clarsimp simp:inv_ostore_def)\n\nlemma inv_ostore_used_len_wbufD:\n \"inv_ostore mount_st ostore_st \\ inv_mount_st mount_st \\ unat (used\\<^sub>f ostore_st) \\ length (\\wa $ data\\<^sub>f $ wbuf\\<^sub>f ostore_st)\"\n apply (frule inv_ostore_wbuf_lengthD[THEN sym])\n apply (frule inv_ostore_usedD)\n apply (clarsimp simp: word_unat.Rep_inject[symmetric] word_le_nat_alt buf_simps inv_mount_st_def Let_def wordarray_length_ret)\n done\n\nlemma inv_ostore_sync_offsD:\n \"inv_ostore mount_st ostore_st \\ sync_offs\\<^sub>f ostore_st \\ used\\<^sub>f ostore_st\"\nby (clarsimp simp:inv_ostore_def)\n\nlemma inv_ostore_fsmD:\n \"inv_ostore mount_st ostore_st \\ inv_ostore_fsm mount_st ostore_st\"\nby (clarsimp simp:inv_ostore_def)\n\nlemma used_eq_sync_offs_means_no_update:\n \"sync_offs\\<^sub>f ostore_st = used\\<^sub>f ostore_st \\\n \\_updates ostore_st = []\"\n unfolding \\_updates_def by (simp add: buf_simps)\n\n\nlemma inv_bufsD[simplified inv_bufs_def Let_def]:\n \"inv_ostore mount_st ostore_st \\ inv_bufs mount_st ostore_st\"\n by (simp add: inv_ostore_def) \n\nlemma length_ubi_buf_eq_sync_offsD:\n \"inv_ostore mount_st ostore_st \\\n inv_mount_st mount_st \\\n length (\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st) ! unat (wbuf_eb\\<^sub>f ostore_st)) =\n unat (sync_offs\\<^sub>f ostore_st)\"\n apply (frule inv_bufsD)\n apply (subgoal_tac \"unat (sync_offs\\<^sub>f ostore_st) \\ unat (buf_length (wbuf\\<^sub>f ostore_st))\")\n using wordarray_length_ret[where arr=\"data\\<^sub>f (wbuf\\<^sub>f ostore_st)\"]\n apply (clarsimp simp: inv_bufs_def buf_simps min_absorb1 Let_def)\n apply unat_arith\n apply (frule inv_ostore_usedD)\n apply (clarsimp simp: inv_ostore_def buf_simps inv_mount_st_def Let_def, unat_arith+)\ndone\n\nlemma inv_ubi_volD:\n \"inv_ostore mount_st ostore_st \\ inv_ubi_vol mount_st (OstoreState.ubi_vol\\<^sub>f ostore_st)\"\n by (drule inv_bufsD, clarsimp simp: inv_bufs_def)\n\nlemma inv_ostore_indexD:\n \"inv_ostore mount_st ostore_st \\ inv_ostore_index mount_st ostore_st\"\n by (clarsimp simp: inv_ostore_def)\n\nlemma inv_ostore_eb_size_wbuf_eqD:\n \"inv_ostore mount_st ostore_st \\\n unat (eb_size\\<^sub>f (super\\<^sub>f mount_st)) = length (\\wa (data\\<^sub>f (wbuf\\<^sub>f ostore_st)))\"\nusing wordarray_length_ret[where arr=\"(data\\<^sub>f (wbuf\\<^sub>f ostore_st))\"]\nby (clarsimp simp: inv_ostore_def Let_def buf_simps wordarray_length_ret)\n\nlemma inv_ostore_eb_size_rbuf_eqD:\n \"inv_ostore mount_st ostore_st \\\n unat (eb_size\\<^sub>f (super\\<^sub>f mount_st)) = length (\\wa (data\\<^sub>f (rbuf\\<^sub>f ostore_st)))\"\nusing wordarray_length_ret[where arr=\"(data\\<^sub>f (rbuf\\<^sub>f ostore_st))\"]\nby (clarsimp simp: inv_ostore_def Let_def buf_simps wordarray_length_ret)\n\nlemma inv_ostore_buf_boundD:\n \"inv_ostore mount_st ostore_st \\\n unat (buf_bound (wbuf\\<^sub>f ostore_st)) \\ length (\\wa (data\\<^sub>f (wbuf\\<^sub>f ostore_st)))\"\nusing wordarray_length_ret[where arr=\"(data\\<^sub>f (wbuf\\<^sub>f ostore_st))\",symmetric]\nby (clarsimp simp: inv_ostore_def buf_simps)\n\nlemma inv_ostore_buf_bound_eqD:\n \"inv_ostore mount_st ostore_st \\\n unat (buf_bound (wbuf\\<^sub>f ostore_st)) = length (\\wa (data\\<^sub>f (wbuf\\<^sub>f ostore_st)))\"\nusing wordarray_length_ret[where arr=\"(data\\<^sub>f (wbuf\\<^sub>f ostore_st))\",symmetric]\nby (clarsimp simp: inv_ostore_def buf_simps)\n\nlemma inv_mount_st_no_summaryD:\n \"inv_mount_st mount_st \\ \\ no_summary\\<^sub>f mount_st\"\n by (simp add: inv_mount_st_def Let_def)\n\nlemma inv_logD[simplified inv_log_def]:\n \"inv_ostore mount_st ostore_st \\\n inv_log (list_eb_log (\\wubi (OstoreState.ubi_vol\\<^sub>f ostore_st))) (snd $ list_trans_no_pad (buf_slice (wbuf\\<^sub>f ostore_st) (sync_offs\\<^sub>f ostore_st) (used\\<^sub>f ostore_st)))\"\n by (clarsimp simp add: inv_ostore_def Let_def)\n\n\nlemma inv_ostore_used_no_overflowD:\n \"inv_ostore mount_st ostore_st \\ used\\<^sub>f ostore_st < used\\<^sub>f ostore_st + io_size\\<^sub>f (super\\<^sub>f mount_st)\"\n by (clarsimp simp: inv_ostore_def)\n\nlemma used_neq_sync_offs_means_updates_not_Nil:\nassumes inv_ostore: \"inv_ostore mount_st ostore_st\"\nshows\n \"sync_offs\\<^sub>f ostore_st \\ used\\<^sub>f ostore_st \\\n \\_updates ostore_st \\ []\"\n unfolding \\_updates_def \nusing inv_bufsD[OF inv_ostore] inv_ostore_sync_offsD[OF inv_ostore]\n by (fastforce simp add: valid_list_trans_no_pad_def)\n\nlemma inv_mount_st_eb_size_boundD:\n \"inv_mount_st mount_st \\ eb_size\\<^sub>f (super\\<^sub>f mount_st) \\ bilbyFsMaxEbSize\"\n by (simp add: inv_mount_st_def Let_def)\n\nlemma inv_fsm_stD[simplified inv_fsm_st_def]:\n \"inv_ostore mount_st ostore_st \\ inv_fsm_st mount_st (fsm_st\\<^sub>f ostore_st)\"\n by (clarsimp simp: inv_ostore_def)\n\nlemma inv_ostore_wbuf_eb_rangeD:\n \"inv_ostore mount_st ostore_st \\ wbuf_eb\\<^sub>f ostore_st \\ bilbyFsFirstLogEbNum \\\n wbuf_eb\\<^sub>f ostore_st < nb_eb\\<^sub>f (super\\<^sub>f mount_st)\"\n by (clarsimp simp: inv_ostore_def)\n\nlemma inv_opadD[simplified inv_opad_def]:\n \"inv_ostore mount_st ostore_st \\ inv_opad (opad\\<^sub>f ostore_st)\"\n by (simp add: inv_ostore_def)\n\ndefinition\n valid_pad_obj :: \"Obj\\<^sub>T \\ bool\"\nwhere\n \"valid_pad_obj obj \\ otype\\<^sub>f obj = bilbyFsObjTypePad \\ is_valid_Obj obj \\ Obj.offs\\<^sub>f obj = 0\"\n\nlemma is_valid_ObjCommit_trans_len:\n \"valid_pad_obj obj \\ is_valid_ObjCommit obj (sObj obj) \\ unat (Obj.len\\<^sub>f obj) = length (sObj obj) \\ trans_len (sObj obj) = length (sObj obj)\"\n apply (clarsimp simp add: is_valid_ObjTrans)\n apply (frule is_valid_ObjHeader_len_facts, clarsimp)\n apply (case_tac \"sObj obj\")\n apply (simp add: bilbyFsObjHeaderSize_def is_valid_ObjHeader_def)\n apply (simp add: trans_len_Cons)\n apply (rename_tac x xs)\n apply (clarsimp simp add: valid_pad_obj_def is_valid_ObjHeader_def)\n apply (drule_tac t=\"x#xs\" in sym, simp add: Obj_inverse[where xs=Nil, simplified] is_valid_ObjTrans)\n done\n\nlemma is_valid_ObjHeader_length_sObj:\n \"valid_pad_obj obj \\ is_valid_ObjHeader obj (sObj obj) \\ length (sObj obj) = unat (Obj.len\\<^sub>f obj)\"\n by (frule is_valid_ObjHeader_len_facts)\n (clarsimp simp: is_valid_ObjHeader_def length_sObj valid_pad_obj_def)\n\n\nlemma inv_ostore_valid_pad_objD:\n \"inv_ostore mount_st ostore_st \\ valid_pad_obj (opad\\<^sub>f ostore_st)\"\n by (drule inv_opadD) (clarsimp simp: inv_ostore_def valid_pad_obj_def is_valid_Obj_def)\n\nend\n", "meta": {"author": "crizkallah", "repo": "cogent", "sha": "cb16e8169d4389e32dc4aecf4eb9f57173264006", "save_path": "github-repos/isabelle/crizkallah-cogent", "path": "github-repos/isabelle/crizkallah-cogent/cogent-cb16e8169d4389e32dc4aecf4eb9f57173264006/impl/fs/bilby/proof/spec/OstoreInvS.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5156199157230157, "lm_q2_score": 0.2877678096528436, "lm_q1q2_score": 0.14837881376099604}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * This software may be distributed and modified according to the terms of\n * the GNU General Public License version 2. Note that NO WARRANTY is provided.\n * See \"LICENSE_GPLv2.txt\" for details.\n *\n * @TAG(GD_GPL)\n *)\n\n(* \nRefinement for interrupt controller operations\n*)\n\ntheory Interrupt_AI\nimports \"./$L4V_ARCH/ArchIpc_AI\"\nbegin\n\n \ncontext begin interpretation Arch . \nrequalify_consts\n maxIRQ\nend\n\ndefinition\n interrupt_derived :: \"cap \\ cap \\ bool\"\nwhere\n \"interrupt_derived cap cap' \\ \\ is_untyped_cap cap \\ cap_master_cap cap = cap_master_cap cap'\n \\ (cap_badge cap', cap_badge cap) \\ capBadge_ordering False\"\n\nprimrec\n irq_handler_inv_valid :: \"irq_handler_invocation \\ 'z::state_ext state \\ bool\"\nwhere\n \"irq_handler_inv_valid (ACKIrq irq) = (\\s. interrupt_states s irq \\ IRQInactive)\"\n| \"irq_handler_inv_valid (Invocations_A.ClearIRQHandler irq) = \\\"\n| \"irq_handler_inv_valid (Invocations_A.SetIRQHandler irq cap cte_ptr)\n = (\\s. ex_cte_cap_wp_to (is_cnode_cap) cte_ptr s\n \\ (\\ptr'. cte_wp_at (op = (cap.IRQHandlerCap irq)) ptr' s)\n \\ cte_wp_at (interrupt_derived cap) cte_ptr s\n \\ s \\ cap \\ is_ntfn_cap cap)\"\n\nconsts\n arch_irq_control_inv_valid :: \"arch_irq_control_invocation \\ ('a :: state_ext) state \\ bool\"\n\nprimrec\n irq_control_inv_valid :: \"irq_control_invocation \\ 'a::state_ext state \\ bool\"\nwhere\n \"irq_control_inv_valid (Invocations_A.ArchIRQControl ivk) = (arch_irq_control_inv_valid ivk)\"\n| \"irq_control_inv_valid (Invocations_A.IRQControl irq ptr ptr') =\n (cte_wp_at (op = cap.NullCap) ptr and\n cte_wp_at (op = cap.IRQControlCap) ptr'\n and ex_cte_cap_wp_to is_cnode_cap ptr and real_cte_at ptr\n and K (irq \\ maxIRQ))\"\n\n\nlocale Interrupt_AI =\n fixes state_ext_type1 :: \"('a :: state_ext) itself\"\n assumes decode_irq_control_invocation_inv[wp]:\n \"\\(P :: 'a state \\ bool) args slot label caps.\n \\P\\ decode_irq_control_invocation label args slot caps \\\\rv. P\\\"\n assumes decode_irq_control_valid[wp]:\n \"\\slot caps label args.\n \\\\s :: 'a state. invs s \\ (\\cap \\ set caps. s \\ cap)\n \\ (\\cap \\ set caps. is_cnode_cap cap \\\n (\\r \\ cte_refs cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s))\n \\ cte_wp_at (op = cap.IRQControlCap) slot s\\\n decode_irq_control_invocation label args slot caps\n \\irq_control_inv_valid\\,-\"\n assumes get_irq_slot_different:\n \"\\ irq ptr. \n \\\\s :: 'a state. valid_global_refs s \\ ex_cte_cap_wp_to is_cnode_cap ptr s\\\n get_irq_slot irq\n \\\\rv s. rv \\ ptr\\\"\n assumes is_derived_use_interrupt:\n \"\\ cap cap' m p. \n (is_ntfn_cap cap \\ interrupt_derived cap cap') \\ (is_derived m p cap cap')\"\n assumes maskInterrupt_invs:\n \"\\b irq.\n \\invs and (\\s :: 'a state. \\b \\ interrupt_states s irq \\ IRQInactive)\\ \n do_machine_op (maskInterrupt b irq) \n \\\\rv. invs\\\"\n assumes no_cap_to_obj_with_diff_IRQHandler[simp]:\n \"\\ irq S. (no_cap_to_obj_with_diff_ref (IRQHandlerCap irq) S :: 'a state \\ bool)= \\\"\n assumes set_irq_state_valid_cap[wp]:\n \"\\ cap irq. \n \\valid_cap cap :: 'a state \\ bool\\ \n set_irq_state IRQSignal irq \n \\\\rv. valid_cap cap\\\" \n assumes set_irq_state_valid_global_refs[wp]: \n \"\\ a b. \n \\valid_global_refs :: 'a state \\ bool\\ \n set_irq_state a b \n \\\\_. valid_global_refs\\\"\n assumes invoke_irq_handler_invs':\n \"\\ (ex_inv :: 'a state \\ bool) i.\n \\ \\f. \\invs and ex_inv\\ do_machine_op f \\\\rv::unit. ex_inv\\;\n \\cap src dest. \n \\ex_inv and invs and K (src \\ dest)\\\n cap_insert cap src dest\n \\\\_.ex_inv\\;\n \\cap. \\ex_inv and invs\\ cap_delete_one cap \\\\_.ex_inv\\ \n \\ \\ \n \\invs and ex_inv and irq_handler_inv_valid i\\ invoke_irq_handler i \\\\rv s. invs s \\ ex_inv s\\\"\n assumes invoke_irq_control_invs[wp]:\n \"\\ i. \\invs and irq_control_inv_valid i\\ invoke_irq_control i \\\\rv. invs :: 'a state \\ bool\\\"\n assumes resetTimer_invs[wp]:\n \"\\invs :: 'a state \\ bool\\ do_machine_op resetTimer \\\\_. invs\\\"\n assumes empty_fail_ackInterrupt[simp, intro!]: \n \"\\ irq. empty_fail (ackInterrupt irq)\"\n assumes empty_fail_maskInterrupt[simp, intro!]: \n \"\\ f irq. empty_fail (maskInterrupt f irq)\"\n assumes handle_interrupt_invs [wp]: \n \"\\ irq. \\invs :: 'a state \\ bool\\ handle_interrupt irq \\\\_. invs\\\"\n assumes sts_arch_irq_control_inv_valid [wp]:\n \"\\i t st.\n \\arch_irq_control_inv_valid i :: 'a state \\ bool\\\n set_thread_state t st\n \\\\rv. arch_irq_control_inv_valid i\\\"\n\ncrunch inv[wp]: decode_irq_handler_invocation \"P\"\n (simp: crunch_simps)\n\nlemma valid_irq_handlersD:\n \"\\cte_wp_at (op = (IRQHandlerCap irq)) (a, b) s; valid_irq_handlers s\\ \\\n interrupt_states s irq = IRQSignal\"\n apply(auto simp: valid_irq_handlers_def cte_wp_at_caps_of_state irq_issued_def cap_irqs_def cap_irq_opt_def split: cap.splits)\n done\n\nlemma decode_irq_handler_valid[wp]:\n \"\\\\s. invs s \\ (\\cap \\ set caps. s \\ fst cap) \\ (\\ptr'. cte_wp_at (op = (cap.IRQHandlerCap irq)) ptr' s)\n \\ (\\cap \\ set caps. \\r \\ cte_refs (fst cap) (interrupt_irq_node s). ex_cte_cap_to r s)\n \\ (\\cap \\ set caps. ex_cte_cap_wp_to is_cnode_cap (snd cap) s)\n \\ (\\cap \\ set caps. cte_wp_at (interrupt_derived (fst cap)) (snd cap) s)\\\n decode_irq_handler_invocation label irq caps\n \\irq_handler_inv_valid\\,-\"\n apply (simp add: decode_irq_handler_invocation_def Let_def split_def\n split del: if_split cong: if_cong)\n apply (rule hoare_pre, wp)\n apply (clarsimp simp: neq_Nil_conv)\n apply (fastforce dest: valid_irq_handlersD simp: invs_def valid_state_def)\n done\n\ncrunch inv[wp]: is_irq_active \"P\"\n\nlemma unat_mask_32_16_is_mod:\n \"unat ((a::word32) && mask 16) = (unat a) mod (2^16)\"\n by (simp add:word_mod_2p_is_mask[symmetric] unat_word_ariths)\n\nlemma mod_le:\n \"\\b < c;b dvd c\\ \\ (a mod b \\ a mod (c::nat))\"\n apply (subst mod_mod_cancel[symmetric],simp)\n by simp\n\nlemma is_up_8_32: \"is_up (ucast :: word8 \\ word32)\"\n by (simp add: is_up_def source_size_def target_size_def word_size)\n\n\ncrunch mdb_inv[wp]: cancel_all_ipc \"\\s. P (cdt s)\"\n (wp: fast_finalise_lift crunch_wps)\n\ncrunch mdb_inv[wp]: cancel_all_signals \"\\s. P (cdt s)\"\n (wp: fast_finalise_lift crunch_wps)\n\ncrunch mdb_inv[wp]: fast_finalise \"\\s. P (cdt s)\"\n (wp: fast_finalise_lift crunch_wps)\n\ncrunch mdb_inv[wp]: set_cap \"\\s. P (cdt s)\"\n (wp: crunch_wps simp: crunch_simps)\n\nlemma cap_delete_one_still_derived:\n \"\\\\s. cte_wp_at (is_derived (cdt s) p' cap) p' s \\ p \\ p' \\ valid_mdb s\\\n cap_delete_one p\n \\\\rv s. cte_wp_at (is_derived (cdt s) p' cap) p' s\\\"\n apply (simp add: cap_delete_one_def empty_slot_def unless_def\n cte_wp_at_caps_of_state set_cdt_def)\n apply (wp hoare_vcg_ex_lift)\n apply (simp split del:if_split)\n apply (wp hoare_vcg_ex_lift get_cap_wp hoare_vcg_all_lift\n hoare_vcg_disj_lift\n | simp only: cte_wp_at_caps_of_state imp_conv_disj\n cdt_update.caps_of_state_update\n revokable_update.caps_of_state_update\n | simp)+\n apply (simp add: is_final_cap_def | wp)+\n apply (rule get_cap_wp)\n apply (clarsimp simp: cte_wp_at_caps_of_state if_apply_def2\n split del: if_split)\n apply (rule_tac x=capa in exI)\n apply (clarsimp simp only: is_derived_def simp_thms\n split: if_split_asm)\n apply clarsimp\n apply (subst mdb_empty_abs.descendants[unfolded fun_upd_def])\n apply (rule mdb_empty_abs.intro)\n apply (rule vmdb_abs.intro)\n apply simp\n apply simp\n apply auto\n done\n\n\nlemma cap_delete_one_cte_cap_to[wp]:\n \"\\ex_cte_cap_wp_to P ptr\\ cap_delete_one ptr' \\\\rv. ex_cte_cap_wp_to P ptr\\\"\n apply (simp add: ex_cte_cap_wp_to_def)\n apply (wp hoare_vcg_ex_lift\n hoare_use_eq_irq_node [OF cap_delete_one_irq_node\n cap_delete_one_cte_wp_at_preserved])\n apply (clarsimp simp: can_fast_finalise_def split: cap.split_asm)+\n done\n\n\nlemma get_irq_slot_ex_cte:\n \"\\\\s. \\ptr. cte_wp_at (op = (cap.IRQHandlerCap irq)) ptr s \\ P (cap.IRQHandlerCap irq)\\\n get_irq_slot irq\n \\ex_cte_cap_wp_to P\\\"\n apply (simp add: get_irq_slot_def)\n apply wp\n apply (simp add: ex_cte_cap_wp_to_def)\n apply (elim conjE exEI cte_wp_at_weakenE)\n apply clarsimp\n done\n\ncrunch pspace_aligned[wp]: set_irq_state \"pspace_aligned\"\n\ncrunch pspace_distinct[wp]: set_irq_state \"pspace_distinct\"\n\nlemma valid_mdb_interrupts[simp]:\n \"valid_mdb (interrupt_states_update f s) = valid_mdb s\"\n by (simp add: valid_mdb_def mdb_cte_at_def)\n\ncrunch valid_mdb[wp]: set_irq_state \"valid_mdb\"\n\ncrunch mdb_cte_wp_at[wp]: set_irq_state \"\\s. cte_wp_at (P (cdt s)) p s\"\ncrunch real_cte_at[wp]: set_irq_state \"real_cte_at p\"\n\nlemmas set_irq_state_cte_cap_to[wp]\n = ex_cte_cap_to_pres [OF set_irq_state_mdb_cte_wp_at set_irq_state_irq_node]\n\nlemma set_irq_state_issued[wp]:\n \"\\\\\\ set_irq_state irq_state.IRQSignal irq \\\\rv. irq_issued irq\\\"\n apply (simp add: set_irq_state_def irq_issued_def)\n apply wp\n apply clarsimp\n done\n\nlemma IRQHandler_valid:\n \"(s \\ cap.IRQHandlerCap irq) = (irq \\ maxIRQ)\"\n by (simp add: valid_cap_def cap_aligned_def word_bits_conv)\n\nlemmas (in Interrupt_AI) \n invoke_irq_handler_invs[wp] = invoke_irq_handler_invs'[where ex_inv=\\\n , simplified hoare_post_taut\n , OF TrueI TrueI TrueI\n , simplified\n ]\n\ncrunch interrupt_states[wp]: update_waiting_ntfn, cancel_signal, blocked_cancel_ipc \"\\s. P (interrupt_states s)\" (wp: mapM_x_wp_inv)\n\nlemma cancel_ipc_noreply_interrupt_states:\n \"\\\\s. st_tcb_at (\\st. st \\ BlockedOnReply) t s \\ P (interrupt_states s) \\ cancel_ipc t \\ \\_ s. P (interrupt_states s) \\\"\n apply (simp add: cancel_ipc_def)\n apply wpsimp \n apply (rule hoare_pre_cont)\n apply (wp)\n apply (wp gts_wp)+\n apply (auto simp: pred_tcb_at_def obj_at_def)\n done\n\nlemma send_signal_interrupt_states[wp_unsafe]:\n \"\\\\s. P (interrupt_states s) \\ valid_objs s\\ send_signal a b \\\\_ s. P (interrupt_states s)\\\"\n apply (simp add: send_signal_def)\n apply (rule hoare_seq_ext [OF _ get_ntfn_sp])\n apply (rule hoare_pre)\n apply (wp cancel_ipc_noreply_interrupt_states gts_wp hoare_vcg_all_lift thread_get_wp | wpc | simp)+\n apply (clarsimp)\n apply (erule (1) obj_at_valid_objsE)\n apply (clarsimp simp: valid_obj_def valid_ntfn_def obj_at_def is_tcb_def)\n apply (case_tac ko, simp_all)\n apply (auto simp: pred_tcb_at_def obj_at_def receive_blocked_def)\n done\n\n \nend\n", "meta": {"author": "SEL4PROJ", "repo": "jormungand", "sha": "bad97f9817b4034cd705cd295a1f86af880a7631", "save_path": "github-repos/isabelle/SEL4PROJ-jormungand", "path": "github-repos/isabelle/SEL4PROJ-jormungand/jormungand-bad97f9817b4034cd705cd295a1f86af880a7631/case_study/l4v/proof/invariant-abstract/Interrupt_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5774953651858117, "lm_q2_score": 0.25683198001082097, "lm_q1q2_score": 0.14831927808774414}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__36_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__36_on_rules imports n_g2kAbsAfter_lemma_on_inv__36\nbegin\nsection{*All lemmas on causal relation between inv__36*}\nlemma lemma_inv__36_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__36 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__36) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__36) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__36_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5389832206876841, "lm_q2_score": 0.27512972976675254, "lm_q1q2_score": 0.14829030785661648}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchUntyped_AI\nimports Untyped_AI\nbegin\n\ncontext Arch begin global_naming ARM_HYP\n\nnamed_theorems Untyped_AI_assms\n\nlemma of_bl_nat_to_cref[Untyped_AI_assms]:\n \"\\ x < 2 ^ bits; bits < word_bits \\\n \\ (of_bl (nat_to_cref bits x) :: machine_word) = of_nat x\"\n apply (clarsimp intro!: less_mask_eq\n simp: nat_to_cref_def of_drop_to_bl\n word_size word_less_nat_alt word_bits_def)\n by (metis add_lessD1 le_unat_uoi nat_le_iff_add nat_le_linear)\n\n\nlemma cnode_cap_ex_cte[Untyped_AI_assms]:\n \"\\ is_cnode_cap cap; cte_wp_at (\\c. \\m. cap = mask_cap m c) p s;\n (s::'state_ext::state_ext state) \\ cap; valid_objs s; pspace_aligned s \\ \\\n ex_cte_cap_wp_to is_cnode_cap (obj_ref_of cap, nat_to_cref (bits_of cap) x) s\"\n apply (simp only: ex_cte_cap_wp_to_def)\n apply (rule exI, erule cte_wp_at_weakenE)\n apply (clarsimp simp: is_cap_simps bits_of_def)\n apply (case_tac c, simp_all add: mask_cap_def cap_rights_update_def split:bool.splits)\n apply (clarsimp simp: nat_to_cref_def word_bits_def)\n apply (erule(2) valid_CNodeCapE)\n apply (simp add: word_bits_def cte_level_bits_def)\n done\n\n\n\nlemma inj_on_nat_to_cref[Untyped_AI_assms]:\n \"bits < word_bits \\ inj_on (nat_to_cref bits) {..< 2 ^ bits}\"\n apply (rule inj_onI)\n apply (drule arg_cong[where f=\"\\x. replicate (word_bits - bits) False @ x\"])\n apply (subst(asm) word_bl.Abs_inject[where 'a=32, symmetric])\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: of_bl_rep_False of_bl_nat_to_cref)\n apply (erule word_unat.Abs_eqD)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, simp_all add: word_bits_def)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, simp+)\n done\n\n\nlemma data_to_obj_type_sp[Untyped_AI_assms]:\n \"\\P\\ data_to_obj_type x \\\\ts (s::'state_ext::state_ext state). ts \\ ArchObject ASIDPoolObj \\ P s\\, -\"\n unfolding data_to_obj_type_def\n apply (rule hoare_pre)\n apply (wp|wpc)+\n apply clarsimp\n apply (simp add: arch_data_to_obj_type_def split: if_split_asm)\n done\n\nlemma dui_inv_wf[wp, Untyped_AI_assms]:\n \"\\invs and cte_wp_at ((=) (cap.UntypedCap dev w sz idx)) slot\n and (\\(s::'state_ext::state_ext state). \\cap \\ set cs. is_cnode_cap cap\n \\ (\\r\\cte_refs cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s))\n and (\\s. \\x \\ set cs. s \\ x)\\\n decode_untyped_invocation label args slot (cap.UntypedCap dev w sz idx) cs\n \\valid_untyped_inv\\,-\"\nproof -\n have inj: \"\\node_cap s. \\is_cnode_cap node_cap;\n unat (args ! 5) \\ 2 ^ bits_of node_cap - unat (args ! 4);valid_cap node_cap s\\ \\\n inj_on (Pair (obj_ref_of node_cap) \\ nat_to_cref (bits_of node_cap))\n {unat (args ! 4)..S a f s. (\\x\\S. cte_wp_at ((=) cap.NullCap) (a, f x) s)\n \\ cte_wp_at (\\c. c \\ cap.NullCap) slot s\n \\ slot \\ (Pair a \\ f) ` S\"\n by (auto simp: cte_wp_at_caps_of_state)\n show ?thesis\n apply (simp add: decode_untyped_invocation_def unlessE_def[symmetric]\n unlessE_whenE\n split del: if_split)\n apply (rule validE_R_sp[OF whenE_throwError_sp]\n validE_R_sp[OF data_to_obj_type_sp]\n validE_R_sp[OF dui_sp_helper] validE_R_sp[OF map_ensure_empty])+\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp whenE_throwError_wp[THEN validE_validE_R] check_children_wp map_ensure_empty_wp)\n apply (clarsimp simp: distinct_map cases_imp_eq)\n apply (subgoal_tac \"s \\ node_cap\")\n prefer 2\n apply (erule disjE)\n apply (drule bspec [where x = \"cs ! 0\"],clarsimp)+\n apply fastforce\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid[rotated])+\n apply simp\n apply (subgoal_tac \"\\r\\cte_refs node_cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s\")\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid[rotated])\n apply (clarsimp simp: not_less)\n apply (frule(2) inj)\n apply (clarsimp simp: comp_def)\n apply (frule(1) caps_of_state_valid)\n apply (simp add: nasty_strengthen[unfolded o_def] cte_wp_at_caps_of_state)\n apply (intro conjI)\n apply (intro impI)\n apply (frule range_cover_stuff[where w=w and rv = 0 and sz = sz], simp_all)[1]\n apply (clarsimp simp: valid_cap_simps cap_aligned_def)+\n apply (frule alignUp_idem[OF is_aligned_weaken,where a = w])\n apply (erule range_cover.sz)\n apply (simp add: range_cover_def)\n apply (clarsimp simp: get_free_ref_def empty_descendants_range_in)\n apply (rule conjI[rotated], blast, clarsimp)\n apply (drule_tac x = \"(obj_ref_of node_cap,nat_to_cref (bits_of node_cap) slota)\" in bspec)\n apply (clarsimp simp: is_cap_simps nat_to_cref_def word_bits_def\n bits_of_def valid_cap_simps cap_aligned_def)+\n apply (simp add: free_index_of_def)\n apply (frule(1) range_cover_stuff[where sz = sz])\n apply (clarsimp dest!: valid_cap_aligned simp:cap_aligned_def word_bits_def)+\n apply simp+\n apply (clarsimp simp: get_free_ref_def)\n apply (erule disjE)\n apply (drule_tac x= \"cs!0\" in bspec)\n subgoal by clarsimp\n subgoal by simp\n apply (clarsimp simp: cte_wp_at_caps_of_state ex_cte_cap_wp_to_def)\n apply (rule_tac x=aa in exI,rule exI,rule exI)\n apply (rule conjI, assumption)\n apply simp\n done\nqed\n\nlemma asid_bits_ge_0:\n \"(0::word32) < 2 ^ asid_bits\" by (simp add: asid_bits_def)\n\nlemma retype_ret_valid_caps_captable[Untyped_AI_assms]:\n \"\\pspace_no_overlap_range_cover ptr sz (s::'state_ext::state_ext state) \\ 0 < us\n \\ range_cover ptr sz (obj_bits_api CapTableObject us) n \\ ptr \\ 0\n \\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object CapTableObject dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api CapTableObject us)) [0.. \\ CNodeCap (ptr_add ptr (y * 2 ^ obj_bits_api CapTableObject us)) us []\"\nby ((clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def slot_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def | rule conjI | intro conjI obj_at_foldr_intro imageI\n | rule is_aligned_add_multI[OF _ le_refl],\n (simp add:range_cover_def word_bits_def obj_bits_api_def slot_bits_def)+)+)[1]\n\nlemma retype_ret_valid_caps_aobj[Untyped_AI_assms]:\n \"\\ptr sz (s::'state_ext::state_ext state) x6 us n.\n \\pspace_no_overlap_range_cover ptr sz s \\ x6 \\ ASIDPoolObj \\\n range_cover ptr sz (obj_bits_api (ArchObject x6) us) n \\ ptr \\ 0\\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object (ArchObject x6) dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api (ArchObject x6) us)) [0.. \\ ArchObjectCap (ARM_A.arch_default_cap x6 (ptr_add ptr (y * 2 ^ obj_bits_api (ArchObject x6) us)) us dev)\"\n apply (rename_tac aobject_type us n)\n apply (case_tac aobject_type)\nby (clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def slot_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def | intro conjI obj_at_foldr_intro\n imageI valid_vm_rights_def\n | rule is_aligned_add_multI[OF _ le_refl]\n | fastforce simp:range_cover_def obj_bits_api_def\n default_arch_object_def valid_vm_rights_def word_bits_def a_type_def)+\n\n\nlemma copy_global_mappings_hoare_lift:(*FIXME: arch_split \\ these do not seem to be used globally *)\n assumes wp: \"\\ptr val. \\Q\\ store_pde ptr val \\\\rv. Q\\\"\n shows \"\\Q\\ copy_global_mappings pd \\\\rv. Q\\\"\n apply (simp add: copy_global_mappings_def)\n done\n\nlemma init_arch_objects_hoare_lift:\n assumes wp: \"\\oper. \\(P::'state_ext::state_ext state\\bool)\\ do_machine_op oper \\\\rv :: unit. Q\\\"\n \"\\ptr val. \\P\\ store_pde ptr val \\\\rv. P\\\"\n shows \"\\P and Q\\ init_arch_objects tp ptr sz us adds \\\\rv. Q\\\"\nproof -\n have pres: \"\\oper. \\P and Q\\ do_machine_op oper \\\\rv :: unit. Q\\\"\n \"\\P and Q\\ return () \\\\rv. Q\\\"\n by (wp wp | simp)+\n show ?thesis\n apply (simp add: init_arch_objects_def\n pres reserve_region_def\n split: Structures_A.apiobject_type.split\n aobject_type.split)\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp mapM_x_wp' copy_global_mappings_hoare_lift wp)\n apply simp\n done\nqed\n\n\nlemma cap_refs_in_kernel_windowD2:\n \"\\ cte_wp_at P p (s::'state_ext::state_ext state); cap_refs_in_kernel_window s \\\n \\ \\cap. P cap \\ region_in_kernel_window (cap_range cap) s\"\n apply (clarsimp simp: cte_wp_at_caps_of_state region_in_kernel_window_def)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply fastforce\n done\n\nlemma init_arch_objects_descendants_range[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). descendants_range x cref s \\ init_arch_objects ty ptr n us y\n \\\\rv s. descendants_range x cref s\\\"\n apply (simp add:descendants_range_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply (wps do_machine_op_mdb)\n apply (wp hoare_vcg_ball_lift)\n apply (rule hoare_pre)\n apply (wps store_pde_mdb_inv)\n apply wp\n apply simp\n apply fastforce\n done\n\nlemma init_arch_objects_caps_overlap_reserved[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). caps_overlap_reserved S s\\\n init_arch_objects ty ptr n us y\n \\\\rv s. caps_overlap_reserved S s\\\"\n apply (simp add:caps_overlap_reserved_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply fastforce\n done\n\nlemma set_untyped_cap_invs_simple[Untyped_AI_assms]:\n \"\\\\s. descendants_range_in {ptr .. ptr+2^sz - 1} cref s \\ pspace_no_overlap_range_cover ptr sz s \\ invs s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr \\ cap_is_device c = dev) cref s \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s. invs s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: cte_wp_at_caps_of_state invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp set_free_index_valid_pspace_simple set_cap_valid_mdb_simple\n set_cap_idle update_cap_ifunsafe)\n apply (simp add:valid_irq_node_def)\n apply wps\n apply (wp hoare_vcg_all_lift set_cap_irq_handlers set_cap_valid_arch_caps\n set_cap_irq_handlers cap_table_at_lift_valid set_cap_typ_at\n set_untyped_cap_refs_respects_device_simple)\n apply (clarsimp simp:cte_wp_at_caps_of_state is_cap_simps)\n apply (intro conjI, clarsimp)\n apply (rule ext, clarsimp simp:is_cap_simps)\n apply (clarsimp split:cap.splits simp:is_cap_simps appropriate_cte_cap_def)\n apply (drule(1) if_unsafe_then_capD[OF caps_of_state_cteD])\n apply clarsimp\n apply (clarsimp simp:is_cap_simps ex_cte_cap_wp_to_def appropriate_cte_cap_def cte_wp_at_caps_of_state)\n apply (clarsimp dest!:valid_global_refsD2 simp:cap_range_def)\n apply (simp add:valid_irq_node_def)\n apply (clarsimp simp:valid_irq_node_def)\n apply (clarsimp simp:no_cap_to_obj_with_diff_ref_def cte_wp_at_caps_of_state vs_cap_ref_def)\n apply (case_tac cap)\n apply (simp_all add:vs_cap_ref_def table_cap_ref_def)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap)\n apply simp_all\n apply (clarsimp simp:cap_refs_in_kernel_window_def\n valid_refs_def simp del:split_paired_All)\n apply (drule_tac x = cref in spec)\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply fastforce\n done\n\n\nlemma pbfs_atleast_pageBits':\n \"pageBits \\ pageBitsForSize sz\"by (cases sz, simp_all add: pageBits_def)\n\n\nlemma pbfs_less_wb':\n \"pageBitsForSize sz < word_bits\"by (cases sz, simp_all add: word_bits_conv pageBits_def)\n\nlemma delete_objects_rewrite[Untyped_AI_assms]:\n \"\\word_size_bits \\ sz; sz \\ word_bits; ptr && ~~ mask sz = ptr\\\n \\ delete_objects ptr sz =\n do y \\ modify (clear_um {ptr + of_nat k |k. k < 2 ^ sz});\n modify (detype {ptr && ~~ mask sz..ptr + 2 ^ sz - 1})\n od\"\n apply (clarsimp simp: delete_objects_def freeMemory_def)\n apply (subgoal_tac \"is_aligned (ptr &&~~ mask sz) sz\")\n apply (subst mapM_storeWord_clear_um)\n apply (simp)\n apply simp\n apply (simp add:range_cover_def)\n apply clarsimp\n apply (rule is_aligned_neg_mask)\n apply simp\n done\n\ndeclare store_pde_pred_tcb_at [wp]\n\n(* nonempty_table *)\ndefinition\n nonempty_table :: \"machine_word set \\ Structures_A.kernel_object \\ bool\"\nwhere\n \"nonempty_table S ko \\\n (a_type ko = AArch APageTable \\ a_type ko = AArch APageDirectory)\n \\ \\ empty_table S ko\"\n\nlemma reachable_pg_cap_exst_update[simp]:\n \"reachable_pg_cap x (trans_state f (s::'state_ext::state_ext state)) = reachable_pg_cap x s\"\n by (simp add:reachable_pg_cap_def vs_lookup_pages_def\n vs_lookup_pages1_def obj_at_def)\n\nlemma create_cap_valid_arch_caps[wp, Untyped_AI_assms]:\n \"\\valid_arch_caps\n and valid_cap (default_cap tp oref sz dev)\n and (\\(s::'state_ext::state_ext state). \\r\\obj_refs (default_cap tp oref sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n and cte_wp_at ((=) cap.NullCap) cref\n and K (tp \\ ArchObject ASIDPoolObj)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_arch_caps\\\"\n apply (simp add: create_cap_def set_cdt_def)\n apply (wp set_cap_valid_arch_caps hoare_vcg_disj_lift\n hoare_vcg_conj_lift hoare_vcg_all_lift hoare_vcg_imp_lift\n | simp add: trans_state_update[symmetric] del: trans_state_update split_paired_All split_paired_Ex imp_disjL split del: if_split)+\n apply (clarsimp simp del: split_paired_All split_paired_Ex\n imp_disjL\n simp: cte_wp_at_caps_of_state)\n apply (rule conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply (case_tac cref, fastforce)\n apply (simp add: obj_ref_none_no_asid)\n apply (rule conjI)\n apply (auto simp: is_cap_simps valid_cap_def second_level_tables_def\n obj_at_def nonempty_table_def a_type_simps)[1]\n apply (clarsimp simp del: imp_disjL)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply fastforce\n apply (auto simp: is_cap_simps)[1]\n done\n\nlemma create_cap_cap_refs_in_kernel_window[wp, Untyped_AI_assms]:\n \"\\cap_refs_in_kernel_window and cte_wp_at (\\c. cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref) \\\\rv. cap_refs_in_kernel_window\\\"\n apply (simp add: create_cap_def)\n apply (wp | simp)+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply blast\n done\n\nlemma store_pde_weaken:\n \"\\\\s. page_directory_at (p && ~~ mask pd_bits) s \\ P s\\ store_pde p e \\Q\\ =\n \\P\\ store_pde p e \\Q\\\"\n apply (rule iffI)\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (rule use_valid, assumption)\n apply (simp add: store_pde_def set_pd_def set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def a_type_simps vspace_bits_defs)\n apply (drule bspec, assumption)\n apply (simp add: simpler_store_pde_def obj_at_def fun_upd_def vspace_bits_defs\n split: Structures_A.kernel_object.splits arch_kernel_obj.splits)\n done\n\n\nlemma copy_global_mappings_nonempty_table: (* ARMHYP need change *)\n \"is_aligned pd pd_bits \\\n \\\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s) \\\n valid_arch_state s \\ pspace_aligned s\\\n copy_global_mappings pd\n \\\\rv s. \\ (obj_at (nonempty_table\n (set (second_level_tables (arch_state s)))) r s) \\\n valid_arch_state s \\ pspace_aligned s\\\"\n apply (simp add: copy_global_mappings_def)\n done\n\n\nlemma mapM_copy_global_mappings_nonempty_table[wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\pd\\set pds. is_aligned pd pd_bits)\\\n mapM_x copy_global_mappings pds\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp', rule copy_global_mappings_nonempty_table)\n apply simp_all\n done\n\nlemma init_arch_objects_nonempty_table[Untyped_AI_assms, wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\ref\\set refs. is_aligned ref (obj_bits_api tp us))\\\n init_arch_objects tp ptr bits us refs\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: init_arch_objects_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp unless_wp | wpc | simp add: reserve_region_def)+\n apply (clarsimp simp: obj_bits_api_def default_arch_object_def pd_bits_def pageBits_def)\n done\n\n\nlemma nonempty_table_caps_of[Untyped_AI_assms]:\n \"nonempty_table S ko \\ caps_of ko = {}\"\n by (auto simp: caps_of_def cap_of_def nonempty_table_def a_type_def\n split: Structures_A.kernel_object.split if_split_asm)\n\n\nlemma nonempty_default[simp, Untyped_AI_assms]:\n \"tp \\ Untyped \\ \\ nonempty_table S (default_object tp dev us)\"\n apply (case_tac tp, simp_all add: default_object_def nonempty_table_def\n a_type_def)\n apply (rename_tac aobject_type)\n apply (case_tac aobject_type, simp_all add: default_arch_object_def)\n apply (simp_all add: empty_table_def pde_ref_def valid_pde_mappings_def)\n done\n\nlemma set_pd_cte_wp_at_iin[wp]:\n \"\\\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\n set_pd q pd\n \\\\_ s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\"\n apply (simp add: set_pd_def set_object_def a_type_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def cte_wp_at_caps_of_state\n split: Structures_A.kernel_object.splits arch_kernel_obj.splits)\n apply (subst caps_of_state_after_update)\n apply (simp add: obj_at_def)+\n done\n\ncrunch cte_wp_at_iin[wp]: init_arch_objects\n \"\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\"\n (ignore: clearMemory wp: crunch_wps)\n\nlemmas init_arch_objects_ex_cte_cap_wp_to\n = init_arch_objects_excap\n\nlemma obj_is_device_vui_eq[Untyped_AI_assms]:\n \"valid_untyped_inv ui s\n \\ case ui of Retype slot reset ptr_base ptr tp us slots dev\n \\ obj_is_device tp dev = dev\"\n apply (cases ui, clarsimp)\n apply (clarsimp simp: obj_is_device_def\n split: apiobject_type.split)\n apply (intro impI conjI allI, simp_all add: is_frame_type_def default_object_def)\n apply (simp add: default_arch_object_def split: aobject_type.split)\n apply (auto simp: arch_is_frame_type_def)\n done\n\nlemma create_cap_ioports[wp, Untyped_AI_assms]:\n \"\\valid_ioports and cte_wp_at (\\_. True) cref\\ create_cap tp sz p dev (cref,oref) \\\\rv. valid_ioports\\\"\n by wpsimp\n\nend\n\nglobal_interpretation Untyped_AI? : Untyped_AI\n where nonempty_table = ARM_HYP.nonempty_table\n proof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact Untyped_AI_assms)?)\n qed\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/ARM_HYP/ArchUntyped_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.538983220687684, "lm_q2_score": 0.275129717879598, "lm_q1q2_score": 0.14829030144963962}} {"text": "(*<*)\ntheory Monitor_Impl\n imports Monitor\n Optimized_MTL\n \"HOL-Library.Code_Target_Nat\"\n Containers.Containers\n \"Generic_Join_Devel.Proj_Code\"\nbegin\n(*>*)\n\nsection \\Instantiation of the generic algorithm and code setup\\\n\nlemma [code_unfold del, symmetric, code_post del]: \"card \\ Cardinality.card'\" by simp\ndeclare [[code drop: card]] Set_Impl.card_code[code]\n\ninstantiation enat :: set_impl begin\ndefinition set_impl_enat :: \"(enat, set_impl) phantom\" where\n \"set_impl_enat = phantom set_RBT\"\n\ninstance ..\nend\n\nderive ccompare Formula.trm\nderive (eq) ceq Formula.trm\nderive (rbt) set_impl Formula.trm\nderive (eq) ceq Monitor.mregex\nderive ccompare Monitor.mregex\nderive (rbt) set_impl Monitor.mregex\nderive (rbt) mapping_impl Monitor.mregex\nderive (no) cenum Monitor.mregex\nderive (rbt) set_impl string8\nderive (rbt) mapping_impl string8\nderive (rbt) set_impl event_data\nderive (rbt) mapping_impl event_data\n\ntype_synonym 'a vmsaux = \"nat \\ (nat \\ 'a table) list\"\n\ndefinition valid_vmsaux :: \"args \\ nat \\ event_data vmsaux \\\n (nat \\ event_data table) list \\ bool\" where\n \"valid_vmsaux = (\\_ cur (t, aux) auxlist. t = cur \\ aux = auxlist)\"\n\ndefinition init_vmsaux :: \"args \\ event_data vmsaux\" where\n \"init_vmsaux = (\\_. (0, []))\"\n\ndefinition add_new_ts_vmsaux :: \"args \\ nat \\ event_data vmsaux \\ event_data vmsaux\" where\n \"add_new_ts_vmsaux = (\\args nt (t, auxlist). (nt, filter (\\(t, rel).\n memR (args_ivl args) (nt - t)) auxlist))\"\n\ndefinition join_vmsaux :: \"args \\ event_data table \\ event_data vmsaux \\ event_data vmsaux\" where\n \"join_vmsaux = (\\args rel1 (t, auxlist). (t, map (\\(t, rel).\n (t, join rel (args_pos args) rel1)) auxlist))\"\n\ndefinition add_new_table_vmsaux :: \"args \\ event_data table \\ event_data vmsaux \\\n event_data vmsaux\" where\n \"add_new_table_vmsaux = (\\args rel2 (cur, auxlist). (cur, (case auxlist of\n [] => [(cur, rel2)]\n | ((t, y) # ts) \\ if t = cur then (t, y \\ rel2) # ts else (cur, rel2) # auxlist)))\"\n\ndefinition result_vmsaux :: \"args \\ event_data vmsaux \\ event_data table\" where\n \"result_vmsaux = (\\args (cur, auxlist). eval_args_agg args\n (foldr (\\) [rel. (t, rel) \\ auxlist, memL (args_ivl args) (cur - t)] {}))\"\n\ntype_synonym 'a vmuaux = \"nat \\ (nat \\ 'a table \\ 'a table) list\"\n\ndefinition valid_vmuaux :: \"args \\ nat \\ event_data vmuaux \\\n (nat \\ event_data table \\ event_data table) list \\ bool\" where\n \"valid_vmuaux = (\\_ cur (t, aux) auxlist. t = cur \\ aux = auxlist)\"\n\ndefinition init_vmuaux :: \"args \\ event_data vmuaux\" where\n \"init_vmuaux = (\\_. (0, []))\"\n\ndefinition add_new_vmuaux :: \"args \\ event_data table \\ event_data table \\ nat \\\n event_data vmuaux \\ event_data vmuaux\" where\n \"add_new_vmuaux = (\\args rel1 rel2 nt (t, auxlist). (nt, update_until args rel1 rel2 nt auxlist))\"\n\ndefinition length_vmuaux :: \"args \\ event_data vmuaux \\ nat\" where\n \"length_vmuaux = (\\_ (_, auxlist). length auxlist)\"\n\ndefinition eval_vmuaux :: \"args \\ nat \\ event_data vmuaux \\\n event_data table list \\ event_data vmuaux\" where\n \"eval_vmuaux = (\\args nt (t, auxlist).\n (let (res, auxlist') = eval_until (args_ivl args) nt auxlist in (map (eval_args_agg args) res, (t, auxlist'))))\"\n\nglobal_interpretation verimon_maux: maux valid_vmsaux init_vmsaux add_new_ts_vmsaux join_vmsaux\n add_new_table_vmsaux result_vmsaux valid_vmuaux init_vmuaux add_new_vmuaux length_vmuaux\n eval_vmuaux\n defines vminit0 = \"maux.minit0 (init_vmsaux :: _ \\ event_data vmsaux) (init_vmuaux :: _ \\ event_data vmuaux) :: _ \\ Formula.formula \\ _\"\n and vminit = \"maux.minit (init_vmsaux :: _ \\ event_data vmsaux) (init_vmuaux :: _ \\ event_data vmuaux) :: Formula.formula \\ _\"\n and vminit_since = \"verimon_maux.init_since\"\n and vminit_until = \"verimon_maux.init_until\"\n and vminit_safe = \"maux.minit_safe (init_vmsaux :: _ \\ event_data vmsaux) (init_vmuaux :: _ \\ event_data vmuaux) :: Formula.formula \\ _\"\n and vmupdate_since = \"maux.update_since add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ event_data table)\"\n and vmeval = \"maux.meval add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ _) add_new_vmuaux (eval_vmuaux :: _ \\ _ \\ event_data vmuaux \\ _)\"\n and vmstep = \"maux.mstep add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ _) add_new_vmuaux (eval_vmuaux :: _ \\ _ \\ event_data vmuaux \\ _)\"\n and vmsteps0_stateless = \"maux.msteps0_stateless add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ _) add_new_vmuaux (eval_vmuaux :: _ \\ _ \\ event_data vmuaux \\ _)\"\n and vmsteps_stateless = \"maux.msteps_stateless add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ _) add_new_vmuaux (eval_vmuaux :: _ \\ _ \\ event_data vmuaux \\ _)\"\n and vmonitor = \"maux.monitor init_vmsaux add_new_ts_vmsaux join_vmsaux add_new_table_vmsaux (result_vmsaux :: _ \\ event_data vmsaux \\ _) init_vmuaux add_new_vmuaux (eval_vmuaux :: _ \\ _ \\ event_data vmuaux \\ _)\"\n unfolding valid_vmsaux_def init_vmsaux_def add_new_ts_vmsaux_def join_vmsaux_def\n add_new_table_vmsaux_def result_vmsaux_def valid_vmuaux_def init_vmuaux_def add_new_vmuaux_def\n length_vmuaux_def eval_vmuaux_def\n by unfold_locales auto\n\nglobal_interpretation default_maux: maux valid_mmsaux \"init_mmsaux :: _ \\ event_data mmsaux\" add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux'\n valid_mmuaux \"init_mmuaux :: _ \\ event_data mmuaux\" add_new_mmuaux length_mmuaux eval_mmuaux'\n defines minit0 = \"maux.minit0 (init_mmsaux :: _ \\ event_data mmsaux) (init_mmuaux :: _ \\ event_data mmuaux) :: _ \\ Formula.formula \\ _\"\n and minit = \"maux.minit (init_mmsaux :: _ \\ event_data mmsaux) (init_mmuaux :: _ \\ event_data mmuaux) :: Formula.formula \\ _\"\n and minit_since = \"default_maux.init_since\"\n and minit_until = \"default_maux.init_until\"\n and minit_safe = \"maux.minit_safe (init_mmsaux :: _ \\ event_data mmsaux) (init_mmuaux :: _ \\ event_data mmuaux) :: Formula.formula \\ _\"\n and mupdate_since = \"maux.update_since add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux'\"\n and meval = \"maux.meval add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux' add_new_mmuaux eval_mmuaux'\"\n and mstep = \"maux.mstep add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux' add_new_mmuaux eval_mmuaux'\"\n and msteps0_stateless = \"maux.msteps0_stateless add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux' add_new_mmuaux eval_mmuaux'\"\n and msteps_stateless = \"maux.msteps_stateless add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux' add_new_mmuaux eval_mmuaux'\"\n and monitor = \"maux.monitor init_mmsaux add_new_ts_mmsaux gc_join_mmsaux add_new_table_mmsaux result_mmsaux' init_mmuaux add_new_mmuaux eval_mmuaux'\"\n by unfold_locales\n\nlemma image_these: \"f ` Option.these X = Option.these (map_option f ` X)\"\n by (force simp: in_these_eq Bex_def image_iff map_option_case split: option.splits)\n\nthm default_maux.meval.simps(2)\n\nlemma meval_MPred: \"meval n ts db (MPred e tms) =\n (case Mapping.lookup db e of None \\ replicate (length ts) {} | Some Xs \\ map (\\X. \\v \\ X.\n (set_option (map_option (\\f. Table.tabulate f 0 n) (match tms v)))) Xs, MPred e tms)\"\n by (force split: option.splits simp: Option.these_def image_iff)\n\nlemmas meval_code[code] = default_maux.meval.simps(1) meval_MPred default_maux.meval.simps(3-)\n\ndefinition mk_db :: \"(Formula.name \\ event_data list set) list \\ _\" where\n \"mk_db t = Monitor.mk_db (\\n \\ set (map fst t). (\\v. (n, v)) ` the (map_of t n))\"\n\ndefinition rbt_fold :: \"_ \\ event_data tuple set_rbt \\ _ \\ _\" where\n \"rbt_fold = RBT_Set2.fold\"\n\ndefinition rbt_empty :: \"event_data list set_rbt\" where\n \"rbt_empty = RBT_Set2.empty\"\n\ndefinition rbt_insert :: \"_ \\ _ \\ event_data list set_rbt\" where\n \"rbt_insert = RBT_Set2.insert\"\n\nlemma saturate_commute:\n assumes \"\\s. r \\ g s\" \"\\s. g (insert r s) = g s\" \"\\s. r \\ s \\ h s = g s\"\n and terminates: \"mono g\" \"\\X. X \\ C \\ g X \\ C\" \"finite C\"\nshows \"saturate g {} = saturate h {r}\"\nproof (cases \"g {} = {r}\")\n case True\n with assms have \"g {r} = {r}\" \"h {r} = {r}\" by auto\n with True show ?thesis\n by (subst (1 2) saturate_code; subst saturate_code) (simp add: Let_def)\nnext\n case False\n then show ?thesis\n unfolding saturate_def while_def\n using while_option_finite_subset_Some[OF terminates] assms(1-3)\n by (subst while_option_commute_invariant[of \"\\S. S = {} \\ r \\ S\" \"\\S. g S \\ S\" g \"\\S. h S \\ S\" \"insert r\" h \"{}\", symmetric])\n (auto 4 4 dest: while_option_stop[of \"\\S. g S \\ S\" g \"{}\"])\nqed\n\ndefinition \"RPDs_aux = saturate (\\S. S \\ \\ (RPD ` S))\"\n\nlemma RPDs_aux_code[code]:\n \"RPDs_aux S = (let S' = S \\ Set.bind S RPD in if S' \\ S then S else RPDs_aux S')\"\n unfolding RPDs_aux_def bind_UNION\n by (subst saturate_code) auto\n\ndeclare RPDs_code[code del]\nlemma RPDs_code[code]: \"RPDs r = RPDs_aux {r}\"\n unfolding RPDs_aux_def RPDs_code\n by (rule saturate_commute[where C=\"RPDs r\"])\n (auto 0 3 simp: mono_def subset_singleton_iff RPDs_refl RPDs_trans finite_RPDs)\n\ndefinition \"LPDs_aux = saturate (\\S. S \\ \\ (LPD ` S))\"\n\nlemma LPDs_aux_code[code]:\n \"LPDs_aux S = (let S' = S \\ Set.bind S LPD in if S' \\ S then S else LPDs_aux S')\"\n unfolding LPDs_aux_def bind_UNION\n by (subst saturate_code) auto\n\ndeclare LPDs_code[code del]\nlemma LPDs_code[code]: \"LPDs r = LPDs_aux {r}\"\n unfolding LPDs_aux_def LPDs_code\n by (rule saturate_commute[where C=\"LPDs r\"])\n (auto 0 3 simp: mono_def subset_singleton_iff LPDs_refl LPDs_trans finite_LPDs)\n\nlemma is_empty_table_unfold [code_unfold]:\n \"X = empty_table \\ Set.is_empty X\"\n \"empty_table = X \\ Set.is_empty X\"\n \"Cardinality.eq_set X empty_table \\ Set.is_empty X\"\n \"Cardinality.eq_set empty_table X \\ Set.is_empty X\"\n \"set_eq X empty_table \\ Set.is_empty X\"\n \"set_eq empty_table X \\ Set.is_empty X\"\n \"X = (set_empty impl) \\ Set.is_empty X\"\n \"(set_empty impl) = X \\ Set.is_empty X\"\n \"Cardinality.eq_set X (set_empty impl) \\ Set.is_empty X\"\n \"Cardinality.eq_set (set_empty impl) X \\ Set.is_empty X\"\n \"set_eq X (set_empty impl) \\ Set.is_empty X\"\n \"set_eq (set_empty impl) X \\ Set.is_empty X\"\n unfolding set_eq_def set_empty_def empty_table_def Set.is_empty_def Cardinality.eq_set_def by auto\n\nlemma tabulate_rbt_code[code]: \"Monitor.mrtabulate (xs :: mregex list) f =\n (case ID CCOMPARE(mregex) of None \\ Code.abort (STR ''tabulate RBT_Mapping: ccompare = None'') (\\_. Monitor.mrtabulate (xs :: mregex list) f)\n | _ \\ RBT_Mapping (RBT_Mapping2.bulkload (List.map_filter (\\k. let fk = f k in if fk = empty_table then None else Some (k, fk)) xs)))\"\n unfolding mrtabulate.abs_eq RBT_Mapping_def\n by (auto split: option.splits)\n\nlemma combine_Mapping[code]:\n fixes t :: \"('a :: ccompare, 'b) mapping_rbt\" shows\n \"Mapping.combine f (RBT_Mapping t) (RBT_Mapping u) = \n (case ID CCOMPARE('a) of None \\ Code.abort (STR ''combine RBT_Mapping: ccompare = None'') (\\_. Mapping.combine f (RBT_Mapping t) (RBT_Mapping u))\n | Some _ \\ RBT_Mapping (RBT_Mapping2.join (\\_. f) t u))\"\n by (auto simp add: Mapping.combine.abs_eq Mapping_inject lookup_join split: option.split)\n\nlemma upd_set_empty[simp]: \"upd_set m f {} = m\"\n by transfer auto\n\nlemma upd_set_insert[simp]: \"upd_set m f (insert x A) = Mapping.update x (f x) (upd_set m f A)\"\n by (rule mapping_eqI) (auto simp: Mapping_lookup_upd_set Mapping.lookup_update')\n\nlemma upd_set_fold:\n assumes \"finite A\"\n shows \"upd_set m f A = Finite_Set.fold (\\a. Mapping.update a (f a)) m A\"\nproof -\n interpret comp_fun_idem \"\\a. Mapping.update a (f a)\"\n by unfold_locales (transfer; auto simp: fun_eq_iff)+\n from assms show ?thesis\n by (induct A arbitrary: m rule: finite.induct) auto\nqed\n\nlift_definition upd_cfi :: \"('a \\ 'b) \\ ('a, ('a, 'b) mapping) comp_fun_idem\"\n is \"\\f a m. Mapping.update a (f a) m\"\n by unfold_locales (transfer; auto simp: fun_eq_iff)+\n\nlemma upd_set_code[code]:\n \"upd_set m f A = (if finite A then set_fold_cfi (upd_cfi f) m A else Code.abort (STR ''upd_set: infinite'') (\\_. upd_set m f A))\"\n by (transfer fixing: m) (auto simp: upd_set_fold)\n\nlemma lexordp_eq_code[code]: \"lexordp_eq xs ys \\ (case xs of [] \\ True\n | x # xs \\ (case ys of [] \\ False\n | y # ys \\ if x < y then True else if x > y then False else lexordp_eq xs ys))\"\n by (subst lexordp_eq.simps) (auto split: list.split)\n\ndefinition \"filter_set m X t = Mapping.filter (filter_cond X m t) m\"\n\ndeclare [[code drop: shift_end]]\ndeclare shift_end.simps[folded filter_set_def, code]\n\nlemma upd_set'_empty[simp]: \"upd_set' m d f {} = m\"\n by (rule mapping_eqI) (auto simp add: upd_set'_lookup)\n\nlemma upd_set'_insert: \"d = f d \\ (\\x. f (f x) = f x) \\ upd_set' m d f (insert x A) =\n (let m' = (upd_set' m d f A) in case Mapping.lookup m' x of None \\ Mapping.update x d m'\n | Some v \\ Mapping.update x (f v) m')\"\n by (rule mapping_eqI) (auto simp: upd_set'_lookup Mapping.lookup_update' split: option.splits)\n\nlemma upd_set'_aux1: \"upd_set' Mapping.empty d f {b. b = k \\ (a, b) \\ A} =\n Mapping.update k d (upd_set' Mapping.empty d f {b. (a, b) \\ A})\"\n by (rule mapping_eqI) (auto simp add: Let_def upd_set'_lookup Mapping.lookup_update'\n Mapping.lookup_empty split: option.splits)\n\nlemma upd_set'_aux2: \"Mapping.lookup m k = None \\ upd_set' m d f {b. b = k \\ (a, b) \\ A} =\n Mapping.update k d (upd_set' m d f {b. (a, b) \\ A})\"\n by (rule mapping_eqI) (auto simp add: upd_set'_lookup Mapping.lookup_update' split: option.splits)\n\nlemma upd_set'_aux3: \"Mapping.lookup m k = Some v \\ upd_set' m d f {b. b = k \\ (a, b) \\ A} =\n Mapping.update k (f v) (upd_set' m d f {b. (a, b) \\ A})\"\n by (rule mapping_eqI) (auto simp add: upd_set'_lookup Mapping.lookup_update' split: option.splits)\n\nlemma upd_set'_aux4: \"k \\ fst ` A \\ upd_set' Mapping.empty d f {b. (k, b) \\ A} = Mapping.empty\"\n by (rule mapping_eqI) (auto simp add: upd_set'_lookup Mapping.lookup_update' Domain.DomainI fst_eq_Domain\n split: option.splits)\n\nlemma upd_nested_empty[simp]: \"upd_nested m d f {} = m\"\n by (rule mapping_eqI) (auto simp add: upd_nested_lookup split: option.splits)\n\ndefinition upd_nested_step :: \"'c \\ ('c \\ 'c) \\ 'a \\ 'b \\ ('a, ('b, 'c) mapping) mapping \\\n ('a, ('b, 'c) mapping) mapping\" where\n \"upd_nested_step d f x m = (case x of (k, k') \\\n (case Mapping.lookup m k of Some m' \\\n (case Mapping.lookup m' k' of Some v \\ Mapping.update k (Mapping.update k' (f v) m') m\n | None \\ Mapping.update k (Mapping.update k' d m') m)\n | None \\ Mapping.update k (Mapping.update k' d Mapping.empty) m))\"\n\nlemma upd_nested_insert:\n \"d = f d \\ (\\x. f (f x) = f x) \\ upd_nested m d f (insert x A) =\n upd_nested_step d f x (upd_nested m d f A)\"\n unfolding upd_nested_step_def\n using upd_set'_aux1[of d f _ _ A] upd_set'_aux2[of _ _ d f _ A] upd_set'_aux3[of _ _ _ d f _ A]\n upd_set'_aux4[of _ A d f]\n by (auto simp add: Let_def upd_nested_lookup upd_set'_lookup Mapping.lookup_update'\n Mapping.lookup_empty split: option.splits prod.splits if_splits intro!: mapping_eqI)\n\ndefinition upd_nested_max_tstp where\n \"upd_nested_max_tstp m d X = upd_nested m d (max_tstp d) X\"\n\nlemma upd_nested_max_tstp_fold:\n assumes \"finite X\"\n shows \"upd_nested_max_tstp m d X = Finite_Set.fold (upd_nested_step d (max_tstp d)) m X\"\nproof -\n interpret comp_fun_idem \"upd_nested_step d (max_tstp d)\"\n by (unfold_locales; rule ext)\n (auto simp add: comp_def upd_nested_step_def Mapping.lookup_update' Mapping.lookup_empty\n update_update max_tstp_d_d max_tstp_idem' split: option.splits)\n note upd_nested_insert' = upd_nested_insert[of d \"max_tstp d\",\n OF max_tstp_d_d[symmetric] max_tstp_idem']\n show ?thesis\n using assms\n by (induct X arbitrary: m rule: finite.induct)\n (auto simp add: upd_nested_max_tstp_def upd_nested_insert')\nqed\n\nlift_definition upd_nested_max_tstp_cfi ::\n \"ts + tp \\ ('a \\ 'b, ('a, ('b, ts + tp) mapping) mapping) comp_fun_idem\"\n is \"\\d. upd_nested_step d (max_tstp d)\"\n by (unfold_locales; rule ext)\n (auto simp add: comp_def upd_nested_step_def Mapping.lookup_update' Mapping.lookup_empty\n update_update max_tstp_d_d max_tstp_idem' split: option.splits)\n\nlemma upd_nested_max_tstp_code[code]:\n \"upd_nested_max_tstp m d X = (if finite X then set_fold_cfi (upd_nested_max_tstp_cfi d) m X\n else Code.abort (STR ''upd_nested_max_tstp: infinite'') (\\_. upd_nested_max_tstp m d X))\"\n by transfer (auto simp add: upd_nested_max_tstp_fold)\n\ndeclare [[code drop: add_new_mmuaux]]\ndeclare add_new_mmuaux.simps[folded upd_nested_max_tstp_def, code]\n\nlemma filter_set_empty[simp]: \"filter_set m {} t = m\"\n unfolding filter_set_def\n by transfer (auto simp: fun_eq_iff split: option.splits)\n\nlemma filter_set_insert[simp]: \"filter_set m (insert x A) t = (let m' = filter_set m A t in\n case Mapping.lookup m' x of Some u \\ if t = u then Mapping.delete x m' else m' | _ \\ m')\"\n unfolding filter_set_def\n by transfer (auto simp: fun_eq_iff Let_def Map_To_Mapping.map_apply_def split: option.splits)\n\nlemma filter_set_fold:\n assumes \"finite A\"\n shows \"filter_set m A t = Finite_Set.fold (\\a m.\n case Mapping.lookup m a of Some u \\ if t = u then Mapping.delete a m else m | _ \\ m) m A\"\nproof -\n interpret comp_fun_idem \"\\a m.\n case Mapping.lookup m a of Some u \\ if t = u then Mapping.delete a m else m | _ \\ m\"\n by unfold_locales\n (transfer; auto simp: fun_eq_iff Map_To_Mapping.map_apply_def split: option.splits)+\n from assms show ?thesis\n by (induct A arbitrary: m rule: finite.induct) (auto simp: Let_def)\nqed\n\nlift_definition filter_cfi :: \"'b \\ ('a, ('a, 'b) mapping) comp_fun_idem\"\n is \"\\t a m.\n case Mapping.lookup m a of Some u \\ if t = u then Mapping.delete a m else m | _ \\ m\"\n by unfold_locales\n (transfer; auto simp: fun_eq_iff Map_To_Mapping.map_apply_def split: option.splits)+\n\nlemma filter_set_code[code]:\n \"filter_set m A t = (if finite A then set_fold_cfi (filter_cfi t) m A else Code.abort (STR ''upd_set: infinite'') (\\_. filter_set m A t))\"\n by (transfer fixing: m) (auto simp: filter_set_fold)\n\nlemma filter_Mapping[code]:\n fixes t :: \"('a :: ccompare, 'b) mapping_rbt\" shows\n \"Mapping.filter P (RBT_Mapping t) = \n (case ID CCOMPARE('a) of None \\ Code.abort (STR ''filter RBT_Mapping: ccompare = None'') (\\_. Mapping.filter P (RBT_Mapping t))\n | Some _ \\ RBT_Mapping (RBT_Mapping2.filter (case_prod P) t))\"\n by (auto simp add: Mapping.filter.abs_eq Mapping_inject split: option.split)\n\ndefinition \"filter_join pos X m = Mapping.filter (join_filter_cond pos X) m\"\n\ndeclare [[code drop: join_mmsaux]]\ndeclare join_mmsaux.simps[folded filter_join_def, code]\n\nlemma filter_join_False_empty: \"filter_join False {} m = m\"\n unfolding filter_join_def\n by transfer (auto split: option.splits)\n\nlemma filter_join_False_insert: \"filter_join False (insert a A) m =\n filter_join False A (Mapping.delete a m)\"\nproof -\n {\n fix x\n have \"Mapping.lookup (filter_join False (insert a A) m) x =\n Mapping.lookup (filter_join False A (Mapping.delete a m)) x\"\n by (auto simp add: filter_join_def Mapping.lookup_filter Mapping_lookup_delete\n split: option.splits)\n }\n then show ?thesis\n by (simp add: mapping_eqI)\nqed\n\nlemma filter_join_False:\n assumes \"finite A\"\n shows \"filter_join False A m = Finite_Set.fold Mapping.delete m A\"\nproof -\n interpret comp_fun_idem \"Mapping.delete\"\n by (unfold_locales; transfer) (fastforce simp add: comp_def)+\n from assms show ?thesis\n by (induction A arbitrary: m rule: finite.induct)\n (auto simp add: filter_join_False_empty filter_join_False_insert fold_fun_left_comm)\nqed\n\nlift_definition filter_not_in_cfi :: \"('a, ('a, 'b) mapping) comp_fun_idem\" is \"Mapping.delete\"\n by (unfold_locales; transfer) (fastforce simp add: comp_def)+\n\nlemma filter_join_code[code]:\n \"filter_join pos A m =\n (if \\pos \\ finite A \\ card A < Mapping.size m then set_fold_cfi filter_not_in_cfi m A\n else Mapping.filter (join_filter_cond pos A) m)\"\n unfolding filter_join_def\n by (transfer fixing: m) (use filter_join_False in \\auto simp add: filter_join_def\\)\n\ndefinition set_minus :: \"'a set \\ 'a set \\ 'a set\" where\n \"set_minus X Y = X - Y\"\n\nlift_definition remove_cfi :: \"('a, 'a set) comp_fun_idem\"\n is \"\\b a. a - {b}\"\n by unfold_locales auto\n\nlemma set_minus_finite:\n assumes fin: \"finite Y\"\n shows \"set_minus X Y = Finite_Set.fold (\\a X. X - {a}) X Y\"\nproof -\n interpret comp_fun_idem \"\\a X. X - {a}\"\n by unfold_locales auto\n from assms show ?thesis\n by (induction Y arbitrary: X rule: finite.induct) (auto simp add: set_minus_def)\nqed\n\nlemma set_minus_code[code]: \"set_minus X Y =\n (if finite Y \\ card Y < card X then set_fold_cfi remove_cfi X Y else X - Y)\"\n by transfer (use set_minus_finite in \\auto simp add: set_minus_def\\)\n\ndeclare [[code drop: bin_join]]\ndeclare bin_join.simps[folded set_minus_def, code]\n\ndefinition remove_Union where\n \"remove_Union A X B = A - (\\x \\ X. B x)\"\n\nlemma remove_Union_finite: \n assumes \"finite X\"\n shows \"remove_Union A X B = Finite_Set.fold (\\x A. A - B x) A X\"\nproof -\n interpret comp_fun_idem \"\\x A. A - B x\"\n by unfold_locales auto\n from assms show ?thesis\n by (induct X arbitrary: A rule: finite_induct) (auto simp: remove_Union_def)\nqed\n\nlift_definition remove_Union_cfi :: \"('a \\ 'b set) \\ ('a, 'b set) comp_fun_idem\" is \"\\B x A. A - B x\"\n by unfold_locales auto\n\nlemma remove_Union_code[code]: \"remove_Union A X B =\n (if finite X then set_fold_cfi (remove_Union_cfi B) A X else A - (\\x \\ X. B x))\"\n by (transfer fixing: A X B) (use remove_Union_finite[of X A B] in \\auto simp add: remove_Union_def\\)\n\nlemma tabulate_remdups: \"Mapping.tabulate xs f = Mapping.tabulate (remdups xs) f\"\n by (transfer fixing: xs f) (auto simp: map_of_map_restrict)\n\nlift_definition clearjunk :: \"(string8 \\ event_data list set) list \\ (string8, event_data list set list) alist\" is\n \"\\t. List.map_filter (\\(p, X). if X = {} then None else Some (p, [X])) (AList.clearjunk t)\"\n unfolding map_filter_def o_def list.map_comp\n by (subst map_cong[OF refl, of _ _ fst]) (auto simp: map_filter_def distinct_map_fst_filter split: if_splits)\n\nlemma map_filter_snd_map_filter: \"List.map_filter (\\(a, b). if P b then None else Some (f a b)) xs =\n map (\\(a, b). f a b) (filter (\\x. \\ P (snd x)) xs)\"\n by (simp add: map_filter_def prod.case_eq_if)\n\nlemma mk_db_code_alist:\n \"mk_db t = Assoc_List_Mapping (clearjunk t)\"\n unfolding mk_db_def Assoc_List_Mapping_def\n by (transfer' fixing: t)\n (auto simp: map_filter_snd_map_filter fun_eq_iff map_of_map image_iff map_of_clearjunk\n map_of_filter_apply dest: weak_map_of_SomeI intro!: bexI[rotated, OF map_of_SomeD]\n split: if_splits option.splits)\n\nlemma mk_db_code[code]:\n \"mk_db t = Mapping.of_alist (List.map_filter (\\(p, X). if X = {} then None else Some (p, [X])) (AList.clearjunk t))\"\n unfolding mk_db_def\n by (transfer' fixing: t) (auto simp: map_filter_snd_map_filter fun_eq_iff map_of_map image_iff\n map_of_clearjunk map_of_filter_apply dest: weak_map_of_SomeI intro!: bexI[rotated, OF map_of_SomeD]\n split: if_splits option.splits)\n\ndeclare [[code drop: New_max_getIJ_genericJoin New_max_getIJ_wrapperGenericJoin]]\ndeclare New_max.genericJoin_code[folded remove_Union_def, code]\ndeclare New_max.wrapperGenericJoin.simps[folded remove_Union_def, code]\n\n(*<*)\nend\n(*>*)\n", "meta": {"author": "cc23", "repo": "MFODL-Typing", "sha": "d5c19d3035418f91dff8aaeb3f1a3984d81f7b64", "save_path": "github-repos/isabelle/cc23-MFODL-Typing", "path": "github-repos/isabelle/cc23-MFODL-Typing/MFODL-Typing-d5c19d3035418f91dff8aaeb3f1a3984d81f7b64/thys/MFODL_Monitor_Devel/Monitor_Impl.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2942149721629888, "lm_q1q2_score": 0.1482567399349717}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(* Arch specific lemmas that should be moved into theory files before CRefine *)\n\ntheory ArchMove_C\nimports \"../Move_C\"\nbegin\n\n(* FIXME move: need a theory on top of CSpec that arches can share *)\n(* word size corresponding to a C int (e.g. 32 bit signed on x64 and ARM *)\ntype_synonym int_sword = \"machine_word_len signed word\"\n\n(* FIXME: rewrite using 'unat_shiftr_shiftl_mask_zero *)\n(* this one is specialised to a PDE for a supersection *)\nlemma vaddr_segment_nonsense6:\n \"is_aligned (p :: word32) 14 \\\n (p + (vaddr >> 21 << 3) && ~~ mask 14) = p\"\n apply (rule is_aligned_add_helper[THEN conjunct2])\n apply (erule is_aligned_weaken, simp)\n apply simp\n apply (rule shiftl_less_t2n[where m=14 and n=3 and 'a=machine_word_len, simplified])\n apply (rule shiftr_less_t2n'[where m=11 and n=21 and 'a=machine_word_len, simplified])\n done\n\n(* Short-hand for unfolding cumbersome machine constants *)\n(* FIXME MOVE these should be in refine, and the _eq forms should NOT be declared [simp]! *)\n(* FIXME YUCK where did you come from *)\ndeclare ptBits_eq[simp del] (* used everywhere in CRefine, breaks clarsimp-normal form of rules *)\ndeclare pdBits_eq[simp del] (* used everywhere in CRefine, breaks clarsimp-normal form of rules *)\ndeclare pteBits_eq[simp del] (* used everywhere in CRefine, breaks clarsimp-normal form of rules *)\ndeclare pdeBits_eq[simp del] (* used everywhere in CRefine, breaks clarsimp-normal form of rules *)\ndeclare vcpuBits_eq[simp del] (* used everywhere in CRefine, breaks clarsimp-normal form of rules *)\n\nlemma ps_clear_is_aligned_ksPSpace_None:\n \"\\ps_clear p n s; is_aligned p n; 0 mask n\\\n \\ ksPSpace s (p + d) = None\"\n apply (simp add: ps_clear_def add_diff_eq[symmetric] mask_2pm1[symmetric])\n apply (drule equals0D[where a=\"p + d\"])\n apply (simp add: dom_def word_gt_0 del: word_neq_0_conv)\n apply (drule mp)\n apply (rule word_plus_mono_right)\n apply simp\n apply (simp add: mask_2pm1)\n apply (erule is_aligned_no_overflow')\n apply (drule mp)\n apply (case_tac \"(0::word32)<2^n\")\n apply (frule le_m1_iff_lt[of \"(2::word32)^n\" d, THEN iffD1])\n apply (simp add: mask_2pm1[symmetric])\n apply (erule (1) is_aligned_no_wrap')\n apply (simp add: is_aligned_mask mask_2pm1 not_less word_bits_def\n power_overflow)\n by assumption\n\nlemma ps_clear_is_aligned_ctes_None:\n assumes \"ps_clear p tcbBlockSizeBits s\"\n and \"is_aligned p tcbBlockSizeBits\"\n shows \"ksPSpace s (p + 2*2^cteSizeBits) = None\"\n and \"ksPSpace s (p + 3*2^cteSizeBits) = None\"\n and \"ksPSpace s (p + 4*2^cteSizeBits) = None\"\n by (auto intro: assms ps_clear_is_aligned_ksPSpace_None\n simp: objBits_defs mask_def)+\n\nlemma unat_ucast_prio_L1_cmask_simp:\n \"unat (ucast (p::priority) && 0x1F :: machine_word) = unat (p && 0x1F)\"\n using unat_ucast_prio_mask_simp[where m=5]\n by (simp add: mask_def)\n\nlemma machine_word_and_1F_less_20:\n \"(w :: machine_word) && 0x1F < 0x20\"\n by (rule word_and_less', simp)\n\nlemma prio_ucast_shiftr_wordRadix_helper: (* FIXME generalise *)\n \"(ucast (p::priority) >> wordRadix :: machine_word) < 8\"\n unfolding maxPriority_def numPriorities_def wordRadix_def\n using unat_lt2p[where x=p]\n apply (clarsimp simp add: word_less_nat_alt shiftr_div_2n' unat_ucast_upcast is_up word_le_nat_alt)\n apply arith\n done\n\nlemma prio_ucast_shiftr_wordRadix_helper': (* FIXME generalise *)\n \"(ucast (p::priority) >> wordRadix :: machine_word) \\ 7\"\n unfolding maxPriority_def numPriorities_def wordRadix_def\n using unat_lt2p[where x=p]\n apply (clarsimp simp add: word_less_nat_alt shiftr_div_2n' unat_ucast_upcast is_up word_le_nat_alt)\n apply arith\n done\n\nlemma prio_unat_shiftr_wordRadix_helper': (* FIXME generalise *)\n \"unat ((p::priority) >> wordRadix) \\ 7\"\n unfolding maxPriority_def numPriorities_def wordRadix_def\n using unat_lt2p[where x=p]\n apply (clarsimp simp add: word_less_nat_alt shiftr_div_2n' unat_ucast_upcast is_up word_le_nat_alt)\n apply arith\n done\n\nlemma prio_ucast_shiftr_wordRadix_helper2:\n \"(ucast (p::priority) >> wordRadix :: machine_word) < 0x20\"\n by (rule order_less_trans[OF prio_ucast_shiftr_wordRadix_helper]; simp)\n\n(* FIXME: Move to Schedule_R.thy. Make Arch_switchToThread_obj_at a specialisation of this *)\nlemma Arch_switchToThread_obj_at_pre:\n \"\\obj_at' (Not \\ tcbQueued) t\\\n Arch.switchToThread t\n \\\\rv. obj_at' (Not \\ tcbQueued) t\\\"\n apply (simp add: ARM_HYP_H.switchToThread_def)\n apply (wp doMachineOp_obj_at setVMRoot_obj_at'_no_vcpu hoare_drop_imps | wpc)+\n done\n\n(* FIXME: This is cheating since ucast from 10 to 16 will never give us 0xFFFF.\n However type of 10 word is from irq oracle so it is the oracle that matters not this lemma.\n (Xin) *)\nlemma ucast_not_helper_cheating:\n fixes a:: \"10 word\"\n assumes a: \"ucast a \\ (0xFFFF :: word16)\"\n shows \"ucast a \\ (0xFFFF::32 signed word)\"\n by (word_bitwise,simp)\n\nlemma ucast_helper_not_maxword:\n \"UCAST(10 \\ 32) x \\ 0xFFFF\"\n apply (subgoal_tac \"UCAST(10 \\ 32) x \\ UCAST(10 \\ 32) max_word\")\n apply (rule notI)\n defer\n apply (rule ucast_up_mono_le)\n apply simp\n apply simp\n by (simp add: max_word_def)\n\nlemmas ucast_helper_simps_32 =\n ucast_helper_not_maxword arg_cong[where f=\"UCAST(16 \\ 32)\", OF minus_one_norm]\n\nlemma addToBitmap_sets_L1Bitmap_same_dom:\n \"\\\\s. p \\ maxPriority \\ d' = d \\ addToBitmap d' p\n \\\\rv s. ksReadyQueuesL1Bitmap s d \\ 0 \\\"\n unfolding addToBitmap_def bitmap_fun_defs\n apply wpsimp\n by (metis nth_0 of_nat_numeral prioToL1Index_bit_set word_neq_0_conv word_or_zero)\n\ncontext begin interpretation Arch .\n\nlemma setCTE_asidpool':\n \"\\ ko_at' (ASIDPool pool) p \\ setCTE c p' \\\\_. ko_at' (ASIDPool pool) p\\\"\n apply (clarsimp simp: setCTE_def)\n apply (simp add: setObject_def split_def)\n apply (rule hoare_seq_ext [OF _ hoare_gets_post])\n apply (clarsimp simp: valid_def in_monad)\n apply (frule updateObject_type)\n apply (clarsimp simp: obj_at'_def projectKOs)\n apply (rule conjI)\n apply (clarsimp simp: lookupAround2_char1)\n apply (case_tac obj', auto)[1]\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object, auto)[1]\n apply (simp add: updateObject_cte)\n apply (clarsimp simp: updateObject_cte typeError_def magnitudeCheck_def in_monad\n split: kernel_object.splits if_splits option.splits)\n apply (clarsimp simp: ps_clear_upd' lookupAround2_char1)\n done\n\nlemma udpateCap_asidpool':\n \"\\ ko_at' (ASIDPool pool) p \\ updateCap c p' \\\\_. ko_at' (ASIDPool pool) p\\\"\n apply (simp add: updateCap_def)\n apply (wp setCTE_asidpool')\n done\n\nlemma asid_pool_at_ko:\n \"asid_pool_at' p s \\ \\pool. ko_at' (ASIDPool pool) p s\"\n apply (clarsimp simp: typ_at'_def obj_at'_def ko_wp_at'_def projectKOs)\n apply (case_tac ko, auto)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object, auto)[1]\n apply (rename_tac asidpool)\n apply (case_tac asidpool, auto)[1]\n done\n\nlemma dmo_invalidateCacheRange_RAM_invs'[wp]:\n \"valid invs' (doMachineOp (invalidateCacheRange_RAM vs ve ps)) (\\rv. invs')\"\n apply (wp dmo_invs' no_irq no_irq_invalidateCacheRange_RAM)\n apply (clarsimp simp: disj_commute[of \"pointerInUserData p s\" for p s])\n apply (erule use_valid)\n apply (wp, simp)\n done\n\nlemma empty_fail_findPDForASID[iff]:\n \"empty_fail (findPDForASID asid)\"\n apply (simp add: findPDForASID_def liftME_def)\n apply (intro empty_fail_bindE, simp_all split: option.split)\n apply (simp add: assertE_def split: if_split)\n apply (simp add: assertE_def split: if_split)\n apply (simp add: empty_fail_getObject)\n apply (simp add: assertE_def liftE_bindE checkPDAt_def split: if_split)\n done\n\nlemma empty_fail_findPDForASIDAssert[iff]:\n \"empty_fail (findPDForASIDAssert asid)\"\n apply (simp add: findPDForASIDAssert_def catch_def\n checkPDAt_def checkPDUniqueToASID_def\n checkPDASIDMapMembership_def)\n apply (intro empty_fail_bind, simp_all split: sum.split)\n done\n\nlemma vcpu_at_ko:\n \"vcpu_at' p s \\ \\vcpu. ko_at' (vcpu::vcpu) p s\"\n apply (clarsimp simp: typ_at'_def obj_at'_def ko_wp_at'_def projectKOs)\n apply (case_tac ko; simp)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object, auto)[1]\n done\n\ncrunch inv'[wp]: archThreadGet P\n\n(* FIXME MOVE near thm tg_sp' *)\nlemma atg_sp':\n \"\\P\\ archThreadGet f p \\\\t. obj_at' (\\t'. f (tcbArch t') = t) p and P\\\"\n including no_pre\n apply (simp add: archThreadGet_def)\n apply wp\n apply (rule hoare_strengthen_post)\n apply (rule getObject_tcb_sp)\n apply clarsimp\n apply (erule obj_at'_weakenE)\n apply simp\n done\n\n(* FIXME: MOVE to EmptyFail *)\nlemma empty_fail_archThreadGet [intro!, wp, simp]:\n \"empty_fail (archThreadGet f p)\"\n by (simp add: archThreadGet_def getObject_def split_def)\n\nlemma cap_case_EndpointCap_NotificationCap:\n \"(case cap of EndpointCap v0 v1 v2 v3 v4 v5 \\ f v0 v1 v2 v3 v4 v5\n | NotificationCap v0 v1 v2 v3 \\ g v0 v1 v2 v3\n | _ \\ h)\n = (if isEndpointCap cap\n then f (capEPPtr cap) (capEPBadge cap) (capEPCanSend cap) (capEPCanReceive cap)\n (capEPCanGrant cap) (capEPCanGrantReply cap)\n else if isNotificationCap cap\n then g (capNtfnPtr cap) (capNtfnBadge cap) (capNtfnCanSend cap) (capNtfnCanReceive cap)\n else h)\"\n by (simp add: isCap_simps split: capability.split, blast)\n\nlemma mab_gt_2 [simp]:\n \"2 \\ msg_align_bits\" by (simp add: msg_align_bits)\n\nlemmas pt_bits_def' = pt_bits_def[simplified pte_bits_def, simplified]\nlemmas pd_bits_def' = pd_bits_def[simplified pde_bits_def, simplified]\nlemmas page_bits_def' = page_bits_def[simplified pageBits_def, simplified]\nlemmas ptBits_def' = ptBits_def[simplified pteBits_def, simplified]\nlemmas pdBits_def' = pdBits_def[simplified pdeBits_def, simplified]\nlemmas pt_index_bits_def' = pt_index_bits_def[simplified pt_bits_def pte_bits_def, simplified]\nlemmas vcpuBits_def' = vcpuBits_def[simplified pageBits_def, simplified]\nlemmas vcpu_bits_def' = vcpu_bits_def[simplified pageBits_def, simplified]\n\nlemmas table_bits_defs = pt_bits_def' pte_bits_def pd_bits_def' pde_bits_def\n pageBits_def page_bits_def'\n pteBits_def pdeBits_def\n pt_index_bits_def'\n ptBits_def' pdBits_def'\n\nlemmas machine_bits_defs = table_bits_defs\n vcpuBits_def' vcpu_bits_def'\n\n(* FIXME: move to where is_aligned_ptrFromPAddr is *)\nlemma is_aligned_ptrFromPAddr_pageBitsForSize:\n \"is_aligned p (pageBitsForSize sz) \\ is_aligned (ptrFromPAddr p) (pageBitsForSize sz)\"\n by (cases sz ; simp add: is_aligned_ptrFromPAddr_n pageBits_def)\n\n(* FIXME: generalise, move to Word_Lib, and/or rewrite using\n 'leq_high_bits_shiftr_low_bits_leq_bits' *)\nlemma le_mask_asid_bits_helper:\n \"x \\ 2 ^ asid_high_bits - 1 \\ (x::word32) << asid_low_bits \\ mask asid_bits\"\n apply (simp add: mask_def)\n apply (drule le2p_bits_unset_32)\n apply (simp add: asid_high_bits_def word_bits_def)\n apply (subst upper_bits_unset_is_l2p_32 [symmetric])\n apply (simp add: asid_bits_def word_bits_def)\n apply (clarsimp simp: asid_bits_def asid_low_bits_def asid_high_bits_def nth_shiftl)\n done\n\nlemma valid_objs_valid_pte': \"\\ valid_objs' s ; ko_at' (ko :: pte) p s \\ \\ valid_pte' ko s\"\n by (fastforce simp add: obj_at'_def ran_def valid_obj'_def projectKOs valid_objs'_def)\n\nlemma is_aligned_pageBitsForSize_minimum:\n \"\\ is_aligned p (pageBitsForSize sz) ; n \\ pageBits \\ \\ is_aligned p n\"\n apply (cases sz; clarsimp simp: pageBits_def)\n apply (erule is_aligned_weaken, simp)+\n done\n\n(* FIXME: generalise, move to Word_Lib, and/or rewrite using 'shift_then_mask_eq_shift_low_bits' *)\nlemma shiftr_asid_low_bits_mask_asid_high_bits:\n \"(asid :: word32) \\ mask asid_bits\n \\ (asid >> asid_low_bits) && mask asid_high_bits = asid >> asid_low_bits\"\n apply (rule iffD2 [OF mask_eq_iff_w2p])\n apply (simp add: asid_high_bits_def word_size)\n apply (rule shiftr_less_t2n)\n apply (simp add: asid_low_bits_def asid_high_bits_def mask_def)\n apply (simp add: asid_bits_def)\n done\n\nlemma ucast_asid_high_bits_is_shift:\n \"asid \\ mask asid_bits\n \\ ucast (asid_high_bits_of asid) = (asid >> asid_low_bits)\"\n unfolding asid_bits_def asid_low_bits_def asid_high_bits_of_def\n by (rule ucast_ucast_eq_mask_shift, simp)\n\n(* FIXME: generalise, move to Word_Lib, and/or rewrite using 'leq_low_bits_iff_zero' *)\nlemma shiftr_asid_low_bits_mask_eq_0:\n \"\\ (asid :: word32) \\ mask asid_bits; asid >> asid_low_bits = 0 \\\n \\ (asid && mask asid_low_bits = 0) = (asid = 0)\"\n apply (rule iffI[rotated])\n apply simp\n apply (rule asid_low_high_bits)\n apply simp\n apply (simp add: ucast_asid_high_bits_is_shift)\n apply (simp add: mask_def)\n apply simp\n done\n\n(* FIXME: consider generalising and moving to Word_Lemmas *)\nlemma vaddr_segment_nonsense3_folded:\n \"is_aligned (p :: word32) pageBits \\\n (p + ((vaddr >> pageBits) && mask (pt_bits - pte_bits) << pte_bits) && ~~ mask pt_bits) = p\"\n apply (rule is_aligned_add_helper[THEN conjunct2])\n apply (simp add: vspace_bits_defs mask_def)+\n apply (rule shiftl_less_t2n[where m=12 and n=3, simplified, OF and_mask_less'[where n=9, unfolded mask_def, simplified]])\n apply simp+\n done\n\n(* FIXME: ARMHYP move, to SR_Lemmas? *)\nlemma isPTE_exclusion:\n \"isInvalidPTE pte \\ \\ (isSmallPagePTE pte) \\ \\ (isLargePagePTE pte)\"\n \"isLargePagePTE pte \\ \\ (isInvalidPTE pte) \\ \\ (isSmallPagePTE pte)\"\n \"isSmallPagePTE pte \\ \\ (isInvalidPTE pte) \\ \\ (isLargePagePTE pte)\"\n by (cases pte ; clarsimp simp: isInvalidPTE_def isSmallPagePTE_def isLargePagePTE_def)+\n\nlemma length_superSectionPDEOffsets_simp [simp]:\n \"length superSectionPDEOffsets = 16\"\n by (simp add: length_superSectionPDEOffsets)\n\nlemma length_largePagePTEOffsets_simp [simp]:\n \"length largePagePTEOffsets = 16\"\n by (simp add: length_largePagePTEOffsets)\n\n(* FIXME: move to Wellformed, turn valid_asid_pool' into an abbreviation >>>*)\nprimrec\n wf_asid_pool' :: \"asidpool \\ bool\"\nwhere\n \"wf_asid_pool' (ASIDPool pool) =\n (dom pool \\ {0 .. 2^asid_low_bits - 1} \\\n 0 \\ ran pool \\ (\\x \\ ran pool. is_aligned x pdBits))\"\n\nlemma valid_eq_wf_asid_pool'[simp]:\n \"valid_asid_pool' pool = (\\s. wf_asid_pool' pool)\"\n by (case_tac pool) simp\ndeclare valid_asid_pool'.simps[simp del]\n(*<<<*)\n\n(* FIXME: rewrite using ucast_ucast_mask_shift *)\nlemma ucast_ucast_mask_pageBits_shift:\n \"ucast (ucast (p && mask pageBits >> 2) :: 10 word) = p && mask pageBits >> 2\"\n apply (rule word_eqI)\n apply (auto simp: word_size nth_ucast nth_shiftr pageBits_def)\n done\n\n(* FIXME: rewrite using unat_ucast_mask_shift *)\nlemma unat_ucast_mask_pageBits_shift:\n \"unat (ucast (p && mask pageBits >> 2) :: 10 word) = unat ((p::word32) && mask pageBits >> 2)\"\n apply (simp only: unat_ucast)\n apply (rule Divides.mod_less, simp)\n apply (rule unat_less_power)\n apply (simp add: word_bits_def)\n apply (rule shiftr_less_t2n)\n apply (rule order_le_less_trans [OF word_and_le1])\n apply (simp add: pageBits_def mask_def)\n done\n\n(* FIXME: rewrite using mask_shift_sum *)\nlemma mask_pageBits_shift_sum:\n \"unat n = unat (p && mask 2) \\\n (p && ~~ mask pageBits) + (p && mask pageBits >> 2) * 4 + n = (p::word32)\"\n apply (clarsimp simp: word_shift_by_2)\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size pageBits_def nth_shiftl nth_shiftr word_ops_nth_size)\n apply arith\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size pageBits_def nth_shiftl nth_shiftr word_ops_nth_size)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size pageBits_def nth_shiftl nth_shiftr word_ops_nth_size)\n apply (auto simp: linorder_not_less SucSucMinus)\n done\n\nlemma vcpu_at_ko'_eq:\n \"(\\vcpu :: vcpu. ko_at' vcpu p s) = vcpu_at' p s\"\n apply (rule iffI)\n apply (clarsimp simp: typ_at'_def obj_at'_def ko_wp_at'_def projectKOs)\n apply (clarsimp simp: typ_at'_def obj_at'_def ko_wp_at'_def projectKOs)\n apply (case_tac ko, auto)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object, auto)[1]\n done\n\nlemmas vcpu_at_ko' = vcpu_at_ko'_eq[THEN iffD2]\n\nlemma sym_refs_tcb_vcpu':\n \"\\ ko_at' (tcb::tcb) t s; atcbVCPUPtr (tcbArch tcb) = Some v; sym_refs (state_hyp_refs_of' s) \\ \\\n \\vcpu. ko_at' vcpu v s \\ vcpuTCBPtr vcpu = Some t\"\n apply (drule (1) hyp_sym_refs_obj_atD')\n apply (clarsimp simp: obj_at'_real_def ko_wp_at'_def)\n apply (case_tac ko; simp add: tcb_vcpu_refs'_def projectKOs)\n apply (rename_tac koa)\n apply (case_tac koa; clarsimp simp: refs_of_a_def vcpu_tcb_refs'_def)\n done\n\n\nlemma ko_at'_tcb_vcpu_not_NULL:\n \"\\ ko_at' (tcb::tcb) t s ; valid_objs' s ; no_0_obj' s ; atcbVCPUPtr (tcbArch tcb) = Some p \\\n \\ 0 < p\"\n \\ \\when C pointer is NULL, need this to show atcbVCPUPtr is None\\\n unfolding valid_pspace'_def\n supply word_neq_0_conv[simp del]\n by (fastforce simp: valid_tcb'_def valid_arch_tcb'_def word_gt_0 typ_at'_no_0_objD\n dest: valid_objs_valid_tcb')\n\n\n(* FIXME move *)\nlemma setVMRoot_valid_queues':\n \"\\ valid_queues' \\ setVMRoot a \\ \\_. valid_queues' \\\"\n by (rule valid_queues_lift'; wp)\n\nlemma vcpuEnable_valid_pspace' [wp]:\n \"\\ valid_pspace' \\ vcpuEnable a \\\\_. valid_pspace' \\\"\n by (wpsimp simp: valid_pspace'_def valid_mdb'_def)\n\nlemma vcpuSave_valid_pspace' [wp]:\n \"\\ valid_pspace' \\ vcpuSave a \\\\_. valid_pspace' \\\"\n by (wpsimp simp: valid_pspace'_def valid_mdb'_def)\n\nlemma vcpuRestore_valid_pspace' [wp]:\n \"\\ valid_pspace' \\ vcpuRestore a \\\\_. valid_pspace' \\\"\n by (wpsimp simp: valid_pspace'_def valid_mdb'_def)\n\nlemma vcpuSwitch_valid_pspace' [wp]:\n \"\\ valid_pspace' \\ vcpuSwitch a \\\\_. valid_pspace' \\\"\n by (wpsimp simp: valid_pspace'_def valid_mdb'_def)\n\nlemma ko_at_vcpu_at'D:\n \"ko_at' (vcpu :: vcpu) vcpuptr s \\ vcpu_at' vcpuptr s\"\n by (fastforce simp: typ_at_to_obj_at_arches elim: obj_at'_weakenE)\n\n\n(* FIXME: change the original to be predicated! *)\ncrunch ko_at'2[wp]: doMachineOp \"\\s. P (ko_at' p t s)\"\n (simp: crunch_simps)\n\n(* FIXME: change the original to be predicated! *)\ncrunch pred_tcb_at'2[wp]: doMachineOp \"\\s. P (pred_tcb_at' a b p s)\"\n (simp: crunch_simps)\n\ncrunch valid_queues'[wp]: readVCPUReg \"\\s. valid_queues s\"\n\ncrunch valid_objs'[wp]: readVCPUReg \"\\s. valid_objs' s\"\n\ncrunch sch_act_wf'[wp]: readVCPUReg \"\\s. P (sch_act_wf (ksSchedulerAction s) s)\"\n\ncrunch ko_at'[wp]: readVCPUReg \"\\s. P (ko_at' a p s)\"\n\ncrunch obj_at'[wp]: readVCPUReg \"\\s. P (obj_at' a p s)\"\n\ncrunch pred_tcb_at'[wp]: readVCPUReg \"\\s. P (pred_tcb_at' a b p s)\"\n\ncrunch ksCurThread[wp]: readVCPUReg \"\\s. P (ksCurThread s)\"\n\nlemma fromEnum_maxBound_vcpureg_def:\n \"fromEnum (maxBound :: vcpureg) = 42\"\n by (clarsimp simp: fromEnum_def maxBound_def enum_vcpureg)\n\nlemma unat_of_nat_mword_fromEnum_vcpureg[simp]:\n \"unat ((of_nat (fromEnum e)) :: machine_word) = fromEnum (e :: vcpureg)\"\n apply (subst unat_of_nat_eq, clarsimp)\n apply (rule order_le_less_trans[OF maxBound_is_bound])\n apply (clarsimp simp: fromEnum_maxBound_vcpureg_def)+\n done\n\nlemma unat_of_nat_mword_length_upto_vcpureg[simp]:\n \"unat ((of_nat (length [(start :: vcpureg) .e. end])) :: machine_word) = length [start .e. end]\"\n apply (subst unat_of_nat_eq ; clarsimp)\n apply (rule order_le_less_trans[OF length_upto_enum_le_maxBound])\n apply (simp add: fromEnum_maxBound_vcpureg_def)\n done\n\nlemma fromEnum_maxBound_vppievent_irq_def:\n \"fromEnum (maxBound :: vppievent_irq) = 0\"\n by (clarsimp simp: fromEnum_def maxBound_def enum_vppievent_irq)\n\n(* when creating a new object, the entire slot including starting address should be free *)\n(* FIXME move *)\nlemma ps_clear_entire_slotI:\n \"({p..p + 2 ^ n - 1}) \\ dom (ksPSpace s) = {} \\ ps_clear p n s\"\n by (fastforce simp: ps_clear_def)\n\nlemma ps_clear_ksPSpace_upd_same[simp]:\n \"ps_clear p n (s\\ksPSpace := ksPSpace s(p \\ v)\\) = ps_clear p n s\"\n by (fastforce simp: ps_clear_def)\n\nlemma getObject_vcpu_prop:\n \"\\obj_at' P t\\ getObject t \\\\(vcpu :: vcpu) s. P vcpu\\\"\n apply (rule obj_at_getObject)\n apply (clarsimp simp: loadObject_default_def in_monad projectKOs)\n done\n\n(* FIXME would be interesting to generalise these kinds of lemmas to other KOs *)\nlemma setObject_sets_object_vcpu:\n \"\\ vcpu_at' v \\ setObject v (vcpu::vcpu) \\ \\_. ko_at' vcpu v \\\"\n supply fun_upd_apply[simp del]\n apply (clarsimp simp: setObject_def updateObject_default_def bind_assoc)\n apply (wpsimp wp: hoare_vcg_imp_lift' hoare_vcg_ex_lift simp: alignError_def)\n apply (clarsimp simp: obj_at'_def)\n apply (clarsimp simp: obj_at'_def projectKOs objBitsKO_def archObjSize_def dest!: vcpu_at_ko')\n apply (fastforce simp: fun_upd_apply)\n done\n\n(* FIXME would be interesting to generalise these kinds of lemmas to other KOs *)\nlemma placeNewObject_creates_object_vcpu:\n \"\\ \\ \\ placeNewObject v (vcpu::vcpu) 0 \\ \\_. ko_at' vcpu v \\\"\n supply fun_upd_apply[simp del] word_neq_0_conv[simp del] haskell_assert_inv[wp del]\n apply (clarsimp simp: placeNewObject_def placeNewObject'_def split_def alignError_def)\n apply (wpsimp wp: assert_wp hoare_vcg_imp_lift' hoare_vcg_ex_lift)\n apply (clarsimp simp: is_aligned_mask[symmetric] objBitsKO_def archObjSize_def)\n apply (case_tac \"is_aligned v vcpuBits\"; clarsimp)\n apply (rule conjI; clarsimp)\n apply (subst (asm) lookupAround2_None1)\n apply (clarsimp simp: obj_at'_def projectKOs objBitsKO_def archObjSize_def fun_upd_apply)\n apply (fastforce intro: ps_clear_entire_slotI simp add: field_simps fun_upd_apply)\n apply (subst (asm) lookupAround2_char1)\n apply (clarsimp simp: obj_at'_def projectKOs objBitsKO_def archObjSize_def fun_upd_apply)\n apply (fastforce intro: ps_clear_entire_slotI simp add: field_simps)\n done\n\nend\n\nend\n", "meta": {"author": "NICTA", "repo": "l4v", "sha": "3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b", "save_path": "github-repos/isabelle/NICTA-l4v", "path": "github-repos/isabelle/NICTA-l4v/l4v-3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b/proof/crefine/ARM_HYP/ArchMove_C.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.519521321952093, "lm_q2_score": 0.2845759981489974, "lm_q1q2_score": 0.14784329875420352}} {"text": "theory AlwaysFail\n\nimports Main \"../ContractSem\" \"../RelationalSem\" \"../ProgramInAvl\"\n\nbegin\n\ndefinition this_address :: address\nwhere \"this_address = undefined\"\n\nabbreviation always_fail_code :: \"inst list\"\nwhere\n\"always_fail_code ==\n Stack (PUSH_N [2])\n # Pc JUMP #\n []\"\n\n\nvalue \"(program_content (program_of_lst always_fail_code program_content_of_lst)) 3\"\n\nabbreviation always_fail_account_state :: \"w256 \\ account_state\"\nwhere\n\"always_fail_account_state balance \\\n \\ account_address = this_address\n , account_storage = (\\ (a::w256). 0)\n , account_code = program_of_lst always_fail_code program_content_of_lst\n , account_balance = balance\n , account_ongoing_calls = []\n , account_killed = False\n \\\"\n\nlemma problem :\n\"node \\ x, ll, elm, rr\\ y \\\\ = Node (x + 1) \\ x, ll, elm, rr\\ y \\\\ \"\napply(simp add: node_def)\ndone\n\nlemma problem2 :\n\"node \\\\ y \\x, \\\\, elm, \\\\\\ = Node (x + 1) \\\\ y \\ x, \\\\, elm, \\\\\\\"\napply(simp add: node_def)\ndone\n\n(* declare program_sem.psimps [simp] *)\n(* declare instruction_sem_def [simp del]*)\n\nlemma check_resources_split [split] :\n\"P (if check_resources v con s i net then X else InstructionToEnvironment a b c) =\n (\\ (check_resources v con s i net \\ \\ P X \\ \\ check_resources v con s i net \\ \\ P (InstructionToEnvironment a b c)))\"\napply(simp only: if_splits(2))\ndone\n\ndeclare inst_stack_numbers.simps [simp]\ndeclare pc_inst_numbers.simps [simp]\n\n\ndeclare one_round.simps [simp]\ndeclare environment_turn.simps [simp]\ndeclare contract_turn.simps [simp]\n\nlemma invariant:\n\"invariant_holds net (\\ a. \\ initial_balance. a = (always_fail_account_state initial_balance))\"\napply(simp add: invariant_holds_def)\napply(auto)\napply(drule star_case; auto simp add: invariant_holds_post_def)\napply(case_tac steps; auto)\napply(case_tac nat; auto)\ndone\n\ndeclare postcondition_pack_def [simp]\n\nlemma balance_no_decrease:\n\"\npre_post_conditions net (\\ a. \\ initial_balance. a = (always_fail_account_state initial_balance))\n(\\ initial_state init_call. True)\n(\\ initial_state _ (post_state, _). account_balance initial_state \\ account_balance post_state)\n\"\napply(simp add: pre_post_conditions_def; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\n apply(case_tac steps; auto)\n apply(case_tac nat; auto)\n apply(drule star_case; auto)\napply(case_tac steps; auto)\napply(case_tac nat; auto)\ndone\n\nend\n", "meta": {"author": "pirapira", "repo": "eth-isabelle", "sha": "d0bb02b3e64a2046a7c9670545d21f10bccd7b27", "save_path": "github-repos/isabelle/pirapira-eth-isabelle", "path": "github-repos/isabelle/pirapira-eth-isabelle/eth-isabelle-d0bb02b3e64a2046a7c9670545d21f10bccd7b27/example/AlwaysFail.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5312093733737563, "lm_q2_score": 0.2782568056728001, "lm_q1q2_score": 0.1478126233784312}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__35_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__35_on_rules imports n_german_lemma_on_inv__35\nbegin\nsection{*All lemmas on causal relation between inv__35*}\nlemma lemma_inv__35_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__35 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__35) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__35) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__35_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5312093733737563, "lm_q2_score": 0.2782567877172032, "lm_q1q2_score": 0.14781261384024982}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__66_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__66_on_rules imports n_g2kAbsAfter_lemma_on_inv__66\nbegin\nsection{*All lemmas on causal relation between inv__66*}\nlemma lemma_inv__66_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__66 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__66) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__66) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__66_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.2909808539178129, "lm_q1q2_score": 0.14776352989755942}} {"text": "(*******************************************************************************\n\n Project: Refining Authenticated Key Agreement with Strong Adversaries\n\n Module: Implem_symmetric.thy (Isabelle/HOL 2016-1)\n ID: $Id: Implem_symmetric.thy 132885 2016-12-23 18:41:32Z csprenge $\n Author: Joseph Lallemand, INRIA Nancy \n Christoph Sprenger, ETH Zurich \n \n Symmetric channel implementation (locale interpretation) using\n symmetric encryption and HMACs\n\n Copyright (c) 2015-2016 Joseph Lallemand and Christoph Sprenger\n Licence: LGPL\n\n*******************************************************************************)\n\nsection \\Symmetric Implementation of Channel Messages\\\n\ntheory Implem_symmetric\nimports Implem\nbegin\n\n(**************************************************************************************************)\nsubsection \\Implementation of channel messages\\\n(**************************************************************************************************)\n\nfun implem_sym :: \"chan \\ msg\" where\n \"implem_sym (Insec A B M) = \\InsecTag, Agent A, Agent B, M\\\"\n |\"implem_sym (Confid A B M) = Enc \\ConfidTag, M\\ (shrK A B)\"\n |\"implem_sym (Auth A B M) = \\M, hmac \\AuthTag, M\\ (shrK A B)\\\"\n |\"implem_sym (Secure A B M) = Enc \\SecureTag, M\\ (shrK A B)\"\n\n\ntext \\\nFirst step: @{locale \"basic_implem\"}. \nTrivial as there are no assumption, this locale just defines some useful abbreviations and valid.\n\\\ninterpretation sym: basic_implem implem_sym\ndone\n\n\ntext \\Second step: @{locale \"semivalid_implem\"}.\nHere we prove some basic properties such as injectivity and some properties about the \ninteraction of sets of implementation messages with @{term analz}; these properties are \nproved as separate lemmas as the proofs are more complex. \n\\\n\ntext \\Auxiliary: simpler definitions of the \\implSets\\ for the proofs, using the \n\\msgSet\\ definitions. \n\\\n\nabbreviation implInsecSet_aux :: \"msg set \\ msg set\" where \n \"implInsecSet_aux G \\ PairSet Tags (PairSet (range Agent) (PairSet (range Agent) G))\"\n\nabbreviation implAuthSet_aux :: \"msg set \\ msg set\" where \n \"implAuthSet_aux G \\ PairSet G (HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))))\"\n\nabbreviation implConfidSet_aux :: \"(agent * agent) set \\ msg set \\ msg set\" where \n \"implConfidSet_aux Ag G \\ EncSet (PairSet Tags G) (case_prod shrK`Ag)\"\n\nabbreviation implSecureSet_aux :: \"(agent * agent) set \\ msg set \\ msg set\" where \n\"implSecureSet_aux Ag G \\ EncSet (PairSet Tags G) (case_prod shrK`Ag)\"\n\ntext \\These auxiliary definitions are overapproximations.\\\n\nlemma implInsecSet_implInsecSet_aux: \"sym.implInsecSet G \\ implInsecSet_aux G\"\nby auto\n\nlemma implAuthSet_implAuthSet_aux: \"sym.implAuthSet G \\ implAuthSet_aux G\"\nby (auto, auto)\n\nlemma implConfidSet_implConfidSet_aux: \"sym.implConfidSet Ag G \\ implConfidSet_aux Ag G\"\nby (auto)\n\nlemma implSecureSet_implSecureSet_aux: \"sym.implSecureSet Ag G \\ implSecureSet_aux Ag G\"\nby (auto)\n\nlemmas implSet_implSet_aux =\n implInsecSet_implInsecSet_aux implAuthSet_implAuthSet_aux\n implConfidSet_implConfidSet_aux implSecureSet_implSecureSet_aux\n\ndeclare Enc_keys_clean_msgSet_Un [intro]\n\n\n(**************************************************************************************************)\nsubsection \\Lemmas to pull implementation sets out of @{term analz}\\\n(**************************************************************************************************)\n\ntext \\\nAll these proofs are similar:\n\\begin{enumerate}\n\\item prove the lemma for the @{term \"implSet_aux\"} and with the set added outside of \n @{term analz} given explicitly,\n\\item prove the lemma for the @{term \"implSet_aux\"} but with payload, and\n\\item prove the lemma for the @{term \"implSet\"}.\n\\end{enumerate}\nThere are two cases for the confidential and secure messages:\nthe general case (the payloads stay in @{term analz}) and the case where the key is unknown\n(the messages cannot be opened and are completely removed from the @{term analz}).\n\\\n\n\nsubsubsection \\Pull @{term implInsecSet} out of @{term analz}\\\n(**************************************************************************************************)\n\nlemma analz_Un_implInsecSet_aux_1:\n \"Enc_keys_clean (G \\ H) \\\n analz (implInsecSet_aux G \\ H) \\ \n implInsecSet_aux G \\ Tags \\\n PairSet (range Agent) (PairSet (range Agent) G) \\\n PairSet (range Agent) G \\\n analz (range Agent \\ G \\ (range Agent \\ H))\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n have \"analz (implInsecSet_aux G \\ H) \\ implInsecSet_aux G \\\n analz (Tags \\ PairSet (range Agent) (PairSet (range Agent) G) \\ H)\"\n by (rule analz_Un_PairSet)\n also have \"... = implInsecSet_aux G \\ \n analz (Tags \\ (PairSet (range Agent) (PairSet (range Agent) G) \\ H))\"\n by (simp only: Un_assoc)\n also have \"... \\ implInsecSet_aux G \\\n (Tags \\ analz (PairSet (range Agent) (PairSet (range Agent) G) \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_Tag, blast intro: H)\n also have \"... = implInsecSet_aux G \\ Tags \\\n analz (PairSet (range Agent) (PairSet (range Agent) G) \\ H)\"\n by auto\n also have \"... \\ implInsecSet_aux G \\ Tags \\ (PairSet (range Agent) (PairSet (range Agent) G) \\\n analz (range Agent \\ PairSet (range Agent) G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_PairSet)\n also have \"... = implInsecSet_aux G \\ Tags \\ PairSet (range Agent) (PairSet (range Agent) G) \\\n analz (PairSet (range Agent) G \\ (range Agent \\ H))\"\n by (auto simp add: Un_assoc Un_commute)\n also have \"... \\ implInsecSet_aux G \\ Tags \\ PairSet (range Agent) (PairSet (range Agent) G) \\\n (PairSet (range Agent) G \\ analz (range Agent \\ G \\ (range Agent \\ H)))\"\n by (rule Un_mono, blast, rule analz_Un_PairSet)\n also have \"... = implInsecSet_aux G \\ Tags \\ (PairSet (range Agent) (PairSet (range Agent) G) \\\n PairSet (range Agent) G) \\ analz (range Agent \\ G \\ (range Agent \\ H))\"\n by (simp only: Un_assoc Un_commute)\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implInsecSet_aux_2:\n \"Enc_keys_clean (G \\ H) \\\n analz (implInsecSet_aux G \\ H) \\ \n implInsecSet_aux G \\ Tags \\ \n synth (analz (G \\ H))\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n have HH:\"PairSet (range Agent) (PairSet (range Agent) G) \\\n PairSet (range Agent) G \\ synth (analz (G \\ H))\"\n by auto\n have HHH:\"analz (range Agent \\ G \\ (range Agent \\ H)) \\ synth (analz (G \\ H))\"\n proof -\n have \"analz (range Agent \\ G \\ (range Agent \\ H)) \\ \n synth (analz (range Agent \\ G \\ (range Agent \\ H)))\"\n by auto\n also have \"... = synth (analz (synth (range Agent \\ G \\ (range Agent \\ H))))\" by auto\n also have \"... \\ synth (analz (synth (G \\ H)))\"\n proof (rule synth_analz_mono)\n have \"range Agent \\ G \\ (range Agent \\ H) \\ synth (G \\ H)\" by auto\n then have \"synth (range Agent \\ G \\ (range Agent \\ H)) \\ synth (synth (G \\ H))\"\n by (rule synth_mono)\n then show \"synth (range Agent \\ G \\ (range Agent \\ H)) \\ synth (G \\ H)\" by auto\n qed\n also have \"... = synth (analz (G \\ H))\" by auto\n finally show ?thesis .\n qed\n from H have \n \"analz (implInsecSet_aux G \\ H) \\ \n implInsecSet_aux G \\ Tags \\ PairSet (range Agent) (PairSet (range Agent) G) \\\n PairSet (range Agent) G \\ analz (range Agent \\ G \\ (range Agent \\ H))\"\n by (rule analz_Un_implInsecSet_aux_1)\n also have \"... = implInsecSet_aux G \\ Tags \\ \n (PairSet (range Agent) (PairSet (range Agent) G) \\\n PairSet (range Agent) G) \\ analz (range Agent \\ G \\ (range Agent \\ H))\"\n by (simp only: Un_assoc Un_commute)\n also have \"... \\ implInsecSet_aux G \\ Tags \\ synth (analz (G \\ H)) \\ \n synth (analz (G \\ H))\"\n by ((rule Un_mono)+, auto simp add: HH HHH)\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implInsecSet_aux_3:\n \"Enc_keys_clean (G \\ H) \\\n analz (implInsecSet_aux G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implInsecSet_aux_2], auto)\n\nlemma analz_Un_implInsecSet:\n \"Enc_keys_clean (G \\ H) \\\n analz (sym.implInsecSet G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implInsecSet_aux G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implInsecSet_aux_3 apply blast\ndone\n\n\nsubsection \\Pull @{term implConfidSet} out of @{term analz}\\\n(**************************************************************************************************)\n\nlemma analz_Un_implConfidSet_aux_1:\n \"Enc_keys_clean (G \\ H) \\\n analz (implConfidSet_aux Ag G \\ H) \\ \n implConfidSet_aux Ag G \\ PairSet Tags G \\ Tags \\\n analz (G \\ H)\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n have \"analz (implConfidSet_aux Ag G \\ H) \\ \n implConfidSet_aux Ag G \\ analz (PairSet Tags G \\ H)\"\n by (rule analz_Un_EncSet, fast, blast intro: H)\n also have \"... \\ implConfidSet_aux Ag G \\ (PairSet Tags G \\ analz (Tags \\ G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_PairSet)\n also have \"... = implConfidSet_aux Ag G \\ PairSet Tags G \\ analz (Tags \\ (G \\ H))\"\n by (simp only: Un_assoc)\n also have \"... \\ implConfidSet_aux Ag G \\ PairSet Tags G \\ (Tags \\ analz (G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_Tag, blast intro: H)\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implConfidSet_aux_2:\n \"Enc_keys_clean (G \\ H) \\\n analz (implConfidSet_aux Ag G \\ H) \\ \n implConfidSet_aux Ag G \\ PairSet Tags G \\ Tags \\\n synth (analz (G \\ H))\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n from H have \"analz (implConfidSet_aux Ag G \\ H) \\ \n implConfidSet_aux Ag G \\ PairSet Tags G \\ Tags \\ analz (G \\ H)\"\n by (rule analz_Un_implConfidSet_aux_1)\n also have \"... \\ implConfidSet_aux Ag G \\ PairSet Tags G \\ Tags \\ synth (analz (G \\ H))\"\n by auto\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implConfidSet_aux_3:\n \"Enc_keys_clean (G \\ H) \\\n analz (implConfidSet_aux Ag G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implConfidSet_aux_2], auto)\n\nlemma analz_Un_implConfidSet:\n \"Enc_keys_clean (G \\ H) \\\n analz (sym.implConfidSet Ag G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implConfidSet_aux Ag G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implConfidSet_aux_3 apply blast\ndone\n\ntext \\Pull @{term implConfidSet} out of @{term analz}, 2nd case where the agents are honest.\\\n\nlemma analz_Un_implConfidSet_2_aux_1:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (implConfidSet_aux Ag G \\ H) \\ implConfidSet_aux Ag G \\ synth (analz H)\"\napply (rule subset_trans [OF analz_Un_EncSet2], simp)\napply (auto dest:analz_into_parts)\ndone\n\nlemma analz_Un_implConfidSet_2_aux_3:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (implConfidSet_aux Ag G \\ H) \\ synth (analz H) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implConfidSet_2_aux_1], auto)\n\nlemma analz_Un_implConfidSet_2:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (sym.implConfidSet Ag G \\ H) \\ synth (analz H) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implConfidSet_aux Ag G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implConfidSet_2_aux_3 apply auto\ndone\n\n\nsubsection \\Pull @{term implSecureSet} out of @{term analz}\\\n(**************************************************************************************************)\n\nlemma analz_Un_implSecureSet_aux_1:\n \"Enc_keys_clean (G \\ H) \\\n analz (implSecureSet_aux Ag G \\ H) \\ \n implSecureSet_aux Ag G \\ PairSet Tags G \\ Tags \\\n analz (G \\ H)\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n have \"analz (implSecureSet_aux Ag G \\ H) \\ \n implSecureSet_aux Ag G \\ analz (PairSet Tags G \\ H)\"\n by (rule analz_Un_EncSet, fast, blast intro: H)\n also have \"... \\ implSecureSet_aux Ag G \\ (PairSet Tags G \\ analz (Tags \\ G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_PairSet)\n also have \"... = implSecureSet_aux Ag G \\ PairSet Tags G \\ analz (Tags \\ (G \\ H))\"\n by (simp only: Un_assoc)\n also have \"... \\ implSecureSet_aux Ag G \\ PairSet Tags G \\ (Tags \\ analz (G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_Tag, blast intro: H)\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implSecureSet_aux_2:\n \"Enc_keys_clean (G \\ H) \\\n analz (implSecureSet_aux Ag G \\ H) \\ \n implSecureSet_aux Ag G \\ PairSet Tags G \\ Tags \\\n synth (analz (G \\ H))\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n from H have \"analz (implSecureSet_aux Ag G \\ H) \\ \n implSecureSet_aux Ag G \\ PairSet Tags G \\ Tags \\ analz (G \\ H)\"\n by (rule analz_Un_implSecureSet_aux_1)\n also have \"... \\ implSecureSet_aux Ag G \\ PairSet Tags G \\ Tags \\ synth (analz (G \\ H))\"\n by auto\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implSecureSet_aux_3:\n \"Enc_keys_clean (G \\ H) \\\n analz (implSecureSet_aux Ag G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implSecureSet_aux_2], auto)\n\nlemma analz_Un_implSecureSet:\n \"Enc_keys_clean (G \\ H) \\\n analz (sym.implSecureSet Ag G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implSecureSet_aux Ag G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implSecureSet_aux_3 apply blast\ndone\n\ntext \\\nPull @{term implSecureSet} out of @{term analz}, 2nd case, where the agents are honest. \n\\\nlemma analz_Un_implSecureSet_2_aux_1:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (implSecureSet_aux Ag G \\ H) \\ implSecureSet_aux Ag G \\ synth (analz H)\"\napply (rule subset_trans [OF analz_Un_EncSet2], simp)\napply (auto dest:analz_into_parts)\ndone\n\nlemma analz_Un_implSecureSet_2_aux_3:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (implSecureSet_aux Ag G \\ H) \\ synth (analz H) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implSecureSet_2_aux_1], auto)\n\nlemma analz_Un_implSecureSet_2:\n \"Enc_keys_clean H \\\n Ag \\ broken (parts H \\ range LtK) = {} \\\n analz (sym.implSecureSet Ag G \\ H) \\ synth (analz H) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implSecureSet_aux Ag G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implSecureSet_2_aux_3 apply auto\ndone\n\n\nsubsection \\Pull @{term implAuthSet} out of @{term analz}\\\n(**************************************************************************************************)\n\nlemma analz_Un_implAuthSet_aux_1:\n \"Enc_keys_clean (G \\ H) \\\n analz (implAuthSet_aux G \\ H) \\ \n implAuthSet_aux G \\ HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n analz (G \\ H)\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n have \"analz (implAuthSet_aux G \\ H) \\ implAuthSet_aux G \\\n analz (G \\ HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\ H)\"\n by (rule analz_Un_PairSet)\n also have \"... = implAuthSet_aux G \\\n analz (HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\ G \\ H)\"\n by (simp only: Un_assoc Un_commute)\n also have \"... = implAuthSet_aux G \\\n analz (HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\ (G \\ H))\"\n by (simp only: Un_assoc)\n also have \n \"... \\ implAuthSet_aux G \\ \n (HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n analz (G \\ H))\"\n by (rule Un_mono, blast, rule analz_Un_HashSet, blast intro: H, auto)\n also have \"... = implAuthSet_aux G \\ \n HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n analz (G \\ H)\"\n by auto\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implAuthSet_aux_2:\n \"Enc_keys_clean (G \\ H) \\\n analz (implAuthSet_aux G \\ H) \\\n implAuthSet_aux G \\ HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n synth (analz (G \\ H))\"\nproof -\n assume H:\"Enc_keys_clean (G \\ H)\"\n from H have \n \"analz (implAuthSet_aux G \\ H) \\ \n implAuthSet_aux G \\ \n HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n analz (G \\ H)\"\n by (rule analz_Un_implAuthSet_aux_1)\n also have \n \"... \\ implAuthSet_aux G \\ \n HashSet (PairSet (PairSet Tags G) (range (case_prod shrK))) \\\n synth (analz (G \\ H))\"\n by auto\n finally show ?thesis by auto\nqed\n\nlemma analz_Un_implAuthSet_aux_3:\n \"Enc_keys_clean (G \\ H) \\\n analz (implAuthSet_aux G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\nby (rule subset_trans [OF analz_Un_implAuthSet_aux_2], auto)\n\nlemma analz_Un_implAuthSet:\n \"Enc_keys_clean (G \\ H) \\\n analz (sym.implAuthSet G \\ H) \\ synth (analz (G \\ H)) \\ -payload\"\napply (rule subset_trans [of _ \"analz (implAuthSet_aux G \\ H)\" _])\napply (rule analz_mono, rule Un_mono, blast intro!: implSet_implSet_aux, simp)\nusing analz_Un_implAuthSet_aux_3 apply blast\ndone\n\ndeclare Enc_keys_clean_msgSet_Un [rule del]\n\n\nsubsection \\Locale interpretations\\\n(**************************************************************************************************)\n\ninterpretation sym: semivalid_implem implem_sym\nproof (unfold_locales)\n fix x A B M x' A' B' M'\n show \"implem_sym (Chan x A B M) = implem_sym (Chan x' A' B' M') \\\n x = x' \\ A = A' \\ B = B' \\ M = M'\"\n by (cases x, (cases x', auto)+)\nnext\n fix M' M x x' A A' B B'\n assume H: \"M' \\ payload\"\n then have A1: \"\\y. y \\ parts {M'} \\ y \\ payload\" \n and A2: \"\\y. M' = y \\ y \\ payload\" by auto\n assume \"implem_sym (Chan x A B M) \\ parts {implem_sym (Chan x' A' B' M')}\"\n then show \"x = x' \\ A = A' \\ B = B' \\ M = M'\"\n by (cases \"x\", (cases x', auto dest!: A1 A2)+)\nnext\n fix I\n assume \"I \\ sym.valid\"\n then show \"Enc_keys_clean I\"\n proof (simp add: Enc_keys_clean_def, intro allI impI)\n fix X Y\n assume \"Enc X Y \\ parts I\"\n obtain x A B M where \"M \\ payload\" and \"Enc X Y \\ parts {implem_sym (Chan x A B M)}\"\n using parts_singleton [OF \\Enc X Y \\ parts I\\] \\I \\ sym.valid\\\n by (auto elim!: sym.validE)\n then show \"Y \\ range LtK \\ Y \\ payload\" by (cases x, auto)\n qed\nnext\n fix Z\n show \"composed (implem_sym Z)\"\n proof (cases Z, simp)\n fix x A B M\n show \"composed (implem_sym (Chan x A B M))\" by (cases x, auto)\n qed\nnext\n fix x A B M\n show \"implem_sym (Chan x A B M) \\ payload\"\n by (cases x, auto)\nnext\n fix X K\n assume \"X \\ sym.valid\"\n then obtain x A B M where \"M \\ payload\" \"X = implem_sym (Chan x A B M)\" \n by (auto elim: sym.validE)\n then show \"LtK K \\ parts {X}\"\n by (cases x, auto)\n\nnext\n fix G H\n assume \"G \\ payload\" \"Enc_keys_clean H\"\n hence \"Enc_keys_clean (G \\ H)\" by (auto intro: Enc_keys_clean_Un)\n then show \"analz ({implem_sym (Insec A B M) |A B M. M \\ G} \\ H) \\ \n synth (analz (G \\ H)) \\ - payload\"\n by (rule analz_Un_implInsecSet)\nnext\n fix G H\n assume \"G \\ payload\" \"Enc_keys_clean H\"\n hence \"Enc_keys_clean (G \\ H)\" by (auto intro: Enc_keys_clean_Un)\n then show \"analz ({implem_sym (Auth A B M) |A B M. M \\ G} \\ H) \\ \n synth (analz (G \\ H)) \\ - payload\"\n by (rule analz_Un_implAuthSet)\nnext\n fix G H Ag\n assume \"G \\ payload\" \"Enc_keys_clean H\"\n hence \"Enc_keys_clean (G \\ H)\" by (auto intro: Enc_keys_clean_Un)\n then show \"analz ({implem_sym (Confid A B M) |A B M. (A, B) \\ Ag \\ M \\ G} \\ H) \\ \n synth (analz (G \\ H)) \\ - payload\"\n by (rule analz_Un_implConfidSet)\nnext\n fix G H Ag\n assume \"G \\ payload\" \"Enc_keys_clean H\"\n hence \"Enc_keys_clean (G \\ H)\" by (auto intro: Enc_keys_clean_Un)\n then show \"analz ({implem_sym (Secure A B M) |A B M. (A, B) \\ Ag \\ M \\ G} \\ H) \\ \n synth (analz (G \\ H)) \\ - payload\"\n by (rule analz_Un_implSecureSet)\nnext\n fix G H Ag\n assume \"Enc_keys_clean H\"\n hence \"Enc_keys_clean H\" by auto\n moreover assume \"Ag \\ broken (parts H \\ range LtK) = {}\"\n ultimately show \"analz ({implem_sym (Confid A B M) |A B M. (A, B) \\ Ag \\ M \\ G} \\ H) \\ \n synth (analz H) \\ - payload\"\n by (rule analz_Un_implConfidSet_2)\nnext\n fix G H Ag\n assume \"Enc_keys_clean H\"\n moreover assume \"Ag \\ broken (parts H \\ range LtK) = {}\"\n ultimately show \"analz ({implem_sym (Secure A B M) |A B M. (A, B) \\ Ag \\ M \\ G} \\ H) \\ \n synth (analz H) \\ - payload\"\n by (rule analz_Un_implSecureSet_2)\nqed\n\ntext \\\nThird step: @{locale \"valid_implem\"}.\nThe lemmas giving conditions on $M$, $A$ and $B$ for \n@{prop \"implXXX A B M \\ synth (analz Z)\"}.\n\\\n\nlemma implInsec_synth_analz:\n \"H \\ payload \\ sym.valid \\ range LtK \\ Tags \\\n sym.implInsec A B M \\ synth (analz H) \\\n sym.implInsec A B M \\ H \\ M \\ synth (analz H)\"\napply (erule synth.cases, auto)\ndone\n\nlemma implConfid_synth_analz:\n \"H \\ payload \\ sym.valid \\ range LtK \\ Tags \\\n sym.implConfid A B M \\ synth (analz H) \\\n sym.implConfid A B M \\ H \\ M \\ synth (analz H)\"\napply (erule synth.cases, auto)\n\\ \\1 subgoal\\\napply (frule sym.analz_valid [where x=confid], auto)\ndone\n\nlemma implAuth_synth_analz:\n \"H \\ payload \\ sym.valid \\ range LtK \\ Tags \\\n sym.implAuth A B M \\ synth (analz H) \\\n sym.implAuth A B M \\ H \\ (M \\ synth (analz H) \\ (A, B) \\ broken H)\"\nproof (erule synth.cases, simp_all)\n fix X\n assume H: \"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n assume H':\"\\M, hmac \\AuthTag, M\\ (shrK A B)\\ = X\" \" X \\ analz H\"\n hence \"sym.implAuth A B M \\ analz H\" by auto\n with H have \"sym.implAuth A B M \\ H\" by (rule sym.analz_valid)\n with H' show \"X \\ H \\ M \\ synth (analz H) \\ (A, B) \\ broken H\"\n by auto\nnext\n fix X Y\n assume H:\"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n assume H':\"M = X \\ hmac \\AuthTag, M\\ (shrK A B) = Y\" \"Y \\ synth (analz H)\"\n hence \"hmac \\AuthTag, M\\ (shrK A B) \\ synth (analz H)\" by auto\n then have \"hmac \\AuthTag, M\\ (shrK A B) \\ analz H \\ \n shrK A B \\ synth (analz H)\"\n by (rule synth.cases, auto)\n then show \"\\X, hmac \\AuthTag, X\\ (shrK A B)\\ \\ H \\ (A, B) \\ broken H\"\n proof\n assume \"shrK A B \\ synth (analz H)\"\n with H have \"(A, B) \\ broken H\" by (auto dest:sym.analz_LtKeys)\n then show ?thesis by auto\n next\n assume \"hmac \\AuthTag, M\\ (shrK A B) \\ analz H\"\n hence \"hmac \\AuthTag, M\\ (shrK A B) \\ parts H\" by (rule analz_into_parts)\n with H have \"hmac \\AuthTag, M\\ (shrK A B) \\ parts H\" \n by (auto dest!:payload_parts elim!:payload_Hash)\n from H obtain Z where \"Z \\ H\" and H'':\"hmac \\AuthTag, M\\ (shrK A B) \\ parts {Z}\"\n using parts_singleton [OF \\hmac \\AuthTag, M\\ (shrK A B) \\ parts H\\] by blast\n moreover with H have \"Z \\ sym.valid\" by (auto dest!: subsetD)\n moreover with H'' have \"Z = sym.implAuth A B M\"\n by (auto) (erule sym.valid_cases, auto)\n ultimately have \"sym.implAuth A B M \\ H\" by auto\n with H' show ?thesis by auto\n qed\nqed\n\nlemma implSecure_synth_analz:\n \"H \\ payload \\ sym.valid \\ range LtK \\ Tags \\\n sym.implSecure A B M \\ synth (analz H) \\\n sym.implSecure A B M \\ H \\ (M \\ synth (analz H) \\ (A, B) \\ broken H)\"\napply (erule synth.cases, auto)\n(* 1 subgoal*)\napply (frule sym.analz_valid [where x=secure], auto)\napply (frule sym.analz_valid [where x=secure], auto)\napply (auto dest:sym.analz_LtKeys)\ndone\n\n\ninterpretation sym: valid_implem implem_sym\nproof (unfold_locales)\n fix H A B M\n assume \"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n \"implem_sym (Insec A B M) \\ synth (analz H)\"\n then show \"implem_sym (Insec A B M) \\ H \\ M \\ synth (analz H)\"\n by (rule implInsec_synth_analz)\nnext\n fix H A B M\n assume \"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n \"implem_sym (Confid A B M) \\ synth (analz H)\"\n then show \"implem_sym (Confid A B M) \\ H \\ M \\ synth (analz H)\"\n by (rule implConfid_synth_analz)\nnext\n fix H A B M\n assume \"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n \"implem_sym (Auth A B M) \\ synth (analz H)\"\n then show \"implem_sym (Auth A B M) \\ H \\ \n M \\ synth (analz H) \\ (A, B) \\ broken H\"\n by (rule implAuth_synth_analz)\nnext\n fix H A B M\n assume \"H \\ payload \\ sym.valid \\ range LtK \\ Tags\"\n \"implem_sym (Secure A B M) \\ synth (analz H)\"\n then show \"implem_sym (Secure A B M) \\ H \\ \n M \\ synth (analz H) \\ (A, B) \\ broken H\"\n by (rule implSecure_synth_analz)\nqed\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/Key_Agreement_Strong_Adversaries/Implem_symmetric.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.588889130767832, "lm_q2_score": 0.2509127980882971, "lm_q1q2_score": 0.14775981956474182}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__79_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__79_on_rules imports n_g2kAbsAfter_lemma_on_inv__79\nbegin\nsection{*All lemmas on causal relation between inv__79*}\nlemma lemma_inv__79_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__79 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__79) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__79) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__79_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.28776782797747225, "lm_q1q2_score": 0.1472555758757244}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__4_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__4_on_rules imports n_g2kAbsAfter_lemma_on_inv__4\nbegin\nsection{*All lemmas on causal relation between inv__4*}\nlemma lemma_inv__4_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__4 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__4) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__4) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__4_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.2877678218692626, "lm_q1q2_score": 0.1472555727500521}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\n The main theorem\n*)\n\ntheory Refine\nimports\n KernelInit_R\n ADT_H\n InitLemmas\n PageTableDuplicates\nbegin\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ntext \\User memory content is the same on both levels\\\nlemma typ_at_AUserDataI:\n \"\\ typ_at (AArch (AUserData sz)) p s; pspace_relation (kheap s) (ksPSpace s');\n pspace_aligned' s'; pspace_distinct' s'; n < 2 ^ (pageBitsForSize sz - pageBits) \\\n \\ typ_at' UserDataT (p + n * 2 ^ pageBits) s'\"\n apply (clarsimp simp add: obj_at_def a_type_def )\n apply (simp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm split: if_split_asm)\n apply (drule(1) pspace_relation_absD)\n apply (clarsimp)\n apply (drule_tac x = \"p + n * 2 ^ pageBits\" in spec)\n apply (drule_tac x = \"\\_ obj. obj = KOUserData\" in spec)\n apply (clarsimp simp: obj_at'_def typ_at'_def ko_wp_at'_def)\n apply (rule exI [where x = KOUserData])\n apply (drule mp)\n apply (rule exI [where x = n])\n apply (simp add: shiftl_t2n)\n apply (clarsimp simp: pspace_aligned'_def)\n apply (drule (1) bspec [OF _ domI])\n apply (clarsimp simp: objBits_simps)\n apply (fastforce dest!: pspace_distinctD' simp: objBits_simps)\n done\n\nlemma typ_at_ADeviceDataI:\n \"\\ typ_at (AArch (ADeviceData sz)) p s; pspace_relation (kheap s) (ksPSpace s');\n pspace_aligned' s'; pspace_distinct' s'; n < 2 ^ (pageBitsForSize sz - pageBits) \\\n \\ typ_at' UserDataDeviceT (p + n * 2 ^ pageBits) s'\"\n apply (clarsimp simp add: obj_at_def a_type_def )\n apply (simp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm split: if_split_asm)\n apply (drule(1) pspace_relation_absD)\n apply (clarsimp)\n apply (drule_tac x = \"p + n * 2 ^ pageBits\" in spec)\n apply (drule_tac x = \"\\_ obj. obj = KOUserDataDevice\" in spec)\n apply (clarsimp simp: obj_at'_def typ_at'_def ko_wp_at'_def)\n apply (rule exI [where x = KOUserDataDevice])\n apply (drule mp)\n apply (rule exI [where x = n])\n apply (simp add: shiftl_t2n)\n apply (clarsimp simp: pspace_aligned'_def)\n apply (drule (1) bspec [OF _ domI])\n apply (clarsimp simp: objBits_simps)\n apply (fastforce dest!: pspace_distinctD' simp: objBits_simps)\n done\n\nlemma typ_at_UserDataI:\n \"\\ typ_at' UserDataT (p && ~~ mask pageBits) s';\n pspace_relation (kheap s) (ksPSpace s'); pspace_aligned s \\\n \\ \\sz. typ_at (AArch (AUserData sz)) (p && ~~ mask (pageBitsForSize sz)) s\"\n apply (clarsimp simp: exists_disj obj_at'_def typ_at'_def ko_wp_at'_def)\n apply (frule (1) in_related_pspace_dom)\n apply (clarsimp simp: pspace_dom_def)\n apply (clarsimp simp: pspace_relation_def dom_def)\n apply (erule allE, erule impE, blast)\n apply clarsimp\n apply (drule (1) bspec)\n apply clarsimp\n apply (subst mask_lower_twice [where n = pageBits, OF pbfs_atleast_pageBits, symmetric])\n apply (clarsimp simp: obj_relation_cuts_def2 pte_relation_def\n cte_relation_def other_obj_relation_def\n split: Structures_A.kernel_object.split_asm\n Structures_H.kernel_object.split_asm\n if_split_asm arch_kernel_obj.split_asm)\n apply (rename_tac vmpage_size n)\n apply (rule_tac x = vmpage_size in exI)\n apply (subst conjunct2 [OF is_aligned_add_helper])\n apply (drule (1) pspace_alignedD)\n apply simp\n apply (simp add: shiftl_t2n mult_ac)\n apply (erule word_less_power_trans2 [OF _ pbfs_atleast_pageBits])\n apply (case_tac vmpage_size, simp_all add: word_bits_conv bit_simps)[1]\n apply (simp add: obj_at_def a_type_def)\n done\n\nlemma typ_at_DeviceDataI:\n \"\\ typ_at' UserDataDeviceT (p && ~~ mask pageBits) s';\n pspace_relation (kheap s) (ksPSpace s'); pspace_aligned s \\\n \\ \\sz. typ_at (AArch (ADeviceData sz)) (p && ~~ mask (pageBitsForSize sz)) s\"\n apply (clarsimp simp: exists_disj obj_at'_def typ_at'_def ko_wp_at'_def)\n apply (frule (1) in_related_pspace_dom)\n apply (clarsimp simp: pspace_dom_def)\n apply (clarsimp simp: pspace_relation_def dom_def)\n apply (erule allE, erule impE, blast)\n apply clarsimp\n apply (drule (1) bspec)\n apply clarsimp\n apply (subst mask_lower_twice [where n = pageBits, OF pbfs_atleast_pageBits, symmetric])\n apply (clarsimp simp: obj_relation_cuts_def2 pte_relation_def\n cte_relation_def other_obj_relation_def\n split: Structures_A.kernel_object.split_asm\n Structures_H.kernel_object.split_asm\n if_split_asm arch_kernel_obj.split_asm)\n apply (rename_tac vmpage_size n)\n apply (rule_tac x = vmpage_size in exI)\n apply (subst conjunct2 [OF is_aligned_add_helper])\n apply (drule (1) pspace_alignedD)\n apply simp\n apply (simp add: shiftl_t2n mult_ac)\n apply (erule word_less_power_trans2 [OF _ pbfs_atleast_pageBits])\n apply (case_tac vmpage_size, simp_all add: word_bits_conv bit_simps)[1]\n apply (simp add: obj_at_def a_type_def)\n done\n\nlemma pointerInUserData_relation:\n \"\\ (s,s') \\ state_relation; valid_state' s'; valid_state s\\\n \\ pointerInUserData p s' = in_user_frame p s\"\n apply (simp add: pointerInUserData_def in_user_frame_def)\n apply (rule iffI)\n apply (erule typ_at_UserDataI, (clarsimp simp: valid_state_def)+)[1]\n apply clarsimp\n apply (drule_tac sz = sz and\n n = \"(p && mask (pageBitsForSize sz)) >> pageBits\"\n in typ_at_AUserDataI [where s = s and s' = s'])\n apply (fastforce simp: valid_state'_def)+\n apply (rule shiftr_less_t2n')\n apply (simp add: pbfs_atleast_pageBits mask_twice)\n apply (case_tac sz, simp_all add: bit_simps)[1]\n apply (subgoal_tac \"(p && ~~ mask (pageBitsForSize sz)) + (p && mask (pageBitsForSize sz) >> pageBits) * 2 ^ pageBits = (p && ~~ mask pageBits)\")\n apply simp\n apply (subst mult.commute)\n apply (subst shiftl_t2n [symmetric])\n apply (simp add: shiftr_shiftl1)\n apply (subst mask_out_add_aligned)\n apply (rule is_aligned_neg_mask)\n apply (simp add: pbfs_atleast_pageBits)\n apply (subst add.commute)\n apply (simp add: word_plus_and_or_coroll2)\n done\n\nlemma pointerInDeviceData_relation:\n \"\\ (s,s') \\ state_relation; valid_state' s'; valid_state s\\\n \\ pointerInDeviceData p s' = in_device_frame p s\"\n apply (simp add: pointerInDeviceData_def in_device_frame_def)\n apply (rule iffI)\n apply (erule typ_at_DeviceDataI, (clarsimp simp: valid_state_def)+)[1]\n apply clarsimp\n apply (drule_tac sz = sz and\n n = \"(p && mask (pageBitsForSize sz)) >> pageBits\"\n in typ_at_ADeviceDataI [where s = s and s' = s'])\n apply (fastforce simp: valid_state'_def)+\n apply (rule shiftr_less_t2n')\n apply (simp add: pbfs_atleast_pageBits mask_twice)\n apply (case_tac sz, simp_all add: bit_simps)[1]\n apply (subgoal_tac \"(p && ~~ mask (pageBitsForSize sz)) + (p && mask (pageBitsForSize sz) >> pageBits) * 2 ^ pageBits = (p && ~~ mask pageBits)\")\n apply simp\n apply (subst mult.commute)\n apply (subst shiftl_t2n [symmetric])\n apply (simp add: shiftr_shiftl1)\n apply (subst mask_out_add_aligned)\n apply (rule is_aligned_neg_mask)\n apply (simp add: pbfs_atleast_pageBits)\n apply (subst add.commute)\n apply (simp add: word_plus_and_or_coroll2)\n done\n\nlemma user_mem_relation:\n \"\\(s,s') \\ state_relation; valid_state' s'; valid_state s\\\n \\ user_mem' s' = user_mem s\"\n apply (rule ext)\n apply (clarsimp simp: user_mem_def user_mem'_def pointerInUserData_relation pointerInDeviceData_relation)\n apply (simp add: state_relation_def)\n done\n\nlemma device_mem_relation:\n \"\\(s,s') \\ state_relation; valid_state' s'; valid_state s\\\n \\ device_mem' s' = device_mem s\"\n apply (rule ext)\n apply (clarsimp simp: device_mem_def device_mem'_def pointerInUserData_relation\n pointerInDeviceData_relation)\n done\n\nlemma absKState_correct:\n assumes invs: \"einvs (s :: det_ext state)\" and invs': \"invs' s'\"\n assumes rel: \"(s,s') \\ state_relation\"\n shows \"absKState s' = abs_state s\"\n using assms\n apply (intro state.equality, simp_all add: absKState_def abs_state_def)\n apply (rule absHeap_correct, clarsimp+)\n apply (clarsimp elim!: state_relationE)\n apply (rule absCDT_correct, clarsimp+)\n apply (rule absIsOriginalCap_correct, clarsimp+)\n apply (simp add: state_relation_def)\n apply (simp add: state_relation_def)\n apply (clarsimp simp: user_mem_relation invs_def invs'_def)\n apply (simp add: state_relation_def)\n apply (rule absInterruptIRQNode_correct, simp add: state_relation_def)\n apply (rule absInterruptStates_correct, simp add: state_relation_def)\n apply (rule absArchState_correct, simp)\n apply (rule absExst_correct, simp+)\n done\n\ntext \\The top-level invariance\\\n\nlemma set_thread_state_sched_act:\n \"\\(\\s. runnable state) and (\\s. P (scheduler_action s))\\\n set_thread_state thread state\n \\\\rs s. P (scheduler_action (s::det_state))\\\"\n apply (simp add: set_thread_state_def)\n apply wp\n apply (simp add: set_thread_state_ext_def)\n apply wp\n apply (rule hoare_pre_cont)\n apply (rule_tac Q=\"\\rv. (\\s. runnable ts) and (\\s. P (scheduler_action s))\"\n in hoare_strengthen_post)\n apply wp\n apply force\n apply (wp gts_st_tcb_at)+\n apply (rule_tac Q=\"\\rv. st_tcb_at ((=) state) thread and (\\s. runnable state) and (\\s. P (scheduler_action s))\" in hoare_strengthen_post)\n apply (simp add: st_tcb_at_def)\n apply (wp obj_set_prop_at)+\n apply (force simp: st_tcb_at_def obj_at_def)\n apply wp\n apply clarsimp\n done\n\nlemma activate_thread_sched_act:\n \"\\ct_in_state activatable and (\\s. P (scheduler_action s))\\\n activate_thread\n \\\\rs s. P (scheduler_action (s::det_state))\\\"\n by (simp add: activate_thread_def set_thread_state_def arch_activate_idle_thread_def\n | (wp set_thread_state_sched_act gts_wp)+ | wpc)+\n\nlemma schedule_sched_act_rct[wp]:\n \"\\\\\\ Schedule_A.schedule\n \\\\rs (s::det_state). scheduler_action s = resume_cur_thread\\\"\n unfolding Schedule_A.schedule_def\n by (wpsimp)\n\nlemma call_kernel_sched_act_rct[wp]:\n \"\\einvs and (\\s. e \\ Interrupt \\ ct_running s)\n and (\\s. scheduler_action s = resume_cur_thread)\\\n call_kernel e\n \\\\rs (s::det_state). scheduler_action s = resume_cur_thread\\\"\n apply (simp add: call_kernel_def)\n apply (wp activate_thread_sched_act | simp)+\n apply (clarsimp simp: active_from_running)\n done\n\nlemma kernel_entry_invs:\n \"\\einvs and (\\s. e \\ Interrupt \\ ct_running s)\n and (\\s. 0 < domain_time s) and valid_domain_list and (ct_running or ct_idle)\n and (\\s. scheduler_action s = resume_cur_thread)\\\n kernel_entry e us\n \\\\rv. einvs and (\\s. ct_running s \\ ct_idle s)\n and (\\s. 0 < domain_time s) and valid_domain_list\n and (\\s. scheduler_action s = resume_cur_thread)\\\"\n apply (rule_tac Q=\"\\rv. invs and (\\s. ct_running s \\ ct_idle s) and valid_sched and\n (\\s. 0 < domain_time s) and valid_domain_list and\n valid_list and (\\s. scheduler_action s = resume_cur_thread)\"\n in hoare_post_imp)\n apply clarsimp\n apply (simp add: kernel_entry_def)\n apply (wp akernel_invs_det_ext call_kernel_valid_sched thread_set_invs_trivial\n thread_set_ct_running thread_set_not_state_valid_sched\n hoare_vcg_disj_lift ct_in_state_thread_state_lift thread_set_no_change_tcb_state\n call_kernel_domain_time_inv_det_ext call_kernel_domain_list_inv_det_ext\n static_imp_wp\n | clarsimp simp add: tcb_cap_cases_def active_from_running)+\n done\n\ndefinition\n \"full_invs \\ {((tc, s :: det_ext state), m, e). einvs s \\\n (ct_running s \\ ct_idle s) \\\n (m = KernelMode \\ e \\ None) \\\n (m = UserMode \\ ct_running s) \\\n (m = IdleMode \\ ct_idle s) \\\n (e \\ None \\ e \\ Some Interrupt \\ ct_running s) \\\n 0 < domain_time s \\ valid_domain_list s \\\n (scheduler_action s = resume_cur_thread)}\"\n\nlemma do_user_op_valid_list:\"\\valid_list\\ do_user_op f tc \\\\_. valid_list\\\"\n unfolding do_user_op_def\n apply (wp select_wp | simp add: split_def)+\n done\n\nlemma do_user_op_valid_sched:\"\\valid_sched\\ do_user_op f tc \\\\_. valid_sched\\\"\n unfolding do_user_op_def\n apply (wp select_wp | simp add: split_def)+\n done\n\nlemma do_user_op_sched_act:\n \"\\\\s. P (scheduler_action s)\\ do_user_op f tc \\\\_ s. P (scheduler_action s)\\\"\n unfolding do_user_op_def\n apply (wp select_wp | simp add: split_def)+\n done\n\nlemma do_user_op_invs2:\n \"\\einvs and ct_running and (\\s. scheduler_action s = resume_cur_thread)\n and (\\s. 0 < domain_time s) and valid_domain_list \\\n do_user_op f tc\n \\\\_. (einvs and ct_running and (\\s. scheduler_action s = resume_cur_thread))\n and (\\s. 0 < domain_time s) and valid_domain_list \\\"\n apply (rule_tac Q=\"\\_. valid_list and valid_sched and\n (\\s. scheduler_action s = resume_cur_thread) and (invs and ct_running) and\n (\\s. 0 < domain_time s) and valid_domain_list\"\n in hoare_strengthen_post)\n apply (wp do_user_op_valid_list do_user_op_valid_sched do_user_op_sched_act\n do_user_op_invs | simp | force)+\n done\n\nlemmas ext_init_def = ext_init_det_ext_ext_def ext_init_unit_def\n\nlemma valid_list_init[simp]:\n \"valid_list init_A_st\"\n by (simp add: valid_list_2_def init_A_st_def ext_init_def init_cdt_def)\n\nlemmas valid_list_inits[simp] = valid_list_init[simplified]\n\nlemma valid_sched_init[simp]:\n \"valid_sched init_A_st\"\n apply (simp add: valid_sched_def init_A_st_def ext_init_def)\n apply (clarsimp simp: valid_etcbs_def init_kheap_def st_tcb_at_kh_def obj_at_kh_def\n obj_at_def is_etcb_at_def idle_thread_ptr_def\n valid_queues_2_def ct_not_in_q_def not_queued_def\n valid_sched_action_def is_activatable_def init_irq_node_ptr_def\n riscv_global_pt_ptr_def init_global_pt_def\n ct_in_cur_domain_2_def valid_blocked_2_def valid_idle_etcb_def\n etcb_at'_def default_etcb_def)\n done\n\nlemma valid_domain_list_init[simp]:\n \"valid_domain_list init_A_st\"\n by (simp add: init_A_st_def ext_init_def valid_domain_list_def)\n\nlemma akernel_invariant:\n \"ADT_A uop \\ full_invs\"\n unfolding full_invs_def\n apply (rule invariantI)\n apply (clarsimp simp: ADT_A_def subset_iff)\n apply (frule bspec[OF akernel_init_invs])\n apply (simp add: Let_def Init_A_def)\n apply (simp add: init_A_st_def ext_init_def)\n apply (clarsimp simp: ADT_A_def global_automaton_def)\n\n apply (rename_tac tc' s' mode' e' tc s mode e)\n apply (elim disjE)\n apply ((clarsimp simp: kernel_call_A_def\n | drule use_valid[OF _ kernel_entry_invs])+)[2]\n apply ((clarsimp simp: do_user_op_A_def monad_to_transition_def\n check_active_irq_A_def\n | drule use_valid[OF _ do_user_op_invs2]\n | drule use_valid[OF _ check_active_irq_invs_just_running])+)[2]\n apply ((clarsimp simp add: check_active_irq_A_def\n | drule use_valid[OF _ check_active_irq_invs])+)[1]\n apply (clarsimp simp: ct_in_state_def st_tcb_at_def obj_at_def)\n apply ((clarsimp simp add: do_user_op_A_def check_active_irq_A_def\n | drule use_valid[OF _ do_user_op_invs2]\n | drule use_valid[OF _ check_active_irq_invs_just_running])+)[1]\n apply (clarsimp simp: ct_in_state_def st_tcb_at_def obj_at_def)\n apply (clarsimp simp: ct_in_state_def st_tcb_at_def obj_at_def)\n apply ((clarsimp simp add: check_active_irq_A_def\n | drule use_valid[OF _ check_active_irq_invs])+)[1]\n apply ((clarsimp simp add: check_active_irq_A_def\n | drule use_valid[OF _ check_active_irq_invs_just_idle])+)[1]\n apply ((clarsimp simp add: check_active_irq_A_def\n | drule use_valid[OF _ check_active_irq_invs])+)[1]\n done\n\nlemma ckernel_invs:\n \"\\invs' and\n (\\s. e \\ Interrupt \\ ct_running' s) and\n (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\n callKernel e\n \\\\rs. (\\s. ksSchedulerAction s = ResumeCurrentThread)\n and (invs' and (ct_running' or ct_idle'))\\\"\n apply (simp add: callKernel_def)\n apply (rule hoare_pre)\n apply (wp activate_invs' activate_sch_act schedule_sch\n schedule_sch_act_simple he_invs' schedule_invs'\n hoare_drop_imps\n | simp add: no_irq_getActiveIRQ)+\n done\n\n(* abstract and haskell have identical domain list fields *)\nabbreviation valid_domain_list' :: \"'a kernel_state_scheme \\ bool\" where\n \"valid_domain_list' \\ \\s. valid_domain_list_2 (ksDomSchedule s)\"\n\nlemmas valid_domain_list'_def = valid_domain_list_2_def\n\ndefs kernelExitAssertions_def:\n \"kernelExitAssertions s \\ 0 < ksDomainTime s \\ valid_domain_list' s\"\n\nlemma callKernel_domain_time_left:\n \"\\ \\ \\ callKernel e \\\\_ s. 0 < ksDomainTime s \\ valid_domain_list' s \\\"\n unfolding callKernel_def kernelExitAssertions_def by wpsimp\n\nlemma doMachineOp_sch_act_simple:\n \"doMachineOp f \\sch_act_simple\\\"\n by (wp sch_act_simple_lift)\n\nlemma kernelEntry_invs':\n \"\\ invs' and (\\s. e \\ Interrupt \\ ct_running' s) and\n (ct_running' or ct_idle') and\n (\\s. ksSchedulerAction s = ResumeCurrentThread) and\n (\\s. 0 < ksDomainTime s) and valid_domain_list' \\\n kernelEntry e tc\n \\\\rs. (\\s. ksSchedulerAction s = ResumeCurrentThread) and\n (invs' and (ct_running' or ct_idle')) and\n (\\s. 0 < ksDomainTime s) and valid_domain_list' \\\"\n apply (simp add: kernelEntry_def)\n apply (wp ckernel_invs callKernel_domain_time_left\n threadSet_invs_trivial threadSet_ct_running' select_wp\n TcbAcc_R.dmo_invs' static_imp_wp\n doMachineOp_ct_in_state' doMachineOp_sch_act_simple\n callKernel_domain_time_left\n | clarsimp simp: user_memory_update_def no_irq_def tcb_at_invs'\n valid_domain_list'_def)+\n done\n\nlemma absKState_correct':\n \"\\einvs s; invs' s'; (s,s') \\ state_relation\\\n \\ absKState s' = abs_state s\"\n apply (intro state.equality, simp_all add: absKState_def abs_state_def)\n apply (rule absHeap_correct)\n apply (clarsimp simp: valid_state_def valid_pspace_def)+\n apply (clarsimp dest!: state_relationD)\n apply (rule absCDT_correct)\n apply (clarsimp simp: valid_state_def valid_pspace_def\n valid_state'_def valid_pspace'_def)+\n apply (rule absIsOriginalCap_correct, clarsimp+)\n apply (simp add: state_relation_def)\n apply (simp add: state_relation_def)\n apply (clarsimp simp: user_mem_relation invs_def invs'_def)\n apply (simp add: state_relation_def)\n apply (rule absInterruptIRQNode_correct, simp add: state_relation_def)\n apply (rule absInterruptStates_correct, simp add: state_relation_def)\n apply (erule absArchState_correct)\n apply (rule absExst_correct, simp, assumption+)\n done\n\nlemma ptable_lift_abs_state[simp]:\n \"ptable_lift t (abs_state s) = ptable_lift t s\"\n by (simp add: ptable_lift_def abs_state_def)\n\nlemma ptable_rights_abs_state[simp]:\n \"ptable_rights t (abs_state s) = ptable_rights t s\"\n by (simp add: ptable_rights_def abs_state_def)\n\nlemma ptable_rights_imp_UserData:\n assumes invs: \"einvs s\" and invs': \"invs' s'\"\n assumes rel: \"(s,s') : state_relation\"\n assumes rights: \"ptable_rights t (absKState s') x \\ {}\"\n assumes trans:\n \"ptable_lift t (absKState s') x = Some (RISCV64.addrFromPPtr y)\"\n shows \"pointerInUserData y s' \\ pointerInDeviceData y s'\"\nproof -\n from invs invs' rel have [simp]: \"absKState s' = abs_state s\"\n by - (rule absKState_correct', simp_all)\n from invs have valid: \"valid_state s\" by auto\n from invs' have valid': \"valid_state' s'\" by auto\n have \"in_user_frame y s \\ in_device_frame y s \"\n by (rule ptable_rights_imp_frame[OF valid rights[simplified]\n trans[simplified]])\n thus ?thesis\n by (auto simp add: pointerInUserData_relation[OF rel valid' valid]\n pointerInDeviceData_relation[OF rel valid' valid])\nqed\n\ndefinition\n \"ex_abs G \\ \\s'. \\s. ((s :: (det_ext) state),s') \\ state_relation \\ G s\"\n\nlemma device_update_invs':\n \"\\invs'\\doMachineOp (device_memory_update ds)\n \\\\_. invs'\\\"\n apply (simp add: doMachineOp_def device_memory_update_def simpler_modify_def select_f_def\n gets_def get_def bind_def valid_def return_def)\n by (clarsimp simp: invs'_def valid_state'_def valid_irq_states'_def valid_machine_state'_def)\n\ncrunches doMachineOp\n for ksDomainTime[wp]: \"\\s. P (ksDomainTime s)\"\n\nlemma doUserOp_invs':\n \"\\invs' and ex_abs einvs and\n (\\s. ksSchedulerAction s = ResumeCurrentThread) and ct_running' and\n (\\s. 0 < ksDomainTime s) and valid_domain_list'\\\n doUserOp f tc\n \\\\_. invs' and\n (\\s. ksSchedulerAction s = ResumeCurrentThread) and ct_running' and\n (\\s. 0 < ksDomainTime s) and valid_domain_list'\\\"\n apply (simp add: doUserOp_def split_def ex_abs_def)\n apply (wp device_update_invs' doMachineOp_ct_in_state' select_wp\n | (wp (once) dmo_invs', wpsimp simp: no_irq_modify device_memory_update_def\n user_memory_update_def))+\n apply (clarsimp simp: user_memory_update_def simpler_modify_def\n restrict_map_def\n split: option.splits)\n apply (frule ptable_rights_imp_UserData[rotated 2], auto)\n done\n\n\ntext \\The top-level correspondence\\\n\nlemma kernel_corres':\n \"corres dc (einvs and (\\s. event \\ Interrupt \\ ct_running s) and (ct_running or ct_idle)\n and (\\s. scheduler_action s = resume_cur_thread))\n (invs' and (\\s. event \\ Interrupt \\ ct_running' s) and (ct_running' or ct_idle') and\n (\\s. ksSchedulerAction s = ResumeCurrentThread))\n (call_kernel event)\n (do _ \\ runExceptT $\n handleEvent event `~catchError~`\n (\\_. withoutPreemption $ do\n irq <- doMachineOp (getActiveIRQ True);\n when (isJust irq) $ handleInterrupt (fromJust irq)\n od);\n _ \\ ThreadDecls_H.schedule;\n activateThread\n od)\"\n unfolding call_kernel_def callKernel_def\n apply (simp add: call_kernel_def callKernel_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split)\n apply (rule corres_split_handle[OF handleEvent_corres])\n apply simp\n apply (rule corres_split[OF corres_machine_op])\n apply (rule corres_underlying_trivial)\n apply (rule no_fail_getActiveIRQ)\n apply clarsimp\n apply (rule_tac x=irq in option_corres)\n apply (rule_tac P=\\ and P'=\\ in corres_inst)\n apply (simp add: when_def)\n apply (rule corres_when[simplified dc_def], simp)\n apply simp\n apply (rule handleInterrupt_corres[simplified dc_def])\n apply simp\n apply (wp hoare_drop_imps hoare_vcg_all_lift)[1]\n apply simp\n apply (rule_tac Q=\"\\irq s. invs' s \\\n (\\irq'. irq = Some irq' \\\n intStateIRQTable (ksInterruptState s ) irq' \\\n IRQInactive)\"\n in hoare_post_imp)\n apply simp\n apply (wp doMachineOp_getActiveIRQ_IRQ_active handle_event_valid_sched | simp)+\n apply (rule_tac Q=\"\\_. \\\" and E=\"\\_. invs'\" in hoare_post_impErr)\n apply wpsimp+\n apply (simp add: invs'_def valid_state'_def)\n apply (rule corres_split[OF schedule_corres])\n apply (rule activateThread_corres)\n apply (wp handle_interrupt_valid_sched[unfolded non_kernel_IRQs_def, simplified]\n schedule_invs' hoare_vcg_if_lift2 hoare_drop_imps |simp)+\n apply (rule_tac Q=\"\\_. valid_sched and invs and valid_list\" and\n E=\"\\_. valid_sched and invs and valid_list\"\n in hoare_post_impErr)\n apply (wp handle_event_valid_sched hoare_vcg_imp_lift' |simp)+\n apply (clarsimp simp: active_from_running)\n apply (clarsimp simp: active_from_running')\n done\n\nlemma kernel_corres:\n \"corres dc (einvs and (\\s. event \\ Interrupt \\ ct_running s) and (ct_running or ct_idle) and\n (\\s. scheduler_action s = resume_cur_thread) and\n (\\s. 0 < domain_time s \\ valid_domain_list s))\n (invs' and (\\s. event \\ Interrupt \\ ct_running' s) and (ct_running' or ct_idle') and\n (\\s. ksSchedulerAction s = ResumeCurrentThread))\n (call_kernel event) (callKernel event)\"\n unfolding callKernel_def K_bind_def\n apply (rule corres_guard_imp)\n apply (rule corres_add_noop_lhs2)\n apply (simp only: bind_assoc[symmetric])\n apply (rule corres_split[where r'=dc and\n R=\"\\_ s. 0 < domain_time s \\ valid_domain_list s\" and\n R'=\"\\_. \\\"])\n apply (simp only: bind_assoc)\n apply (rule kernel_corres')\n apply (rule corres_bind_return2, rule corres_stateAssert_assume_stronger)\n apply simp\n apply (simp add: kernelExitAssertions_def state_relation_def)\n apply (wp call_kernel_domain_time_inv_det_ext call_kernel_domain_list_inv_det_ext)\n apply wp\n apply clarsimp\n apply clarsimp\n done\n\nlemma user_mem_corres:\n \"corres (=) invs invs' (gets (\\x. g (user_mem x))) (gets (\\x. g (user_mem' x)))\"\n by (clarsimp simp add: gets_def get_def return_def bind_def\n invs_def invs'_def\n corres_underlying_def user_mem_relation)\n\nlemma device_mem_corres:\n \"corres (=) invs invs' (gets (\\x. g (device_mem x))) (gets (\\x. g (device_mem' x)))\"\n by (clarsimp simp add: gets_def get_def return_def bind_def\n invs_def invs'_def\n corres_underlying_def device_mem_relation)\n\nlemma entry_corres:\n \"corres (=) (einvs and (\\s. event \\ Interrupt \\ ct_running s) and\n (\\s. 0 < domain_time s) and valid_domain_list and (ct_running or ct_idle) and\n (\\s. scheduler_action s = resume_cur_thread))\n (invs' and (\\s. event \\ Interrupt \\ ct_running' s) and\n (\\s. 0 < ksDomainTime s) and valid_domain_list' and (ct_running' or ct_idle') and\n (\\s. ksSchedulerAction s = ResumeCurrentThread))\n (kernel_entry event tc) (kernelEntry event tc)\"\n apply (simp add: kernel_entry_def kernelEntry_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split[OF getCurThread_corres])\n apply (rule corres_split)\n apply simp\n apply (rule threadset_corresT)\n apply (simp add: tcb_relation_def arch_tcb_relation_def\n arch_tcb_context_set_def atcbContextSet_def)\n apply (clarsimp simp: tcb_cap_cases_def cteSizeBits_def)\n apply (clarsimp simp: tcb_cte_cases_def cteSizeBits_def)\n apply (simp add: exst_same_def)\n apply (rule corres_split[OF kernel_corres])\n apply (rule corres_split_eqr[OF getCurThread_corres])\n apply (rule threadGet_corres)\n apply (simp add: tcb_relation_def arch_tcb_relation_def\n arch_tcb_context_get_def atcbContextGet_def)\n apply wp+\n apply (rule hoare_strengthen_post, rule akernel_invs_det_ext,\n simp add: invs_def valid_state_def valid_pspace_def cur_tcb_def)\n apply (rule hoare_strengthen_post, rule ckernel_invs, simp add: invs'_def cur_tcb'_def)\n apply (wp thread_set_invs_trivial thread_set_ct_running\n threadSet_invs_trivial threadSet_ct_running'\n select_wp thread_set_not_state_valid_sched static_imp_wp\n hoare_vcg_disj_lift ct_in_state_thread_state_lift\n | simp add: tcb_cap_cases_def ct_in_state'_def thread_set_no_change_tcb_state\n | (wps, wp threadSet_st_tcb_at2) )+\n apply (clarsimp simp: invs_def cur_tcb_def valid_state_def valid_pspace_def)\n apply (clarsimp simp: ct_in_state'_def)\n done\n\nlemma corres_gets_machine_state:\n \"corres (=) \\ \\ (gets (f \\ machine_state)) (gets (f \\ ksMachineState))\"\n by (clarsimp simp: gets_def corres_underlying_def\n in_monad bind_def get_def return_def state_relation_def)\n\nlemma do_user_op_corres:\n \"corres (=) (einvs and ct_running)\n (invs' and (%s. ksSchedulerAction s = ResumeCurrentThread) and\n ct_running')\n (do_user_op f tc) (doUserOp f tc)\"\n apply (simp add: do_user_op_def doUserOp_def split_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split[OF getCurThread_corres])\n apply (rule_tac r'=\"(=)\" and P=einvs and P'=invs' in corres_split)\n apply (fastforce dest: absKState_correct [rotated])\n apply (rule_tac r'=\"(=)\" and P=einvs and P'=invs' in corres_split)\n apply (fastforce dest: absKState_correct [rotated])\n apply (rule_tac r'=\"(=)\" and P=invs and P'=invs' in corres_split)\n apply (rule user_mem_corres)\n apply (rule_tac r'=\"(=)\" and P=invs and P'=invs' in corres_split)\n apply (rule device_mem_corres)\n apply (rule_tac r'=\"(=)\" in corres_split)\n apply (rule corres_gets_machine_state)\n apply (rule_tac F = \"dom (rvb \\ addrFromPPtr) \\ - dom rvd\" in corres_gen_asm)\n apply (rule_tac F = \"dom (rvc \\ addrFromPPtr) \\ dom rvd\" in corres_gen_asm)\n apply simp\n apply (rule_tac r'=\"(=)\" in corres_split[OF corres_select])\n apply simp\n apply (rule corres_underlying_split[OF corres_machine_op])\n apply simp\n apply (rule corres_underlying_trivial)\n apply (simp add: user_memory_update_def)\n apply (wp | simp)+\n apply (rule corres_underlying_split[OF corres_machine_op,where Q = dc and Q'=dc])\n apply (rule corres_underlying_trivial)\n apply (wp | simp add: dc_def device_memory_update_def)+\n apply (clarsimp simp: invs_def valid_state_def pspace_respects_device_region_def)\n apply fastforce\n done\n\nlemma ct_running_related:\n \"\\ (a, c) \\ state_relation; ct_running' c \\\n \\ ct_running a\"\n apply (clarsimp simp: ct_in_state_def ct_in_state'_def\n curthread_relation)\n apply (frule(1) st_tcb_at_coerce_abstract)\n apply (erule st_tcb_weakenE)\n apply (case_tac st, simp_all)[1]\n done\n\nlemma ct_idle_related:\n \"\\ (a, c) \\ state_relation; ct_idle' c \\\n \\ ct_idle a\"\n apply (clarsimp simp: ct_in_state_def ct_in_state'_def\n curthread_relation)\n apply (frule(1) st_tcb_at_coerce_abstract)\n apply (erule st_tcb_weakenE)\n apply (case_tac st, simp_all)[1]\n done\n\ndefinition\n \"full_invs' \\ {((tc,s),m,e). invs' s \\\n ex_abs (einvs::det_ext state \\ bool) s \\\n ksSchedulerAction s = ResumeCurrentThread \\\n (ct_running' s \\ ct_idle' s) \\\n (m = KernelMode \\ e \\ None) \\\n (m = UserMode \\ ct_running' s) \\\n (m = IdleMode \\ ct_idle' s) \\\n (e \\ None \\ e \\ Some Interrupt \\ ct_running' s) \\\n 0 < ksDomainTime s \\ valid_domain_list' s}\"\n\nlemma check_active_irq_corres':\n \"corres (=) \\ \\ (check_active_irq) (checkActiveIRQ)\"\n apply (simp add: check_active_irq_def checkActiveIRQ_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split[OF corres_machine_op[OF corres_underlying_trivial], where R=\"\\_. \\\" and R'=\"\\_. \\\"])\n apply simp\n apply (rule no_fail_getActiveIRQ)\n apply (wp | simp )+\n done\n\nlemma check_active_irq_corres:\n \"corres (=)\n (invs and (ct_running or ct_idle) and einvs and (\\s. scheduler_action s = resume_cur_thread)\n and (\\s. 0 < domain_time s) and valid_domain_list)\n (invs' and (\\s. ksSchedulerAction s = ResumeCurrentThread)\n and (\\s. 0 < ksDomainTime s) and valid_domain_list' and (ct_running' or ct_idle'))\n (check_active_irq) (checkActiveIRQ)\"\n apply (rule corres_guard_imp)\n apply (rule check_active_irq_corres', auto)\n done\n\nlemma checkActiveIRQ_just_running_corres:\n \"corres (=)\n (invs and ct_running and einvs and (\\s. scheduler_action s = resume_cur_thread)\n and (\\s. 0 < domain_time s) and valid_domain_list)\n (invs' and ct_running'\n and (\\s. 0 < ksDomainTime s) and valid_domain_list'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread))\n (check_active_irq) (checkActiveIRQ)\"\n apply (rule corres_guard_imp)\n apply (rule check_active_irq_corres', auto)\n done\n\nlemma checkActiveIRQ_just_idle_corres:\n \"corres (=)\n (invs and ct_idle and einvs and (\\s. scheduler_action s = resume_cur_thread)\n and (\\s. 0 < domain_time s) and valid_domain_list)\n (invs' and ct_idle'\n and (\\s. 0 < ksDomainTime s) and valid_domain_list'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread))\n (check_active_irq) (checkActiveIRQ)\"\n apply (rule corres_guard_imp)\n apply (rule check_active_irq_corres', auto)\n done\n\nlemma checkActiveIRQ_invs':\n \"\\invs' and ex_abs invs and (ct_running' or ct_idle')\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\n checkActiveIRQ\n \\\\_. invs' and (ct_running' or ct_idle')\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\"\n apply (simp add: checkActiveIRQ_def ex_abs_def)\n apply (wp dmo_invs' | simp)+\n done\n\nlemma checkActiveIRQ_invs'_just_running:\n \"\\invs' and ex_abs invs and ct_running'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\n checkActiveIRQ\n \\\\_. invs' and ct_running'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\"\n apply (simp add: checkActiveIRQ_def)\n apply (wp | simp)+\n done\n\nlemma checkActiveIRQ_invs'_just_idle:\n \"\\invs' and ex_abs invs and ct_idle'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\n checkActiveIRQ\n \\\\_. invs' and ct_idle'\n and (\\s. ksSchedulerAction s = ResumeCurrentThread)\\\"\n apply (simp add: checkActiveIRQ_def)\n apply (wp | simp)+\n done\n\nlemma sched_act_rct_related:\n \"\\ (a, c) \\ state_relation; ksSchedulerAction c = ResumeCurrentThread\\\n \\ scheduler_action a = resume_cur_thread\"\n by (case_tac \"scheduler_action a\", simp_all add: state_relation_def)\n\nlemma domain_time_rel_eq:\n \"(a, c) \\ state_relation \\ P (ksDomainTime c) = P (domain_time a)\"\n by (clarsimp simp: state_relation_def)\n\nlemma domain_list_rel_eq:\n \"(a, c) \\ state_relation \\ P (ksDomSchedule c) = P (domain_list a)\"\n by (clarsimp simp: state_relation_def)\n\ncrunch valid_objs': doUserOp, checkActiveIRQ valid_objs'\n (wp: crunch_wps select_wp)\n\nlemma ckernel_invariant:\n \"ADT_H uop \\ full_invs'\"\n unfolding full_invs'_def\n supply word_neq_0_conv[simp]\n supply domain_time_rel_eq[simp] domain_list_rel_eq[simp]\n apply (rule invariantI)\n apply (clarsimp simp add: ADT_H_def)\n apply (subst conj_commute, simp)\n apply (rule conjI)\n apply (frule init_refinement[simplified subset_eq, THEN bspec])\n apply (clarsimp simp: ex_abs_def lift_state_relation_def)\n apply (frule akernel_init_invs[THEN bspec])\n apply (rule_tac x = s in exI)\n apply (clarsimp simp: Init_A_def)\n apply (insert ckernel_init_invs)[1]\n apply clarsimp\n apply (frule ckernel_init_sch_norm)\n apply (frule ckernel_init_ctr)\n apply (frule ckernel_init_domain_time)\n apply (frule ckernel_init_domain_list)\n apply (fastforce simp: Init_H_def valid_domain_list'_def)\n apply (clarsimp simp: ADT_A_def ADT_H_def global_automaton_def)\n\n apply (erule_tac P=\"a \\ (\\x. b x)\" for a b in disjE)\n\n apply (clarsimp simp: kernel_call_H_def)\n\n apply (drule use_valid[OF _ valid_corres_combined\n [OF kernel_entry_invs entry_corres],\n OF _ kernelEntry_invs'[THEN hoare_weaken_pre]])\n apply fastforce\n apply (fastforce simp: ex_abs_def sch_act_simple_def ct_running_related ct_idle_related\n sched_act_rct_related)\n apply (clarsimp simp: kernel_call_H_def)\n apply (fastforce simp: ex_abs_def sch_act_simple_def ct_running_related ct_idle_related\n sched_act_rct_related)\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp add: do_user_op_H_def monad_to_transition_def)\n apply (drule use_valid)\n apply (rule hoare_vcg_conj_lift)\n apply (rule doUserOp_valid_objs')\n apply (rule valid_corres_combined[OF do_user_op_invs2 corres_guard_imp2[OF do_user_op_corres]])\n apply clarsimp\n apply (rule doUserOp_invs'[THEN hoare_weaken_pre])\n apply (fastforce simp: ex_abs_def)\n apply (clarsimp simp: invs_valid_objs' ex_abs_def, rule_tac x=s in exI,\n clarsimp simp: ct_running_related sched_act_rct_related)\n apply (clarsimp simp: ex_abs_def)\n apply (fastforce simp: ex_abs_def ct_running_related sched_act_rct_related)\n\n apply (erule_tac P=\"a \\ b \\ c \\ (\\x. d x)\" for a b c d in disjE)\n apply (clarsimp simp add: do_user_op_H_def monad_to_transition_def)\n apply (drule use_valid)\n apply (rule hoare_vcg_conj_lift)\n apply (rule doUserOp_valid_objs')\n apply (rule valid_corres_combined[OF do_user_op_invs2 corres_guard_imp2[OF do_user_op_corres]])\n apply clarsimp\n apply (rule doUserOp_invs'[THEN hoare_weaken_pre])\n apply (fastforce simp: ex_abs_def)\n apply (fastforce simp: ex_abs_def ct_running_related sched_act_rct_related)\n apply (fastforce simp: ex_abs_def)\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp: check_active_irq_H_def)\n apply (drule use_valid)\n apply (rule hoare_vcg_conj_lift)\n apply (rule checkActiveIRQ_valid_objs')\n apply (rule valid_corres_combined[OF check_active_irq_invs_just_running checkActiveIRQ_just_running_corres])\n apply (rule checkActiveIRQ_invs'_just_running[THEN hoare_weaken_pre])\n apply (fastforce simp: ex_abs_def)\n apply (fastforce simp: ex_abs_def ct_running_related sched_act_rct_related)\n apply (fastforce simp: ex_abs_def)\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp: check_active_irq_H_def)\n apply (drule use_valid)\n apply (rule hoare_vcg_conj_lift)\n apply (rule checkActiveIRQ_valid_objs')\n apply (rule valid_corres_combined[OF check_active_irq_invs_just_idle checkActiveIRQ_just_idle_corres])\n apply (rule checkActiveIRQ_invs'_just_idle[THEN hoare_weaken_pre])\n apply clarsimp\n apply (fastforce simp: ex_abs_def)\n apply (fastforce simp: ex_abs_def ct_idle_related sched_act_rct_related)\n apply (fastforce simp: ex_abs_def)\n\n apply (clarsimp simp: check_active_irq_H_def)\n apply (drule use_valid)\n apply (rule hoare_vcg_conj_lift)\n apply (rule checkActiveIRQ_valid_objs')\n apply (rule valid_corres_combined[OF check_active_irq_invs check_active_irq_corres])\n apply (rule checkActiveIRQ_invs'[THEN hoare_weaken_pre])\n apply clarsimp\n apply (fastforce simp: ex_abs_def)\n apply (fastforce simp: ex_abs_def ct_running_related ct_idle_related sched_act_rct_related)\n apply (fastforce simp: ex_abs_def)\n done\n\ntext \\The top-level theorem\\\n\nlemma fw_sim_A_H:\n \"LI (ADT_A uop)\n (ADT_H uop)\n (lift_state_relation state_relation)\n (full_invs \\ full_invs')\"\n apply (unfold LI_def full_invs_def full_invs'_def)\n apply (simp add: ADT_H_def ADT_A_def)\n apply (intro conjI)\n apply (rule init_refinement)\n apply (clarsimp simp: rel_semi_def relcomp_unfold in_lift_state_relation_eq)\n apply (rename_tac tc ak m ev tc' ck' m' ev' ck)\n apply (simp add: global_automaton_def)\n\n apply (erule_tac P=\"a \\ (\\x. b x)\" for a b in disjE)\n apply (clarsimp simp add: kernel_call_H_def kernel_call_A_def)\n apply (rule rev_mp, rule_tac tc=tc and event=x in entry_corres)\n apply (clarsimp simp: corres_underlying_def)\n apply (drule (1) bspec)\n apply (clarsimp simp: sch_act_simple_def)\n apply (drule (1) bspec)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (rule_tac x=b in exI)\n apply (rule conjI)\n apply (rule impI, simp)\n apply (frule (2) ct_running_related)\n apply clarsimp\n apply (rule_tac x=b in exI)\n apply (drule use_valid, rule kernelEntry_invs')\n apply (simp add: sch_act_simple_def)\n apply clarsimp\n apply (frule (1) ct_idle_related)\n apply (clarsimp simp: ct_in_state_def st_tcb_at_def obj_at_def)\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp: do_user_op_H_def do_user_op_A_def monad_to_transition_def)\n apply (rule rev_mp, rule_tac tc1=tc and f1=uop and P=\"ct_running and einvs\" in corres_guard_imp2[OF do_user_op_corres])\n apply simp\n apply (clarsimp simp add: corres_underlying_def)\n apply (drule (1) bspec, clarsimp)\n apply (drule (1) bspec, clarsimp)\n apply fastforce\n\n apply (erule_tac P=\"a \\ b \\ c \\ (\\x. d x)\" for a b c d in disjE)\n apply (clarsimp simp: do_user_op_H_def do_user_op_A_def monad_to_transition_def)\n apply (rule rev_mp, rule_tac tc1=tc and f1=uop and P=\"ct_running and einvs\" in corres_guard_imp2[OF do_user_op_corres])\n apply simp\n apply (clarsimp simp add: corres_underlying_def)\n apply (drule (1) bspec, clarsimp)\n apply (drule (1) bspec, clarsimp)\n apply fastforce\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp: check_active_irq_H_def check_active_irq_A_def)\n apply (rule rev_mp, rule check_active_irq_corres)\n apply (clarsimp simp: corres_underlying_def)\n apply fastforce\n\n apply (erule_tac P=\"a \\ b\" for a b in disjE)\n apply (clarsimp simp: check_active_irq_H_def check_active_irq_A_def)\n apply (rule rev_mp, rule check_active_irq_corres)\n apply (clarsimp simp: corres_underlying_def)\n apply fastforce\n\n apply (clarsimp simp: check_active_irq_H_def check_active_irq_A_def)\n apply (rule rev_mp, rule check_active_irq_corres)\n apply (clarsimp simp: corres_underlying_def)\n apply fastforce\n\n apply (clarsimp simp: absKState_correct dest!: lift_state_relationD)\n done\n\ntheorem refinement:\n \"ADT_H uop \\ ADT_A uop\"\n apply (rule sim_imp_refines)\n apply (rule L_invariantI)\n apply (rule akernel_invariant)\n apply (rule ckernel_invariant)\n apply (rule fw_sim_A_H)\n done\n\nend\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/refine/RISCV64/Refine.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041652, "lm_q2_score": 0.2877678218692626, "lm_q1q2_score": 0.14725557275005208}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__78_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__78_on_rules imports n_g2kAbsAfter_lemma_on_inv__78\nbegin\nsection{*All lemmas on causal relation between inv__78*}\nlemma lemma_inv__78_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__78 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__78) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__78) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__78_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2909808785120009, "lm_q1q2_score": 0.14662706018816998}} {"text": "(* Title: HOL/Auth/n_germanSymIndex_lemma_inv__47_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_germanSymIndex Protocol Case Study*} \n\ntheory n_germanSymIndex_lemma_inv__47_on_rules imports n_germanSymIndex_lemma_on_inv__47\nbegin\nsection{*All lemmas on causal relation between inv__47*}\nlemma lemma_inv__47_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__47 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__47) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__47) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_germanSymIndex/n_germanSymIndex_lemma_inv__47_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2909808600663598, "lm_q1q2_score": 0.1466270508932976}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__53_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__53_on_rules imports n_german_lemma_on_inv__53\nbegin\nsection{*All lemmas on causal relation between inv__53*}\nlemma lemma_inv__53_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__53 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__53) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__53) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__53_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.519521321952093, "lm_q2_score": 0.2814056014026228, "lm_q1q2_score": 0.14619621004541433}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(* Proofs about untyped invocations. *)\n\ntheory Untyped_R\nimports Detype_R Invocations_R InterruptAcc_R\nbegin\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nprimrec\n untypinv_relation :: \"Invocations_A.untyped_invocation \\\n Invocations_H.untyped_invocation \\ bool\"\nwhere\n \"untypinv_relation\n (Invocations_A.Retype c reset ob n ao n2 cl d) x = (\\ao'. x =\n (Invocations_H.Retype (cte_map c) reset ob n ao' n2\n (map cte_map cl) d)\n \\ ao = APIType_map2 (Inr ao'))\"\n\nprimrec\n valid_untyped_inv_wcap' :: \"Invocations_H.untyped_invocation\n \\ capability option \\ kernel_state \\ bool\"\nwhere\n \"valid_untyped_inv_wcap' (Invocations_H.Retype slot reset ptr_base ptr ty us slots d)\n = (\\co s. \\sz idx. (cte_wp_at' (\\cte. cteCap cte = UntypedCap d ptr_base sz idx\n \\ (co = None \\ co = Some (cteCap cte))) slot s\n \\ range_cover ptr sz (APIType_capBits ty us) (length slots)\n \\ ((\\ reset \\ idx \\ unat (ptr - ptr_base)) \\ (reset \\ ptr = ptr_base))\n \\ (ptr && ~~ mask sz) = ptr_base)\n \\ (reset \\ descendants_of' slot (ctes_of s) = {})\n \\ distinct (slot # slots)\n \\ (ty = APIObjectType ArchTypes_H.CapTableObject \\ us > 0)\n \\ (ty = APIObjectType ArchTypes_H.Untyped \\ minUntypedSizeBits \\ us \\ us \\ maxUntypedSizeBits)\n \\ (\\slot \\ set slots. cte_wp_at' (\\c. cteCap c = NullCap) slot s)\n \\ (\\slot \\ set slots. ex_cte_cap_to' slot s)\n \\ sch_act_simple s \\ 0 < length slots\n \\ (d \\ ty = APIObjectType ArchTypes_H.Untyped \\ isFrameType ty)\n \\ APIType_capBits ty us \\ maxUntypedSizeBits)\"\n\nabbreviation\n \"valid_untyped_inv' ui \\ valid_untyped_inv_wcap' ui None\"\n\nlemma valid_untyped_inv_wcap':\n \"valid_untyped_inv' ui\n = (\\s. \\sz idx. valid_untyped_inv_wcap' ui\n (Some (case ui of Invocations_H.Retype slot reset ptr_base ptr ty us slots d\n \\ UntypedCap d (ptr && ~~ mask sz) sz idx)) s)\"\n by (cases ui, auto simp: fun_eq_iff cte_wp_at_ctes_of)\n\nlemma whenE_rangeCheck_eq:\n \"(rangeCheck (x :: 'a :: {linorder, integral}) y z) =\n (whenE (x < fromIntegral y \\ fromIntegral z < x)\n (throwError (RangeError (fromIntegral y) (fromIntegral z))))\"\n by (simp add: rangeCheck_def unlessE_whenE linorder_not_le[symmetric])\n\nlemma APIType_map2_CapTable[simp]:\n \"(APIType_map2 ty = Structures_A.CapTableObject)\n = (ty = Inr (APIObjectType ArchTypes_H.CapTableObject))\"\n by (simp add: APIType_map2_def\n split: sum.split X64_H.object_type.split\n apiobject_type.split\n kernel_object.split arch_kernel_object.splits)\n\nlemma alignUp_H[simp]:\n \"Untyped_H.alignUp = More_Word_Operations.alignUp\"\n apply (rule ext)+\n apply (clarsimp simp:Untyped_H.alignUp_def More_Word_Operations.alignUp_def mask_def)\n done\n\n(* MOVE *)\nlemma corres_check_no_children:\n \"corres (\\x y. x = y) (cte_at slot)\n (pspace_aligned' and pspace_distinct' and valid_mdb' and\n cte_wp_at' (\\_. True) (cte_map slot))\n (const_on_failure x\n (doE z \\ ensure_no_children slot;\n returnOk y\n odE))\n (constOnFailure x\n (doE z \\ ensureNoChildren (cte_map slot);\n returnOk y\n odE))\"\n apply (clarsimp simp:const_on_failure_def constOnFailure_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split_catch[where E = dc and E'=dc])\n apply (rule corres_guard_imp[OF corres_splitEE])\n apply (rule ensureNoChildren_corres)\n apply simp\n apply (rule corres_returnOkTT)\n apply simp\n apply wp+\n apply simp+\n apply (clarsimp simp:dc_def,wp)+\n apply simp\n apply simp\n done\n\nlemma mapM_x_stateAssert:\n \"mapM_x (\\x. stateAssert (f x) (ss x)) xs\n = stateAssert (\\s. \\x \\ set xs. f x s) []\"\n apply (induct xs)\n apply (simp add: mapM_x_Nil)\n apply (simp add: mapM_x_Cons)\n apply (simp add: fun_eq_iff stateAssert_def bind_assoc exec_get assert_def)\n done\n\nlemma mapM_locate_eq:\n \"isCNodeCap cap\n \\ mapM (\\x. locateSlotCap cap x) xs\n = (do stateAssert (\\s. case gsCNodes s (capUntypedPtr cap) of None \\ xs = [] | Some n\n \\ \\x \\ set xs. n = capCNodeBits cap \\ x < 2 ^ n) [];\n return (map (\\x. (capCNodePtr cap) + 2 ^ cte_level_bits * x) xs) od)\"\n apply (clarsimp simp: isCap_simps)\n apply (simp add: locateSlot_conv objBits_simps cte_level_bits_def\n liftM_def[symmetric] mapM_liftM_const isCap_simps)\n apply (simp add: liftM_def mapM_discarded mapM_x_stateAssert)\n apply (intro bind_cong refl arg_cong2[where f=stateAssert] ext)\n apply (simp add: isCap_simps split: option.split)\n done\n\nlemmas is_frame_type_defs = is_frame_type_def isFrameType_def arch_is_frame_type_def\n\nlemma is_frame_type_isFrameType_eq[simp]:\n \"(is_frame_type (APIType_map2 (Inr (toEnum (unat arg0))))) =\n (Types_H.isFrameType (toEnum (unat arg0)))\"\n by (simp add: APIType_map2_def is_frame_type_defs split: apiobject_type.splits object_type.splits)+\n\n(* FIXME: remove *)\nlemmas APIType_capBits = objSize_eq_capBits\n\n(* FIXME: move *)\nlemma corres_whenE_throw_merge:\n \"corres r P P' f (doE _ \\ whenE (A \\ B) (throwError e); h odE)\n \\ corres r P P' f (doE _ \\ whenE A (throwError e); _ \\ whenE B (throwError e); h odE)\"\n by (auto simp: whenE_def split: if_splits)\n\nlemma decodeUntypedInvocation_corres:\n assumes cap_rel: \"list_all2 cap_relation cs cs'\"\n shows \"corres\n (ser \\ untypinv_relation)\n (invs and cte_wp_at ((=) (cap.UntypedCap d w n idx)) slot and (\\s. \\x \\ set cs. s \\ x))\n (invs'\n and (\\s. \\x \\ set cs'. s \\' x))\n (decode_untyped_invocation label args slot (cap.UntypedCap d w n idx) cs)\n (decodeUntypedInvocation label args (cte_map slot)\n (capability.UntypedCap d w n idx) cs')\"\nproof (cases \"6 \\ length args \\ cs \\ []\n \\ gen_invocation_type label = UntypedRetype\")\n case False\n show ?thesis using False cap_rel\n apply (clarsimp simp: decode_untyped_invocation_def\n decodeUntypedInvocation_def\n whenE_whenE_body unlessE_whenE\n split del: if_split cong: list.case_cong)\n apply (auto split: list.split)\n done\nnext\n case True\n have val_le_length_Cons: (* clagged from Tcb_R *)\n \"\\n xs. n \\ 0 \\ (n \\ length xs) = (\\y ys. xs = y # ys \\ (n - 1) \\ length ys)\"\n apply (case_tac xs, simp_all)\n apply (case_tac n, simp_all)\n done\n\n obtain arg0 arg1 arg2 arg3 arg4 arg5 argsmore cap cap' csmore csmore'\n where args: \"args = arg0 # arg1 # arg2 # arg3 # arg4 # arg5 # argsmore\"\n and cs: \"cs = cap # csmore\"\n and cs': \"cs' = cap' # csmore'\"\n and crel: \"cap_relation cap cap'\"\n using True cap_rel\n by (clarsimp simp: neq_Nil_conv list_all2_Cons1 val_le_length_Cons)\n\n have il: \"gen_invocation_type label = UntypedRetype\"\n using True by simp\n\n have word_unat_power2:\n \"\\bits. \\ bits < 64 \\ bits < word_bits \\ \\ unat (2 ^ bits :: machine_word) = 2 ^ bits\"\n by (simp add: word_bits_def)\n\n have P: \"\\P. corres (ser \\ dc) \\ \\\n (whenE P (throwError ExceptionTypes_A.syscall_error.TruncatedMessage))\n (whenE P (throwError Fault_H.syscall_error.TruncatedMessage))\"\n by (simp add: whenE_def returnOk_def)\n have Q: \"\\v. corres (ser \\ (\\a b. APIType_map2 (Inr (toEnum (unat v))) = a)) \\ \\\n (data_to_obj_type v)\n (whenE (fromEnum (maxBound :: X64_H.object_type) < unat v)\n (throwError (Fault_H.syscall_error.InvalidArgument 0)))\"\n apply (simp only: data_to_obj_type_def returnOk_bindE fun_app_def)\n apply (simp add: maxBound_def enum_apiobject_type\n fromEnum_def whenE_def)\n apply (simp add: returnOk_def APIType_map2_def toEnum_def\n enum_apiobject_type enum_object_type)\n apply (intro conjI impI)\n apply (subgoal_tac \"unat v - 5 > 6\")\n apply (simp add: arch_data_to_obj_type_def)\n apply simp\n apply (subgoal_tac \"\\n. unat v = n + 5\")\n apply (clarsimp simp: arch_data_to_obj_type_def returnOk_def)\n apply (rule_tac x=\"unat v - 5\" in exI)\n apply arith\n done\n have S: \"\\x (y :: ('g :: len) word) (z :: 'g word) bits. \\ bits < len_of TYPE('g); x < 2 ^ bits \\ \\ toEnum x = (of_nat x :: 'g word)\"\n apply (rule toEnum_of_nat)\n apply (erule order_less_trans)\n apply simp\n done\n obtain xs where xs: \"xs = [unat arg4..ref bits.\n \\ is_aligned ref bits;\n Suc (unat arg4 + unat arg5 - Suc 0) \\ 2 ^ bits;\n bits < 64; 1 \\ arg4 + arg5;\n arg4 \\ arg4 + arg5 \\ \\\n (map (\\x. ref + 2 ^ cte_level_bits * x) [arg4 .e. arg4 + arg5 - 1])\n = map cte_map\n (map (Pair ref)\n (map (nat_to_cref bits) xs))\"\n apply (subgoal_tac \"Suc (unat (arg4 + arg5 - 1)) = unat arg4 + unat arg5\")\n apply (simp add: upto_enum_def xs del: upt.simps)\n apply (clarsimp simp: cte_map_def)\n apply (subst of_bl_nat_to_cref)\n apply simp\n apply (simp add: word_bits_def)\n apply (subst S)\n apply simp\n apply simp\n apply (simp add: cte_level_bits_def)\n apply unat_arith\n done\n have another:\n \"\\bits a. \\ (a::machine_word) \\ 2 ^ bits; bits < word_bits\\\n \\ 2 ^ bits - a = of_nat (2 ^ bits - unat a)\"\n apply (subst of_nat_diff)\n apply (subst (asm) word_le_nat_alt)\n apply (simp add: word_unat_power2)\n apply simp\n done\n have ty_size:\n \"\\x y. (obj_bits_api (APIType_map2 (Inr x)) y) = (Types_H.getObjectSize x y)\"\n apply (clarsimp simp:obj_bits_api_def APIType_map2_def getObjectSize_def simp del: APIType_capBits)\n apply (case_tac x)\n apply (simp_all add:arch_kobj_size_def default_arch_object_def\n pageBits_def pdBits_def ptBits_def)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type)\n apply (simp_all add:apiGetObjectSize_def tcbBlockSizeBits_def epSizeBits_def\n ntfnSizeBits_def slot_bits_def cteSizeBits_def bit_simps)\n done\n obtain if_res where if_res_def: \"\\reset. if_res reset = (if reset then 0 else idx)\"\n by auto\n have if_res_2n:\n \"\\d res. (\\s. s \\ cap.UntypedCap d w n idx) \\ if_res res \\ 2 ^ n\"\n by (simp add: if_res_def valid_cap_def)\n\n note word_unat_power [symmetric, simp del]\n show ?thesis\n apply (rule corres_name_pre)\n apply clarsimp\n apply (subgoal_tac \"cte_wp_at' (\\cte. cteCap cte = (capability.UntypedCap d w n idx)) (cte_map slot) s'\")\n prefer 2\n apply (drule state_relation_pspace_relation)\n apply (case_tac slot)\n apply simp\n apply (drule(1) pspace_relation_cte_wp_at)\n apply fastforce+\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply (frule caps_of_state_valid_cap[unfolded valid_cap_def])\n apply fastforce\n apply (clarsimp simp:cap_aligned_def)\n(* ugh yuck. who likes a word proof? furthermore, some more restriction of\n the returnOk_bindE stuff needs to be done in order to give you a single\n target to do the word proof against or else it needs repeating. ugh.\n maybe could seperate out the equality Isar-style? *)\n apply (simp add: decodeUntypedInvocation_def decode_untyped_invocation_def\n args cs cs' xs[symmetric] il whenE_rangeCheck_eq\n cap_case_CNodeCap unlessE_whenE case_bool_If lookupTargetSlot_def\n untypedBits_defs untyped_min_bits_def untyped_max_bits_def\n del: upt.simps\n split del: if_split\n cong: if_cong list.case_cong)\n apply (rule corres_guard_imp)\n apply (rule corres_splitEE[OF Q])\n apply (rule corres_whenE_throw_merge)\n apply (rule whenE_throwError_corres)\n apply (simp add: word_bits_def word_size)\n apply (clarsimp simp: word_size word_bits_def fromIntegral_def ty_size\n toInteger_nat fromInteger_nat wordBits_def)\n apply (simp add: not_le)\n apply (rule whenE_throwError_corres, simp)\n apply (clarsimp simp: fromAPIType_def X64_H.fromAPIType_def)\n apply (rule whenE_throwError_corres, simp)\n apply (clarsimp simp: fromAPIType_def X64_H.fromAPIType_def)\n apply (rule_tac r' = \"\\cap cap'. cap_relation cap cap'\"\n in corres_splitEE[OF corres_if])\n apply simp\n apply (rule corres_returnOkTT)\n apply (rule crel)\n apply simp\n apply (rule corres_splitEE[OF lookupSlotForCNodeOp_corres])\n apply (rule crel)\n apply simp\n apply simp\n apply (rule getSlotCap_corres,simp)\n apply wp+\n apply (rule_tac corres_split_norE)\n apply (rule corres_if)\n apply simp\n apply (rule corres_returnOkTT, simp)\n apply (rule corres_trivial)\n apply (clarsimp simp: fromAPIType_def lookup_failure_map_def)\n apply (rule_tac F=\"is_cnode_cap rva \\ cap_aligned rva\" in corres_gen_asm)\n apply (subgoal_tac \"is_aligned (obj_ref_of rva) (bits_of rva) \\ bits_of rva < 64\")\n prefer 2\n apply (clarsimp simp: is_cap_simps bits_of_def cap_aligned_def word_bits_def\n is_aligned_weaken)\n apply (rule whenE_throwError_corres)\n apply (clarsimp simp:Kernel_Config.retypeFanOutLimit_def is_cap_simps bits_of_def)+\n apply (simp add: unat_arith_simps(2) unat_2p_sub_1 word_bits_def)\n apply (rule whenE_throwError_corres)\n apply (clarsimp simp:Kernel_Config.retypeFanOutLimit_def is_cap_simps bits_of_def)+\n apply (simp add: unat_eq_0 word_less_nat_alt)\n apply (rule whenE_throwError_corres)\n apply (clarsimp simp:Kernel_Config.retypeFanOutLimit_def is_cap_simps bits_of_def)+\n apply (clarsimp simp:toInteger_word unat_arith_simps(2) cap_aligned_def)\n apply (subst unat_sub)\n apply (simp add: linorder_not_less word_le_nat_alt)\n apply (fold neq0_conv)\n apply (simp add: unat_eq_0 cap_aligned_def)\n apply (clarsimp simp:fromAPIType_def)\n apply (clarsimp simp:liftE_bindE mapM_locate_eq)\n apply (subgoal_tac \"unat (arg4 + arg5) = unat arg4 + unat arg5\")\n prefer 2\n apply (clarsimp simp:not_less)\n apply (subst unat_word_ariths(1))\n apply (rule mod_less)\n apply (unfold word_bits_len_of)[1]\n apply (subgoal_tac \"2 ^ bits_of rva < (2 :: nat) ^ word_bits\")\n apply arith\n apply (rule power_strict_increasing, simp add: word_bits_conv)\n apply simp\n apply (rule_tac P'=\"valid_cap rva\" in corres_stateAssert_implied)\n apply (frule_tac bits2 = \"bits_of rva\" in YUCK)\n apply (simp)\n apply (simp add: word_bits_conv)\n apply (simp add: word_le_nat_alt)\n apply (simp add: word_le_nat_alt)\n apply (simp add:liftE_bindE[symmetric] free_index_of_def)\n apply (rule corres_split_norE)\n apply (clarsimp simp:is_cap_simps simp del:ser_def)\n apply (simp add: mapME_x_map_simp del: ser_def)\n apply (rule_tac P = \"valid_cap (cap.CNodeCap r bits g) and invs\" in corres_guard_imp [where P' = invs'])\n apply (rule mapME_x_corres_inv [OF _ _ _ refl])\n apply (simp del: ser_def)\n apply (rule ensureEmptySlot_corres)\n apply (clarsimp simp: is_cap_simps)\n apply (simp, wp)\n apply (simp, wp)\n apply clarsimp\n apply (clarsimp simp add: xs is_cap_simps bits_of_def valid_cap_def)\n apply (erule cap_table_at_cte_at)\n apply (simp add: nat_to_cref_def word_bits_conv)\n apply simp\n apply (subst liftE_bindE)+\n apply (rule corres_split_eqr[OF corres_check_no_children])\n apply (simp only: free_index_of_def cap.simps if_res_def[symmetric])\n apply (rule_tac F=\"if_res reset \\ 2 ^ n\" in corres_gen_asm)\n apply (rule whenE_throwError_corres)\n apply (clarsimp simp:shiftL_nat word_less_nat_alt shiftr_div_2n'\n split del: if_split)+\n apply (simp add: word_of_nat_le another)\n apply (drule_tac x = \"if_res reset\" in unat_of_nat64[OF le_less_trans])\n apply (simp add:ty_size shiftR_nat)+\n apply (simp add:unat_of_nat64 le_less_trans[OF div_le_dividend]\n le_less_trans[OF diff_le_self])\n apply (rule whenE_throwError_corres)\n apply (clarsimp)\n apply (clarsimp simp: fromAPIType_def)\n apply (rule corres_returnOkTT)\n apply (clarsimp simp:ty_size getFreeRef_def get_free_ref_def is_cap_simps)\n apply simp\n apply (strengthen if_res_2n, wp)\n apply simp\n apply wp\n apply (wp mapME_x_inv_wp\n validE_R_validE[OF valid_validE_R[OF ensure_empty_inv]]\n validE_R_validE[OF valid_validE_R[OF ensureEmpty_inv]])+\n apply (clarsimp simp: is_cap_simps valid_cap_simps\n cap_table_at_gsCNodes bits_of_def\n linorder_not_less)\n apply (erule order_le_less_trans)\n apply (rule word_leq_le_minus_one)\n apply (simp add: word_le_nat_alt)\n apply (simp add: unat_arith_simps)\n apply wp+\n apply clarsimp\n apply (rule hoare_strengthen_post [where Q = \"\\r. invs and valid_cap r and cte_at slot\"])\n apply wp+\n apply (clarsimp simp: is_cap_simps bits_of_def cap_aligned_def\n valid_cap_def word_bits_def)\n apply (frule caps_of_state_valid_cap, clarsimp+)\n apply (strengthen refl exI[mk_strg I E] exI[where x=d])+\n apply simp\n apply wp+\n apply (rule hoare_strengthen_post [where Q = \"\\r. invs' and cte_at' (cte_map slot)\"])\n apply wp+\n apply (clarsimp simp:invs_pspace_aligned' invs_pspace_distinct')\n apply (wp whenE_throwError_wp | wp (once) hoare_drop_imps)+\n apply (clarsimp simp: invs_valid_objs' invs_pspace_aligned' invs_pspace_distinct'\n cte_wp_at_caps_of_state cte_wp_at_ctes_of )\n apply (clarsimp simp: invs_valid_objs invs_psp_aligned)\n apply (frule caps_of_state_valid_cap, clarsimp+)\n apply (strengthen refl[where t=True] refl exI[mk_strg I E] exI[where x=d])+\n apply (clarsimp simp: is_cap_simps valid_cap_def bits_of_def cap_aligned_def\n cte_level_bits_def word_bits_conv)\n apply (clarsimp simp: invs_valid_objs' invs_pspace_aligned' invs_pspace_distinct'\n cte_wp_at_caps_of_state cte_wp_at_ctes_of )\n done\nqed\n\nlemma decodeUntyped_inv[wp]:\n \"\\P\\ decodeUntypedInvocation label args slot\n (UntypedCap d w n idx) cs \\\\rv. P\\\"\n apply (simp add: decodeUntypedInvocation_def whenE_def\n split_def unlessE_def Let_def\n split del: if_split cong: if_cong list.case_cong)\n apply (rule hoare_pre)\n apply (wp mapME_x_inv_wp hoare_drop_imps constOnFailure_wp\n mapM_wp'\n | wpcw\n | simp add: lookupTargetSlot_def locateSlot_conv)+\n done\n\ndeclare inj_Pair[simp]\n\ndeclare upt_Suc[simp del]\n\nlemma descendants_of_cte_at':\n \"\\p \\ descendants_of' x (ctes_of s); valid_mdb' s\\\n \\ cte_wp_at' (\\_. True) p s\"\n by (clarsimp simp:descendants_of'_def cte_wp_at_ctes_of\n dest!:subtree_target_Some)\n\nlemma ctes_of_ko:\n \"valid_cap' cap s \\\n isUntypedCap cap \\\n (\\ptr\\capRange cap. \\optr ko. ksPSpace s optr = Some ko \\\n ptr \\ obj_range' optr ko)\"\n apply (case_tac cap)\n \\ \\TCB case\\\n apply (simp_all add: isCap_simps capRange_def)\n apply (clarsimp simp: valid_cap'_def obj_at'_def)\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: projectKO_eq objBits_def obj_range'_def\n dest!: projectKO_opt_tcbD simp: objBitsKO_def)\n \\ \\NTFN case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def)\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: projectKO_eq objBits_def\n obj_range'_def projectKO_ntfn objBitsKO_def)\n \\ \\EP case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def)\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: projectKO_eq objBits_def\n obj_range'_def projectKO_ep objBitsKO_def)\n \\ \\Zombie case\\\n apply (rename_tac word zombie_type nat)\n apply (case_tac zombie_type)\n apply (clarsimp simp: valid_cap'_def obj_at'_def)\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: projectKO_eq objBits_simps' obj_range'_def dest!: projectKO_opt_tcbD)\n apply (clarsimp simp: valid_cap'_def obj_at'_def capAligned_def\n objBits_simps' projectKOs)\n apply (frule_tac ptr=ptr and sz=cte_level_bits\n in nasty_range [where 'a=machine_word_len, folded word_bits_def])\n apply (simp add: cte_level_bits_def)+\n apply clarsimp\n apply (drule_tac x=idx in spec)\n apply (clarsimp simp: less_mask_eq)\n apply (fastforce simp: obj_range'_def projectKOs objBits_simps' field_simps)[1]\n \\ \\Arch cases\\\n apply (rename_tac arch_capability)\n apply (case_tac arch_capability)\n \\ \\ASID case\\\n apply (clarsimp simp: valid_cap'_def typ_at'_def ko_wp_at'_def)\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: obj_range'_def archObjSize_def objBitsKO_def)\n apply (case_tac ko, simp+)[1]\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object;\n simp add: archObjSize_def asid_low_bits_def pageBits_def bit_simps)\n apply simp\n \\ \\IOPort case\\\n apply clarsimp\n \\ \\IOPortControl case\\\n apply clarsimp\n \\ \\Page case\\\n apply (rename_tac word vmrights vmpage_size option)\n apply (clarsimp simp: valid_cap'_def typ_at'_def ko_wp_at'_def capAligned_def)\n apply (frule_tac ptr = ptr and sz = \"pageBits\" in nasty_range [where 'a=machine_word_len, folded word_bits_def])\n apply assumption\n apply (simp add: pbfs_atleast_pageBits)+\n apply (clarsimp,drule_tac x = idx in spec,clarsimp)\n apply (intro exI conjI,assumption)\n apply (clarsimp simp: obj_range'_def)\n apply (case_tac ko, simp_all split: if_splits,\n (simp add: objBitsKO_def archObjSize_def field_simps shiftl_t2n)+)[1]\n \\ \\PT case\\\n apply (rename_tac word option)\n apply (clarsimp simp: valid_cap'_def obj_at'_def pageBits_def bit_simps\n page_table_at'_def typ_at'_def ko_wp_at'_def ptBits_def)\n apply (frule_tac ptr=ptr and sz=3 in\n nasty_range[where 'a=machine_word_len and bz=\"ptBits\", folded word_bits_def,\n simplified ptBits_def pageBits_def word_bits_def bit_simps, simplified])\n apply simp\n apply simp\n apply clarsimp\n apply (drule_tac x=idx in spec)\n apply clarsimp\n apply (intro exI conjI,assumption)\n apply (clarsimp simp: obj_range'_def)\n apply (case_tac ko; simp)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object; simp)\n apply (simp add: objBitsKO_def archObjSize_def field_simps shiftl_t2n)\n \\ \\PD case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def pageBits_def pdBits_def bit_simps\n page_directory_at'_def typ_at'_def ko_wp_at'_def)\n apply (frule_tac ptr=ptr and sz=3 in\n nasty_range[where 'a=machine_word_len and bz=\"pdBits\", folded word_bits_def,\n simplified pdBits_def pageBits_def word_bits_def bit_simps, simplified])\n apply simp\n apply simp\n apply clarsimp\n apply (drule_tac x=\"idx\" in spec)\n apply clarsimp\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: obj_range'_def objBitsKO_def field_simps)\n apply (case_tac ko; simp)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object; simp)\n apply (simp add: field_simps archObjSize_def shiftl_t2n)\n \\ \\PDPT case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def pageBits_def pdptBits_def bit_simps\n pd_pointer_table_at'_def typ_at'_def ko_wp_at'_def)\n apply (frule_tac ptr=ptr and sz=3 in\n nasty_range[where 'a=machine_word_len and bz=\"pdptBits\", folded word_bits_def,\n simplified pdptBits_def pageBits_def word_bits_def bit_simps, simplified])\n apply simp\n apply simp\n apply clarsimp\n apply (drule_tac x=\"idx\" in spec)\n apply clarsimp\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: obj_range'_def objBitsKO_def field_simps)\n apply (case_tac ko; simp)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object; simp)\n apply (simp add: field_simps archObjSize_def shiftl_t2n)\n \\ \\PML4 case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def pageBits_def pml4Bits_def bit_simps\n page_map_l4_at'_def typ_at'_def ko_wp_at'_def)\n apply (frule_tac ptr=ptr and sz=3 in\n nasty_range[where 'a=machine_word_len and bz=\"pml4Bits\", folded word_bits_def,\n simplified pml4Bits_def pageBits_def word_bits_def bit_simps, simplified])\n apply simp\n apply simp\n apply clarsimp\n apply (drule_tac x=\"idx\" in spec)\n apply clarsimp\n apply (intro exI conjI, assumption)\n apply (clarsimp simp: obj_range'_def objBitsKO_def field_simps)\n apply (case_tac ko; simp)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object; simp)\n apply (simp add: field_simps archObjSize_def shiftl_t2n)\n \\ \\CNode case\\\n apply (clarsimp simp: valid_cap'_def obj_at'_def capAligned_def\n objBits_simps projectKOs)\n apply (frule_tac ptr=ptr and sz=cte_level_bits\n in nasty_range [where 'a=machine_word_len, folded word_bits_def])\n apply (simp add: cte_level_bits_def objBits_defs)+\n apply clarsimp\n apply (drule_tac x=idx in spec)\n apply (clarsimp simp: less_mask_eq)\n apply (fastforce simp: obj_range'_def projectKOs objBits_simps' field_simps)[1]\n done\n\nlemma untypedCap_descendants_range':\n \"\\valid_pspace' s; (ctes_of s) p = Some cte;\n isUntypedCap (cteCap cte);valid_mdb' s;\n q \\ descendants_of' p (ctes_of s)\\\n \\ cte_wp_at' (\\c. (capRange (cteCap c) \\\n usableUntypedRange (cteCap cte) = {})) q s\"\n apply (clarsimp simp: valid_pspace'_def)\n apply (frule(1) descendants_of_cte_at')\n apply (clarsimp simp:cte_wp_at_ctes_of)\n apply (clarsimp simp:valid_mdb'_def)\n apply (frule valid_mdb_no_loops)\n apply (case_tac \"isUntypedCap (cteCap ctea)\")\n apply (case_tac ctea)\n apply (rename_tac cap node)\n apply (case_tac cte)\n apply (rename_tac cap' node')\n apply clarsimp\n apply (frule(1) valid_capAligned[OF ctes_of_valid_cap'])\n apply (frule_tac c = cap in valid_capAligned[OF ctes_of_valid_cap'])\n apply (simp add:untypedCapRange)+\n apply (frule_tac c = cap' in aligned_untypedRange_non_empty)\n apply simp\n apply (frule_tac c = cap in aligned_untypedRange_non_empty)\n apply simp\n apply (clarsimp simp:valid_mdb'_def valid_mdb_ctes_def)\n apply (drule untyped_incD')\n apply simp+\n apply clarify\n apply (erule subset_splitE)\n apply simp\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (elim conjE)\n apply (simp add:descendants_of'_def)\n apply (drule(1) subtree_trans)\n apply (simp add:no_loops_no_subtree)\n apply simp\n apply (clarsimp simp:descendants_of'_def | erule disjE)+\n apply (drule(1) subtree_trans)\n apply (simp add:no_loops_no_subtree)+\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (erule(1) disjoint_subset2[OF usableRange_subseteq])\n apply (simp add:Int_ac)\n apply (case_tac ctea)\n apply (rename_tac cap node)\n apply (case_tac cte)\n apply clarsimp\n apply (drule(1) ctes_of_valid_cap')+\n apply (frule_tac cap = cap in ctes_of_ko)\n apply (elim disjE)\n apply clarsimp+\n apply (thin_tac \"s \\' cap\")\n apply (clarsimp simp: valid_cap'_def isCap_simps valid_untyped'_def\n simp del: usableUntypedRange.simps untypedRange.simps)\n apply (thin_tac \"\\x y z. P x y z\" for P)\n apply (rule ccontr)\n apply (clarsimp dest!: int_not_emptyD\n simp del: usableUntypedRange.simps untypedRange.simps)\n apply (drule(1) bspec)\n apply (clarsimp simp: ko_wp_at'_def simp del: usableUntypedRange.simps untypedRange.simps)\n apply (drule_tac x = optr in spec)\n apply (clarsimp simp: ko_wp_at'_def simp del: usableUntypedRange.simps untypedRange.simps)\n apply (frule(1) pspace_alignedD')\n apply (frule(1) pspace_distinctD')\n apply (erule(1) impE)\n apply (clarsimp simp del: usableUntypedRange.simps untypedRange.simps)\n apply blast\n done\n\nlemma cte_wp_at_caps_descendants_range_inI':\n \"\\invs' s; cte_wp_at' (\\c. (cteCap c) = capability.UntypedCap\n d (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz); sz < word_bits\\\n \\ descendants_range_in' {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\n cref (ctes_of s)\"\n apply (frule invs_mdb')\n apply (frule(1) le_mask_le_2p)\n apply (clarsimp simp: descendants_range_in'_def cte_wp_at_ctes_of)\n apply (drule untypedCap_descendants_range'[rotated])\n apply (simp add: isCap_simps)+\n apply (simp add: invs_valid_pspace')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (erule disjoint_subset2[rotated])\n apply clarsimp\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n done\n\nlemma checkFreeIndex_wp:\n \"\\\\s. if descendants_of' slot (ctes_of s) = {} then Q y s else Q x s\\\n constOnFailure x (doE z \\ ensureNoChildren slot; returnOk y odE)\n \\Q\\\"\n apply (clarsimp simp:constOnFailure_def const_def)\n apply (wp ensureNoChildren_wp)\n apply simp\n done\n\ndeclare upt_Suc[simp]\n\nlemma ensureNoChildren_sp:\n \"\\P\\ ensureNoChildren sl \\\\rv s. P s \\ descendants_of' sl (ctes_of s) = {}\\,-\"\n by (wp ensureNoChildren_wp, simp)\n\ndeclare isPML4Cap'_PML4 [simp]\n\nlemma dui_sp_helper':\n \"\\P\\ if Q then returnOk root_cap\n else doE slot \\\n lookupTargetSlot root_cap cref dpth;\n liftE (getSlotCap slot)\n odE \\\\rv s. (rv = root_cap \\ (\\slot. cte_wp_at' ((=) rv o cteCap) slot s)) \\ P s\\, -\"\n apply (cases Q, simp_all add: lookupTargetSlot_def)\n apply (wp, simp)\n apply (simp add: getSlotCap_def split_def)\n apply wp\n apply (rule hoare_strengthen_post [OF getCTE_sp[where P=P]])\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (elim allE, drule(1) mp)\n apply simp\n apply wpsimp\n apply simp\n done\n\nlemma map_ensure_empty':\n \"\\\\s. (\\slot \\ set slots. cte_wp_at' (\\cte. cteCap cte = NullCap) slot s) \\ P s\\\n mapME_x ensureEmptySlot slots\n \\\\rv s. P s \\,-\"\n apply (induct slots arbitrary: P)\n apply (simp add: mapME_x_def sequenceE_x_def)\n apply wp\n apply (simp add: mapME_x_def sequenceE_x_def)\n apply (rule_tac Q=\"\\rv s. (\\slot\\set slots. cte_wp_at' (\\cte. cteCap cte = capability.NullCap) slot s) \\ P s\"\n in validE_R_sp)\n apply (simp add: ensureEmptySlot_def unlessE_def)\n apply (wp getCTE_wp')\n apply (clarsimp elim!: cte_wp_at_weakenE')\n apply (erule meta_allE)\n apply (erule hoare_post_imp_R)\n apply clarsimp\n done\n\nlemma irq_nodes_global:\n \"irq_node' s + (ucast (irq :: 8 word)) * 32 \\ global_refs' s\"\n by (simp add: global_refs'_def mult.commute mult.left_commute)\n\nlemma valid_global_refsD2':\n \"\\ctes_of s p = Some cte; valid_global_refs' s\\ \\\n global_refs' s \\ capRange (cteCap cte) = {}\"\n by (blast dest: valid_global_refsD')\n\nlemma cte_cap_in_untyped_range:\n \"\\ ptr \\ x; x \\ ptr + 2 ^ bits - 1; cte_wp_at' (\\cte. cteCap cte = UntypedCap d ptr bits idx) cref s;\n descendants_of' cref (ctes_of s) = {}; invs' s;\n ex_cte_cap_to' x s; valid_global_refs' s \\ \\ False\"\n apply (clarsimp simp: ex_cte_cap_to'_def cte_wp_at_ctes_of)\n apply (case_tac ctea, simp)\n apply (rename_tac cap node)\n apply (frule ctes_of_valid_cap', clarsimp)\n apply (case_tac \"\\irq. cap = IRQHandlerCap irq\")\n apply (drule (1) equals0D[where a=x, OF valid_global_refsD2'[where p=cref]])\n apply (clarsimp simp: irq_nodes_global)\n apply (frule_tac p=crefa and p'=cref in caps_containedD', assumption)\n apply (clarsimp dest!: isCapDs)\n apply (rule_tac x=x in notemptyI)\n apply (simp add: subsetD [OF cte_refs_capRange])\n apply (clarsimp simp: invs'_def valid_state'_def valid_pspace'_def valid_mdb'_def valid_mdb_ctes_def)\n apply (frule_tac p=cref and p'=crefa in untyped_mdbD', assumption)\n apply (simp_all add: isUntypedCap_def)\n apply (frule valid_capAligned)\n apply (frule capAligned_capUntypedPtr)\n apply (case_tac cap; simp)\n apply blast\n apply (case_tac cap; simp)\n apply (clarsimp simp: invs'_def valid_state'_def valid_pspace'_def valid_mdb'_def valid_mdb_ctes_def)\n done\n\nlemma cap_case_CNodeCap_True_throw:\n \"(case cap of CNodeCap a b c d \\ returnOk ()\n | _ \\ throw $ e)\n = (whenE (\\isCNodeCap cap) (throwError e))\"\n by (simp split: capability.split bool.split\n add: whenE_def isCNodeCap_def)\n\nlemma empty_descendants_range_in':\n \"\\descendants_of' slot m = {}\\ \\ descendants_range_in' S slot m \"\n by (clarsimp simp:descendants_range_in'_def)\n\nlemma liftE_validE_R:\n \"\\P\\ f \\Q\\ \\ \\P\\ liftE f \\Q\\,-\"\n by wpsimp\n\nlemma decodeUntyped_wf[wp]:\n \"\\invs' and cte_wp_at' (\\cte. cteCap cte = UntypedCap d w sz idx) slot\n and sch_act_simple\n and (\\s. \\x \\ set cs. s \\' x)\n and (\\s. \\x \\ set cs. \\r \\ cte_refs' x (irq_node' s). ex_cte_cap_to' r s)\\\n decodeUntypedInvocation label args slot\n (UntypedCap d w sz idx) cs\n \\valid_untyped_inv'\\,-\"\n unfolding decodeUntypedInvocation_def\n apply (simp add: unlessE_def[symmetric] unlessE_whenE rangeCheck_def whenE_def[symmetric]\n returnOk_liftE[symmetric] Let_def cap_case_CNodeCap_True_throw\n split del: if_split cong: if_cong list.case_cong)\n apply (rule list_case_throw_validE_R)\n apply (clarsimp split del: if_split split: list.splits)\n apply (intro conjI impI allI)\n apply (wp+)[6]\n apply (clarsimp split del: if_split)\n apply (rename_tac ty us nodeIndexW nodeDepthW nodeOffset nodeWindow rootCap cs' xs')\n apply (rule validE_R_sp[OF map_ensure_empty'] validE_R_sp[OF whenE_throwError_sp]\n validE_R_sp[OF dui_sp_helper'])+\n apply (case_tac \"\\ isCNodeCap nodeCap\")\n apply (simp add: validE_R_def)\n apply (simp add: mapM_locate_eq bind_liftE_distrib bindE_assoc returnOk_liftE[symmetric])\n apply (rule validE_R_sp, rule liftE_validE_R, rule stateAssert_sp)\n apply (rule hoare_pre, wp whenE_throwError_wp checkFreeIndex_wp map_ensure_empty')\n apply (clarsimp simp:cte_wp_at_ctes_of not_less shiftL_nat)\n apply (case_tac cte)\n apply clarsimp\n apply (frule(1) valid_capAligned[OF ctes_of_valid_cap'[OF _ invs_valid_objs']])\n apply (clarsimp simp:capAligned_def)\n apply (subgoal_tac \"idx \\ 2^ sz\")\n prefer 2\n apply (frule(1) ctes_of_valid_cap'[OF _ invs_valid_objs'])\n apply (clarsimp simp:valid_cap'_def valid_untyped_def)\n apply (subgoal_tac \"(2 ^ sz - idx) < 2^ word_bits\")\n prefer 2\n apply (rule le_less_trans[where y = \"2^sz\"])\n apply simp+\n apply (subgoal_tac \"of_nat (2 ^ sz - idx) = (2::machine_word)^sz - of_nat idx\")\n prefer 2\n apply (simp add:word_of_nat_minus)\n apply (subgoal_tac \"valid_cap' nodeCap s\")\n prefer 2\n apply (erule disjE)\n apply (fastforce dest: cte_wp_at_valid_objs_valid_cap')\n apply clarsimp\n apply (case_tac cte)\n apply clarsimp\n apply (drule(1) ctes_of_valid_cap'[OF _ invs_valid_objs'])+\n apply simp\n apply (clarsimp simp: toEnum_of_nat [OF less_Suc_unat_less_bound])\n apply (subgoal_tac \"args ! 4 \\ 2 ^ capCNodeBits nodeCap\")\n prefer 2\n apply (clarsimp simp: isCap_simps)\n apply (subst (asm) le_m1_iff_lt[THEN iffD1])\n apply (clarsimp simp:valid_cap'_def isCap_simps p2_gt_0 capAligned_def word_bits_def)\n apply (rule less_imp_le)\n apply simp\n apply (subgoal_tac\n \"distinct (map (\\y. capCNodePtr nodeCap + y * 2^cte_level_bits) [args ! 4 .e. args ! 4 + args ! 5 - 1])\")\n prefer 2\n apply (simp add: distinct_map upto_enum_def del: upt_Suc)\n apply (rule comp_inj_on)\n apply (rule inj_onI)\n apply (clarsimp dest!: less_Suc_unat_less_bound)\n apply (erule word_unat.Abs_eqD)\n apply (simp add: unats_def)\n apply (simp add: unats_def)\n apply (rule inj_onI)\n apply (clarsimp simp: toEnum_of_nat[OF less_Suc_unat_less_bound] ucast_id isCap_simps)\n apply (erule(2) inj_bits, simp add: cte_level_bits_def word_bits_def)\n apply (subst Suc_unat_diff_1)\n apply (rule word_le_plus_either,simp)\n apply (subst olen_add_eqv)\n apply (subst add.commute)\n apply (erule(1) plus_minus_no_overflow_ab)\n apply (drule(1) le_plus)\n apply (rule unat_le_helper)\n apply (erule order_trans)\n apply (subst unat_power_lower64[symmetric], simp add: word_bits_def cte_level_bits_def)\n apply (simp add: word_less_nat_alt[symmetric])\n apply (rule two_power_increasing)\n apply (clarsimp dest!: valid_capAligned\n simp: capAligned_def objBits_def objBitsKO_def)\n apply (simp_all add: word_bits_def cte_level_bits_def objBits_defs)[2]\n apply (clarsimp simp: X64_H.fromAPIType_def)\n apply (subgoal_tac \"Suc (unat (args ! 4 + args ! 5 - 1)) = unat (args ! 4) + unat (args ! 5)\")\n prefer 2\n apply simp\n apply (subst Suc_unat_diff_1)\n apply (rule word_le_plus_either,simp)\n apply (subst olen_add_eqv)\n apply (subst add.commute)\n apply (erule(1) plus_minus_no_overflow_ab)\n apply (rule unat_plus_simple[THEN iffD1])\n apply (subst olen_add_eqv)\n apply (subst add.commute)\n apply (erule(1) plus_minus_no_overflow_ab)\n apply clarsimp\n apply (subgoal_tac \"(\\x. (args ! 4) \\ x \\ x \\ (args ! 4) + (args ! 5) - 1 \\\n ex_cte_cap_wp_to' (\\_. True) (capCNodePtr nodeCap + x * 2^cteSizeBits) s)\")\n prefer 2\n apply clarsimp\n apply (erule disjE)\n apply (erule bspec)\n apply (clarsimp simp:isCap_simps image_def)\n apply (rule_tac x = x in bexI,simp)\n apply simp\n apply (erule order_trans)\n apply (frule(1) le_plus)\n apply (rule word_l_diffs,simp+)\n apply (rule word_le_plus_either,simp)\n apply (subst olen_add_eqv)\n apply (subst add.commute)\n apply (erule(1) plus_minus_no_overflow_ab)\n apply (clarsimp simp:ex_cte_cap_wp_to'_def)\n apply (rule_tac x = nodeSlot in exI)\n apply (case_tac cte)\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps image_def)\n apply (rule_tac x = x in bexI,simp)\n apply simp\n apply (erule order_trans)\n apply (frule(1) le_plus)\n apply (rule word_l_diffs,simp+)\n apply (rule word_le_plus_either,simp)\n apply (subst olen_add_eqv)\n apply (subst add.commute)\n apply (erule(1) plus_minus_no_overflow_ab)\n apply (simp add: fromIntegral_def toInteger_nat fromInteger_nat)\n apply (rule conjI)\n apply (simp add: objBits_defs cte_level_bits_def)\n apply (clarsimp simp:of_nat_shiftR word_le_nat_alt)\n apply (frule_tac n = \"unat (args ! 5)\"\n and bits = \"(APIType_capBits (toEnum (unat (args ! 0))) (unat (args ! 1)))\"\n in range_cover_stuff[where rv = 0,rotated -1])\n apply (simp add:unat_1_0)\n apply simp\n apply (simp add:word_sub_le_iff word_of_nat_le)\n apply simp+\n apply (clarsimp simp:getFreeRef_def)\n apply (frule alignUp_idem[OF is_aligned_weaken,where a = w])\n apply (erule range_cover.sz)\n apply (simp add:range_cover_def)\n apply (simp add:empty_descendants_range_in' untypedBits_defs)\n apply (clarsimp simp: image_def isCap_simps nullPointer_def word_size field_simps)\n apply (intro conjI)\n apply (clarsimp simp: image_def isCap_simps nullPointer_def word_size field_simps)\n apply (drule_tac x=x in spec)+\n apply simp\n apply (clarsimp simp: APIType_capBits_def)\n apply clarsimp\n apply (clarsimp simp: image_def getFreeRef_def cte_level_bits_def objBits_simps' field_simps)\n apply (clarsimp simp: of_nat_shiftR word_le_nat_alt)\n apply (frule_tac n = \"unat (args ! 5)\"\n and bits = \"(APIType_capBits (toEnum (unat (args ! 0))) (unat (args ! 1)))\"\n in range_cover_stuff[where w=w and sz=sz and rv = idx,rotated -1]; simp?)\n apply (intro conjI; clarsimp simp add: image_def word_size)\n apply (clarsimp simp: image_def isCap_simps nullPointer_def word_size field_simps)\n apply (drule_tac x=x in spec)+\n apply simp\n apply (clarsimp simp: APIType_capBits_def)\n done\n\nlemma corres_list_all2_mapM_':\n assumes w: \"suffix xs oxs\" \"suffix ys oys\"\n assumes y: \"\\x xs y ys. \\ F x y; suffix (x # xs) oxs; suffix (y # ys) oys \\\n \\ corres dc (P (x # xs)) (P' (y # ys)) (f x) (g y)\"\n assumes z: \"\\x y xs. \\ F x y; suffix (x # xs) oxs \\ \\ \\P (x # xs)\\ f x \\\\rv. P xs\\\"\n \"\\x y ys. \\ F x y; suffix (y # ys) oys \\ \\ \\P' (y # ys)\\ g y \\\\rv. P' ys\\\"\n assumes x: \"list_all2 F xs ys\"\n shows \"corres dc (P xs) (P' ys) (mapM_x f xs) (mapM_x g ys)\"\n apply (insert x w)\n apply (induct xs arbitrary: ys)\n apply (simp add: mapM_x_def sequence_x_def)\n apply (case_tac ys)\n apply simp\n apply (clarsimp simp add: mapM_x_def sequence_x_def)\n apply (rule corres_guard_imp)\n apply (rule corres_split[OF y])\n apply assumption\n apply assumption\n apply assumption\n apply (clarsimp dest!: suffix_ConsD)\n apply (erule meta_allE, (drule(1) meta_mp)+)\n apply assumption\n apply (erule(1) z)+\n apply simp+\n done\n\nlemmas suffix_refl = suffix_order.refl\n\nlemmas corres_list_all2_mapM_\n = corres_list_all2_mapM_' [OF suffix_refl suffix_refl]\n\ndeclare modify_map_id[simp]\n\nlemma valid_mdbD3':\n \"\\ ctes_of s p = Some cte; valid_mdb' s \\ \\ p \\ 0\"\n by (clarsimp simp add: valid_mdb'_def valid_mdb_ctes_def no_0_def)\n\nlemma capRange_sameRegionAs:\n \"\\ sameRegionAs x y; s \\' y; capClass x = PhysicalClass \\ capClass y = PhysicalClass \\\n \\ capRange x \\ capRange y \\ {}\"\n apply (erule sameRegionAsE)\n apply (subgoal_tac \"capClass x = capClass y \\ capRange x = capRange y\")\n apply simp\n apply (drule valid_capAligned)\n apply (drule(1) capAligned_capUntypedPtr)\n apply clarsimp\n apply (rule conjI)\n apply (rule master_eqI, rule capClass_Master, simp)\n apply (rule master_eqI, rule capRange_Master, simp)\n apply blast\n apply blast\n apply (clarsimp simp: isCap_simps)+\n done\nend\n\nlocale mdb_insert_again =\n mdb_ptr_parent?: mdb_ptr m _ _ parent parent_cap parent_node +\n mdb_ptr_site?: mdb_ptr m _ _ site site_cap site_node\n for m parent parent_cap parent_node site site_cap site_node +\n\n fixes c'\n\n assumes site_cap: \"site_cap = NullCap\"\n assumes site_prev: \"mdbPrev site_node = 0\"\n assumes site_next: \"mdbNext site_node = 0\"\n\n assumes is_untyped: \"isUntypedCap parent_cap\"\n assumes same_region: \"sameRegionAs parent_cap c'\"\n\n assumes range: \"descendants_range' c' parent m\"\n assumes phys: \"capClass c' = PhysicalClass\"\n\n fixes s\n assumes valid_capI': \"m p = Some (CTE cap node) \\ s \\' cap\"\n\n assumes ut_rev: \"ut_revocable' m\"\n\n fixes n\n defines \"n \\\n (modify_map\n (\\x. if x = site\n then Some (CTE c' (MDB (mdbNext parent_node) parent True True))\n else m x)\n parent (cteMDBNode_update (mdbNext_update (\\x. site))))\"\n\n assumes neq: \"parent \\ site\"\n\ncontext mdb_insert_again\nbegin\ninterpretation Arch . (*FIXME: arch_split*)\nlemmas parent = mdb_ptr_parent.m_p\nlemmas site = mdb_ptr_site.m_p\n\nlemma next_wont_bite:\n \"\\ mdbNext parent_node \\ 0; m (mdbNext parent_node) = Some cte \\\n \\ \\ sameRegionAs c' (cteCap cte)\"\n using range ut_rev\n apply (cases cte)\n apply clarsimp\n apply (cases \"m \\ parent \\ mdbNext parent_node\")\n apply (drule (2) descendants_rangeD')\n apply (drule capRange_sameRegionAs)\n apply (erule valid_capI')\n apply (simp add: phys)\n apply blast\n apply (erule notE, rule direct_parent)\n apply (clarsimp simp: mdb_next_unfold parent)\n apply assumption\n apply (simp add: parentOf_def parent)\n apply (insert is_untyped same_region)\n apply (clarsimp simp: isMDBParentOf_CTE)\n apply (rule conjI)\n apply (erule (1) sameRegionAs_trans)\n apply (simp add: ut_revocable'_def)\n apply (insert parent)\n apply simp\n apply (clarsimp simp: isCap_simps)\n done\n\nlemma no_0_helper: \"no_0 m \\ no_0 n\"\n by (simp add: n_def, simp add: no_0_def)\n\nlemma no_0_n [intro!]: \"no_0 n\" by (auto intro: no_0_helper)\n\nlemmas n_0_simps [iff] = no_0_simps [OF no_0_n]\n\nlemmas neqs [simp] = neq neq [symmetric]\n\ndefinition\n \"new_site \\ CTE c' (MDB (mdbNext parent_node) parent True True)\"\n\ndefinition\n \"new_parent \\ CTE parent_cap (mdbNext_update (\\a. site) parent_node)\"\n\nlemma n: \"n = m (site \\ new_site, parent \\ new_parent)\"\n using parent site\n by (simp add: n_def modify_map_apply new_site_def new_parent_def\n fun_upd_def[symmetric])\n\nlemma site_no_parent [iff]:\n \"m \\ site \\ x = False\" using site site_next\n by (auto dest: subtree_next_0)\n\nlemma site_no_child [iff]:\n \"m \\ x \\ site = False\" using site site_prev\n by (auto dest: subtree_prev_0)\n\nlemma parent_next: \"m \\ parent \\ mdbNext parent_node\"\n by (simp add: parent mdb_next_unfold)\n\nlemma parent_next_rtrancl_conv [simp]:\n \"m \\ mdbNext parent_node \\\\<^sup>* site = m \\ parent \\\\<^sup>+ site\"\n apply (rule iffI)\n apply (insert parent_next)\n apply (fastforce dest: rtranclD)\n apply (drule tranclD)\n apply (clarsimp simp: mdb_next_unfold)\n done\n\nlemma site_no_next [iff]:\n \"m \\ x \\ site = False\" using site site_prev dlist\n apply clarsimp\n apply (simp add: mdb_next_unfold)\n apply (elim exE conjE)\n apply (case_tac z)\n apply simp\n apply (rule dlistEn [where p=x], assumption)\n apply clarsimp\n apply clarsimp\n done\n\nlemma site_no_next_trans [iff]:\n \"m \\ x \\\\<^sup>+ site = False\"\n by (clarsimp dest!: tranclD2)\n\nlemma site_no_prev [iff]:\n \"m \\ site \\ p = (p = 0)\" using site site_next\n by (simp add: mdb_next_unfold)\n\nlemma site_no_prev_trancl [iff]:\n \"m \\ site \\\\<^sup>+ p = (p = 0)\"\n apply (rule iffI)\n apply (drule tranclD)\n apply clarsimp\n apply simp\n apply (insert chain site)\n apply (simp add: mdb_chain_0_def)\n apply auto\n done\n\nlemma chain_n:\n \"mdb_chain_0 n\"\nproof -\n from chain\n have \"m \\ mdbNext parent_node \\\\<^sup>* 0\" using dlist parent\n apply (cases \"mdbNext parent_node = 0\")\n apply simp\n apply (erule dlistEn, simp)\n apply (auto simp: mdb_chain_0_def)\n done\n moreover\n have \"\\m \\ mdbNext parent_node \\\\<^sup>* parent\"\n using parent_next\n apply clarsimp\n apply (drule (1) rtrancl_into_trancl2)\n apply simp\n done\n moreover\n have \"\\ m \\ 0 \\\\<^sup>* site\" using no_0 site\n by (auto elim!: next_rtrancl_tranclE dest!: no_0_lhs_trancl)\n moreover\n have \"\\ m \\ 0 \\\\<^sup>* parent\" using no_0 parent\n by (auto elim!: next_rtrancl_tranclE dest!: no_0_lhs_trancl)\n moreover\n note chain\n ultimately show \"mdb_chain_0 n\" using no_0 parent site\n apply (simp add: n new_parent_def new_site_def)\n apply (auto intro!: mdb_chain_0_update no_0_update simp: next_update_lhs_rtrancl)\n done\nqed\n\nlemma no_loops_n: \"no_loops n\" using chain_n no_0_n\n by (rule mdb_chain_0_no_loops)\n\nlemma n_direct_eq:\n \"n \\ p \\ p' = (if p = parent then p' = site else\n if p = site then m \\ parent \\ p'\n else m \\ p \\ p')\"\n using parent site site_prev\n by (auto simp: mdb_next_update n new_parent_def new_site_def\n parent_next mdb_next_unfold)\n\nlemma next_not_parent:\n \"\\ mdbNext parent_node \\ 0; m (mdbNext parent_node) = Some cte \\\n \\ \\ isMDBParentOf new_site cte\"\n apply (drule(1) next_wont_bite)\n apply (cases cte)\n apply (simp add: isMDBParentOf_def new_site_def)\n done\n\n(* The newly inserted cap should never have children. *)\nlemma site_no_parent_n:\n \"n \\ site \\ p = False\" using parent valid_badges\n apply clarsimp\n apply (erule subtree.induct)\n prefer 2\n apply simp\n apply (clarsimp simp: parentOf_def mdb_next_unfold new_site_def n)\n apply (cases \"mdbNext parent_node = site\")\n apply (subgoal_tac \"m \\ parent \\ site\")\n apply simp\n apply (subst mdb_next_unfold)\n apply (simp add: parent)\n apply clarsimp\n apply (erule notE[rotated], erule(1) next_not_parent[unfolded new_site_def])\n done\n\nend\n\nlocale mdb_insert_again_child = mdb_insert_again +\n assumes child:\n \"isMDBParentOf\n (CTE parent_cap parent_node)\n (CTE c' (MDB (mdbNext parent_node) parent True True))\"\n\ncontext mdb_insert_again_child\nbegin\n\nlemma new_child [simp]:\n \"isMDBParentOf new_parent new_site\"\n by (simp add: new_parent_def new_site_def) (rule child)\n\nlemma n_site_child:\n \"n \\ parent \\ site\"\n apply (rule subtree.direct_parent)\n apply (simp add: n_direct_eq)\n apply simp\n apply (clarsimp simp: parentOf_def parent site n)\n done\n\nlemma parent_m_n:\n assumes \"m \\ p \\ p'\"\n shows \"if p' = parent then n \\ p \\ site \\ n \\ p \\ p' else n \\ p \\ p'\" using assms\nproof induct\n case (direct_parent c)\n thus ?case\n apply (cases \"p = parent\")\n apply simp\n apply (rule conjI, clarsimp)\n apply clarsimp\n apply (rule subtree.trans_parent [where c'=site])\n apply (rule n_site_child)\n apply (simp add: n_direct_eq)\n apply simp\n apply (clarsimp simp: parentOf_def n)\n apply (clarsimp simp: new_parent_def parent)\n apply simp\n apply (subgoal_tac \"n \\ p \\ c\")\n prefer 2\n apply (rule subtree.direct_parent)\n apply (clarsimp simp add: n_direct_eq)\n apply simp\n apply (clarsimp simp: parentOf_def n)\n apply (fastforce simp: new_parent_def parent)\n apply clarsimp\n apply (erule subtree_trans)\n apply (rule n_site_child)\n done\nnext\n case (trans_parent c d)\n thus ?case\n apply -\n apply (cases \"c = site\", simp)\n apply (cases \"d = site\", simp)\n apply (cases \"c = parent\")\n apply clarsimp\n apply (erule subtree.trans_parent [where c'=site])\n apply (clarsimp simp add: n_direct_eq)\n apply simp\n apply (clarsimp simp: parentOf_def n)\n apply (rule conjI, clarsimp)\n apply (clarsimp simp: new_parent_def parent)\n apply clarsimp\n apply (subgoal_tac \"n \\ p \\ d\")\n apply clarsimp\n apply (erule subtree_trans, rule n_site_child)\n apply (erule subtree.trans_parent)\n apply (simp add: n_direct_eq)\n apply simp\n apply (clarsimp simp: parentOf_def n)\n apply (fastforce simp: parent new_parent_def)\n done\nqed\n\nlemma n_to_site [simp]:\n \"n \\ p \\ site = (p = parent)\"\n by (simp add: n_direct_eq)\n\nlemma parent_n_m:\n assumes \"n \\ p \\ p'\"\n shows \"if p' = site then p \\ parent \\ m \\ p \\ parent else m \\ p \\ p'\"\nproof -\n from assms have [simp]: \"p \\ site\" by (clarsimp simp: site_no_parent_n)\n from assms\n show ?thesis\n proof induct\n case (direct_parent c)\n thus ?case\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply clarsimp\n apply (rule subtree.direct_parent)\n apply (simp add: n_direct_eq split: if_split_asm)\n apply simp\n apply (clarsimp simp: parentOf_def n parent new_parent_def split: if_split_asm)\n done\n next\n case (trans_parent c d)\n thus ?case\n apply clarsimp\n apply (rule conjI, clarsimp)\n apply (clarsimp split: if_split_asm)\n apply (simp add: n_direct_eq)\n apply (cases \"p=parent\")\n apply simp\n apply (rule subtree.direct_parent, assumption, assumption)\n apply (clarsimp simp: parentOf_def n parent new_parent_def split: if_split_asm)\n apply clarsimp\n apply (erule subtree.trans_parent, assumption, assumption)\n apply (clarsimp simp: parentOf_def n parent new_parent_def split: if_split_asm)\n apply (erule subtree.trans_parent)\n apply (simp add: n_direct_eq split: if_split_asm)\n apply assumption\n apply (clarsimp simp: parentOf_def n parent new_parent_def split: if_split_asm)\n done\n qed\nqed\n\nlemma descendants:\n \"descendants_of' p n =\n (if parent \\ descendants_of' p m \\ p = parent\n then descendants_of' p m \\ {site} else descendants_of' p m)\"\n apply (rule set_eqI)\n apply (simp add: descendants_of'_def)\n apply (fastforce dest!: parent_n_m dest: parent_m_n simp: n_site_child split: if_split_asm)\n done\n\nend\n\nlemma blarg_descendants_of':\n \"descendants_of' x (modify_map m p (if P then id else cteMDBNode_update (mdbPrev_update f)))\n = descendants_of' x m\"\n by (simp add: descendants_of'_def)\n\nlemma bluhr_descendants_of':\n \"mdb_insert_again_child (ctes_of s') parent parent_cap pmdb site site_cap site_node cap s\n \\\n descendants_of' x\n (modify_map\n (modify_map\n (\\c. if c = site\n then Some (CTE cap (MDB (mdbNext pmdb) parent True True))\n else ctes_of s' c)\n (mdbNext pmdb)\n (if mdbNext pmdb = 0 then id\n else cteMDBNode_update (mdbPrev_update (\\x. site))))\n parent (cteMDBNode_update (mdbNext_update (\\x. site))))\n = (if parent \\ descendants_of' x (ctes_of s') \\ x = parent\n then descendants_of' x (ctes_of s') \\ {site}\n else descendants_of' x (ctes_of s'))\"\n apply (subst modify_map_com)\n apply (case_tac x, rename_tac node, case_tac node, clarsimp)\n apply (subst blarg_descendants_of')\n apply (erule mdb_insert_again_child.descendants)\n done\n\nlemma mdb_relation_simp:\n \"\\ (s, s') \\ state_relation; cte_at p s \\\n \\ descendants_of' (cte_map p) (ctes_of s') = cte_map ` descendants_of p (cdt s)\"\n by (cases p, clarsimp simp: state_relation_def cdt_relation_def)\n\nlemma in_getCTE2:\n \"((cte, s') \\ fst (getCTE p s)) = (s' = s \\ cte_wp_at' ((=) cte) p s)\"\n apply (safe dest!: in_getCTE)\n apply (clarsimp simp: cte_wp_at'_def getCTE_def)\n done\n\ndeclare wrap_ext_op_det_ext_ext_def[simp]\n\nlemma do_ext_op_update_cdt_list_symb_exec_l':\n \"corres_underlying {(s::det_state, s'). f (kheap s) (ekheap s) s'} nf nf' dc P P' (create_cap_ext p z a) (return x)\"\n apply (simp add: corres_underlying_def create_cap_ext_def\n update_cdt_list_def set_cdt_list_def bind_def put_def get_def gets_def return_def)\n done\n\ncrunches updateMDB, updateNewFreeIndex\n for it'[wp]: \"\\s. P (ksIdleThread s)\"\n and ups'[wp]: \"\\s. P (gsUserPages s)\"\n and cns'[wp]: \"\\s. P (gsCNodes s)\"\n and ksDomainTime[wp]: \"\\s. P (ksDomainTime s)\"\n and ksDomScheduleIdx[wp]: \"\\s. P (ksDomScheduleIdx s)\"\n and ksWorkUnitsCompleted[wp]: \"\\s. P (ksWorkUnitsCompleted s)\"\n and ksMachineState[wp]: \"\\s. P (ksMachineState s)\"\n and ksArchState[wp]: \"\\s. P (ksArchState s)\"\ncrunches insertNewCap\n for ksInterrupt[wp]: \"\\s. P (ksInterruptState s)\"\n and norq[wp]: \"\\s. P (ksReadyQueues s)\"\n and ksIdleThread[wp]: \"\\s. P (ksIdleThread s)\"\n and ksDomSchedule[wp]: \"\\s. P (ksDomSchedule s)\"\n and ksCurDomain[wp]: \"\\s. P (ksCurDomain s)\"\n and ksCurThread[wp]: \"\\s. P (ksCurThread s)\"\n (wp: crunch_wps)\ncrunch nosch[wp]: insertNewCaps \"\\s. P (ksSchedulerAction s)\"\n (simp: crunch_simps zipWithM_x_mapM wp: crunch_wps)\n\ncrunch exst[wp]: set_cdt \"\\s. P (exst s)\"\n\n(*FIXME: Move to StateRelation*)\nlemma state_relation_schact[elim!]:\n \"(s,s') \\ state_relation \\ sched_act_relation (scheduler_action s) (ksSchedulerAction s')\"\n apply (simp add: state_relation_def)\n done\n\nlemma state_relation_queues[elim!]: \"(s,s') \\ state_relation \\ ready_queues_relation (ready_queues s) (ksReadyQueues s')\"\n apply (simp add: state_relation_def)\n done\n\nlemma set_original_symb_exec_l:\n \"corres_underlying {(s, s'). f (kheap s) (exst s) s'} nf nf' dc P P' (set_original p b) (return x)\"\n by (simp add: corres_underlying_def return_def set_original_def in_monad Bex_def)\n\nlemma set_cdt_symb_exec_l:\n \"corres_underlying {(s, s'). f (kheap s) (exst s) s'} nf nf' dc P P' (set_cdt g) (return x)\"\n by (simp add: corres_underlying_def return_def set_cdt_def in_monad Bex_def)\n\ncrunches create_cap_ext\n for domain_index[wp]: \"\\s. P (domain_index s)\"\n and domain_list[wp]: \"\\s. P (domain_list s)\"\n and domain_time[wp]: \"\\s. P (domain_time s)\"\n and work_units_completed[wp]: \"\\s. P (work_units_completed s)\"\n (ignore_del: create_cap_ext)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma updateNewFreeIndex_noop_psp_corres:\n \"corres_underlying {(s, s'). pspace_relations (ekheap s) (kheap s) (ksPSpace s')} False True\n dc \\ (cte_at' slot)\n (return ()) (updateNewFreeIndex slot)\"\n apply (simp add: updateNewFreeIndex_def)\n apply (rule corres_guard_imp)\n apply (rule corres_bind_return2)\n apply (rule corres_symb_exec_r_conj[where P'=\"cte_at' slot\"])\n apply (rule corres_trivial, simp)\n apply (wp getCTE_wp' | wpc\n | simp add: updateTrackedFreeIndex_def getSlotCap_def)+\n done\n\nlemma insertNewCap_corres:\nnotes if_cong[cong del] if_weak_cong[cong]\nshows\n \"\\ cref' = cte_map (fst tup)\n \\ cap_relation (default_cap tp (snd tup) sz d) cap \\ \\\n corres dc\n (cte_wp_at ((=) cap.NullCap) (fst tup) and pspace_aligned\n and pspace_distinct and valid_objs and valid_mdb and valid_list\n and cte_wp_at ((\\) cap.NullCap) p)\n (cte_wp_at' (\\c. cteCap c = NullCap) cref' and\n cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\ sameRegionAs (cteCap cte) cap) (cte_map p)\n and valid_mdb' and pspace_aligned' and pspace_distinct' and valid_objs'\n and (\\s. descendants_range' cap (cte_map p) (ctes_of s)))\n (create_cap tp sz p d tup)\n (insertNewCap (cte_map p) cref' cap)\"\n apply (cases tup,\n clarsimp simp add: create_cap_def insertNewCap_def\n liftM_def)\n apply (rule corres_symb_exec_r [OF _ getCTE_sp])+\n prefer 3\n apply (rule no_fail_pre, wp)\n apply (clarsimp elim!: cte_wp_at_weakenE')\n prefer 4\n apply (rule no_fail_pre, wp)\n apply (clarsimp elim!: cte_wp_at_weakenE')\n apply (rule corres_assert_assume)\n prefer 2\n apply (case_tac oldCTE)\n apply (clarsimp simp: cte_wp_at_ctes_of valid_mdb'_def valid_mdb_ctes_def\n valid_nullcaps_def)\n apply (erule allE)+\n apply (erule (1) impE)\n apply (simp add: initMDBNode_def)\n apply clarsimp\n apply (rule_tac F=\"capClass cap = PhysicalClass\" in corres_req)\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps)\n apply (drule sameRegionAs_classes, simp)\n apply (rule corres_caps_decomposition)\n prefer 3\n apply wp+\n apply (rule hoare_post_imp, simp)\n apply (wp | assumption)+\n defer\n apply ((wp | simp)+)[1]\n apply (simp add: create_cap_ext_def set_cdt_list_def update_cdt_list_def bind_assoc)\n apply ((wp | simp)+)[1]\n apply (wp updateMDB_ctes_of_cases\n | simp add: o_def split del: if_split)+\n apply (clarsimp simp: cdt_relation_def cte_wp_at_ctes_of\n split del: if_split cong: if_cong simp del: id_apply)\n apply (subst if_not_P, erule(1) valid_mdbD3')\n apply (case_tac x, case_tac oldCTE)\n apply (subst bluhr_descendants_of')\n apply (rule mdb_insert_again_child.intro)\n apply (rule mdb_insert_again.intro)\n apply (rule mdb_ptr.intro)\n apply (simp add: valid_mdb'_def vmdb_def)\n apply (rule mdb_ptr_axioms.intro)\n apply simp\n apply (rule mdb_ptr.intro)\n apply (simp add: valid_mdb'_def vmdb_def)\n apply (rule mdb_ptr_axioms.intro)\n apply fastforce\n apply (rule mdb_insert_again_axioms.intro)\n apply (clarsimp simp: nullPointer_def)+\n apply (erule (1) ctes_of_valid_cap')\n apply (simp add: valid_mdb'_def valid_mdb_ctes_def)\n apply clarsimp\n apply (rule mdb_insert_again_child_axioms.intro)\n apply (clarsimp simp: isMDBParentOf_def)\n apply (clarsimp simp: isCap_simps)\n apply (clarsimp simp: valid_mdb'_def valid_mdb_ctes_def\n ut_revocable'_def)\n apply (fold fun_upd_def)\n apply (subst descendants_of_insert_child')\n apply (erule(1) mdb_Null_descendants)\n apply (clarsimp simp: cte_wp_at_def)\n apply (erule(1) mdb_Null_None)\n apply (subgoal_tac \"cte_at (aa, bb) s\")\n prefer 2\n apply (drule not_sym, clarsimp simp: cte_wp_at_caps_of_state split: if_split_asm)\n apply (subst descendants_of_eq' [OF _ cte_wp_at_cte_at], assumption+)\n apply (clarsimp simp: state_relation_def)\n apply assumption+\n apply (subst cte_map_eq_subst [OF _ cte_wp_at_cte_at], assumption+)\n apply (simp add: mdb_relation_simp)\n defer\n apply (clarsimp split del: if_split)+\n apply (clarsimp simp add: revokable_relation_def cte_wp_at_ctes_of\n split del: if_split)\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply (elim modify_map_casesE)\n apply ((clarsimp split: if_split_asm cong: conj_cong\n simp: cte_map_eq_subst cte_wp_at_cte_at\n revokable_relation_simp)+)[4]\n apply clarsimp\n apply (subgoal_tac \"null_filter (caps_of_state s) (aa, bb) \\ None\")\n prefer 2\n apply (clarsimp simp: null_filter_def cte_wp_at_caps_of_state split: if_split_asm)\n apply (subgoal_tac \"cte_at (aa,bb) s\")\n prefer 2\n apply clarsimp\n apply (drule null_filter_caps_of_stateD)\n apply (erule cte_wp_cte_at)\n apply (elim modify_map_casesE)\n apply (clarsimp split: if_split_asm cong: conj_cong\n simp: cte_map_eq_subst cte_wp_at_cte_at revokable_relation_simp)+\n apply (clarsimp simp: state_relation_def ghost_relation_of_heap)+\n apply wp+\n apply (rule corres_guard_imp)\n apply (rule corres_underlying_symb_exec_l [OF gets_symb_exec_l])\n apply (rule corres_underlying_symb_exec_l [OF gets_symb_exec_l])\n apply (rule corres_underlying_symb_exec_l [OF set_cdt_symb_exec_l])\n apply (rule corres_underlying_symb_exec_l [OF do_ext_op_update_cdt_list_symb_exec_l'])\n apply (rule corres_underlying_symb_exec_l [OF set_original_symb_exec_l])\n apply (rule corres_cong[OF refl refl _ refl refl, THEN iffD1])\n apply (rule bind_return[THEN fun_cong])\n apply (rule corres_split)\n apply (rule setCTE_corres; simp)\n apply (subst bind_return[symmetric],\n rule corres_split)\n apply (simp add: dc_def[symmetric])\n apply (rule updateMDB_symb_exec_r)\n apply (simp add: dc_def[symmetric])\n apply (rule corres_split_noop_rhs[OF updateMDB_symb_exec_r])\n apply (rule updateNewFreeIndex_noop_psp_corres)\n apply (wp getCTE_wp set_cdt_valid_objs set_cdt_cte_at\n hoare_weak_lift_imp | simp add: o_def)+\n apply (clarsimp simp: cte_wp_at_cte_at)\n apply (clarsimp simp: cte_wp_at_ctes_of no_0_def valid_mdb'_def\n valid_mdb_ctes_def)\n apply (rule conjI, clarsimp)\n apply clarsimp\n apply (erule (2) valid_dlistEn)\n apply simp\n apply(simp only: cdt_list_relation_def valid_mdb_def2)\n apply(subgoal_tac \"finite_depth (cdt s)\")\n prefer 2\n apply(simp add: finite_depth valid_mdb_def2[symmetric])\n apply(intro impI allI)\n apply(subgoal_tac \"mdb_insert_abs (cdt s) p (a, b)\")\n prefer 2\n apply(clarsimp simp: cte_wp_at_caps_of_state)\n apply(rule mdb_insert_abs.intro)\n apply(clarsimp)\n apply(erule (1) mdb_cte_at_Null_None)\n apply (erule (1) mdb_cte_at_Null_descendants)\n apply(subgoal_tac \"no_0 (ctes_of s')\")\n prefer 2\n apply(simp add: valid_mdb_ctes_def valid_mdb'_def)\n apply simp\n apply (elim conjE)\n apply (case_tac \"cdt s (a,b)\")\n prefer 2\n apply (simp add: mdb_insert_abs_def)\n apply simp\n apply(case_tac x)\n apply(simp add: cte_wp_at_ctes_of)\n apply(simp add: mdb_insert_abs.next_slot split del: if_split)\n apply(case_tac \"c=p\")\n apply(simp)\n apply(clarsimp simp: modify_map_def)\n apply(case_tac z)\n apply(fastforce split: if_split_asm)\n apply(case_tac \"c = (a, b)\")\n apply(simp)\n apply(case_tac \"next_slot p (cdt_list s) (cdt s)\")\n apply(simp)\n apply(simp)\n apply(clarsimp simp: modify_map_def const_def)\n apply(clarsimp split: if_split_asm)\n apply(drule_tac p=\"cte_map p\" in valid_mdbD1')\n apply(simp)\n apply(simp add: valid_mdb'_def valid_mdb_ctes_def)\n apply(clarsimp simp: nullPointer_def no_0_def)\n apply(clarsimp simp: state_relation_def)\n apply(clarsimp simp: cte_wp_at_caps_of_state)\n apply(drule_tac slot=p in pspace_relation_ctes_ofI)\n apply(simp add: cte_wp_at_caps_of_state)\n apply(simp)\n apply(simp)\n apply(simp)\n apply(clarsimp simp: state_relation_def cdt_list_relation_def)\n apply(erule_tac x=\"fst p\" in allE, erule_tac x=\"snd p\" in allE)\n apply(fastforce)\n apply(simp)\n apply(case_tac \"next_slot c (cdt_list s) (cdt s)\")\n apply(simp)\n apply(simp)\n apply(subgoal_tac \"cte_at c s\")\n prefer 2\n apply(rule cte_at_next_slot)\n apply(simp_all add: valid_mdb_def2)[4]\n apply(clarsimp simp: modify_map_def const_def)\n apply(simp split: if_split_asm)\n apply(simp add: valid_mdb'_def)\n apply(drule_tac ptr=\"cte_map p\" in no_self_loop_next)\n apply(simp)\n apply(simp)\n apply(drule_tac p=\"(aa, bb)\" in cte_map_inj)\n apply(simp_all add: cte_wp_at_caps_of_state)[5]\n apply(clarsimp)\n apply(simp)\n apply(clarsimp)\n apply(drule cte_map_inj_eq; simp add: cte_wp_at_caps_of_state)\n apply(clarsimp)\n apply(case_tac z)\n apply(clarsimp simp: state_relation_def cdt_list_relation_def)\n apply(erule_tac x=aa in allE, erule_tac x=bb in allE)\n apply(fastforce)\n apply(clarsimp)\n apply(drule cte_map_inj_eq)\n apply(simp_all add: cte_wp_at_caps_of_state)[6]\n apply(clarsimp simp: state_relation_def cdt_list_relation_def)\n apply(erule_tac x=aa in allE, erule_tac x=bb in allE, fastforce)\n done\n\nlemma setCTE_cteCaps_of[wp]:\n \"\\\\s. P ((cteCaps_of s)(p \\ cteCap cte))\\\n setCTE p cte\n \\\\rv s. P (cteCaps_of s)\\\"\n apply (simp add: cteCaps_of_def)\n apply wp\n apply (clarsimp elim!: rsubst[where P=P] intro!: ext)\n done\n\nlemma insertNewCap_wps[wp]:\n \"\\pspace_aligned'\\ insertNewCap parent slot cap \\\\rv. pspace_aligned'\\\"\n \"\\pspace_canonical'\\ insertNewCap parent slot cap \\\\rv. pspace_canonical'\\\"\n \"\\pspace_in_kernel_mappings'\\ insertNewCap parent slot cap \\\\rv. pspace_in_kernel_mappings'\\\"\n \"\\pspace_distinct'\\ insertNewCap parent slot cap \\\\rv. pspace_distinct'\\\"\n \"\\\\s. P ((cteCaps_of s)(slot \\ cap))\\\n insertNewCap parent slot cap\n \\\\rv s. P (cteCaps_of s)\\\"\n apply (simp_all add: insertNewCap_def)\n apply (wp hoare_drop_imps\n | simp add: o_def)+\n apply (clarsimp elim!: rsubst[where P=P] intro!: ext)\n done\n\ndefinition apitype_of :: \"cap \\ apiobject_type option\"\nwhere\n \"apitype_of c \\ case c of\n Structures_A.UntypedCap d p b idx \\ Some ArchTypes_H.Untyped\n | Structures_A.EndpointCap r badge rights \\ Some EndpointObject\n | Structures_A.NotificationCap r badge rights \\ Some NotificationObject\n | Structures_A.CNodeCap r bits guard \\ Some ArchTypes_H.CapTableObject\n | Structures_A.ThreadCap r \\ Some TCBObject\n | _ \\ None\"\n\nlemma cte_wp_at_cteCaps_of:\n \"cte_wp_at' (\\cte. P (cteCap cte)) p s\n = (\\cap. cteCaps_of s p = Some cap \\ P cap)\"\n apply (subst tree_cte_cteCap_eq[unfolded o_def])\n apply (clarsimp split: option.splits)\n done\n\nlemma caps_contained_modify_mdb_helper[simp]:\n \"(\\n. modify_map m p (cteMDBNode_update f) x = Some (CTE c n))\n = (\\n. m x = Some (CTE c n))\"\n apply (cases \"m p\", simp_all add: modify_map_def)\n apply (case_tac a, simp_all)\n done\n\nlemma sameRegionAs_capRange_subset:\n \"\\ sameRegionAs c c'; capClass c = PhysicalClass \\ \\ capRange c' \\ capRange c\"\n apply (erule sameRegionAsE)\n apply (rule equalityD1)\n apply (rule master_eqI, rule capRange_Master)\n apply simp\n apply assumption+\n apply (clarsimp simp: isCap_simps)+\n done\n\n\ndefinition\n is_end_chunk :: \"cte_heap \\ capability \\ machine_word \\ bool\"\nwhere\n \"is_end_chunk ctes cap p \\ \\p'. ctes \\ p \\ p'\n \\ (\\cte. ctes p = Some cte \\ sameRegionAs cap (cteCap cte))\n \\ (\\cte'. ctes p' = Some cte' \\ \\ sameRegionAs cap (cteCap cte'))\"\n\ndefinition\n mdb_chunked2 :: \"cte_heap \\ bool\"\nwhere\n \"mdb_chunked2 ctes \\ (\\x p p' cte. ctes x = Some cte\n \\ is_end_chunk ctes (cteCap cte) p \\ is_end_chunk ctes (cteCap cte) p'\n \\ p = p')\n \\ (\\p p' cte cte'. ctes p = Some cte \\ ctes p' = Some cte'\n \\ ctes \\ p \\ p' \\ sameRegionAs (cteCap cte') (cteCap cte)\n \\ sameRegionAs (cteCap cte) (cteCap cte'))\"\n\nlemma mdb_chunked2_revD:\n \"\\ ctes p = Some cte; ctes p' = Some cte'; ctes \\ p \\ p';\n mdb_chunked2 ctes; sameRegionAs (cteCap cte') (cteCap cte) \\\n \\ sameRegionAs (cteCap cte) (cteCap cte')\"\n by (fastforce simp add: mdb_chunked2_def)\n\nlemma valid_dlist_step_back:\n \"\\ ctes \\ p \\ p''; ctes \\ p' \\ p''; valid_dlist ctes; p'' \\ 0 \\\n \\ p = p'\"\n apply (simp add: mdb_next_unfold valid_dlist_def)\n apply (frule_tac x=p in spec)\n apply (drule_tac x=p' in spec)\n apply (clarsimp simp: Let_def)\n done\n\nlemma chunk_sameRegionAs_step1:\n \"\\ ctes \\ p' \\\\<^sup>* p''; ctes p'' = Some cte;\n is_chunk ctes (cteCap cte) p p'';\n mdb_chunked2 ctes; valid_dlist ctes \\ \\\n \\cte'. ctes p' = Some cte'\n \\ ctes \\ p \\\\<^sup>+ p'\n \\ sameRegionAs (cteCap cte') (cteCap cte)\"\n apply (erule converse_rtrancl_induct)\n apply (clarsimp simp: is_chunk_def)\n apply (drule_tac x=p'' in spec, clarsimp)\n apply (clarsimp simp: is_chunk_def)\n apply (frule_tac x=y in spec)\n apply (drule_tac x=z in spec)\n apply ((drule mp, erule(1) transitive_closure_trans)\n | clarsimp)+\n apply (rule sameRegionAs_trans[rotated], assumption)\n apply (drule(3) mdb_chunked2_revD)\n apply simp\n apply (erule(1) sameRegionAs_trans)\n apply simp\n done\n\nend\nlocale mdb_insert_again_all = mdb_insert_again_child +\n assumes valid_c': \"s \\' c'\"\n\n fixes n'\n defines \"n' \\ modify_map n (mdbNext parent_node) (cteMDBNode_update (mdbPrev_update (\\a. site)))\"\nbegin\ninterpretation Arch . (*FIXME: arch_split*)\nlemma no_0_n' [simp]: \"no_0 n'\"\n using no_0_n by (simp add: n'_def)\n\nlemma dom_n' [simp]: \"dom n' = dom n\"\n apply (simp add: n'_def)\n apply (simp add: modify_map_if dom_def)\n apply (rule set_eqI)\n apply simp\n apply (rule iffI)\n apply auto[1]\n apply clarsimp\n apply (case_tac y)\n apply (case_tac \"mdbNext parent_node = x\")\n apply auto\n done\n\nlemma mdb_chain_0_n' [simp]: \"mdb_chain_0 n'\"\n using chain_n\n apply (simp add: mdb_chain_0_def)\n apply (simp add: n'_def trancl_prev_update)\n done\n\nlemma parency_n':\n \"n' \\ p \\ p' = (if m \\ p \\ parent \\ p = parent\n then m \\ p \\ p' \\ p' = site\n else m \\ p \\ p')\"\n using descendants [of p]\n unfolding descendants_of'_def\n by (auto simp add: set_eq_iff n'_def)\n\nlemma n'_direct_eq:\n \"n' \\ p \\ p' = (if p = parent then p' = site else\n if p = site then m \\ parent \\ p'\n else m \\ p \\ p')\"\n by (simp add: n'_def n_direct_eq)\n\nlemma n'_tranclD:\n \"n' \\ p \\\\<^sup>+ p' \\\n (if p = site then m \\ parent \\\\<^sup>+ p'\n else if m \\ p \\\\<^sup>+ parent \\ p = parent then m \\ p \\\\<^sup>+ p' \\ p' = site\n else m \\ p \\\\<^sup>+ p')\"\n apply (erule trancl_induct)\n apply (fastforce simp: n'_direct_eq split: if_split_asm)\n apply (fastforce simp: n'_direct_eq split: if_split_asm elim: trancl_trans)\n done\n\nlemma site_in_dom: \"site \\ dom n\"\n by (simp add: n)\n\nlemma m_tranclD:\n assumes m: \"m \\ p \\\\<^sup>+ p'\"\n shows \"p' \\ site \\ n' \\ p \\\\<^sup>+ p'\"\nproof -\n from m have \"p = site \\ p' = 0\" by clarsimp\n with mdb_chain_0_n' m\n show ?thesis\n apply -\n apply (erule trancl_induct)\n apply (rule context_conjI)\n apply clarsimp\n apply (cases \"p = site\")\n apply (simp add: mdb_chain_0_def site_in_dom)\n apply (cases \"p = parent\")\n apply simp\n apply (rule trancl_trans)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (rule context_conjI)\n apply clarsimp\n apply clarsimp\n apply (erule trancl_trans)\n apply (case_tac \"y = parent\")\n apply simp\n apply (rule trancl_trans)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n done\nqed\n\nlemma n'_trancl_eq:\n \"n' \\ p \\\\<^sup>+ p' =\n (if p = site then m \\ parent \\\\<^sup>+ p'\n else if m \\ p \\\\<^sup>+ parent \\ p = parent then m \\ p \\\\<^sup>+ p' \\ p' = site\n else m \\ p \\\\<^sup>+ p')\"\n apply simp\n apply (intro conjI impI iffI)\n apply (drule n'_tranclD)\n apply simp\n apply simp\n apply (drule n'_tranclD)\n apply simp\n apply (erule disjE)\n apply (drule m_tranclD)+\n apply simp\n apply (drule m_tranclD)\n apply simp\n apply (erule trancl_trans)\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (drule n'_tranclD, simp)\n apply (erule disjE)\n apply (drule m_tranclD)\n apply simp\n apply simp\n apply (rule r_into_trancl)\n apply (simp add: n'_direct_eq)\n apply (drule n'_tranclD, simp)\n apply simp\n apply (cases \"p' = site\", simp)\n apply (drule m_tranclD)\n apply clarsimp\n apply (drule tranclD)\n apply (clarsimp simp: n'_direct_eq)\n apply (simp add: rtrancl_eq_or_trancl)\n apply (drule n'_tranclD, simp)\n apply clarsimp\n apply (drule m_tranclD, simp)\n done\n\nlemma n'_rtrancl_eq:\n \"n' \\ p \\\\<^sup>* p' =\n (if p = site then p' \\ site \\ m \\ parent \\\\<^sup>+ p' \\ p' = site\n else if m \\ p \\\\<^sup>* parent then m \\ p \\\\<^sup>* p' \\ p' = site\n else m \\ p \\\\<^sup>* p')\"\n by (auto simp: rtrancl_eq_or_trancl n'_trancl_eq)\n\nlemma mdbNext_parent_site [simp]:\n \"mdbNext parent_node \\ site\"\nproof\n assume \"mdbNext parent_node = site\"\n hence \"m \\ parent \\ site\"\n using parent\n by (unfold mdb_next_unfold) simp\n thus False by simp\nqed\n\nlemma mdbPrev_parent_site [simp]:\n \"site \\ mdbPrev parent_node\"\nproof\n assume \"site = mdbPrev parent_node\"\n with parent site\n have \"m \\ site \\ parent\"\n apply (unfold mdb_next_unfold)\n apply simp\n apply (erule dlistEp)\n apply clarsimp\n apply clarsimp\n done\n with p_0 show False by simp\nqed\n\nlemma parent_prev:\n \"(m \\ parent \\ p) = (p = mdbNext parent_node \\ p \\ 0)\"\n apply (rule iffI)\n apply (frule dlist_prevD, rule parent)\n apply (simp add: mdb_next_unfold parent)\n apply (clarsimp simp: mdb_prev_def)\n apply clarsimp\n apply (rule dlist_nextD0)\n apply (rule parent_next)\n apply assumption\n done\n\nlemma parent_next_prev:\n \"(m \\ p \\ mdbNext parent_node) = (p = parent \\ mdbNext parent_node \\ 0)\"\n using parent\n apply -\n apply (rule iffI)\n apply (clarsimp simp add: mdb_prev_def)\n apply (rule conjI)\n apply (erule dlistEn)\n apply clarsimp\n apply simp\n apply clarsimp\n apply clarsimp\n apply (rule dlist_nextD0)\n apply (rule parent_next)\n apply assumption\n done\n\n\nlemma n'_prev_eq:\n notes if_cong[cong del] if_weak_cong[cong]\n shows \"n' \\ p \\ p' = (if p' = site then p = parent\n else if p = site then m \\ parent \\ p'\n else if p = parent then p' = site\n else m \\ p \\ p')\"\n using parent site site_prev\n apply (simp add: n'_def n mdb_prev_def new_parent_def new_site_def split del: if_split)\n apply (clarsimp simp add: modify_map_if cong: if_cong split del: if_split)\n apply (cases \"p' = site\", simp)\n apply (simp cong: if_cong split del: if_split)\n apply (cases \"p' = parent\")\n apply clarsimp\n apply (rule conjI, clarsimp simp: mdb_prev_def)\n apply (clarsimp simp: mdb_prev_def)\n apply (simp cong: if_cong split del: if_split)\n apply (cases \"p = site\")\n apply (simp add: parent_prev)\n apply (cases \"mdbNext parent_node = p'\")\n apply simp\n apply (rule iffI)\n prefer 2\n apply clarsimp\n apply (erule dlistEn)\n apply simp\n apply clarsimp\n apply (case_tac cte')\n apply clarsimp\n apply clarsimp\n apply clarsimp\n apply (insert site_next)[1]\n apply (rule valid_dlistEp [OF dlist, where p=p'], assumption)\n apply clarsimp\n apply clarsimp\n apply (simp cong: if_cong split del: if_split)\n apply (cases \"p = parent\")\n apply clarsimp\n apply (insert site_next)\n apply (cases \"mdbNext parent_node = p'\", clarsimp)\n apply clarsimp\n apply (rule valid_dlistEp [OF dlist, where p=p'], assumption)\n apply clarsimp\n apply clarsimp\n apply simp\n apply (cases \"mdbNext parent_node = p'\")\n prefer 2\n apply (clarsimp simp: mdb_prev_def)\n apply (rule iffI, clarsimp)\n apply clarsimp\n apply (case_tac z)\n apply simp\n apply (rule iffI)\n apply (clarsimp simp: mdb_prev_def)\n apply (drule sym [where t=p'])\n apply (simp add: parent_next_prev)\n done\n\nlemma dlist_n' [simp]:\n notes if_cong[cong del] if_weak_cong[cong]\n shows \"valid_dlist n'\"\n using no_0_n'\n by (clarsimp simp: valid_dlist_def2 n'_direct_eq\n n'_prev_eq Invariants_H.valid_dlist_prevD [OF dlist])\n\nlemma n'_cap:\n \"n' p = Some (CTE c node) \\\n if p = site then c = c' \\ m p = Some (CTE NullCap site_node)\n else \\node'. m p = Some (CTE c node')\"\n by (auto simp: n'_def n modify_map_if new_parent_def parent\n new_site_def site site_cap split: if_split_asm)\n\nlemma m_cap:\n \"m p = Some (CTE c node) \\\n if p = site\n then \\node'. n' site = Some (CTE c' node')\n else \\node'. n' p = Some (CTE c node')\"\n by (clarsimp simp: n n'_def new_parent_def new_site_def parent)\n\nlemma n'_badged:\n \"n' p = Some (CTE c node) \\\n if p = site then c = c' \\ mdbFirstBadged node\n else \\node'. m p = Some (CTE c node') \\ mdbFirstBadged node = mdbFirstBadged node'\"\n by (auto simp: n'_def n modify_map_if new_parent_def parent\n new_site_def site site_cap split: if_split_asm)\n\nlemma no_next_region:\n \"\\ m \\ parent \\ p'; m p' = Some (CTE cap' node) \\ \\ \\sameRegionAs c' cap'\"\n apply (clarsimp simp: mdb_next_unfold parent)\n apply (frule next_wont_bite [rotated], clarsimp)\n apply simp\n done\n\nlemma valid_badges_n' [simp]: \"valid_badges n'\"\n using valid_badges\n apply (clarsimp simp: valid_badges_def)\n apply (simp add: n'_direct_eq)\n apply (drule n'_badged)+\n apply (clarsimp split: if_split_asm)\n apply (drule (1) no_next_region)\n apply simp\n apply (erule_tac x=p in allE)\n apply (erule_tac x=p' in allE)\n apply simp\n done\n\nlemma c'_not_Null: \"c' \\ NullCap\"\n using same_region by clarsimp\n\nlemma valid_nullcaps_n' [simp]:\n \"valid_nullcaps n'\"\n using nullcaps is_untyped c'_not_Null\n apply (clarsimp simp: valid_nullcaps_def n'_def n modify_map_if new_site_def\n new_parent_def isCap_simps)\n apply (erule allE)+\n apply (erule (1) impE)\n apply (simp add: nullMDBNode_def)\n apply (insert parent)\n apply (rule dlistEn, rule parent)\n apply clarsimp\n apply (clarsimp simp: nullPointer_def)\n done\n\nlemma phys': \"capClass parent_cap = PhysicalClass\"\n using sameRegionAs_classes [OF same_region] phys\n by simp\n\nlemma capRange_c': \"capRange c' \\ capRange parent_cap\"\n apply (rule sameRegionAs_capRange_subset)\n apply (rule same_region)\n apply (rule phys')\n done\n\nlemma untypedRange_c':\n assumes ut: \"isUntypedCap c'\"\n shows \"untypedRange c' \\ untypedRange parent_cap\"\n using ut is_untyped capRange_c'\n by (auto simp: isCap_simps)\n\nlemma sameRegion_parentI:\n \"sameRegionAs c' cap \\ sameRegionAs parent_cap cap\"\n using same_region\n apply -\n apply (erule (1) sameRegionAs_trans)\n done\n\nlemma no_loops_n': \"no_loops n'\"\n using mdb_chain_0_n' no_0_n'\n by (rule mdb_chain_0_no_loops)\n\nlemmas no_loops_simps' [simp]=\n no_loops_trancl_simp [OF no_loops_n']\n no_loops_direct_simp [OF no_loops_n']\n\nlemma rangeD:\n \"\\ m \\ parent \\ p; m p = Some (CTE cap node) \\ \\\n capRange cap \\ capRange c' = {}\"\n using range by (rule descendants_rangeD')\n\nlemma capAligned_c': \"capAligned c'\"\n using valid_c' by (rule valid_capAligned)\n\nlemma capRange_ut:\n \"capRange c' \\ untypedRange parent_cap\"\n using capRange_c' is_untyped\n by (clarsimp simp: isCap_simps del: subsetI)\n\nlemma untyped_mdb_n' [simp]: \"untyped_mdb' n'\"\n using untyped_mdb capRange_ut untyped_inc\n apply (clarsimp simp: untyped_mdb'_def descendants_of'_def)\n apply (drule n'_cap)+\n apply (simp add: parency_n')\n apply (simp split: if_split_asm)\n apply clarsimp\n apply (erule_tac x=parent in allE)\n apply (simp add: parent is_untyped)\n apply (erule_tac x=p' in allE)\n apply simp\n apply (frule untypedCapRange)\n apply (drule untypedRange_c')\n apply (erule impE, blast)\n apply (drule (1) rangeD)\n apply simp\n apply clarsimp\n apply (thin_tac \"All P\" for P)\n apply (simp add: untyped_inc'_def)\n apply (erule_tac x=parent in allE)\n apply (erule_tac x=p in allE)\n apply (simp add: parent is_untyped)\n apply (clarsimp simp: descendants_of'_def)\n apply (case_tac \"untypedRange parent_cap = untypedRange c\")\n apply simp\n apply (elim disjE conjE)\n apply (drule (1) rangeD)\n apply (drule untypedCapRange)\n apply simp\n apply blast\n apply simp\n apply (erule disjE)\n apply clarsimp\n apply (erule disjE)\n apply (simp add: psubsetI)\n apply (elim conjE)\n apply (drule (1) rangeD)\n apply (drule untypedCapRange)\n apply simp\n apply blast\n apply blast\n apply clarsimp\n done\n\nlemma site':\n \"n' site = Some new_site\"\n by (simp add: n n'_def modify_map_if new_site_def)\n\nlemma loopE: \"m \\ x \\\\<^sup>+ x \\ P\"\n by simp\n\nlemma m_loop_trancl_rtrancl:\n \"m \\ y \\\\<^sup>* x \\ \\ m \\ x \\\\<^sup>+ y\"\n apply clarsimp\n apply (drule(1) transitive_closure_trans)\n apply (erule loopE)\n done\n\nlemma m_rtrancl_to_site:\n \"m \\ p \\\\<^sup>* site = (p = site)\"\n apply (rule iffI)\n apply (erule rtranclE)\n apply assumption\n apply simp\n apply simp\n done\n\nlemma descendants_of'_D: \"p' \\ descendants_of' p ctes \\ ctes \\ p \\ p' \"\n by (clarsimp simp:descendants_of'_def)\n\nlemma untyped_inc_mdbD:\n \"\\ sameRegionAs cap cap'; isUntypedCap cap;\n ctes p = Some (CTE cap node); ctes p' = Some (CTE cap' node');\n untyped_inc' ctes; untyped_mdb' ctes; no_loops ctes \\\n \\ ctes \\ p \\ p' \\ p = p' \\\n (isUntypedCap cap' \\ untypedRange cap \\ untypedRange cap'\n \\ sameRegionAs cap' cap\n \\ ctes \\ p' \\ p)\"\n apply (subgoal_tac \"untypedRange cap \\ untypedRange cap' \\ sameRegionAs cap' cap\")\n apply (cases \"isUntypedCap cap'\")\n apply (drule(4) untyped_incD'[where p=p and p'=p'])\n apply (erule sameRegionAsE, simp_all add: untypedCapRange)[1]\n apply (cases \"untypedRange cap = untypedRange cap'\")\n apply simp\n apply (elim disjE conjE)\n apply (simp only: simp_thms descendants_of'_D)+\n apply (elim disjE conjE)\n apply (simp add: subset_iff_psubset_eq)\n apply (elim disjE)\n apply (simp add:descendants_of'_D)+\n apply (clarsimp simp:descendants_of'_def)\n apply ((clarsimp simp: isCap_simps)+)[2]\n apply clarsimp\n apply (erule sameRegionAsE)\n apply simp\n apply (drule(1) untyped_mdbD',simp)\n apply (simp add:untypedCapRange)\n apply blast\n apply simp\n apply assumption\n apply (simp add:descendants_of'_def)\n apply (clarsimp simp:isCap_simps)\n apply ((clarsimp simp add:isCap_simps)+)[2]\n apply (clarsimp simp add: sameRegionAs_def3 del: disjCI)\n apply (rule disjI1)\n apply (erule disjE)\n apply (intro conjI)\n apply blast\n apply (simp add:untypedCapRange)\n apply (erule subset_trans[OF _ untypedRange_in_capRange])\n apply clarsimp\n apply (rule untypedRange_not_emptyD)\n apply (simp add:untypedCapRange)\n apply blast\n apply (clarsimp simp:isCap_simps)\n done\n\nlemma parent_chunk:\n \"is_chunk n' parent_cap parent site\"\n by (clarsimp simp: is_chunk_def\n n'_trancl_eq n'_rtrancl_eq site' new_site_def same_region\n m_loop_trancl_rtrancl m_rtrancl_to_site)\n\nlemma mdb_chunked_n' [simp]:\n notes if_cong[cong del] if_weak_cong[cong]\n shows \"mdb_chunked n'\"\n using chunked untyped_mdb untyped_inc\n apply (clarsimp simp: mdb_chunked_def)\n apply (drule n'_cap)+\n apply (simp add: n'_trancl_eq split del: if_split)\n apply (simp split: if_split_asm)\n apply clarsimp\n apply (frule sameRegion_parentI)\n apply (frule(1) untyped_inc_mdbD [OF _ is_untyped _ _ untyped_inc untyped_mdb no_loops, OF _ parent])\n apply (elim disjE)\n apply (frule sameRegionAs_capRange_Int)\n apply (simp add: phys)\n apply (rule valid_capAligned [OF valid_c'])\n apply (rule valid_capAligned)\n apply (erule valid_capI')\n apply (erule notE, erule(1) descendants_rangeD' [OF range, rotated])\n apply (clarsimp simp: parent parent_chunk)\n apply clarsimp\n apply (frule subtree_mdb_next)\n apply (simp add: m_loop_trancl_rtrancl [OF trancl_into_rtrancl, where x=parent])\n apply (case_tac \"p' = parent\")\n apply (clarsimp simp: parent)\n apply (drule_tac x=p' in spec)\n apply (drule_tac x=parent in spec)\n apply (frule sameRegionAs_trans [OF _ same_region])\n apply (clarsimp simp: parent is_chunk_def n'_trancl_eq n'_rtrancl_eq\n m_rtrancl_to_site site' new_site_def)\n apply (drule_tac x=p'' in spec)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap, clarsimp)\n apply clarsimp\n apply (erule_tac x=p in allE)\n apply (erule_tac x=parent in allE)\n apply (insert parent is_untyped)[1]\n apply simp\n apply (case_tac \"p = parent\")\n apply (simp add: parent)\n apply (clarsimp simp add: is_chunk_def)\n apply (simp add: rtrancl_eq_or_trancl)\n apply (erule disjE)\n apply (clarsimp simp: site' new_site_def)\n apply clarsimp\n apply (drule tranclD)\n apply (clarsimp simp: n'_direct_eq)\n apply (drule (1) transitive_closure_trans)\n apply simp\n apply simp\n apply (case_tac \"isUntypedCap cap\")\n prefer 2\n apply (simp add: untyped_mdb'_def)\n apply (erule_tac x=parent in allE)\n apply simp\n apply (erule_tac x=p in allE)\n apply (simp add: descendants_of'_def)\n apply (drule mp[where P=\"S \\ T \\ {}\" for S T])\n apply (frule sameRegionAs_capRange_Int, simp add: phys)\n apply (rule valid_capAligned, erule valid_capI')\n apply (rule valid_capAligned, rule valid_c')\n apply (insert capRange_ut)[1]\n apply blast\n apply (drule (1) rangeD)\n apply (drule capRange_sameRegionAs, rule valid_c')\n apply (simp add: phys)\n apply simp\n apply (case_tac \"untypedRange parent_cap \\ untypedRange cap\")\n apply (erule impE)\n apply (clarsimp simp only: isCap_simps untypedRange.simps)\n apply (subst (asm) range_subset_eq)\n apply (drule valid_capI')+\n apply (drule valid_capAligned)+\n apply (clarsimp simp: capAligned_def)\n apply (erule is_aligned_no_overflow)\n apply (simp(no_asm) add: sameRegionAs_def3 isCap_simps)\n apply (drule valid_capI')+\n apply (drule valid_capAligned)+\n apply (clarsimp simp: capAligned_def is_aligned_no_overflow)\n apply clarsimp\n apply (erule disjE)\n apply simp\n apply (rule conjI)\n prefer 2\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (thin_tac \"P \\ Q\" for P Q)\n apply (clarsimp simp: is_chunk_def)\n apply (simp add: n'_trancl_eq n'_rtrancl_eq split: if_split_asm)\n apply (simp add: site' new_site_def)\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (simp add: rtrancl_eq_or_trancl)\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply clarsimp\n apply (clarsimp simp: is_chunk_def)\n apply (simp add: n'_trancl_eq n'_rtrancl_eq split: if_split_asm)\n apply (drule (1) transitive_closure_trans, erule loopE)\n apply (subgoal_tac \"m \\ p \\ parent\")\n apply (drule subtree_mdb_next)\n apply (drule (1) trancl_trans, erule loopE)\n apply (thin_tac \"All P\" for P)\n apply (drule_tac p=parent and p'=p in untyped_incD'[rotated], assumption+)\n apply simp\n apply (subgoal_tac \"\\ m \\ parent \\ p\")\n prefer 2\n apply clarsimp\n apply (drule (1) rangeD)\n apply (drule capRange_sameRegionAs, rule valid_c')\n apply (simp add: phys)\n apply simp\n apply (clarsimp simp: descendants_of'_def subset_iff_psubset_eq)\n apply (erule disjE,simp,simp)\n apply (drule_tac p=parent and p'=p in untyped_incD'[rotated], assumption+)\n apply (simp add:subset_iff_psubset_eq descendants_of'_def)\n apply (elim disjE conjE| simp )+\n apply (drule(1) rangeD)\n apply (drule capRange_sameRegionAs[OF _ valid_c'])\n apply (simp add:phys)+\n apply (insert capRange_c' is_untyped)[1]\n apply (simp add: untypedCapRange [symmetric])\n apply (drule(1) disjoint_subset)\n apply (drule capRange_sameRegionAs[OF _ valid_c'])\n apply (simp add:phys)\n apply (simp add:Int_ac)\n apply clarsimp\n apply (erule_tac x=p in allE)\n apply (erule_tac x=p' in allE)\n apply clarsimp\n apply (erule disjE)\n apply simp\n apply (thin_tac \"P \\ Q\" for P Q)\n apply (subgoal_tac \"is_chunk n' cap p p'\")\n prefer 2\n apply (clarsimp simp: is_chunk_def)\n apply (simp add: n'_trancl_eq n'_rtrancl_eq split: if_split_asm)\n apply (erule disjE)\n apply (erule_tac x=parent in allE)\n apply clarsimp\n apply (erule impE, fastforce)\n apply (clarsimp simp: parent)\n apply (simp add: site' new_site_def)\n apply (erule sameRegionAs_trans, rule same_region)\n apply (clarsimp simp add: parent)\n apply (simp add: site' new_site_def)\n apply (rule same_region)\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI, clarsimp)\n apply (drule (1) trancl_trans, erule loopE)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI, clarsimp)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply simp\n apply (thin_tac \"P \\ Q\" for P Q)\n apply (subgoal_tac \"is_chunk n' cap' p' p\")\n prefer 2\n apply (clarsimp simp: is_chunk_def)\n apply (simp add: n'_trancl_eq n'_rtrancl_eq split: if_split_asm)\n apply (erule disjE)\n apply (erule_tac x=parent in allE)\n apply clarsimp\n apply (erule impE, fastforce)\n apply (clarsimp simp: parent)\n apply (simp add: site' new_site_def)\n apply (erule sameRegionAs_trans, rule same_region)\n apply (clarsimp simp add: parent)\n apply (simp add: site' new_site_def)\n apply (rule same_region)\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply (erule_tac x=p'' in allE)\n apply clarsimp\n apply (drule_tac p=p'' in m_cap)\n apply clarsimp\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI, clarsimp)\n apply (drule (1) trancl_trans, erule loopE)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n apply (rule conjI, clarsimp)\n apply clarsimp\n apply (drule (1) trancl_trans, erule loopE)\n done\n\nlemma caps_contained_n' [simp]: \"caps_contained' n'\"\n using caps_contained untyped_mdb untyped_inc\n apply (clarsimp simp: caps_contained'_def)\n apply (drule n'_cap)+\n apply (clarsimp split: if_split_asm)\n apply (drule capRange_untyped)\n apply simp\n apply (frule capRange_untyped)\n apply (frule untypedRange_c')\n apply (erule_tac x=parent in allE)\n apply (erule_tac x=p' in allE)\n apply (simp add: parent)\n apply (erule impE, blast)\n apply (simp add: untyped_mdb'_def)\n apply (erule_tac x=parent in allE)\n apply (erule_tac x=p' in allE)\n apply (simp add: parent is_untyped descendants_of'_def)\n apply (erule impE)\n apply (thin_tac \"m site = t\" for t)\n apply (drule valid_capI')\n apply (frule valid_capAligned)\n apply blast\n apply (drule (1) rangeD)\n apply (frule capRange_untyped)\n apply (drule untypedCapRange)\n apply simp\n apply (thin_tac \"All P\" for P)\n apply (insert capRange_c')[1]\n apply (simp add: untypedCapRange is_untyped)\n apply (subgoal_tac \"untypedRange parent_cap \\ untypedRange c \\ {}\")\n prefer 2\n apply blast\n apply (frule untyped_incD'[OF _ capRange_untyped _ is_untyped])\n apply (case_tac c)\n apply simp_all\n apply (simp add:isCap_simps)\n apply (rule parent)\n apply clarsimp\n apply (case_tac \"untypedRange c = untypedRange parent_cap\")\n apply blast\n apply simp\n apply (elim disjE)\n apply (drule_tac A = \"untypedRange c\" in psubsetI)\n apply simp+\n apply (thin_tac \"P\\Q\" for P Q)\n apply (elim conjE)\n apply (simp add:descendants_of'_def)\n apply (drule(1) rangeD)\n apply (frule capRange_untyped)\n apply (simp add:untypedCapRange Int_ac)\n apply blast\n apply (simp add:descendants_of'_def)\n apply blast\n apply blast\n done\n\nlemma untyped_inc_n' [simp]: \"untypedRange c' \\ usableUntypedRange parent_cap = {} \\ untyped_inc' n'\"\n using untyped_inc\n apply (clarsimp simp: untyped_inc'_def)\n apply (drule n'_cap)+\n apply (clarsimp simp: descendants_of'_def parency_n' split: if_split_asm)\n apply (frule untypedRange_c')\n apply (insert parent is_untyped)[1]\n apply (erule_tac x=parent in allE)\n apply (erule_tac x=p' in allE)\n apply clarsimp\n apply (case_tac \"untypedRange parent_cap = untypedRange c'a\")\n apply simp\n apply (intro conjI)\n apply (intro impI)\n apply (elim disjE conjE)\n apply (drule(1) subtree_trans,simp)\n apply (simp add:subset_not_psubset)\n apply simp\n apply (clarsimp simp:subset_not_psubset)\n apply (drule valid_capI')+\n apply (drule(2) disjoint_subset[OF usableRange_subseteq[OF valid_capAligned],rotated -1])\n apply simp\n apply (clarsimp)\n apply (rule int_not_empty_subsetD)\n apply (drule(1) rangeD)\n apply (simp add:untypedCapRange Int_ac)\n apply (erule aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_c']])\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply simp\n apply (erule subset_splitE)\n apply (simp|elim conjE)+\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply blast\n apply (simp|elim conjE)+\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (intro conjI,intro impI,drule(1) subtree_trans,simp)\n apply clarsimp\n apply (intro impI)\n apply (drule(1) rangeD)\n apply (simp add:untypedCapRange Int_ac)\n apply (rule int_not_empty_subsetD)\n apply (simp add:Int_ac)\n apply (erule aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_c']])\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply simp\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (drule(1) disjoint_subset[rotated])\n apply simp\n apply (drule_tac B = \"untypedRange c'a\" in int_not_empty_subsetD)\n apply (erule aligned_untypedRange_non_empty[OF capAligned_c'])\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply simp\n apply (frule untypedRange_c')\n apply (insert parent is_untyped)[1]\n apply (erule_tac x=p in allE)\n apply (erule_tac x=parent in allE)\n apply clarsimp\n apply (case_tac \"untypedRange parent_cap = untypedRange c\")\n apply simp\n apply (intro conjI)\n apply (intro impI)\n apply (elim disjE conjE)\n apply (clarsimp simp:subset_not_psubset )+\n apply (drule(1) subtree_trans,simp)\n apply simp\n apply (clarsimp simp:subset_not_psubset)\n apply (drule disjoint_subset[OF usableRange_subseteq[OF valid_capAligned[OF valid_capI']],rotated])\n apply simp\n apply assumption\n apply simp\n apply clarsimp\n apply (rule int_not_empty_subsetD)\n apply (drule(1) rangeD)\n apply (simp add:untypedCapRange Int_ac)\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply (erule aligned_untypedRange_non_empty[OF capAligned_c'])\n apply simp\n apply (erule subset_splitE)\n apply (simp|elim conjE)+\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (intro conjI,intro impI,drule(1) subtree_trans,simp)\n apply clarsimp\n apply (intro impI)\n apply (drule(1) rangeD)\n apply (simp add:untypedCapRange Int_ac)\n apply (rule int_not_empty_subsetD)\n apply (simp add:Int_ac)\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply (erule aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_c']])\n apply simp\n apply (thin_tac \"P\\Q\" for P Q)+\n apply blast\n apply (thin_tac \"P\\Q\" for P Q)+\n apply simp\n apply (drule(1) disjoint_subset2[rotated])\n apply simp\n apply (drule_tac B = \"untypedRange c'\" in int_not_empty_subsetD)\n apply (erule(1) aligned_untypedRange_non_empty[OF valid_capAligned[OF valid_capI']])\n apply (erule aligned_untypedRange_non_empty[OF capAligned_c'])\n apply simp\n apply (erule_tac x=p in allE)\n apply (erule_tac x=p' in allE)\n apply simp\n apply blast\n done\n\nlemma ut_rev_n' [simp]: \"ut_revocable' n'\"\n using ut_rev\n apply (clarsimp simp: ut_revocable'_def n'_def n_def)\n apply (clarsimp simp: modify_map_if split: if_split_asm)\n done\n\nlemma class_links_m: \"class_links m\"\n using valid\n by (simp add: valid_mdb_ctes_def)\n\nlemma parent_phys: \"capClass parent_cap = PhysicalClass\"\n using is_untyped\n by (clarsimp simp: isCap_simps)\n\nlemma class_links [simp]: \"class_links n'\"\n using class_links_m\n apply (clarsimp simp add: class_links_def)\n apply (simp add: n'_direct_eq\n split: if_split_asm)\n apply (case_tac cte,\n clarsimp dest!: n'_cap simp: site' parent new_site_def phys parent_phys)\n apply (drule_tac x=parent in spec)\n apply (drule_tac x=p' in spec)\n apply (case_tac cte')\n apply (clarsimp simp: site' new_site_def parent parent_phys phys dest!: n'_cap\n split: if_split_asm)\n apply (case_tac cte, case_tac cte')\n apply (clarsimp dest!: n'_cap split: if_split_asm)\n apply fastforce\n done\n\nlemma irq_control_n' [simp]:\n \"irq_control n'\"\n using irq_control phys\n apply (clarsimp simp: irq_control_def)\n apply (clarsimp simp: n'_def n_def)\n apply (clarsimp simp: modify_map_if split: if_split_asm)\n done\n\nlemma ioport_control_n' [simp]:\n \"ioport_control n'\"\n using ioport_control phys\n apply (clarsimp simp: ioport_control_def)\n apply (clarsimp simp: n'_def n_def)\n apply (clarsimp simp: modify_map_if split: if_split_asm)\n done\n\nlemma dist_z_m:\n \"distinct_zombies m\"\n using valid by auto\n\nlemma dist_z [simp]:\n \"distinct_zombies n'\"\n using dist_z_m\n apply (simp add: n'_def distinct_zombies_nonCTE_modify_map)\n apply (simp add: n_def distinct_zombies_nonCTE_modify_map\n fun_upd_def[symmetric])\n apply (erule distinct_zombies_seperateE, simp)\n apply (case_tac cte, clarsimp)\n apply (rename_tac cap node)\n apply (subgoal_tac \"capRange cap \\ capRange c' \\ {}\")\n apply (frule untyped_mdbD' [OF _ _ _ _ _ untyped_mdb, OF parent])\n apply (simp add: is_untyped)\n apply (clarsimp simp add: untypedCapRange[OF is_untyped, symmetric])\n apply (drule disjoint_subset2 [OF capRange_c'])\n apply simp\n apply simp\n apply (simp add: descendants_of'_def)\n apply (drule(1) rangeD)\n apply simp\n apply (drule capAligned_capUntypedPtr [OF capAligned_c'])\n apply (frule valid_capAligned [OF valid_capI'])\n apply (drule(1) capAligned_capUntypedPtr)\n apply auto\n done\n\nlemma reply_masters_rvk_fb_m:\n \"reply_masters_rvk_fb m\"\n using valid by auto\n\nlemma reply_masters_rvk_fb_n[simp]:\n \"reply_masters_rvk_fb n'\"\n using reply_masters_rvk_fb_m\n apply (simp add: reply_masters_rvk_fb_def n'_def ball_ran_modify_map_eq\n n_def fun_upd_def[symmetric])\n apply (rule ball_ran_fun_updI, assumption)\n apply clarsimp\n done\n\nlemma valid_n':\n \"untypedRange c' \\ usableUntypedRange parent_cap = {} \\ valid_mdb_ctes n'\"\n by auto\n\nend\n\nlemma caps_overlap_reserved'_D:\n \"\\caps_overlap_reserved' S s; ctes_of s p = Some cte;isUntypedCap (cteCap cte)\\ \\ usableUntypedRange (cteCap cte) \\ S = {}\"\n apply (simp add:caps_overlap_reserved'_def)\n apply (erule ballE)\n apply (erule(2) impE)\n apply fastforce\n done\ncontext begin interpretation Arch . (*FIXME: arch_split*)\nlemma insertNewCap_valid_mdb:\n \"\\valid_mdb' and valid_objs' and K (slot \\ p) and\n caps_overlap_reserved' (untypedRange cap) and\n cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n sameRegionAs (cteCap cte) cap) p and\n K (\\isZombie cap) and valid_cap' cap and\n (\\s. descendants_range' cap p (ctes_of s))\\\n insertNewCap p slot cap\n \\\\rv. valid_mdb'\\\"\n apply (clarsimp simp: insertNewCap_def valid_mdb'_def)\n apply (wp getCTE_ctes_of | simp add: o_def)+\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (rule conjI)\n apply (clarsimp simp: no_0_def valid_mdb_ctes_def)\n apply (case_tac cte)\n apply (rename_tac p_cap p_node)\n apply (clarsimp cong: if_cong)\n apply (case_tac ya)\n apply (rename_tac node)\n apply (clarsimp simp: nullPointer_def)\n apply (rule mdb_insert_again_all.valid_n')\n apply unfold_locales[1]\n apply (assumption|rule refl)+\n apply (frule sameRegionAs_classes, clarsimp simp: isCap_simps)\n apply (erule (1) ctes_of_valid_cap')\n apply (simp add: valid_mdb_ctes_def)\n apply simp\n apply (clarsimp simp: isMDBParentOf_CTE)\n apply (clarsimp simp: isCap_simps valid_mdb_ctes_def ut_revocable'_def)\n apply assumption\n apply (drule(1) caps_overlap_reserved'_D)\n apply simp\n apply (simp add:Int_ac)\n done\n\n(* FIXME: move *)\nlemma no_default_zombie:\n \"cap_relation (default_cap tp p sz d) cap \\ \\isZombie cap\"\n by (cases tp, auto simp: isCap_simps)\n\nlemmas updateNewFreeIndex_typ_ats[wp] = typ_at_lifts[OF updateNewFreeIndex_typ_at']\n\nlemma updateNewFreeIndex_valid_objs[wp]:\n \"\\valid_objs'\\ updateNewFreeIndex slot \\\\_. valid_objs'\\\"\n apply (simp add: updateNewFreeIndex_def getSlotCap_def)\n apply (wp getCTE_wp' | wpc | simp add: updateTrackedFreeIndex_def)+\n done\n\nlemma insertNewCap_valid_objs [wp]:\n \"\\ valid_objs' and valid_cap' cap and pspace_aligned' and pspace_distinct'\\\n insertNewCap parent slot cap\n \\\\_. valid_objs'\\\"\n apply (simp add: insertNewCap_def)\n apply (wp setCTE_valid_objs getCTE_wp')\n apply clarsimp\n done\n\nlemma insertNewCap_valid_cap [wp]:\n \"\\ valid_cap' c \\\n insertNewCap parent slot cap\n \\\\_. valid_cap' c\\\"\n apply (simp add: insertNewCap_def)\n apply (wp getCTE_wp')\n apply clarsimp\n done\n\nlemmas descendants_of'_mdbPrev = descendants_of_prev_update\n\nlemma insertNewCap_ranges:\n \"\\\\s. descendants_range' c p (ctes_of s) \\\n descendants_range' cap p (ctes_of s) \\\n capRange c \\ capRange cap = {} \\\n cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n sameRegionAs (cteCap cte) cap) p s \\\n valid_mdb' s \\ valid_objs' s\\\n insertNewCap p slot cap\n \\\\_ s. descendants_range' c p (ctes_of s)\\\"\n apply (simp add: insertNewCap_def)\n apply (wp getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (rule conjI)\n apply (clarsimp simp: valid_mdb'_def valid_mdb_ctes_def no_0_def)\n apply (case_tac ctea)\n apply (case_tac cteb)\n apply (clarsimp simp: nullPointer_def cong: if_cong)\n apply (simp (no_asm) add: descendants_range'_def descendants_of'_mdbPrev)\n apply (subst mdb_insert_again_child.descendants)\n apply unfold_locales[1]\n apply (simp add: valid_mdb'_def)\n apply (assumption|rule refl)+\n apply (frule sameRegionAs_classes, clarsimp simp: isCap_simps)\n apply (erule (1) ctes_of_valid_cap')\n apply (simp add: valid_mdb'_def valid_mdb_ctes_def)\n apply clarsimp\n apply (clarsimp simp: isMDBParentOf_def)\n apply (clarsimp simp: isCap_simps valid_mdb'_def\n valid_mdb_ctes_def ut_revocable'_def)\n apply clarsimp\n apply (rule context_conjI, blast)\n apply (clarsimp simp: descendants_range'_def)\n done\n\nlemma insertNewCap_overlap_reserved'[wp]:\n \"\\\\s. caps_overlap_reserved' (capRange c) s\\\n capRange c \\ capRange cap = {} \\ capAligned cap \\\n cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n sameRegionAs (cteCap cte) cap) p s \\\n valid_mdb' s \\ valid_objs' s\\\n insertNewCap p slot cap\n \\\\_ s. caps_overlap_reserved' (capRange c) s\\\"\n apply (simp add: insertNewCap_def caps_overlap_reserved'_def)\n apply (wp getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (rule conjI)\n apply (clarsimp simp: valid_mdb'_def valid_mdb_ctes_def no_0_def)\n apply (case_tac ctea)\n apply (case_tac cteb)\n apply (clarsimp simp: nullPointer_def ball_ran_modify_map_eq\n caps_overlap_reserved'_def[symmetric])\n apply (clarsimp simp: ran_def split: if_splits)\n apply (case_tac \"slot = a\")\n apply clarsimp\n apply (rule disjoint_subset)\n apply (erule(1) usableRange_subseteq)\n apply (simp add:untypedCapRange Int_ac)+\n apply (subst Int_commute)\n apply (erule(2) caps_overlap_reserved'_D)\n done\n\ncrunch ksArch[wp]: insertNewCap \"\\s. P (ksArchState s)\"\n (wp: crunch_wps)\n\nlemma inv_untyped_corres_helper1:\n \"list_all2 cap_relation (map (\\ref. default_cap tp ref sz d) orefs) cps\n \\\n corres dc\n (\\s. pspace_aligned s \\ pspace_distinct s\n \\ valid_objs s \\ valid_mdb s \\ valid_list s\n \\ cte_wp_at is_untyped_cap p s\n \\ (\\tup \\ set (zip crefs orefs).\n cte_wp_at (\\c. cap_range (default_cap tp (snd tup) sz d) \\ untyped_range c) p s)\n \\ (\\tup \\ set (zip crefs orefs).\n descendants_range (default_cap tp (snd tup) sz d) p s)\n \\ (\\tup \\ set (zip crefs orefs).\n caps_overlap_reserved (untyped_range (default_cap tp (snd tup) sz d)) s)\n \\ (\\tup \\ set (zip crefs orefs). real_cte_at (fst tup) s)\n \\ (\\tup \\ set (zip crefs orefs).\n cte_wp_at ((=) cap.NullCap) (fst tup) s)\n \\ distinct (p # (map fst (zip crefs orefs)))\n \\ distinct_sets (map (\\tup. cap_range (default_cap tp (snd tup) sz d)) (zip crefs orefs))\n \\ (\\tup \\ set (zip crefs orefs).\n valid_cap (default_cap tp (snd tup) sz d) s))\n (\\s. (\\tup \\ set (zip (map cte_map crefs) cps). valid_cap' (snd tup) s)\n \\ (\\tup \\ set (zip (map cte_map crefs) cps). cte_wp_at' (\\c. cteCap c = NullCap) (fst tup) s)\n \\ cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n (\\tup \\ set (zip (map cte_map crefs) cps).\n sameRegionAs (cteCap cte) (snd tup)))\n (cte_map p) s\n \\ distinct ((cte_map p) # (map fst (zip (map cte_map crefs) cps)))\n \\ valid_mdb' s \\ valid_objs' s \\ pspace_aligned' s \\ pspace_distinct' s\n \\ (\\tup \\ set (zip (map cte_map crefs) cps). descendants_range' (snd tup) (cte_map p) (ctes_of s))\n \\ (\\tup \\ set (zip (map cte_map crefs) cps).\n caps_overlap_reserved' (capRange (snd tup)) s)\n \\ distinct_sets (map capRange (map snd (zip (map cte_map crefs) cps))))\n (sequence_x (map (create_cap tp sz p d) (zip crefs orefs)))\n (zipWithM_x (insertNewCap (cte_map p))\n ((map cte_map crefs)) cps)\"\n apply (simp add: zipWithM_x_def zipWith_def split_def)\n apply (fold mapM_x_def)\n apply (rule corres_list_all2_mapM_)\n apply (rule corres_guard_imp)\n apply (erule insertNewCap_corres)\n apply (clarsimp simp: cte_wp_at_def is_cap_simps)\n apply (clarsimp simp: fun_upd_def cte_wp_at_ctes_of)\n apply clarsimp\n apply (rule hoare_pre, wp hoare_vcg_const_Ball_lift)\n apply clarsimp\n apply (rule conjI)\n apply (clarsimp simp: cte_wp_at_caps_of_state\n cap_range_def[where c=\"default_cap a b c d\" for a b c d])\n apply (drule(2) caps_overlap_reservedD[rotated])\n apply (simp add:Int_ac)\n apply (rule conjI)\n apply (clarsimp simp: valid_cap_def)\n apply (rule conjI)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (rule conjI)\n apply (clarsimp simp:Int_ac)\n apply (erule disjoint_subset2[rotated])\n apply fastforce\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (rule conjI)\n subgoal by fastforce\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps valid_cap_def)\n apply (fastforce simp: image_def)\n apply (rule hoare_pre)\n apply (wp\n hoare_vcg_const_Ball_lift\n insertNewCap_valid_mdb hoare_vcg_all_lift insertNewCap_ranges\n | subst cte_wp_at_cteCaps_of)+\n apply (subst(asm) cte_wp_at_cteCaps_of)+\n apply (clarsimp simp only:)\n apply simp\n apply (rule conjI)\n apply clarsimp\n apply (thin_tac \"cte_map p \\ S\" for S)\n apply (erule notE, erule rev_image_eqI)\n apply simp\n apply (rule conjI,clarsimp+)\n apply (rule conjI,erule caps_overlap_reserved'_subseteq)\n apply (rule untypedRange_in_capRange)\n apply (rule conjI,erule no_default_zombie)\n apply (rule conjI, clarsimp simp:Int_ac)\n apply fastforce\n apply (clarsimp simp:Int_ac valid_capAligned )\n apply fastforce\n apply (rule list_all2_zip_split)\n apply (simp add: list_all2_map2 list_all2_refl)\n apply (simp add: list_all2_map1)\n done\n\nlemma createNewCaps_valid_pspace_extras:\n \"\\(\\s. n \\ 0 \\ ptr \\ 0 \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ pspace_no_overlap' ptr sz s\n \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s\n \\ ksCurDomain s \\ maxDomain\n )\\\n createNewCaps ty ptr n us d\n \\\\rv. pspace_aligned'\\\"\n \"\\(\\s. n \\ 0 \\ ptr \\ 0 \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ pspace_no_overlap' ptr sz s\n \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s\n \\ ksCurDomain s \\ maxDomain\n )\\\n createNewCaps ty ptr n us d\n \\\\rv. pspace_canonical'\\\"\n \"\\(\\s. n \\ 0 \\ ptr \\ 0 \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ pspace_no_overlap' ptr sz s\n \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s\n \\ ksCurDomain s \\ maxDomain\n )\\\n createNewCaps ty ptr n us d\n \\\\rv. pspace_distinct'\\\"\n \"\\(\\s. n \\ 0 \\ ptr \\ 0 \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ pspace_no_overlap' ptr sz s\n \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s\n \\ ksCurDomain s \\ maxDomain\n )\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_mdb'\\\"\n \"\\(\\s. n \\ 0 \\ ptr \\ 0 \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz)\n \\ ptr && ~~ mask sz \\ kernel_mappings\n \\ pspace_no_overlap' ptr sz s\n \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s\n \\ ksCurDomain s \\ maxDomain\n )\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_objs'\\\"\n apply (rule hoare_grab_asm)+\n apply (rule hoare_pre,rule hoare_strengthen_post[OF createNewCaps_valid_pspace])\n apply (simp add:valid_pspace'_def)+\n apply (rule hoare_grab_asm)+\n apply (rule hoare_pre,rule hoare_strengthen_post[OF createNewCaps_valid_pspace])\n apply (simp add:valid_pspace'_def)+\n apply (rule hoare_grab_asm)+\n apply (rule hoare_pre,rule hoare_strengthen_post[OF createNewCaps_valid_pspace])\n apply (simp add:valid_pspace'_def)+\n apply (rule hoare_grab_asm)+\n apply (rule hoare_pre,rule hoare_strengthen_post[OF createNewCaps_valid_pspace])\n apply (simp add:valid_pspace'_def)+\n apply (rule hoare_grab_asm)+\n apply (rule hoare_pre,rule hoare_strengthen_post[OF createNewCaps_valid_pspace])\n apply (simp add:valid_pspace'_def)+\n done\n\ndeclare map_fst_zip_prefix[simp]\n\ndeclare map_snd_zip_prefix[simp]\n\ndeclare word_unat_power [symmetric, simp del]\n\nlemma createNewCaps_range_helper:\n \"\\\\s. range_cover ptr sz (APIType_capBits tp us) n \\ 0 < n\\\n createNewCaps tp ptr n us d\n \\\\rv s. \\capfn.\n rv = map capfn (map (\\p. ptr_add ptr (p * 2 ^ (APIType_capBits tp us)))\n [0 ..< n])\n \\ (\\p. capClass (capfn p) = PhysicalClass\n \\ capUntypedPtr (capfn p) = p\n \\ capBits (capfn p) = (APIType_capBits tp us))\\\"\n apply (simp add: createNewCaps_def toAPIType_def Arch_createNewCaps_def\n split del: if_split cong: option.case_cong)\n apply (rule hoare_grab_asm)+\n apply (frule range_cover.range_cover_n_less)\n apply (frule range_cover.unat_of_nat_n)\n apply (cases tp, simp_all split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n apply (rule hoare_pre, wp)\n apply (frule range_cover_not_zero[rotated -1],simp)\n apply (clarsimp simp: APIType_capBits_def objBits_simps archObjSize_def ptr_add_def o_def)\n apply (subst upto_enum_red')\n apply unat_arith\n apply (clarsimp simp: o_def fromIntegral_def toInteger_nat fromInteger_nat)\n apply fastforce\n apply (rule hoare_pre,wp createObjects_ret2)\n apply (clarsimp simp: APIType_capBits_def word_bits_def bit_simps\n objBits_simps archObjSize_def ptr_add_def o_def)\n apply (fastforce simp: objBitsKO_def objBits_def)\n apply (rule hoare_pre,wp createObjects_ret2)\n apply (clarsimp simp: APIType_capBits_def word_bits_def\n objBits_simps archObjSize_def ptr_add_def o_def)\n apply (fastforce simp: objBitsKO_def objBits_def)\n apply (rule hoare_pre,wp createObjects_ret2)\n apply (clarsimp simp: APIType_capBits_def word_bits_def\n objBits_simps archObjSize_def ptr_add_def o_def)\n apply (fastforce simp: objBitsKO_def objBits_def)\n apply (rule hoare_pre,wp createObjects_ret2)\n apply (clarsimp simp: APIType_capBits_def word_bits_def\n objBits_simps archObjSize_def ptr_add_def o_def)\n apply (fastforce simp: objBitsKO_def objBits_def)\n apply (wp createObjects_ret2\n | clarsimp simp: APIType_capBits_def objBits_if_dev archObjSize_def\n word_bits_def bit_simps\n split del: if_split\n | simp add: objBits_simps\n | (rule exI, (fastforce simp: bit_simps)))+\n done\n\nlemma createNewCaps_range_helper2:\n \"\\\\s. range_cover ptr sz (APIType_capBits tp us) n \\ 0 < n\\\n createNewCaps tp ptr n us d\n \\\\rv s. \\cp \\ set rv. capRange cp \\ {} \\ capRange cp \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\\\"\n apply (rule hoare_assume_pre)\n apply (rule hoare_strengthen_post)\n apply (rule createNewCaps_range_helper)\n apply (clarsimp simp: capRange_def ptr_add_def word_unat_power[symmetric]\n simp del: atLeastatMost_subset_iff\n dest!: less_two_pow_divD)\n apply (rule conjI)\n apply (rule is_aligned_no_overflow)\n apply (rule is_aligned_add_multI [OF _ _ refl])\n apply (fastforce simp:range_cover_def)\n apply simp\n apply (rule range_subsetI)\n apply (rule machine_word_plus_mono_right_split[OF range_cover.range_cover_compare])\n apply (assumption)+\n apply (simp add:range_cover_def word_bits_def)\n apply (frule range_cover_cell_subset)\n apply (erule of_nat_mono_maybe[rotated])\n apply (drule (1) range_cover.range_cover_n_less )\n apply (clarsimp)\n apply (erule impE)\n apply (simp add:range_cover_def)\n apply (rule is_aligned_no_overflow)\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (fastforce simp:range_cover_def)\n apply simp\n done\n\nlemma createNewCaps_children:\n \"\\\\s. cap = UntypedCap d (ptr && ~~ mask sz) sz idx\n \\ range_cover ptr sz (APIType_capBits tp us) n \\ 0 < n\\\n createNewCaps tp ptr n us d\n \\\\rv s. \\y \\ set rv. (sameRegionAs cap y)\\\"\n apply (rule hoare_assume_pre)\n apply (rule hoare_chain [OF createNewCaps_range_helper2])\n apply fastforce\n apply clarsimp\n apply (drule(1) bspec)\n apply (clarsimp simp: sameRegionAs_def3 isCap_simps)\n apply (drule(1) subsetD)\n apply clarsimp\n apply (erule order_trans[rotated])\n apply (rule word_and_le2)\n done\n\nfun isDeviceCap :: \"capability \\ bool\"\nwhere\n \"isDeviceCap (UntypedCap d _ _ _) = d\"\n| \"isDeviceCap (ArchObjectCap (PageCap _ _ _ _ d _)) = d\"\n| \"isDeviceCap _ = False\"\n\nlemmas makeObjectKO_simp = makeObjectKO_def[split_simps X64_H.object_type.split\n Structures_H.kernel_object.split ArchTypes_H.apiobject_type.split\n sum.split arch_kernel_object.split]\n\nlemma createNewCaps_descendants_range':\n \"\\\\s. descendants_range' p q (ctes_of s) \\\n range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0 \\\n pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us d\n \\ \\rv s. descendants_range' p q (ctes_of s)\\\"\n apply (clarsimp simp:descendants_range'_def2 descendants_range_in'_def2)\n apply (wp createNewCaps_null_filter')\n apply fastforce\n done\n\nlemma caps_overlap_reserved'_def2:\n \"caps_overlap_reserved' S =\n (\\s. (\\cte \\ ran (null_filter' (ctes_of s)).\n isUntypedCap (cteCap cte) \\\n usableUntypedRange (cteCap cte) \\ S = {}))\"\n apply (rule ext)\n apply (clarsimp simp:caps_overlap_reserved'_def)\n apply (intro iffI ballI impI)\n apply (elim ballE impE)\n apply simp\n apply simp\n apply (simp add:ran_def null_filter'_def split:if_split_asm option.splits)\n apply (elim ballE impE)\n apply simp\n apply simp\n apply (clarsimp simp: ran_def null_filter'_def is_cap_simps\n simp del: split_paired_All split_paired_Ex split: if_splits)\n apply (drule_tac x = a in spec)\n apply simp\n done\n\nlemma createNewCaps_caps_overlap_reserved':\n \"\\\\s. caps_overlap_reserved' S s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ 0 < n \\\n range_cover ptr sz (APIType_capBits ty us) n\\\n createNewCaps ty ptr n us d\n \\\\rv s. caps_overlap_reserved' S s\\\"\n apply (clarsimp simp: caps_overlap_reserved'_def2)\n apply (wp createNewCaps_null_filter')\n apply fastforce\n done\n\nlemma createNewCaps_caps_overlap_reserved_ret':\n \"\\\\s. caps_overlap_reserved'\n {ptr..ptr + of_nat n * 2 ^ APIType_capBits ty us - 1} s \\\n pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s \\\n 0 < n \\ range_cover ptr sz (APIType_capBits ty us) n\\\n createNewCaps ty ptr n us d\n \\\\rv s. \\y\\set rv. caps_overlap_reserved' (capRange y) s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp:valid_def)\n apply (frule use_valid[OF _ createNewCaps_range_helper])\n apply fastforce\n apply clarsimp\n apply (erule use_valid[OF _ createNewCaps_caps_overlap_reserved'])\n apply (intro conjI,simp_all)\n apply (erule caps_overlap_reserved'_subseteq)\n apply (drule(1) range_cover_subset)\n apply simp\n apply (clarsimp simp: ptr_add_def capRange_def\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n done\n\nlemma createNewCaps_descendants_range_ret':\n \"\\\\s. (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ descendants_range_in' {ptr..ptr + of_nat n * 2^(APIType_capBits ty us) - 1} cref (ctes_of s)\\\n createNewCaps ty ptr n us d\n \\ \\rv s. \\y\\set rv. descendants_range' y cref (ctes_of s)\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: valid_def)\n apply (frule use_valid[OF _ createNewCaps_range_helper])\n apply simp\n apply (erule use_valid[OF _ createNewCaps_descendants_range'])\n apply (intro conjI,simp_all)\n apply (clarsimp simp:descendants_range'_def descendants_range_in'_def)\n apply (drule(1) bspec)+\n apply (clarsimp simp:cte_wp_at_ctes_of)\n apply (erule disjoint_subset2[rotated])\n apply (drule(1) range_cover_subset)\n apply simp\n apply (simp add:capRange_def ptr_add_def)\n done\n\nlemma createNewCaps_parent_helper:\n \"\\\\s. cte_wp_at' (\\cte. cteCap cte = UntypedCap d (ptr && ~~ mask sz) sz idx) p s\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ (ty = APIObjectType ArchTypes_H.CapTableObject \\ 0 < us)\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n \\\n createNewCaps ty ptr n us d\n \\\\rv. cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n (\\tup\\set (zip (xs rv) rv).\n sameRegionAs (cteCap cte) (snd tup)))\n p\\\"\n apply (rule hoare_post_imp [where Q=\"\\rv s. \\cte. cte_wp_at' ((=) cte) p s\n \\ isUntypedCap (cteCap cte)\n \\ (\\tup\\set (zip (xs rv) rv).\n sameRegionAs (cteCap cte) (snd tup))\"])\n apply (clarsimp elim!: cte_wp_at_weakenE')\n apply (rule hoare_pre)\n apply (wp hoare_vcg_ex_lift createNewCaps_cte_wp_at'\n set_tuple_pick createNewCaps_children)\n apply (auto simp:cte_wp_at'_def isCap_simps)\n done\n\nlemma createNewCaps_valid_cap':\n \"\\\\s. pspace_no_overlap' ptr sz s \\\n valid_pspace' s \\ n \\ 0 \\\n range_cover ptr sz (APIType_capBits ty us) n \\\n (ty = APIObjectType ArchTypes_H.CapTableObject \\ 0 < us) \\\n (ty = APIObjectType apiobject_type.Untyped \\ minUntypedSizeBits \\ us \\ us \\ maxUntypedSizeBits) \\\n ptr \\ 0 \\ sz \\ maxUntypedSizeBits \\ canonical_address (ptr && ~~ mask sz) \\ ptr && ~~ mask sz \\ kernel_mappings \\\n createNewCaps ty ptr n us d\n \\\\r s. \\cap\\set r. s \\' cap\\\"\n apply (rule hoare_assume_pre)\n apply clarsimp\n apply (erule createNewCaps_valid_cap)\n apply simp+\n done\n\nlemma dmo_ctes_of[wp]:\n \"\\\\s. P (ctes_of s)\\ doMachineOp mop \\\\rv s. P (ctes_of s)\\\"\n by (simp add: doMachineOp_def split_def | wp select_wp)+\n\nlemma createNewCaps_ranges:\n \"\\\\s. range_cover ptr sz (APIType_capBits ty us) n \\ 0\n createNewCaps ty ptr n us d\n \\\\rv s. distinct_sets (map capRange rv)\\\"\n apply (rule hoare_assume_pre)\n apply (rule hoare_chain)\n apply (rule createNewCaps_range_helper)\n apply fastforce\n apply (clarsimp simp: distinct_sets_prop distinct_prop_map)\n apply (rule distinct_prop_distinct)\n apply simp\n apply (clarsimp simp: capRange_def simp del: Int_atLeastAtMost\n dest!: less_two_pow_divD)\n apply (rule aligned_neq_into_no_overlap[simplified field_simps])\n apply (rule notI)\n apply (erule(3) ptr_add_distinct_helper)\n apply (simp add:range_cover_def word_bits_def)\n apply (erule range_cover.range_cover_n_le(1)[where 'a=machine_word_len])\n apply (clarsimp simp: ptr_add_def word_unat_power[symmetric])\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (simp add:range_cover_def)+\n apply (clarsimp simp: ptr_add_def word_unat_power[symmetric])\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (simp add:range_cover_def)+\n done\n\nlemma createNewCaps_ranges':\n \"\\\\s. range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n\\\n createNewCaps ty ptr n us d\n \\\\rv s. distinct_sets (map capRange (map snd (zip xs rv)))\\\"\n apply (rule hoare_strengthen_post)\n apply (rule createNewCaps_ranges)\n apply (simp add: distinct_sets_prop del: map_map)\n apply (erule distinct_prop_prefixE)\n apply (rule Sublist.map_mono_prefix)\n apply (rule map_snd_zip_prefix [unfolded less_eq_list_def])\n done\n\ndeclare split_paired_Ex[simp del]\nlemmas corres_split_retype_createNewCaps\n = corres_split[OF corres_retype_region_createNewCaps,\n simplified bind_assoc, simplified ]\ndeclare split_paired_Ex[simp add]\n\nlemma retype_region_caps_overlap_reserved:\n \"\\valid_pspace and valid_mdb and\n pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz and\n caps_overlap_reserved\n {ptr..ptr + of_nat n * 2^obj_bits_api (APIType_map2 (Inr ao')) us - 1} and\n (\\s. \\slot. cte_wp_at (\\c. up_aligned_area ptr sz \\ cap_range c \\ cap_is_device c = dev) slot s) and\n K (APIType_map2 (Inr ao') = Structures_A.apiobject_type.CapTableObject \\ 0 < us) and\n K (range_cover ptr sz (obj_bits_api (APIType_map2 (Inr ao')) us) n) and\n K (S \\ {ptr..ptr + of_nat n *\n 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us - 1})\\\n retype_region ptr n us (APIType_map2 (Inr ao')) dev\n \\\\rv s. caps_overlap_reserved S s\\\"\n apply (rule hoare_gen_asm)+\n apply (simp (no_asm) add:caps_overlap_reserved_def2)\n apply (rule hoare_pre)\n apply (wp retype_region_caps_of)\n apply simp+\n apply (simp add:caps_overlap_reserved_def2)\n apply (intro conjI,simp+)\n apply clarsimp\n apply (drule bspec)\n apply simp+\n apply (erule(1) disjoint_subset2)\n done\n\nlemma retype_region_caps_overlap_reserved_ret:\n \"\\valid_pspace and valid_mdb and caps_no_overlap ptr sz and\n pspace_no_overlap_range_cover ptr sz and\n caps_overlap_reserved\n {ptr..ptr + of_nat n * 2^obj_bits_api (APIType_map2 (Inr ao')) us - 1} and\n (\\s. \\slot. cte_wp_at (\\c. up_aligned_area ptr sz \\ cap_range c \\ cap_is_device c = dev) slot s) and\n K (APIType_map2 (Inr ao') = Structures_A.apiobject_type.CapTableObject \\ 0 < us) and\n K (range_cover ptr sz (obj_bits_api (APIType_map2 (Inr ao')) us) n)\\\n retype_region ptr n us (APIType_map2 (Inr ao')) dev\n \\\\rv s. \\y\\set rv. caps_overlap_reserved (untyped_range (default_cap\n (APIType_map2 (Inr ao')) y us d)) s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp:valid_def)\n apply (frule retype_region_ret[unfolded valid_def,simplified,THEN spec,THEN bspec])\n apply clarsimp\n apply (erule use_valid[OF _ retype_region_caps_overlap_reserved])\n apply clarsimp\n apply (intro conjI,simp_all)\n apply fastforce\n apply (case_tac ao')\n apply (simp_all add:APIType_map2_def)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type)\n apply (simp_all add:obj_bits_api_def ptr_add_def)\n apply (drule(1) range_cover_subset)\n apply (clarsimp)+\n done\n\nlemma updateFreeIndex_pspace_no_overlap':\n \"\\\\s. pspace_no_overlap' ptr sz s \\\n valid_pspace' s \\ cte_wp_at' (isUntypedCap o cteCap) src s\\\n updateFreeIndex src index\n \\\\r s. pspace_no_overlap' ptr sz s\\\"\n apply (simp add: updateFreeIndex_def getSlotCap_def updateTrackedFreeIndex_def)\n apply (rule hoare_pre)\n apply (wp getCTE_wp' | wp (once) pspace_no_overlap'_lift\n | simp)+\n apply (clarsimp simp:valid_pspace'_def pspace_no_overlap'_def)\n done\n\nlemma updateFreeIndex_updateCap_caps_overlap_reserved:\n \"\\\\s. valid_mdb' s \\ valid_objs' s \\ S \\ untypedRange cap \\\n usableUntypedRange (capFreeIndex_update (\\_. index) cap) \\ S = {} \\\n isUntypedCap cap \\ descendants_range_in' S src (ctes_of s) \\\n cte_wp_at' (\\c. cteCap c = cap) src s\\\n updateCap src (capFreeIndex_update (\\_. index) cap)\n \\\\r s. caps_overlap_reserved' S s\\\"\n apply (clarsimp simp:caps_overlap_reserved'_def)\n apply (wp updateCap_ctes_of_wp)\n apply (clarsimp simp:modify_map_def cte_wp_at_ctes_of)\n apply (erule ranE)\n apply (clarsimp split:if_split_asm simp:valid_mdb'_def valid_mdb_ctes_def)\n apply (case_tac cte)\n apply (case_tac ctea)\n apply simp\n apply (drule untyped_incD')\n apply (simp+)[4]\n apply clarify\n apply (erule subset_splitE)\n apply (simp del:usable_untyped_range.simps)\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (elim conjE)\n apply blast\n apply (simp)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (elim conjE)\n apply (drule(2) descendants_range_inD')\n apply simp\n apply (rule disjoint_subset[OF usableRange_subseteq])\n apply (rule valid_capAligned)\n apply (erule(1) ctes_of_valid_cap')\n apply (simp add:untypedCapRange)+\n apply (elim disjE)\n apply clarsimp\n apply (drule(2) descendants_range_inD')\n apply simp\n apply (rule disjoint_subset[OF usableRange_subseteq])\n apply (rule valid_capAligned)\n apply (erule(1) ctes_of_valid_cap')\n apply (simp add:untypedCapRange)+\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (rule disjoint_subset[OF usableRange_subseteq])\n apply (rule valid_capAligned)\n apply (erule(1) ctes_of_valid_cap')\n apply simp+\n apply blast\n done\n\nlemma updateFreeIndex_caps_overlap_reserved:\n \"\\\\s. valid_pspace' s \\ descendants_range_in' S src (ctes_of s)\n \\ cte_wp_at' ((\\cap. S \\ untypedRange cap \\\n usableUntypedRange (capFreeIndex_update (\\_. index) cap) \\ S = {} \\\n isUntypedCap cap) o cteCap) src s\\\n updateFreeIndex src index\n \\\\r s. caps_overlap_reserved' S s\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateFreeIndex_updateCap_caps_overlap_reserved getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of valid_pspace'_def)\n apply (clarsimp simp: valid_mdb'_def split: option.split)\n done\n\nlemma updateFreeIndex_updateCap_caps_no_overlap'':\n \"\\\\s. isUntypedCap cap \\ caps_no_overlap'' ptr sz s \\\n cte_wp_at' (\\c. cteCap c = cap) src s\\\n updateCap src (capFreeIndex_update (\\_. index) cap)\n \\\\r s. caps_no_overlap'' ptr sz s\\\"\n apply (clarsimp simp:caps_no_overlap''_def)\n apply (wp updateCap_ctes_of_wp)\n apply (clarsimp simp: modify_map_def ran_def cte_wp_at_ctes_of\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex)\n apply (case_tac \"a = src\")\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex)\n apply (erule subsetD[rotated])\n apply (elim allE impE)\n apply fastforce\n apply (clarsimp simp:isCap_simps)\n apply (erule subset_trans)\n apply (clarsimp simp:isCap_simps)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex)\n apply (erule subsetD[rotated])\n apply (elim allE impE)\n prefer 2\n apply assumption\n apply fastforce+\n done\n\nlemma updateFreeIndex_caps_no_overlap'':\n \"\\\\s. caps_no_overlap'' ptr sz s \\\n cte_wp_at' (isUntypedCap o cteCap) src s\\\n updateFreeIndex src index\n \\\\r s. caps_no_overlap'' ptr sz s\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateFreeIndex_updateCap_caps_no_overlap'' getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (clarsimp simp: caps_no_overlap''_def split: option.split)\n done\n\nlemma updateFreeIndex_descendants_of':\n \"\\\\s. cte_wp_at' (\\c. \\idx'. cteCap c = capFreeIndex_update (K idx') cap) ptr s \\ isUntypedCap cap \\\n P ((swp descendants_of') (null_filter' (ctes_of s)))\\\n updateCap ptr (capFreeIndex_update (\\_. index) cap)\n \\\\r s. P ((swp descendants_of') (null_filter' (ctes_of s)))\\\"\n apply (wp updateCap_ctes_of_wp)\n apply clarsimp\n apply (erule subst[rotated,where P = P])\n apply (rule ext)\n apply (clarsimp simp:null_filter_descendants_of'[OF null_filter_simp'])\n apply (rule mdb_inv_preserve.descendants_of)\n apply (clarsimp simp:cte_wp_at_ctes_of)\n apply (frule_tac m=\"ctes_of s\" and index=index in mdb_inv_preserve_updateCap)\n apply (clarsimp simp: isCap_simps)\n apply (clarsimp simp: isCap_simps)\n done\n\nlemma updateFreeIndex_updateCap_descendants_range_in':\n \"\\\\s. cte_wp_at' (\\c. cteCap c = cap) slot s \\ isUntypedCap cap \\\n descendants_range_in' S slot (ctes_of s)\\\n updateCap slot (capFreeIndex_update (\\_. index) cap)\n \\\\r s. descendants_range_in' S slot (ctes_of s)\\\"\n apply (rule hoare_pre)\n apply (wp descendants_range_in_lift'\n [where Q'=\"\\s. cte_wp_at' (\\c. cteCap c = cap) slot s \\ isUntypedCap cap\" and\n Q = \"\\s. cte_wp_at' (\\c. cteCap c = cap) slot s \\ isUntypedCap cap \"] )\n apply (wp updateFreeIndex_descendants_of')\n apply (clarsimp simp: cte_wp_at_ctes_of swp_def isCap_simps)\n apply (simp add:updateCap_def)\n apply (wp setCTE_weak_cte_wp_at getCTE_wp)\n apply (fastforce simp:cte_wp_at_ctes_of isCap_simps)\n apply (clarsimp)\n done\n\nlemma updateFreeIndex_descendants_range_in':\n \"\\\\s. cte_wp_at' (isUntypedCap o cteCap) slot s\n \\ descendants_range_in' S slot (ctes_of s)\\\n updateFreeIndex slot index\n \\\\r s. descendants_range_in' S slot (ctes_of s)\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateFreeIndex_updateCap_descendants_range_in' getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n done\n\nlemma caps_no_overlap''_def2:\n \"caps_no_overlap'' ptr sz =\n (\\s. \\cte\\ran (null_filter' (ctes_of s)).\n untypedRange (cteCap cte) \\\n {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1} \\ {} \\\n {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1} \\\n untypedRange (cteCap cte))\"\n apply (intro ext iffI)\n apply (clarsimp simp:caps_no_overlap''_def null_filter'_def ran_def)\n apply (drule_tac x = cte in spec)\n apply fastforce\n apply (clarsimp simp:caps_no_overlap''_def null_filter'_def)\n apply (case_tac \"cte = CTE capability.NullCap nullMDBNode\")\n apply clarsimp\n apply (drule_tac x = cte in bspec)\n apply (clarsimp simp:ran_def)\n apply (rule_tac x= a in exI)\n apply clarsimp\n apply clarsimp\n apply (erule subsetD)\n apply simp\n done\n\nlemma deleteObjects_caps_no_overlap'':\n \"\\\\s. invs' s \\ ct_active' s \\ sch_act_simple s \\\n cte_wp_at' (\\c. cteCap c = capability.UntypedCap d ptr sz idx) slot s \\\n caps_no_overlap'' ptr sz s \\\n descendants_range' (capability.UntypedCap d ptr sz idx) slot (ctes_of s)\\\n deleteObjects ptr sz\n \\\\rv s. caps_no_overlap'' ptr sz s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp split:if_splits)\n apply (clarsimp simp:caps_no_overlap''_def2 deleteObjects_def2 capAligned_def valid_cap'_def\n dest!:ctes_of_valid_cap')\n apply (wp deleteObjects_null_filter[where idx = idx and p = slot])\n apply (clarsimp simp:cte_wp_at_ctes_of invs_def)\n apply (case_tac cte)\n apply clarsimp\n apply (frule ctes_of_valid_cap')\n apply (simp add:invs_valid_objs')\n apply (simp add:valid_cap'_def capAligned_def)\n done\n\nlemma descendants_range_in_subseteq':\n \"\\descendants_range_in' A p ms ;B\\ A\\ \\ descendants_range_in' B p ms\"\n by (auto simp:descendants_range_in'_def cte_wp_at_ctes_of dest!:bspec)\n\nlemma updateFreeIndex_mdb_simple':\n \"\\\\s. descendants_of' src (ctes_of s) = {} \\\n pspace_no_overlap' (capPtr cap) (capBlockSize cap) s \\\n valid_pspace' s \\ cte_wp_at' (\\c. \\idx'. cteCap c = capFreeIndex_update (\\_. idx') cap) src s \\\n isUntypedCap cap\\\n updateCap src (capFreeIndex_update (\\_. idx) cap)\n \\\\rv. valid_mdb'\\\"\n apply (clarsimp simp:valid_mdb'_def updateCap_def valid_pspace'_def)\n apply (wp getCTE_wp)\n apply (clarsimp simp:cte_wp_at_ctes_of isCap_simps simp del:fun_upd_apply)\n\n apply (frule mdb_inv_preserve_updateCap[where index=idx and m=\"ctes_of s\" and slot=src for s])\n apply (simp add: isCap_simps)\n apply (simp add: modify_map_def)\n apply (clarsimp simp add: mdb_inv_preserve.preserve_stuff mdb_inv_preserve.by_products valid_mdb_ctes_def)\n\n proof -\n fix s cte ptr sz idx' d\n assume descendants: \"descendants_of' src (ctes_of s) = {}\"\n and cte_wp_at' :\"ctes_of s src = Some cte\" \"cteCap cte = capability.UntypedCap d ptr sz idx'\"\n and unt_inc' :\"untyped_inc' (ctes_of s)\"\n and valid_objs' :\"valid_objs' s\"\n and invp: \"mdb_inv_preserve (ctes_of s) (ctes_of s(src \\ cteCap_update (\\_. capability.UntypedCap d ptr sz idx) cte))\"\n (is \"mdb_inv_preserve (ctes_of s) ?ctes\")\n\n show \"untyped_inc' ?ctes\"\n using cte_wp_at'\n apply (clarsimp simp:untyped_inc'_def mdb_inv_preserve.descendants_of[OF invp, symmetric]\n descendants\n split del: if_split)\n apply (case_tac \"ctes_of s p\")\n apply (simp split: if_split_asm)\n apply (case_tac \"ctes_of s p'\")\n apply (simp split: if_split_asm)\n apply (case_tac \"the (ctes_of s p)\", case_tac \"the (ctes_of s p')\")\n apply clarsimp\n apply (cut_tac p=p and p'=p' in untyped_incD'[OF _ _ _ _ unt_inc'])\n apply assumption\n apply (clarsimp simp: isCap_simps split: if_split_asm)\n apply assumption\n apply (clarsimp simp: isCap_simps split: if_split_asm)\n apply (clarsimp simp: descendants split: if_split_asm)\n done\nqed\n\nlemma pspace_no_overlap_valid_untyped':\n \"\\ pspace_no_overlap' ptr bits s; is_aligned ptr bits; bits < word_bits;\n pspace_aligned' s \\\n \\ valid_untyped' d ptr bits idx s\"\n apply (clarsimp simp: valid_untyped'_def ko_wp_at'_def split del: if_split)\n apply (frule(1) pspace_no_overlapD')\n apply (simp add: obj_range'_def[symmetric] Int_commute)\n apply (erule disjE)\n apply (drule base_member_set[simplified field_simps])\n apply (simp add: word_bits_def)\n apply blast\n apply (simp split: if_split_asm)\n apply (erule notE, erule disjoint_subset2[rotated])\n apply (clarsimp simp: is_aligned_no_wrap'[OF _ word_of_nat_less])\n done\n\nlemma updateFreeIndex_valid_pspace_no_overlap':\n \"\\\\s. valid_pspace' s \\\n (\\ptr sz. pspace_no_overlap' ptr sz s \\ idx \\ 2 ^ sz \\\n cte_wp_at' ((\\c. isUntypedCap c \\ capPtr c = ptr \\ capBlockSize c = sz) o cteCap) src s)\n \\ is_aligned (of_nat idx :: machine_word) minUntypedSizeBits \\\n descendants_of' src (ctes_of s) = {}\\\n updateFreeIndex src idx\n \\\\r s. valid_pspace' s\\\"\n\n apply (clarsimp simp:valid_pspace'_def updateFreeIndex_def\n updateTrackedFreeIndex_def)\n apply (rule hoare_pre)\n apply (rule hoare_vcg_conj_lift)\n apply (clarsimp simp:updateCap_def getSlotCap_def)\n apply (wp getCTE_wp | simp)+\n apply (wp updateFreeIndex_mdb_simple' getCTE_wp'\n | simp add: getSlotCap_def)+\n apply (clarsimp simp:cte_wp_at_ctes_of valid_pspace'_def)\n apply (case_tac cte,simp add:isCap_simps)\n apply (frule(1) ctes_of_valid_cap')\n apply (clarsimp simp: valid_cap_simps' capAligned_def\n pspace_no_overlap_valid_untyped')\n done\n\ncrunch vms'[wp]: updateFreeIndex \"valid_machine_state'\"\n\n(* FIXME: move *)\nlemma setCTE_tcbDomain_inv[wp]:\n \"\\obj_at' (\\tcb. P (tcbState tcb)) t\\ setCTE ptr v \\\\_. obj_at' (\\tcb. P (tcbState tcb)) t\\\"\n apply (simp add: setCTE_def)\n apply (rule setObject_cte_obj_at_tcb', simp_all)\n done\n\n(* FIXME: move *)\ncrunch tcbState_inv[wp]: cteInsert \"obj_at' (\\tcb. P (tcbState tcb)) t\"\n (wp: crunch_simps hoare_drop_imps)\n\nlemma updateFreeIndex_clear_invs':\n \"\\\\s. invs' s \\\n (\\ptr sz. pspace_no_overlap' ptr sz s \\ idx \\ 2 ^ sz \\\n cte_wp_at' ((\\c. isUntypedCap c \\ capPtr c = ptr \\ capBlockSize c = sz) o cteCap) src s)\n \\ is_aligned (of_nat idx :: machine_word) minUntypedSizeBits\n \\ descendants_of' src (ctes_of s) = {}\\\n updateFreeIndex src idx\n \\\\r s. invs' s\\\"\n apply (clarsimp simp:invs'_def valid_state'_def)\n apply (wp updateFreeIndex_valid_pspace_no_overlap')\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def)\n apply (wp updateFreeIndex_valid_pspace_no_overlap' sch_act_wf_lift valid_queues_lift\n updateCap_iflive' tcb_in_cur_domain'_lift\n | simp add: pred_tcb_at'_def)+\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: ifunsafe'_def3 cteInsert_def setUntypedCapAsFull_def\n split del: if_split)\n apply wp+\n apply (rule hoare_vcg_conj_lift)\n apply (simp add:updateCap_def)\n apply wp+\n apply (wp valid_irq_node_lift)\n apply (rule hoare_vcg_conj_lift)\n apply (simp add:updateCap_def)\n apply (wp setCTE_irq_handlers' getCTE_wp)\n apply (simp add:updateCap_def)\n apply (wp irqs_masked_lift valid_queues_lift' cur_tcb_lift ct_idle_or_in_cur_domain'_lift\n hoare_vcg_disj_lift untyped_ranges_zero_lift getCTE_wp setCTE_ioports'\n | wp (once) hoare_use_eq[where f=\"gsUntypedZeroRanges\"]\n | simp add: getSlotCap_def\n | simp add: cte_wp_at_ctes_of)+\n apply (clarsimp simp: cte_wp_at_ctes_of fun_upd_def[symmetric])\n apply (clarsimp simp: isCap_simps)\n apply (frule(1) valid_global_refsD_with_objSize)\n apply clarsimp\n apply (intro conjI allI impI)\n apply (clarsimp simp: modify_map_def cteCaps_of_def ifunsafe'_def3 split:if_splits)\n apply (drule_tac x=src in spec)\n apply (clarsimp simp:isCap_simps)\n apply (rule_tac x = cref' in exI)\n apply clarsimp\n apply (drule_tac x = cref in spec)\n apply clarsimp\n apply (rule_tac x = cref' in exI)\n apply clarsimp\n apply (clarsimp simp: valid_pspace'_def)\n apply (erule untyped_ranges_zero_fun_upd, simp_all)\n apply (clarsimp simp: untypedZeroRange_def cteCaps_of_def isCap_simps)\n done\n\nlemma cte_wp_at_pspace_no_overlapI':\n \"\\invs' s; cte_wp_at' (\\c. cteCap c = capability.UntypedCap\n d (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz); sz < word_bits\\\n \\ pspace_no_overlap' ptr sz s\"\n apply (clarsimp simp:cte_wp_at_ctes_of)\n apply (case_tac cte,clarsimp)\n apply (frule ctes_of_valid_cap')\n apply (simp add:invs_valid_objs')\n apply (clarsimp simp:valid_cap'_def invs'_def valid_state'_def valid_pspace'_def\n valid_untyped'_def simp del:usableUntypedRange.simps)\n apply (unfold pspace_no_overlap'_def)\n apply (intro allI impI)\n apply (unfold ko_wp_at'_def)\n apply (clarsimp simp del: atLeastAtMost_iff\n atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff usableUntypedRange.simps)\n apply (drule spec)+\n apply (frule(1) pspace_distinctD')\n apply (frule(1) pspace_alignedD')\n apply (erule(1) impE)+\n apply (clarsimp simp: obj_range'_def simp del: atLeastAtMost_iff\n atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff usableUntypedRange.simps)\n apply (erule disjoint_subset2[rotated])\n apply (frule(1) le_mask_le_2p)\n apply (clarsimp simp:p_assoc_help)\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n done\n\nlemma descendants_range_caps_no_overlapI':\n \"\\invs' s; cte_wp_at' (\\c. cteCap c = capability.UntypedCap\n d (ptr && ~~ mask sz) sz idx) cref s;\n descendants_range_in' {ptr .. (ptr && ~~ mask sz) +2^sz - 1} cref\n (ctes_of s)\\\n \\ caps_no_overlap'' ptr sz s\"\n apply (frule invs_mdb')\n apply (clarsimp simp:valid_mdb'_def valid_mdb_ctes_def cte_wp_at_ctes_of\n simp del:usableUntypedRange.simps untypedRange.simps)\n apply (unfold caps_no_overlap''_def)\n apply (intro ballI impI)\n apply (erule ranE)\n apply (subgoal_tac \"isUntypedCap (cteCap ctea)\")\n prefer 2\n apply (rule untypedRange_not_emptyD)\n apply blast\n apply (case_tac ctea,case_tac cte)\n apply simp\n apply (drule untyped_incD')\n apply ((simp add:isCap_simps del:usableUntypedRange.simps untypedRange.simps)+)[4]\n apply (elim conjE subset_splitE)\n apply (erule subset_trans[OF _ psubset_imp_subset,rotated])\n apply (clarsimp simp:word_and_le2)\n apply simp\n apply (elim conjE)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule(2) descendants_range_inD')\n apply (simp add:untypedCapRange)+\n apply (erule subset_trans[OF _ equalityD1,rotated])\n apply (clarsimp simp:word_and_le2)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule disjoint_subset[rotated,\n where A' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply (clarsimp simp:word_and_le2 Int_ac)+\n done\n\nlemma cte_wp_at_caps_no_overlapI':\n \"\\invs' s; cte_wp_at' (\\c. (cteCap c) = capability.UntypedCap\n d (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz); sz < word_bits\\\n \\ caps_no_overlap'' ptr sz s\"\n apply (frule invs_mdb')\n apply (frule(1) le_mask_le_2p)\n apply (clarsimp simp:valid_mdb'_def valid_mdb_ctes_def cte_wp_at_ctes_of)\n apply (case_tac cte)\n apply simp\n apply (frule(1) ctes_of_valid_cap'[OF _ invs_valid_objs'])\n apply (unfold caps_no_overlap''_def)\n apply (intro ballI impI)\n apply (erule ranE)\n apply (subgoal_tac \"isUntypedCap (cteCap ctea)\")\n prefer 2\n apply (rule untypedRange_not_emptyD)\n apply blast\n apply (case_tac ctea)\n apply simp\n apply (drule untyped_incD')\n apply (simp add:isCap_simps)+\n apply (elim conjE)\n apply (erule subset_splitE)\n apply (erule subset_trans[OF _ psubset_imp_subset,rotated])\n apply (clarsimp simp: word_and_le2)\n apply simp\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (elim conjE)\n apply (drule disjoint_subset2[rotated,\n where B' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply clarsimp\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n apply simp\n apply simp\n apply (erule subset_trans[OF _ equalityD1,rotated])\n apply (clarsimp simp:word_and_le2)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule disjoint_subset[rotated,\n where A' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply (clarsimp simp:word_and_le2 Int_ac)+\n done\n\n\nlemma descendants_range_ex_cte':\n \"\\descendants_range_in' S p (ctes_of s');ex_cte_cap_wp_to' P q s'; S \\ capRange (cteCap cte);\n invs' s';ctes_of s' p = Some cte;isUntypedCap (cteCap cte)\\ \\ q \\ S\"\n apply (frule invs_valid_objs')\n apply (frule invs_mdb')\n apply (clarsimp simp:invs'_def valid_state'_def)\n apply (clarsimp simp: ex_cte_cap_to'_def cte_wp_at_ctes_of)\n apply (frule_tac cte = \"cte\" in valid_global_refsD')\n apply simp\n apply (case_tac \"\\irq. cteCap ctea = IRQHandlerCap irq\")\n apply clarsimp\n apply (erule(1) in_empty_interE[OF _ _ subsetD,rotated -1])\n apply (clarsimp simp:global_refs'_def)\n apply (erule_tac A = \"range P\" for P in subsetD)\n apply (simp add:range_eqI field_simps)\n apply (case_tac ctea)\n apply clarsimp\n apply (case_tac ctea)\n apply (drule_tac cte = \"cte\" and cte' = ctea in untyped_mdbD')\n apply assumption\n apply (clarsimp simp:isCap_simps)\n apply (drule_tac B = \"untypedRange (cteCap cte)\" in subsetD[rotated])\n apply (clarsimp simp:untypedCapRange)\n apply clarsimp\n apply (drule_tac x = \" (irq_node' s')\" in cte_refs_capRange[rotated])\n apply (erule(1) ctes_of_valid_cap')\n apply blast\n apply (clarsimp simp:isCap_simps)\n apply (simp add:valid_mdb'_def valid_mdb_ctes_def)\n apply (drule(2) descendants_range_inD')\n apply clarsimp\n apply (drule_tac x = \" (irq_node' s')\" in cte_refs_capRange[rotated])\n apply (erule(1) ctes_of_valid_cap')\n apply blast\n done\n\nlemma updateCap_isUntypedCap_corres:\n \"\\is_untyped_cap cap; isUntypedCap cap'; cap_relation cap cap'\\\n \\ corres dc\n (cte_wp_at (\\c. is_untyped_cap c \\ obj_ref_of c = obj_ref_of cap \\\n cap_bits c = cap_bits cap \\ cap_is_device c = cap_is_device cap) src and valid_objs and\n pspace_aligned and pspace_distinct)\n (cte_at' (cte_map src) and pspace_distinct' and pspace_aligned')\n (set_cap cap src) (updateCap (cte_map src) cap')\"\n apply (rule corres_name_pre)\n apply (simp add: updateCap_def)\n apply (frule state_relation_pspace_relation)\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (frule pspace_relation_cte_wp_atI)\n apply (fastforce simp: cte_wp_at_ctes_of)\n apply simp\n apply clarify\n apply (frule cte_map_inj_eq)\n apply (fastforce simp: cte_wp_at_ctes_of cte_wp_at_caps_of_state)+\n apply (clarsimp simp: is_cap_simps isCap_simps)\n apply (rule corres_guard_imp)\n apply (rule corres_symb_exec_r)\n apply (rule_tac F = \"cteCap_update (\\_. capability.UntypedCap dev r bits f) ctea\n = cteCap_update (\\cap. capFreeIndex_update (\\_. f) (cteCap cte)) cte\" in corres_gen_asm2)\n apply (rule_tac F = \" (cap.UntypedCap dev r bits f) = free_index_update (\\_. f) c\"\n in corres_gen_asm)\n apply simp\n apply (rule setCTE_UntypedCap_corres)\n apply ((clarsimp simp: cte_wp_at_caps_of_state cte_wp_at_ctes_of)+)[3]\n apply (subst identity_eq)\n apply (wp getCTE_sp getCTE_get no_fail_getCTE)+\n apply (clarsimp simp: cte_wp_at_ctes_of cte_wp_at_caps_of_state)+\n done\n\nend\n\nlemma updateFreeIndex_corres:\n \"\\is_untyped_cap cap; free_index_of cap = idx \\\n \\ corres dc\n (cte_wp_at (\\c. is_untyped_cap c \\ obj_ref_of c = obj_ref_of cap \\\n cap_bits c = cap_bits cap \\ cap_is_device c = cap_is_device cap) src and valid_objs\n and pspace_aligned and pspace_distinct)\n (cte_at' (cte_map src)\n and pspace_distinct' and pspace_aligned')\n (set_cap cap src) (updateFreeIndex (cte_map src) idx)\"\n apply (rule corres_name_pre)\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def)\n apply (rule corres_guard_imp)\n apply (rule corres_symb_exec_r_conj[where P'=\"cte_at' (cte_map src)\"])+\n apply (rule_tac F=\"isUntypedCap capa\n \\ cap_relation cap (capFreeIndex_update (\\_. idx) capa)\"\n in corres_gen_asm2)\n apply (rule updateCap_isUntypedCap_corres, simp+)\n apply (clarsimp simp: isCap_simps)\n apply simp\n apply (wp getSlotCap_wp)+\n apply (clarsimp simp: state_relation_def cte_wp_at_ctes_of)\n apply (rule no_fail_pre, wp no_fail_getSlotCap)\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (wp getSlotCap_wp)+\n apply (clarsimp simp: state_relation_def cte_wp_at_ctes_of)\n apply (rule no_fail_pre, wp no_fail_getSlotCap)\n apply simp\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_ctes_of cte_wp_at_caps_of_state)\n apply (frule state_relation_pspace_relation)\n apply (frule(1) pspace_relation_ctes_ofI[OF _ caps_of_state_cteD], simp+)\n apply (clarsimp simp: isCap_simps is_cap_simps\n cte_wp_at_caps_of_state free_index_of_def)\n done\n\nlocale invokeUntyped_proofs =\n fixes s cref reset ptr_base ptr tp us slots sz idx dev\n assumes vui: \"valid_untyped_inv_wcap'\n (Invocations_H.Retype cref reset ptr_base ptr tp us slots dev)\n (Some (UntypedCap dev (ptr && ~~ mask sz) sz idx)) s\"\n and misc: \"ct_active' s\" \"invs' s\"\n\nbegin\n\nlemma cte_wp_at': \"cte_wp_at' (\\cte. cteCap cte = capability.UntypedCap\n dev (ptr && ~~ mask sz) sz idx) cref s\"\n and cover: \"range_cover ptr sz (APIType_capBits tp us) (length (slots::machine_word list))\"\n and misc2: \"distinct slots\"\n \"slots \\ []\"\n \"\\slot\\set slots. cte_wp_at' (\\c. cteCap c = capability.NullCap) slot s\"\n \"\\x\\set slots. ex_cte_cap_wp_to' (\\_. True) x s\"\n using vui\n by (auto simp: cte_wp_at_ctes_of)\ninterpretation Arch . (*FIXME: arch_split*)\n\nlemma idx_cases:\n \"((\\ reset \\ idx \\ unat (ptr - (ptr && ~~ mask sz))) \\ reset \\ ptr = ptr && ~~ mask sz)\"\n using vui\n by (clarsimp simp: cte_wp_at_ctes_of)\n\nlemma desc_range:\n \"reset\n \\ descendants_range_in' {ptr..ptr + 2 ^ sz - 1} (cref) (ctes_of s)\"\n using vui by (clarsimp simp: empty_descendants_range_in')\nabbreviation(input)\n \"retype_range == {ptr..ptr + of_nat (length slots) * 2 ^ APIType_capBits tp us - 1}\"\n\nabbreviation(input)\n \"usable_range == {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n\n lemma not_0_ptr[simp]: \"ptr\\ 0\"\n using misc cte_wp_at'\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (case_tac cte)\n apply clarsimp\n apply (drule(1) ctes_of_valid_cap'[OF _ invs_valid_objs'])\n apply (simp add: valid_cap'_def)\n done\n\n lemma subset_stuff[simp]:\n \"retype_range \\ usable_range\"\n apply (rule range_cover_subset'[OF cover])\n apply (simp add:misc2)\n done\n\n lemma descendants_range[simp]:\n \"descendants_range_in' usable_range cref (ctes_of s)\"\n \"descendants_range_in' retype_range cref (ctes_of s)\"\n proof -\n have \"descendants_range_in' usable_range cref (ctes_of s)\"\n using misc idx_cases cte_wp_at' cover\n apply -\n apply (erule disjE)\n apply (erule cte_wp_at_caps_descendants_range_inI'\n [OF _ _ _ range_cover.sz(1)[where 'a=machine_word_len, folded word_bits_def]])\n apply simp+\n using desc_range\n apply simp\n done\n thus \"descendants_range_in' usable_range cref (ctes_of s)\"\n by simp\n thus \"descendants_range_in' retype_range cref (ctes_of s)\"\n by (rule descendants_range_in_subseteq'[OF _ subset_stuff])\n qed\n\n lemma vc'[simp] : \"s \\' capability.UntypedCap dev (ptr && ~~ mask sz) sz idx\"\n using misc cte_wp_at'\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (case_tac cte)\n apply clarsimp\n apply (erule ctes_of_valid_cap')\n apply (simp add: invs_valid_objs')\n done\n\nlemma ptr_cn[simp]:\n \"canonical_address (ptr && ~~ mask sz)\"\n using vc' unfolding valid_cap'_def by clarsimp\n\nlemma ptr_km[simp]:\n \"ptr && ~~ mask sz \\ kernel_mappings\"\n using vc' unfolding valid_cap'_def by clarsimp\n\nlemma sz_limit[simp]:\n \"sz \\ maxUntypedSizeBits\"\n using vc' unfolding valid_cap'_def by clarsimp\n\nlemma ps_no_overlap'[simp]: \"\\ reset \\ pspace_no_overlap' ptr sz s\"\n using misc cte_wp_at' cover idx_cases\n apply clarsimp\n apply (erule cte_wp_at_pspace_no_overlapI'\n [OF _ _ _ range_cover.sz(1)[where 'a=machine_word_len, folded word_bits_def]])\n apply (simp add: cte_wp_at_ctes_of)\n apply simp+\n done\n\nlemma caps_no_overlap'[simp]: \"caps_no_overlap'' ptr sz s\"\n using cte_wp_at' misc cover desc_range idx_cases\n apply -\n apply (erule disjE)\n apply (erule cte_wp_at_caps_no_overlapI'\n [OF _ _ _ range_cover.sz(1)[where 'a=machine_word_len, folded word_bits_def]])\n apply simp+\n apply (erule descendants_range_caps_no_overlapI')\n apply simp+\n done\n\n lemma idx_compare'[simp]:\"unat ((ptr && mask sz) + (of_nat (length slots)<< (APIType_capBits tp us))) \\ 2 ^ sz\"\n apply (rule le_trans[OF unat_plus_gt])\n apply (simp add: range_cover.unat_of_nat_n_shift[OF cover] range_cover_unat)\n apply (insert range_cover.range_cover_compare_bound[OF cover])\n apply simp\n done\n\n lemma ex_cte_no_overlap': \"\\P p. ex_cte_cap_wp_to' P p s \\ p \\ usable_range\"\n using cte_wp_at' misc\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (drule_tac cte = cte in descendants_range_ex_cte'[OF descendants_range(1)])\n apply (clarsimp simp: word_and_le2 isCap_simps)+\n done\n\n lemma cref_inv: \"cref \\ usable_range\"\n apply (insert misc cte_wp_at')\n apply (drule if_unsafe_then_capD')\n apply (simp add: invs'_def valid_state'_def)\n apply simp\n apply (erule ex_cte_no_overlap')\n done\n\n lemma slots_invD: \"\\x. x \\ set slots \\\n x \\ cref \\ x \\ usable_range \\ ex_cte_cap_wp_to' (\\_. True) x s\"\n using misc cte_wp_at' vui\n apply -\n apply clarsimp\n apply (drule(1) bspec)+\n apply (drule ex_cte_no_overlap')\n apply simp\n apply (clarsimp simp: cte_wp_at_ctes_of)\n done\n\n lemma usableRange_disjoint:\n \"usableUntypedRange (capability.UntypedCap d (ptr && ~~ mask sz) sz\n (unat ((ptr && mask sz) + of_nat (length slots) * 2 ^ APIType_capBits tp us))) \\\n {ptr..ptr + of_nat (length slots) * 2 ^ APIType_capBits tp us - 1} = {}\"\n proof -\n have idx_compare''[simp]:\n \"unat ((ptr && mask sz) + (of_nat (length slots) * (2::machine_word) ^ APIType_capBits tp us)) < 2 ^ sz\n \\ ptr + of_nat (length slots) * 2 ^ APIType_capBits tp us - 1\n < ptr + of_nat (length slots) * 2 ^ APIType_capBits tp us\"\n apply (rule word_leq_le_minus_one,simp)\n apply (rule neq_0_no_wrap)\n apply (rule machine_word_plus_mono_right_split)\n apply (simp add: shiftl_t2n range_cover_unat[OF cover] field_simps)\n apply (simp add: range_cover.sz(1)\n [where 'a=machine_word_len, folded word_bits_def, OF cover])+\n done\n show ?thesis\n apply (clarsimp simp: mask_out_sub_mask)\n apply (drule idx_compare'')\n apply simp\n done\n qed\n\nlemma szw: \"sz < word_bits\"\n using cte_wp_at_valid_objs_valid_cap'[OF cte_wp_at'] misc\n by (clarsimp simp: valid_cap_simps' capAligned_def invs_valid_objs')\n\nlemma idx_le_new_offs:\n \"\\ reset\n \\ idx \\ unat ((ptr && mask sz) + (of_nat (length slots) * 2 ^ (APIType_capBits tp us)))\"\n using misc idx_cases range_cover.range_cover_base_le[OF cover]\n apply (clarsimp simp only: simp_thms)\n apply (erule order_trans)\n apply (simp add: word_le_nat_alt[symmetric]\n shiftl_t2n mult.commute)\n done\n\nend\n\nlemma valid_sched_etcbs[elim!]: \"valid_sched_2 queues ekh sa cdom kh ct it \\ valid_etcbs_2 ekh kh\"\n by (simp add: valid_sched_def)\n\ncrunch ksIdleThread[wp]: deleteObjects \"\\s. P (ksIdleThread s)\"\n (simp: crunch_simps wp: hoare_drop_imps unless_wp ignore: freeMemory)\ncrunch ksCurDomain[wp]: deleteObjects \"\\s. P (ksCurDomain s)\"\n (simp: crunch_simps wp: hoare_drop_imps unless_wp ignore: freeMemory)\ncrunch irq_node[wp]: deleteObjects \"\\s. P (irq_node' s)\"\n (simp: crunch_simps wp: hoare_drop_imps unless_wp ignore: freeMemory)\n\nlemma deleteObjects_ksCurThread[wp]:\n \"\\\\s. P (ksCurThread s)\\ deleteObjects ptr sz \\\\_ s. P (ksCurThread s)\\\"\napply (simp add: deleteObjects_def3)\napply (wp | simp add: doMachineOp_def split_def)+\ndone\n\nlemma deleteObjects_ct_active':\n \"\\invs' and sch_act_simple and ct_active'\n and cte_wp_at' (\\c. cteCap c = UntypedCap d ptr sz idx) cref\n and (\\s. descendants_range' (UntypedCap d ptr sz idx) cref (ctes_of s))\n and K (sz < word_bits \\ is_aligned ptr sz)\\\n deleteObjects ptr sz\n \\\\_. ct_active'\\\"\n apply (simp add: ct_in_state'_def)\n apply (rule hoare_pre)\n apply wps\n apply (wp deleteObjects_st_tcb_at')\n apply (auto simp: ct_in_state'_def elim: pred_tcb'_weakenE)\ndone\n\ndefs cNodeOverlap_def:\n \"cNodeOverlap \\ \\cns inRange. \\p n. cns p = Some n\n \\ (\\ is_aligned p (cte_level_bits + n)\n \\ cte_level_bits + n \\ word_bits\n \\ ({p .. p + 2 ^ (cte_level_bits + n) - 1} \\ {p. inRange p} \\ {}))\"\n\nlemma cNodeNoOverlap:\n notes Int_atLeastAtMost[simp del]\n shows\n \"corres dc (\\s. \\cref. cte_wp_at (\\cap. is_untyped_cap cap\n \\ Collect R \\ usable_untyped_range cap) cref s\n \\ valid_objs s \\ pspace_aligned s)\n \\\n (return x) (stateAssert (\\s. \\ cNodeOverlap (gsCNodes s) R) [])\"\n apply (simp add: stateAssert_def assert_def)\n apply (rule corres_symb_exec_r[OF _ get_sp])\n apply (rule corres_req[rotated], subst if_P, assumption)\n apply simp\n apply (clarsimp simp: cNodeOverlap_def cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid_cap)\n apply (frule usable_range_subseteq[rotated], simp add: valid_cap_def)\n apply (clarsimp simp: valid_cap_def valid_untyped_def cap_table_at_gsCNodes_eq\n obj_at_def is_cap_table is_cap_simps)\n apply (frule(1) pspace_alignedD)\n apply simp\n apply (elim allE, drule(1) mp, simp add: obj_range_def valid_obj_def cap_aligned_def)\n apply (erule is_aligned_get_word_bits[where 'a=machine_word_len, folded word_bits_def])\n apply (clarsimp simp: is_aligned_no_overflow simp del: )\n apply blast\n apply (simp add: is_aligned_no_overflow power_overflow word_bits_def\n Int_atLeastAtMost)\n apply wp+\n done\n\nlemma reset_ineq_eq_idx_0:\n \"idx \\ 2 ^ sz \\ b \\ sz\n \\ (ptr :: obj_ref) \\ 0 \\ is_aligned ptr sz \\ sz < word_bits\n \\ (ptr + of_nat idx - 1 < ptr) = (idx = 0)\"\n apply (cases \"idx = 0\")\n apply (simp add: gt0_iff_gem1[symmetric] word_neq_0_conv)\n apply simp\n apply (subgoal_tac \"ptr \\ ptr + of_nat idx - 1\", simp_all)[1]\n apply (subst field_simps[symmetric], erule is_aligned_no_wrap')\n apply (subst word_less_nat_alt)\n apply simp\n apply (subst unat_of_nat_minus_1)\n apply (erule order_le_less_trans, rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (rule notI, simp)\n apply (erule order_less_le_trans[rotated])\n apply simp\n done\n\nlemma reset_addrs_same:\n \"idx \\ 2 ^ sz \\ resetChunkBits \\ sz\n \\ ptr \\ 0 \\ is_aligned ptr sz \\ sz < word_bits\n \\ [ptr , ptr + 2 ^ resetChunkBits .e. getFreeRef ptr idx - 1]\n = (map (\\i. getFreeRef ptr (i * 2 ^ resetChunkBits))\n ([i\\[0..<2 ^ (sz - resetChunkBits)].\n i * 2 ^ resetChunkBits < idx]))\"\n apply (simp add: upto_enum_step_def getFreeRef_def reset_ineq_eq_idx_0)\n apply (clarsimp simp: upto_enum_word o_def unat_div simp del: upt.simps)\n apply (subst unat_of_nat_minus_1)\n apply (rule_tac y=\"2 ^ sz\" in order_le_less_trans, simp)\n apply (rule power_strict_increasing, simp_all add: word_bits_def)[1]\n apply simp\n apply (rule_tac f=\"map f\" for f in arg_cong)\n apply (rule filter_upt_eq[symmetric])\n apply clarsimp\n apply (erule order_le_less_trans[rotated])\n apply simp\n apply (rule notI)\n apply (drule order_less_le_trans[where x=\"a * b\" for a b],\n rule_tac m=\"2 ^ resetChunkBits\" and n=idx in alignUp_ge_nat)\n apply simp+\n apply (simp add: field_simps)\n apply (simp only: mult_Suc_right[symmetric])\n apply (subst(asm) div_add_self1[where 'a=nat, simplified, symmetric])\n apply simp\n apply (simp only: field_simps)\n apply simp\n apply clarsimp\n apply (rule order_le_less_trans, rule div_mult_le, simp)\n apply (simp add: Suc_le_eq td_gal_lt[symmetric] power_add[symmetric])\n done\n\nlemmas descendants_of_null_filter' = null_filter_descendants_of'[OF null_filter_simp']\n\nlemmas deleteObjects_descendants\n = deleteObjects_null_filter[where P=\"\\c. Q (descendants_of' p c)\" for p Q,\n simplified descendants_of_null_filter']\n\nlemma updateFreeIndex_descendants_of2:\n \" \\\\s. cte_wp_at' (isUntypedCap o cteCap) ptr s \\\n P (\\y. descendants_of' y (ctes_of s))\\\n updateFreeIndex ptr index\n \\\\r s. P (\\y. descendants_of' y (ctes_of s))\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateFreeIndex_descendants_of'[simplified swp_def descendants_of_null_filter']\n getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps)\n done\n\ncrunch typ_at'[wp]: updateFreeIndex \"\\s. P (typ_at' T p s)\"\n\nlemma updateFreeIndex_cte_wp_at:\n \"\\\\s. cte_wp_at' (\\c. P (cteCap_update (if p = slot\n then capFreeIndex_update (\\_. idx) else id) c)) p s\\\n updateFreeIndex slot idx\n \\\\rv. cte_wp_at' P p\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def split del: if_split)\n apply (rule hoare_pre, wp updateCap_cte_wp_at' getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (case_tac \"the (ctes_of s p)\")\n apply (auto split: if_split_asm)\n done\n\nlemma ex_tupI:\n \"P (fst x) (snd x) \\ \\a b. P a b\"\n by blast\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n(* mostly stuff about PPtr/fromPPtr, which seems pretty soft *)\n\nlemma resetUntypedCap_corres:\n \"untypinv_relation ui ui'\n \\ corres (dc \\ dc)\n (invs and valid_untyped_inv_wcap ui\n (Some (cap.UntypedCap dev ptr sz idx))\n and ct_active and einvs\n and (\\_. \\ptr_base ptr' ty us slots dev'. ui = Invocations_A.Retype slot True\n ptr_base ptr' ty us slots dev))\n (invs' and valid_untyped_inv_wcap' ui' (Some (UntypedCap dev ptr sz idx)) and ct_active')\n (reset_untyped_cap slot)\n (resetUntypedCap (cte_map slot))\"\n apply (rule corres_gen_asm, clarsimp)\n apply (simp add: reset_untyped_cap_def resetUntypedCap_def\n liftE_bindE)\n apply (rule corres_guard_imp)\n apply (rule corres_split[OF getSlotCap_corres])\n apply simp\n apply (rule_tac F=\"cap = cap.UntypedCap dev ptr sz idx\n \\ (\\s. s \\ cap)\" in corres_gen_asm)\n apply (clarsimp simp: bits_of_def free_index_of_def unlessE_def\n split del: if_split)\n apply (rule corres_if[OF refl])\n apply (rule corres_returnOk[where P=\\ and P'=\\], simp)\n apply (simp add: liftE_bindE bits_of_def split del: if_split)\n apply (rule corres_split[OF deleteObjects_corres])\n apply (clarsimp simp add: valid_cap_def cap_aligned_def)\n apply (clarsimp simp add: valid_cap_def untyped_min_bits_def)\n apply (rule corres_if)\n apply simp\n apply (simp add: bits_of_def shiftL_nat)\n apply (rule corres_split_nor)\n apply (simp add: unless_def)\n apply (rule corres_when, simp)\n apply (rule corres_machine_op)\n apply (rule corres_Id, simp, simp, wp)\n apply (rule updateFreeIndex_corres, simp)\n apply (simp add: free_index_of_def)\n apply (wp | simp only: unless_def)+\n apply (rule_tac F=\"sz < word_bits \\ idx \\ 2 ^ sz\n \\ ptr \\ 0 \\ is_aligned ptr sz\n \\ resetChunkBits \\ sz\" in corres_gen_asm)\n apply (simp add: bits_of_def free_index_of_def mapME_x_map_simp liftE_bindE\n reset_addrs_same[where ptr=ptr and idx=idx and sz=sz]\n o_def rev_map\n del: capFreeIndex_update.simps)\n apply (rule_tac P=\"\\x. valid_objs and pspace_aligned and pspace_distinct\n and pspace_no_overlap {ptr .. ptr + 2 ^ sz - 1}\n and cte_wp_at (\\a. is_untyped_cap a \\ obj_ref_of a = ptr \\ cap_bits a = sz\n \\ cap_is_device a = dev) slot\"\n and P'=\"\\_. valid_pspace' and (\\s. descendants_of' (cte_map slot) (ctes_of s) = {})\n and pspace_no_overlap' ptr sz\n and cte_wp_at' (\\cte. \\idx. cteCap cte = UntypedCap dev ptr sz idx) (cte_map slot)\"\n in mapME_x_corres_same_xs)\n apply (rule corres_guard_imp)\n apply (rule corres_split_nor)\n apply (rule corres_machine_op)\n apply (rule corres_Id)\n apply (simp add: shiftL_nat getFreeRef_def shiftl_t2n mult.commute)\n apply simp\n apply wp\n apply (rule corres_split_nor[OF updateFreeIndex_corres])\n apply simp\n apply (simp add: getFreeRef_def getFreeIndex_def free_index_of_def)\n apply clarify\n apply (subst unat_mult_simple)\n apply (subst unat_of_nat_eq)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (erule order_less_le_trans; simp)\n apply (subst unat_p2)\n apply (simp add: Kernel_Config.resetChunkBits_def)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (subst unat_of_nat_eq)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (erule order_less_le_trans; simp)\n apply simp\n apply (rule preemptionPoint_corres)\n apply wp+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (clarsimp simp: getFreeRef_def valid_pspace'_def cte_wp_at_ctes_of\n valid_cap_def cap_aligned_def)\n apply (erule aligned_add_aligned)\n apply (rule is_aligned_weaken)\n apply (rule is_aligned_mult_triv2)\n apply (simp add: Kernel_Config.resetChunkBits_def)\n apply (simp add: untyped_min_bits_def)\n apply (rule hoare_pre)\n apply simp\n apply (strengthen imp_consequent)\n apply (wp preemption_point_inv set_cap_cte_wp_at\n update_untyped_cap_valid_objs\n set_cap_no_overlap | simp)+\n apply (clarsimp simp: exI cte_wp_at_caps_of_state)\n apply (drule caps_of_state_valid_cap, simp+)\n apply (clarsimp simp: is_cap_simps valid_cap_simps\n cap_aligned_def\n valid_untyped_pspace_no_overlap)\n apply (rule hoare_pre)\n apply (simp del: capFreeIndex_update.simps)\n apply (strengthen imp_consequent)\n apply (wp updateFreeIndex_valid_pspace_no_overlap'\n updateFreeIndex_descendants_of2\n doMachineOp_psp_no_overlap\n updateFreeIndex_cte_wp_at\n pspace_no_overlap'_lift\n preemptionPoint_inv\n hoare_vcg_ex_lift\n | simp)+\n apply (clarsimp simp add: cte_wp_at_ctes_of exI isCap_simps valid_pspace'_def)\n apply (clarsimp simp: getFreeIndex_def getFreeRef_def)\n apply (subst is_aligned_weaken[OF is_aligned_mult_triv2])\n apply (simp add: Kernel_Config.resetChunkBits_def minUntypedSizeBits_def)\n apply (subst unat_mult_simple)\n apply (subst unat_of_nat_eq)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (erule order_less_le_trans; simp)\n apply (subst unat_p2)\n apply (simp add: Kernel_Config.resetChunkBits_def)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (subst unat_of_nat_eq)\n apply (rule order_less_trans[rotated],\n rule_tac n=sz in power_strict_increasing; simp add: word_bits_def)\n apply (erule order_less_le_trans; simp)\n apply simp\n apply simp\n apply (simp add: if_apply_def2)\n apply (strengthen invs_valid_objs invs_psp_aligned invs_distinct)\n apply (wp hoare_vcg_const_imp_lift)\n apply (simp add: if_apply_def2)\n apply (strengthen invs_pspace_aligned' invs_pspace_distinct'\n invs_valid_pspace')\n apply (wp hoare_vcg_const_imp_lift deleteObjects_cte_wp_at'[where p=\"cte_map slot\"]\n deleteObjects_invs'[where p=\"cte_map slot\"]\n deleteObjects_descendants[where p=\"cte_map slot\"]\n | simp)+\n apply (wp get_cap_wp getCTE_wp' | simp add: getSlotCap_def)+\n apply (clarsimp simp: cte_wp_at_caps_of_state descendants_range_def2)\n apply (cases slot)\n apply (strengthen empty_descendants_range_in\n ex_tupI[where x=slot])+\n apply (frule(1) caps_of_state_valid)\n apply (clarsimp simp: valid_cap_simps cap_aligned_def)\n apply (frule(1) caps_of_state_valid)\n apply (frule if_unsafe_then_capD[OF caps_of_state_cteD], clarsimp+)\n apply (drule(1) ex_cte_cap_protects[OF _ caps_of_state_cteD\n empty_descendants_range_in _ order_refl], clarsimp+)\n apply (intro conjI impI; auto)[1]\n\n apply (clarsimp simp: cte_wp_at_ctes_of descendants_range'_def2\n empty_descendants_range_in')\n apply (frule cte_wp_at_valid_objs_valid_cap'[OF ctes_of_cte_wpD], clarsimp+)\n apply (clarsimp simp: valid_cap_simps' capAligned_def is_aligned_weaken untypedBits_defs)\n apply (frule if_unsafe_then_capD'[OF ctes_of_cte_wpD], clarsimp+)\n apply (frule(1) descendants_range_ex_cte'[OF empty_descendants_range_in' _ order_refl],\n (simp add: isCap_simps)+)\n apply (intro conjI impI; clarsimp)\n done\n\nend\n\nlemma deleteObjects_ex_cte_cap_wp_to':\n \"\\invs' and ex_cte_cap_wp_to' P slot and (\\s. descendants_of' p (ctes_of s) = {})\n and cte_wp_at' (\\cte. \\idx d. cteCap cte = UntypedCap d ptr sz idx) p\\\n deleteObjects ptr sz\n \\\\rv. ex_cte_cap_wp_to' P slot\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (rule hoare_pre)\n apply (simp add: ex_cte_cap_wp_to'_def)\n apply wps\n apply (wp hoare_vcg_ex_lift)\n apply (rule_tac idx=idx in deleteObjects_cte_wp_at')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (frule ctes_of_valid[OF ctes_of_cte_wpD], clarsimp+)\n apply (clarsimp simp: ex_cte_cap_wp_to'_def\n cte_wp_at_ctes_of)\n apply (rule_tac x=cref in exI, simp)\n apply (frule_tac p=cref in if_unsafe_then_capD'[OF ctes_of_cte_wpD], clarsimp+)\n apply (frule descendants_range_ex_cte'[rotated, OF _ order_refl, where p=p],\n (simp add: isCap_simps empty_descendants_range_in')+)\n apply auto\n done\n\nlemma updateCap_cte_cap_wp_to':\n \"\\\\s. cte_wp_at' (\\cte. p' \\ cte_refs' (cteCap cte) (irq_node' s) \\ P (cteCap cte)\n \\ p' \\ cte_refs' cap (irq_node' s) \\ P cap) p s\n \\ ex_cte_cap_wp_to' P p' s\\\n updateCap p cap\n \\\\rv. ex_cte_cap_wp_to' P p'\\\"\n apply (simp add: ex_cte_cap_wp_to'_def cte_wp_at_ctes_of updateCap_def)\n apply (rule hoare_pre, (wp getCTE_wp | wps)+)\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (rule_tac x=cref in exI)\n apply auto\n done\n\ncrunch ct_in_state'[wp]: doMachineOp \"ct_in_state' P\"\n (simp: crunch_simps ct_in_state'_def)\n\ncrunch st_tcb_at'[wp]: doMachineOp \"st_tcb_at' P p\"\n (simp: crunch_simps ct_in_state'_def)\n\nlemma ex_cte_cap_wp_to_irq_state_independent_H[simp]:\n \"irq_state_independent_H (ex_cte_cap_wp_to' P slot)\"\n by (simp add: ex_cte_cap_wp_to'_def)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma updateFreeIndex_ctes_of:\n \"\\\\s. P (modify_map (ctes_of s) ptr (cteCap_update (capFreeIndex_update (\\_. idx))))\\\n updateFreeIndex ptr idx\n \\\\r s. P (ctes_of s)\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateCap_ctes_of_wp getCTE_wp' | simp)+\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (erule rsubst[where P=P])\n apply (case_tac cte)\n apply (clarsimp simp: modify_map_def fun_eq_iff)\n done\n\nlemma updateFreeIndex_cte_cap_wp_to'[wp]:\n \"\\\\s. cte_wp_at' (isUntypedCap o cteCap) p s\n \\ ex_cte_cap_wp_to' P p' s\\\n updateFreeIndex p idx\n \\\\rv. ex_cte_cap_wp_to' P p'\\\"\n apply (simp add: updateFreeIndex_def updateTrackedFreeIndex_def getSlotCap_def)\n apply (wp updateCap_cte_cap_wp_to' getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (clarsimp simp: isCap_simps ex_cte_cap_wp_to'_def split: option.split)\n done\n\nlemma setCTE_ct_in_state:\n \"\\ct_in_state' P\\ setCTE p cte \\\\rv. ct_in_state' P\\\"\n apply (rule hoare_name_pre_state)\n apply (rule hoare_pre, wp ct_in_state'_decomp setCTE_pred_tcb_at')\n apply (auto simp: ct_in_state'_def)\n done\n\ncrunch ct_in_state[wp]: updateFreeIndex \"ct_in_state' P\"\ncrunch nosch[wp]: updateFreeIndex \"\\s. P (ksSchedulerAction s)\"\n\nlemma resetUntypedCap_invs_etc:\n \"\\invs' and valid_untyped_inv_wcap' ui\n (Some (UntypedCap dev ptr sz idx))\n and ct_active'\n and K (\\ptr_base ptr' ty us slots. ui = Retype slot True ptr_base ptr' ty us slots dev)\\\n resetUntypedCap slot\n \\\\_. invs' and valid_untyped_inv_wcap' ui (Some (UntypedCap dev ptr sz 0))\n and ct_active'\n and pspace_no_overlap' ptr sz\\, \\\\_. invs'\\\"\n (is \"\\invs' and valid_untyped_inv_wcap' ?ui (Some ?cap) and ct_active' and ?asm\\\n ?f \\\\_. invs' and ?vu2 and ct_active' and ?psp\\, \\\\_. invs'\\\")\n apply (simp add: resetUntypedCap_def getSlotCap_def\n liftE_bind_return_bindE_returnOk bindE_assoc)\n apply (rule hoare_vcg_seqE[rotated])\n apply simp\n apply (rule getCTE_sp)\n apply (rule hoare_name_pre_stateE)\n apply (clarsimp split del: if_split)\n apply (subgoal_tac \"capAligned ?cap\")\n prefer 2\n apply (frule cte_wp_at_valid_objs_valid_cap', clarsimp+)\n apply (clarsimp simp: cte_wp_at_ctes_of capAligned_def valid_cap_simps')\n apply (cases \"idx = 0\")\n apply (clarsimp simp: cte_wp_at_ctes_of unlessE_def split del: if_split)\n apply wp\n apply (clarsimp simp: valid_cap_simps' capAligned_def)\n apply (rule cte_wp_at_pspace_no_overlapI'[where cref=slot],\n (simp_all add: cte_wp_at_ctes_of)+)[1]\n apply (clarsimp simp: unlessE_def cte_wp_at_ctes_of\n split del: if_split)\n apply (rule_tac B=\"\\_. invs' and valid_untyped_inv_wcap' ?ui (Some ?cap)\n and ct_active' and ?psp\" in hoare_vcg_seqE[rotated])\n apply clarsimp\n apply (rule hoare_pre)\n apply (simp add: sch_act_simple_def)\n apply (wps )\n apply (wp deleteObject_no_overlap[where idx=idx]\n deleteObjects_invs'[where idx=idx and p=slot]\n hoare_vcg_ex_lift hoare_vcg_const_Ball_lift\n deleteObjects_cte_wp_at'[where idx=idx]\n deleteObjects_descendants[where p=slot]\n deleteObjects_nosch\n deleteObjects_ct_active'[where idx=idx and cref=slot]\n deleteObjects_ex_cte_cap_wp_to'[where p=slot])\n apply (clarsimp simp: cte_wp_at_ctes_of descendants_range'_def2\n empty_descendants_range_in'\n capAligned_def sch_act_simple_def)\n apply (strengthen refl)\n apply (frule ctes_of_valid[OF ctes_of_cte_wpD], clarsimp+)\n apply (frule if_unsafe_then_capD'[OF ctes_of_cte_wpD], clarsimp+)\n apply (erule rev_mp[where P=\"Ball S f\" for S f]\n rev_mp[where P=\"ex_cte_cap_wp_to' P p s\" for P p s])+\n apply (strengthen descendants_range_ex_cte'[rotated, OF _ order_refl, mk_strg D _ E])\n apply (clarsimp simp: isCap_simps empty_descendants_range_in')\n apply auto[1]\n apply (cases \"dev \\ sz < resetChunkBits\")\n apply (simp add: pred_conj_def unless_def)\n apply (rule hoare_pre)\n apply (strengthen exI[where x=sz])\n apply (wp updateFreeIndex_clear_invs'\n hoare_vcg_ex_lift\n hoare_vcg_const_Ball_lift\n updateFreeIndex_descendants_of2\n sch_act_simple_lift\n pspace_no_overlap'_lift\n doMachineOp_psp_no_overlap\n updateFreeIndex_ctes_of\n updateFreeIndex_cte_wp_at\n | simp | wps | wp (once) ex_cte_cap_to'_pres)+\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps\n modify_map_def)\n apply auto[1]\n apply simp\n apply (rule hoare_pre, rule hoare_post_impErr,\n rule_tac P=\"\\i. invs' and ?psp and ct_active' and valid_untyped_inv_wcap' ?ui\n (Some (UntypedCap dev ptr sz (if i = 0 then idx\n else (length [ptr , ptr + 2 ^ resetChunkBits .e. getFreeRef ptr idx - 1] - i) * 2 ^ resetChunkBits)))\"\n and E=\"\\_. invs'\"\n in mapME_x_validE_nth)\n apply (rule hoare_pre)\n apply simp\n apply (wp preemptionPoint_invs\n updateFreeIndex_clear_invs'\n hoare_vcg_ex_lift\n updateFreeIndex_descendants_of2\n updateFreeIndex_ctes_of\n updateFreeIndex_cte_wp_at\n doMachineOp_psp_no_overlap\n hoare_vcg_ex_lift hoare_vcg_const_Ball_lift\n pspace_no_overlap'_lift[OF preemptionPoint_inv]\n pspace_no_overlap'_lift\n updateFreeIndex_ct_in_state[unfolded ct_in_state'_def]\n | strengthen invs_pspace_aligned' invs_pspace_distinct'\n | simp add: ct_in_state'_def\n sch_act_simple_def\n | rule hoare_vcg_conj_lift_R\n | wp (once) preemptionPoint_inv\n | wps\n | wp (once) ex_cte_cap_to'_pres)+\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps\n conj_comms)\n apply (subgoal_tac \"getFreeIndex ptr\n (rev [ptr , ptr + 2 ^ resetChunkBits .e. getFreeRef ptr idx - 1] ! i)\n = (length [ptr , ptr + 2 ^ resetChunkBits .e. getFreeRef ptr idx - 1] - Suc i) *\n 2 ^ resetChunkBits\")\n apply clarsimp\n apply (frule ctes_of_valid[OF ctes_of_cte_wpD], clarsimp+)\n apply (subgoal_tac \"resetChunkBits < word_bits \\ sz < word_bits\")\n apply (strengthen is_aligned_weaken[OF is_aligned_mult_triv2])\n apply (subst nat_less_power_trans2[THEN order_less_imp_le])\n apply (clarsimp simp add: upto_enum_step_def getFreeRef_def)\n apply (rule less_imp_diff_less)\n apply (simp add: unat_div td_gal_lt[symmetric] power_add[symmetric])\n apply (cases \"idx = 0\")\n apply (simp add: gt0_iff_gem1[symmetric, folded word_neq_0_conv])\n apply (simp add: valid_cap_simps')\n apply (subst unat_minus_one)\n apply (clarsimp simp: valid_cap_simps')\n apply (drule of_nat64_0)\n apply (erule order_le_less_trans, simp)\n apply simp\n apply (clarsimp simp: unat_of_nat valid_cap_simps')\n apply (erule order_less_le_trans[rotated], simp)\n apply simp\n apply (auto simp: Kernel_Config.resetChunkBits_def minUntypedSizeBits_def)[1]\n apply (simp add: valid_cap_simps' Kernel_Config.resetChunkBits_def capAligned_def)\n apply (simp add: nth_rev)\n apply (simp add: upto_enum_step_def upto_enum_word getFreeIndex_def\n getFreeRef_def\n del: upt.simps)\n apply (intro conjI impI, simp_all)[1]\n apply (subgoal_tac \"resetChunkBits < word_bits\")\n apply (rule word_unat.Abs_eqD[OF _ word_unat.Rep])\n apply (simp add: word_of_nat_plus Abs_fnat_hom_mult[symmetric])\n apply (simp only: unats_def word_bits_def[symmetric])\n apply (clarsimp simp: unat_div nat_mult_power_less_eq)\n apply (rule less_imp_diff_less)\n apply (simp add: td_gal_lt[symmetric] power_add[symmetric])\n apply (simp only: unat_lt2p word_bits_def)\n apply (simp add: Kernel_Config.resetChunkBits_def word_bits_def)\n apply (clarsimp simp: cte_wp_at_ctes_of getFreeRef_def\n upto_enum_step_def upto_enum_word)\n apply (frule cte_wp_at_valid_objs_valid_cap'[OF ctes_of_cte_wpD], clarsimp+)\n apply (clarsimp simp: valid_cap_simps' capAligned_def)\n apply (simp add: reset_ineq_eq_idx_0)\n apply simp\n apply clarsimp\n done\n\nend\n\nlemma whenE_reset_resetUntypedCap_invs_etc:\n \"\\invs' and valid_untyped_inv_wcap' ui\n (Some (UntypedCap dev ptr sz idx))\n and ct_active'\n and K (\\ptr_base ty us slots. ui = Retype slot reset ptr_base ptr' ty us slots dev)\\\n whenE reset (resetUntypedCap slot)\n \\\\_. invs' and valid_untyped_inv_wcap' ui (Some (UntypedCap dev ptr sz (if reset then 0 else idx)))\n and ct_active'\n and pspace_no_overlap' (if reset then ptr else ptr') sz\\, \\\\_. invs'\\\"\n apply (rule hoare_pre)\n apply (wp whenE_wp resetUntypedCap_invs_etc[where idx=idx,\n simplified pred_conj_def conj_assoc]\n | simp)+\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (frule cte_wp_at_valid_objs_valid_cap'[OF ctes_of_cte_wpD], clarsimp+)\n apply (clarsimp simp: valid_cap_simps' capAligned_def)\n apply (drule_tac cref=slot in cte_wp_at_pspace_no_overlapI',\n simp add: cte_wp_at_ctes_of, simp+)\n done\n\ncrunch ksCurDomain[wp]: updateFreeIndex \"\\s. P (ksCurDomain s)\"\n\nlemma (in range_cover) funky_aligned:\n \"is_aligned ((ptr && foo) + v * 2 ^ sbit) sbit\"\n apply (rule aligned_add_aligned)\n apply (rule is_aligned_andI1)\n apply (rule aligned)\n apply (rule is_aligned_mult_triv2)\n apply simp\n done\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma inv_untyped_corres':\n \"\\ untypinv_relation ui ui' \\ \\\n corres (dc \\ (=))\n (einvs and valid_untyped_inv ui and ct_active)\n (invs' and valid_untyped_inv' ui' and ct_active')\n (invoke_untyped ui) (invokeUntyped ui')\"\n apply (cases ui)\n apply (rule corres_name_pre)\n apply (clarsimp simp only: valid_untyped_inv_wcap\n valid_untyped_inv_wcap'\n Invocations_A.untyped_invocation.simps\n Invocations_H.untyped_invocation.simps\n untypinv_relation.simps)\n apply (rename_tac cref oref reset ptr ptr' dc us slots dev s s' ao' sz sz' idx idx')\n proof -\n fix cref reset ptr ptr_base us slots dev ao' sz sz' idx idx' s s'\n\n let ?ui = \"Invocations_A.Retype cref reset ptr_base ptr (APIType_map2 (Inr ao')) us slots dev\"\n let ?ui' = \"Invocations_H.untyped_invocation.Retype\n (cte_map cref) reset ptr_base ptr ao' us (map cte_map slots) dev\"\n\n assume invs: \"invs (s :: det_state)\" \"ct_active s\" \"valid_list s\" \"valid_sched s\"\n and invs': \"invs' s'\" \"ct_active' s'\"\n and sr: \"(s, s') \\ state_relation\"\n and vui: \"valid_untyped_inv_wcap ?ui (Some (cap.UntypedCap dev (ptr && ~~ mask sz) sz idx)) s\"\n (is \"valid_untyped_inv_wcap _ (Some ?cap) s\")\n and vui': \"valid_untyped_inv_wcap' ?ui' (Some (UntypedCap dev (ptr && ~~ mask sz') sz' idx')) s'\"\n assume ui: \"ui = ?ui\" and ui': \"ui' = ?ui'\"\n\n have cte_at: \"cte_wp_at ((=) ?cap) cref s\" (is \"?cte_cond s\")\n using vui by (simp add:cte_wp_at_caps_of_state)\n\n have ptr_sz_simp[simp]: \"ptr_base = ptr && ~~ mask sz\n \\ sz' = sz \\ idx' = idx \\ 2 \\ sz\"\n using cte_at vui vui' sr invs\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (drule pspace_relation_cte_wp_atI'[OF state_relation_pspace_relation])\n apply (simp add:cte_wp_at_ctes_of)\n apply (simp add:invs_valid_objs)\n apply (clarsimp simp:is_cap_simps isCap_simps)\n apply (frule cte_map_inj_eq)\n apply ((erule cte_wp_at_weakenE | simp\n | clarsimp simp: cte_wp_at_caps_of_state)+)[5]\n apply (clarsimp simp:cte_wp_at_caps_of_state cte_wp_at_ctes_of)\n apply (drule caps_of_state_valid_cap,fastforce)\n apply (clarsimp simp:valid_cap_def untyped_min_bits_def)\n done\n\n have obj_bits_low_bound[simp]:\n \"minUntypedSizeBits \\ obj_bits_api (APIType_map2 (Inr ao')) us\"\n using vui\n apply clarsimp\n apply (cases ao')\n apply (simp_all add: obj_bits_api_def slot_bits_def arch_kobj_size_def default_arch_object_def\n APIType_map2_def bit_simps untyped_min_bits_def minUntypedSizeBits_def\n split: apiobject_type.splits)\n done\n\n have cover: \"range_cover ptr sz\n (obj_bits_api (APIType_map2 (Inr ao')) us) (length slots)\"\n and vslot: \"slots\\ []\"\n using vui\n by (auto simp: cte_wp_at_caps_of_state)\n\n have misc'[simp]:\n \"distinct (map cte_map slots)\"\n using vui'\n by (auto simp: cte_wp_at_ctes_of)\n\n have intvl_eq[simp]:\n \"ptr && ~~ mask sz = ptr \\ {ptr + of_nat k |k. k < 2 ^ sz} = {ptr..ptr + 2 ^ sz - 1}\"\n using cover\n apply (subgoal_tac \"is_aligned (ptr &&~~ mask sz) sz\")\n apply (rule intvl_range_conv)\n apply (simp)\n apply (drule range_cover.sz)\n apply simp\n apply (rule is_aligned_neg_mask,simp)\n done\n\n have delete_objects_rewrite:\n \"ptr && ~~ mask sz = ptr \\ delete_objects ptr sz =\n do y \\ modify (clear_um {ptr + of_nat k |k. k < 2 ^ sz});\n modify (detype {ptr && ~~ mask sz..ptr + 2 ^ sz - 1})\n od\"\n using cover\n apply (clarsimp simp:delete_objects_def freeMemory_def word_size_def)\n apply (subgoal_tac \"is_aligned (ptr &&~~ mask sz) sz\")\n apply (subst mapM_storeWord_clear_um[simplified word_size_def word_size_bits_def];\n clarsimp simp: range_cover_def word_bits_def)\n apply (drule_tac z=sz in order_trans[OF obj_bits_low_bound];\n simp add: minUntypedSizeBits_def)\n apply (rule is_aligned_neg_mask)\n apply simp\n done\n\n have of_nat_length: \"(of_nat (length slots)::machine_word) - (1::machine_word) < (of_nat (length slots)::machine_word)\"\n using vslot\n using range_cover.range_cover_le_n_less(1)[OF cover,where p = \"length slots\"]\n apply -\n apply (case_tac slots)\n apply clarsimp+\n apply (subst add.commute)\n apply (subst word_le_make_less[symmetric])\n apply (rule less_imp_neq)\n apply (simp add:word_bits_def minus_one_norm)\n apply (rule word_of_nat_less)\n apply auto\n done\n have not_0_ptr[simp]: \"ptr\\ 0\"\n using cte_at invs\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid)+\n apply (simp add:valid_cap_def)\n done\n have size_eq[simp]: \"APIType_capBits ao' us = obj_bits_api (APIType_map2 (Inr ao')) us\"\n apply (case_tac ao')\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type)\n apply (clarsimp simp: APIType_capBits_def objBits_simps' arch_kobj_size_def default_arch_object_def\n obj_bits_api_def APIType_map2_def slot_bits_def pageBitsForSize_def bit_simps)+\n done\n\n have non_reset_idx_le[simp]: \"\\ reset \\ idx < 2^sz\"\n using vui\n apply (clarsimp simp: cte_wp_at_caps_of_state )\n apply (erule le_less_trans)\n apply (rule unat_less_helper)\n apply simp\n apply (rule and_mask_less')\n using cover\n apply (clarsimp simp:range_cover_def)\n done\n\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex usableUntypedRange.simps\n\n have vc'[simp] : \"s' \\' capability.UntypedCap dev (ptr && ~~ mask sz) sz idx\"\n using vui' invs'\n apply (clarsimp simp:cte_wp_at_ctes_of)\n apply (case_tac cte)\n apply clarsimp\n apply (erule ctes_of_valid_cap')\n apply (simp add:invs_valid_objs')\n done\n\n have nidx[simp]: \"ptr + (of_nat (length slots) * 2^obj_bits_api (APIType_map2 (Inr ao')) us) - (ptr && ~~ mask sz)\n = (ptr && mask sz) + (of_nat (length slots) * 2^obj_bits_api (APIType_map2 (Inr ao')) us)\"\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr])\n apply simp\n done\n\n have idx_compare'[simp]:\"unat ((ptr && mask sz) + (of_nat (length slots)<< obj_bits_api (APIType_map2 (Inr ao')) us)) \\ 2 ^ sz\"\n apply (rule le_trans[OF unat_plus_gt])\n apply (simp add:range_cover.unat_of_nat_n_shift[OF cover] range_cover_unat)\n apply (insert range_cover.range_cover_compare_bound[OF cover])\n apply simp\n done\n\n have idx_compare''[simp]:\n \"unat ((ptr && mask sz) + (of_nat (length slots) * (2::machine_word) ^ obj_bits_api (APIType_map2 (Inr ao')) us)) < 2 ^ sz\n \\ ptr + of_nat (length slots) * 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us - 1\n < ptr + of_nat (length slots) * 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us\"\n apply (rule word_leq_le_minus_one,simp)\n apply (rule neq_0_no_wrap)\n apply (rule machine_word_plus_mono_right_split)\n apply (simp add:shiftl_t2n range_cover_unat[OF cover] field_simps)\n apply (simp add:range_cover.sz[where 'a=machine_word_len, folded word_bits_def, OF cover])+\n done\n\n note neg_mask_add_mask = word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr,symmetric]\n\n have idx_compare'''[simp]:\n \"\\unat (of_nat (length slots) * (2::machine_word) ^ obj_bits_api (APIType_map2 (Inr ao')) us) < 2 ^ sz;\n ptr && ~~ mask sz = ptr\\\n \\ ptr + of_nat (length slots) * 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us - 1\n < ptr + of_nat (length slots) * 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us \"\n apply (rule word_leq_le_minus_one,simp)\n apply (simp add:is_aligned_neg_mask_eq'[symmetric])\n apply (rule neq_0_no_wrap)\n apply (rule machine_word_plus_mono_right_split[where sz = sz])\n apply (simp add:is_aligned_mask)+\n apply (simp add:range_cover.sz[where 'a=machine_word_len, folded word_bits_def, OF cover])+\n done\n\n have maxDomain:\"ksCurDomain s' \\ maxDomain\"\n using invs'\n by (simp add:invs'_def valid_state'_def)\n\n have sz_mask_less:\n \"unat (ptr && mask sz) < 2 ^ sz\"\n using range_cover.sz[OF cover]\n by (simp add: unat_less_helper and_mask_less_size word_size)\n\n have overlap_ranges1:\n \"{x. ptr \\ x \\ x \\ ptr + 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us\n * of_nat (length slots) - 1} \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n apply (rule order_trans[rotated])\n apply (rule range_cover_subset'[OF cover], simp add: vslot)\n apply (clarsimp simp: atLeastAtMost_iff field_simps)\n done\n\n have overlap_ranges2:\n \"idx \\ unat (ptr && mask sz)\n \\ {x. ptr \\ x \\ x \\ ptr + 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us\n * of_nat (length slots) - 1} \\ {(ptr && ~~ mask sz) + of_nat idx..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n apply (rule order_trans[OF overlap_ranges1])\n apply (clarsimp simp add: atLeastatMost_subset_iff)\n apply (rule order_trans, rule word_plus_mono_right)\n apply (erule word_of_nat_le)\n apply (simp add: add.commute word_plus_and_or_coroll2 word_and_le2)\n apply (simp add: add.commute word_plus_and_or_coroll2)\n done\n\n have overlap_ranges:\n \"{x. ptr \\ x \\ x \\ ptr + 2 ^ obj_bits_api (APIType_map2 (Inr ao')) us * of_nat (length slots) - 1}\n \\ usable_untyped_range (cap.UntypedCap dev (ptr && ~~ mask sz) sz (if reset then 0 else idx))\"\n apply (cases reset, simp_all add: usable_untyped_range.simps)\n apply (rule order_trans, rule overlap_ranges1)\n apply (simp add: blah word_and_le2)\n apply (rule overlap_ranges2)\n apply (cut_tac vui)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n done\n\n have ptr_cn[simp]: \"canonical_address (ptr && ~~ mask sz)\"\n using vc' unfolding valid_cap'_def by clarsimp\n\n have ptr_km[simp]: \"ptr && ~~ mask sz \\ kernel_mappings\"\n using vc' unfolding valid_cap'_def by clarsimp\n\n have sz_limit[simp]: \"sz \\ maxUntypedSizeBits\"\n using vc' unfolding valid_cap'_def by clarsimp\n\n note set_cap_free_index_invs_spec = set_free_index_invs[where cap = \"cap.UntypedCap\n dev (ptr && ~~ mask sz) sz (if reset then 0 else idx)\"\n ,unfolded free_index_update_def free_index_of_def,simplified]\n\n note msimp[simp add] = neg_mask_add_mask\n note if_split[split del]\n show \" corres (dc \\ (=)) ((=) s) ((=) s')\n (invoke_untyped ?ui)\n (invokeUntyped ?ui')\"\n apply (clarsimp simp:invokeUntyped_def invoke_untyped_def getSlotCap_def bind_assoc)\n apply (insert cover)\n apply (rule corres_guard_imp)\n apply (rule corres_split_norE)\n apply (rule corres_whenE, simp)\n apply (rule resetUntypedCap_corres[where ui=ui and ui'=ui'])\n apply (simp add: ui ui')\n apply simp\n apply simp\n apply (rule corres_symb_exec_l_Ex)\n apply (rule_tac F = \"cap = cap.UntypedCap dev (ptr && ~~ mask sz)\n sz (if reset then 0 else idx)\" in corres_gen_asm)\n apply (rule corres_add_noop_lhs)\n apply (rule corres_split_nor[OF cNodeNoOverlap _ return_wp stateAssert_wp])\n apply (rule corres_split[OF updateFreeIndex_corres])\n apply (simp add:isCap_simps)+\n apply (clarsimp simp:getFreeIndex_def bits_of_def shiftL_nat shiftl_t2n\n free_index_of_def)\n apply (insert range_cover.range_cover_n_less[OF cover] vslot)\n apply (rule createNewObjects_corres_helper)\n apply simp+\n apply (simp add: insertNewCaps_def)\n apply (rule corres_split_retype_createNewCaps[where sz = sz,OF corres_rel_imp])\n apply (rule inv_untyped_corres_helper1)\n apply simp\n apply simp\n apply ((wp retype_region_invs_extras[where sz = sz]\n retype_region_plain_invs [where sz = sz]\n retype_region_descendants_range_ret[where sz = sz]\n retype_region_caps_overlap_reserved_ret[where sz = sz]\n retype_region_cte_at_other[where sz = sz]\n retype_region_distinct_sets[where sz = sz]\n retype_region_ranges[where p=cref and sz = sz]\n retype_ret_valid_caps [where sz = sz]\n retype_region_arch_objs [where sza = \"\\_. sz\"]\n hoare_vcg_const_Ball_lift\n set_tuple_pick distinct_tuple_helper\n retype_region_obj_at_other3[where sz = sz]\n | assumption)+)[1]\n apply (wp set_tuple_pick createNewCaps_cte_wp_at'[where sz= sz]\n hoare_vcg_ex_lift distinct_tuple_helper\n createNewCaps_parent_helper [where p=\"cte_map cref\" and sz = sz]\n createNewCaps_valid_pspace_extras [where ptr=ptr and sz = sz]\n createNewCaps_ranges'[where sz = sz]\n hoare_vcg_const_Ball_lift createNewCaps_valid_cap'[where sz = sz]\n createNewCaps_descendants_range_ret'[where sz = sz]\n createNewCaps_caps_overlap_reserved_ret'[where sz = sz])\n apply clarsimp\n apply (erule cte_wp_at_weakenE')\n apply (case_tac c, simp)\n apply hypsubst\n apply (case_tac c,clarsimp simp:isCap_simps)\n apply (clarsimp simp: getFreeIndex_def is_cap_simps bits_of_def shiftL_nat)\n apply (clarsimp simp:conj_comms)\n apply (strengthen invs_mdb invs_valid_objs\n invs_valid_pspace invs_arch_state invs_psp_aligned\n caps_region_kernel_window_imp[where p=cref]\n invs_cap_refs_in_kernel_window)+\n apply (clarsimp simp:conj_comms bits_of_def)\n apply (wp set_cap_free_index_invs_spec set_cap_caps_no_overlap set_cap_no_overlap)\n apply (rule hoare_vcg_conj_lift)\n apply (rule hoare_strengthen_post[OF set_cap_sets])\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply (wp set_cap_no_overlap hoare_vcg_ball_lift\n set_cap_free_index_invs_spec\n set_cap_descendants_range_in\n set_untyped_cap_caps_overlap_reserved[where\n idx=\"if reset then 0 else idx\"]\n set_cap_cte_wp_at\n | strengthen exI[where x=cref])+\n apply (clarsimp simp:conj_comms ball_conj_distrib simp del:capFreeIndex_update.simps)\n apply (strengthen invs_pspace_aligned' invs_pspace_distinct'\n invs_valid_pspace' invs_arch_state'\n imp_consequent[where Q = \"(\\x. x \\ cte_map ` set slots)\"]\n | clarsimp simp: conj_comms simp del: capFreeIndex_update.simps)+\n apply ((wp updateFreeIndex_forward_invs' updateFreeIndex_caps_overlap_reserved\n updateFreeIndex_caps_no_overlap'' updateFreeIndex_pspace_no_overlap'\n hoare_vcg_const_Ball_lift updateFreeIndex_cte_wp_at\n updateFreeIndex_descendants_range_in')+)[1]\n apply clarsimp\n apply (clarsimp simp:conj_comms)\n apply (strengthen invs_mdb invs_valid_objs\n invs_valid_pspace invs_arch_state invs_psp_aligned\n invs_distinct)\n apply (clarsimp simp:conj_comms ball_conj_distrib ex_in_conv)\n apply ((rule validE_R_validE)?,\n rule_tac Q'=\"\\_ s. valid_etcbs s \\ valid_list s \\ invs s \\ ct_active s\n \\ valid_untyped_inv_wcap ui\n (Some (cap.UntypedCap dev (ptr && ~~ mask sz) sz (if reset then 0 else idx))) s\n \\ (reset \\ pspace_no_overlap {ptr && ~~ mask sz..(ptr && ~~ mask sz) + 2 ^ sz - 1} s)\n \" in hoare_post_imp_R)\n apply (simp add: whenE_def split del: if_split, wp)\n apply (rule validE_validE_R, rule hoare_post_impErr, rule reset_untyped_cap_invs_etc, auto)[1]\n apply wp\n apply (clarsimp simp: ui cte_wp_at_caps_of_state\n bits_of_def untyped_range.simps)\n apply (frule(1) valid_global_refsD2[OF _ invs_valid_global_refs])\n apply (cut_tac cref=\"cref\" and reset=reset\n in invoke_untyped_proofs.intro,\n simp_all add: cte_wp_at_caps_of_state)[1]\n apply (rule conjI, (assumption | rule refl))+\n apply (simp split: if_split)\n\n apply (simp add: invoke_untyped_proofs.simps)\n apply (strengthen if_split[where P=\"\\v. v \\ unat x\" for x, THEN iffD2]\n exI[where x=cref])\n apply (simp add: arg_cong[OF mask_out_sub_mask, where f=\"\\y. x - y\" for x]\n field_simps invoke_untyped_proofs.idx_le_new_offs\n if_split[where P=\"\\v. v \\ unat x\" for x])\n apply (frule range_cover.sz(1), fold word_bits_def)\n apply (frule cte_wp_at_pspace_no_overlapI,\n simp add: cte_wp_at_caps_of_state, simp split: if_split,\n simp add: invoke_untyped_proofs.szw)\n apply (simp add: field_simps conj_comms ex_in_conv\n cte_wp_at_caps_of_state\n in_get_cap_cte_wp_at\n atLeastatMost_subset_iff[where b=x and d=x for x]\n word_and_le2)\n apply (intro conjI impI)\n\n (* offs *)\n apply (drule(1) invoke_untyped_proofs.idx_le_new_offs)\n apply simp\n\n (* usable untyped range *)\n apply (simp add: shiftL_nat shiftl_t2n overlap_ranges)\n\n apply (rule order_trans, erule invoke_untyped_proofs.subset_stuff)\n apply (simp add: blah word_and_le2)\n\n apply (drule invoke_untyped_proofs.usable_range_disjoint)\n apply (clarsimp simp: field_simps mask_out_sub_mask shiftl_t2n)\n\n apply ((rule validE_validE_R)?, rule hoare_post_impErr,\n rule whenE_reset_resetUntypedCap_invs_etc[where ptr=\"ptr && ~~ mask sz\"\n and ptr'=ptr and sz=sz and idx=idx and ui=ui' and dev=dev])\n\n prefer 2\n apply simp\n apply clarsimp\n apply (simp only: ui')\n apply (frule(2) invokeUntyped_proofs.intro)\n apply (clarsimp simp: cte_wp_at_ctes_of\n invokeUntyped_proofs.caps_no_overlap'\n invokeUntyped_proofs.ps_no_overlap'\n invokeUntyped_proofs.descendants_range\n if_split[where P=\"\\v. v \\ getFreeIndex x y\" for x y]\n empty_descendants_range_in'\n invs_pspace_aligned' invs_pspace_distinct'\n invs_ksCurDomain_maxDomain'\n cong: if_cong)\n apply (strengthen refl)\n apply (frule invokeUntyped_proofs.idx_le_new_offs)\n apply (frule invokeUntyped_proofs.szw)\n apply (frule invokeUntyped_proofs.descendants_range(2), simp)\n apply (clarsimp simp: getFreeIndex_def conj_comms shiftL_nat\n is_aligned_weaken[OF range_cover.funky_aligned]\n invs_valid_pspace' isCap_simps\n arg_cong[OF mask_out_sub_mask, where f=\"\\y. x - y\" for x]\n field_simps)\n\n apply (intro conjI)\n (* pspace_no_overlap' *)\n apply (cases reset, simp_all)[1]\n apply (rule order_trans[rotated],\n erule invokeUntyped_proofs.idx_compare')\n apply (simp add: shiftl_t2n mult.commute)\n apply (drule invokeUntyped_proofs.subset_stuff, simp,\n erule order_trans, simp add: blah word_and_le2)\n apply (auto split: if_split)[1]\n apply (drule invokeUntyped_proofs.usableRange_disjoint, simp)\n apply (clarsimp simp only: pred_conj_def invs ui)\n apply (strengthen vui)\n apply (cut_tac vui invs invs')\n apply (clarsimp simp: cte_wp_at_caps_of_state valid_sched_etcbs)\n apply (cut_tac vui' invs')\n apply (clarsimp simp: ui cte_wp_at_ctes_of if_apply_def2 ui')\n done\nqed\n\nlemmas inv_untyped_corres = inv_untyped_corres'\n\ncrunch pred_tcb_at'[wp]: insertNewCap \"pred_tcb_at' proj P t\"\n (wp: crunch_wps)\n\ncrunch pred_tcb_at'[wp]: doMachineOp \"pred_tcb_at' proj P t\"\n (wp: crunch_wps)\n\n\ncrunch irq_node[wp]: set_thread_state \"\\s. P (interrupt_irq_node s)\"\ncrunch ctes_of [wp]: setQueue \"\\s. P (ctes_of s)\"\ncrunch cte_wp_at [wp]: setQueue \"cte_wp_at' P p\"\n (simp: cte_wp_at_ctes_of)\n\nlemma sts_valid_untyped_inv':\n \"\\valid_untyped_inv' ui\\ setThreadState st t \\\\rv. valid_untyped_inv' ui\\\"\n apply (cases ui, simp add: ex_cte_cap_to'_def)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF setThreadState_ksInterruptState])\n apply (wp hoare_vcg_const_Ball_lift hoare_vcg_ex_lift | simp)+\n done\n\ncrunch nosch[wp]: invokeUntyped \"\\s. P (ksSchedulerAction s)\"\n (simp: crunch_simps zipWithM_x_mapM\n wp: crunch_wps unless_wp mapME_x_inv_wp preemptionPoint_inv)\n\ncrunch no_0_obj'[wp]: insertNewCap no_0_obj'\n (wp: crunch_wps)\n\nlemma insertNewCap_valid_pspace':\n \"\\\\s. valid_pspace' s \\ s \\' cap\n \\ slot \\ parent \\ caps_overlap_reserved' (untypedRange cap) s\n \\ cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n sameRegionAs (cteCap cte) cap) parent s\n \\ \\ isZombie cap \\ descendants_range' cap parent (ctes_of s)\\\n insertNewCap parent slot cap\n \\\\rv. valid_pspace'\\\"\n apply (simp add: valid_pspace'_def)\n apply (wp insertNewCap_valid_mdb)\n apply simp_all\n done\n\ncrunch tcb'[wp]: insertNewCap \"tcb_at' t\"\n (wp: crunch_wps)\ncrunch inQ[wp]: insertNewCap \"obj_at' (inQ d p) t\"\n (wp: crunch_wps)\ncrunch norqL1[wp]: insertNewCap \"\\s. P (ksReadyQueuesL1Bitmap s)\"\n (wp: crunch_wps)\ncrunch norqL2[wp]: insertNewCap \"\\s. P (ksReadyQueuesL2Bitmap s)\"\n (wp: crunch_wps)\ncrunch ct[wp]: insertNewCap \"\\s. P (ksCurThread s)\"\n (wp: crunch_wps)\ncrunch state_refs_of'[wp]: insertNewCap \"\\s. P (state_refs_of' s)\"\n (wp: crunch_wps)\ncrunch cteCaps[wp]: updateNewFreeIndex \"\\s. P (cteCaps_of s)\"\ncrunch if_unsafe_then_cap'[wp]: updateNewFreeIndex \"if_unsafe_then_cap'\"\n\nlemma insertNewCap_ifunsafe'[wp]:\n \"\\if_unsafe_then_cap' and ex_cte_cap_to' slot\\\n insertNewCap parent slot cap\n \\\\rv s. if_unsafe_then_cap' s\\\"\n apply (simp add: insertNewCap_def)\n apply (rule hoare_pre)\n apply (wp getCTE_wp' | clarsimp simp: ifunsafe'_def3)+\n apply (clarsimp simp: ex_cte_cap_to'_def cte_wp_at_ctes_of cteCaps_of_def)\n apply (drule_tac x=cref in spec)\n apply (rule conjI)\n apply clarsimp\n apply (rule_tac x=crefa in exI, fastforce)\n apply clarsimp\n apply (rule_tac x=cref' in exI, fastforce)\n done\n\ncrunch if_live_then_nonz_cap'[wp]: updateNewFreeIndex \"if_live_then_nonz_cap'\"\n\nlemma insertNewCap_iflive'[wp]:\n \"\\if_live_then_nonz_cap'\\ insertNewCap parent slot cap \\\\rv. if_live_then_nonz_cap'\\\"\n apply (simp add: insertNewCap_def)\n apply (wp setCTE_iflive' getCTE_wp')\n apply (clarsimp elim!: cte_wp_at_weakenE')\n done\n\nlemma insertNewCap_cte_wp_at'':\n \"\\cte_wp_at' (\\cte. P (cteCap cte)) p and K (\\ P NullCap)\\\n insertNewCap parent slot cap\n \\\\rv s. cte_wp_at' (P \\ cteCap) p s\\\"\n apply (simp add: insertNewCap_def tree_cte_cteCap_eq)\n apply (wp getCTE_wp')\n apply (clarsimp simp: cte_wp_at_ctes_of cteCaps_of_def)\n done\n\nlemmas insertNewCap_cte_wp_at' = insertNewCap_cte_wp_at''[unfolded o_def]\n\nlemma insertNewCap_cap_to'[wp]:\n \"\\ex_cte_cap_to' p\\ insertNewCap parent slot cap \\\\rv. ex_cte_cap_to' p\\\"\n apply (simp add: ex_cte_cap_to'_def)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node'[OF insertNewCap_ksInterrupt])\n apply (wp hoare_vcg_ex_lift insertNewCap_cte_wp_at')\n apply clarsimp\n done\n\nlemma insertNewCap_nullcap:\n \"\\P and cte_wp_at' (\\cte. cteCap cte = NullCap) slot\\ insertNewCap parent slot cap \\Q\\\n \\ \\P\\ insertNewCap parent slot cap \\Q\\\"\n apply (clarsimp simp: valid_def)\n apply (subgoal_tac \"cte_wp_at' (\\cte. cteCap cte = NullCap) slot s\")\n apply fastforce\n apply (clarsimp simp: insertNewCap_def in_monad cte_wp_at_ctes_of liftM_def\n dest!: use_valid [OF _ getCTE_sp[where P=\"(=) s\" for s], OF _ refl])\n done\n\ncrunch idle'[wp]: insertNewCap \"valid_idle'\"\n (wp: getCTE_wp')\n\ncrunch global_refs': insertNewCap \"\\s. P (global_refs' s)\"\n (wp: crunch_wps simp: crunch_simps)\ncrunch gsMaxObjectSize[wp]: insertNewCap \"\\s. P (gsMaxObjectSize s)\"\n (wp: crunch_wps simp: crunch_simps)\n\nlemma insertNewCap_valid_global_refs':\n \"\\valid_global_refs' and\n cte_wp_at' (\\cte. capRange cap \\ capRange (cteCap cte)\n \\ capBits cap \\ capBits (cteCap cte)) parent\\\n insertNewCap parent slot cap\n \\\\rv. valid_global_refs'\\\"\n apply (simp add: valid_global_refs'_def valid_refs'_cteCaps valid_cap_sizes_cteCaps)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=global_refs', OF insertNewCap_global_refs'])\n apply (rule hoare_use_eq [where f=gsMaxObjectSize])\n apply wp+\n apply (clarsimp simp: cte_wp_at_ctes_of cteCaps_of_def ball_ran_eq)\n apply (frule power_increasing[where a=2], simp)\n apply (blast intro: order_trans)\n done\n\nlemma insertNewCap_valid_irq_handlers:\n \"\\valid_irq_handlers' and (\\s. \\irq. cap = IRQHandlerCap irq \\ irq_issued' irq s)\\\n insertNewCap parent slot cap\n \\\\rv. valid_irq_handlers'\\\"\n apply (simp add: insertNewCap_def valid_irq_handlers'_def irq_issued'_def)\n apply (wp | wp (once) hoare_use_eq[where f=ksInterruptState, OF updateNewFreeIndex_ksInterrupt])+\n apply (simp add: cteCaps_of_def)\n apply (wp | wp (once) hoare_use_eq[where f=ksInterruptState, OF setCTE_ksInterruptState]\n getCTE_wp)+\n apply (clarsimp simp: cteCaps_of_def cte_wp_at_ctes_of ran_def)\n apply auto\n done\n\ncrunch ioports[wp]: updateNewFreeIndex \"valid_ioports'\"\n\nlemma insertNewCap_ioports':\n \"\\valid_ioports' and safe_ioport_insert' cap NullCap\\\n insertNewCap parent slot cap\n \\\\rv. valid_ioports'\\\"\n apply (simp add: insertNewCap_def)\n apply (wpsimp wp: setCTE_ioports' getCTE_wp)\n by (clarsimp simp: cte_wp_at_ctes_of)\n\ncrunch irq_states' [wp]: insertNewCap valid_irq_states'\n (wp: getCTE_wp')\n\ncrunch vq'[wp]: insertNewCap valid_queues'\n (wp: crunch_wps)\n\ncrunch irqs_masked' [wp]: insertNewCap irqs_masked'\n (wp: crunch_wps rule: irqs_masked_lift)\n\ncrunch valid_machine_state'[wp]: insertNewCap valid_machine_state'\n (wp: crunch_wps)\n\ncrunch pspace_domain_valid[wp]: insertNewCap pspace_domain_valid\n (wp: crunch_wps)\n\ncrunch ct_not_inQ[wp]: insertNewCap \"ct_not_inQ\"\n (wp: crunch_wps)\n\ncrunch tcbState_inv[wp]: insertNewCap \"obj_at' (\\tcb. P (tcbState tcb)) t\"\n (wp: crunch_simps hoare_drop_imps)\ncrunch tcbDomain_inv[wp]: insertNewCap \"obj_at' (\\tcb. P (tcbDomain tcb)) t\"\n (wp: crunch_simps hoare_drop_imps)\ncrunch tcbPriority_inv[wp]: insertNewCap \"obj_at' (\\tcb. P (tcbPriority tcb)) t\"\n (wp: crunch_simps hoare_drop_imps)\n\nlemma insertNewCap_ct_idle_or_in_cur_domain'[wp]:\n \"\\ct_idle_or_in_cur_domain' and ct_active'\\ insertNewCap parent slot cap \\\\_. ct_idle_or_in_cur_domain'\\\"\napply (wp ct_idle_or_in_cur_domain'_lift_futz[where Q=\\])\napply (rule_tac Q=\"\\_. obj_at' (\\tcb. tcbState tcb \\ Structures_H.thread_state.Inactive) t and obj_at' (\\tcb. d = tcbDomain tcb) t\"\n in hoare_strengthen_post)\napply (wp | clarsimp elim: obj_at'_weakenE)+\napply (auto simp: obj_at'_def)\ndone\n\ncrunch ksDomScheduleIdx[wp]: insertNewCap \"\\s. P (ksDomScheduleIdx s)\"\n (wp: crunch_simps hoare_drop_imps)\n\nlemma capRange_subset_capBits:\n \"capAligned cap \\ capAligned cap'\n \\ capRange cap \\ capRange cap'\n \\ capRange cap \\ {}\n \\ capBits cap \\ capBits cap'\"\n supply\n is_aligned_neg_mask_eq[simp del]\n is_aligned_neg_mask_weaken[simp del]\n apply (simp add: capRange_def capAligned_def is_aligned_no_overflow\n split: if_split_asm del: atLeastatMost_subset_iff)\n apply (frule_tac c=\"capUntypedPtr cap\" in subsetD)\n apply (simp only: mask_in_range[symmetric])\n apply (simp add: is_aligned_neg_mask_eq)\n apply (drule_tac c=\"(capUntypedPtr cap && ~~ mask (capBits cap))\n || (~~ capUntypedPtr cap' && mask (capBits cap))\" in subsetD)\n apply (simp_all only: mask_in_range[symmetric])\n apply (simp add: word_ao_dist is_aligned_neg_mask_eq)\n apply (simp add: word_ao_dist)\n apply (cases \"capBits cap = 0\")\n apply simp\n apply (drule_tac f=\"\\x. x !! (capBits cap - 1)\"\n and x=\"a || b\" for a b in arg_cong)\n apply (simp add: word_ops_nth_size word_bits_def word_size)\n apply auto\n done\n\nlemma insertNewCap_urz[wp]:\n \"\\untyped_ranges_zero' and valid_objs' and valid_mdb'\\\n insertNewCap parent slot cap \\\\rv. untyped_ranges_zero'\\\"\n apply (simp add: insertNewCap_def updateNewFreeIndex_def)\n apply (wp getCTE_cteCap_wp\n | simp add: updateTrackedFreeIndex_def getSlotCap_def case_eq_if_isUntypedCap\n split: option.split split del: if_split\n | wps | wp (once) getCTE_wp')+\n apply (clarsimp simp: cte_wp_at_ctes_of fun_upd_def[symmetric])\n apply (strengthen untyped_ranges_zero_fun_upd[mk_strg I E])\n apply (intro conjI impI; clarsimp simp: isCap_simps)\n apply (auto simp add: cteCaps_of_def untypedZeroRange_def isCap_simps)\n done\n\nlemma safe_ioport_insert'_capRange:\n \"capRange cap \\ {} \\ safe_ioport_insert' cap cap' s\"\n apply (clarsimp simp: safe_ioport_insert'_def)\n apply (case_tac cap; clarsimp)\n by (rename_tac ac, case_tac ac; clarsimp simp: capRange_def)\n\nlemma insertNewCap_invs':\n \"\\invs' and ct_active'\n and valid_cap' cap\n and cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n sameRegionAs (cteCap cte) cap) parent\n and K (\\ isZombie cap) and (\\s. descendants_range' cap parent (ctes_of s))\n and caps_overlap_reserved' (untypedRange cap)\n and ex_cte_cap_to' slot\n and (\\s. ksIdleThread s \\ capRange cap)\n and (\\s. \\irq. cap = IRQHandlerCap irq \\ irq_issued' irq s)\\\n insertNewCap parent slot cap\n \\\\rv. invs'\\\"\n apply (rule insertNewCap_nullcap)\n apply (simp add: invs'_def valid_state'_def)\n apply (rule hoare_pre)\n apply (wp insertNewCap_valid_pspace' sch_act_wf_lift\n valid_queues_lift cur_tcb_lift tcb_in_cur_domain'_lift\n insertNewCap_valid_global_refs'\n valid_arch_state_lift' insertNewCap_ioports'\n valid_irq_node_lift insertNewCap_valid_irq_handlers)\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (frule ctes_of_valid[rotated, where p=parent, OF valid_pspace_valid_objs'])\n apply (fastforce simp: cte_wp_at_ctes_of)\n apply (auto simp: isCap_simps sameRegionAs_def3\n intro!: capRange_subset_capBits safe_ioport_insert'_capRange\n elim: valid_capAligned)\n done\n\nlemma insertNewCap_irq_issued'[wp]:\n \"\\\\s. P (irq_issued' irq s)\\ insertNewCap parent slot cap \\\\rv s. P (irq_issued' irq s)\\\"\n by (simp add: irq_issued'_def, wp)\n\nlemma insertNewCap_ct_in_state'[wp]:\n \"\\ct_in_state' p\\insertNewCap parent slot cap \\\\rv. ct_in_state' p\\\"\n unfolding ct_in_state'_def\n apply (rule hoare_pre)\n apply wps\n apply wp\n apply simp\ndone\n\nlemma zipWithM_x_insertNewCap_invs'':\n \"\\\\s. invs' s \\ ct_active' s \\ (\\tup \\ set ls. s \\' snd tup)\n \\ cte_wp_at' (\\cte. isUntypedCap (cteCap cte) \\\n (\\tup \\ set ls. sameRegionAs (cteCap cte) (snd tup))) parent s\n \\ (\\tup \\ set ls. \\ isZombie (snd tup))\n \\ (\\tup \\ set ls. ex_cte_cap_to' (fst tup) s)\n \\ (\\tup \\ set ls. descendants_range' (snd tup) parent (ctes_of s))\n \\ (\\tup \\ set ls. ksIdleThread s \\ capRange (snd tup))\n \\ (\\tup \\ set ls. caps_overlap_reserved' (capRange (snd tup)) s)\n \\ distinct_sets (map capRange (map snd ls))\n \\ (\\irq. IRQHandlerCap irq \\ set (map snd ls) \\ irq_issued' irq s)\n \\ distinct (map fst ls)\\\n mapM (\\(x, y). insertNewCap parent x y) ls\n \\\\rv. invs'\\\"\n apply (induct ls)\n apply (simp add: mapM_def sequence_def)\n apply (wp, simp)\n apply (simp add: mapM_Cons)\n including no_pre apply wp\n apply (thin_tac \"valid P f Q\" for P f Q)\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp insertNewCap_invs'\n hoare_vcg_const_Ball_lift\n insertNewCap_cte_wp_at' insertNewCap_ranges\n hoare_vcg_all_lift insertNewCap_pred_tcb_at')+\n apply (clarsimp simp: cte_wp_at_ctes_of invs_mdb' invs_valid_objs' dest!:valid_capAligned)\n apply (drule caps_overlap_reserved'_subseteq[OF _ untypedRange_in_capRange])\n apply (auto simp:comp_def)\n done\n\nlemma createNewCaps_not_isZombie[wp]:\n \"\\\\\\ createNewCaps ty ptr bits sz d \\\\rv s. (\\cap \\ set rv. \\ isZombie cap)\\\"\n apply (simp add: createNewCaps_def toAPIType_def X64_H.toAPIType_def\n createNewCaps_def\n split del: if_split cong: option.case_cong if_cong\n apiobject_type.case_cong\n X64_H.object_type.case_cong)\n apply (rule hoare_pre)\n apply (wp undefined_valid | wpc\n | simp add: isCap_simps)+\n apply auto?\n done\n\nlemma createNewCaps_cap_to':\n \"\\\\s. ex_cte_cap_to' p s \\ 0 < n\n \\ range_cover ptr sz (APIType_capBits ty us) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us d\n \\\\rv. ex_cte_cap_to' p\\\"\n apply (simp add: ex_cte_cap_to'_def)\n apply (wp hoare_vcg_ex_lift\n hoare_use_eq_irq_node' [OF createNewCaps_ksInterrupt\n createNewCaps_cte_wp_at'])\n apply fastforce\n done\n\ncrunch it[wp]: copyGlobalMappings \"\\s. P (ksIdleThread s)\"\n (wp: mapM_x_wp' ignore: clearMemory)\n\nlemma createNewCaps_idlethread[wp]:\n \"\\\\s. P (ksIdleThread s)\\ createNewCaps tp ptr sz us d \\\\rv s. P (ksIdleThread s)\\\"\n apply (simp add: createNewCaps_def toAPIType_def\n split: X64_H.object_type.split\n apiobject_type.split)\n apply safe\n apply (wp mapM_x_wp' | simp)+\n done\n\nlemma createNewCaps_idlethread_ranges[wp]:\n \"\\\\s. 0 < n \\ range_cover ptr sz (APIType_capBits tp us) n\n \\ ksIdleThread s \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\\\n createNewCaps tp ptr n us d\n \\\\rv s. \\cap\\set rv. ksIdleThread s \\ capRange cap\\\"\n apply (rule hoare_as_subst [OF createNewCaps_idlethread])\n apply (rule hoare_assume_pre)\n apply (rule hoare_chain, rule createNewCaps_range_helper2)\n apply fastforce\n apply blast\n done\n\nlemma createNewCaps_IRQHandler[wp]:\n \"\\\\\\\n createNewCaps tp ptr sz us d\n \\\\rv s. IRQHandlerCap irq \\ set rv \\ P rv s\\\"\n apply (simp add: createNewCaps_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp | wpc | simp add: image_def | rule hoare_pre_cont)+\n done\n\ncrunch ksIdleThread[wp]: updateCap \"\\s. P (ksIdleThread s)\"\n\nlemma createNewCaps_ct_active':\n \"\\ct_active' and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\\\n createNewCaps ty ptr n us d\n \\\\_. ct_active'\\\"\n apply (simp add: ct_in_state'_def)\n apply (rule hoare_pre)\n apply wps\n apply (wp createNewCaps_pred_tcb_at'[where sz=sz])\n apply simp\n done\n\ncrunch gsMaxObjectSize[wp]: deleteObjects \"\\s. P (gsMaxObjectSize s)\"\n (simp: unless_def wp: crunch_wps)\n\ncrunch gsMaxObjectSize[wp]: updateFreeIndex \"\\s. P (gsMaxObjectSize s)\"\n\ncrunch ksIdleThread[wp]: updateFreeIndex \"\\s. P (ksIdleThread s)\"\n\nlemma invokeUntyped_invs'':\n assumes insertNew_Q[wp]: \"\\p cref cap.\n \\Q\\ insertNewCap p cref cap \\\\_. Q\\\"\n assumes createNew_Q: \"\\tp ptr n us sz dev. \\\\s. Q s\n \\ range_cover ptr sz (APIType_capBits tp us) n\n \\ (tp = APIObjectType ArchTypes_H.apiobject_type.CapTableObject \\ 0 < us)\n \\ 0 < n \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createNewCaps tp ptr n us dev \\\\_. Q\\\"\n assumes set_free_Q[wp]: \"\\slot idx. \\invs' and Q\\ updateFreeIndex slot idx \\\\_.Q\\\"\n assumes reset_Q: \"\\Q'\\ resetUntypedCap (case ui of Invocations_H.Retype src_slot _ _ _ _ _ _ _ \\ src_slot) \\\\_. Q\\\"\n shows \"\\invs' and valid_untyped_inv' ui\n and (\\s. (case ui of Invocations_H.Retype _ reset _ _ _ _ _ _ \\ reset) \\ Q' s)\n and Q and ct_active'\\\n invokeUntyped ui\n \\\\rv. invs' and Q\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp only: pred_conj_def valid_untyped_inv_wcap')\n proof -\n fix s sz idx\n assume vui1: \"valid_untyped_inv_wcap' ui\n (Some (case ui of\n Invocations_H.untyped_invocation.Retype slot reset ptr_base ptr ty us slots d \\\n capability.UntypedCap d (ptr && ~~ mask sz) sz idx)) s\"\n assume misc: \"invs' s\" \"Q s\" \"ct_active' s\"\n \"(case ui of\n Invocations_H.untyped_invocation.Retype x reset _ _ _ _ _ _ \\ reset) \\\n Q' s\"\n\n obtain cref reset ptr tp us slots dev\n where pf: \"invokeUntyped_proofs s cref reset (ptr && ~~ mask sz) ptr tp us slots sz idx dev\"\n and ui: \"ui = Invocations_H.Retype cref reset (ptr && ~~ mask sz) ptr tp us slots dev\"\n using vui1 misc\n apply (cases ui, simp only: Invocations_H.untyped_invocation.simps)\n apply (frule(2) invokeUntyped_proofs.intro)\n apply clarsimp\n apply (unfold cte_wp_at_ctes_of)\n apply (drule meta_mp; clarsimp)\n done\n\n note vui = vui1[simplified ui Invocations_H.untyped_invocation.simps]\n\n have cover: \"range_cover ptr sz (APIType_capBits tp us) (length slots)\"\n and slots: \"cref \\ set slots\" \"distinct slots\" \"slots \\ []\"\n and tps: \"tp = APIObjectType ArchTypes_H.apiobject_type.CapTableObject \\ 0 < us\"\n \"tp = APIObjectType ArchTypes_H.apiobject_type.Untyped \\ minUntypedSizeBits \\ us \\ us \\ maxUntypedSizeBits\"\n using vui\n by (clarsimp simp: ui cte_wp_at_ctes_of)+\n\n note not_0_ptr[simp] = invokeUntyped_proofs.not_0_ptr [OF pf]\n note subset_stuff[simp] = invokeUntyped_proofs.subset_stuff[OF pf]\n\n have non_detype_idx_le[simp]: \"~ reset \\ idx < 2^sz\"\n using vui ui\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (erule le_less_trans)\n apply (rule unat_less_helper)\n apply simp\n apply (rule le_less_trans)\n apply (rule word_and_le1)\n apply (simp add:mask_def)\n apply (rule word_leq_le_minus_one)\n apply simp\n apply (clarsimp simp:range_cover_def)\n done\n\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex usableUntypedRange.simps\n note descendants_range[simp] = invokeUntyped_proofs.descendants_range[OF pf]\n note vc'[simp] = invokeUntyped_proofs.vc'[OF pf]\n note ps_no_overlap'[simp] = invokeUntyped_proofs.ps_no_overlap'[OF pf]\n note caps_no_overlap'[simp] = invokeUntyped_proofs.caps_no_overlap'[OF pf]\n note ex_cte_no_overlap' = invokeUntyped_proofs.ex_cte_no_overlap'[OF pf]\n note cref_inv = invokeUntyped_proofs.cref_inv[OF pf]\n note slots_invD = invokeUntyped_proofs.slots_invD[OF pf]\n note nidx[simp] = add_minus_neg_mask[where ptr = ptr]\n note idx_compare' = invokeUntyped_proofs.idx_compare'[OF pf]\n note ptr_cn[simp] = invokeUntyped_proofs.ptr_cn[OF pf]\n note ptr_km[simp] = invokeUntyped_proofs.ptr_km[OF pf]\n note sz_limit[simp] = invokeUntyped_proofs.sz_limit[OF pf]\n\n have valid_global_refs': \"valid_global_refs' s\"\n using misc by auto\n\n have mapM_insertNewCap_Q:\n \"\\caps. \\Q\\ mapM (\\(x, y). insertNewCap cref x y) (zip slots caps) \\\\rv. Q\\\"\n by (wp mapM_wp' | clarsimp)+\n\n note reset_Q' = reset_Q[simplified ui, simplified]\n\n note neg_mask_add_mask = word_plus_and_or_coroll2\n [symmetric,where w = \"mask sz\" and t = ptr,symmetric]\n note msimp[simp add] = misc neg_mask_add_mask\n show \"\\(=) s\\ invokeUntyped ui \\\\rv s. invs' s \\ Q s\\\"\n including no_pre\n apply (clarsimp simp:invokeUntyped_def getSlotCap_def ui)\n apply (rule validE_valid)\n apply (rule hoare_pre)\n apply (rule_tac B=\"\\_ s. invs' s \\ Q s \\ ct_active' s\n \\ valid_untyped_inv_wcap' ui\n (Some (UntypedCap dev (ptr && ~~ mask sz) sz (if reset then 0 else idx))) s\n \\ (reset \\ pspace_no_overlap' (ptr && ~~ mask sz) sz s)\n \" in hoare_vcg_seqE[rotated])\n apply (simp only: whenE_def)\n apply wp\n apply (rule hoare_post_impErr, rule combine_validE,\n rule resetUntypedCap_invs_etc, rule valid_validE, rule reset_Q')\n apply (clarsimp simp only: if_True)\n apply auto[1]\n apply simp\n apply wp[1]\n prefer 2\n apply (cut_tac vui1 misc)\n apply (clarsimp simp: ui cte_wp_at_ctes_of simp del: misc)\n apply auto[1]\n apply (rule hoare_pre)\n apply (wp createNewObjects_wp_helper[where sz = sz])\n apply (simp add: slots)+\n apply (rule cover)\n apply (simp add: slots)+\n apply (clarsimp simp:insertNewCaps_def)\n apply (wp zipWithM_x_insertNewCap_invs''\n set_tuple_pick distinct_tuple_helper\n hoare_vcg_const_Ball_lift\n createNewCaps_invs'[where sz = sz]\n createNewCaps_valid_cap[where sz = sz,OF cover]\n createNewCaps_parent_helper[where sz = sz]\n createNewCaps_cap_to'[where sz = sz]\n createNewCaps_descendants_range_ret'[where sz = sz]\n createNewCaps_caps_overlap_reserved_ret'[where sz = sz]\n createNewCaps_ranges[where sz = sz]\n createNewCaps_ranges'[where sz = sz]\n createNewCaps_IRQHandler\n createNewCaps_ct_active'[where sz=sz]\n mapM_insertNewCap_Q\n | simp add: zipWithM_x_mapM slots tps)+\n apply (wp hoare_vcg_all_lift)\n apply (wp hoare_strengthen_post[OF createNewCaps_IRQHandler])\n apply (intro impI)\n apply (erule impE)\n apply (erule(1) snd_set_zip_in_set)\n apply (simp add: conj_comms, wp createNew_Q[where sz=sz])\n apply (wp hoare_strengthen_post[OF createNewCaps_range_helper[where sz = sz]])\n apply (clarsimp simp: slots)\n apply (clarsimp simp:conj_comms ball_conj_distrib pred_conj_def\n simp del:capFreeIndex_update.simps)\n apply (strengthen invs_pspace_aligned' invs_pspace_distinct'\n invs_valid_pspace' invs_arch_state'\n imp_consequent[where Q = \"(\\x. x \\ set slots)\"]\n | clarsimp simp: conj_comms simp del: capFreeIndex_update.simps)+\n apply (wp updateFreeIndex_forward_invs' updateFreeIndex_caps_overlap_reserved\n updateFreeIndex_caps_no_overlap'' updateFreeIndex_pspace_no_overlap'\n hoare_vcg_const_Ball_lift\n updateFreeIndex_cte_wp_at\n updateCap_cte_cap_wp_to')\n apply (wp updateFreeIndex_caps_overlap_reserved\n updateFreeIndex_descendants_range_in' getCTE_wp | simp)+\n apply (clarsimp simp only: ui)\n apply (frule(2) invokeUntyped_proofs.intro)\n apply (frule invokeUntyped_proofs.idx_le_new_offs)\n apply (frule invokeUntyped_proofs.szw)\n apply (frule invokeUntyped_proofs.descendants_range(2), simp)\n apply (frule invokeUntyped_proofs.idx_compare')\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps getFreeIndex_def\n shiftL_nat shiftl_t2n mult.commute\n if_split[where P=\"\\x. x \\ unat v\" for v]\n invs_valid_pspace' invs_ksCurDomain_maxDomain'\n invokeUntyped_proofs.caps_no_overlap'\n invokeUntyped_proofs.usableRange_disjoint\n split del: if_split)\n apply (strengthen refl)\n apply simp\n apply (intro conjI; assumption?)\n apply (erule is_aligned_weaken[OF range_cover.funky_aligned])\n apply (simp add: APIType_capBits_def objBits_simps' bit_simps untypedBits_defs\n split: object_type.split apiobject_type.split)[1]\n apply (cases reset)\n apply (clarsimp simp: bit_simps)\n apply (clarsimp simp: invokeUntyped_proofs.ps_no_overlap')\n apply (drule invs_valid_global')\n apply (clarsimp simp: valid_global_refs'_def cte_at_valid_cap_sizes_0)\n apply auto[1]\n apply (frule valid_global_refsD', clarsimp)\n apply (clarsimp simp: Int_commute)\n apply (erule disjoint_subset2[rotated])\n apply (simp add: blah word_and_le2)\n apply (rule order_trans, erule invokeUntyped_proofs.subset_stuff)\n apply (simp add: blah word_and_le2)\n apply (frule valid_global_refsD2', clarsimp)\n apply (clarsimp simp: global_refs'_def)\n apply (erule notE, erule subsetD[rotated], simp add: blah word_and_le2)\n done\nqed\n\nlemma invokeUntyped_invs'[wp]:\n \"\\invs' and valid_untyped_inv' ui and ct_active'\\\n invokeUntyped ui\n \\\\rv. invs'\\\"\n apply (wp invokeUntyped_invs''[where Q=\\, simplified hoare_post_taut, simplified])\n apply auto\n done\n\ncrunch pred_tcb_at'[wp]: updateFreeIndex \"pred_tcb_at' pr P p\"\n\nlemma resetUntypedCap_st_tcb_at':\n \"\\invs' and st_tcb_at' (P and ((\\) Inactive) and ((\\) IdleThreadState)) t\n and cte_wp_at' (\\cp. isUntypedCap (cteCap cp)) slot\n and ct_active' and sch_act_simple and (\\s. descendants_of' slot (ctes_of s) = {})\\\n resetUntypedCap slot\n \\\\_. st_tcb_at' P t\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps)\n apply (simp add: resetUntypedCap_def)\n apply (rule hoare_pre)\n apply (wp mapME_x_inv_wp preemptionPoint_inv\n deleteObjects_st_tcb_at'[where p=slot] getSlotCap_wp\n | simp add: unless_def\n | wp (once) hoare_drop_imps)+\n apply (clarsimp simp: cte_wp_at_ctes_of)\n apply (strengthen refl)\n apply (rule exI, strengthen refl)\n apply (frule cte_wp_at_valid_objs_valid_cap'[OF ctes_of_cte_wpD], clarsimp+)\n apply (clarsimp simp: valid_cap_simps' capAligned_def empty_descendants_range_in'\n descendants_range'_def2\n elim!: pred_tcb'_weakenE)\n done\n\nlemma inv_untyp_st_tcb_at'[wp]:\n \"\\invs' and st_tcb_at' (P and ((\\) Inactive) and ((\\) IdleThreadState)) tptr\n and valid_untyped_inv' ui and ct_active'\\\n invokeUntyped ui\n \\\\rv. st_tcb_at' P tptr\\\"\n apply (rule hoare_pre)\n apply (rule hoare_strengthen_post)\n apply (rule invokeUntyped_invs''[where Q=\"st_tcb_at' P tptr\"];\n wp createNewCaps_pred_tcb_at')\n apply (auto simp: valid_pspace'_def)[1]\n apply (wp resetUntypedCap_st_tcb_at' | simp)+\n apply (cases ui, clarsimp simp: cte_wp_at_ctes_of isCap_simps)\n apply (clarsimp elim!: pred_tcb'_weakenE)\n done\n\nlemma inv_untyp_tcb'[wp]:\n \"\\invs' and st_tcb_at' active' tptr\n and valid_untyped_inv' ui and ct_active'\\\n invokeUntyped ui\n \\\\rv. tcb_at' tptr\\\"\n apply (rule hoare_chain [OF inv_untyp_st_tcb_at'[where tptr=tptr and P=\"\\\"]])\n apply (clarsimp elim!: pred_tcb'_weakenE)\n apply fastforce\n apply (clarsimp simp: pred_tcb_at'_def)\n done\n\ncrunch ksInterruptState_eq[wp]: invokeUntyped \"\\s. P (ksInterruptState s)\"\n (wp: crunch_wps mapME_x_inv_wp preemptionPoint_inv\n simp: crunch_simps unless_def)\n\ncrunches deleteObjects, updateFreeIndex\n for valid_irq_states'[wp]: \"valid_irq_states'\"\n (wp: doMachineOp_irq_states' crunch_wps\n simp: freeMemory_def no_irq_storeWord unless_def)\n\nlemma resetUntypedCap_IRQInactive:\n \"\\valid_irq_states'\\\n resetUntypedCap slot\n \\\\_ _. True\\, \\\\rv s. intStateIRQTable (ksInterruptState s) rv \\ irqstate.IRQInactive\\\"\n (is \"\\?P\\ resetUntypedCap slot \\?Q\\,\\?E\\\")\n apply (simp add: resetUntypedCap_def)\n apply (rule hoare_pre)\n apply (wp mapME_x_inv_wp[where P=valid_irq_states' and E=\"?E\", THEN hoare_post_impErr]\n doMachineOp_irq_states' preemptionPoint_inv hoare_drop_imps\n | simp add: no_irq_clearMemory if_apply_def2)+\n done\n\nlemma inv_untyped_IRQInactive:\n \"\\valid_irq_states'\\ invokeUntyped ui\n -, \\\\rv s. intStateIRQTable (ksInterruptState s) rv \\ irqstate.IRQInactive\\\"\n apply (simp add: invokeUntyped_def)\n apply (wpsimp wp: resetUntypedCap_IRQInactive)\n done\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/refine/X64/Untyped_R.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.2877678218692626, "lm_q1q2_score": 0.14613191410299625}} {"text": "(* Title: HOL/Auth/n_germanSymIndex_lemma_inv__45_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_germanSymIndex Protocol Case Study*} \n\ntheory n_germanSymIndex_lemma_inv__45_on_rules imports n_germanSymIndex_lemma_on_inv__45\nbegin\nsection{*All lemmas on causal relation between inv__45*}\nlemma lemma_inv__45_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__45 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__45) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__45) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_germanSymIndex/n_germanSymIndex_lemma_inv__45_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.2877678218692626, "lm_q1q2_score": 0.14613191410299625}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchUserOp_IF\nimports UserOp_IF\nbegin\n\ncontext Arch begin global_naming ARM\n\ndefinition ptable_lift_s where\n \"ptable_lift_s s \\ ptable_lift (cur_thread s) s\"\n\ndefinition ptable_rights_s where\n \"ptable_rights_s s \\ ptable_rights (cur_thread s) s\"\n\n(* FIXME: move to ADT_AI.thy *)\ndefinition ptable_attrs :: \"obj_ref \\ 'z state \\ word32 \\ vm_attributes\" where\n \"ptable_attrs tcb s \\\n \\addr. case_option {} (fst o snd o snd)\n (get_page_info (\\obj. get_arch_obj (kheap s obj))\n (get_pd_of_thread (kheap s) (arch_state s) tcb) addr)\"\n\ndefinition ptable_attrs_s :: \"'z state \\ obj_ref \\ vm_attributes\" where\n \"ptable_attrs_s s \\ ptable_attrs (cur_thread s) s\"\n\ndefinition ptable_xn_s where\n \"ptable_xn_s s \\ \\addr. XNever \\ ptable_attrs_s s addr\"\n\ndefinition getExMonitor :: \"exclusive_monitors machine_monad\" where\n \"getExMonitor \\ gets exclusive_state\"\n\ndefinition setExMonitor :: \"exclusive_monitors \\ unit machine_monad\" where\n \"setExMonitor es \\ modify (\\ms. ms\\exclusive_state := es\\)\"\n\n\ntype_synonym user_state_if = \"user_context \\ user_mem \\ device_state \\ exclusive_monitors\"\n\ntext \\\n A user transition gives back a possible event that is the next\n event the user wants to perform\n\\\ntype_synonym user_transition_if =\n \"obj_ref \\ vm_mapping \\ mem_rights \\ (obj_ref \\ bool) \\\n user_state_if \\ (event option \\ user_state_if) set\"\n\ndefinition do_user_op_if ::\n \"user_transition_if \\ user_context \\ (event option \\ user_context,'z::state_ext) s_monad\" where\n \"do_user_op_if uop tc =\n do\n \\ \\Get the page rights of each address (ReadOnly, ReadWrite, None, etc).\\\n pr \\ gets ptable_rights_s;\n\n \\ \\Fetch the 'execute never' bits of the current thread's page mappings.\\\n pxn \\ gets (\\s x. pr x \\ {} \\ ptable_xn_s s x);\n\n \\ \\Get the mapping from virtual to physical addresses.\\\n pl \\ gets (\\s. restrict_map (ptable_lift_s s) {x. pr x \\ {}});\n\n allow_read \\ return {y. EX x. pl x = Some y \\ AllowRead \\ pr x};\n allow_write \\ return {y. EX x. pl x = Some y \\ AllowWrite \\ pr x};\n\n \\ \\Get the current thread.\\\n t \\ gets cur_thread;\n\n \\ \\Generate user memory by throwing away anything from global\n memory that the user doesn't have access to. (The user must\n have both (1) a mapping to the page; (2) that mapping has the\n AllowRead right.\\\n um \\ gets (\\s. (user_mem s) \\ ptrFromPAddr);\n dm \\ gets (\\s. (device_mem s) \\ ptrFromPAddr);\n ds \\ gets (device_state \\ machine_state);\n\n es \\ do_machine_op getExMonitor;\n\n \\ \\Non-deterministically execute one of the user's operations.\\\n u \\ return (uop t pl pr pxn (tc, um|`allow_read, (ds \\ ptrFromPAddr)|` allow_read, es));\n assert (u \\ {});\n (e,(tc',um',ds',es')) \\ select u;\n\n \\ \\Update the changes the user made to memory into our model.\n We ignore changes that took place where they didn't have\n write permissions. (uop shouldn't be doing that --- if it is,\n uop isn't correctly modelling real hardware.)\\\n do_machine_op (user_memory_update (((um' |` allow_write) \\ addrFromPPtr) |` (-(dom ds))));\n\n do_machine_op (device_memory_update (((ds' |` allow_write) \\ addrFromPPtr) |` (dom ds)));\n\n \\ \\Update exclusive monitor state used by the thread.\\\n do_machine_op (setExMonitor es');\n\n return (e,tc')\n od\"\n\n\nnamed_theorems UserOp_IF_assms\n\nlemma arch_globals_equiv_underlying_memory_update[UserOp_IF_assms, simp]:\n \"arch_globals_equiv ct it kh kh' as as' (underlying_memory_update f ms) ms' =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n \"arch_globals_equiv ct it kh kh' as as' ms (underlying_memory_update f ms') =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n by auto\n\nlemma arch_globals_equiv_device_state_update[UserOp_IF_assms, simp]:\n \"arch_globals_equiv ct it kh kh' as as' (device_state_update f ms) ms' =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n \"arch_globals_equiv ct it kh kh' as as' ms (device_state_update f ms') =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n by auto\n\nend\n\ncontext begin interpretation Arch .\n\nrequalify_types user_transition_if\n\nend\n\n\nglobal_interpretation UserOp_IF_1?: UserOp_IF_1\nproof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact UserOp_IF_assms)?)\nqed\n\n\ncontext Arch begin global_naming ARM\n\nlemma requiv_get_pd_of_thread_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; is_subject aag (cur_thread s);\n pd_ref \\ arm_global_pd (arch_state s); pd_ref' \\ arm_global_pd (arch_state s');\n get_pd_of_thread (kheap s) (arch_state s) (cur_thread s) = pd_ref;\n get_pd_of_thread (kheap s') (arch_state s') (cur_thread s') = pd_ref' \\\n \\ pd_ref = pd_ref'\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (subgoal_tac \"aag_can_read aag (cur_thread s)\")\n apply (clarsimp simp: get_pd_of_thread_eq)\n apply simp\n done\n\nlemma requiv_get_pt_entry_eq:\n \"\\ reads_equiv aag s s'; is_subject aag pt \\\n \\ get_pt_entry (\\obj. get_arch_obj (kheap s obj)) pt x =\n get_pt_entry (\\obj. get_arch_obj (kheap s' obj)) pt x\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (subgoal_tac \"aag_can_read aag pt\")\n apply (simp add: get_pt_entry_def split: option.splits)\n apply (simp add: reads_lrefl)\n done\n\nlemma requiv_get_pt_info_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; is_subject aag pt \\\n \\ get_pt_info (\\obj. get_arch_obj (kheap s obj)) pt x =\n get_pt_info (\\obj. get_arch_obj (kheap s' obj)) pt x\"\n apply (simp add: get_pt_info_def)\n apply (subst requiv_get_pt_entry_eq, simp+)\n done\n\nlemma requiv_get_pd_entry_eq:\n \"\\ reads_equiv aag s s'; is_subject aag pd \\\n \\ get_pd_entry (\\obj. get_arch_obj (kheap s obj)) pd x =\n get_pd_entry (\\obj. get_arch_obj (kheap s' obj)) pd x\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (subgoal_tac \"aag_can_read aag pd\")\n apply (simp add: get_pd_entry_def split: option.splits)\n apply simp\n done\n\nlemma requiv_get_page_info_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; is_subject aag pd; x \\ kernel_mappings \\\n \\ get_page_info (\\obj. get_arch_obj (kheap s obj)) pd x =\n get_page_info (\\obj. get_arch_obj (kheap s' obj)) pd x\"\n apply (simp add: get_page_info_def)\n apply (subst requiv_get_pd_entry_eq[symmetric], simp+)\n apply (clarsimp split: option.splits pde.splits)\n apply (frule pt_in_pd_same_agent, fastforce+)\n apply (rule requiv_get_pt_info_eq, simp+)\n done\n\nlemma requiv_pd_of_thread_global_pd:\n \"\\ reads_equiv aag s s'; is_subject aag (cur_thread s); invs s; pas_refined aag s;\n get_pd_of_thread (kheap s) (arch_state s) (cur_thread s) = arm_global_pd (arch_state s) \\\n \\ get_pd_of_thread (kheap s') (arch_state s') (cur_thread s') = arm_global_pd (arch_state s')\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (subgoal_tac \"aag_can_read aag (cur_thread s)\")\n prefer 2\n apply simp\n apply (clarsimp simp: get_pd_of_thread_def2\n split: option.splits kernel_object.splits cap.splits arch_cap.splits)\n apply (rename_tac tcb word word' p apool)\n apply (subgoal_tac \"aag_can_read_asid aag word'\")\n apply (subgoal_tac \"s \\ ArchObjectCap (PageDirectoryCap word (Some word'))\")\n apply (clarsimp simp: equiv_asids_def equiv_asid_def valid_cap_def)\n apply (drule_tac x=word' in spec)\n apply (clarsimp simp: word_gt_0 typ_at_eq_kheap_obj)\n apply (drule invs_valid_global_refs)\n apply (drule_tac ptr=\"((cur_thread s), tcb_cnode_index 1)\" in valid_global_refsD2[rotated])\n apply (subst caps_of_state_tcb_cap_cases)\n apply (simp add: get_tcb_def)\n apply (simp add: dom_tcb_cap_cases[simplified])\n apply simp\n apply (simp add: cap_range_def global_refs_def)\n apply (cut_tac s=s and t=\"cur_thread s\" and tcb=tcb in objs_valid_tcb_vtable)\n apply (fastforce simp: invs_valid_objs get_tcb_def)+\n apply (subgoal_tac \"(pasObjectAbs aag (cur_thread s), Control, pasASIDAbs aag word')\n \\ state_asids_to_policy aag s\")\n apply (frule pas_refined_Control_into_is_subject_asid)\n apply (fastforce simp: pas_refined_def)\n apply simp\n apply (cut_tac aag=aag and ptr=\"(cur_thread s, tcb_cnode_index 1)\" in sata_asid)\n prefer 3\n apply simp\n apply (subst caps_of_state_tcb_cap_cases)\n apply (simp add: get_tcb_def)\n apply (simp add: dom_tcb_cap_cases[simplified])+\n done\n\nlemma requiv_ptable_rights_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s' \\\n \\ ptable_rights_s s = ptable_rights_s s'\"\n apply (simp add: ptable_rights_s_def)\n apply (rule ext)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_rights_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def)+)[4]\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def)+)[4]\n apply clarsimp\n apply (frule_tac r=b in some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def)+)[4]\n apply (case_tac \"get_pd_of_thread (kheap s) (arch_state s) (cur_thread s) =\n arm_global_pd (arch_state s)\")\n apply (frule requiv_pd_of_thread_global_pd)\n apply (fastforce+)[4]\n apply (clarsimp simp: ptable_rights_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply (case_tac \"get_pd_of_thread (kheap s') (arch_state s') (cur_thread s') =\n arm_global_pd (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_pd_of_thread_global_pd)\n apply ((fastforce simp: reads_equiv_def)+)[5]\n apply (simp add: ptable_rights_def)\n apply (frule requiv_get_pd_of_thread_eq)\n apply (fastforce+)[6]\n apply (frule pd_of_thread_same_agent, simp+)\n apply (subst requiv_get_page_info_eq, simp+)\n done\n\nlemma requiv_ptable_attrs_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s'; ptable_rights_s s x \\ {} \\\n \\ ptable_attrs_s s x = ptable_attrs_s s' x\"\n apply (simp add: ptable_attrs_s_def ptable_rights_s_def)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_attrs_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def ptable_rights_def)+)[4]\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def ptable_rights_def)+)[4]\n apply (case_tac \"get_pd_of_thread (kheap s) (arch_state s) (cur_thread s) =\n arm_global_pd (arch_state s)\")\n apply (frule requiv_pd_of_thread_global_pd)\n apply (fastforce+)[4]\n apply (clarsimp simp: ptable_attrs_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (rule conjI)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply (case_tac \"get_pd_of_thread (kheap s') (arch_state s') (cur_thread s') =\n arm_global_pd (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_pd_of_thread_global_pd)\n apply ((fastforce simp: reads_equiv_def)+)[5]\n apply (simp add: ptable_attrs_def)\n apply (frule requiv_get_pd_of_thread_eq, simp+)[1]\n apply (frule pd_of_thread_same_agent, simp+)[1]\n apply (subst requiv_get_page_info_eq, simp+)[1]\n done\n\nlemma requiv_ptable_lift_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s'; invs s;\n invs s'; is_subject aag (cur_thread s); ptable_rights_s s x \\ {} \\\n \\ ptable_lift_s s x = ptable_lift_s s' x\"\n apply (simp add: ptable_lift_s_def ptable_rights_s_def)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def ptable_rights_def)+)[4]\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply ((fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def ptable_rights_def)+)[4]\n apply (case_tac \"get_pd_of_thread (kheap s) (arch_state s) (cur_thread s) =\n arm_global_pd (arch_state s)\")\n apply (frule requiv_pd_of_thread_global_pd)\n apply (fastforce+)[4]\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (rule conjI)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply (case_tac \"get_pd_of_thread (kheap s') (arch_state s') (cur_thread s') =\n arm_global_pd (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_pd_of_thread_global_pd)\n apply ((fastforce simp: reads_equiv_def)+)[5]\n apply (simp add: ptable_lift_def)\n apply (frule requiv_get_pd_of_thread_eq, simp+)[1]\n apply (frule pd_of_thread_same_agent, simp+)[1]\n apply (subst requiv_get_page_info_eq, simp+)[1]\n done\n\nlemma requiv_ptable_xn_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s'; ptable_rights_s s x \\ {} \\\n \\ ptable_xn_s s x = ptable_xn_s s' x\"\n by (simp add: ptable_xn_s_def requiv_ptable_attrs_eq)\n\nlemma mask_shift_le:\n \"z \\ y \\ (x :: 'a :: len word) && ~~ mask z >> y = x >> y\"\nproof -\n assume le: \"z \\ y\"\n have shifttwice: \"\\(x :: 'a :: len word). x >> y = x >> z >> y - z\"\n by (simp add: shiftr_shiftr le)\n show ?thesis\n apply (subst shifttwice)\n apply simp\n apply (simp add: shiftr_shiftr le)\n done\nqed\n\nlemma data_at_obj_range:\n \"\\ data_at sz ptr s; pspace_aligned s; valid_objs s \\\n \\ ptr + (offset && mask (pageBitsForSize sz)) \\ obj_range ptr (ArchObj (DataPage dev sz))\"\n apply (clarsimp simp: data_at_def)\n apply (elim disjE)\n apply (clarsimp simp: obj_at_def)\n apply (drule (2) ptr_in_obj_range)\n apply (clarsimp simp: obj_bits_def obj_range_def)\n apply fastforce\n apply (clarsimp simp: obj_at_def)\n apply (drule (2) ptr_in_obj_range)\n apply (clarsimp simp: obj_bits_def obj_range_def)\n apply fastforce\n done\n\nlemma obj_range_data_for_cong:\n \"obj_range ptr (ArchObj (DataPage dev sz')) = obj_range ptr (ArchObj (DataPage False sz'))\"\n by (simp add: obj_range_def)\n\nlemma pspace_distinct_def':\n \"pspace_distinct \\\n \\s. \\x y ko ko'. kheap s x = Some ko \\ kheap s y = Some ko' \\ x \\ y\n \\ obj_range x ko \\ obj_range y ko' = {}\"\n by (auto simp: pspace_distinct_def obj_range_def field_simps)\n\nlemma data_at_disjoint_equiv:\n \"\\ ptr' \\ ptr;data_at sz' ptr' s; data_at sz ptr s; valid_objs s; pspace_aligned s;\n pspace_distinct s; ptr' \\ obj_range ptr (ArchObj (DataPage dev sz)) \\\n \\ False\"\n apply (frule (2) data_at_obj_range[where offset = 0,simplified])\n apply (clarsimp simp: data_at_def obj_at_def)\n apply (elim disjE)\n by (clarsimp dest!: spec simp: obj_at_def pspace_distinct_def'\n , erule impE, erule conjI2[OF conjI2], (fastforce+)[2]\n , fastforce cong: obj_range_data_for_cong)+\n\nlemma ptrFromPAddr_mask_simp:\n \"ptrFromPAddr z && ~~ mask (pageBitsForSize l) =\n ptrFromPAddr (z && ~~ mask (pageBitsForSize l))\"\n apply (simp add: ptrFromPAddr_def field_simps)\n apply (subst mask_out_add_aligned[OF is_aligned_pptrBaseOffset])\n apply simp\n done\n\nlemma pageBitsForSize_le_t24:\n \"pageBitsForSize sz \\ 24\"\n by (cases sz, simp_all)\n\nlemma data_at_same_size:\n assumes dat_sz':\n \"data_at sz' (ptrFromPAddr base) s\"\n and dat_sz:\n \"data_at sz\n (ptrFromPAddr (base + (x && mask (pageBitsForSize sz'))) && ~~ mask (pageBitsForSize sz)) s\"\n and vs:\n \"pspace_distinct s\" \"pspace_aligned s\" \"valid_objs s\"\n shows \"sz' = sz\"\nproof -\n from dat_sz' and dat_sz\n have trivial:\n \"sz' \\ sz\n \\ ptrFromPAddr (base + (x && mask (pageBitsForSize sz'))) && ~~ mask (pageBitsForSize sz) \\\n ptrFromPAddr base\"\n by (auto simp: data_at_def obj_at_def)\n have sz_equiv: \"(pageBitsForSize sz = pageBitsForSize sz') = (sz' = sz)\"\n by (clarsimp simp: pageBitsForSize_def split: vmpage_size.splits)\n show ?thesis\n apply (rule sz_equiv[THEN iffD1])\n apply (rule ccontr)\n apply (drule neq_iff[THEN iffD1])\n using dat_sz' dat_sz vs\n apply (cut_tac trivial) prefer 2\n apply (fastforce simp: sz_equiv)\n apply (frule(1) data_at_aligned)\n apply (elim disjE)\n apply (erule(5) data_at_disjoint_equiv)\n apply (unfold obj_range_def)\n apply (rule mask_in_range[THEN iffD1])\n apply (simp add: obj_bits_def)+\n apply (simp add: mask_lower_twice ptrFromPAddr_mask_simp)\n apply (rule arg_cong[where f = ptrFromPAddr])\n apply (drule is_aligned_ptrFromPAddrD[OF _ pageBitsForSize_le_t24])\n apply (subst neg_mask_add_aligned[OF _ and_mask_less'])\n apply simp\n apply (fastforce simp: pbfs_less_wb'[unfolded word_bits_def,simplified])\n apply (simp add: is_aligned_neg_mask_eq)\n apply (drule not_sym)\n apply (erule(5) data_at_disjoint_equiv)\n apply (unfold obj_range_def)\n apply (rule mask_in_range[THEN iffD1])\n apply (simp add: obj_bits_def is_aligned_neg_mask)+\n apply (simp add: mask_lower_twice ptrFromPAddr_mask_simp)\n apply (rule arg_cong[where f = ptrFromPAddr])\n apply (drule is_aligned_ptrFromPAddrD[OF _ pageBitsForSize_le_t24])\n apply (subst mask_lower_twice[symmetric])\n apply (erule less_imp_le_nat)\n apply (rule sym)\n apply (subst mask_lower_twice[symmetric])\n apply (erule less_imp_le_nat)\n apply (rule arg_cong[where f = \"\\x. x && ~~ mask z\" for z])\n apply (subst neg_mask_add_aligned[OF _ and_mask_less'])\n apply simp\n apply (fastforce simp: pbfs_less_wb'[unfolded word_bits_def,simplified])\n apply simp\n done\nqed\n\nlemma valid_pdpt_align_ptD:\n \"\\ kheap s ptr = Some (ArchObj (PageTable pt)); valid_pdpt_objs s; pt a = entry \\\n \\ is_aligned a (pte_range_sz entry)\"\n apply (drule (1) valid_pdpt_objs_ptD)\n apply (clarsimp simp: entries_align_def)\n done\n\nlemma valid_pdpt_align_pdD:\n \"\\ kheap s ptr = Some (ArchObj (PageDirectory pd));valid_pdpt_objs s; pd a = entry \\\n \\ is_aligned a (pde_range_sz entry)\"\n apply (drule (1) valid_pdpt_objs_pdD)\n apply (clarsimp simp: entries_align_def)\n done\n\nlemma valid_vspace_objsD2:\n \"\\ (\\\\ p) s; ko_at (ArchObj ao) p s; valid_vspace_objs s \\\n \\ valid_vspace_obj ao s\"\n by (clarsimp simp: valid_vspace_objsD)\n\nlemma ptable_lift_data_consistant:\n assumes vs: \"valid_state s\"\n and vpdpt: \"valid_pdpt_objs s\"\n and pt_lift: \"ptable_lift t s x = Some ptr\"\n and dat: \"data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s\"\n and misc: \"get_pd_of_thread (kheap s) (arch_state s) t \\ arm_global_pd (arch_state s)\"\n \"x \\ kernel_mappings\"\n shows \"ptable_lift t s (x && ~~ mask (pageBitsForSize sz)) =\n Some (ptr && ~~ mask (pageBitsForSize sz))\"\nproof -\n have aligned_stuff:\n \"is_aligned (ucast ((x >> 12) && mask 8) :: word8) 4 \\ (x && ~~ mask 16 >> 12) = x >> 12\"\n by (simp add: is_aligned_mask mask_def) word_bitwise\n have aligned_stuff':\n \"is_aligned ((ucast (x >> 20)):: 12 word) 4 \\ x && ~~ mask 24 >> 20 = x >> 20\"\n by (simp add: is_aligned_mask mask_def) word_bitwise\n have vs': \"valid_objs s \\ valid_vspace_objs s \\ pspace_distinct s \\ pspace_aligned s\"\n using vs by (simp add: valid_state_def valid_pspace_def)\n have x_less_kb: \"x < kernel_base\"\n using misc by (simp add: kernel_mappings_def) (* FIXME: any rules exists already ? *)\n thus ?thesis\n using pt_lift dat vs'\n apply (clarsimp simp: ptable_rights_def ptable_lift_def split: option.splits)\n apply (clarsimp simp: get_page_info_def split: option.splits)\n apply (rename_tac base sz' attrs rights pde)\n apply (case_tac pde,simp_all)\n apply (clarsimp simp: get_pd_entry_def split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_info_def get_arch_obj_def get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr mw pd pt)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule(1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def a_type_def)\n apply (case_tac \"pt (ucast ((x >> 12) && mask 8))\",simp_all)\n apply (frule valid_vspace_objsD2[where p = \"ptrFromPAddr p\" for p,\n rotated,unfolded obj_at_def,simplified], simp)\n apply (rule exI)\n apply (erule vs_lookup_step)\n apply (simp add: vs_lookup1_def lookup_pd_slot_def Let_def\n pd_shifting pd_shifting_dual obj_at_def)\n apply (rule_tac x=\"VSRef (x>>20) (Some APageDirectory)\" in exI)\n apply (rule context_conjI,simp)\n apply (erule vs_refs_pdI)\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (intro allI impI)\n apply (simp add: nth_shiftr)\n apply (rule bang_big[simplified])\n apply (simp add: word_size)\n apply (frule (1) valid_pdpt_align_ptD[OF _ vpdpt])\n apply simp\n apply (drule_tac x=\"(ucast ((x >> 12) && mask 8))\" in spec)\n apply (frule data_at_same_size[where sz=sz and sz'=ARMLargePage,rotated,simplified], simp+)\n apply (clarsimp simp: mask_shift_le get_pt_info_def get_pt_entry_def\n get_arch_obj_def entries_align_def aligned_stuff mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a = 16,simplified])\n apply (simp add: neg_mask_add_aligned[OF _ and_mask_less'] is_aligned_neg_mask_eq)\n apply (frule valid_vspace_objsD2[where p = \"ptrFromPAddr p\" for p,\n rotated,unfolded obj_at_def,simplified], simp)\n apply (rule exI)\n apply (erule vs_lookup_step)\n apply (simp add: vs_lookup1_def lookup_pd_slot_def Let_def\n pd_shifting pd_shifting_dual obj_at_def)\n apply (rule_tac x=\"VSRef (x>>20) (Some APageDirectory)\" in exI)\n apply (rule context_conjI,simp)\n apply (erule vs_refs_pdI)\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (intro allI impI)\n apply (simp add: nth_shiftr)\n apply (rule bang_big[simplified])\n apply (simp add: word_size)\n apply (frule(1) valid_pdpt_align_ptD[OF _ vpdpt])\n apply simp\n apply (drule_tac x=\"(ucast ((x >> 12) && mask 8))\" in spec)\n apply (frule data_at_same_size[where sz=sz and sz'=ARMSmallPage,rotated,simplified], simp+)\n apply (clarsimp simp: mask_shift_le get_pt_info_def get_pt_entry_def get_arch_obj_def\n neg_mask_add_aligned[OF _ and_mask_less'] mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a = 12,simplified])\n apply (clarsimp simp: get_pd_entry_def get_arch_obj_def\n split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr mw pd caprights)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule(1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def)\n apply (frule(1) valid_pdpt_align_pdD[OF _ vpdpt])\n apply (frule data_at_same_size[where sz=sz and sz'=ARMSection,rotated,simplified], simp+)\n apply (clarsimp simp: aligned_stuff' neg_mask_add_aligned[OF _ and_mask_less'] mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a = 20,simplified])\n apply (clarsimp simp: get_pd_entry_def get_arch_obj_def\n split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr rights pd)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule(1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def)\n apply (frule(1) valid_pdpt_align_pdD[OF _ vpdpt])\n apply (frule data_at_same_size[where sz=sz and sz'=ARMSuperSection,rotated,simplified], simp+)\n apply (clarsimp simp: aligned_stuff' neg_mask_add_aligned[OF _ and_mask_less'] mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a = 24,simplified])\n done\nqed\n\nlemma ptable_rights_data_consistant:\n assumes vs: \"valid_state s\"\n and vpdpt: \"valid_pdpt_objs s\"\n and pt_lift: \"ptable_lift t s x = Some ptr\"\n and dat: \"data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s\"\n and misc: \"get_pd_of_thread (kheap s) (arch_state s) t \\\n arm_global_pd (arch_state s)\" \"x \\ kernel_mappings\"\n shows \"ptable_rights t s (x && ~~ mask (pageBitsForSize sz)) = ptable_rights t s x\"\nproof -\n have aligned_stuff:\n \"is_aligned (ucast ((x >> 12) && mask 8) :: word8) 4 \\ (x && ~~ mask 16 >> 12) = x >> 12\"\n by (simp add: is_aligned_mask mask_def) word_bitwise\n have aligned_stuff':\n \"is_aligned ((ucast (x >> 20)):: 12 word) 4 \\ x && ~~ mask 24 >> 20 = x >> 20\"\n by (simp add: is_aligned_mask mask_def) word_bitwise\n have vs': \"valid_objs s \\ valid_vspace_objs s \\ pspace_distinct s \\ pspace_aligned s\"\n using vs\n by (simp add: valid_state_def valid_pspace_def)\n have x_less_kb: \"x < kernel_base\"\n using misc\n by (simp add: kernel_mappings_def) (* FIXME: any rules exists already ? *)\n thus ?thesis\n using pt_lift dat vs'\n apply (clarsimp simp: ptable_rights_def ptable_lift_def split: option.splits)\n apply (clarsimp simp: get_page_info_def split: option.splits)\n apply (rename_tac base sz' attrs rights pde)\n apply (case_tac pde, simp_all)\n apply (clarsimp simp: get_pd_entry_def split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_info_def get_arch_obj_def get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr mw pd pt)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule (1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def a_type_def)\n apply (case_tac \"pt (ucast ((x >> 12) && mask 8))\",simp_all)\n apply (frule valid_vspace_objsD2[where p = \"ptrFromPAddr p\" for p,\n rotated,unfolded obj_at_def,simplified], simp)\n apply (rule exI)\n apply (erule vs_lookup_step)\n apply (simp add: vs_lookup1_def lookup_pd_slot_def Let_def\n pd_shifting pd_shifting_dual obj_at_def)\n apply (rule_tac x = \"VSRef (x>>20) (Some APageDirectory)\" in exI)\n apply (rule context_conjI,simp)\n apply (erule vs_refs_pdI)\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (intro allI impI)\n apply (simp add: nth_shiftr)\n apply (rule bang_big[simplified])\n apply (simp add: word_size)\n apply (frule (1) valid_pdpt_align_ptD[OF _ vpdpt])\n apply simp\n apply (drule_tac x=\"(ucast ((x >> 12) && mask 8))\" in spec)\n apply (frule data_at_same_size[where sz=sz and sz'=ARMLargePage,rotated,simplified], simp+)\n apply (clarsimp simp: mask_shift_le get_pt_info_def get_pt_entry_def\n get_arch_obj_def entries_align_def aligned_stuff mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a=16,simplified])\n apply (frule valid_vspace_objsD2[where p = \"ptrFromPAddr p\" for p,\n rotated,unfolded obj_at_def,simplified], simp)\n apply (rule exI)\n apply (erule vs_lookup_step)\n apply (simp add: vs_lookup1_def lookup_pd_slot_def Let_def\n pd_shifting pd_shifting_dual obj_at_def)\n apply (rule_tac x = \"VSRef (x>>20) (Some APageDirectory)\" in exI)\n apply (rule context_conjI,simp)\n apply (erule vs_refs_pdI)\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (intro allI impI)\n apply (simp add: nth_shiftr)\n apply (rule bang_big[simplified])\n apply (simp add: word_size)\n apply (frule(1) valid_pdpt_align_ptD[OF _ vpdpt])\n apply simp\n apply (drule_tac x=\"(ucast ((x >> 12) && mask 8))\" in spec)\n apply (frule data_at_same_size[where sz=sz and sz'=ARMSmallPage,rotated,simplified], simp+)\n apply (clarsimp simp: mask_shift_le get_pt_info_def get_pt_entry_def get_arch_obj_def\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a=12,simplified])\n apply (clarsimp simp: get_pd_entry_def get_arch_obj_def\n split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr mw pd caprights)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule(1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def)\n apply (frule(1) valid_pdpt_align_pdD[OF _ vpdpt])\n apply (frule data_at_same_size[where sz = sz and sz' = ARMSection,rotated,simplified],\n clarsimp+)\n apply (clarsimp simp: get_pd_entry_def get_arch_obj_def\n split: arch_kernel_obj.split_asm option.splits)\n apply (clarsimp simp: get_pt_entry_def\n split: option.splits arch_kernel_obj.split_asm kernel_object.splits)\n apply (rename_tac pd_base vmattr rights pd)\n apply (cut_tac get_pd_of_thread_reachable[OF misc(1)])\n apply (frule (1) valid_vspace_objsD2[rotated,unfolded obj_at_def,simplified],simp)\n apply simp\n apply (drule bspec)\n apply (rule Compl_iff[THEN iffD2])\n apply (rule kernel_mappings_kernel_mapping_slots[OF misc(2)])\n apply (clarsimp simp: valid_pde_def obj_at_def)\n apply (frule(1) valid_pdpt_align_pdD[OF _ vpdpt])\n apply (frule data_at_same_size[where sz=sz and sz'=ARMSuperSection,rotated,simplified], simp+)\n apply (clarsimp simp: aligned_stuff' neg_mask_add_aligned[OF _ and_mask_less'] mask_AND_NOT_mask\n dest!: data_at_aligned is_aligned_ptrFromPAddrD[where a = 24,simplified])\n done\nqed\n\nlemma user_op_access_data_at:\n \"\\ invs s; valid_pdpt_objs s;pas_refined aag s; is_subject aag tcb; ptable_lift tcb s x = Some ptr;\n data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s;\n auth \\ vspace_cap_rights_to_auth (ptable_rights tcb s x) \\\n \\ (pasObjectAbs aag tcb, auth,\n pasObjectAbs aag (ptrFromPAddr (ptr && ~~ mask (pageBitsForSize sz)))) \\ pasPolicy aag\"\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_lift_def ptable_rights_def split: option.splits)\n apply (frule some_get_page_info_kmapsD)\n apply (fastforce simp: invs_valid_global_pd_mappings invs_equal_kernel_mappings\n vspace_cap_rights_to_auth_def)+\n apply (case_tac \"get_pd_of_thread (kheap s) (arch_state s) tcb = arm_global_pd (arch_state s)\")\n apply (clarsimp simp: ptable_lift_def ptable_rights_def split: option.splits)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply (fastforce simp: invs_valid_global_objs invs_arch_state)+\n apply (frule (3) ptable_lift_data_consistant[rotated 2])\n apply fastforce\n apply fastforce\n apply (frule (3) ptable_rights_data_consistant[rotated 2])\n apply fastforce\n apply fastforce\n apply (erule (3) user_op_access)\n apply simp\n done\n\nlemma user_frame_at_equiv:\n \"\\ typ_at (AArch (AUserData sz)) p s; equiv_for P kheap s s'; P p \\\n \\ typ_at (AArch (AUserData sz)) p s'\"\n by (clarsimp simp: equiv_for_def obj_at_def)\n\nlemma device_frame_at_equiv:\n \"\\ typ_at (AArch (ADeviceData sz)) p s; equiv_for P kheap s s'; P p \\\n \\ typ_at (AArch (ADeviceData sz)) p s'\"\n by (clarsimp simp: equiv_for_def obj_at_def)\n\nlemma typ_at_user_data_at:\n \"typ_at (AArch (AUserData sz)) p s \\ data_at sz p s\"\n by (simp add: data_at_def)\n\nlemma typ_at_device_data_at:\n \"typ_at (AArch (ADeviceData sz)) p s \\ data_at sz p s\"\n by (simp add: data_at_def)\n\nlemma requiv_device_mem_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s'; valid_pdpt_objs s;\n valid_pdpt_objs s'; is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ device_mem s (ptrFromPAddr y) = device_mem s' (ptrFromPAddr y)\"\n apply (simp add: device_mem_def)\n apply (rule conjI)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_device_frame_def)\n apply (rule exI)\n apply (rule device_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_device_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n apply clarsimp\n apply (frule requiv_ptable_rights_eq, fastforce+)\n apply (frule requiv_ptable_lift_eq, fastforce+)\n apply (clarsimp simp: globals_equiv_def)\n apply (erule notE)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_device_frame_def)\n apply (rule exI)\n apply (rule device_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (erule equiv_symmetric[THEN iffD1])\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s'])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_device_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n done\n\nlemma requiv_user_mem_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s'; valid_pdpt_objs s;\n valid_pdpt_objs s'; is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ user_mem s (ptrFromPAddr y) = user_mem s' (ptrFromPAddr y)\"\n apply (simp add: user_mem_def)\n apply (rule conjI)\n apply clarsimp\n apply (rule context_conjI')\n apply (erule reads_equivE)\n apply (clarsimp simp: in_user_frame_def)\n apply (rule exI)\n apply (rule user_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (frule_tac auth=Read in user_op_access_data_at[where s = s])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n apply clarsimp\n apply (subgoal_tac \"aag_can_read aag (ptrFromPAddr y)\")\n apply (erule reads_equivE)\n apply clarsimp\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply simp\n apply (frule_tac auth=Read in user_op_access)\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def)+\n apply (rule reads_read)\n apply simp\n apply (frule requiv_ptable_rights_eq, fastforce+)\n apply (frule requiv_ptable_lift_eq, fastforce+)\n apply (clarsimp simp: globals_equiv_def)\n apply (erule notE)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_user_frame_def)\n apply (rule exI)\n apply (rule user_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (erule equiv_symmetric[THEN iffD1])\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s'])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n done\n\nlemma ptable_rights_imp_frameD:\n \"\\ ptable_lift t s x = Some y;valid_state s;ptable_rights t s x \\ {} \\\n \\ \\sz. data_at sz (ptrFromPAddr y && ~~ mask (pageBitsForSize sz)) s\"\n apply (subst (asm) addrFromPPtr_ptrFromPAddr_id[symmetric])\n apply (drule ptable_rights_imp_frame)\n apply simp+\n apply (rule addrFromPPtr_ptrFromPAddr_id[symmetric])\n apply (auto simp: in_user_frame_def in_device_frame_def\n dest!: spec typ_at_user_data_at typ_at_device_data_at)\n done\n\nlemma requiv_user_device_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s'; valid_pdpt_objs s;\n valid_pdpt_objs s'; is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ device_state (machine_state s) (ptrFromPAddr y) =\n device_state (machine_state s') (ptrFromPAddr y)\"\n apply (simp add: ptable_lift_s_def)\n apply (frule ptable_rights_imp_frameD)\n apply fastforce\n apply (fastforce simp: ptable_rights_s_def)\n apply (erule reads_equivE)\n apply clarsimp\n apply (erule_tac f=\"device_state\" in equiv_forD)\n apply (frule_tac auth=Read in user_op_access_data_at[where s = s])\n apply ((fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+)[6]\n apply (rule reads_read)\n apply (frule_tac auth=Read in user_op_access)\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def)+\n done\n\n\ndefinition context_matches_state where\n \"context_matches_state pl pr pxn ms s \\ case ms of (um, ds, es) \\\n pl = ptable_lift_s s |` {x. pr x \\ {}} \\\n pr = ptable_rights_s s \\\n pxn = (\\x. pr x \\ {} \\ ptable_xn_s s x) \\\n um = (user_mem s \\ ptrFromPAddr) |` {y. \\x. pl x = Some y \\ AllowRead \\ pr x} \\\n ds = (device_state (machine_state s) \\ ptrFromPAddr) |`\n {y. \\x. pl x = Some y \\ AllowRead \\ pr x} \\\n es = exclusive_state (machine_state s)\"\n\n\nlemma dmo_setExMonitor_reads_respects_g:\n \"reads_respects_g aag l \\ (do_machine_op (setExMonitor es))\"\n apply (simp add: setExMonitor_def)\n apply (wp dmo_ev ev_modify)\n apply (auto simp: reads_equiv_g_def reads_equiv_def affects_equiv_def states_equiv_for_def\n equiv_for_def equiv_asids_def equiv_asid_def globals_equiv_def idle_equiv_def\n split: if_splits)\n done\n\nlemma dmo_getExMonitor_reads_respects_g:\n \"reads_respects_g aag l (\\s. cur_thread s \\ idle_thread s) (do_machine_op getExMonitor)\"\n apply (simp add: getExMonitor_def)\n apply (wp dmo_ev gets_ev'')\n apply (clarsimp simp: reads_equiv_g_def globals_equiv_def)\n done\n\nlemma getExMonitor_wp[wp]:\n \"\\\\ms. P (exclusive_state ms) ms\\ getExMonitor \\P\\\"\n by (simp add: getExMonitor_def | wp)+\n\n\ndefinition valid_vspace_objs_if where\n \"valid_vspace_objs_if \\ valid_pdpt_objs\"\n\ndeclare valid_vspace_objs_if_def[simp]\n\n\nlemma do_user_op_reads_respects_g:\n notes split_paired_All[simp del]\n shows\n \"(\\pl pr pxn tc ms s. P tc s \\ context_matches_state pl pr pxn ms s\n \\ (\\x. uop (cur_thread s) pl pr pxn (tc, ms) = {x}))\n \\ reads_respects_g aag l (pas_refined aag and invs and valid_vspace_objs_if\n and is_subject aag \\ cur_thread\n and (\\s. cur_thread s \\ idle_thread s) and P tc)\n (do_user_op_if uop tc)\"\n apply (simp add: do_user_op_if_def)\n apply (rule use_spec_ev)\n apply (rule spec_equiv_valid_add_asm)\n apply (rule spec_equiv_valid_add_rel[OF _ reads_equiv_g_refl])\n apply (rule spec_equiv_valid_add_rel'[OF _ affects_equiv_refl])\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_ptable_rights_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (rule ext)\n apply (clarsimp simp: reads_equiv_g_def)\n apply (case_tac \"ptable_rights_s st x = {}\", simp)\n apply simp\n apply (rule requiv_ptable_xn_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (subst expand_restrict_map_eq,clarsimp)\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_ptable_lift_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_cur_thread_eq,fastforce)\n apply (rule spec_equiv_valid_inv_gets_more[where proj=\"\\m. dom m \\ cw\"\n and projsnd=\"\\m. m |` cr\" for cr and cw])\n apply (rule context_conjI')\n apply (subst expand_restrict_map_eq)\n apply (clarsimp simp: reads_equiv_g_def restrict_map_def)\n apply (rule requiv_user_mem_eq)\n apply simp+\n apply fastforce\n apply (rule spec_equiv_valid_inv_gets[where proj = \"\\x. ()\", simplified])\n apply (rule spec_equiv_valid_inv_gets_more[where proj = \"\\m. (m \\ ptrFromPAddr) |` cr\" for cr])\n apply (rule conjI)\n apply (subst expand_restrict_map_eq)\n apply (clarsimp simp: restrict_map_def reads_equiv_g_def)\n apply (rule requiv_user_device_eq)\n apply simp+\n apply (clarsimp simp: globals_equiv_def reads_equiv_g_def)\n apply (rule spec_equiv_valid_guard_imp)\n apply (wpsimp wp: dmo_user_memory_update_reads_respects_g dmo_device_state_update_reads_respects_g\n dmo_setExMonitor_reads_respects_g dmo_device_state_update_reads_respects_g\n select_ev select_wp dmo_getExMonitor_reads_respects_g dmo_wp)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule spec)+\n apply (erule impE)\n prefer 2\n apply assumption\n apply (clarsimp simp: context_matches_state_def comp_def reads_equiv_g_def globals_equiv_def)\n apply (clarsimp simp: reads_equiv_g_def globals_equiv_def)\n done\n\nend\n\ncontext begin interpretation Arch .\n\nrequalify_consts\n do_user_op_if\n valid_vspace_objs_if\n context_matches_state\n\nrequalify_facts\n do_user_op_reads_respects_g\n\nend\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/infoflow/ARM/ArchUserOp_IF.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5813030906443133, "lm_q2_score": 0.2509127924867847, "lm_q1q2_score": 0.14585638175476318}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__73_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__73_on_rules imports n_g2kAbsAfter_lemma_on_inv__73\nbegin\nsection{*All lemmas on causal relation between inv__73*}\nlemma lemma_inv__73_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__73 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__73) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__73) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__73_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.28457601028405616, "lm_q1q2_score": 0.14562226976281487}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__40_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__40_on_rules imports n_g2kAbsAfter_lemma_on_inv__40\nbegin\nsection{*All lemmas on causal relation between inv__40*}\nlemma lemma_inv__40_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__40 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__40) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__40) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__40_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.28457600421652673, "lm_q1q2_score": 0.1456222666579593}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__37_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__37_on_rules imports n_g2kAbsAfter_lemma_on_inv__37\nbegin\nsection{*All lemmas on causal relation between inv__37*}\nlemma lemma_inv__37_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__37 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__37) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__37) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__37_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5156199157230157, "lm_q2_score": 0.2814056194821861, "lm_q1q2_score": 0.14509834180138784}} {"text": "(* Title: HOL/Auth/n_germanSymIndex_lemma_inv__31_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_germanSymIndex Protocol Case Study*} \n\ntheory n_germanSymIndex_lemma_inv__31_on_rules imports n_germanSymIndex_lemma_on_inv__31\nbegin\nsection{*All lemmas on causal relation between inv__31*}\nlemma lemma_inv__31_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__31 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__31) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__31) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_germanSymIndex/n_germanSymIndex_lemma_inv__31_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5156199157230156, "lm_q2_score": 0.28140560742914383, "lm_q1q2_score": 0.14509833558659915}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchADT_AC\nimports ADT_AC\nbegin\n\ncontext Arch begin global_naming RISCV64\n\nnamed_theorems ADT_AC_assms\n\nlemma mask_ptTranslationBits_ucast_ucast:\n \"(asid && mask ptTranslationBits) = ucast (ucast asid :: 9 word)\"\n by (word_eqI_solve simp: ptTranslationBits_def)\n\nlemma ptr_offset_in_ptr_range:\n \"\\ invs s; x \\ kernel_mappings;\n get_vspace_of_thread (kheap s) (arch_state s) tcb \\ global_pt s;\n get_page_info (aobjs_of s)\n (get_vspace_of_thread (kheap s) (arch_state s) tcb) x = Some (base, sz, attr, r) \\\n \\ ptrFromPAddr base + (x && mask sz) \\ ptr_range (ptrFromPAddr base) sz\"\n apply (simp add: ptr_range_def mask_def)\n apply (rule conjI)\n apply (rule_tac b=\"2 ^ sz - 1\" in word_plus_mono_right2)\n apply (frule some_get_page_info_umapsD)\n apply (fastforce dest: get_vspace_of_thread_reachable\n simp: canonical_not_kernel_is_user get_page_info_def)+\n apply clarsimp\n apply (drule is_aligned_ptrFromPAddr_n)\n apply (simp add: pageBitsForSize_def pageBits_def canonical_bit_def ptTranslationBits_def\n split: vmpage_size.splits)\n apply (clarsimp simp: is_aligned_no_overflow' word_and_le1)+\n apply (subst p_assoc_help)\n apply (rule word_plus_mono_right)\n apply (rule word_and_le1)\n apply (frule some_get_page_info_umapsD)\n apply (fastforce dest: get_vspace_of_thread_reachable\n simp: canonical_not_kernel_is_user get_page_info_def)+\n apply clarsimp\n apply (drule is_aligned_ptrFromPAddr_n)\n apply (simp add: pageBitsForSize_def pageBits_def canonical_bit_def ptTranslationBits_def\n split: vmpage_size.splits)\n apply (clarsimp simp: is_aligned_no_overflow')\n done\n\nlemma user_op_access[ADT_AC_assms]:\n \"\\ invs s; pas_refined aag s; is_subject aag tcb; ptable_lift tcb s x = Some ptr;\n auth \\ vspace_cap_rights_to_auth (ptable_rights tcb s x) \\\n \\ abs_has_auth_to aag auth tcb (ptrFromPAddr ptr)\"\n apply (case_tac \"x \\ kernel_mappings\")\n using get_vspace_of_thread_asid_or_global_pt\n apply (fastforce simp: ptable_rights_def vspace_cap_rights_to_auth_def invs_def\n valid_state_def valid_arch_state_def kernel_mappings_canonical\n dest: some_get_page_info_kmapsD split: option.splits)\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (insert get_vspace_of_thread_asid_or_global_pt)\n apply (erule_tac x=s in meta_allE)\n apply (erule_tac x=tcb in meta_allE)\n apply (cases \"get_vspace_of_thread (kheap s) (arch_state s) tcb = global_pt s\"; clarsimp)\n apply (frule get_page_info_gpd_kmaps[rotated 2]; fastforce simp: get_page_info_def)\n apply (frule (3) ptr_offset_in_ptr_range)\n apply (frule get_vspace_of_thread_reachable; clarsimp)\n apply (frule vs_lookup_table_vspace)\n apply fastforce+\n apply (clarsimp simp: get_vspace_of_thread_def get_page_info_def ptable_rights_def pt_lookup_slot_def\n split: if_splits option.splits kernel_object.splits cap.splits arch_cap.splits)\n apply (frule (1) canonical_not_kernel_is_user)\n apply (frule pt_lookup_slot_from_level_is_subject)\n apply (fastforce elim: vs_lookup_table_vref_independent)+\n apply (rule aag_Control_into_owns)\n apply (clarsimp simp: pas_refined_def auth_graph_map_def state_objs_to_policy_def)\n apply (erule subsetD)\n apply (drule_tac addr=\"tcb_cnode_index 1\" in caps_of_state_tcb)\n apply (clarsimp simp: tcb_cnode_map_def)\n apply (drule sbta_caps)\n apply (fastforce simp: obj_refs_def)\n apply (fastforce simp: cap_auth_conferred_def arch_cap_auth_conferred_def)\n apply (rule_tac x=tcb in exI, fastforce)\n apply simp\n apply (clarsimp simp: pt_lookup_slot_from_level_def)\n apply (drule_tac vref'=x in vs_lookup_table_vref_independent, rule order_refl)\n apply (drule pt_walk_level)\n apply (drule (1) vs_lookup_table_extend, rule order_refl)\n apply (rename_tac level vref)\n apply (case_tac \"level = asid_pool_level\", simp add: pt_walk_top)\n apply (frule vs_lookup_table_is_aligned; clarsimp simp: canonical_not_kernel_is_user)\n apply (clarsimp simp: pas_refined_def pte_info_def split: pte.splits)\n apply (erule subsetD)\n apply (clarsimp simp: auth_graph_map_def state_objs_to_policy_def)\n apply (intro exI conjI sbta_vref | erule sym | rule refl)+\n apply (clarsimp simp: state_vrefs_def ptes_of_Some pts_of_Some)\n apply (intro exI conjI)\n apply (simp add: canonical_not_kernel_is_user)+\n apply (clarsimp simp: vs_refs_aux_def)\n apply (rule conjI; clarsimp)\n apply (clarsimp simp: graph_of_def pte_ref2_def Bex_def ptes_of_Some pts_of_Some aobjs_of_Some)\n apply (rule_tac x=\"table_index (pt_slot_offset max_pt_level vref x)\" in exI)\n apply (fastforce simp: table_index_max_level_slots canonical_not_kernel_is_user\n image_iff ptrFromPAddr_def mult_is_add.mult_ac)\n apply (clarsimp simp: graph_of_def pte_ref2_def ptes_of_Some pts_of_Some aobjs_of_Some)\n apply (rule_tac x=\"table_index (pt_slot_offset level vref x)\" in exI)\n apply (fastforce simp: image_iff table_index_offset_pt_bits_left\n ptrFromPAddr_def mult_is_add.mult_ac)\n done\n\nlemma write_in_vspace_cap_rights[ADT_AC_assms]:\n \"AllowWrite \\ ptable_rights (cur_thread s) s va\n \\ Write \\ vspace_cap_rights_to_auth (ptable_rights (cur_thread s) s va)\"\n by (clarsimp simp: vspace_cap_rights_to_auth_def)\n\nend\n\n\nglobal_interpretation ADT_AC_1?: ADT_AC_1\nproof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; fact ADT_AC_assms)\nqed\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/access-control/RISCV64/ArchADT_AC.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5583269796369905, "lm_q2_score": 0.2598256379609837, "lm_q1q2_score": 0.1450676636750102}} {"text": "(* Title: HOL/Bali/TypeRel.thy\n Author: David von Oheimb\n*)\nsubsection \\The relations between Java types\\\n\ntheory TypeRel imports Decl begin\n\ntext \\\nsimplifications:\n\\begin{itemize}\n\\item subinterface, subclass and widening relation includes identity\n\\end{itemize}\nimprovements over Java Specification 1.0:\n\\begin{itemize}\n\\item narrowing reference conversion also in cases where the return types of a \n pair of methods common to both types are in widening (rather identity) \n relation\n\\item one could add similar constraints also for other cases\n\\end{itemize}\ndesign issues:\n\\begin{itemize}\n\\item the type relations do not require \\is_type\\ for their arguments\n\\item the subint1 and subcls1 relations imply \\is_iface\\/\\is_class\\\n for their first arguments, which is required for their finiteness\n\\end{itemize}\n\\\n\n(*subint1, in Decl.thy*) (* direct subinterface *)\n(*subint , by translation*) (* subinterface (+ identity) *)\n(*subcls1, in Decl.thy*) (* direct subclass *)\n(*subcls , by translation*) (* subclass *)\n(*subclseq, by translation*) (* subclass + identity *)\n\ndefinition\n implmt1 :: \"prog \\ (qtname \\ qtname) set\" \\ \\direct implementation\\\n \\ \\direct implementation, cf. 8.1.3\\\n where \"implmt1 G = {(C,I). C\\Object \\ (\\c\\class G C: I\\set (superIfs c))}\"\n\n\nabbreviation\n subint1_syntax :: \"prog => [qtname, qtname] => bool\" (\"_\\_\\I1_\" [71,71,71] 70)\n where \"G\\I \\I1 J == (I,J) \\ subint1 G\"\n\nabbreviation\n subint_syntax :: \"prog => [qtname, qtname] => bool\" (\"_\\_\\I _\" [71,71,71] 70)\n where \"G\\I \\I J == (I,J) \\(subint1 G)\\<^sup>*\" \\ \\cf. 9.1.3\\\n\nabbreviation\n implmt1_syntax :: \"prog => [qtname, qtname] => bool\" (\"_\\_\\1_\" [71,71,71] 70)\n where \"G\\C \\1 I == (C,I) \\ implmt1 G\"\n\nnotation (ASCII)\n subint1_syntax (\"_|-_<:I1_\" [71,71,71] 70) and\n subint_syntax (\"_|-_<=:I _\"[71,71,71] 70) and\n implmt1_syntax (\"_|-_~>1_\" [71,71,71] 70)\n\n\nsubsubsection \"subclass and subinterface relations\"\n\n (* direct subinterface in Decl.thy, cf. 9.1.3 *)\n (* direct subclass in Decl.thy, cf. 8.1.3 *)\n\nlemmas subcls_direct = subcls1I [THEN r_into_rtrancl]\n\nlemma subcls_direct1:\n \"\\class G C = Some c; C \\ Object;D=super c\\ \\ G\\C\\\\<^sub>C D\"\napply (auto dest: subcls_direct)\ndone\n\nlemma subcls1I1:\n \"\\class G C = Some c; C \\ Object;D=super c\\ \\ G\\C\\\\<^sub>C1 D\"\napply (auto dest: subcls1I)\ndone\n\nlemma subcls_direct2:\n \"\\class G C = Some c; C \\ Object;D=super c\\ \\ G\\C\\\\<^sub>C D\"\napply (auto dest: subcls1I1)\ndone\n\nlemma subclseq_trans: \"\\G\\A \\\\<^sub>C B; G\\B \\\\<^sub>C C\\ \\ G\\A \\\\<^sub>C C\"\nby (blast intro: rtrancl_trans)\n\nlemma subcls_trans: \"\\G\\A \\\\<^sub>C B; G\\B \\\\<^sub>C C\\ \\ G\\A \\\\<^sub>C C\"\nby (blast intro: trancl_trans)\n\nlemma SXcpt_subcls_Throwable_lemma: \n\"\\class G (SXcpt xn) = Some xc;\n super xc = (if xn = Throwable then Object else SXcpt Throwable)\\ \n\\ G\\SXcpt xn\\\\<^sub>C SXcpt Throwable\"\napply (case_tac \"xn = Throwable\")\napply simp_all\napply (drule subcls_direct)\napply (auto dest: sym)\ndone\n\nlemma subcls_ObjectI: \"\\is_class G C; ws_prog G\\ \\ G\\C\\\\<^sub>C Object\"\napply (erule ws_subcls1_induct)\napply clarsimp\napply (case_tac \"C = Object\")\napply (fast intro: r_into_rtrancl [THEN rtrancl_trans])+\ndone\n\nlemma subclseq_ObjectD [dest!]: \"G\\Object\\\\<^sub>C C \\ C = Object\"\napply (erule rtrancl_induct)\napply (auto dest: subcls1D)\ndone\n\nlemma subcls_ObjectD [dest!]: \"G\\Object\\\\<^sub>C C \\ False\"\napply (erule trancl_induct)\napply (auto dest: subcls1D)\ndone\n\nlemma subcls_ObjectI1 [intro!]: \n \"\\C \\ Object;is_class G C;ws_prog G\\ \\ G\\C \\\\<^sub>C Object\" \napply (drule (1) subcls_ObjectI)\napply (auto intro: rtrancl_into_trancl3)\ndone\n\nlemma subcls_is_class: \"(C,D) \\ (subcls1 G)\\<^sup>+ \\ is_class G C\"\napply (erule trancl_trans_induct)\napply (auto dest!: subcls1D)\ndone\n\nlemma subcls_is_class2 [rule_format (no_asm)]: \n \"G\\C\\\\<^sub>C D \\ is_class G D \\ is_class G C\"\napply (erule rtrancl_induct)\napply (drule_tac [2] subcls1D)\napply auto\ndone\n\nlemma single_inheritance: \n\"\\G\\A \\\\<^sub>C1 B; G\\A \\\\<^sub>C1 C\\ \\ B = C\"\nby (auto simp add: subcls1_def)\n \nlemma subcls_compareable:\n\"\\G\\A \\\\<^sub>C X; G\\A \\\\<^sub>C Y \n \\ \\ G\\X \\\\<^sub>C Y \\ G\\Y \\\\<^sub>C X\"\nby (rule triangle_lemma) (auto intro: single_inheritance) \n\nlemma subcls1_irrefl: \"\\G\\C \\\\<^sub>C1 D; ws_prog G \\\n \\ C \\ D\"\nproof \n assume ws: \"ws_prog G\" and\n subcls1: \"G\\C \\\\<^sub>C1 D\" and\n eq_C_D: \"C=D\"\n from subcls1 obtain c \n where\n neq_C_Object: \"C\\Object\" and\n clsC: \"class G C = Some c\" and\n super_c: \"super c = D\"\n by (auto simp add: subcls1_def)\n with super_c subcls1 eq_C_D \n have subcls_super_c_C: \"G\\super c \\\\<^sub>C C\"\n by auto\n from ws clsC neq_C_Object \n have \"\\ G\\super c \\\\<^sub>C C\"\n by (auto dest: ws_prog_cdeclD)\n from this subcls_super_c_C \n show \"False\"\n by (rule notE)\nqed\n\nlemma no_subcls_Object: \"G\\C \\\\<^sub>C D \\ C \\ Object\"\nby (erule converse_trancl_induct) (auto dest: subcls1D)\n\nlemma subcls_acyclic: \"\\G\\C \\\\<^sub>C D; ws_prog G\\ \\ \\ G\\D \\\\<^sub>C C\"\nproof -\n assume ws: \"ws_prog G\"\n assume subcls_C_D: \"G\\C \\\\<^sub>C D\"\n then show ?thesis\n proof (induct rule: converse_trancl_induct)\n fix C\n assume subcls1_C_D: \"G\\C \\\\<^sub>C1 D\"\n then obtain c where\n \"C\\Object\" and\n \"class G C = Some c\" and\n \"super c = D\"\n by (auto simp add: subcls1_def)\n with ws \n show \"\\ G\\D \\\\<^sub>C C\"\n by (auto dest: ws_prog_cdeclD)\n next\n fix C Z\n assume subcls1_C_Z: \"G\\C \\\\<^sub>C1 Z\" and\n subcls_Z_D: \"G\\Z \\\\<^sub>C D\" and\n nsubcls_D_Z: \"\\ G\\D \\\\<^sub>C Z\"\n show \"\\ G\\D \\\\<^sub>C C\"\n proof\n assume subcls_D_C: \"G\\D \\\\<^sub>C C\"\n show \"False\"\n proof -\n from subcls_D_C subcls1_C_Z\n have \"G\\D \\\\<^sub>C Z\"\n by (auto dest: r_into_trancl trancl_trans)\n with nsubcls_D_Z\n show ?thesis\n by (rule notE)\n qed\n qed\n qed \nqed\n\nlemma subclseq_cases:\n assumes \"G\\C \\\\<^sub>C D\"\n obtains (Eq) \"C = D\" | (Subcls) \"G\\C \\\\<^sub>C D\"\nusing assms by (blast intro: rtrancl_cases)\n\nlemma subclseq_acyclic: \n \"\\G\\C \\\\<^sub>C D; G\\D \\\\<^sub>C C; ws_prog G\\ \\ C=D\"\nby (auto elim: subclseq_cases dest: subcls_acyclic)\n\nlemma subcls_irrefl: \"\\G\\C \\\\<^sub>C D; ws_prog G\\\n \\ C \\ D\"\nproof -\n assume ws: \"ws_prog G\"\n assume subcls: \"G\\C \\\\<^sub>C D\"\n then show ?thesis\n proof (induct rule: converse_trancl_induct)\n fix C\n assume \"G\\C \\\\<^sub>C1 D\"\n with ws \n show \"C\\D\" \n by (blast dest: subcls1_irrefl)\n next\n fix C Z\n assume subcls1_C_Z: \"G\\C \\\\<^sub>C1 Z\" and\n subcls_Z_D: \"G\\Z \\\\<^sub>C D\" and\n neq_Z_D: \"Z \\ D\"\n show \"C\\D\"\n proof\n assume eq_C_D: \"C=D\"\n show \"False\"\n proof -\n from subcls1_C_Z eq_C_D \n have \"G\\D \\\\<^sub>C Z\"\n by (auto)\n also\n from subcls_Z_D ws \n have \"\\ G\\D \\\\<^sub>C Z\"\n by (rule subcls_acyclic)\n ultimately \n show ?thesis \n by - (rule notE)\n qed\n qed\n qed\nqed\n\nlemma invert_subclseq:\n\"\\G\\C \\\\<^sub>C D; ws_prog G\\\n \\ \\ G\\D \\\\<^sub>C C\"\nproof -\n assume ws: \"ws_prog G\" and\n subclseq_C_D: \"G\\C \\\\<^sub>C D\"\n show ?thesis\n proof (cases \"D=C\")\n case True\n with ws \n show ?thesis \n by (auto dest: subcls_irrefl)\n next\n case False\n with subclseq_C_D \n have \"G\\C \\\\<^sub>C D\"\n by (blast intro: rtrancl_into_trancl3) \n with ws \n show ?thesis \n by (blast dest: subcls_acyclic)\n qed\nqed\n\nlemma invert_subcls:\n\"\\G\\C \\\\<^sub>C D; ws_prog G\\\n \\ \\ G\\D \\\\<^sub>C C\"\nproof -\n assume ws: \"ws_prog G\" and\n subcls_C_D: \"G\\C \\\\<^sub>C D\"\n then \n have nsubcls_D_C: \"\\ G\\D \\\\<^sub>C C\"\n by (blast dest: subcls_acyclic)\n show ?thesis\n proof\n assume \"G\\D \\\\<^sub>C C\"\n then show \"False\"\n proof (cases rule: subclseq_cases)\n case Eq\n with ws subcls_C_D\n show ?thesis \n by (auto dest: subcls_irrefl)\n next\n case Subcls\n with nsubcls_D_C\n show ?thesis\n by blast\n qed\n qed\nqed\n\nlemma subcls_superD:\n \"\\G\\C \\\\<^sub>C D; class G C = Some c\\ \\ G\\(super c) \\\\<^sub>C D\"\nproof -\n assume clsC: \"class G C = Some c\"\n assume subcls_C_C: \"G\\C \\\\<^sub>C D\"\n then obtain S where \n \"G\\C \\\\<^sub>C1 S\" and\n subclseq_S_D: \"G\\S \\\\<^sub>C D\"\n by (blast dest: tranclD)\n with clsC \n have \"S=super c\" \n by (auto dest: subcls1D)\n with subclseq_S_D show ?thesis by simp\nqed\n \n\nlemma subclseq_superD:\n \"\\G\\C \\\\<^sub>C D; C\\D;class G C = Some c\\ \\ G\\(super c) \\\\<^sub>C D\"\nproof -\n assume neq_C_D: \"C\\D\"\n assume clsC: \"class G C = Some c\"\n assume subclseq_C_D: \"G\\C \\\\<^sub>C D\" \n then show ?thesis\n proof (cases rule: subclseq_cases)\n case Eq with neq_C_D show ?thesis by contradiction\n next\n case Subcls\n with clsC show ?thesis by (blast dest: subcls_superD)\n qed\nqed\n\nsubsubsection \"implementation relation\"\n\nlemma implmt1D: \"G\\C\\1I \\ C\\Object \\ (\\c\\class G C: I\\set (superIfs c))\"\napply (unfold implmt1_def)\napply auto\ndone\n\ninductive \\ \\implementation, cf. 8.1.4\\\n implmt :: \"prog \\ qtname \\ qtname \\ bool\" (\"_\\_\\_\" [71,71,71] 70)\n for G :: prog\nwhere\n direct: \"G\\C\\1J \\ G\\C\\J\"\n| subint: \"G\\C\\1I \\ G\\I\\I J \\ G\\C\\J\"\n| subcls1: \"G\\C\\\\<^sub>C1D \\ G\\D\\J \\ G\\C\\J\"\n\nlemma implmtD: \"G\\C\\J \\ (\\I. G\\C\\1I \\ G\\I\\I J) \\ (\\D. G\\C\\\\<^sub>C1D \\ G\\D\\J)\" \napply (erule implmt.induct)\napply fast+\ndone\n\nlemma implmt_ObjectE [elim!]: \"G\\Object\\I \\ R\"\nby (auto dest!: implmtD implmt1D subcls1D)\n\nlemma subcls_implmt [rule_format (no_asm)]: \"G\\A\\\\<^sub>C B \\ G\\B\\K \\ G\\A\\K\"\napply (erule rtrancl_induct)\napply (auto intro: implmt.subcls1)\ndone\n\nlemma implmt_subint2: \"\\ G\\A\\J; G\\J\\I K\\ \\ G\\A\\K\"\napply (erule rev_mp, erule implmt.induct)\napply (auto dest: implmt.subint rtrancl_trans implmt.subcls1)\ndone\n\nlemma implmt_is_class: \"G\\C\\I \\ is_class G C\"\napply (erule implmt.induct)\napply (auto dest: implmt1D subcls1D)\ndone\n\n\nsubsubsection \"widening relation\"\n\ninductive\n \\ \\widening, viz. method invocation conversion, cf. 5.3\n i.e. kind of syntactic subtyping\\\n widen :: \"prog \\ ty \\ ty \\ bool\" (\"_\\_\\_\" [71,71,71] 70)\n for G :: prog\nwhere\n refl: \"G\\T\\T\" \\ \\identity conversion, cf. 5.1.1\\\n| subint: \"G\\I\\I J \\ G\\Iface I\\ Iface J\" \\ \\wid.ref.conv.,cf. 5.1.4\\\n| int_obj: \"G\\Iface I\\ Class Object\"\n| subcls: \"G\\C\\\\<^sub>C D \\ G\\Class C\\ Class D\"\n| implmt: \"G\\C\\I \\ G\\Class C\\ Iface I\"\n| null: \"G\\NT\\ RefT R\"\n| arr_obj: \"G\\T.[]\\ Class Object\"\n| array: \"G\\RefT S\\RefT T \\ G\\RefT S.[]\\ RefT T.[]\"\n\ndeclare widen.refl [intro!]\ndeclare widen.intros [simp]\n\n(* too strong in general:\nlemma widen_PrimT: \"G\\PrimT x\\T \\ T = PrimT x\"\n*)\nlemma widen_PrimT: \"G\\PrimT x\\T \\ (\\y. T = PrimT y)\"\napply (ind_cases \"G\\PrimT x\\T\")\nby auto\n\n(* too strong in general:\nlemma widen_PrimT2: \"G\\S\\PrimT x \\ S = PrimT x\"\n*)\nlemma widen_PrimT2: \"G\\S\\PrimT x \\ \\y. S = PrimT y\"\napply (ind_cases \"G\\S\\PrimT x\")\nby auto\n\ntext \\\n These widening lemmata hold in Bali but are to strong for ordinary\n Java. They would not work for real Java Integral Types, like short, \n long, int. These lemmata are just for documentation and are not used.\n\\\n\nlemma widen_PrimT_strong: \"G\\PrimT x\\T \\ T = PrimT x\"\nby (ind_cases \"G\\PrimT x\\T\") simp_all\n\nlemma widen_PrimT2_strong: \"G\\S\\PrimT x \\ S = PrimT x\"\nby (ind_cases \"G\\S\\PrimT x\") simp_all\n\ntext \\Specialized versions for booleans also would work for real Java\\\n\nlemma widen_Boolean: \"G\\PrimT Boolean\\T \\ T = PrimT Boolean\"\nby (ind_cases \"G\\PrimT Boolean\\T\") simp_all\n\nlemma widen_Boolean2: \"G\\S\\PrimT Boolean \\ S = PrimT Boolean\"\nby (ind_cases \"G\\S\\PrimT Boolean\") simp_all\n\nlemma widen_RefT: \"G\\RefT R\\T \\ \\t. T=RefT t\"\napply (ind_cases \"G\\RefT R\\T\")\nby auto\n\nlemma widen_RefT2: \"G\\S\\RefT R \\ \\t. S=RefT t\"\napply (ind_cases \"G\\S\\RefT R\")\nby auto\n\nlemma widen_Iface: \"G\\Iface I\\T \\ T=Class Object \\ (\\J. T=Iface J)\"\napply (ind_cases \"G\\Iface I\\T\")\nby auto\n\nlemma widen_Iface2: \"G\\S\\ Iface J \\ S = NT \\ (\\I. S = Iface I) \\ (\\D. S = Class D)\"\napply (ind_cases \"G\\S\\ Iface J\")\nby auto\n\nlemma widen_Iface_Iface: \"G\\Iface I\\ Iface J \\ G\\I\\I J\"\napply (ind_cases \"G\\Iface I\\ Iface J\")\nby auto\n\nlemma widen_Iface_Iface_eq [simp]: \"G\\Iface I\\ Iface J = G\\I\\I J\"\napply (rule iffI)\napply (erule widen_Iface_Iface)\napply (erule widen.subint)\ndone\n\nlemma widen_Class: \"G\\Class C\\T \\ (\\D. T=Class D) \\ (\\I. T=Iface I)\"\napply (ind_cases \"G\\Class C\\T\")\nby auto\n\nlemma widen_Class2: \"G\\S\\ Class C \\ C = Object \\ S = NT \\ (\\D. S = Class D)\"\napply (ind_cases \"G\\S\\ Class C\")\nby auto\n\nlemma widen_Class_Class: \"G\\Class C\\ Class cm \\ G\\C\\\\<^sub>C cm\"\napply (ind_cases \"G\\Class C\\ Class cm\")\nby auto\n\nlemma widen_Class_Class_eq [simp]: \"G\\Class C\\ Class cm = G\\C\\\\<^sub>C cm\"\napply (rule iffI)\napply (erule widen_Class_Class)\napply (erule widen.subcls)\ndone\n\nlemma widen_Class_Iface: \"G\\Class C\\ Iface I \\ G\\C\\I\"\napply (ind_cases \"G\\Class C\\ Iface I\")\nby auto\n\nlemma widen_Class_Iface_eq [simp]: \"G\\Class C\\ Iface I = G\\C\\I\"\napply (rule iffI)\napply (erule widen_Class_Iface)\napply (erule widen.implmt)\ndone\n\nlemma widen_Array: \"G\\S.[]\\T \\ T=Class Object \\ (\\T'. T=T'.[] \\ G\\S\\T')\"\napply (ind_cases \"G\\S.[]\\T\")\nby auto\n\nlemma widen_Array2: \"G\\S\\T.[] \\ S = NT \\ (\\S'. S=S'.[] \\ G\\S'\\T)\"\napply (ind_cases \"G\\S\\T.[]\")\nby auto\n\n\nlemma widen_ArrayPrimT: \"G\\PrimT t.[]\\T \\ T=Class Object \\ T=PrimT t.[]\"\napply (ind_cases \"G\\PrimT t.[]\\T\")\nby auto\n\nlemma widen_ArrayRefT: \n \"G\\RefT t.[]\\T \\ T=Class Object \\ (\\s. T=RefT s.[] \\ G\\RefT t\\RefT s)\"\napply (ind_cases \"G\\RefT t.[]\\T\")\nby auto\n\nlemma widen_ArrayRefT_ArrayRefT_eq [simp]: \n \"G\\RefT T.[]\\RefT T'.[] = G\\RefT T\\RefT T'\"\napply (rule iffI)\napply (drule widen_ArrayRefT)\napply simp\napply (erule widen.array)\ndone\n\nlemma widen_Array_Array: \"G\\T.[]\\T'.[] \\ G\\T\\T'\"\napply (drule widen_Array)\napply auto\ndone\n\nlemma widen_Array_Class: \"G\\S.[] \\ Class C \\ C=Object\"\nby (auto dest: widen_Array)\n\n\nlemma widen_NT2: \"G\\S\\NT \\ S = NT\"\napply (ind_cases \"G\\S\\NT\")\nby auto\n\nlemma widen_Object:\n assumes \"isrtype G T\" and \"ws_prog G\"\n shows \"G\\RefT T \\ Class Object\"\nproof (cases T)\n case (ClassT C) with assms have \"G\\C\\\\<^sub>C Object\" by (auto intro: subcls_ObjectI)\n with ClassT show ?thesis by auto\nqed simp_all\n\nlemma widen_trans_lemma [rule_format (no_asm)]: \n \"\\G\\S\\U; \\C. is_class G C \\ G\\C\\\\<^sub>C Object\\ \\ \\T. G\\U\\T \\ G\\S\\T\"\napply (erule widen.induct)\napply safe\nprefer 5 apply (drule widen_RefT) apply clarsimp\napply (frule_tac [1] widen_Iface)\napply (frule_tac [2] widen_Class)\napply (frule_tac [3] widen_Class)\napply (frule_tac [4] widen_Iface)\napply (frule_tac [5] widen_Class)\napply (frule_tac [6] widen_Array)\napply safe\napply (rule widen.int_obj)\nprefer 6 apply (drule implmt_is_class) apply simp\napply (erule_tac [!] thin_rl)\nprefer 6 apply simp\napply (rule_tac [9] widen.arr_obj)\napply (rotate_tac [9] -1)\napply (frule_tac [9] widen_RefT)\napply (auto elim!: rtrancl_trans subcls_implmt implmt_subint2)\ndone\n\nlemma ws_widen_trans: \"\\G\\S\\U; G\\U\\T; ws_prog G\\ \\ G\\S\\T\"\nby (auto intro: widen_trans_lemma subcls_ObjectI)\n\nlemma widen_antisym_lemma [rule_format (no_asm)]: \"\\G\\S\\T; \n \\I J. G\\I\\I J \\ G\\J\\I I \\ I = J; \n \\C D. G\\C\\\\<^sub>C D \\ G\\D\\\\<^sub>C C \\ C = D; \n \\I . G\\Object\\I \\ False\\ \\ G\\T\\S \\ S = T\"\napply (erule widen.induct)\napply (auto dest: widen_Iface widen_NT2 widen_Class)\ndone\n\nlemmas subint_antisym = \n subint1_acyclic [THEN acyclic_impl_antisym_rtrancl]\nlemmas subcls_antisym = \n subcls1_acyclic [THEN acyclic_impl_antisym_rtrancl]\n\nlemma widen_antisym: \"\\G\\S\\T; G\\T\\S; ws_prog G\\ \\ S=T\"\nby (fast elim: widen_antisym_lemma subint_antisym [THEN antisymD] \n subcls_antisym [THEN antisymD])\n\nlemma widen_ObjectD [dest!]: \"G\\Class Object\\T \\ T=Class Object\"\napply (frule widen_Class)\napply (fast dest: widen_Class_Class widen_Class_Iface)\ndone\n\ndefinition\n widens :: \"prog \\ [ty list, ty list] \\ bool\" (\"_\\_[\\]_\" [71,71,71] 70)\n where \"G\\Ts[\\]Ts' = list_all2 (\\T T'. G\\T\\T') Ts Ts'\"\n\nlemma widens_Nil [simp]: \"G\\[][\\][]\"\napply (unfold widens_def)\napply auto\ndone\n\nlemma widens_Cons [simp]: \"G\\(S#Ss)[\\](T#Ts) = (G\\S\\T \\ G\\Ss[\\]Ts)\"\napply (unfold widens_def)\napply auto\ndone\n\n\nsubsubsection \"narrowing relation\"\n\n(* all properties of narrowing and casting conversions we actually need *)\n(* these can easily be proven from the definitions below *)\n(*\nrules\n cast_RefT2 \"G\\S\\? RefT R \\ \\t. S=RefT t\" \n cast_PrimT2 \"G\\S\\? PrimT pt \\ \\t. S=PrimT t \\ G\\PrimT t\\PrimT pt\"\n*)\n\n(* more detailed than necessary for type-safety, see above rules. *)\ninductive \\ \\narrowing reference conversion, cf. 5.1.5\\\n narrow :: \"prog \\ ty \\ ty \\ bool\" (\"_\\_\\_\" [71,71,71] 70)\n for G :: prog\nwhere\n subcls: \"G\\C\\\\<^sub>C D \\ G\\ Class D\\Class C\"\n| implmt: \"\\G\\C\\I \\ G\\ Class C\\Iface I\"\n| obj_arr: \"G\\Class Object\\T.[]\"\n| int_cls: \"G\\ Iface I\\Class C\"\n| subint: \"imethds G I hidings imethds G J entails \n (\\(md, mh ) (md',mh'). G\\mrt mh\\mrt mh') \\\n \\G\\I\\I J \\ G\\ Iface I\\Iface J\"\n| array: \"G\\RefT S\\RefT T \\ G\\ RefT S.[]\\RefT T.[]\"\n\n(*unused*)\nlemma narrow_RefT: \"G\\RefT R\\T \\ \\t. T=RefT t\"\napply (ind_cases \"G\\RefT R\\T\")\nby auto\n\nlemma narrow_RefT2: \"G\\S\\RefT R \\ \\t. S=RefT t\"\napply (ind_cases \"G\\S\\RefT R\")\nby auto\n\n(*unused*)\nlemma narrow_PrimT: \"G\\PrimT pt\\T \\ \\t. T=PrimT t\"\nby (ind_cases \"G\\PrimT pt\\T\")\n\nlemma narrow_PrimT2: \"G\\S\\PrimT pt \\ \n \\t. S=PrimT t \\ G\\PrimT t\\PrimT pt\"\nby (ind_cases \"G\\S\\PrimT pt\")\n\ntext \\\n These narrowing lemmata hold in Bali but are to strong for ordinary\n Java. They would not work for real Java Integral Types, like short, \n long, int. These lemmata are just for documentation and are not used.\n\\\nlemma narrow_PrimT_strong: \"G\\PrimT pt\\T \\ T=PrimT pt\"\nby (ind_cases \"G\\PrimT pt\\T\")\n\nlemma narrow_PrimT2_strong: \"G\\S\\PrimT pt \\ S=PrimT pt\"\nby (ind_cases \"G\\S\\PrimT pt\")\n\ntext \\Specialized versions for booleans also would work for real Java\\\n\nlemma narrow_Boolean: \"G\\PrimT Boolean\\T \\ T=PrimT Boolean\"\nby (ind_cases \"G\\PrimT Boolean\\T\")\n\nlemma narrow_Boolean2: \"G\\S\\PrimT Boolean \\ S=PrimT Boolean\"\nby (ind_cases \"G\\S\\PrimT Boolean\")\n\nsubsubsection \"casting relation\"\n\ninductive \\ \\casting conversion, cf. 5.5\\\n cast :: \"prog \\ ty \\ ty \\ bool\" (\"_\\_\\? _\" [71,71,71] 70)\n for G :: prog\nwhere\n widen: \"G\\S\\T \\ G\\S\\? T\"\n| narrow: \"G\\S\\T \\ G\\S\\? T\"\n\n(*unused*)\nlemma cast_RefT: \"G\\RefT R\\? T \\ \\t. T=RefT t\"\napply (ind_cases \"G\\RefT R\\? T\")\nby (auto dest: widen_RefT narrow_RefT)\n\nlemma cast_RefT2: \"G\\S\\? RefT R \\ \\t. S=RefT t\"\napply (ind_cases \"G\\S\\? RefT R\")\nby (auto dest: widen_RefT2 narrow_RefT2)\n\n(*unused*)\nlemma cast_PrimT: \"G\\PrimT pt\\? T \\ \\t. T=PrimT t\"\napply (ind_cases \"G\\PrimT pt\\? T\")\nby (auto dest: widen_PrimT narrow_PrimT)\n\nlemma cast_PrimT2: \"G\\S\\? PrimT pt \\ \\t. S=PrimT t \\ G\\PrimT t\\PrimT pt\"\napply (ind_cases \"G\\S\\? PrimT pt\")\nby (auto dest: widen_PrimT2 narrow_PrimT2)\n\nlemma cast_Boolean: \n assumes bool_cast: \"G\\PrimT Boolean\\? T\" \n shows \"T=PrimT Boolean\"\nusing bool_cast \nproof (cases)\n case widen \n hence \"G\\PrimT Boolean\\ T\"\n by simp\n thus ?thesis by (rule widen_Boolean)\nnext\n case narrow\n hence \"G\\PrimT Boolean\\T\"\n by simp\n thus ?thesis by (rule narrow_Boolean)\nqed\n\nlemma cast_Boolean2: \n assumes bool_cast: \"G\\S\\? PrimT Boolean\" \n shows \"S = PrimT Boolean\"\nusing bool_cast \nproof (cases)\n case widen \n hence \"G\\S\\ PrimT Boolean\"\n by simp\n thus ?thesis by (rule widen_Boolean2)\nnext\n case narrow\n hence \"G\\S\\PrimT Boolean\"\n by simp\n thus ?thesis by (rule narrow_Boolean2)\nqed\n\nend\n", "meta": {"author": "seL4", "repo": "isabelle", "sha": "e1ab32a3bb41728cd19541063283e37919978a4c", "save_path": "github-repos/isabelle/seL4-isabelle", "path": "github-repos/isabelle/seL4-isabelle/isabelle-e1ab32a3bb41728cd19541063283e37919978a4c/src/HOL/Bali/TypeRel.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.28776782186926264, "lm_q1q2_score": 0.14500798111963473}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\n The refinement relation between abstract and concrete states\n*)\n\ntheory StateRelation\nimports InvariantUpdates_H\nbegin\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\ndefinition\n cte_map :: \"cslot_ptr \\ word32\"\nwhere\n \"cte_map \\ \\(oref, cref). oref + (of_bl cref * 2 ^ cte_level_bits)\"\n\nlemmas cte_map_def' = cte_map_def[simplified cte_level_bits_def, simplified]\n\ndefinition\n lookup_failure_map :: \"ExceptionTypes_A.lookup_failure \\ Fault_H.lookup_failure\"\nwhere\n \"lookup_failure_map \\ \\lf. case lf of\n ExceptionTypes_A.InvalidRoot \\ Fault_H.InvalidRoot\n | ExceptionTypes_A.MissingCapability n \\ Fault_H.MissingCapability n\n | ExceptionTypes_A.DepthMismatch n m \\ Fault_H.DepthMismatch n m\n | ExceptionTypes_A.GuardMismatch n g \\ Fault_H.GuardMismatch n (of_bl g) (length g)\"\n\nprimrec\n arch_fault_map :: \"Machine_A.ARM_A.arch_fault \\ ArchFault_H.ARM_H.arch_fault\"\nwhere\n \"arch_fault_map (Machine_A.ARM_A.VMFault ptr msg) = ArchFault_H.ARM_H.VMFault ptr msg\"\n\nprimrec\n fault_map :: \"ExceptionTypes_A.fault \\ Fault_H.fault\"\nwhere\n \"fault_map (ExceptionTypes_A.CapFault ref bool failure) =\n Fault_H.CapFault ref bool (lookup_failure_map failure)\"\n| \"fault_map (ExceptionTypes_A.ArchFault arch_fault) =\n Fault_H.ArchFault (arch_fault_map arch_fault)\"\n| \"fault_map (ExceptionTypes_A.UnknownSyscallException n) =\n Fault_H.UnknownSyscallException n\"\n| \"fault_map (ExceptionTypes_A.UserException x y) =\n Fault_H.UserException x y\"\n\n\ntext \\\n A pspace and a tree are related if every object in the pspace\n corresponds to an object in the tree. Some abstract objects\n like CapTables correspond to multiple concrete ones, thus we\n have to make cuts.\n\\\n\ntype_synonym obj_relation_cut = \"Structures_A.kernel_object \\ Structures_H.kernel_object \\ bool\"\ntype_synonym obj_relation_cuts = \"(word32 \\ obj_relation_cut) set\"\n\ndefinition\n vmrights_map :: \"rights set \\ vmrights\"\nwhere\n \"vmrights_map S \\ if AllowRead \\ S\n then (if AllowWrite \\ S then VMReadWrite else VMReadOnly)\n else VMKernelOnly\"\n\ndefinition\n zbits_map :: \"nat option \\ zombie_type\"\nwhere\n \"zbits_map N \\ case N of Some n \\ ZombieCNode n\n | None \\ ZombieTCB\"\n\nprimrec\n acap_relation :: \"arch_cap \\ arch_capability \\ bool\"\nwhere\n \"acap_relation (arch_cap.ASIDPoolCap x y) c = (c =\n arch_capability.ASIDPoolCap x y)\"\n| \"acap_relation (arch_cap.ASIDControlCap) c = (c =\n arch_capability.ASIDControlCap)\"\n| \"acap_relation (arch_cap.PageCap dev word rghts sz data) c = (c =\n arch_capability.PageCap dev word (vmrights_map rghts) sz data)\"\n| \"acap_relation (arch_cap.PageTableCap word data) c = (c =\n arch_capability.PageTableCap word data)\"\n| \"acap_relation (arch_cap.PageDirectoryCap word data) c = (c =\n arch_capability.PageDirectoryCap word data)\"\n\nprimrec\n cap_relation :: \"cap \\ capability \\ bool\"\nwhere\n \"cap_relation Structures_A.NullCap c = (c =\n Structures_H.NullCap)\"\n| \"cap_relation Structures_A.DomainCap c = (c =\n Structures_H.DomainCap)\"\n| \"cap_relation (Structures_A.UntypedCap dev ref n f) c = (c =\n Structures_H.UntypedCap dev ref n f)\"\n| \"cap_relation (Structures_A.EndpointCap ref b r) c = (c =\n Structures_H.EndpointCap ref b (AllowSend \\ r)\n (AllowRecv \\ r) (AllowGrant \\ r) (AllowGrantReply \\ r))\"\n| \"cap_relation (Structures_A.NotificationCap ref b r) c = (c =\n Structures_H.NotificationCap ref b (AllowSend \\ r) (AllowRecv \\ r))\"\n| \"cap_relation (Structures_A.CNodeCap ref n L) c = (c =\n Structures_H.CNodeCap ref n (of_bl L) (length L))\"\n| \"cap_relation (Structures_A.ThreadCap ref) c = (c =\n Structures_H.ThreadCap ref)\"\n| \"cap_relation (Structures_A.ReplyCap ref master r) c = (c =\n Structures_H.ReplyCap ref master (AllowGrant \\ r))\"\n| \"cap_relation (Structures_A.IRQControlCap) c = (c =\n Structures_H.IRQControlCap)\"\n| \"cap_relation (Structures_A.IRQHandlerCap irq) c = (c =\n Structures_H.IRQHandlerCap irq)\"\n| \"cap_relation (Structures_A.ArchObjectCap a) c = (\\a'.\n acap_relation a a' \\ c = Structures_H.ArchObjectCap a')\"\n| \"cap_relation (Structures_A.Zombie p b n) c = (c =\n Structures_H.Zombie p (zbits_map b) n)\"\n\n\ndefinition\n cte_relation :: \"cap_ref \\ obj_relation_cut\"\nwhere\n \"cte_relation y \\ \\ko ko'. \\sz cs cte cap. ko = CNode sz cs \\ ko' = KOCTE cte\n \\ cs y = Some cap \\ cap_relation cap (cteCap cte)\"\n\ndefinition\n asid_pool_relation :: \"(10 word \\ word32) \\ asidpool \\ bool\"\nwhere\n \"asid_pool_relation \\ \\p p'. p = inv ASIDPool p' o ucast\"\n\ndefinition\n ntfn_relation :: \"Structures_A.notification \\ Structures_H.notification \\ bool\"\nwhere\n \"ntfn_relation \\ \\ntfn ntfn'.\n (case ntfn_obj ntfn of\n Structures_A.IdleNtfn \\ ntfnObj ntfn' = Structures_H.IdleNtfn\n | Structures_A.WaitingNtfn q \\ ntfnObj ntfn' = Structures_H.WaitingNtfn q\n | Structures_A.ActiveNtfn b \\ ntfnObj ntfn' = Structures_H.ActiveNtfn b)\n \\ ntfn_bound_tcb ntfn = ntfnBoundTCB ntfn'\"\n\ndefinition\n ep_relation :: \"Structures_A.endpoint \\ Structures_H.endpoint \\ bool\"\nwhere\n \"ep_relation \\ \\ep ep'. case ep of\n Structures_A.IdleEP \\ ep' = Structures_H.IdleEP\n | Structures_A.RecvEP q \\ ep' = Structures_H.RecvEP q\n | Structures_A.SendEP q \\ ep' = Structures_H.SendEP q\"\n\ndefinition\n fault_rel_optionation :: \"ExceptionTypes_A.fault option \\ Fault_H.fault option \\ bool\"\nwhere\n \"fault_rel_optionation \\ \\f f'. f' = option_map fault_map f\"\n\nprimrec\n thread_state_relation :: \"Structures_A.thread_state \\ Structures_H.thread_state \\ bool\"\nwhere\n \"thread_state_relation (Structures_A.Running) ts'\n = (ts' = Structures_H.Running)\"\n| \"thread_state_relation (Structures_A.Restart) ts'\n = (ts' = Structures_H.Restart)\"\n| \"thread_state_relation (Structures_A.Inactive) ts'\n = (ts' = Structures_H.Inactive)\"\n| \"thread_state_relation (Structures_A.IdleThreadState) ts'\n = (ts' = Structures_H.IdleThreadState)\"\n| \"thread_state_relation (Structures_A.BlockedOnReply) ts'\n = (ts' = Structures_H.BlockedOnReply)\"\n| \"thread_state_relation (Structures_A.BlockedOnReceive oref sp) ts'\n = (ts' = Structures_H.BlockedOnReceive oref (receiver_can_grant sp))\"\n| \"thread_state_relation (Structures_A.BlockedOnSend oref sp) ts'\n = (ts' = Structures_H.BlockedOnSend oref (sender_badge sp)\n (sender_can_grant sp) (sender_can_grant_reply sp) (sender_is_call sp))\"\n| \"thread_state_relation (Structures_A.BlockedOnNotification oref) ts'\n = (ts' = Structures_H.BlockedOnNotification oref)\"\n\ndefinition\n arch_tcb_relation :: \"Structures_A.arch_tcb \\ Structures_H.arch_tcb \\ bool\"\nwhere\n \"arch_tcb_relation \\ \\atcb atcb'.\n tcb_context atcb = atcbContext atcb'\"\n\ndefinition\n tcb_relation :: \"Structures_A.tcb \\ Structures_H.tcb \\ bool\"\nwhere\n \"tcb_relation \\ \\tcb tcb'.\n tcb_fault_handler tcb = to_bl (tcbFaultHandler tcb')\n \\ tcb_ipc_buffer tcb = tcbIPCBuffer tcb'\n \\ arch_tcb_relation (tcb_arch tcb) (tcbArch tcb')\n \\ thread_state_relation (tcb_state tcb) (tcbState tcb')\n \\ fault_rel_optionation (tcb_fault tcb) (tcbFault tcb')\n \\ cap_relation (tcb_ctable tcb) (cteCap (tcbCTable tcb'))\n \\ cap_relation (tcb_vtable tcb) (cteCap (tcbVTable tcb'))\n \\ cap_relation (tcb_reply tcb) (cteCap (tcbReply tcb'))\n \\ cap_relation (tcb_caller tcb) (cteCap (tcbCaller tcb'))\n \\ cap_relation (tcb_ipcframe tcb) (cteCap (tcbIPCBufferFrame tcb'))\n \\ tcb_bound_notification tcb = tcbBoundNotification tcb'\n \\ tcb_mcpriority tcb = tcbMCP tcb'\"\n\ndefinition\n other_obj_relation :: \"Structures_A.kernel_object \\ Structures_H.kernel_object \\ bool\"\nwhere\n \"other_obj_relation obj obj' \\\n (case (obj, obj') of\n (TCB tcb, KOTCB tcb') \\ tcb_relation tcb tcb'\n | (Endpoint ep, KOEndpoint ep') \\ ep_relation ep ep'\n | (Notification ntfn, KONotification ntfn') \\ ntfn_relation ntfn ntfn'\n | (ArchObj (ARM_A.ASIDPool pool), KOArch (KOASIDPool pool'))\n \\ asid_pool_relation pool pool'\n | _ \\ False)\"\n\nprimrec\n pde_relation' :: \"ARM_A.pde \\ ARM_H.pde \\ bool\"\nwhere\n \"pde_relation' ARM_A.InvalidPDE x = (x = ARM_H.InvalidPDE)\"\n| \"pde_relation' (ARM_A.PageTablePDE ptr atts domain) x\n = (x = ARM_H.PageTablePDE ptr (ParityEnabled \\ atts) domain)\"\n| \"pde_relation' (ARM_A.SectionPDE ptr atts domain rghts) x\n = (x = ARM_H.SectionPDE ptr (ParityEnabled \\ atts) domain\n (PageCacheable \\ atts) (Global \\ atts) (XNever \\ atts) (vmrights_map rghts))\"\n| \"pde_relation' (ARM_A.SuperSectionPDE ptr atts rghts) x\n = (x = ARM_H.SuperSectionPDE ptr (ParityEnabled \\ atts)\n (PageCacheable \\ atts) (Global \\ atts) (XNever \\ atts) (vmrights_map rghts))\"\n\n\nprimrec\n pte_relation' :: \"ARM_A.pte \\ ARM_H.pte \\ bool\"\nwhere\n \"pte_relation' ARM_A.InvalidPTE x = (x = ARM_H.InvalidPTE)\"\n| \"pte_relation' (ARM_A.LargePagePTE ptr atts rghts) x\n = (x = ARM_H.LargePagePTE ptr (PageCacheable \\ atts) (Global \\ atts)\n (XNever \\ atts) (vmrights_map rghts))\"\n| \"pte_relation' (ARM_A.SmallPagePTE ptr atts rghts) x\n = (x = ARM_H.SmallPagePTE ptr (PageCacheable \\ atts) (Global \\ atts)\n (XNever \\ atts) (vmrights_map rghts))\"\n\n\ndefinition\n pde_align' :: \"ARM_H.pde \\ nat\"\nwhere\n \"pde_align' pde \\\n case pde of ARM_H.pde.SuperSectionPDE _ _ _ _ _ _ \\ 4 | _ \\ 0\"\n\nlemmas pde_align_simps[simp] =\n pde_align'_def[split_simps ARM_A.pde.split]\n\ndefinition\n pte_align' :: \"ARM_H.pte \\ nat\"\nwhere\n \"pte_align' pte \\ case pte of ARM_H.pte.LargePagePTE _ _ _ _ _ \\ 4 | _ \\ 0\"\n\nlemmas pte_align_simps[simp] =\n pte_align'_def[split_simps ARM_A.pte.split]\n\ndefinition\n \"pde_relation_aligned y pde pde' \\\n if is_aligned y (pde_align' pde') then pde_relation' pde pde'\n else pde = ARM_A.InvalidPDE\"\n\ndefinition\n \"pte_relation_aligned y pte pte' \\\n if is_aligned y (pte_align' pte') then pte_relation' pte pte'\n else pte = ARM_A.InvalidPTE\"\n\ndefinition\n \"pte_relation y \\ \\ko ko'. \\pt pte. ko = ArchObj (PageTable pt) \\ ko' = KOArch (KOPTE pte)\n \\ pte_relation_aligned y (pt y) pte\"\n\ndefinition\n \"pde_relation y \\ \\ko ko'. \\pd pde. ko = ArchObj (PageDirectory pd) \\ ko' = KOArch (KOPDE pde)\n \\ pde_relation_aligned y (pd y) pde\"\n\nprimrec\n aobj_relation_cuts :: \"ARM_A.arch_kernel_obj \\ word32 \\ obj_relation_cuts\"\nwhere\n \"aobj_relation_cuts (DataPage dev sz) x =\n {(x + n * 2 ^ pageBits, \\_ obj. obj = (if dev then KOUserDataDevice else KOUserData) ) | n . n < 2 ^ (pageBitsForSize sz - pageBits) }\"\n| \"aobj_relation_cuts (ARM_A.ASIDPool pool) x =\n {(x, other_obj_relation)}\"\n| \"aobj_relation_cuts (PageTable pt) x =\n (\\y. (x + (ucast y << 2), pte_relation y)) ` UNIV\"\n| \"aobj_relation_cuts (PageDirectory pd) x =\n (\\y. (x + (ucast y << 2), pde_relation y)) ` UNIV\"\n\nprimrec\n obj_relation_cuts :: \"Structures_A.kernel_object \\ word32 \\ obj_relation_cuts\"\nwhere\n \"obj_relation_cuts (CNode sz cs) x =\n (if well_formed_cnode_n sz cs\n then {(cte_map (x, y), cte_relation y) | y. y \\ dom cs}\n else {(x, \\\\)})\"\n| \"obj_relation_cuts (TCB tcb) x = {(x, other_obj_relation)}\"\n| \"obj_relation_cuts (Endpoint ep) x = {(x, other_obj_relation)}\"\n| \"obj_relation_cuts (Notification ntfn) x = {(x, other_obj_relation)}\"\n| \"obj_relation_cuts (ArchObj ao) x = aobj_relation_cuts ao x\"\n\n\nlemma obj_relation_cuts_def2:\n \"obj_relation_cuts ko x =\n (case ko of CNode sz cs \\ if well_formed_cnode_n sz cs\n then {(cte_map (x, y), cte_relation y) | y. y \\ dom cs}\n else {(x, \\\\)}\n | ArchObj (PageTable pt) \\ (\\y. (x + (ucast y << 2), pte_relation y))\n ` (UNIV :: word8 set)\n | ArchObj (PageDirectory pd) \\ (\\y. (x + (ucast y << 2), pde_relation y))\n ` (UNIV :: 12 word set)\n | ArchObj (DataPage dev sz) \\\n {(x + n * 2 ^ pageBits, \\_ obj. obj =(if dev then KOUserDataDevice else KOUserData)) | n . n < 2 ^ (pageBitsForSize sz - pageBits) }\n | _ \\ {(x, other_obj_relation)})\"\n by (simp split: Structures_A.kernel_object.split\n ARM_A.arch_kernel_obj.split)\n\nlemma obj_relation_cuts_def3:\n \"obj_relation_cuts ko x =\n (case (a_type ko) of\n ACapTable n \\ {(cte_map (x, y), cte_relation y) | y. length y = n}\n | AArch APageTable \\ (\\y. (x + (ucast y << 2), pte_relation y))\n ` (UNIV :: word8 set)\n | AArch APageDirectory \\ (\\y. (x + (ucast y << 2), pde_relation y))\n ` (UNIV :: 12 word set)\n | AArch (AUserData sz) \\ {(x + n * 2 ^ pageBits, \\_ obj. obj = KOUserData) | n . n < 2 ^ (pageBitsForSize sz - pageBits) }\n | AArch (ADeviceData sz) \\ {(x + n * 2 ^ pageBits, \\_ obj. obj = KOUserDataDevice ) | n . n < 2 ^ (pageBitsForSize sz - pageBits) }\n | AGarbage _ \\ {(x, \\\\)}\n | _ \\ {(x, other_obj_relation)})\"\n apply (simp add: obj_relation_cuts_def2 a_type_def\n split: Structures_A.kernel_object.split\n ARM_A.arch_kernel_obj.split)\n apply (clarsimp simp: well_formed_cnode_n_def length_set_helper)\n done\n\ndefinition\n \"is_other_obj_relation_type tp \\\n case tp of\n ACapTable n \\ False\n | AArch APageTable \\ False\n | AArch APageDirectory \\ False\n | AArch (AUserData _) \\ False\n | AArch (ADeviceData _) \\ False\n | AGarbage _ \\ False\n | _ \\ True\"\n\nlemma is_other_obj_relation_type_CapTable:\n \"\\ is_other_obj_relation_type (ACapTable n)\"\n by (simp add: is_other_obj_relation_type_def)\n\nlemma is_other_obj_relation_type_UserData:\n \"\\ is_other_obj_relation_type (AArch (AUserData sz))\"\n unfolding is_other_obj_relation_type_def by simp\n\nlemma is_other_obj_relation_type_DeviceData:\n \"\\ is_other_obj_relation_type (AArch (ADeviceData sz))\"\n unfolding is_other_obj_relation_type_def by simp\n\nlemma is_other_obj_relation_type:\n \"is_other_obj_relation_type (a_type ko) \\\n obj_relation_cuts ko x = {(x, other_obj_relation)}\"\n by (simp add: obj_relation_cuts_def3 is_other_obj_relation_type_def\n split: a_type.splits aa_type.splits)\n\ndefinition\n pspace_dom :: \"Structures_A.kheap \\ word32 set\"\nwhere\n \"pspace_dom ps \\ \\x\\dom ps. fst ` (obj_relation_cuts (the (ps x)) x)\"\n\ndefinition\n pspace_relation :: \"Structures_A.kheap \\ (word32 \\ Structures_H.kernel_object) \\ bool\"\nwhere\n \"pspace_relation ab con \\\n (pspace_dom ab = dom con) \\\n (\\x \\ dom ab. \\(y, P) \\ obj_relation_cuts (the (ab x)) x.\n P (the (ab x)) (the (con y)))\"\n\ndefinition etcb_relation :: \"etcb \\ Structures_H.tcb \\ bool\"\nwhere\n \"etcb_relation \\ \\etcb tcb'.\n tcb_priority etcb = tcbPriority tcb'\n \\ tcb_time_slice etcb = tcbTimeSlice tcb'\n \\ tcb_domain etcb = tcbDomain tcb'\"\n\ndefinition\n ekheap_relation :: \"(obj_ref \\ etcb option) \\ (word32 \\ Structures_H.kernel_object) \\ bool\"\nwhere\n \"ekheap_relation ab con \\\n \\x \\ dom ab. \\tcb'. con x = Some (KOTCB tcb') \\ etcb_relation (the (ab x)) tcb'\"\n\nprimrec\n sched_act_relation :: \"Deterministic_A.scheduler_action \\ Structures_H.scheduler_action \\ bool\"\nwhere\n \"sched_act_relation resume_cur_thread a' = (a' = ResumeCurrentThread)\" |\n \"sched_act_relation choose_new_thread a' = (a' = ChooseNewThread)\" |\n \"sched_act_relation (switch_thread x) a' = (a' = SwitchToThread x)\"\n\ndefinition\n ready_queues_relation :: \"(Deterministic_A.domain \\ Structures_A.priority \\ Deterministic_A.ready_queue)\n \\ (domain \\ priority \\ KernelStateData_H.ready_queue) \\ bool\"\nwhere\n \"ready_queues_relation qs qs' \\ \\d p. (qs d p = qs' (d, p))\"\n\ndefinition\n ghost_relation :: \"Structures_A.kheap \\ (word32 \\ vmpage_size) \\ (word32 \\ nat) \\ bool\"\nwhere\n \"ghost_relation h ups cns \\\n (\\a sz. (\\dev. h a = Some (ArchObj (DataPage dev sz))) \\ ups a = Some sz) \\\n (\\a n. (\\cs. h a = Some (CNode n cs) \\ well_formed_cnode_n n cs) \\\n cns a = Some n)\"\n\ndefinition\n cdt_relation :: \"(cslot_ptr \\ bool) \\ cdt \\ cte_heap \\ bool\"\nwhere\n \"cdt_relation \\ \\cte_at m m'.\n \\c. cte_at c \\ cte_map ` descendants_of c m = descendants_of' (cte_map c) m'\"\n\ndefinition\n cdt_list_relation :: \"cdt_list \\ cdt \\ cte_heap \\ bool\"\nwhere\n \"cdt_list_relation \\ \\t m m'.\n \\c cap node. m' (cte_map c) = Some (CTE cap node)\n \\ (case next_slot c t m of None \\ True\n | Some next \\ mdbNext node = cte_map next)\"\n\ndefinition\n revokable_relation :: \"(cslot_ptr \\ bool) \\ (cslot_ptr \\ cap option) \\ cte_heap \\ bool\"\nwhere\n \"revokable_relation revo cs m' \\\n \\c cap node. cs c \\ None \\\n m' (cte_map c) = Some (CTE cap node) \\\n revo c = mdbRevocable node\"\n\ndefinition\n irq_state_relation :: \"irq_state \\ irqstate \\ bool\"\nwhere\n \"irq_state_relation irq irq' \\ case (irq, irq') of\n (irq_state.IRQInactive, irqstate.IRQInactive) \\ True\n | (irq_state.IRQSignal, irqstate.IRQSignal) \\ True\n | (irq_state.IRQTimer, irqstate.IRQTimer) \\ True\n | _ \\ False\"\n\ndefinition\n interrupt_state_relation :: \"(irq \\ obj_ref) \\ (irq \\ irq_state) \\ interrupt_state \\ bool\"\nwhere\n \"interrupt_state_relation node_map irqs is \\\n (\\node irqs'. is = InterruptState node irqs'\n \\ (\\irq. node_map irq = node + (ucast irq << cte_level_bits))\n \\ (\\irq. irq_state_relation (irqs irq) (irqs' irq)))\"\n\ndefinition\n arch_state_relation :: \"(arch_state \\ ARM_H.kernel_state) set\"\nwhere\n \"arch_state_relation \\ {(s, s') .\n arm_asid_table s = armKSASIDTable s' o ucast\n \\ arm_global_pd s = armKSGlobalPD s'\n \\ arm_hwasid_table s = armKSHWASIDTable s'\n \\ arm_global_pts s = armKSGlobalPTs s'\n \\ arm_next_asid s = armKSNextASID s'\n \\ arm_asid_map s = armKSASIDMap s'\n \\ arm_kernel_vspace s = armKSKernelVSpace s'}\"\n\n\ndefinition\n rights_mask_map :: \"rights set \\ Types_H.cap_rights\"\nwhere\n \"rights_mask_map \\ \\rs. CapRights (AllowWrite \\ rs) (AllowRead \\ rs) (AllowGrant \\ rs)\n (AllowGrantReply \\ rs)\"\n\n\nlemma obj_relation_cutsE:\n \"\\ (y, P) \\ obj_relation_cuts ko x; P ko ko';\n \\sz cs z cap cte. \\ ko = CNode sz cs; well_formed_cnode_n sz cs; y = cte_map (x, z);\n ko' = KOCTE cte; cs z = Some cap; cap_relation cap (cteCap cte) \\\n \\ R;\n \\pt (z :: word8) pte'. \\ ko = ArchObj (PageTable pt); y = x + (ucast z << 2);\n ko' = KOArch (KOPTE pte'); pte_relation_aligned z (pt z) pte' \\\n \\ R;\n \\pd (z :: 12 word) pde'. \\ ko = ArchObj (PageDirectory pd); y = x + (ucast z << 2);\n ko' = KOArch (KOPDE pde'); pde_relation_aligned z (pd z) pde' \\\n \\ R;\n \\sz dev n. \\ ko = ArchObj (DataPage dev sz); ko' = (if dev then KOUserDataDevice else KOUserData);\n y = x + n * 2 ^ pageBits; n < 2 ^ (pageBitsForSize sz - pageBits) \\ \\ R;\n \\ y = x; other_obj_relation ko ko'; is_other_obj_relation_type (a_type ko) \\ \\ R\n \\ \\ R\"\n apply (simp add: obj_relation_cuts_def2 is_other_obj_relation_type_def\n a_type_def\n split: Structures_A.kernel_object.split_asm if_split_asm\n ARM_A.arch_kernel_obj.split_asm)\n apply ((clarsimp split: if_splits,\n force simp: cte_relation_def pte_relation_def pde_relation_def)+)[5]\n done\n\nlemma eq_trans_helper:\n \"\\ x = y; P y = Q \\ \\ P x = Q\"\n by simp\n\nlemma cap_relation_case':\n \"cap_relation cap cap'\n = (case cap of cap.ArchObjectCap arch_cap.ASIDControlCap \\ cap_relation cap cap'\n | _ \\ cap_relation cap cap')\"\n by (simp split: cap.split arch_cap.split)\n\nschematic_goal cap_relation_case:\n \"cap_relation cap cap' = ?P\"\n apply (subst cap_relation_case')\n apply (clarsimp cong: cap.case_cong arch_cap.case_cong)\n apply (rule refl)\n done\n\nlemmas cap_relation_split =\n eq_trans_helper [where P=P, OF cap_relation_case cap.split[where P=P]] for P\nlemmas cap_relation_split_asm =\n eq_trans_helper [where P=P, OF cap_relation_case cap.split_asm[where P=P]] for P\n\n\n\ntext \\Relations on other data types that aren't stored but\n used as intermediate values in the specs.\\\n\nprimrec\n message_info_map :: \"Structures_A.message_info \\ Types_H.message_info\"\nwhere\n \"message_info_map (Structures_A.MI a b c d) = (Types_H.MI a b c d)\"\n\nlemma mi_map_label[simp]: \"msgLabel (message_info_map mi) = mi_label mi\"\n by (cases mi, simp)\n\nprimrec\n syscall_error_map :: \"ExceptionTypes_A.syscall_error \\ Fault_H.syscall_error\"\nwhere\n \"syscall_error_map (ExceptionTypes_A.InvalidArgument n) = Fault_H.InvalidArgument n\"\n| \"syscall_error_map (ExceptionTypes_A.InvalidCapability n) = (Fault_H.InvalidCapability n)\"\n| \"syscall_error_map ExceptionTypes_A.IllegalOperation = Fault_H.IllegalOperation\"\n| \"syscall_error_map (ExceptionTypes_A.RangeError n m) = Fault_H.RangeError n m\"\n| \"syscall_error_map ExceptionTypes_A.AlignmentError = Fault_H.AlignmentError\"\n| \"syscall_error_map (ExceptionTypes_A.FailedLookup b lf) = Fault_H.FailedLookup b (lookup_failure_map lf)\"\n| \"syscall_error_map ExceptionTypes_A.TruncatedMessage = Fault_H.TruncatedMessage\"\n| \"syscall_error_map ExceptionTypes_A.DeleteFirst = Fault_H.DeleteFirst\"\n| \"syscall_error_map ExceptionTypes_A.RevokeFirst = Fault_H.RevokeFirst\"\n| \"syscall_error_map (ExceptionTypes_A.NotEnoughMemory n) = Fault_H.syscall_error.NotEnoughMemory n\"\n\ndefinition\n APIType_map :: \"Structures_A.apiobject_type \\ ARM_H.object_type\"\nwhere\n \"APIType_map ty \\ case ty of\n Structures_A.Untyped \\ APIObjectType ArchTypes_H.Untyped\n | Structures_A.TCBObject \\ APIObjectType ArchTypes_H.TCBObject\n | Structures_A.EndpointObject \\ APIObjectType ArchTypes_H.EndpointObject\n | Structures_A.NotificationObject \\ APIObjectType ArchTypes_H.NotificationObject\n | Structures_A.CapTableObject \\ APIObjectType ArchTypes_H.CapTableObject\n | ArchObject ao \\ (case ao of\n SmallPageObj \\ SmallPageObject\n | LargePageObj \\ LargePageObject\n | SectionObj \\ SectionObject\n | SuperSectionObj \\ SuperSectionObject\n | PageTableObj \\ PageTableObject\n | PageDirectoryObj \\ PageDirectoryObject)\"\n\ndefinition\n state_relation :: \"(det_state \\ kernel_state) set\"\nwhere\n \"state_relation \\ {(s, s').\n pspace_relation (kheap s) (ksPSpace s')\n \\ ekheap_relation (ekheap s) (ksPSpace s')\n \\ sched_act_relation (scheduler_action s) (ksSchedulerAction s')\n \\ ready_queues_relation (ready_queues s) (ksReadyQueues s')\n \\ ghost_relation (kheap s) (gsUserPages s') (gsCNodes s')\n \\ cdt_relation (swp cte_at s) (cdt s) (ctes_of s')\n \\ cdt_list_relation (cdt_list s) (cdt s) (ctes_of s')\n \\ revokable_relation (is_original_cap s) (null_filter (caps_of_state s)) (ctes_of s')\n \\ (arch_state s, ksArchState s') \\ arch_state_relation\n \\ interrupt_state_relation (interrupt_irq_node s) (interrupt_states s) (ksInterruptState s')\n \\ (cur_thread s = ksCurThread s')\n \\ (idle_thread s = ksIdleThread s')\n \\ (machine_state s = ksMachineState s')\n \\ (work_units_completed s = ksWorkUnitsCompleted s')\n \\ (domain_index s = ksDomScheduleIdx s')\n \\ (domain_list s = ksDomSchedule s')\n \\ (cur_domain s = ksCurDomain s')\n \\ (domain_time s = ksDomainTime s')}\"\n\ntext \\Rules for using states in the relation.\\\n\nlemma curthread_relation:\n \"(a, b) \\ state_relation \\ ksCurThread b = cur_thread a\"\n by (simp add: state_relation_def)\n\nlemma state_relation_pspace_relation[elim!]:\n \"(s,s') \\ state_relation \\ pspace_relation (kheap s) (ksPSpace s')\"\n by (simp add: state_relation_def)\n\nlemma state_relation_ekheap_relation[elim!]:\n \"(s,s') \\ state_relation \\ ekheap_relation (ekheap s) (ksPSpace s')\"\n by (simp add: state_relation_def)\n\nlemma state_relationD:\n assumes sr: \"(s, s') \\ state_relation\"\n shows \"pspace_relation (kheap s) (ksPSpace s') \\\n ekheap_relation (ekheap s) (ksPSpace s') \\\n sched_act_relation (scheduler_action s) (ksSchedulerAction s') \\\n ready_queues_relation (ready_queues s) (ksReadyQueues s') \\\n ghost_relation (kheap s) (gsUserPages s') (gsCNodes s') \\\n cdt_relation (swp cte_at s) (cdt s) (ctes_of s') \\\n cdt_list_relation (cdt_list s) (cdt s) (ctes_of s') \\\n revokable_relation (is_original_cap s) (null_filter (caps_of_state s)) (ctes_of s') \\\n (arch_state s, ksArchState s') \\ arch_state_relation \\\n interrupt_state_relation (interrupt_irq_node s) (interrupt_states s) (ksInterruptState s') \\\n cur_thread s = ksCurThread s' \\\n idle_thread s = ksIdleThread s' \\\n machine_state s = ksMachineState s' \\\n work_units_completed s = ksWorkUnitsCompleted s' \\\n domain_index s = ksDomScheduleIdx s' \\\n domain_list s = ksDomSchedule s' \\\n cur_domain s = ksCurDomain s' \\\n domain_time s = ksDomainTime s'\"\n using sr unfolding state_relation_def by simp\n\nlemma state_relationE [elim?]:\n assumes sr: \"(s, s') \\ state_relation\"\n and rl: \"\\pspace_relation (kheap s) (ksPSpace s');\n ekheap_relation (ekheap s) (ksPSpace s');\n sched_act_relation (scheduler_action s) (ksSchedulerAction s');\n ready_queues_relation (ready_queues s) (ksReadyQueues s');\n ghost_relation (kheap s) (gsUserPages s') (gsCNodes s');\n cdt_relation (swp cte_at s) (cdt s) (ctes_of s') \\\n revokable_relation (is_original_cap s) (null_filter (caps_of_state s)) (ctes_of s');\n cdt_list_relation (cdt_list s) (cdt s) (ctes_of s');\n (arch_state s, ksArchState s') \\ arch_state_relation;\n interrupt_state_relation (interrupt_irq_node s) (interrupt_states s) (ksInterruptState s');\n cur_thread s = ksCurThread s';\n idle_thread s = ksIdleThread s';\n machine_state s = ksMachineState s';\n work_units_completed s = ksWorkUnitsCompleted s';\n domain_index s = ksDomScheduleIdx s';\n domain_list s = ksDomSchedule s';\n cur_domain s = ksCurDomain s';\n domain_time s = ksDomainTime s' \\ \\ R\"\n shows \"R\"\n using sr by (blast intro!: rl dest: state_relationD)\n\ntext \\This isn't defined for arch objects\\\n\nlemmas isCap_defs =\n isZombie_def isArchObjectCap_def\n isThreadCap_def isCNodeCap_def isNotificationCap_def\n isEndpointCap_def isUntypedCap_def isNullCap_def\n isIRQHandlerCap_def isIRQControlCap_def isReplyCap_def\n isPageCap_def isPageTableCap_def isPageDirectoryCap_def\n isASIDControlCap_def isASIDPoolCap_def isArchPageCap_def\n isDomainCap_def\n\nlemma isCNodeCap_cap_map [simp]:\n \"cap_relation c c' \\ isCNodeCap c' = is_cnode_cap c\"\n apply (cases c, simp_all add: isCap_defs split: sum.splits)\n apply clarsimp+\n done\n\nlemma sts_rel_idle :\n \"thread_state_relation st IdleThreadState = (st = Structures_A.IdleThreadState)\"\n by (cases st, auto)\n\nlemma pspace_relation_absD:\n \"\\ ab x = Some y; pspace_relation ab con \\\n \\ \\(x', P) \\ obj_relation_cuts y x. \\z. con x' = Some z \\ P y z\"\n apply (clarsimp simp add: pspace_relation_def)\n apply (drule bspec, erule domI)\n apply simp\n apply (drule(1) bspec)\n apply (subgoal_tac \"a \\ pspace_dom ab\")\n apply clarsimp\n apply (simp(no_asm) add: pspace_dom_def)\n apply (rule rev_bexI, erule domI)\n apply (simp add: image_def rev_bexI)\n done\n\nlemma ekheap_relation_absD:\n \"\\ ab x = Some y; ekheap_relation ab con \\\n \\ \\tcb'. con x = Some (KOTCB tcb') \\ etcb_relation y tcb'\"\n by (force simp add: ekheap_relation_def)\n\nlemma in_related_pspace_dom:\n \"\\ s' x = Some y; pspace_relation s s' \\ \\ x \\ pspace_dom s\"\n by (clarsimp simp add: pspace_relation_def)\n\nlemma pspace_dom_revE:\n \"\\ x \\ pspace_dom ps; \\ko y P. \\ ps y = Some ko; (x, P) \\ obj_relation_cuts ko y \\ \\ R \\ \\ R\"\n by (clarsimp simp add: pspace_dom_def)\n\nlemma pspace_dom_relatedE:\n \"\\ s' x = Some ko'; pspace_relation s s';\n \\y ko P. \\ s y = Some ko; (x, P) \\ obj_relation_cuts ko y; P ko ko' \\ \\ R\n \\ \\ R\"\n apply (rule pspace_dom_revE [OF in_related_pspace_dom],\n assumption+)\n apply (frule(1) pspace_relation_absD)\n apply fastforce\n done\n\nlemma ghost_relation_typ_at:\n \"ghost_relation (kheap s) ups cns \\\n (\\a sz. data_at sz a s = (ups a = Some sz)) \\\n (\\a n. typ_at (ACapTable n) a s = (cns a = Some n))\"\n apply (rule eq_reflection)\n apply (clarsimp simp: ghost_relation_def typ_at_eq_kheap_obj data_at_def)\n apply (intro conjI impI iffI allI; force)\n done\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/refine/ARM/StateRelation.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.28457600421652673, "lm_q1q2_score": 0.1445110712303212}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__75_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__75_on_rules imports n_g2kAbsAfter_lemma_on_inv__75\nbegin\nsection{*All lemmas on causal relation between inv__75*}\nlemma lemma_inv__75_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__75 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__75) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__75) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__75_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.28457600421652673, "lm_q1q2_score": 0.1445110712303212}} {"text": "(* Title: JinjaThreads/BV/BCVExec.thy\n Author: Andreas Lochbihler\n*)\n\nheader {* \\isaheader{Code generation for the byte code verifier} *}\n\ntheory BCVExec\nimports\n BVNoTypeError\n BVExec\nbegin\n\nlemmas [code_unfold] = exec_lub_def\n\nlemmas [code] = JVM_le_unfold[THEN meta_eq_to_obj_eq]\n\nlemma err_code [code]:\n \"Err.err A = Collect (case_err True (\\x. x \\ A))\"\nby(auto simp add: err_def split: err.split)\n\nlemma list_code [code]:\n \"list n A = {xs. size xs = n \\ list_all (\\x. x \\ A) xs}\"\nunfolding list_def\nby(auto intro!: ext simp add: list_all_iff)\n\nlemma opt_code [code]:\n \"opt A = Collect (case_option True (\\x. x \\ A))\"\nby(auto simp add: opt_def split: option.split)\n\nlemma Times_code [code_unfold]:\n \"Sigma A (%_. B) = {(a, b). a \\ A \\ b \\ B}\"\nby auto\n\nlemma upto_esl_code [code]:\n \"upto_esl m (A, r, f) = (Union ((\\n. list n A) ` {..m}), Listn.le r, Listn.sup f)\"\nby(auto simp add: upto_esl_def)\n\nlemmas [code] = lesub_def plussub_def\n\nlemma JVM_sup_unfold [code]:\n \"JVM_SemiType.sup S m n = \n lift2 (Opt.sup (Product.sup (Listn.sup (SemiType.sup S)) (\\x y. OK (map2 (lift2 (SemiType.sup S)) x y))))\"\nunfolding JVM_SemiType.sup_def JVM_SemiType.sl_def Opt.esl_def Err.sl_def\n stk_esl_def loc_sl_def Product.esl_def Listn.sl_def upto_esl_def \n SemiType.esl_def Err.esl_def \nby simp\n\n(* FIXME: why is @{thm sup_fun_def} declared [code del] in Lattices.thy? *)\ndeclare sup_fun_def [code] \n\n\n\nlemma check_types_code [code]:\n \"check_types P mxs mxl \\s = (list_all (\\x. x \\ (states P mxs mxl)) \\s)\"\nunfolding check_types_def by(auto simp add: list_all_iff)\n\nlemma wf_jvm_prog_code [code_unfold]:\n \"wf_jvm_prog = wf_jvm_prog\\<^sub>k\"\nby(simp add: fun_eq_iff jvm_kildall_correct)\n\ndefinition \"wf_jvm_prog' = wf_jvm_prog\"\n\n(* Formal code generation test *)\nML_val {* @{code wf_jvm_prog'} *}\n\nend", "meta": {"author": "Josh-Tilles", "repo": "AFP", "sha": "f4bf1d502bde2a3469d482b62c531f1c3af3e881", "save_path": "github-repos/isabelle/Josh-Tilles-AFP", "path": "github-repos/isabelle/Josh-Tilles-AFP/AFP-f4bf1d502bde2a3469d482b62c531f1c3af3e881/thys/JinjaThreads/BV/BCVExec.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5813030906443133, "lm_q2_score": 0.24798741512455283, "lm_q1q2_score": 0.1441558508527969}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__56_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__56_on_rules imports n_german_lemma_on_inv__56\nbegin\nsection{*All lemmas on causal relation between inv__56*}\nlemma lemma_inv__56_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__56 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__56) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__56) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__56_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5234203489363239, "lm_q2_score": 0.275129717879598, "lm_q1q2_score": 0.14400849293529155}} {"text": "theory SINVAR_Dependability_norefl_impl\nimports SINVAR_Dependability_norefl \"../TopoS_Interface_impl\"\nbegin\n\n\ncode_identifier code_module SINVAR_Dependability_norefl_impl => (Scala) SINVAR_Dependability_norefl\n\n\nsubsubsection {* SecurityInvariant Dependability norefl List Implementation *}\n\n\nfun sinvar :: \"'v list_graph \\ ('v \\ dependability_level) \\ bool\" where\n \"sinvar G nP = (\\ (e1,e2) \\ set (edgesL G). (num_reachable_norefl G e1) \\ (nP e1))\"\n\nfun verify_globals :: \"'v list_graph \\ ('v \\ dependability_level) \\ unit \\ bool\" where\n \"verify_globals _ _ _ = True\"\n\n\nvalue \"sinvar \n \\ nodesL = [1::nat,2,3,4], edgesL = [(1,2), (2,3), (3,4), (8,9),(9,8)] \\\n (\\e. 3)\"\nvalue \"sinvar \n \\ nodesL = [1::nat,2,3,4,8,9,10], edgesL = [(1,2), (2,3), (3,4), (8,9),(9,8)] \\\n (\\e. 2)\"\n\n\n\ndefinition Dependability_norefl_offending_list:: \"'v list_graph \\ ('v \\ dependability_level) \\ ('v \\ 'v) list list\" where\n \"Dependability_norefl_offending_list = Generic_offending_list sinvar\"\n\n\n\ndefinition \"NetModel_node_props P = (\\ i. (case (node_properties P) i of Some property \\ property | None \\ SINVAR_Dependability_norefl.default_node_properties))\"\n\n\ndefinition \"Dependability_norefl_eval G P = (valid_list_graph G \\ \n verify_globals G (SecurityInvariant.node_props SINVAR_Dependability_norefl.default_node_properties P) (model_global_properties P) \\ \n sinvar G (SecurityInvariant.node_props SINVAR_Dependability_norefl.default_node_properties P))\"\n\n\n\nlemma sinvar_correct: \"valid_list_graph G \\ SINVAR_Dependability_norefl.sinvar (list_graph_to_graph G) nP = sinvar G nP\"\n apply(simp)\n apply(rule all_edges_list_I)\n apply(simp add: fun_eq_iff)\n apply(clarify)\n apply(rename_tac x)\n apply(drule_tac v=\"x\" in num_reachable_norefl_correct)\n apply presburger\ndone\n\n\n\ninterpretation Dependability_norefl_impl:TopoS_List_Impl \n where default_node_properties=SINVAR_Dependability_norefl.default_node_properties\n and sinvar_spec=SINVAR_Dependability_norefl.sinvar\n and sinvar_impl=sinvar\n and verify_globals_spec=SINVAR_Dependability_norefl.verify_globals\n and verify_globals_impl=verify_globals\n and receiver_violation=SINVAR_Dependability_norefl.receiver_violation\n and offending_flows_impl=Dependability_norefl_offending_list\n and node_props_impl=NetModel_node_props\n and eval_impl=Dependability_norefl_eval\n apply(unfold TopoS_List_Impl_def)\n apply(rule conjI)\n apply(rule conjI)\n apply(simp add: TopoS_Dependability_norefl)\n apply(rule conjI)\n apply(intro allI impI)\n apply(fact sinvar_correct)\n apply(simp)\n apply(rule conjI)\n apply(unfold Dependability_norefl_offending_list_def)\n apply(intro allI impI)\n apply(rule Generic_offending_list_correct)\n apply(assumption)\n apply(simp only: sinvar_correct)\n apply(rule conjI)\n apply(intro allI)\n apply(simp only: NetModel_node_props_def)\n apply(metis Dependability.node_props.simps Dependability.node_props_eq_node_props_formaldef)\n apply(simp only: Dependability_norefl_eval_def)\n apply(intro allI impI)\n apply(rule TopoS_eval_impl_proofrule[OF TopoS_Dependability_norefl])\n apply(simp only: sinvar_correct)\n apply(simp)\ndone\n\n\nsubsubsection {* packing *}\n definition SINVAR_LIB_Dependability_norefl :: \"('v::vertex, SINVAR_Dependability_norefl.dependability_level, unit) TopoS_packed\" where\n \"SINVAR_LIB_Dependability_norefl \\ \n \\ nm_name = ''Dependability_norefl'', \n nm_receiver_violation = SINVAR_Dependability_norefl.receiver_violation,\n nm_default = SINVAR_Dependability_norefl.default_node_properties, \n nm_sinvar = sinvar,\n nm_verify_globals = verify_globals,\n nm_offending_flows = Dependability_norefl_offending_list, \n nm_node_props = NetModel_node_props,\n nm_eval = Dependability_norefl_eval\n \\\"\n interpretation SINVAR_LIB_Dependability_norefl_interpretation: TopoS_modelLibrary SINVAR_LIB_Dependability_norefl\n SINVAR_Dependability_norefl.sinvar SINVAR_Dependability_norefl.verify_globals\n apply(unfold TopoS_modelLibrary_def SINVAR_LIB_Dependability_norefl_def)\n apply(rule conjI)\n apply(simp)\n apply(simp)\n by(unfold_locales)\n\n\nhide_fact (open) sinvar_correct\nhide_const (open) sinvar verify_globals NetModel_node_props\n\nend\n", "meta": {"author": "Josh-Tilles", "repo": "AFP", "sha": "f4bf1d502bde2a3469d482b62c531f1c3af3e881", "save_path": "github-repos/isabelle/Josh-Tilles-AFP", "path": "github-repos/isabelle/Josh-Tilles-AFP/AFP-f4bf1d502bde2a3469d482b62c531f1c3af3e881/thys/Network_Security_Policy_Verification/Security_Invariants/SINVAR_Dependability_norefl_impl.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117165898111866, "lm_q2_score": 0.28140561345566495, "lm_q1q2_score": 0.14399992087125785}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchAInvsPre\nimports \"../AInvsPre\"\nbegin\n\ncontext Arch begin\n\nglobal_naming ARM_HYP\n\nlemma get_pd_of_thread_reachable:\n \"get_pd_of_thread (kheap s) (arch_state s) t \\ 0\n \\ (\\\\ get_pd_of_thread (kheap s) (arch_state s) t) s\"\n by (auto simp: get_pd_of_thread_vs_lookup\n split: Structures_A.kernel_object.splits if_split_asm option.splits\n cap.splits arch_cap.splits)\n\nlemma is_aligned_ptrFromPAddrD:\n\"\\is_aligned (ptrFromPAddr b) a; a \\ 25\\ \\ is_aligned b a\"\n apply (clarsimp simp: ptrFromPAddr_def physMappingOffset_def kernelBase_addr_def physBase_def)\n apply (erule is_aligned_addD2)\n apply (rule is_aligned_weaken[where x = 25])\n apply (simp add: is_aligned_def)\n apply simp\n done\n\nlemma obj_bits_data_at:\n \"data_at sz (ptrFromPAddr b) s\n \\ obj_bits (the (kheap s (ptrFromPAddr b))) = pageBitsForSize sz\"\n apply (clarsimp simp add: obj_at_def a_type_def data_at_def\n split: kernel_object.splits arch_kernel_obj.split_asm if_splits)\n apply (case_tac ko,simp_all)\n apply fastforce\n subgoal for ko archko\n by (case_tac archko,fastforce+)\n done\n\nlemma some_get_page_info_umapsD:\n \"\\get_page_info (\\obj. get_arch_obj (kheap s obj)) pd_ref p = Some (b, a, attr, r);\n (\\\\ pd_ref) s; valid_vspace_objs s; pspace_aligned s;\n valid_asid_table (arm_asid_table (arch_state s)) s; valid_objs s\\\n \\ (\\sz. pageBitsForSize sz = a \\ is_aligned b a \\\n data_at sz (ptrFromPAddr b) s)\"\n apply (clarsimp simp: get_page_info_def get_pd_entry_def get_arch_obj_def\n split: option.splits Structures_A.kernel_object.splits\n arch_kernel_obj.splits if_splits)\n apply (frule (1) valid_vspace_objsD[rotated 2])\n apply (simp add: obj_at_def)\n apply (simp add: valid_vspace_obj_def vspace_bits_defs)\n apply (drule_tac x=\"ucast (p >> 21)\" in spec)\n apply (simp split: pde.splits)\n apply (rename_tac rs pd pt_ref)\n apply (subgoal_tac\n \"((rs, pd_ref) \\1\n (VSRef (ucast (ucast (p >> 21))) (Some APageDirectory) # rs,\n ptrFromPAddr pt_ref)) s\")\n prefer 2\n apply (rule vs_lookup1I[rotated 2], simp)\n apply (simp add: obj_at_def)\n apply (simp add: vs_refs_def pde_ref_def image_def graph_of_def)\n apply (rule_tac x=\"ucast (p >> 21)\" in exI, rule conjI, simp+)\n apply (frule (1) vs_lookup_step)\n apply (drule (2) stronger_vspace_objsD[where ref=\"x # xs\" for x xs])\n apply clarsimp\n apply (case_tac ao, simp_all add: a_type_simps obj_at_def)[1]\n apply (simp add: get_pt_info_def get_pt_entry_def)\n apply (drule_tac x=\"(ucast ((p >> 12) && mask 9))\" in spec)\n apply (clarsimp simp: obj_at_def\n split: pte.splits,intro exI conjI,simp_all)[1]\n apply (frule obj_bits_data_at)\n apply (clarsimp simp: pspace_aligned_def data_at_def)\n apply (drule_tac x = \"(ptrFromPAddr b)\" in bspec )\n apply (fastforce simp: obj_at_def)\n apply (clarsimp dest!: is_aligned_ptrFromPAddrD)\n apply (frule (1) data_at_aligned)\n apply (intro exI conjI, simp_all add: is_aligned_ptrFromPAddrD)[1]\n apply (simp add: get_pt_info_def get_pt_entry_def)\n apply clarsimp\n apply (frule obj_bits_data_at)\n apply (intro exI conjI, simp_all add: pageBits_def)[1]\n apply (clarsimp simp: pspace_aligned_def data_at_def)\n apply (drule_tac x = \"(ptrFromPAddr b)\" in bspec)\n apply (fastforce simp: obj_at_def)\n apply (clarsimp dest!: is_aligned_ptrFromPAddrD)\n apply clarsimp\n apply (frule obj_bits_data_at)\n apply (intro exI conjI, simp_all add: pageBits_def)[1]\n apply (clarsimp simp: pspace_aligned_def data_at_def)\n apply (drule_tac x = \"(ptrFromPAddr b)\" in bspec)\n apply (fastforce simp: obj_at_def)\n apply (clarsimp dest!: is_aligned_ptrFromPAddrD)\n done\n\nlemma user_mem_dom_cong:\n \"kheap s = kheap s' \\ dom (user_mem s) = dom (user_mem s')\"\n by (simp add: user_mem_def in_user_frame_def dom_def obj_at_def)\n\nlemma device_mem_dom_cong:\n \"kheap s = kheap s' \\ dom (device_mem s) = dom (device_mem s')\"\n by (simp add: device_mem_def in_device_frame_def dom_def obj_at_def)\n\nlemma device_frame_in_device_region:\n \"\\in_device_frame p s; pspace_respects_device_region s\\\n \\ device_state (machine_state s) p \\ None\"\n by (auto simp add: pspace_respects_device_region_def dom_def device_mem_def)\n\nlemma is_aligned_physMappingOffset:\n\"is_aligned physMappingOffset (pageBitsForSize sz)\"\n by (case_tac sz, simp_all add: physMappingOffset_def\n kernelBase_addr_def physBase_def is_aligned_def)[1]\n\nglobal_naming Arch\nnamed_theorems AInvsPre_asms\n\nlemma get_page_info_0[simp]:\n \"get_page_info (\\obj. get_arch_obj (kheap s obj)) 0 x = None\"\n by (simp add: get_page_info_def)\n\nlemma (* ptable_rights_imp_frame *)[AInvsPre_asms]:\n assumes \"valid_state s\"\n shows \"ptable_rights t s x \\ {} \\\n ptable_lift t s x = Some (addrFromPPtr y) \\\n in_user_frame y s \\ in_device_frame y s\"\n apply (clarsimp simp: ptable_rights_def ptable_lift_def in_user_frame_def\n in_device_frame_def data_at_def\n split: option.splits)\n apply (rename_tac b a r)\n apply (frule some_get_page_info_umapsD)\n apply (rule get_pd_of_thread_reachable, clarsimp)\n using assms\n apply (simp_all add: valid_state_def valid_pspace_def\n valid_arch_state_def)\n apply clarsimp\n apply (frule is_aligned_add_helper[OF _ and_mask_less',\n THEN conjunct2, of _ _ x])\n apply (simp only: pbfs_less_wb'[simplified word_bits_def])\n apply (clarsimp simp: ptrFromPAddr_def addrFromPPtr_def\n field_simps)\n apply (rule_tac x=sz in exI)\n apply (drule_tac x = sz in spec)\n apply (subst add.assoc[symmetric])\n apply (frule is_aligned_add_helper[OF aligned_add_aligned[OF _ is_aligned_physMappingOffset]])\n apply (rule le_refl)\n apply (rule_tac w = x in and_mask_less')\n apply (case_tac sz, simp_all add: word_bits_conv)[1]\n apply (clarsimp simp: field_simps simp: data_at_def)\n done\nend\n\nglobal_interpretation AInvsPre?: AInvsPre\n proof goal_cases\n interpret Arch .\n case 1 show ?case by (intro_locales; (unfold_locales, fact AInvsPre_asms)?)\n qed\n\nrequalify_facts\n ARM_HYP.user_mem_dom_cong\n ARM_HYP.device_mem_dom_cong\n ARM_HYP.device_frame_in_device_region\n ARM_HYP.is_aligned_physMappingOffset\nend\n", "meta": {"author": "NICTA", "repo": "l4v", "sha": "3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b", "save_path": "github-repos/isabelle/NICTA-l4v", "path": "github-repos/isabelle/NICTA-l4v/l4v-3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b/proof/invariant-abstract/ARM_HYP/ArchAInvsPre.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.2814055953761018, "lm_q1q2_score": 0.143999915810613}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__82_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__82_on_rules imports n_g2kAbsAfter_lemma_on_inv__82\nbegin\nsection{*All lemmas on causal relation between inv__82*}\nlemma lemma_inv__82_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__82 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__82) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__82) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__82_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2845760102840561, "lm_q1q2_score": 0.14339960756668294}} {"text": "theory \"HoareTripleForStorage\" \n\nimports \"HoareTripleForInstructions\"\nbegin\n\nlemma storage_inst_advance [simp] :\n\"program_content (cctx_program co_ctx) (vctx_pc x1) = Some (Storage m) \\\n k = vctx_pc x1 \\\n vctx_pc (vctx_advance_pc co_ctx x1) = vctx_pc x1 + 1\"\nby (simp add: vctx_next_instruction_def \n vctx_advance_pc_def inst_size_def inst_code.simps)\n\n\nlemma update_storage_preserves_pc [simp] :\n\"vctx_pc (vctx_update_storage idx new x1) = vctx_pc x1\"\nby (simp add: vctx_update_storage_def)\n\nlemma update_storage_updates [simp] :\n\"vctx_storage (vctx_update_storage idx new x1) idx = new\"\nby (simp add: vctx_update_storage_def)\n\nlemma update_storage_preserves_gas [simp] :\n \"vctx_gas (vctx_update_storage idx new x1) = vctx_gas x1\"\nby (simp add: vctx_update_storage_def)\n\nlemma some_list_gotcha :\n \" rev ta ! fst x2 = snd x2 \\ \\ fst x2 < length ta \\\n x2 \\ (Suc (length ta), idx) \\\n x2 \\ (length ta, new) \\\n (fst x2 < length ta \\ rev ta ! fst x2 = snd x2 \\\n length ta \\ fst x2 \\ [new, idx] ! (fst x2 - length ta) = snd x2) \\\n fst x2 < Suc (Suc (length ta)) \\\n elm = StackElm x2 \\ False\"\napply(case_tac x2; auto)\n apply(case_tac \"a - length ta\"; simp)\n apply(rename_tac smaller)\n apply(case_tac smaller; simp)\napply(case_tac \"a - length ta\"; simp)\napply(rename_tac smaller)\napply(case_tac smaller; simp)\n done\n \nlemma next_state_noop[simp]:\n \"next_state stopper c net (InstructionToEnvironment x y z) = (InstructionToEnvironment x y z)\" \n by (simp add: next_state_def)+\n\nlemmas hoare_simps = stateelm_means_simps stateelm_equiv_simps \n next_state_def rev_nth_simps instruction_sem_simps gas_value_simps\n inst_numbers_simps instruction_failure_result_def \n advance_pc_simps\n \nmethod hoare_sep uses sep simp dest split =\n ((sep_simp simp: sep)+,\n clarsimp simp: simp dest:dest split:split)\n\nlemma sstore_gas_triple :\n \"triple net {OutOfGas}\n (\\ h \\ 1024\\\n ** stack_height (h + 2)\n ** stack (h + 1) idx\n ** stack h new\n ** program_counter k ** storage idx old\n ** gas_pred g ** continuing)\n {(k, Storage SSTORE)}\n (stack_height h\n ** program_counter (k + 1) ** storage idx new **\n gas_pred (g - Csstore old new) ** continuing)\"\n apply (clarsimp simp: triple_def)\n apply(rule_tac x = 1 in exI)\n apply (clarsimp simp add: program_sem.simps next_state_def failed_for_reasons_def)\n apply(case_tac presult ; (solves \\(hoare_sep sep: evm_sep simp: stateelm_means_simps dest: stateelm_dest)\\) ?)\n apply (hoare_sep sep: evm_sep \n simp: instruction_result_as_set_def sstore_def\n vctx_update_storage_def hoare_simps\n split:if_splits) \n apply (erule_tac P=rest in back_subst)\n apply(rule Set.equalityI; clarify)\n apply(rename_tac elm)\n apply(simp add: vctx_update_storage_def) \n apply (case_tac elm; simp add: hoare_simps split:if_splits) \n using some_list_gotcha gasprice_advance_pc apply blast\n apply(rename_tac elm)\n apply (simp add: set_diff_eq) \n apply (case_tac elm; simp add: hoare_simps split:if_splits) \n apply auto\ndone\n\n\nlemma sload_gas_triple :\n \"triple net {OutOfGas}\n (\\ h \\ 1023 \\ unat bn \\ 2463000 \\ at_least_eip150 net\\\n ** block_number_pred bn ** stack_height (h + 1)\n ** stack h idx\n ** program_counter k ** storage idx w ** gas_pred g ** account_existence c existence ** continuing)\n {(k, Storage SLOAD)}\n (block_number_pred bn ** stack_height (h + 1) ** stack h w\n ** program_counter (k + 1) ** storage idx w ** gas_pred (g - Gsload net) ** account_existence c existence ** continuing )\"\napply(clarsimp simp add: triple_def)\n apply(rule_tac x = 1 in exI)\n apply(clarsimp simp add: program_sem.simps next_state_def failed_for_reasons_def)\n apply(case_tac presult; (solves \\(hoare_sep sep: evm_sep simp: set_diff_eq stateelm_means_simps dest: stateelm_dest)\\)?)\n apply clarsimp\n apply(hoare_sep sep: evm_sep \n simp: instruction_result_as_set_def sstore_def\n vctx_update_storage_def hoare_simps set_diff_eq\n split:if_split_asm)\n apply(erule_tac P=rest in back_subst)\n apply(rule Set.equalityI; clarify)\n apply(simp)\n apply(rename_tac elm)\n apply(case_tac elm; simp add: hoare_simps split:if_splits)\n apply(rename_tac pair)\n apply(case_tac pair; fastforce)\n apply(simp)\n apply(rename_tac elm)\n apply(case_tac elm; simp add: hoare_simps split:if_splits)\n apply(rename_tac pair)\n apply(case_tac pair; fastforce)\ndone\n\nend", "meta": {"author": "pirapira", "repo": "eth-isabelle", "sha": "d0bb02b3e64a2046a7c9670545d21f10bccd7b27", "save_path": "github-repos/isabelle/pirapira-eth-isabelle", "path": "github-repos/isabelle/pirapira-eth-isabelle/eth-isabelle-d0bb02b3e64a2046a7c9670545d21f10bccd7b27/Hoare/HoareTripleForStorage.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.28457599208146817, "lm_q1q2_score": 0.14339959839428656}} {"text": "(* Title: JinjaThreads/MM/JMM_Heap.thy\n Author: Andreas Lochbihler\n*)\n\nsection \\Locales for heap operations with set of allocated addresses\\\n\ntheory JMM_Heap \nimports\n \"../Common/WellForm\"\n SC_Completion\n HB_Completion\nbegin\n\ndefinition w_addrs :: \"('addr \\ addr_loc \\ 'addr val set) \\ 'addr set\"\nwhere \"w_addrs vs = {a. \\adal. Addr a \\ vs adal}\"\n\nlemma w_addrs_empty [simp]: \"w_addrs (\\_. {}) = {}\"\nby(simp add: w_addrs_def)\n\nlocale allocated_heap_base = heap_base +\n constrains addr2thread_id :: \"('addr :: addr) \\ 'thread_id\"\n and thread_id2addr :: \"'thread_id \\ 'addr\"\n and spurious_wakeups :: bool\n and empty_heap :: \"'heap\"\n and allocate :: \"'heap \\ htype \\ ('heap \\ 'addr) set\"\n and typeof_addr :: \"'heap \\ 'addr \\ htype\"\n and heap_read :: \"'heap \\ 'addr \\ addr_loc \\ 'addr val \\ bool\"\n and heap_write :: \"'heap \\ 'addr \\ addr_loc \\ 'addr val \\ 'heap \\ bool\"\n fixes allocated :: \"'heap \\ 'addr set\"\n\nlocale allocated_heap = \n allocated_heap_base +\n heap +\n constrains addr2thread_id :: \"('addr :: addr) \\ 'thread_id\"\n and thread_id2addr :: \"'thread_id \\ 'addr\"\n and spurious_wakeups :: bool\n and empty_heap :: \"'heap\"\n and allocate :: \"'heap \\ htype \\ ('heap \\ 'addr) set\"\n and typeof_addr :: \"'heap \\ 'addr \\ htype\"\n and heap_read :: \"'heap \\ 'addr \\ addr_loc \\ 'addr val \\ bool\"\n and heap_write :: \"'heap \\ 'addr \\ addr_loc \\ 'addr val \\ 'heap \\ bool\"\n and allocated :: \"'heap \\ 'addr set\"\n and P :: \"'m prog\"\n\n assumes allocated_empty: \"allocated empty_heap = {}\"\n and allocate_allocatedD:\n \"(h', a) \\ allocate h hT \\ allocated h' = insert a (allocated h) \\ a \\ allocated h\"\n and heap_write_allocated_same:\n \"heap_write h a al v h' \\ allocated h' = allocated h\"\nbegin\n\nlemma allocate_allocated_mono: \"(h', a) \\ allocate h C \\ allocated h \\ allocated h'\"\nby(simp_all add: allocate_allocatedD)\n\nlemma\n shows start_addrs_allocated: \"allocated start_heap = set start_addrs\"\n and distinct_start_addrs': \"distinct start_addrs\"\nproof -\n { fix h ads b and xs :: \"cname list\"\n let \"?start_addrs h ads b xs\" = \"fst (snd (foldl create_initial_object (h, ads, b) xs))\"\n let \"?start_heap h ads b xs\" = \"fst (foldl create_initial_object (h, ads, b) xs)\"\n assume \"allocated h = set ads\"\n hence \"allocated (?start_heap h ads b xs) = set (?start_addrs h ads b xs) \\\n (distinct ads \\ distinct (?start_addrs h ads b xs))\"\n (is \"?concl xs h ads b\")\n proof(induct xs arbitrary: h ads b)\n case Nil thus ?case by auto\n next\n case (Cons x xs)\n note ads = \\allocated h = set ads\\\n show ?case\n proof(cases \"b \\ allocate h (Class_type x) \\ {}\")\n case False thus ?thesis using ads\n by(simp add: create_initial_object_simps zip_append1)\n next\n case [simp]: True\n then obtain h' a' \n where h'a': \"(SOME ha. ha \\ allocate h (Class_type x)) = (h', a')\"\n and new_obj: \"(h', a') \\ allocate h (Class_type x)\"\n by(cases \"(SOME ha. ha \\ allocate h (Class_type x))\")(auto simp del: True dest: allocate_Eps)\n\n from new_obj have \"allocated h' = insert a' (allocated h)\" \"a' \\ allocated h\"\n by(auto dest: allocate_allocatedD)\n with ads have \"allocated h' = set (ads @ [a'])\" by auto\n hence \"?concl xs h' (ads @ [a']) True\" by(rule Cons)\n moreover have \"a' \\ set ads\" using \\a' \\ allocated h\\ ads by blast\n ultimately show ?thesis by(simp add: create_initial_object_simps new_obj h'a')\n qed\n qed }\n from this[of empty_heap \"[]\" True initialization_list]\n show \"allocated start_heap = set start_addrs\"\n and distinct_start_addrs: \"distinct start_addrs\"\n unfolding start_heap_def start_addrs_def start_heap_data_def\n by(auto simp add: allocated_empty)\nqed\n\nlemma w_addrs_start_heap_obs: \"w_addrs (w_values P vs (map NormalAction start_heap_obs)) \\ w_addrs vs\"\nproof -\n { fix xs\n let ?NewObj = \"\\a C. NewHeapElem a (Class_type C) :: ('addr, 'thread_id) obs_event\"\n let \"?start_heap_obs xs\" = \"map (\\(C, a). ?NewObj a C) xs\"\n have \"w_addrs (w_values P vs (map NormalAction (?start_heap_obs xs))) \\ w_addrs vs\"\n (is \"?concl xs\")\n proof(induct xs arbitrary: vs)\n case Nil thus ?case by simp\n next\n case (Cons x xs)\n have \"w_addrs (w_values P vs (map NormalAction (map (\\(C, a). ?NewObj a C) (x # xs))))\n = w_addrs (w_values P (w_value P vs (NormalAction (?NewObj (snd x) (fst x)))) (map NormalAction (map (\\(C, a). ?NewObj a C) xs)))\"\n by(simp add: split_beta)\n also have \"\\ \\ w_addrs (w_value P vs (NormalAction (?NewObj (snd x) (fst x))))\" by(rule Cons)\n also have \"\\ \\ w_addrs vs\"\n by(auto simp add: w_addrs_def default_val_not_Addr Addr_not_default_val)\n finally show ?case .\n qed }\n thus ?thesis by(simp add: start_heap_obs_def)\nqed\n\nend\n\ncontext heap_base begin\n\nlemma addr_loc_default_conf:\n \"P \\ class_type_of CTn has F:T (fm) in C \n \\ P,h \\ addr_loc_default P CTn (CField C F) :\\ T\"\napply(cases CTn)\n apply simp\napply(frule has_field_decl_above)\napply simp\ndone\n\ndefinition vs_conf :: \"'m prog \\ 'heap \\ ('addr \\ addr_loc \\ 'addr val set) \\ bool\"\nwhere \"vs_conf P h vs \\ (\\ad al v. v \\ vs (ad, al) \\ (\\T. P,h \\ ad@al : T \\ P,h \\ v :\\ T))\"\n\n\n\nlemma vs_confD:\n \"\\ vs_conf P h vs; v \\ vs (ad, al) \\ \\ \\T. P,h \\ ad@al : T \\ P,h \\ v :\\ T\"\nunfolding vs_conf_def by blast\n\nlemma vs_conf_insert_iff:\n \"vs_conf P h (vs((ad, al) := insert v (vs (ad, al)))) \n \\ vs_conf P h vs \\ (\\T. P,h \\ ad@al : T \\ P,h \\ v :\\ T)\"\nby(auto 4 3 elim: vs_confD intro: vs_confI split: if_split_asm)\n\nend\n\ncontext heap begin\n\nlemma vs_conf_hext: \"\\ vs_conf P h vs; h \\ h' \\ \\ vs_conf P h' vs\"\nby(blast intro!: vs_confI intro: conf_hext addr_loc_type_hext_mono dest: vs_confD)\n\nlemma vs_conf_allocate:\n \"\\ vs_conf P h vs; (h', a) \\ allocate h hT; is_htype P hT \\ \n \\ vs_conf P h' (w_value P vs (NormalAction (NewHeapElem a hT)))\"\napply(drule vs_conf_hext)\n apply(erule hext_allocate)\napply(auto intro!: vs_confI simp add: addr_locs_def split: if_split_asm htype.split_asm)\napply(auto 3 3 intro: addr_loc_type.intros defval_conf dest: allocate_SomeD elim: has_field_is_class vs_confD)\napply(rule exI conjI addr_loc_type.intros|drule allocate_SomeD|erule has_field_is_class|simp)+\ndone\n\nend\n\ntext \\\n \\heap_read_typeable\\ must not be defined in @{term heap_conf_base} (where it should be) because\n this would lead to duplicate definitions of \\heap_read_typeable\\ in contexts where @{term heap_conf_base} \n is imported twice with different parameters, e.g., @{term P} and @{term \"J2JVM P\"} in @{term \"J_JVM_heap_conf_read\"}.\n\\\n\ncontext heap_base begin\n\ndefinition heap_read_typeable :: \"('heap \\ bool) \\ 'm prog \\ bool\"\nwhere \"heap_read_typeable hconf P \\ (\\h ad al v T. hconf h \\ P,h \\ ad@al : T \\ P,h \\ v :\\ T \\ heap_read h ad al v)\"\n\nlemma heap_read_typeableI:\n \"(\\h ad al v T. \\ P,h \\ ad@al : T; P,h \\ v :\\ T; hconf h \\ \\ heap_read h ad al v) \\ heap_read_typeable hconf P\"\nunfolding heap_read_typeable_def by blast\n\nlemma heap_read_typeableD:\n \"\\ heap_read_typeable hconf P; P,h \\ ad@al : T; P,h \\ v :\\ T; hconf h \\ \\ heap_read h ad al v\"\nunfolding heap_read_typeable_def by blast\n\nend\n\ncontext heap_base begin\n\ndefinition heap_read_typed :: \"'m prog \\ 'heap \\ 'addr \\ addr_loc \\ 'addr val \\ bool\"\nwhere \"heap_read_typed P h ad al v \\ heap_read h ad al v \\ (\\T. P,h \\ ad@al : T \\ P,h \\ v :\\ T)\"\n\nlemma heap_read_typedI:\n \"\\ heap_read h ad al v; \\T. P,h \\ ad@al : T \\ P,h \\ v :\\ T \\ \\ heap_read_typed P h ad al v\"\nunfolding heap_read_typed_def by blast\n\nlemma heap_read_typed_into_heap_read:\n \"heap_read_typed P h ad al v \\ heap_read h ad al v\"\nunfolding heap_read_typed_def by blast\n\nlemma heap_read_typed_typed:\n \"\\ heap_read_typed P h ad al v; P,h \\ ad@al : T \\ \\ P,h \\ v :\\ T\"\nunfolding heap_read_typed_def by blast\n\nend\n\ncontext heap_conf begin\n\nlemma heap_conf_read_heap_read_typed:\n \"heap_conf_read addr2thread_id thread_id2addr empty_heap allocate typeof_addr (heap_read_typed P) heap_write hconf P\"\nproof\n fix h a al v T\n assume \"heap_read_typed P h a al v\" \"P,h \\ a@al : T\" \n thus \"P,h \\ v :\\ T\" by(rule heap_read_typed_typed)\nqed\n\nend\n\ncontext heap begin\n\nlemma start_addrs_dom_w_values:\n assumes wf: \"wf_syscls P\"\n and a: \"a \\ set start_addrs\"\n and adal: \"P,start_heap \\ a@al : T\"\n shows \"w_values P (\\_. {}) (map NormalAction start_heap_obs) (a, al) \\ {}\"\nproof -\n from a obtain CTn where CTn: \"NewHeapElem a CTn \\ set start_heap_obs\"\n unfolding in_set_start_addrs_conv_NewHeapElem ..\n then obtain obs obs' where obs: \"start_heap_obs = obs @ NewHeapElem a CTn # obs'\" by(auto dest: split_list)\n have \"w_value P (w_values P (\\_. {}) (map NormalAction obs)) (NormalAction (NewHeapElem a CTn)) (a, al) \\ {}\"\n proof(cases CTn)\n case [simp]: (Class_type C)\n with wf CTn have \"typeof_addr start_heap a = \\Class_type C\\\"\n by(auto intro: NewHeapElem_start_heap_obsD)\n with adal show ?thesis by cases auto\n next\n case [simp]: (Array_type T n)\n with wf CTn have \"typeof_addr start_heap a = \\Array_type T n\\\"\n by(auto dest: NewHeapElem_start_heap_obsD)\n with adal show ?thesis by cases(auto dest: has_field_decl_above)\n qed\n moreover have \"w_value P (w_values P (\\_. {}) (map NormalAction obs)) (NormalAction (NewHeapElem a CTn :: ('addr, 'thread_id) obs_event))\n (a, al) \\ w_values P (\\_. {}) (map NormalAction start_heap_obs) (a, al)\"\n by(simp add: obs del: w_value.simps)(rule w_values_mono)\n ultimately show ?thesis by blast\nqed\n\nend\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/JinjaThreads/MM/JMM_Heap.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.519521321952093, "lm_q2_score": 0.2751297297667525, "lm_q1q2_score": 0.14293576091674537}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__76_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__76_on_rules imports n_g2kAbsAfter_lemma_on_inv__76\nbegin\nsection{*All lemmas on causal relation between inv__76*}\nlemma lemma_inv__76_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__76 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__76) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__76) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__76_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.28140560742914383, "lm_q1q2_score": 0.14290110612721546}} {"text": "theory Proof_3_10\n imports Proofs_3\nbegin\n\nthm extraInv_def\ncontext\n fixes s2 s0:: state\nfixes user_value pressure_value:: bool\nassumes toEnvPs2: \"toEnvP s2 \\ toEnvP s0\" \nand vc: \" env (setVarAny s0 user_value pressure_value) \\\n getPstate (setVarAny s0 user_value pressure_value) ERROR = Controller'rotating \\\n\\ getVarBool (setVarAny s0 user_value pressure_value) pressure \\\n\\ getVarBool (setVarAny s0 user_value pressure_value) user \\\n\\ DELAY'TIMEOUT \\ ltime (setVarAny s0 user_value pressure_value) Controller\"\nand extraInvs0: \"(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'motionless \\\n (\\s2. toEnvP s2 \\ substate s2 s1 \\ getPstate s2 ERROR = Controller'motionless \\ \\ getVarBool s2 user) \\\n (\\s2 s3.\n toEnvP s2 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n getPstate s2 ERROR = Controller'rotating \\\n ltime s2 ERROR = DELAY'TIMEOUT \\\n \\ getVarBool s3 user \\\n \\ getVarBool s3 pressure \\\n (\\s4 s5.\n toEnvP s4 \\ toEnvP s5 \\ substate s3 s4 \\ substate s4 s5 \\ substate s5 s1 \\ toEnvNum s4 s5 = ERROR \\\n getPstate s4 ERROR = Controller'motionless \\ \\ getVarBool s5 user))) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\ ltime s1 ERROR \\ DELAY'TIMEOUT) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n toEnvNum s2 s1 = ltime s1 ERROR \\\n ((getPstate s2 ERROR = Controller'motionless \\ getPstate s2 ERROR = Controller'rotating) \\\n getVarBool s3 user \\\n getPstate s2 ERROR = Controller'suspended) \\\n \\ getVarBool s3 pressure)) \\\n(\\s1 s2 s3.\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvP s3 \\\n substate s1 s2 \\\n substate s2 s3 \\\n substate s3 s0 \\\n getPstate s3 ERROR = Controller'rotating \\ toEnvNum s1 s2 = ERROR \\ toEnvNum s1 s3 < ltime s3 ERROR \\\n getPstate s1 ERROR = Controller'rotating \\ \\ getVarBool s2 user) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n (getPstate s2 ERROR = Controller'motionless \\ getVarBool s3 user \\\n getPstate s2 ERROR = Controller'suspended) \\\n \\ getVarBool s3 pressure \\\n (\\s4. toEnvP s4 \\ substate s3 s4 \\ substate s4 s1 \\ getPstate s4 ERROR = Controller'rotating))) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\ ltime s1 ERROR = DELAY'TIMEOUT) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n toEnvNum s2 s1 = ltime s1 ERROR \\\n (getPstate s2 ERROR \\ Controller'motionless \\ getVarBool s3 user) \\ getVarBool s3 pressure)) \\\n(\\s1 s2 s3.\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvP s3 \\\n substate s1 s2 \\\n substate s2 s3 \\\n substate s3 s0 \\\n toEnvNum s1 s2 = ERROR \\ toEnvNum s1 s3 < ltime s3 ERROR \\ getPstate s3 ERROR = Controller'suspended \\\n getPstate s1 ERROR = Controller'suspended \\ \\ getVarBool s2 pressure) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n (getPstate s2 ERROR = Controller'motionless \\ getVarBool s3 user \\\n getPstate s2 ERROR = Controller'rotating) \\\n getVarBool s3 pressure \\\n (\\s4. toEnvP s4 \\ substate s3 s4 \\ substate s4 s1 \\ getPstate s4 ERROR = Controller'suspended))) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'motionless \\\n getVarBool s1 rotation = False \\ getVarBool s1 brake = False) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n getVarBool s1 rotation = True \\ getVarBool s1 brake = False) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n getVarBool s1 rotation = False \\ getVarBool s1 brake = True) \\\n(\\s1. toEnvP s1 \\ substate s1 s0 \\\n getPstate s1 ERROR = Controller'motionless \\\n getPstate s1 ERROR = Controller'rotating \\ getPstate s1 ERROR = Controller'suspended)\"\nbegin\n\n\nlemma VC10_R3_ind_step_aux1: \" toEnvP s2a \\\n substate s2 s2a \\\n substate s2a\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n s2 \\ s2a \\\n substate s1 s2 \\\n substate s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT =\n toEnvNum s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n getVarBool s1 rotation = True \\\n \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\ substate s2 s4 \\ substate s4 s2a \\ s4 \\ s2a \\\n getVarBool s4 rotation = True \\ \\ getVarBool s4 user) \\\n (\\s4. toEnvP s4 \\\n substate s2a s4 \\\n substate s4\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2a s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)) \\\n substate s1 s2 \\\n substate s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT =\n toEnvNum s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n getVarBool s1 rotation = True \\\n \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\ substate s2 s4 \\ substate s4 (predEnv s2a) \\ s4 \\ predEnv s2a \\\n getVarBool s4 rotation = True \\ \\ getVarBool s4 user) \\\n \\ (getVarBool (predEnv s2a) rotation = False \\ getVarBool (predEnv s2a) user) \\\n toEnvP x \\\n substate s2a x \\\n substate x\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 x \\ DELAY'TIMEOUT \\\n (getVarBool x rotation = False \\ getVarBool x user) \\\n (\\s3. toEnvP s3 \\ substate s2a s3 \\ substate s3 x \\ s3 \\ x \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user) \\\n \\s4. toEnvP s4 \\\n substate (predEnv s2a) s4 \\\n substate s4\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (predEnv s2a) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"\n apply(rule exI[of _ x])\n by (smt (z3) predEnv_substate predEnv_substate_imp_eq_or_substate substate_trans)\n \nlemma VC10_R3_ind_step: \" toEnvP s2a \\\n substate s2 s2a \\\n substate s2a\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n s2 \\ s2a \\\n substate s1 s2 \\\n substate s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT =\n toEnvNum s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n getVarBool s1 rotation = True \\\n \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\ substate s2 s4 \\ substate s4 s2a \\ s4 \\ s2a \\\n getVarBool s4 rotation = True \\ \\ getVarBool s4 user) \\\n (\\s4. toEnvP s4 \\\n substate s2a s4 \\\n substate s4\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2a s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)) \\\n substate s1 s2 \\\n substate s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT =\n toEnvNum s2\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n getVarBool s1 rotation = True \\\n \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\ substate s2 s4 \\ substate s4 (predEnv s2a) \\ s4 \\ predEnv s2a \\\n getVarBool s4 rotation = True \\ \\ getVarBool s4 user) \\\n (\\s4. toEnvP s4 \\\n substate (predEnv s2a) s4 \\\n substate s4\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (predEnv s2a) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user))\"\n apply(rule impI)\n apply(cases \"(getVarBool (predEnv s2a) rotation = False \\ getVarBool (predEnv s2a) user)\")\n apply(rule exI[of _ \"predEnv s2a\"])\n apply(rule conjI)\n apply(rule toEnvP_substate_pred_imp_toEnvP_pred[of s2])\n using toEnvPs2 substate_eq_or_predEnv apply fast\n apply(rule conjI)\n using substate_refl apply fast\n apply(rule conjI)\n using predEnv_substate substate_trans apply fast\n apply(rule conjI)\n apply(rule cut_rl[of \"substate s2 (predEnv s2a) \\\n substate (predEnv s2a)\n (toEnv (setVarAny s0 user'value pressure'value))\"])\n using toEnvNum3[of s2 \"predEnv s2a\" \n\"(toEnv (setVarAny s0 user'value pressure'value))\"]\n apply arith\n using substate_eq_or_predEnv predEnv_substate substate_trans apply fast\n apply(rule conjI)\n apply assumption\n using substate_asym apply fast\n apply(rule exE[of \"\\ s4. toEnvP s4 \\\n substate s2a s4 \\\n substate s4\n (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2a s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n using substate_eq_or_predEnv apply blast\n by ((rule VC10_R3_ind_step_aux1);blast)\n\nlemma VC10_R3_ind_base: \"substate s1 s2 \\\n substate s2 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT = toEnvNum s2 (toEnv (setVarAny s0 user'value pressure'value)) \\\n getVarBool s1 rotation = True \\\n \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n s4 \\ toEnv (setVarAny s0 user'value pressure'value) \\\n getVarBool s4 rotation = True \\ \\ getVarBool s4 user) \\\n toEnvP s2a \\\ntoEnvP s3 \\\n substate s2a s3 \\\n substate s3 s0 \\\n toEnvNum s2a s0 \\ ltime s0 ERROR \\\n toEnvNum s2a s3 = ERROR \\ (getVarBool s2a rotation = False \\ getVarBool s3 user) \\\n \\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"\n apply(rule cut_rl[of \"substate s2 s2a\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\napply(drule conjE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(cases \"getVarBool s2a rotation = False\")\n apply(drule allE[of _ s2a \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n using substate_trans substate_asym\n apply (metis less_one not_one_less_zero substate.simps(2) substate.simps(9) toEnvNum_id)\n apply assumption\n apply(drule allE[of _ s3 \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(rule cut_rl[of \"getVarBool s3 user\"])\n apply(drule impE[of _ _ \"\\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(rule conjI)\n apply assumption\n apply(rule conjI)\n using substate_trans apply fast\n apply(rule conjI)\n apply auto\n apply(simp split: if_splits)\n using substate_refl substate_asym[of s0 \"(toEnv (setVarAny s0 user'value pressure'value))\"] apply auto\n apply(simp split: if_splits)\n apply(rule cut_rl[of \"substate s2 s0 \\ substate s2a s0 \"])\n apply(rule cut_rl[of \"substate s2 s2a \\ substate s2a s2\"])\n apply(drule disjE[of _ _ \"substate s2 s2a\"])\n apply assumption\n apply(rule cut_rl[of \"toEnvNum s2 s0 < toEnvNum s2a s0\"])\n apply(rule cut_rl[of \"toEnvNum s2 s0 \\ toEnvNum s2a s0\"])\n apply simp\n using vc apply simp\n apply (metis linorder_le_less_linear shift_toEnvNum substate_asym substate_shift toEnvPs2)\n apply assumption\n using substate_total apply fast\n using substate_trans apply fast\napply(simp split: if_splits)\n apply(rule cut_rl[of \"substate s2 s0 \\ substate s2a s0 \"])\n apply(rule cut_rl[of \"substate s2 s2a \\ substate s2a s2 \\ s2 \\ s2a\"])\n apply(drule disjE[of _ _ \"substate s2 s2a\"])\n apply assumption\n apply(rule cut_rl[of \"toEnvNum s2 s0 < toEnvNum s2a s0\"])\n apply(rule cut_rl[of \"toEnvNum s2 s0 \\ toEnvNum s2a s0\"])\n apply simp\n using vc apply simp\n apply (metis linorder_le_less_linear shift_toEnvNum substate_asym substate_shift toEnvPs2)\n apply assumption\n using substate_total apply fast\n using substate_trans by fast\n \nlemma VC10_R3_ind_proof: \"toEnvP s5 \\ substate s2 s5 \\\n substate s5 (toEnv (setVarAny s0 user'value pressure'value))\n \\ pred3 s1 s2 (toEnv (setVarAny s0 user'value pressure'value))\n s5\"\n apply(induction rule: state_down_ind)\n using toEnvPs2 apply simp\n apply(simp only: pred3_def)\n apply(rule impI)\n apply(rule cut_rl[of \"\\s2 s3.\n toEnvP s2 \\\ntoEnvP s3 \\\n substate s2 s3 \\\n substate s3 s0 \\\n toEnvNum s2 s0 \\ ltime s0 ERROR \\\n toEnvNum s2 s3 = ERROR \\ (getVarBool s2 rotation = False \\ getVarBool s3 user)\"])\n apply(drule exE[of _ \" \\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule exE[of _ \" \\s4. toEnvP s4 \\\n substate (toEnv (setVarAny s0 user'value pressure'value)) s4 \\\n substate s4 (toEnv (setVarAny s0 user'value pressure'value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate (toEnv (setVarAny s0 user'value pressure'value)) s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply((rule VC10_R3_ind_base);blast)\n apply assumption\n apply assumption\n apply(rule rotating_not_vc3[of s0 s0])\n apply(rule conjI)\n using toEnvPs2 apply fast\n apply(rule conjI)\n using substate_refl apply fast\n apply(rule conjI)\n using vc apply simp\n using extraInvs0 apply fast\napply(simp only: pred3_def)\n by ((rule VC10_R3_ind_step);fast) \n\nend\n\nlemma VC10_R3_aux1: \"DELAY'TIMEOUT < toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value)) \\ \n substate s2 (toEnv (setVarAny s0 user_value pressure_value)) \\ substate s2 s0 \\ DELAY'TIMEOUT \\ toEnvNum s2 s0\"\n by (simp split: if_splits)\n\n\nlemma VC10_R3_aux2: \" \\ DELAY'TIMEOUT \\ ltime (setVarAny s0 user_value pressure_value) ERROR \\\n substate s1 s2 \\\n \\ getVarBool (setVarAny s0 user_value pressure_value) user \\\n substate s2 (toEnv (setVarAny s0 user_value pressure_value)) \\\n \\ getVarBool (setVarAny s0 user_value pressure_value) pressure \\\n toEnvP s1 \\\n getPstate (setVarAny s0 user_value pressure_value) ERROR = Controller'rotating \\\n toEnvP s2 \\\n env (setVarAny s0 user_value pressure_value) \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT \\ toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value)) \\\n getVarBool s1 rotation = True \\ \\ getVarBool s2 user \\\n toEnvP s0 \\\n \\s1 s2.\n substate s1 s2 \\\n substate s2 s0 \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT \\ toEnvNum s2 s0 \\ getVarBool s1 rotation = True \\ \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 s0 \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)) \\\n DELAY'TIMEOUT = toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value)) \\\n pred3 s1 s2 (toEnv (setVarAny s0 user_value pressure_value)) s2 \\\n \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"\napply(simp only: pred3_def)\n using substate_asym\n by meson \n\nlemma VC10_R3: \" ((((((toEnvP s0 \\\n (\\s1 s2.\n substate s1 s2 \\\n substate s2 s0 \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT \\ toEnvNum s2 s0 \\ getVarBool s1 rotation = True \\ \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 s0 \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)))) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'motionless \\\n (\\s2. toEnvP s2 \\ substate s2 s1 \\\n getPstate s2 ERROR = Controller'motionless \\ \\ getVarBool s2 user) \\\n (\\s2 s3.\n toEnvP s2 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n getPstate s2 ERROR = Controller'rotating \\\n ltime s2 ERROR = DELAY'TIMEOUT \\\n \\ getVarBool s3 user \\\n \\ getVarBool s3 pressure \\\n (\\s4 s5.\n toEnvP s4 \\\n toEnvP s5 \\ substate s3 s4 \\ substate s4 s5 \\ substate s5 s1 \\ toEnvNum s4 s5 = ERROR \\\n getPstate s4 ERROR = Controller'motionless \\ \\ getVarBool s5 user))) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n ltime s1 ERROR \\ DELAY'TIMEOUT) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n toEnvNum s2 s1 = ltime s1 ERROR \\\n ((getPstate s2 ERROR = Controller'motionless \\ getPstate s2 ERROR = Controller'rotating) \\\n getVarBool s3 user \\\n getPstate s2 ERROR = Controller'suspended) \\\n \\ getVarBool s3 pressure)) \\\n (\\s1 s2 s3.\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvP s3 \\\n substate s1 s2 \\\n substate s2 s3 \\\n substate s3 s0 \\\n getPstate s3 ERROR = Controller'rotating \\ toEnvNum s1 s2 = ERROR \\ toEnvNum s1 s3 < ltime s3 ERROR \\\n getPstate s1 ERROR = Controller'rotating \\ \\ getVarBool s2 user) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n (getPstate s2 ERROR = Controller'motionless \\ getVarBool s3 user \\\n getPstate s2 ERROR = Controller'suspended) \\\n \\ getVarBool s3 pressure \\\n (\\s4. toEnvP s4 \\ substate s3 s4 \\ substate s4 s1 \\\n getPstate s4 ERROR = Controller'rotating))) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n ltime s1 ERROR = DELAY'TIMEOUT) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n toEnvNum s2 s1 = ltime s1 ERROR \\\n (getPstate s2 ERROR \\ Controller'motionless \\ getVarBool s3 user) \\ getVarBool s3 pressure)) \\\n (\\s1 s2 s3.\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvP s3 \\\n substate s1 s2 \\\n substate s2 s3 \\\n substate s3 s0 \\\n toEnvNum s1 s2 = ERROR \\\n toEnvNum s1 s3 < ltime s3 ERROR \\ getPstate s3 ERROR = Controller'suspended \\\n getPstate s1 ERROR = Controller'suspended \\ \\ getVarBool s2 pressure) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n (\\s2 s3.\n toEnvP s2 \\\n toEnvP s3 \\\n substate s2 s3 \\\n substate s3 s1 \\\n toEnvNum s2 s3 = ERROR \\\n (getPstate s2 ERROR = Controller'motionless \\ getVarBool s3 user \\\n getPstate s2 ERROR = Controller'rotating) \\\n getVarBool s3 pressure \\\n (\\s4. toEnvP s4 \\ substate s3 s4 \\ substate s4 s1 \\\n getPstate s4 ERROR = Controller'suspended))) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'motionless \\\n getVarBool s1 rotation = False \\ getVarBool s1 brake = False) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'rotating \\\n getVarBool s1 rotation = True \\ getVarBool s1 brake = False) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\ getPstate s1 ERROR = Controller'suspended \\\n getVarBool s1 rotation = False \\ getVarBool s1 brake = True) \\\n (\\s1. toEnvP s1 \\ substate s1 s0 \\\n getPstate s1 ERROR = Controller'motionless \\\n getPstate s1 ERROR = Controller'rotating \\ getPstate s1 ERROR = Controller'suspended)) \\\n env (setVarAny s0 user_value pressure_value)) \\\n getPstate (setVarAny s0 user_value pressure_value) ERROR = Controller'rotating) \\\n \\ getVarBool (setVarAny s0 user_value pressure_value) pressure) \\\n \\ getVarBool (setVarAny s0 user_value pressure_value) user) \\\n \\ DELAY'TIMEOUT \\ ltime (setVarAny s0 user_value pressure_value) ERROR \\\n substate s1 s2 \\\n substate s2 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvP s1 \\\n toEnvP s2 \\\n toEnvNum s1 s2 = ERROR \\\n DELAY'TIMEOUT \\ toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value)) \\\n getVarBool s1 rotation = True \\ \\ getVarBool s2 user \\\n (\\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user))\"\n \n apply(rule impI)\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(drule conjE[of _ _ \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 (toEnv (setVarAny s0 user_value pressure_value)) \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply(rule disjE[of \"DELAY'TIMEOUT < toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value))\"\n\"DELAY'TIMEOUT = toEnvNum s2 (toEnv (setVarAny s0 user_value pressure_value))\"])\n using le_imp_less_or_eq\n apply linarith \n apply(rule cut_rl[of \"substate s2 s0 \\ toEnvNum s2 s0 \\ DELAY'TIMEOUT\"])\n apply(rule cut_rl[of \"(\\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 s0 \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user))\"])\n apply (metis substate.simps(10) substate.simps(2) substate.simps(3) substate.simps(9))\n apply(drule allE[of _ s1 \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 s0 \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\napply(drule allE[of _ s2 \" \\s4. toEnvP s4 \\\n substate s2 s4 \\\n substate s4 s0 \\\n toEnvNum s2 s4 \\ DELAY'TIMEOUT \\\n (getVarBool s4 rotation = False \\ getVarBool s4 user) \\\n (\\s3. toEnvP s3 \\ substate s2 s3 \\ substate s3 s4 \\ s3 \\ s4 \\\n getVarBool s3 rotation = True \\ \\ getVarBool s3 user)\"])\n apply fast\n apply assumption\n apply assumption\n apply((rule VC10_R3_aux1);assumption)\n apply(rule cut_rl[of \"pred3 s1 s2 \n (toEnv (setVarAny s0 user_value pressure_value))\ns2\"])\n apply((rule VC10_R3_aux2);assumption)\n apply(rule mp[of \"toEnvP s2 \\ substate s2 s2 \\\n substate s2 (toEnv (setVarAny s0 user_value pressure_value))\"])\n \n print_state\n apply((rule VC10_R3_ind_proof);fast)\n print_state\n using substate_refl apply fast\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n apply assumption\n by assumption\n\ntheorem proof_3_10: \"VC10 inv3 env s0 user_value pressure_value\"\n apply(simp only: VC10_def inv3_def R3_def extraInv_def)\n apply(rule impI)\n apply(rule conjI)\n apply(rule conjI)\n apply(simp)\n apply((rule allI);(rule allI))\n apply(rule VC10_R3)\n apply assumption\n ", "meta": {"author": "ivchernenko", "repo": "post_vcgenerator", "sha": "fadfff131086870a027d6bd1c78b8d5a3baf183b", "save_path": "github-repos/isabelle/ivchernenko-post_vcgenerator", "path": "github-repos/isabelle/ivchernenko-post_vcgenerator/post_vcgenerator-fadfff131086870a027d6bd1c78b8d5a3baf183b/case-studies/revolvingDoor/Proof_3_10.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5312093733737563, "lm_q2_score": 0.2689414272294874, "lm_q1q2_score": 0.14286420703281966}} {"text": "(* Title: JinjaThreads/MM/JMM_Interp.thy\n Author: Andreas Lochbihler\n\n Interpret the language specific heap locales with the Java memory model\n*)\n\ntheory JMM_Interp imports\n \"JMM_Compiler\"\n \"../J/Deadlocked\"\n \"../BV/JVMDeadlocked\"\n \"JMM_Type2\"\n \"DRF_J\"\n \"DRF_JVM\"\nbegin\n\nlemma jmm'_J_typesafe:\n \"J_typesafe addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\nby unfold_locales\n\nlemma jmm'_JVM_typesafe:\n \"JVM_typesafe addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\nby unfold_locales\n\nlemma jmm_typeof_addr_compP [simp]:\n \"jmm_typeof_addr (compP f P) = jmm_typeof_addr P\"\nby(simp add: jmm_typeof_addr_def fun_eq_iff)\n\nlemma compP2_compP1_convs:\n \"is_type (compP2 (compP1 P)) = is_type P\"\n \"is_class (compP2 (compP1 P)) = is_class P\"\n \"jmm'_addr_loc_type (compP2 (compP1 P)) = jmm'_addr_loc_type P\"\n \"jmm'_conf (compP2 (compP1 P)) = jmm'_conf P\"\nby(simp_all add: compP2_def heap_base.compP_conf heap_base.compP_addr_loc_type fun_eq_iff split: addr_loc.splits)\n\nlemma jmm'_J_JVM_conf_read:\n \"J_JVM_conf_read addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\napply(rule J_JVM_conf_read.intro)\napply(rule J1_JVM_conf_read.intro)\napply(rule JVM_conf_read.intro)\n prefer 2\n apply(rule JVM_heap_conf.intro)\n apply(rule JVM_heap_conf_base'.intro)\n apply(unfold compP2_def compP1_def compP_heap compP_heap_conf compP_heap_conf_read jmm_typeof_addr_compP)\n apply unfold_locales\ndone\n\nlemma jmm_J_allocated_progress:\n \"J_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) jmm_heap_read jmm_heap_write jmm_hconf jmm_allocated P\"\nby unfold_locales\n\nlemma jmm'_J_allocated_progress:\n \"J_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf jmm_allocated P\"\nby(unfold_locales)\n\nlemma jmm_JVM_allocated_progress:\n \"JVM_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) jmm_heap_read jmm_heap_write jmm_hconf jmm_allocated P\"\nby unfold_locales\n\nlemma jmm'_JVM_allocated_progress:\n \"JVM_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf jmm_allocated P\"\nby(unfold_locales)\n\nend\n", "meta": {"author": "Josh-Tilles", "repo": "AFP", "sha": "f4bf1d502bde2a3469d482b62c531f1c3af3e881", "save_path": "github-repos/isabelle/Josh-Tilles-AFP", "path": "github-repos/isabelle/Josh-Tilles-AFP/AFP-f4bf1d502bde2a3469d482b62c531f1c3af3e881/thys/JinjaThreads/MM/JMM_Interp.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5428632831725052, "lm_q2_score": 0.26284184314569564, "lm_q1q2_score": 0.14268718592518498}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(* Proofs about untyped invocations. *)\n\ntheory Untyped_AI\nimports \"./$L4V_ARCH/ArchDetype_AI\"\n \"Lib.MonadicRewrite\"\nbegin\n\ncontext begin interpretation Arch .\n\nrequalify_consts\n region_in_kernel_window\n arch_default_cap\n second_level_tables\n safe_ioport_insert\n\nrequalify_facts\n set_cap_valid_arch_caps_simple\n set_cap_kernel_window_simple\n set_cap_ioports'\n safe_ioport_insert_triv\n\nend\n\nprimrec\n valid_untyped_inv_wcap :: \"Invocations_A.untyped_invocation \\ cap option\n \\ 'z::state_ext state \\ bool\"\nwhere\n \"valid_untyped_inv_wcap (Retype slot reset ptr_base ptr ty us slots dev)\n = (\\co s. \\sz idx. (cte_wp_at (\\c. c = (cap.UntypedCap dev ptr_base sz idx)\n \\ (co = None \\ co = Some c)) slot s\n \\ range_cover ptr sz (obj_bits_api ty us) (length slots)\n \\ (idx \\ unat (ptr - ptr_base) \\ (reset \\ ptr = ptr_base))\n \\ (ptr && ~~ mask sz) = ptr_base)\n \\ (reset \\ descendants_of slot (cdt s) = {})\n \\ (ty = CapTableObject \\ us > 0)\n \\ (ty = Untyped \\ us \\ untyped_min_bits)\n \\ distinct (slot#slots)\n \\ (\\slot\\set slots. cte_wp_at ((=) cap.NullCap) slot s\n \\ ex_cte_cap_wp_to is_cnode_cap slot s \\ real_cte_at slot s)\n \\ ty \\ ArchObject ASIDPoolObj \\ 0 < length slots\n \\ (dev \\ ((ty = Untyped) \\ is_frame_type ty)))\"\nabbreviation\n \"valid_untyped_inv ui \\ valid_untyped_inv_wcap ui None\"\n\nlemma valid_untyped_inv_wcap:\n \"valid_untyped_inv ui\n = (\\s. \\sz idx. valid_untyped_inv_wcap ui (Some\n (case ui of Retype slot reset ptr_base ptr ty us slots dev\n \\ UntypedCap dev (ptr && ~~ mask sz) sz idx)) s)\"\n apply (cases ui)\n apply (clarsimp simp: fun_eq_iff cte_wp_at_caps_of_state\n intro!: arg_cong[where f=Ex] conj_cong[OF refl])\n apply auto\n done\n\nlocale Untyped_AI_of_bl_nat_to_cref =\n assumes of_bl_nat_to_cref:\n \"\\ x < 2 ^ bits; bits < word_bits \\\n \\ (of_bl (nat_to_cref bits x) :: machine_word) = of_nat x\"\n\nlemma cnode_cap_bits_range:\n \"\\ cte_wp_at P p s; invs s \\ \\\n (\\c. P c \\ (is_cnode_cap c \\\n (\\n. n > 0 \\ n < (word_bits - cte_level_bits) \\ is_aligned (obj_ref_of c) (n + cte_level_bits)) (bits_of c)))\"\n apply (frule invs_valid_objs)\n apply (drule(1) cte_wp_at_valid_objs_valid_cap)\n apply clarsimp\n apply (rule exI, erule conjI)\n apply (clarsimp simp: is_cap_simps valid_cap_def bits_of_def)\n apply (erule (1) obj_at_valid_objsE)\n apply (case_tac ko, simp_all add: is_cap_table_def)[1]\n apply (clarsimp simp: valid_obj_def valid_cs_def well_formed_cnode_n_def\n valid_cs_size_def length_set_helper\n word_bits_def)\n apply (drule invs_psp_aligned)\n apply (unfold pspace_aligned_def)\n apply (frule domI, drule (1) bspec)\n apply (clarsimp simp: ex_with_length add.commute split: if_split_asm)\n done\n\n\n(* FIXME: move *)\nlemma cte_wp_at_wellformed_strengthen:\n \"cte_at p s \\ valid_objs s \\ cte_wp_at wellformed_cap p s\"\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule (1) caps_of_state_valid_cap)\n apply (simp add: valid_cap_def2)\n done\n\n\n(* FIXME: move *)\nlemma get_cap_cte_wp_at_P:\n \"\\cte_wp_at P p\\ get_cap p \\\\rv s. cte_wp_at (%c. c = rv) p s \\ P rv\\\"\n apply (rule hoare_weaken_pre)\n apply (rule get_cap_wp)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n done\n\n\nlemma lookup_cap_ex:\n \"\\valid_objs\\ lookup_cap t x \\\\rv s. valid_objs s \\\n (\\p1 p2 m c'. rv = mask_cap m c' \\\n cte_wp_at (\\c. c = c') (p1, p2) s)\\,-\"\n apply (simp add: lookup_cap_def split_def)\n apply wp\n apply (rule_tac P1=wellformed_cap in hoare_strengthen_post[OF get_cap_cte_wp_at_P])\n apply clarsimp\n apply (rule exI)+\n apply (subst cap_mask_UNIV, simp)\n apply fastforce\n apply (wpsimp|strengthen cte_wp_at_wellformed_strengthen)+\n done\n\n\nlemma is_cnode_mask:\n \"is_cnode_cap (mask_cap m c) = is_cnode_cap c\"\n by (case_tac c, simp_all add: mask_cap_def cap_rights_update_def is_cap_simps split:bool.splits)\n\n\nlemma Suc_length_not_empty:\n \"length xs = length xs' \\ Suc 0 \\ length xs' = (xs \\ [])\"\n by (fastforce simp: le_simps)\n\n\nlemmas Suc_length_not_empty' = Suc_length_not_empty [OF refl]\n\n\n(* FIXME: hides Invariants_AI.caps_of_state_valid,\n FIXME: duplicate of Invariants_AI.caps_of_state_valid_cap *)\nlemma caps_of_state_valid:\n \"\\invs s; caps_of_state s p = Some cap \\ \\ s \\ cap\"\n apply (rule cte_wp_valid_cap)\n apply (simp add: cte_wp_at_caps_of_state)\n apply clarsimp\n done\n\nlemma mask_CNodeD:\n \"mask_cap M' cap = cap.CNodeCap r bits g \\\n cap = cap.CNodeCap r bits g\"\n by (cases cap, auto simp: mask_cap_def cap_rights_update_def split:bool.splits)\n\n(* FIXME: move *)\nlemma unat_2p_sub_1:\n \"k < len_of TYPE('a)\n \\ unat (2 ^ k - 1 :: 'a :: len word) = unat (2 ^ k :: 'a word) - 1\"\n by (simp add: unat_minus_one)\n\n\nlemma compute_free_index_wp:\n \"\\\\\\ const_on_failure idx\n (doE y \\ ensure_no_children slot;\n returnOk (0::nat)\n odE)\n \\\\rv s. rv \\ idx\\\"\n apply (rule hoare_pre)\n apply (wp const_on_failure_wp)\n apply clarsimp\n done\n\n\nlemma dui_inv[wp]:\n \"\\P\\ decode_untyped_invocation label args slot (cap.UntypedCap dev w n idx) cs \\\\rv. P\\\"\n apply (simp add: decode_untyped_invocation_def whenE_def\n split_def data_to_obj_type_def unlessE_def\n split del: if_split cong: if_cong)\n apply (rule hoare_pre)\n apply (simp split del: if_split\n | wp (once) mapME_x_inv_wp hoare_drop_imps const_on_failure_wp\n | assumption\n | simp add: lookup_target_slot_def\n | wpcw\n | wp)+\n done\n\nlemma map_ensure_empty_cte_wp_at:\n \"\\cte_wp_at P p\\ mapME_x ensure_empty xs \\\\rv. cte_wp_at P p\\,-\"\n unfolding mapME_x_def sequenceE_x_def by (induct xs; wpsimp)\n\n\nlemma map_ensure_empty:\n \"\\P\\ mapME_x ensure_empty xs \\\\rv s. (\\x \\ set xs. cte_wp_at ((=) cap.NullCap) x s) \\ P s\\,-\"\n apply (induct xs)\n apply (simp add: mapME_x_def sequenceE_x_def)\n apply wp\n apply (simp add: mapME_x_def sequenceE_x_def)\n apply (unfold validE_R_def)\n apply (rule seqE[rotated])\n apply (rule hoare_vcg_conj_liftE1)\n apply (fold sequenceE_x_def mapME_x_def)[1]\n apply (rule map_ensure_empty_cte_wp_at)\n apply assumption\n apply (simp add: ensure_empty_def whenE_def)\n apply (rule hoare_pre, wp get_cap_wp)\n apply clarsimp\n done\n\n\nlemma ensure_no_children_sp:\n \"\\P\\ ensure_no_children slot \\\\rv s. descendants_of slot (cdt s) = {} \\ P s\\,-\"\n apply (simp add: ensure_no_children_descendants)\n apply (clarsimp simp: valid_def validE_def validE_R_def split_def in_monad\n | rule conjI)+\n done\n\n\nlemma data_to_obj_type_inv:\n \"\\P\\ data_to_obj_type v \\\\rv. P\\\"\n apply (simp add: data_to_obj_type_def)\n apply (intro conjI impI; wpsimp)\n done\n\n\nlemma data_to_obj_type_inv2 [wp]:\n \"\\P\\ data_to_obj_type v \\\\rv. P\\,-\"\n by (wp data_to_obj_type_inv)\n\n\nlemma get_cap_gets:\n \"\\valid_objs\\\n get_cap ptr\n \\\\rv s. \\cref msk. cte_wp_at (\\cap. rv = mask_cap msk cap) cref s\\\"\n apply (wp get_cap_wp)\n apply (intro allI impI)\n apply (rule_tac x=ptr in exI)\n apply (rule_tac x=UNIV in exI)\n apply (simp add: cte_wp_at_caps_of_state)\n apply (frule (1) caps_of_state_valid_cap)\n apply (clarsimp simp add: valid_cap_def2)\n done\n\n\nlemma lookup_cap_gets:\n \"\\valid_objs\\ lookup_cap t c \\\\rv s. \\cref msk. cte_wp_at (\\cap. rv = mask_cap msk cap) cref s\\,-\"\n unfolding lookup_cap_def fun_app_def split_def\n apply (rule hoare_pre, wp get_cap_gets)\n apply simp\n done\n\n\nlemma dui_sp_helper:\n \"(\\s. P s \\ valid_objs s) \\\n \\P\\ if val = 0 then returnOk root_cap\n else doE node_slot \\\n lookup_target_slot root_cap (to_bl (args ! 2)) (unat (args ! 3));\n liftE $ get_cap node_slot\n odE \\\\rv s. (rv = root_cap \\ (\\slot. cte_wp_at ((=) rv) slot s)) \\ P s\\, -\"\n apply (simp add: split_def lookup_target_slot_def)\n apply (intro impI conjI)\n apply wpsimp\n apply (wp get_cap_wp)\n apply (rule hoare_post_imp_R [where Q'=\"\\rv. valid_objs and P\"]\n ; wpsimp simp: cte_wp_at_caps_of_state)\n apply simp\n done\n\nlocale Untyped_AI_arch =\n fixes state_ext_t :: \"('state_ext::state_ext) itself\"\n assumes data_to_obj_type_sp:\n \"\\P x. \\P\\ data_to_obj_type x \\\\ts (s::'state_ext state). ts \\ ArchObject ASIDPoolObj \\ P s\\, -\"\n assumes dui_inv_wf[wp]:\n \"\\w sz idx slot cs label args dev.\\invs and cte_wp_at ((=) (cap.UntypedCap dev w sz idx)) slot\n and (\\(s::'state_ext state). \\cap \\ set cs. is_cnode_cap cap\n \\ (\\r\\cte_refs cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s))\n and (\\s. \\x \\ set cs. s \\ x)\\\n decode_untyped_invocation label args slot (cap.UntypedCap dev w sz idx) cs\n \\valid_untyped_inv\\,-\"\n assumes retype_ret_valid_caps_captable:\n \"\\ptr sz dev us n s.\\pspace_no_overlap_range_cover ptr sz (s::'state_ext state) \\ 0 < us \\ range_cover ptr sz (obj_bits_api CapTableObject us) n \\ ptr \\ 0\n \\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object CapTableObject dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api CapTableObject us)) [0.. \\ CNodeCap (ptr_add ptr (y * 2 ^ obj_bits_api CapTableObject us)) us []\"\n assumes retype_ret_valid_caps_aobj:\n \"\\ptr sz s x6 us n dev. \\pspace_no_overlap_range_cover ptr sz (s::'state_ext state) \\ x6 \\ ASIDPoolObj \\ range_cover ptr sz (obj_bits_api (ArchObject x6) us) n \\ ptr \\ 0 \\ \\; tp = ArchObject x6\\\\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object (ArchObject x6) dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api (ArchObject x6) us)) [0.. \\ ArchObjectCap (arch_default_cap x6 (ptr_add ptr (y * 2 ^ obj_bits_api (ArchObject x6) us)) us dev)\"\n\n assumes init_arch_objects_descendants_range[wp]:\n \"\\x cref ty ptr n us y. \\\\(s::'state_ext state). descendants_range x cref s \\ init_arch_objects ty ptr n us y\n \\\\rv s. descendants_range x cref s\\\"\n assumes init_arch_objects_caps_overlap_reserved[wp]:\n \"\\S ty ptr n us y. \\\\(s::'state_ext state). caps_overlap_reserved S s\\\n init_arch_objects ty ptr n us y\n \\\\rv s. caps_overlap_reserved S s\\\"\n assumes delete_objects_rewrite:\n \"\\sz ptr. \\ word_size_bits \\ sz; sz\\ word_bits; ptr && ~~ mask sz = ptr \\\n \\ delete_objects ptr sz =\n do y \\ modify (clear_um {ptr + of_nat k |k. k < 2 ^ sz});\n modify (detype {ptr && ~~ mask sz..ptr + 2 ^ sz - 1} :: 'state_ext state \\ 'state_ext state)\n od\"\n assumes obj_is_device_vui_eq:\n \"valid_untyped_inv ui (s :: 'state_ext state)\n \\ case ui of\n Retype slot reset ptr_base ptr tp us slots dev\n \\ obj_is_device tp dev = dev\"\n\nlemmas is_aligned_triv2 = Aligned.is_aligned_triv\n\nlemma strengthen_imp_ex2: \"(P \\ Q x y) \\ (P \\ (\\x y. Q x y))\"\n by auto\n\n\nlemma p2_minus:\n \"sz < len_of TYPE('a) \\\n of_nat (2 ^ len_of TYPE('a) - 2 ^ sz) = ((mask (len_of TYPE('a)) && ~~ mask sz):: 'a :: len word)\"\n apply (rule word_unat.Rep_inverse')\n apply (simp add: mask_out_sub_mask)\n apply (simp add: unat_sub word_and_le2 mask_and_mask)\n apply (simp add: min_def mask_def word_size unat_minus)\n done\n\nlemma range_cover_bound':\n fixes ptr :: \"'a :: len word\"\n assumes cover: \"range_cover ptr sz sbit n\"\n assumes le : \"x < n\"\n shows \"unat (ptr + of_nat x * 2 ^ sbit) + 2 ^ sbit \\ 2 ^ len_of TYPE('a)\"\nproof -\n have l: \"unat (ptr && ~~ mask sz) + 2^ sz \\ 2^ len_of TYPE('a)\"\n using cover\n apply -\n apply (rule le_diff_conv2[THEN iffD1])\n apply (simp add: range_cover_def)\n apply (rule unat_le_helper)\n apply (subst p2_minus)\n apply (erule range_cover.sz)\n apply (rule neg_mask_mono_le)\n apply (simp add: mask_def)\n done\n\n have n: \"unat ((ptr && mask sz) + of_nat x * 2 ^ sbit) + 2^sbit \\ 2 ^ sz\"\n apply (rule le_trans[OF _ range_cover.range_cover_compare_bound[OF cover]])\n apply (rule le_trans[where j = \"(x+1) * 2^sbit + unat (ptr && mask sz)\"])\n apply clarsimp\n apply (rule le_trans[OF unat_plus_gt])\n using le\n apply (simp add: range_cover.unat_of_nat_shift[OF cover])\n apply simp\n using le\n apply (case_tac n,simp+)\n done\n show ?thesis\n using cover le\n apply -\n apply (frule iffD1[OF meta_eq_to_obj_eq[OF range_cover_def]])\n apply (clarsimp)\n apply (frule range_cover_le[where n=x])\n apply simp\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (subst unat_plus_simple[THEN iffD1])\n apply (rule is_aligned_no_wrap')\n apply (rule is_aligned_neg_mask[OF le_refl])\n apply (simp add: range_cover_def)\n apply (simp add: word_less_nat_alt)\n apply (rule le_less_trans[OF unat_plus_gt])\n apply (erule range_cover.range_cover_compare[OF cover])\n apply (subst add.assoc)\n apply (rule le_trans[OF _ l])\n apply simp\n apply (simp add: n)\n done\nqed\n\n\nlemma range_cover_stuff:\n notes unat_power_lower_machine = unat_power_lower[where 'a=machine_word_len]\n notes unat_of_nat_machine = unat_of_nat_eq[where 'a=machine_word_len]\n notes is_aligned_neg_mask_eq[simp del]\n notes is_aligned_neg_mask_weaken[simp del]\n shows\n \"\\0 < n;n \\ unat ((2::machine_word) ^ sz - of_nat rv >> bits);\n rv \\ 2^ sz; sz < word_bits; is_aligned w sz\\ \\\n rv \\ unat (alignUp (w + of_nat rv) bits - w) \\\n (alignUp (w + of_nat rv) bits) && ~~ mask sz = w \\\n range_cover (alignUp (w + ((of_nat rv)::machine_word)) bits) sz bits n\"\n apply (clarsimp simp: range_cover_def)\n proof (intro conjI)\n assume not_0 : \"0 unat ((2::machine_word) ^ sz - of_nat rv >> bits)\" \"rv\\ 2^sz\"\n \"sz < word_bits\"\n assume al: \"is_aligned w sz\"\n have space: \"(2::machine_word) ^ sz - of_nat rv \\ 2^ sz\"\n apply (rule word_sub_le[OF word_of_nat_le])\n apply (clarsimp simp: bound unat_power_lower_machine)\n done\n show cmp: \"bits \\ sz\"\n using not_0 bound\n apply -\n apply (rule ccontr)\n apply (clarsimp simp: not_le)\n apply (drule le_trans)\n apply (rule word_le_nat_alt[THEN iffD1])\n apply (rule le_shiftr[OF space])\n apply (subgoal_tac \"(2::machine_word)^sz >> bits = 0\")\n apply simp\n apply (rule and_mask_eq_iff_shiftr_0[THEN iffD1])\n apply (simp add: and_mask_eq_iff_le_mask)\n apply (case_tac \"word_bits \\ bits\")\n apply (simp add: word_bits_def mask_def power_overflow)\n apply (subst le_mask_iff_lt_2n[THEN iffD1])\n apply (simp add: word_bits_def)\n apply (simp add: word_less_nat_alt[THEN iffD2] unat_power_lower_machine)\n done\n have shiftr_t2n[simp]:\"(2::machine_word)^sz >> bits = 2^ (sz - bits)\"\n using bound cmp\n apply (case_tac \"sz = 0\",simp)\n apply (subgoal_tac \"(1::machine_word) << sz >> bits = 2^ (sz -bits)\")\n apply simp\n apply (subst shiftl_shiftr1)\n apply (simp add: word_size word_bits_def shiftl_t2n word_1_and_bl)+\n done\n\n have cmp2[simp]: \"alignUp (of_nat rv) bits < (2 :: machine_word) ^ sz\"\n using bound cmp not_0\n apply -\n apply (case_tac \"rv = 0\")\n apply simp\n apply (clarsimp simp: alignUp_def2)\n apply (subst mask_eq_x_eq_0[THEN iffD1])\n apply (simp add: and_mask_eq_iff_le_mask mask_def)\n apply (simp add: p2_gt_0[where 'a=machine_word_len, folded word_bits_def])\n apply (simp add: alignUp_def3)\n apply (subgoal_tac \"1 \\ unat (2 ^ sz - of_nat rv >> bits)\")\n prefer 2\n apply (erule le_trans[rotated])\n apply clarsimp\n apply (thin_tac \"n \\ M\" for M)\n apply (simp add: shiftr_div_2n')\n apply (simp add: td_gal[symmetric])\n apply (subst (asm) unat_sub)\n apply (simp add: word_of_nat_le unat_power_lower_machine)\n apply (simp add: le_diff_conv2 word_of_nat_le unat_le_helper word_less_nat_alt)\n apply (rule le_less_trans[OF unat_plus_gt])\n apply (rule less_le_trans[where y = \"2^bits + unat (of_nat rv)\"])\n apply simp\n apply (rule le_less_trans[OF _ measure_unat])\n apply (rule word_le_nat_alt[THEN iffD1])\n apply (rule word_and_le2)\n apply (erule of_nat_neq_0)\n apply (subst word_bits_def[symmetric])\n apply (erule le_less_trans)\n apply simp\n apply simp\n done\n\n show \"n + unat (alignUp (w + ((of_nat rv)::machine_word)) bits && mask sz >> bits) \\ 2 ^ (sz - bits)\"\n using not_0 bound cmp\n apply -\n apply (erule le_trans[OF add_le_mono])\n apply (rule le_refl)\n apply (clarsimp simp: power_sub field_simps td_gal[symmetric])\n apply (subst (2) mult.commute)\n apply (subst unat_shiftl_absorb)\n apply (rule order_trans[OF le_shiftr])\n apply (rule word_and_le1)\n apply (simp add: shiftr_mask2 word_bits_def)\n apply (simp add: mask_def)\n apply (rule word_sub_1_le)\n apply (simp add: word_bits_def)+\n apply (simp add: shiftl_t2n[symmetric] field_simps shiftr_shiftl1)\n apply (subst is_aligned_neg_mask_eq)\n apply (rule is_aligned_andI1,simp)\n apply (subst mult.commute)\n apply (subst unat_shiftl_absorb[where p = \"sz - bits\"])\n apply (rule order_trans[OF le_shiftr])\n apply (rule space)\n apply (simp add: shiftr_div_2n_w word_bits_def)+\n apply (simp add: shiftl_t2n[symmetric] field_simps shiftr_shiftl1)\n apply (subst is_aligned_diff_neg_mask[OF is_aligned_weaken])\n apply (rule is_aligned_triv)\n apply (simp add: word_bits_def)+\n apply (subst unat_sub)\n apply (rule order_trans[OF word_and_le2])\n apply (simp add: less_imp_le)\n apply (subst diff_add_assoc[symmetric])\n apply (rule unat_le_helper)\n apply (rule order_trans[OF word_and_le2])\n apply (simp add: less_imp_le[OF cmp2])\n apply (clarsimp simp: field_simps word_bits_def is_aligned_neg_mask_eq)\n apply (simp add: le_diff_conv word_le_nat_alt[symmetric] word_and_le2)\n apply (simp add: alignUp_plus[OF is_aligned_weaken[OF al]]\n is_aligned_add_helper[THEN conjunct1, OF al cmp2])\n done\n show \"rv \\ unat (alignUp (w + of_nat rv) bits - w)\"\n using bound not_0 cmp al\n apply -\n apply (clarsimp simp: alignUp_plus[OF is_aligned_weaken])\n apply (case_tac \"rv = 0\")\n apply simp\n apply (rule le_trans[OF _ word_le_nat_alt[THEN iffD1,OF alignUp_ge]])\n apply (subst unat_of_nat_machine)\n apply (erule le_less_trans)\n apply (rule power_strict_increasing)\n apply (simp_all add: word_bits_def)[4]\n apply (rule alignUp_is_aligned_nz[where x = \"2^sz\"])\n apply (rule is_aligned_weaken[OF is_aligned_triv2])\n apply (simp_all add: word_bits_def)[2]\n apply (subst word_of_nat_le)\n apply (subst unat_power_lower_machine)\n apply (simp add: word_bits_def)+\n apply (erule of_nat_neq_0)\n apply (erule le_less_trans)\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)+\n done\n show \"alignUp (w + of_nat rv) bits && ~~ mask sz = w\"\n using bound not_0 cmp al\n apply (clarsimp simp: alignUp_plus[OF is_aligned_weaken]\n mask_out_add_aligned[symmetric])\n apply (clarsimp simp: and_not_mask)\n apply (subgoal_tac \"alignUp ((of_nat rv)::machine_word) bits >> sz = 0\")\n apply simp\n apply (simp add: le_mask_iff[symmetric] mask_def)\n done\n qed (simp add: word_bits_def)\n\ncontext Arch begin\n (*FIXME: generify proof that uses this *)\n lemmas range_cover_stuff_arch = range_cover_stuff[unfolded word_bits_def, simplified]\nend\n\n\nlemma cte_wp_at_range_cover:\n \"\\bits < word_bits; rv\\ 2^ sz; invs s;\n cte_wp_at ((=) (cap.UntypedCap dev w sz idx)) p s;\n 0 < n; n \\ unat ((2::machine_word) ^ sz - of_nat rv >> bits)\\\n \\ range_cover (alignUp (w + of_nat rv) bits) sz bits n\"\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid)\n apply (clarsimp simp: valid_cap_def valid_untyped_def cap_aligned_def)\n apply (drule range_cover_stuff)\n apply simp_all\n apply clarsimp\n done\n\n\nlemma le_mask_le_2p:\n \"\\idx \\ unat ((ptr::machine_word) && mask sz);sz < word_bits\\ \\ idx < 2^ sz\"\n apply (erule le_less_trans)\n apply (rule unat_less_helper)\n apply simp\n apply (rule le_less_trans)\n apply (rule word_and_le1)\n apply (simp add: mask_def)\n done\n\n\nlemma diff_neg_mask[simp]:\n \"ptr - (ptr && ~~ mask sz) = (ptr && mask sz)\"\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr])\n apply simp\n done\n\n\nlemma cte_wp_at_caps_descendants_range_inI:\n \"\\ invs s;cte_wp_at (\\c. c = cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz);sz < word_bits \\ \\ descendants_range_in {ptr .. (ptr && ~~mask sz) + 2^sz - 1} cref s\"\n apply (frule invs_mdb)\n apply (frule(1) le_mask_le_2p)\n apply (clarsimp simp: descendants_range_in_def cte_wp_at_caps_of_state )\n apply (frule(1) descendants_of_cte_at)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule untyped_cap_descendants_range[rotated])\n apply simp+\n apply (simp add: invs_valid_pspace)\n apply (clarsimp simp: cte_wp_at_caps_of_state usable_untyped_range.simps)\n apply (erule disjoint_subset2[rotated])\n apply clarsimp\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n done\n\n\nlemma nasty_range:\n fixes word :: \"'a :: len word\"\n assumes szb: \"bz < len_of TYPE('a)\"\n and al: \"is_aligned word bz\"\n and br: \"ptr \\ {word.. word+2^bz - 1}\"\n and sr: \"sz \\ bz\"\n shows \"\\idx::'a :: len word. idx < (2::'a :: len word)^(bz - sz) \\\n ptr \\ {word + idx * 2^ sz .. word + (idx * 2^ sz) + (2^ sz - 1)}\"\nproof -\n have offset: \"ptr - word < 2^ bz\"\n using br szb\n apply (subst word_less_sub_le[symmetric],simp)\n apply (rule word_diff_ls')\n apply (clarsimp simp: field_simps)+\n done\n have t2n_sym: \"\\z. (2::'a :: len word)^z = (1:: 'a :: len word)<b c. \\\\a. (a::'a :: len word)< b \\ a< c\\ \\ b\\c\"\n apply (rule ccontr)\n apply (clarsimp simp: not_le dest!: meta_spec)\n by auto\n have ptr_word: \"(ptr - word >> sz) * 2 ^ sz = (ptr &&~~ mask sz) - word\"\n apply (subst mult.commute)\n apply (clarsimp simp: shiftl_t2n[symmetric] shiftr_shiftl1 word_and_le2)\n apply (simp only: diff_conv_add_uminus)\n apply (subst add.commute[where a = \"ptr && ~~ mask sz\"])\n apply (subst mask_out_add_aligned)\n defer\n apply (simp add: field_simps)\n apply (rule is_aligned_minus)\n apply (rule is_aligned_weaken[OF al sr])\n done\n show ?thesis\n using szb sr br\n apply clarsimp\n apply (rule_tac x = \"(ptr - word) >> sz\" in exI)\n apply (intro conjI)\n apply (rule less_le_trans)\n apply (rule shiftr_less_t2n[where m = \"bz - sz\"])\n apply (simp add: offset)\n apply simp\n apply (rule le_plus)\n apply (subst mult.commute)\n apply (simp add: shiftl_t2n[symmetric] shiftr_shiftl1 word_and_le2)\n apply clarsimp\n apply (simp add: ptr_word p_assoc_help)\n apply (rule order_trans[OF _ word_plus_mono_right])\n apply (rule order_eq_refl)\n apply (subst word_plus_and_or_coroll2[where x = \"ptr\",symmetric])\n apply (subst add.commute)\n apply simp\n apply (rule order_trans[OF word_and_le1])\n apply (clarsimp simp: mask_def)\n apply (rule is_aligned_no_overflow'[OF is_aligned_neg_mask])\n apply simp+\ndone\nqed\n\nlemma check_children_wp:\n \"\\\\s. if descendants_of slot (cdt s) = {} then Q True s else Q False s \\\n const_on_failure False\n (doE y \\ ensure_no_children slot;\n returnOk True\n odE) \\Q\\\"\n including no_pre\n apply (clarsimp simp: const_on_failure_def ensure_no_children_descendants bindE_assoc)\n apply wp\n apply (clarsimp simp: valid_def validE_def if_splits)\n apply (intro conjI impI)\n apply (clarsimp simp: in_monad free_index_of_def)+\n done\n\n\nlemma alignUp_eq:\n \"\\is_aligned (w :: 'a :: len word) sz; a \\ 2^ sz; us \\ sz; sz < len_of TYPE('a);\n alignUp (w + a) us = w\\\n \\ a = 0\"\n apply (clarsimp simp: alignUp_plus[OF is_aligned_weaken])\n apply (rule ccontr)\n apply (drule alignUp_is_aligned_nz[rotated -1,where x = \"2^ sz\"])\n apply (rule is_aligned_weaken[OF is_aligned_triv2])\n apply simp+\n done\n\nlemma map_ensure_empty_wp:\n \"\\ \\s. (\\x\\set xs. cte_wp_at ((=) NullCap) x s) \\ P () s \\\n mapME_x ensure_empty xs \\P\\, -\"\n by (rule hoare_post_imp_R, rule map_ensure_empty, simp)\n\nlemma cases_imp_eq:\n \"((P \\ Q \\ R) \\ (\\ P \\ Q \\ S)) = (Q \\ (P \\ R) \\ (\\ P \\ S))\"\n by blast\n\nlemma inj_bits:\n \"\\ of_nat x * 2^bits = of_nat y * (2^bits :: machine_word);\n x < bnd; y < bnd; bits \\ word_bits; bnd \\ 2 ^ (word_bits - bits) \\\n \\ of_nat x = (of_nat y :: machine_word)\"\n apply (cases \"bits = 0\", simp)\n apply (fold shiftl_t2n [where n=bits, simplified, simplified mult.commute])\n apply (simp only: word_bl.Rep_inject[symmetric]\n bl_shiftl)\n apply (drule(1) order_less_le_trans)+\n apply (drule of_nat_mono_maybe[rotated, where 'a=machine_word_len])\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (drule of_nat_mono_maybe[rotated, where 'a=machine_word_len])\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (simp only: word_unat_power[symmetric])\n apply (erule ssubst [OF less_is_drop_replicate])+\n apply (simp add: word_bits_def word_size)\n done\n\n\nlemma of_nat_shiftR:\n \"a < 2 ^ word_bits \\\n unat (of_nat (shiftR a b)::machine_word) = unat ((of_nat a :: machine_word) >> b)\"\n apply (subst shiftr_div_2n')\n apply (clarsimp simp: shiftR_nat)\n apply (subst unat_of_nat_eq[where 'a=machine_word_len])\n apply (simp only: word_bits_def)\n apply (erule le_less_trans[OF div_le_dividend])\n apply (subst unat_of_nat_eq[where 'a=machine_word_len])\n apply (simp only: word_bits_def)\n apply simp\n done\n\n\nlemma valid_untypedD:\n \"\\ s \\ cap.UntypedCap dev ptr bits idx; kheap s p = Some ko; pspace_aligned s\\ \\\n obj_range p ko \\ cap_range (cap.UntypedCap dev ptr bits idx) \\ {} \\\n (obj_range p ko \\ cap_range (cap.UntypedCap dev ptr bits idx)\n \\ obj_range p ko \\ usable_untyped_range (cap.UntypedCap dev ptr bits idx) = {})\"\n by (clarsimp simp: valid_untyped_def valid_cap_def cap_range_def obj_range_def)\n\nlemma pspace_no_overlap_detype':\n \"\\ s \\ cap.UntypedCap dev ptr bits idx; pspace_aligned s; valid_objs s \\\n \\ pspace_no_overlap {ptr .. ptr + 2 ^ bits - 1} (detype {ptr .. ptr + 2 ^ bits - 1} s)\"\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff\n simp: obj_range_def add_diff_eq[symmetric] pspace_no_overlap_def)\n apply (frule(2) valid_untypedD)\n apply (rule ccontr)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff is_aligned_neg_mask_eq\n simp: valid_cap_def cap_aligned_def obj_range_def cap_range_def is_aligned_neg_mask_eq p_assoc_help)\n apply (drule_tac c= x in set_mp)\n apply simp+\n done\n\nlemma pspace_no_overlap_detype:\n \"\\ s \\ cap.UntypedCap dev ptr bits idx; pspace_aligned s; valid_objs s \\\n \\ pspace_no_overlap_range_cover ptr bits (detype {ptr .. ptr + 2 ^ bits - 1} s)\"\n apply (drule(2) pspace_no_overlap_detype'[rotated])\n apply (drule valid_cap_aligned)\n apply (clarsimp simp: cap_aligned_def is_aligned_neg_mask_eq field_simps)\n done\n\nlemma zip_take_length[simp]:\n \"zip (take (length ys) xs) ys = zip xs ys\"\n apply (induct xs arbitrary: ys)\n apply simp\n apply (case_tac ys)\n apply simp\n apply simp\n done\n\n(* FIXME: move *)\nlemma int_not_empty_subsetD:\n \"\\ A\\ B = {}; A\\ {};B\\ {}\\ \\ \\ A \\ B \\ \\ B\\ A \\ \\ A = B\"\n by auto\n\n(* FIXME: move *)\nlemma subset_not_psubset: \" A \\ B \\ \\ B \\ A\" by clarsimp\n\nlemma mdb_Null_descendants:\n \"\\ cte_wp_at ((=) cap.NullCap) p s; valid_mdb s \\ \\\n descendants_of p (cdt s) = {}\"\n apply (clarsimp simp add: valid_mdb_def cte_wp_at_caps_of_state swp_def)\n apply (erule(1) mdb_cte_at_Null_descendants)\n done\n\nlemma mdb_Null_None:\n \"\\ cte_wp_at ((=) cap.NullCap) p s; valid_mdb s \\ \\\n cdt s p = None\"\n apply (clarsimp simp add: valid_mdb_def cte_wp_at_caps_of_state swp_def)\n apply (erule(1) mdb_cte_at_Null_None)\n done\n\nlemma not_waiting_reply_slot_no_descendants:\n \"\\ st_tcb_at (Not \\ awaiting_reply) t s;\n valid_reply_caps s; valid_objs s; valid_mdb s \\\n \\ descendants_of (t, tcb_cnode_index 2) (cdt s) = {}\"\n apply (rule ccontr, erule nonemptyE)\n apply (clarsimp simp: valid_mdb_def reply_mdb_def reply_masters_mdb_def)\n apply (frule_tac ref=\"tcb_cnode_index 2\" in tcb_at_cte_at[OF st_tcb_at_tcb_at])\n apply (simp add: domI)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) tcb_cap_valid_caps_of_stateD)\n apply (clarsimp simp: tcb_cap_valid_def st_tcb_at_tcb_at)\n apply (clarsimp simp: st_tcb_def2)\n apply (erule disjE)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps)\n apply (elim allE impE)\n apply fastforce\n apply (clarsimp)\n apply (drule(1) bspec)\n apply (subgoal_tac \"has_reply_cap t s\")\n apply (erule notE[rotated], strengthen reply_cap_doesnt_exist_strg)\n apply (simp add: st_tcb_def2)\n apply (erule exE)\n apply (drule caps_of_state_cteD)+\n apply (fastforce simp add:has_reply_cap_def is_reply_cap_to_def elim:cte_wp_at_lift\n intro: caps_of_state_cteD)\n apply clarsimp\n apply (frule mdb_Null_descendants[OF caps_of_state_cteD])\n apply (simp add: valid_mdb_def reply_mdb_def reply_masters_mdb_def)\n apply simp\n done\n\n\ncrunch irq_node[wp]: set_thread_state \"\\s. P (interrupt_irq_node s)\"\ncrunch irq_states[wp]: update_cdt \"\\s. P (interrupt_states s)\"\ncrunch ups[wp]: set_cdt \"\\s. P (ups_of_heap (kheap s))\"\ncrunch cns[wp]: set_cdt \"\\s. P (cns_of_heap (kheap s))\"\n\n\n(* FIXME: move *)\nlemma list_all2_zip_split:\n \"\\ list_all2 P as cs; list_all2 Q bs ds \\ \\\n list_all2 (\\x y. P (fst x) (fst y) \\ Q (snd x) (snd y))\n (zip as bs) (zip cs ds)\"\n apply (induct as arbitrary: bs cs ds)\n apply simp\n apply (case_tac cs; simp)\n apply (case_tac bs; simp)\n apply (case_tac ds; simp)\n done\n\n\ncrunch irq_states[wp]: update_cdt \"\\s. P (interrupt_states s)\"\n\ncrunch ups[wp]: set_cdt \"\\s. P (ups_of_heap (kheap s))\"\n\ncrunch cns[wp]: set_cdt \"\\s. P (cns_of_heap (kheap s))\"\n\n\nlemma set_cdt_tcb_valid[wp]:\n \"\\tcb_cap_valid cap ptr\\ set_cdt m \\\\rv. tcb_cap_valid cap ptr\\\"\n by (simp add: set_cdt_def, wp, simp add: tcb_cap_valid_def)\n\n\nlemma tcb_cap_valid_rvk[simp]:\n \"tcb_cap_valid cap ptr (is_original_cap_update f s)\n = tcb_cap_valid cap ptr s\"\n by (simp add: tcb_cap_valid_def)\n\n\nlemma tcb_cap_valid_more_update[simp]:\n \"tcb_cap_valid cap ptr (trans_state f s)\n = tcb_cap_valid cap ptr s\"\n by (simp add: tcb_cap_valid_def)\n\nlemma create_cap_wps[wp]:\n \"\\pspace_aligned\\ create_cap tp sz p dev (cref, oref) \\\\rv. pspace_aligned\\\"\n \"\\pspace_distinct\\ create_cap tp sz p dev (cref, oref) \\\\rv. pspace_distinct\\\"\n \"\\cte_wp_at P p' and K (p' \\ cref)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. cte_wp_at P p'\\\"\n \"\\valid_objs and valid_cap (default_cap tp oref sz dev)\n and real_cte_at cref\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_objs\\\"\n \"\\valid_cap cap\\ create_cap tp sz p dev (cref, oref) \\\\rv. valid_cap cap\\\"\n apply (safe intro!: hoare_gen_asm)\n apply (simp_all add: create_cap_def)\n apply (wp set_cap_cte_wp_at' set_cdt_cte_wp_at\n set_cap_valid_objs set_cdt_valid_objs\n set_cdt_valid_cap set_cap_valid_cap\n | simp split del: if_split\n add: real_cte_tcb_valid)+\n done\n\n\nlemma default_non_Null[simp]:\n \"cap.NullCap \\ default_cap tp oref sz dev\"\n by (cases tp, simp_all)\n\nlocale vo_abs = vmdb_abs +\n assumes valid_objs: \"valid_objs s\"\nbegin\nlemma cs_valid_cap:\n \"cs p = Some c \\ s \\ c\"\n using valid_objs\n apply (simp add: cs_def)\n apply (drule cte_wp_at_valid_objs_valid_cap [rotated, where P=\"(=) c\"])\n apply (simp add: cte_wp_at_caps_of_state)\n apply clarsimp\n done\n\n\nlemma cs_cap_aligned:\n \"cs p = Some c \\ cap_aligned c\"\n apply (drule cs_valid_cap)\n apply (simp add: valid_cap_def)\n done\nend\n\nlemma untyped_ranges_aligned_disjoing_or_subset:\n \"\\cap_aligned c1;cap_aligned c2\\ \\\n untyped_range c1 \\ untyped_range c2\n \\ untyped_range c2 \\ untyped_range c1\n \\ untyped_range c1 \\ untyped_range c2 = {}\"\n apply (simp add: cap_aligned_def)\n apply (elim conjE)\n apply (drule(1) aligned_ranges_subset_or_disjoint)\n apply (case_tac c1)\n apply simp_all\n apply (case_tac c2)\n apply simp_all\n done\n\n\nlocale mdb_create_cap = vo_abs + mdb_insert_abs +\n fixes cap\n assumes c_dest: \"cs dest = Some cap.NullCap\"\n assumes c_src: \"cs src = Some cap\"\n assumes ut: \"is_untyped_cap cap\"\nbegin\nlemmas no_dest_mdb [simp] = null_no_mdb [OF c_dest]\n\n\nlemma d_rangeD:\n \"\\descendants_range ac p s; m \\ p \\ p'\\ \\ \\c. cs p' = Some c \\ untyped_range c \\ untyped_range ac = {}\"\n apply (drule(1) descendants_rangeD[where s= s,folded m_def cs_def])\n apply clarsimp\n apply (drule disjoint_subset2[OF untyped_range_in_cap_range])\n apply (drule disjoint_subset[OF untyped_range_in_cap_range])\n apply simp\n done\n\n\nlemma subseteq_imp_not_subset: \"A \\ B \\ \\ B \\ A\" by fastforce\n\n\nlemma cap_bits_default_untyped_cap:\n \"is_untyped_cap (default_cap tp oref sz dev) \\\n cap_bits (default_cap tp oref sz dev) = sz\"\n by (case_tac tp,simp_all)\n\n\nlemma untyped_inc':\n assumes inc: \"untyped_inc m cs\"\n assumes d: \"descendants_range (default_cap tp oref sz dev) src s\"\n assumes r: \"untyped_range (default_cap tp oref sz dev) \\ untyped_range cap\"\n assumes al: \"cap_aligned (default_cap tp oref sz dev)\"\n assumes noint: \"untyped_range (default_cap tp oref sz dev) \\ usable_untyped_range cap = {}\"\n shows \"untyped_inc (m(dest \\ src)) (cs(dest \\ default_cap tp oref sz dev))\"\n using inc r c_src al ut noint\n unfolding untyped_inc_def descendants_of_def\n apply (intro allI impI)\n apply (rule conjI)\n apply (simp add: parency del: split_paired_All split: if_split_asm)\n apply (rule untyped_ranges_aligned_disjoing_or_subset[OF _ cs_cap_aligned])\n apply simp\n apply simp\n apply (rule untyped_ranges_aligned_disjoing_or_subset[OF cs_cap_aligned _ ])\n apply simp\n apply simp\n apply (case_tac \"p' = src\")\n apply (simp add: parency del: split_paired_All split: if_split_asm)\n apply (erule_tac x=src in allE)\n apply (erule_tac x=p in allE)\n apply (simp add: c_dest)\n apply (simp add: subseteq_imp_not_subset)\n apply (intro impI)\n apply (drule(1) usable_range_subseteq[OF cs_cap_aligned])\n apply simp\n apply (drule Int_absorb1)\n apply simp\n apply (simp add: c_dest)\n apply (erule_tac x = src in allE)\n apply (erule_tac x = p in allE)\n apply simp\n apply (elim conjE)\n apply (rule conjI)\n apply (intro impI)\n apply (elim disjE)\n apply (clarsimp+)[3]\n apply (erule subset_splitE)\n apply clarsimp\n apply (intro conjI impI)\n apply simp+\n apply (intro conjI impI,clarsimp+)[1]\n apply (intro conjI impI,clarsimp+)[1]\n apply (simp add: parency del: split_paired_All split: if_split_asm)\n apply (erule_tac x=src in allE)\n apply (erule_tac x=p' in allE)\n apply simp\n apply (elim conjE)\n apply (erule subset_splitE)\n apply (intro conjI)\n apply (intro impI)\n apply blast\n apply blast\n apply (intro conjI)\n apply (intro impI)\n apply (drule trancl_trans)\n apply fastforce\n apply simp\n apply (intro impI)\n apply (cut_tac p' = p' in d_rangeD[OF d])\n apply simp+\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])\n apply (drule(1) untyped_range_non_empty)\n apply (rule int_not_empty_subsetD)\n apply (simp add:Int_ac)\n apply simp\n apply simp\n apply simp\n apply (intro conjI)\n apply (intro impI)\n apply (erule disjE)\n apply (drule trancl_trans)\n apply fastforce\n apply simp\n apply (simp add: subseteq_imp_not_subset)\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])\n apply (drule(1) untyped_range_non_empty)\n apply (elim disjE)\n apply (cut_tac p' = p' in d_rangeD[OF d])\n apply clarsimp\n apply simp\n apply fastforce\n apply clarsimp\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])\n apply (drule(1) untyped_range_non_empty)\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply blast\n apply (erule_tac x = src in allE)\n apply (erule_tac x = p in allE)\n apply simp\n apply (elim conjE)\n apply (erule subset_splitE)\n apply simp\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply blast\n apply (intro conjI)\n apply (intro impI)\n apply (drule trancl_trans)\n apply fastforce\n apply simp\n apply clarsimp\n apply simp\n apply (elim conjE)\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (thin_tac \"P \\ Q = {}\" for P Q)+\n apply (intro impI)\n apply (drule d_rangeD[OF d])\n apply simp\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])+\n apply (drule(1) untyped_range_non_empty)+\n apply (intro conjI)\n apply (rule notI)\n apply (drule(1) disjoint_subset2[OF psubset_imp_subset,rotated])\n apply simp\n apply (rule notI)\n apply (drule(1) disjoint_subset[OF psubset_imp_subset,rotated])\n apply simp\n apply blast\n apply simp\n apply (intro conjI)\n apply (intro impI)\n apply (erule disjE)\n apply (drule trancl_trans)\n apply fastforce\n apply simp\n apply fastforce\n apply (clarsimp simp: subseteq_imp_not_subset)\n apply (drule(1) usable_range_subseteq[OF cs_cap_aligned] )\n apply blast\n apply (rule impI)\n apply simp\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])+\n apply (drule(1) untyped_range_non_empty)+\n apply (elim conjE | simp)+\n apply (drule d_rangeD[OF d])\n apply simp\n apply (intro conjI)\n apply (rule notI)\n apply (drule(1) disjoint_subset2[OF psubset_imp_subset,rotated])\n apply simp\n apply (rule notI)\n apply (drule(1) disjoint_subset[OF psubset_imp_subset,rotated])\n apply simp\n apply blast\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (drule disjoint_subset2)\n apply (simp (no_asm) add:Int_ac)\n apply (drule(1) untyped_range_non_empty[OF _ cs_cap_aligned])+\n apply (drule(1) untyped_range_non_empty)+\n apply blast\n apply (erule_tac x= src in allE)\n apply (erule_tac x = p' in allE)\n apply simp\n apply (intro impI conjI)\n apply simp+\n done\n\nend\n\nlemma default_cap_replies[simp]:\n \"\\ is_reply_cap (default_cap otype oref sz dev)\"\n \"\\ is_master_reply_cap (default_cap otype oref sz dev)\"\n by (cases otype, simp_all add: is_cap_simps)+\n\n\nlemma inter_non_emptyD:\n \"\\A \\ B; A \\ C \\ {}\\ \\ B \\ C \\ {}\"\n by blast\n\n\nlemma cap_class_default_cap:\n \"cap_class (default_cap tp oref sz dev) = PhysicalClass\"\n apply (case_tac tp)\n apply (simp_all add: default_cap_def physical_arch_cap_has_ref aobj_ref_default)\n done\n\n\nlemma untyped_incD2:\n \"\\cs p = Some c; is_untyped_cap c; cs p' = Some c'; is_untyped_cap c'; untyped_inc m cs\\\n \\ untyped_range c \\ untyped_range c' \\ {} \\ p \\ descendants_of p' m \\ untyped_range c \\ untyped_range c'\n \\ p' \\ descendants_of p m \\ untyped_range c'\\ untyped_range c\n \\ p = p'\"\n apply (drule(4) untyped_incD)\n apply (rule ccontr)\n apply (elim conjE subset_splitE)\n apply clarsimp+\n done\n\nlemma create_cap_mdb[wp]:\n \"\\valid_mdb\n and valid_objs\n and cte_wp_at (\\c. is_untyped_cap c \\\n obj_refs (default_cap tp oref sz dev) \\ untyped_range c \\\n untyped_range (default_cap tp oref sz dev) \\ untyped_range c\n \\ untyped_range (default_cap tp oref sz dev) \\ usable_untyped_range c = {}) p\n and descendants_range (default_cap tp oref sz dev) p\n and cte_wp_at ((=) cap.NullCap) cref\n and K (cap_aligned (default_cap tp oref sz dev))\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_mdb\\\"\n apply (simp add: valid_mdb_def2 create_cap_def set_cdt_def)\n apply (wp set_cap_caps_of_state2 | simp)+\n apply clarsimp\n apply (subgoal_tac \"mdb_insert_abs (cdt s) p cref\")\n prefer 2\n apply (rule mdb_insert_abs.intro)\n apply (clarsimp simp: cte_wp_at_def)\n apply (clarsimp simp: valid_mdb_def2\n elim!: mdb_Null_None mdb_Null_descendants)+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (fold fun_upd_def)\n apply (intro conjI)\n apply (rule mdb_cte_atI)\n apply (simp add: is_cap_simps split: if_split_asm)\n apply (drule(1) mdb_cte_atD,clarsimp)+\n apply (simp add: untyped_mdb_def descendants_of_def mdb_insert_abs.parency\n del: split_paired_All)\n apply (intro allI conjI impI)\n apply (clarsimp simp: is_cap_simps)\n apply (clarsimp simp: is_cap_simps)\n apply (erule_tac x=p in allE)\n apply (erule_tac x=ptr' in allE)\n apply (simp del: split_paired_All)\n apply (erule impE, blast)\n apply (erule (1) trancl_trans)\n apply (simp del: split_paired_All)\n apply (erule_tac x=p in allE)\n apply (erule_tac x=ptr' in allE)\n apply (simp del: split_paired_All)\n apply (erule impE, blast)\n apply (drule(1) descendants_rangeD)\n apply (simp del: split_paired_All add: cap_range_def)\n apply blast\n apply (drule_tac x=ptr in spec)\n apply (drule_tac x=cref in spec)\n apply (simp del: split_paired_All)\n apply (frule(1) inter_non_emptyD[rotated])\n apply (drule_tac c = cap and c' = capa in untyped_incD2)\n apply simp+\n apply (clarsimp simp add: descendants_of_def simp del: split_paired_All)\n apply (drule(1) descendants_rangeD)\n apply (clarsimp simp del: split_paired_All simp: cap_range_def)\n apply blast\n apply (erule(1) mdb_insert_abs.descendants_inc)\n apply simp\n apply (clarsimp simp: is_cap_simps cap_range_def cap_class_default_cap)\n apply (clarsimp simp: no_mloop_def)\n apply (frule_tac p = \"(a,b)\" and p'=\"(a,b)\" in mdb_insert_abs.parency)\n apply (simp split: if_split_asm)\n apply (erule disjE)\n apply (drule_tac m = \"cdt s\" in mdb_cte_at_Null_descendants)\n apply (clarsimp simp: untyped_mdb_def)\n apply (clarsimp simp: descendants_of_def simp del: split_paired_All)\n apply clarsimp\n apply (rule mdb_create_cap.untyped_inc')\n apply (rule mdb_create_cap.intro)\n apply (rule vo_abs.intro)\n apply (rule vmdb_abs.intro)\n apply (simp add: valid_mdb_def swp_def cte_wp_at_caps_of_state)\n apply (erule vo_abs_axioms.intro)\n apply assumption\n apply (erule (2) mdb_create_cap_axioms.intro)\n apply assumption+\n apply (simp add: ut_revocable_def del: split_paired_All)\n apply (simp add: irq_revocable_def del: split_paired_All)\n apply (simp add: reply_master_revocable_def del: split_paired_All)\n apply (simp add: reply_mdb_def)\n apply (subgoal_tac \"\\t m R. default_cap tp oref sz dev \\ cap.ReplyCap t m R\")\n apply (rule conjI)\n apply (fastforce simp: reply_caps_mdb_def descendants_of_def\n mdb_insert_abs.parency\n simp del: split_paired_All split_paired_Ex\n elim!: allEI exEI)\n apply (fastforce simp: reply_masters_mdb_def descendants_of_def\n mdb_insert_abs.parency\n simp del: split_paired_All split_paired_Ex\n elim!: allEI)\n apply (cases tp, simp_all)[1]\n apply (erule valid_arch_mdb_untypeds)\n done\n\nlemma create_cap_descendants_range[wp]:\n \"\\descendants_range c p and\n K (cap_range c \\ cap_range (default_cap tp oref sz dev) = {}) and\n cte_wp_at ((\\) cap.NullCap) p and\n cte_wp_at ((=) cap.NullCap) cref and\n valid_mdb\\\n create_cap tp sz p dev (cref,oref)\n \\\\rv. descendants_range c p\\\"\n apply (simp add: create_cap_def descendants_range_def cte_wp_at_caps_of_state set_cdt_def)\n apply (wp set_cap_caps_of_state2 | simp del: fun_upd_apply)+\n apply (clarsimp simp: cte_wp_at_caps_of_state swp_def valid_mdb_def simp del: fun_upd_apply)\n apply (subst (asm) mdb_insert_abs.descendants_child)\n apply (rule mdb_insert_abs.intro)\n apply clarsimp\n apply (erule (1) mdb_cte_at_Null_None)\n apply (erule (1) mdb_cte_at_Null_descendants)\n apply clarsimp\n apply (rule conjI, clarsimp)\n apply blast\n apply clarsimp\n done\n\n(* FIXME: Move to top *)\nlemma caps_overlap_reservedD:\n \"\\caps_overlap_reserved S s; caps_of_state s slot = Some cap;\n is_untyped_cap cap\\\n \\ usable_untyped_range cap \\ S = {}\"\n apply (simp add: caps_overlap_reserved_def)\n apply (erule ballE)\n apply (erule(1) impE)\n apply simp\n apply fastforce\n done\n\nlemma cap_range_inter_emptyD:\n \"cap_range a \\ cap_range b = {} \\ untyped_range a \\ untyped_range b = {}\"\n apply (drule disjoint_subset2[OF untyped_range_in_cap_range])\n apply (drule disjoint_subset[OF untyped_range_in_cap_range])\n apply simp\n done\n\nlemma create_cap_overlap_reserved [wp]:\n \"\\caps_overlap_reserved (untyped_range c) and\n K (cap_range c \\ cap_range (default_cap tp oref sz dev) = {}) and\n cte_wp_at ((\\) cap.NullCap) p and\n cte_wp_at ((=) cap.NullCap) cref and\n valid_mdb and K (cap_aligned (default_cap tp oref sz dev))\\\n create_cap tp sz p dev (cref,oref)\n \\\\rv s. caps_overlap_reserved (untyped_range c) s\\\"\n apply (simp add: create_cap_def caps_overlap_reserved_def cte_wp_at_caps_of_state set_cdt_def)\n apply (wp set_cap_caps_of_state2 | simp del: fun_upd_apply)+\n apply (clarsimp simp: ran_def split: if_splits)\n apply (case_tac \"cref = (a,b)\")\n apply simp\n apply (erule(1) disjoint_subset[OF usable_range_subseteq])\n apply (simp add:Int_ac cap_range_inter_emptyD)\n apply simp\n apply (erule(2) caps_overlap_reservedD)\n done\n\n\ncrunch typ_at[wp]: create_cap \"\\s. P (typ_at T p s)\"\n (simp: crunch_simps)\n\nlemmas create_cap_cap_table_at[wp] =\n cap_table_at_lift_valid [OF create_cap_typ_at]\n\nlemma retype_region_invs_extras:\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\\\\rv. pspace_aligned\\\"\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\\\\rv. valid_objs\\\"\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev \\\\rv. pspace_distinct\\\"\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev \\\\rv. valid_mdb\\\"\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\\\\rv. valid_global_objs\\\"\n \"\\invs and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz\n and caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api ty us - 1}\n and region_in_kernel_window {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\n and (\\s. \\slot. cte_wp_at (\\c. {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} \\ cap_range c \\ cap_is_device c = dev) slot s)\n and K (ty = CapTableObject \\ 0 < us)\n and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev \\\\rv. valid_arch_state\\\"\n apply (wp hoare_strengthen_post [OF retype_region_post_retype_invs],\n auto simp: post_retype_invs_def split: if_split_asm)+\n done\n\nlemma set_tuple_pick:\n \"\\P\\ f \\\\rv s. \\x \\ set (xs rv s). Q x rv s\\ \\\n \\P\\ f \\\\rv s. \\tup \\ set (zip (xs rv s) (ys rv s)). Q (fst tup) rv s\\\"\n \"\\P\\ f \\\\rv s. \\y \\ set (ys rv s). R y rv s\\ \\\n \\P\\ f \\\\rv s. \\tup \\ set (zip (xs rv s) (ys rv s)). R (snd tup) rv s\\\"\n apply (safe elim!: hoare_strengthen_post)\n apply (clarsimp simp: set_zip)+\n done\n\n\nlemma obj_at_foldr_intro:\n \"P obj \\ p \\ set xs \\ obj_at P p (s \\ kheap := foldr (\\p ps. ps (p \\ obj)) xs (kheap s) \\)\"\n by (clarsimp simp: obj_at_def foldr_upd_app_if)\n\n\ncontext Untyped_AI_arch begin\nlemma retype_ret_valid_caps:\n \"\\pspace_no_overlap_range_cover ptr sz\n and K (tp = Structures_A.CapTableObject \\ us > 0)\n and K (tp = Untyped \\ untyped_min_bits \\ us)\n and K (tp \\ ArchObject ASIDPoolObj)\n and K (range_cover ptr sz (obj_bits_api tp us) n \\ ptr \\ 0)\\\n retype_region ptr n us tp dev\\\\rv (s::'state_ext state). \\y\\set rv. s \\ default_cap tp y us dev\\\"\n apply (simp add: retype_region_def split del: if_split cong: if_cong)\n apply wp\n apply (simp only: trans_state_update[symmetric] more_update.valid_cap_update)\n apply wp\n apply (case_tac tp,simp_all)\n defer\n apply ((clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def ptr_add_def | rule conjI | intro conjI obj_at_foldr_intro imageI\n | rule is_aligned_add_multI[OF _ le_refl],\n (simp add:range_cover_def word_bits_def obj_bits_api_def)+)+)[3]\n apply (rule_tac ptr=ptr and sz=sz in retype_ret_valid_caps_captable; simp)\n apply (rule_tac ptr=ptr and sz=sz in retype_ret_valid_caps_aobj; simp)\n apply (clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def ptr_add_def | intro conjI obj_at_foldr_intro\n imageI\n | rule is_aligned_add_multI[OF _ le_refl]\n | fastforce simp:range_cover_def obj_bits_api_def\n word_bits_def a_type_def)+\n apply (clarsimp simp:valid_cap_def valid_untyped_def)\n apply (drule(1) pspace_no_overlap_obj_range)\n apply (frule range_cover_cell_subset)\n apply (erule of_nat_mono_maybe[rotated])\n apply (drule range_cover.range_cover_n_less)\n apply (simp add:word_bits_def)\n apply (simp add:obj_bits_api_def field_simps\n del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply blast\n apply (erule(2) range_cover_no_0)\n done\nend\n\n(* FIXME: move to Lib *)\nlemma set_zip_helper:\n \"t \\ set (zip xs ys) \\ fst t \\ set xs \\ snd t \\ set ys\"\n by (clarsimp simp add: set_zip)\n\n\nlemma ex_cte_cap_protects:\n \"\\ ex_cte_cap_wp_to P p s; cte_wp_at ((=) (cap.UntypedCap dev ptr bits idx)) p' s;\n descendants_range_in S p' s; untyped_children_in_mdb s; S\\ untyped_range (cap.UntypedCap dev ptr bits idx);\n valid_global_refs s \\\n \\ fst p \\ S\"\n apply (drule ex_cte_cap_to_obj_ref_disj, erule disjE)\n apply clarsimp\n apply (erule(1) untyped_children_in_mdbEE[where P=\"\\c. fst p \\ obj_refs c\" for c])\n apply simp\n apply assumption\n apply (rule notemptyI[where x=\"fst p\"])\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex)\n apply blast\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply (drule(2) descendants_range_inD)\n apply (clarsimp simp:cap_range_def)\n apply blast\n apply clarsimp\n apply (drule_tac irq=irq in valid_globals_irq_node, assumption)\n apply (clarsimp simp del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex)\n apply blast\n done\n\n\nlemma untyped_range_default_empty:\n \"tp \\ Untyped \\ untyped_range (default_cap tp sz us dev) = {}\"\n by (cases tp, auto)\n\n\nlemma obj_refs_default_cap:\n \"obj_refs (default_cap tp oref sz dev) \\ {oref}\"\n apply (cases tp, simp_all add: aobj_ref_default)\n done\n\n\nlemma obj_refs_default_nut:\n \"tp \\ Untyped \\ obj_refs (default_cap tp oref sz dev) = {oref}\"\n apply (cases tp, simp_all add: aobj_ref_default)\n done\n\n\nlemma range_cover_subset':\n \"\\range_cover ptr sz sbit n; n \\ 0\\\n \\ {ptr ..ptr + of_nat n * 2 ^ sbit - 1} \\ {ptr..(ptr && ~~ mask sz) + 2^ sz - 1}\"\n apply clarsimp\n apply (frule range_cover_cell_subset[OF _ of_nat_mono_maybe,where y1 = \"(n - 1)\"])\n apply (drule range_cover.range_cover_n_less)\n apply (simp add:word_bits_def)\n apply simp\n apply (clarsimp simp:range_cover_def)\n apply (erule impE)\n apply (clarsimp simp:p_assoc_help)\n apply (rule is_aligned_no_wrap'[OF is_aligned_add_multI[OF _ le_refl refl ]])\n apply (fastforce simp:range_cover_def)+\n apply (clarsimp)\n apply (subst (asm) add.assoc)\n apply (subst (asm) distrib_right[where b = \"1::'a::len word\",simplified,symmetric])\n apply simp\n done\n\ncontext Untyped_AI_arch begin\nlemma retype_region_ranges':\n \"\\K (range_cover ptr sz (obj_bits_api tp us) n)\\\n retype_region ptr n us tp dev\n \\\\rv s. \\y\\set rv. cap_range (default_cap tp y us dev) \\ {ptr..ptr + of_nat (n * 2 ^ (obj_bits_api tp us)) - 1}\\\"\n apply (simp add:valid_def)\n apply clarify\n apply (drule use_valid[OF _ retype_region_ret])\n apply simp\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (rule subsetD[OF subset_trans])\n apply (rule range_cover_subset,assumption)\n apply clarsimp\n apply assumption\n apply fastforce\n apply simp\n apply (case_tac tp)\n apply (simp_all add: cap_range_def obj_bits_api_def ptr_add_def)\n apply (subst add.commute, rule is_aligned_no_wrap'[OF aligned_add_aligned[OF _ _ le_refl]])\n apply (fastforce simp: range_cover_def)\n apply (simp_all add: word_bits_def is_aligned_mult_triv2[where n=tcb_bits, simplified])[2]\n apply (subst add.commute, rule is_aligned_no_wrap'[OF aligned_add_aligned[OF _ _ le_refl]])\n apply (fastforce simp: range_cover_def)\n apply (simp add: word_bits_def is_aligned_mult_triv2[where n=endpoint_bits, simplified])+\n apply (subst add.commute, rule is_aligned_no_wrap'[OF aligned_add_aligned[OF _ _ le_refl]])\n apply (fastforce simp: range_cover_def)\n apply (simp add: word_bits_def is_aligned_mult_triv2[where n=ntfn_bits, simplified])+\n apply (clarsimp simp: is_aligned_def)\n apply (simp add: p_assoc_help)\n apply (rule is_aligned_no_wrap'[OF aligned_add_aligned[OF _ _ le_refl]])\n apply (fastforce simp: range_cover_def)\n apply (rule is_aligned_mult_triv2)\n apply (simp add: range_cover_def)\n apply (simp add: p_assoc_help)\n apply (rule is_aligned_no_wrap'[OF is_aligned_add_multI[OF _ le_refl refl]])\n apply (simp add: range_cover_def)+\n done\n\nlemma retype_region_ranges:\n \"\\cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz\n \\ obj_ref_of c = ptr && ~~ mask sz) p and\n pspace_no_overlap_range_cover ptr sz and\n valid_pspace and K (range_cover ptr sz (obj_bits_api tp us) n)\n \\\n retype_region ptr n us tp dev\n \\\\rv s. \\y\\set rv. cte_wp_at\n (\\c. cap_range (default_cap tp y us dev) \\ untyped_range c )\n p s\\\"\n apply (clarsimp simp: cte_wp_at_caps_of_state valid_def)\n apply (frule_tac P1 = \"(=) cap\" in use_valid[OF _ retype_region_cte_at_other])\n apply simp\n apply (fastforce simp: cte_wp_at_caps_of_state)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule use_valid[OF _ retype_region_ranges'])\n apply (fastforce simp: cte_wp_at_caps_of_state)\n apply (drule(1) bspec)\n apply (drule(1) subsetD)\n apply (rule_tac A = \"{x..y}\" for x y in subsetD[rotated])\n apply assumption\n apply simp\n apply (erule subset_trans[OF range_cover_subset'])\n apply (frule use_valid[OF _ retype_region_ret])\n apply simp\n apply fastforce\n apply (clarsimp simp: is_cap_simps)\n apply (erule order_trans[OF word_and_le2])\n done\nend\n\nlemma map_snd_zip_prefix_help:\n \"map (\\tup. cap_range (default_cap tp (snd tup) us dev)) (zip xs ys) \\\n map (\\x. cap_range (default_cap tp x us dev)) ys\"\n apply (induct xs arbitrary: ys)\n apply simp\n apply (case_tac ys)\n apply auto\n done\n\ncontext Untyped_AI_arch begin\nlemma retype_region_distinct_sets:\n \"\\K (range_cover ptr sz (obj_bits_api tp us) n)\\\n retype_region ptr n us tp dev\n \\\\rv s. distinct_sets (map (\\tup. cap_range (default_cap tp (snd tup) us dev)) (zip xs rv))\\\"\n apply (simp add: distinct_sets_prop)\n apply (rule hoare_gen_asm[where P'=\"\\\", simplified])\n apply (rule hoare_strengthen_post [OF retype_region_ret])\n apply (rule distinct_prop_prefixE [rotated])\n apply (rule map_snd_zip_prefix_help [unfolded less_eq_list_def])\n apply (clarsimp simp: retype_addrs_def distinct_prop_map)\n apply (rule distinct_prop_distinct)\n apply simp\n apply (subgoal_tac \"of_nat y * (2::machine_word) ^ obj_bits_api tp us \\ of_nat x * 2 ^ obj_bits_api tp us\")\n apply (case_tac tp) defer\n apply (simp add:cap_range_def ptr_add_def)+\n apply (clarsimp simp: ptr_add_def word_unat_power[symmetric]\n shiftl_t2n[simplified mult.commute, symmetric])\n apply (erule(2) of_nat_shift_distinct_helper[where 'a=machine_word_len and n = \"obj_bits_api tp us\"])\n apply simp\n apply (simp add:range_cover_def)\n apply (erule range_cover.range_cover_n_le)\n apply (clarsimp simp: add_diff_eq[symmetric]\n simp del: Int_atLeastAtMost\n dest!: less_two_pow_divD)\n apply (simp add: obj_bits_api_def ptr_add_def shiftl_t2n[simplified mult.commute, symmetric] del: Int_atLeastAtMost)\n apply (rule aligned_neq_into_no_overlap)\n apply simp\n apply (simp_all add:range_cover_def shiftl_t2n mult.commute)\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (simp add:range_cover_def)+\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (simp add:range_cover_def)\n done\n\nend\n\ndeclare dmo_aligned [wp]\n\ncrunch pdistinct[wp]: do_machine_op \"pspace_distinct\"\n\ncrunch vmdb[wp]: do_machine_op \"valid_mdb\"\n\ncrunch mdb[wp]: do_machine_op \"\\s. P (cdt s)\"\ncrunch cte_wp_at[wp]: do_machine_op \"\\s. P (cte_wp_at P' p s)\"\n\nlemmas dmo_valid_cap[wp] = valid_cap_typ [OF do_machine_op_obj_at]\n\nlemma delete_objects_pspace_no_overlap[wp]:\n \"\\\\s. (\\dev idx. s \\ (cap.UntypedCap dev ptr bits idx))\n \\ pspace_aligned s \\ valid_objs s \\ (S = {ptr .. ptr + 2 ^ bits - 1})\\\n delete_objects ptr bits\n \\\\_. pspace_no_overlap S\\\"\n apply (unfold delete_objects_def)\n apply wp\n apply (simp add: do_machine_op_def split_def)\n apply wp\n apply (clarsimp simp: pspace_no_overlap_detype')\n done\n\nlemma retype_region_descendants_range:\n \"\\\\s. descendants_range x cref s\n \\ pspace_no_overlap_range_cover ptr sz s \\ valid_pspace s\n \\ range_cover ptr sz (obj_bits_api ty us) n\\ retype_region ptr n us ty dev\n \\\\rv s. descendants_range x cref s\\\"\n apply (simp add:descendants_range_def)\n apply (rule hoare_pre)\n apply (wps retype_region_mdb)\n apply (wp hoare_vcg_ball_lift retype_cte_wp_at)\n apply fastforce\n done\n\nlemma cap_range_def2:\n \"cap_range (default_cap ty ptr us dev) = (if ty = Untyped then {ptr..ptr + 2 ^ us - 1} else {ptr})\"\n apply (case_tac ty)\n by (simp_all add: cap_range_def)\n\nfind_theorems preemption_point\n\ncontext Untyped_AI_arch begin\nlemma retype_region_descendants_range_ret:\n \"\\\\s. (range_cover ptr sz (obj_bits_api ty us) n)\n \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_pspace s\n \\ range_cover ptr sz (obj_bits_api ty us) n\n \\ descendants_range_in {ptr..ptr + of_nat n * 2^(obj_bits_api ty us) - 1} cref s\n \\\n retype_region ptr n us ty dev\n \\\\rv (s::'state_ext state). \\y\\set rv. descendants_range (default_cap ty y us dev) cref s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: valid_def)\n apply (frule retype_region_ret[unfolded valid_def,simplified,THEN spec,THEN bspec])\n apply (clarsimp)\n apply (rename_tac x)\n apply (erule use_valid[OF _ retype_region_descendants_range])\n apply (intro conjI,simp_all)\n apply (clarsimp simp: descendants_range_def descendants_range_in_def)\n apply (drule(1) bspec)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (erule disjoint_subset2[rotated])\n apply (frule(1) range_cover_subset)\n apply simp\n apply (erule subset_trans[rotated])\n apply (subgoal_tac \"ptr + of_nat x * 2 ^ obj_bits_api ty us\n \\ ptr + of_nat x * 2 ^ obj_bits_api ty us + 2 ^ obj_bits_api ty us - 1\")\n prefer 2\n apply (rule is_aligned_no_overflow)\n apply (rule is_aligned_add_multI)\n apply (fastforce simp: range_cover_def)+\n apply (auto simp add: cap_range_def2 ptr_add_def obj_bits_api_def)\n done\nend\n\nlemma caps_overlap_reserved_def2:\n \"caps_overlap_reserved S =\n (\\s. (\\cap \\ ran (null_filter (caps_of_state s)).\n is_untyped_cap cap \\ usable_untyped_range cap \\ S = {}))\"\n apply (rule ext)\n apply (clarsimp simp: caps_overlap_reserved_def)\n apply (intro iffI ballI impI)\n apply (elim ballE impE)\n apply simp\n apply simp\n apply (simp add: ran_def null_filter_def split: if_split_asm option.splits)\n apply (elim ballE impE)\n apply simp\n apply simp\n apply (clarsimp simp: ran_def null_filter_def is_cap_simps\n simp del: split_paired_All split_paired_Ex split: if_splits)\n apply (drule_tac x = \"(a,b)\" in spec)\n apply simp\n done\n\nlemma set_cap_valid_mdb_simple:\n \"\\\\s. valid_objs s \\ valid_mdb s \\ descendants_range_in {ptr .. ptr+2^sz - 1} cref s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr \\ cap_is_device c = dev) cref s\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s'. valid_mdb s'\\\"\n apply (simp add: valid_mdb_def)\n apply (rule hoare_pre)\n apply (wp set_cap_mdb_cte_at)\n apply (wps set_cap_rvk_cdt_ct_ms)\n apply wp\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps\n reply_master_revocable_def irq_revocable_def reply_mdb_def)\n unfolding fun_upd_def[symmetric]\n apply clarsimp\n proof(intro conjI impI)\n fix s f r bits dev\n assume obj:\"valid_objs s\"\n assume mdb:\"untyped_mdb (cdt s) (caps_of_state s)\"\n assume cstate:\"caps_of_state s cref = Some (cap.UntypedCap dev r bits f)\" (is \"?m cref = Some ?srccap\")\n show \"untyped_mdb (cdt s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n apply (rule untyped_mdb_update_free_index\n [where capa = ?srccap and m = \"caps_of_state s\" and src = cref,\n unfolded free_index_update_def,simplified,THEN iffD2])\n apply (simp add: cstate mdb)+\n done\n assume inc: \"untyped_inc (cdt s) (caps_of_state s)\"\n assume drange: \"descendants_range_in {r..r + 2 ^ bits - 1} cref s\"\n have untyped_range_simp: \"untyped_range (cap.UntypedCap dev r bits f) = untyped_range (cap.UntypedCap dev r bits idx)\"\n by simp\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex\n\n show \"untyped_inc (cdt s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n using inc cstate drange\n apply (unfold untyped_inc_def)\n apply (intro allI impI)\n apply (drule_tac x = p in spec)\n apply (drule_tac x = p' in spec)\n apply (case_tac \"p = cref\")\n apply (simp)\n apply (case_tac \"p' = cref\")\n apply simp\n apply (simp add: untyped_range_simp)\n apply (intro conjI impI)\n apply (simp)\n apply (elim conjE)\n apply (thin_tac \"Q \\ P\" for P Q)+\n apply (frule(2) descendants_range_inD[rotated])\n apply (drule caps_of_state_valid_cap[OF _ obj])\n apply (drule sym)\n apply (rule disjoint_subset2[OF usable_range_subseteq])\n apply (simp add: valid_cap_def cap_aligned_def untyped_range.simps)+\n apply (elim disjE conjE)\n apply (frule(2) descendants_range_inD[rotated])\n apply (drule caps_of_state_valid_cap[OF _ obj])+\n apply (drule sym)\n apply (simp add: untyped_range.simps)\n apply (drule(1) untyped_range_non_empty[OF _ valid_cap_aligned])\n apply simp+\n apply (case_tac \"p' = cref\")\n apply simp\n apply (intro conjI)\n apply (elim conjE)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (simp add: untyped_range_simp)+\n apply (intro impI)\n apply (elim conjE | simp)+\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (frule(2) descendants_range_inD[rotated])\n apply (drule caps_of_state_valid_cap[OF _ obj])\n apply (drule sym)\n apply (rule disjoint_subset2[OF usable_range_subseteq])\n apply ((clarsimp simp: valid_cap_def cap_aligned_def untyped_range.simps)+)[3]\n apply (intro impI)\n apply (elim conjE subset_splitE | simp)+\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (clarsimp simp: untyped_range.simps)\n apply simp\n apply (elim conjE)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (clarsimp simp: untyped_range.simps)\n apply simp\n apply (erule disjE)\n apply (clarsimp simp: blah)\n apply (clarsimp simp: blah)\n apply (drule_tac t = c' in sym)\n apply (simp add: untyped_range.simps)\n apply (drule_tac t= c' in sym)\n apply (intro impI)\n apply (simp add: untyped_range.simps)\n apply (elim disjE conjE)\n apply simp\n apply (frule(2) descendants_range_inD[rotated])\n apply (drule caps_of_state_valid_cap[OF _ obj])+\n apply simp\n apply (drule(1) untyped_range_non_empty[OF _ valid_cap_aligned])\n apply simp+\n done\n assume \"ut_revocable (is_original_cap s) (caps_of_state s)\"\n thus \"ut_revocable (is_original_cap s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n using cstate\n by (fastforce simp: ut_revocable_def)\n assume \"valid_arch_mdb (is_original_cap s) (caps_of_state s)\"\n thus \"valid_arch_mdb (is_original_cap s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n using cstate\n by (fastforce elim!: valid_arch_mdb_untypeds)\n assume \"reply_caps_mdb (cdt s) (caps_of_state s)\"\n thus \"reply_caps_mdb (cdt s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n using cstate\n apply (simp add: reply_caps_mdb_def del: split_paired_All split_paired_Ex)\n apply (intro allI impI conjI)\n apply (drule spec)+\n apply (erule(1) impE)\n apply (erule exE)+\n apply (rule_tac x = ptr' in exI)\n apply clarsimp\n done\n assume \"reply_masters_mdb (cdt s) (caps_of_state s)\"\n thus \"reply_masters_mdb (cdt s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n apply (simp add: reply_masters_mdb_def del: split_paired_All split_paired_Ex)\n apply (intro allI impI ballI)\n apply (erule exE)\n apply (elim allE impE)\n apply simp\n using cstate\n apply fastforce\n done\n assume misc:\n \"mdb_cte_at (swp (cte_wp_at ((\\) cap.NullCap)) s) (cdt s)\"\n \"descendants_inc (cdt s) (caps_of_state s)\"\n \"caps_of_state s cref = Some (cap.UntypedCap dev r bits f)\"\n thus \"descendants_inc (cdt s) (caps_of_state s(cref \\ cap.UntypedCap dev r bits idx))\"\n apply -\n apply (erule descendants_inc_minor)\n apply (clarsimp simp: swp_def cte_wp_at_caps_of_state)\n apply (clarsimp simp: untyped_range.simps)\n done\n qed\n\n\n\nlemma set_free_index_valid_pspace_simple:\n \"\\\\s. valid_mdb s \\ valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ descendants_range_in {ptr .. ptr+2^sz - 1} cref s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr) cref s\n \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s'. valid_pspace s'\\\"\n apply (clarsimp simp: valid_pspace_def)\n apply (wp set_cap_valid_objs update_cap_iflive set_cap_zombies')\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps)+\n apply (frule(1) caps_of_state_valid_cap)\n apply (clarsimp simp: valid_cap_def cap_aligned_def )\n apply (intro conjI)\n apply (simp add: valid_untyped_def)\n apply (intro impI allI)\n apply (elim allE allE impE)\n apply simp+\n apply (drule(1) pspace_no_overlap_obj_range)\n apply (simp add: is_aligned_neg_mask_eq field_simps)\n apply (clarsimp simp add: pred_tcb_at_def tcb_cap_valid_def obj_at_def is_tcb\n valid_ipc_buffer_cap_def split: option.split)\n apply (drule(2) tcb_cap_slot_regular)\n apply (clarsimp simp: tcb_cap_cases_def is_cap_simps split: if_splits)\n apply (fastforce simp: is_nondevice_page_cap_simps)\n apply (clarsimp split: thread_state.splits simp: is_reply_cap_def)\n done\n\nlemma set_untyped_cap_refs_respects_device_simple:\n \"\\K (is_untyped_cap cap) and cte_wp_at ((=) cap) cref and cap_refs_respects_device_region \\ set_cap (UntypedCap (cap_is_device cap) (obj_ref_of cap) (cap_bits cap) idx) cref\n \\\\rv s. cap_refs_respects_device_region s\\\"\n apply (wp set_cap_cap_refs_respects_device_region)\n apply (clarsimp simp del: split_paired_Ex)\n apply (rule_tac x = cref in exI)\n apply (erule cte_wp_at_weakenE)\n apply (case_tac cap,auto)\n done\n\nlemma set_untyped_cap_caps_overlap_reserved:\n \"\\\\s. invs s \\ S \\ {ptr..ptr + 2 ^ sz - 1} \\\n usable_untyped_range (cap.UntypedCap dev ptr sz idx') \\ S = {} \\\n descendants_range_in S cref s \\ cte_wp_at ((=) (cap.UntypedCap dev ptr sz idx)) cref s\\\n set_cap (cap.UntypedCap dev ptr sz idx') cref\n \\\\rv s. caps_overlap_reserved S s\\\"\n apply (unfold caps_overlap_reserved_def)\n apply wp\n apply (clarsimp simp: cte_wp_at_caps_of_state caps_overlap_reserved_def\n simp del: usable_untyped_range.simps split: if_split_asm)\n apply (frule invs_mdb)\n apply (erule ranE)\n apply (simp split: if_split_asm del: usable_untyped_range.simps add: valid_mdb_def)\n apply (drule untyped_incD)\n apply ((simp add: is_cap_simps)+)[4]\n apply clarify\n apply (erule subset_splitE)\n apply (simp del: usable_untyped_range.simps)\n apply (thin_tac \"P \\ Q\" for P Q)+\n apply (elim conjE)\n apply blast\n apply (simp del: usable_untyped_range.simps)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (elim conjE)\n apply (drule(2) descendants_range_inD)\n apply simp\n apply (drule_tac B = S in disjoint_subset[rotated,OF _ usable_range_subseteq])\n apply (rule valid_cap_aligned)\n apply (erule(1) caps_of_state_valid)\n apply simp+\n apply (elim disjE)\n apply clarsimp\n apply (drule(2) descendants_range_inD)\n apply simp\n apply (drule_tac B=S in disjoint_subset[rotated,OF _ usable_range_subseteq])\n apply (rule valid_cap_aligned)\n apply (erule(1) caps_of_state_valid)\n apply simp+\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (rule disjoint_subset[OF usable_range_subseteq])\n apply (rule valid_cap_aligned)\n apply (erule(1) caps_of_state_valid)\n apply simp+\n apply blast\n done\n\n\nlemma set_cap_caps_no_overlap:\n \"\\cte_wp_at (\\c. untyped_range c = untyped_range cap) cref and caps_no_overlap ptr sz\\ set_cap cap cref\n \\\\r s. caps_no_overlap ptr sz s\\\"\n apply (simp add: caps_no_overlap_def)\n apply wp\n apply (clarsimp simp: cte_wp_at_caps_of_state caps_no_overlap_def\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff )\n apply (erule ranE)\n apply (simp split: if_splits\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff )\n apply (drule bspec)\n apply fastforce\n apply (clarsimp simp\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff )\n apply (erule(1) set_mp)\n apply (drule_tac x = capa in bspec)\n apply fastforce\n apply (clarsimp simp\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff )\n apply (erule(1) set_mp)\n done\n\n\nlemma caps_overlap_reserved_detype:\n \"caps_overlap_reserved S s \\ caps_overlap_reserved S (detype H s)\"\n apply (clarsimp simp: caps_of_state_detype caps_overlap_reserved_def )\n apply (erule ranE)\n apply (clarsimp split: if_splits)\n apply (drule bspec)\n apply fastforce\n apply simp\n done\n\n\nlemma caps_no_overlap_detype:\n \"caps_no_overlap ptr sz s \\ caps_no_overlap ptr sz (detype H s)\"\n apply (clarsimp simp: caps_of_state_detype caps_no_overlap_def)\n apply (erule ranE)\n apply (clarsimp split: if_splits)\n apply (drule bspec,fastforce)\n apply clarsimp\n apply (erule subsetD)\n apply simp\n done\n\n\nlemma not_inD:\"\\x \\ A; y \\ A\\ \\x \\ y\"\n by clarsimp\n\n\nlemma caps_of_state_no_overlapD:\n \"\\caps_of_state s slot = Some cap; valid_objs s; pspace_aligned s;\n pspace_no_overlap S s\\\n \\ (fst slot) \\ S\"\n apply (drule caps_of_state_cteD)\n apply (clarsimp simp: cte_wp_at_cases obj_at_def\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff\n atLeastLessThan_iff Int_atLeastAtMost)\n apply (elim disjE)\n apply clarify\n apply (frule(2) p_in_obj_range)\n apply (erule(1) pspace_no_overlapE)\n apply (drule(1) IntI)\n unfolding obj_range_def\n apply (drule notemptyI)+\n apply (simp add: Int_ac p_assoc_help\n del: atLeastAtMost_iff atLeastatMost_subset_iff\n atLeastLessThan_iff Int_atLeastAtMost)\n apply clarify\n apply (frule(2) p_in_obj_range)\n apply (erule(1) pspace_no_overlapE)\n apply (drule(1) IntI)\n unfolding obj_range_def\n apply (drule notemptyI)+\n apply (simp add: Int_ac p_assoc_help add.commute\n del: atLeastAtMost_iff atLeastatMost_subset_iff\n atLeastLessThan_iff Int_atLeastAtMost)\n done\n\n\nlemma op_equal: \"(\\x. x = c) = ((=) c)\" by (rule ext) auto\n\nlemma descendants_range_in_subseteq:\n \"\\descendants_range_in A p ms ;B\\ A\\ \\ descendants_range_in B p ms\"\n by (auto simp: descendants_range_in_def cte_wp_at_caps_of_state dest!: bspec)\n\n\nlemma cte_wp_at_pspace_no_overlapI:\n \"\\invs s;\n cte_wp_at (\\c. c = cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz); sz < word_bits\\\n \\ pspace_no_overlap_range_cover ptr sz s\"\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule caps_of_state_valid_cap)\n apply (simp add: invs_valid_objs)\n apply (clarsimp simp: valid_cap_def valid_untyped_def)\n apply (unfold pspace_no_overlap_def)\n apply (intro allI impI)\n apply (drule spec)+\n apply (erule(1) impE)\n apply (simp only: obj_range_def[symmetric] p_assoc_help[symmetric])\n apply (frule(1) le_mask_le_2p)\n apply (rule ccontr)\n apply (erule impE)\n apply (rule ccontr)\n apply simp\n apply (drule disjoint_subset2[rotated,\n where B'=\"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply clarsimp\n apply (rule word_and_le2)\n apply simp\n apply clarsimp\n apply (drule_tac A'=\"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n in disjoint_subset[rotated])\n apply clarsimp\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n apply blast\n done\n\n\nlemma descendants_range_caps_no_overlapI:\n \"\\invs s; cte_wp_at ((=) (cap.UntypedCap dev (ptr && ~~ mask sz) sz idx)) cref s;\n descendants_range_in {ptr .. (ptr && ~~ mask sz) +2^sz - 1} cref s\\ \\ caps_no_overlap ptr sz s\"\n apply (frule invs_mdb)\n apply (clarsimp simp: valid_mdb_def cte_wp_at_caps_of_state)\n apply (unfold caps_no_overlap_def)\n apply (intro ballI impI)\n apply (erule ranE)\n apply (subgoal_tac \"is_untyped_cap cap\")\n prefer 2\n apply (rule untyped_range_is_untyped_cap)\n apply blast\n apply (drule untyped_incD)\n apply simp+\n apply (elim conjE)\n apply (erule subset_splitE)\n apply (erule subset_trans[OF _ psubset_imp_subset,rotated])\n apply (clarsimp simp: word_and_le2)\n apply simp\n apply (elim conjE)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule(2) descendants_range_inD)\n apply simp\n apply simp\n apply (erule subset_trans[OF _ equalityD1,rotated])\n apply (clarsimp simp: word_and_le2)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule disjoint_subset[rotated,\n where A' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply (clarsimp simp: word_and_le2 Int_ac)+\n done\n\n\nlemma shiftr_then_mask_commute:\n \"(x >> n) && mask m = (x && mask (m + n)) >> n\"\n using test_bit_size[where w=x]\n by (auto intro: word_eqI simp add: word_size nth_shiftr)\n\n\nlemma cte_wp_at_caps_no_overlapI:\n \"\\ invs s;cte_wp_at (\\c. c = cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) cref s;\n idx \\ unat (ptr && mask sz);sz < word_bits \\ \\ caps_no_overlap ptr sz s\"\n apply (frule invs_mdb)\n apply (frule(1) le_mask_le_2p)\n apply (clarsimp simp: valid_mdb_def cte_wp_at_caps_of_state)\n apply (frule caps_of_state_valid_cap)\n apply (simp add: invs_valid_objs)\n apply (unfold caps_no_overlap_def)\n apply (intro ballI impI)\n apply (erule ranE)\n apply (subgoal_tac \"is_untyped_cap cap\")\n prefer 2\n apply (rule untyped_range_is_untyped_cap)\n apply blast\n apply (drule untyped_incD)\n apply simp+\n apply (elim conjE)\n apply (erule subset_splitE)\n apply (erule subset_trans[OF _ psubset_imp_subset,rotated])\n apply (clarsimp simp: word_and_le2)\n apply simp\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (elim conjE)\n apply (drule disjoint_subset2[rotated,\n where B' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply clarsimp\n apply (rule le_plus'[OF word_and_le2])\n apply simp\n apply (erule word_of_nat_le)\n apply simp\n apply simp\n apply (erule subset_trans[OF _ equalityD1,rotated])\n apply (clarsimp simp: word_and_le2)\n apply (thin_tac \"P\\Q\" for P Q)+\n apply (drule disjoint_subset[rotated,\n where A' = \"{ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"])\n apply (clarsimp simp: word_and_le2 Int_ac)+\n done\n\n\nlemma add_minus_neg_mask:\n \"ptr + a - (ptr && ~~ mask sz) = (ptr && mask sz) + a\"\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr])\n apply simp\n done\n\n\nlemma range_cover_idx_compare:\n \"\\range_cover ptr sz sbit n;\n unat ((ptr && mask sz) + of_nat n * 2 ^ sbit) < 2 ^ sz;\n ptr \\ ptr && ~~ mask sz; idx \\ 2 ^ sz; idx \\ unat (ptr && mask sz)\\\n \\ (ptr && ~~ mask sz) + of_nat idx \\ ptr + (of_nat n << sbit)\"\n apply (subst not_less[symmetric])\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr])\n apply (subst add.commute)\n apply (simp add: not_less)\n apply (subst add.assoc)\n apply (rule word_add_le_mono2)\n apply (rule order_trans[OF word_of_nat_le])\n apply simp\n apply (erule range_cover.range_cover_base_le)\n apply (subst unat_plus_simple[THEN iffD1])\n apply (erule range_cover.range_cover_base_le)\n apply (subst unat_add_lem[THEN iffD1,symmetric])\n apply (frule range_cover.unat_of_nat_shift[OF _ le_refl le_refl])\n apply (simp add: shiftl_t2n field_simps del: add.commute add.assoc)\n apply (rule le_less_trans)\n apply (subst add.commute)\n apply (erule range_cover.range_cover_compare_bound)\n apply (simp add: range_cover_def)\n apply (rule less_diff_conv[THEN iffD1])\n apply (rule less_le_trans)\n apply (simp add: shiftl_t2n field_simps)\n apply (subst le_diff_conv2)\n apply (rule less_imp_le[OF unat_lt2p])\n apply (subst add.commute)\n apply (subst unat_power_lower[where 'a='a, symmetric])\n apply (simp add: range_cover_def)\n apply (rule is_aligned_no_wrap_le[OF is_aligned_neg_mask[OF le_refl]])\n apply (simp add: range_cover_def)+\n done\n\n\nlocale invoke_untyped_proofs =\n fixes s cref reset ptr_base ptr tp us slots ptr' sz idx dev\n assumes vui: \"valid_untyped_inv_wcap (Retype cref reset ptr_base ptr tp us slots dev)\n (Some (UntypedCap dev (ptr && ~~ mask sz) sz idx)) s\"\n and misc: \"ct_active s\" \"invs s\"\n notes blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex\nbegin\n\nabbreviation(input)\n \"retype_range == {ptr..ptr + of_nat (length slots) * 2 ^ (obj_bits_api tp us) - 1}\"\n\nabbreviation(input)\n \"usable_range == {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n\nlemma not_0_ptr[simp]: \"ptr\\ 0\"\n using misc vui\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid)\n apply (clarsimp simp: valid_cap_def)\n done\n\nlemma cover: \"range_cover ptr sz (obj_bits_api tp us) (length slots)\"\n using vui\n by (clarsimp simp:cte_wp_at_caps_of_state)\n\nlemma misc2:\n \"distinct slots\"\n \"slots \\ []\"\n using vui\n by (auto simp:cte_wp_at_caps_of_state)\n\nlemma subset_stuff[simp]:\n \"retype_range \\ usable_range\"\n apply (rule range_cover_subset'[OF cover])\n apply (simp add:misc2)\n done\n\nlemma cte_wp_at:\n \"cte_wp_at ((=) (cap.UntypedCap dev (ptr && ~~ mask sz) sz idx)) cref s\"\n using vui\n by (clarsimp simp: cte_wp_at_caps_of_state)\n\n\nlemma idx_cases:\n \"(idx \\ unat (ptr - (ptr && ~~ mask sz)) \\ reset \\ ptr = ptr && ~~ mask sz)\"\n using vui\n by (clarsimp simp: cte_wp_at_caps_of_state)\n\nlemma desc_range:\n \"reset \\ descendants_range_in S cref s\"\n using vui\n by (clarsimp simp: empty_descendants_range_in)\n\nlemma descendants_range[simp]:\n \"descendants_range_in usable_range cref s\"\n \"descendants_range_in retype_range cref s\"\nproof -\n have \"descendants_range_in usable_range cref s\"\n using misc idx_cases cte_wp_at cover\n apply -\n apply (erule disjE)\n apply (erule cte_wp_at_caps_descendants_range_inI[OF _ _ _ range_cover.sz(1)\n [where 'a=machine_word_len, folded word_bits_def]])\n apply (simp add:cte_wp_at_caps_of_state desc_range)+\n done\n thus \"descendants_range_in usable_range cref s\"\n by simp\n thus \"descendants_range_in retype_range cref s\"\n by (rule descendants_range_in_subseteq[OF _ subset_stuff])\nqed\n\nlemma vc[simp] : \"s \\cap.UntypedCap dev (ptr && ~~ mask sz) sz idx\"\n using misc cte_wp_at\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (erule caps_of_state_valid)\n apply simp\n done\n\nlemma ps_no_overlap[simp]: \"\\ reset \\ pspace_no_overlap_range_cover ptr sz s\"\n using misc cte_wp_at cover idx_cases\n apply clarsimp\n apply (erule cte_wp_at_pspace_no_overlapI[OF _ _ _\n range_cover.sz(1)[where 'a=machine_word_len, folded word_bits_def]])\n apply (simp add: cte_wp_at_caps_of_state)\n apply simp+\n done\n\nlemma caps_no_overlap[simp]: \"caps_no_overlap ptr sz s\"\n using cte_wp_at misc cover idx_cases\n apply -\n apply (erule disjE)\n apply (erule cte_wp_at_caps_no_overlapI[OF _ _ _ range_cover.sz(1)\n [where 'a=machine_word_len, folded word_bits_def]])\n apply (simp add:cte_wp_at_caps_of_state)+\n apply (erule descendants_range_caps_no_overlapI)\n apply (simp add:cte_wp_at_caps_of_state desc_range)+\n done\n\nlemma idx_compare'[simp]:\"unat ((ptr && mask sz) + (of_nat (length slots)<< (obj_bits_api tp us))) \\ 2 ^ sz\"\n apply (rule le_trans[OF unat_plus_gt])\n apply (simp add:range_cover.unat_of_nat_n_shift[OF cover] range_cover_unat)\n apply (insert range_cover.range_cover_compare_bound[OF cover])\n apply simp\n done\n\nlemma ex_cte_no_overlap:\n \"\\P slot. ex_cte_cap_wp_to P slot s \\ fst slot \\ usable_range\"\n using cte_wp_at\n apply clarsimp\n apply (drule ex_cte_cap_to_obj_ref_disj,erule disjE)\n using misc\n apply clarsimp\n apply (rule_tac ptr' = \"(aa,b)\" in untyped_children_in_mdbEE[OF invs_untyped_children])\n apply simp+\n apply (clarsimp simp:untyped_range.simps)\n apply (drule_tac B'=\"usable_range\" in disjoint_subset2[rotated])\n apply (clarsimp simp:blah word_and_le2)\n apply blast\n apply (drule descendants_range_inD[OF descendants_range(1)])\n apply (simp add:cte_wp_at_caps_of_state)+\n apply (clarsimp simp:cap_range_def)\n apply blast\n apply clarsimp\n apply (drule_tac irq = irq in valid_globals_irq_node[rotated])\n using misc\n apply (clarsimp simp: invs_def valid_state_def )\n apply (clarsimp simp:untyped_range.simps)\n apply (drule_tac B = \"{ptr && ~~ mask sz..(ptr && ~~ mask sz) + 2 ^ sz - 1}\" in subsetD[rotated])\n apply (clarsimp simp:blah word_and_le2)\n apply simp\n done\n\nlemma cref_inv: \"fst cref \\ usable_range\"\n apply (insert misc cte_wp_at)\n apply (drule if_unsafe_then_capD)\n apply (simp add:invs_def valid_state_def)\n apply clarsimp\n apply (drule ex_cte_no_overlap)\n apply simp\n done\n\nlemma slots_invD: \"\\x. x \\ set slots \\\n x \\ cref \\ fst x \\ usable_range \\ ex_cte_cap_wp_to (\\_. True) x s\"\n using misc cte_wp_at vui\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) bspec)+\n apply clarsimp\n apply (frule ex_cte_no_overlap)\n apply (auto elim: ex_cte_cap_wp_to_weakenE)\n done\n\nlemma usable_range_disjoint:\n \"usable_untyped_range (cap.UntypedCap dev (ptr && ~~ mask sz) sz\n (unat ((ptr && mask sz) + of_nat (length slots) * 2 ^ obj_bits_api tp us))) \\\n {ptr..ptr + of_nat (length slots) * 2 ^ obj_bits_api tp us - 1} = {}\"\n proof -\n have idx_compare''[simp]:\n \"unat ((ptr && mask sz) + (of_nat (length slots) * (2::machine_word) ^ obj_bits_api tp us)) < 2 ^ sz\n \\ ptr + of_nat (length slots) * 2 ^ obj_bits_api tp us - 1\n < ptr + of_nat (length slots) * 2 ^ obj_bits_api tp us\"\n apply (rule word_leq_le_minus_one,simp)\n apply (rule neq_0_no_wrap)\n apply (rule machine_word_plus_mono_right_split)\n apply (simp add:shiftl_t2n range_cover_unat[OF cover] field_simps)\n apply (simp add:range_cover.sz[where 'a=machine_word_len, folded word_bits_def, OF cover])+\n done\n show ?thesis\n apply (clarsimp simp:mask_out_sub_mask blah)\n apply (drule idx_compare'')\n apply (simp add:not_le[symmetric])\n done\nqed\n\nlemma detype_locale:\"ptr && ~~ mask sz = ptr\n \\ detype_locale (cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) cref s\"\n using cte_wp_at descendants_range misc\n by (simp add:detype_locale_def descendants_range_def2 blah invs_untyped_children)\n\nlemma detype_descendants_range_in:\n \"ptr && ~~ mask sz = ptr \\ descendants_range_in usable_range cref (detype usable_range s)\"\n using misc cte_wp_at\n apply -\n apply (frule detype_invariants)\n apply (simp)\n using descendants_range\n apply (clarsimp simp: blah descendants_range_def2)\n apply (simp add: invs_untyped_children blah\n invs_valid_reply_caps invs_valid_reply_masters)+\n apply (subst valid_mdb_descendants_range_in)\n apply (clarsimp dest!:invs_mdb simp:detype_clear_um_independent)\n apply (frule detype_locale)\n apply (drule detype_locale.non_filter_detype[symmetric])\n apply (simp add:blah)\n using descendants_range(1)\n apply -\n apply (subst (asm)valid_mdb_descendants_range_in)\n apply (simp add:invs_mdb)\n apply simp\n done\n\nlemma detype_invs:\n \"ptr && ~~ mask sz = ptr \\ invs (detype usable_range (clear_um usable_range s))\"\n apply (insert misc cte_wp_at descendants_range)\n apply clarsimp\n apply (frule detype_invariants, simp_all)\n apply (clarsimp simp:blah descendants_range_def2)\n apply ((simp add: invs_untyped_children blah\n invs_valid_reply_caps invs_valid_reply_masters)+)\n done\n\nlemmas simps\n = caps_no_overlap descendants_range\n slots_invD cref_inv ps_no_overlap subset_stuff\n\nlemma szw: \"sz < word_bits\"\n using cte_wp_at_valid_objs_valid_cap[OF cte_wp_at] misc\n by (clarsimp simp: valid_cap_def cap_aligned_def invs_valid_objs)\n\nlemma idx_le_new_offs:\n \"\\ reset\n \\ idx \\ unat ((ptr && mask sz) + (of_nat (length slots) << obj_bits_api tp us))\"\n using misc idx_cases range_cover.range_cover_base_le[OF cover]\n apply (simp only: simp_thms)\n apply (erule order_trans)\n apply (simp add: word_le_nat_alt[symmetric])\n done\n\nend\n\nlemmas aligned_after_mask =\n is_aligned_andI1[where x=ptr and n=a and y=\"mask sz\" for ptr sz a]\n\nlemma detype_clear_um_simps[simp]:\n \"caps_no_overlap ptr sz (clear_um H s)\n = caps_no_overlap ptr sz s\"\n \"pspace_no_overlap S (clear_um H s)\n = pspace_no_overlap S s\"\n \"descendants_range_in S p (clear_um H s)\n = descendants_range_in S p s\"\n apply (clarsimp simp: caps_no_overlap_def pspace_no_overlap_def\n clear_um.pspace descendants_range_in_def\n cong: if_cong)+\n apply (simp add: clear_um_def)\n done\n\ncrunch pred_tcb_at[wp]: create_cap \"pred_tcb_at proj P t\"\n (simp: crunch_simps)\n\ncrunch tcb[wp]: create_cap \"tcb_at t\"\n (simp: crunch_simps)\n\n\nlemma valid_untyped_cap_inc:\n \"\\s \\ cap.UntypedCap dev (ptr&&~~ mask sz) sz idx;\n idx \\ unat (ptr && mask sz); range_cover ptr sz sb n\\\n \\ s \\ cap.UntypedCap dev (ptr && ~~ mask sz) sz\n (unat ((ptr && mask sz) + of_nat n * 2 ^ sb))\"\n apply (clarsimp simp: valid_cap_def cap_aligned_def valid_untyped_def simp del: usable_untyped_range.simps)\n apply (intro conjI allI impI)\n apply (elim allE conjE impE)\n apply simp\n apply simp\n apply (erule disjoint_subset[rotated])\n apply (frule(1) le_mask_le_2p[OF _\n range_cover.sz(1)[where 'a=machine_word_len, folded word_bits_def]])\n apply clarsimp\n apply (rule word_plus_mono_right)\n apply (rule word_of_nat_le)\n apply (simp add: unat_of_nat_eq[where 'a=machine_word_len] range_cover_unat field_simps)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask[OF le_refl]])\n apply (simp add: word_less_nat_alt\n unat_power_lower[where 'a=machine_word_len, folded word_bits_def])\n apply (simp add: range_cover_unat range_cover.unat_of_nat_shift shiftl_t2n field_simps)\n apply (subst add.commute)\n apply (simp add: range_cover.range_cover_compare_bound)\n done\n\n(* FIXME: move maybe *)\nlemma tcb_cap_valid_untyped_cong:\n \"tcb_cap_valid (cap.UntypedCap dev1 a1 b1 c) =\n tcb_cap_valid (cap.UntypedCap dev2 a2 b2 c2)\"\n apply (rule ext)+\n apply (clarsimp simp:tcb_cap_valid_def valid_ipc_buffer_cap_def split:option.splits)\n apply (simp add: tcb_cap_cases_def\n is_arch_cap_def is_nondevice_page_cap_simps is_cap_simps\n split: thread_state.split)\n done\n\nlemma tcb_cap_valid_untyped_to_thread:\n \"tcb_cap_valid (cap.UntypedCap dev a1 b1 c) =\n tcb_cap_valid (cap.ThreadCap 0)\"\n apply (rule ext)+\n apply (clarsimp simp:tcb_cap_valid_def valid_ipc_buffer_cap_def split:option.splits)\n apply (simp add: tcb_cap_cases_def is_cap_simps\n is_arch_cap_def is_nondevice_page_cap_simps\n split: thread_state.split)\n done\n\n(* FIXME: move *)\nlemma ex_nonz_cap_to_overlap:\n \"\\ex_nonz_cap_to t s; cte_wp_at ((=) cap) p s; is_untyped_cap cap; invs s;\n descendants_range cap p s \\\n \\ \\ t \\ untyped_range cap\"\n apply (rule ccontr)\n apply (clarsimp simp: ex_nonz_cap_to_def descendants_range_def2\n cte_wp_at_caps_of_state caps_no_overlap_def zobj_refs_to_obj_refs)\n apply (frule invs_mdb)\n apply (clarsimp simp: valid_mdb_def)\n apply (frule_tac cap' = capa in untyped_mdbD)\n apply simp+\n apply blast\n apply simp\n apply (drule(2) descendants_range_inD)\n apply (simp add: cap_range_def)\n apply blast\n done\n\n\nlemma detype_valid_untyped:\n \"\\invs s; detype S s \\ cap.UntypedCap dev ptr sz idx1;\n {ptr .. ptr + 2 ^ sz - 1} \\ S; idx2 \\ 2 ^ sz\\\n \\ detype S s \\ cap.UntypedCap dev ptr sz idx2\"\n apply (clarsimp simp: detype_def valid_cap_def valid_untyped_def cap_aligned_def)\n apply (drule_tac x = p in spec)\n apply clarsimp\n apply (drule p_in_obj_range)\n apply (simp add: invs_psp_aligned invs_valid_objs)+\n apply (drule(1) subset_trans[rotated])\n apply blast\n done\n\nlemma do_machine_op_pspace_no_overlap[wp]:\n \"\\pspace_no_overlap S\\ do_machine_op f \\\\r. pspace_no_overlap S\\\"\n apply (clarsimp simp: pspace_no_overlap_def do_machine_op_def)\n apply (wp hoare_vcg_all_lift)\n apply (simp add: split_def)\n apply wp+\n apply clarsimp\n done\n\nlemma mapME_append:\n \"mapME f (xs @ ys) = doE\n xs_r \\ mapME f xs;\n ys_r \\ mapME f ys;\n returnOk (xs_r @ ys_r)\n odE\"\n by (induct xs, simp_all add: mapME_Nil mapME_Cons bindE_assoc)\nlemma mapME_validE_nth_induct:\n \"\\ \\i ys. i < length xs \\ \\P i ys\\ f (zs ! i) \\\\y. P (Suc i) (y # ys)\\, \\E\\;\n \\i. i < length xs \\ zs ! i = xs ! i \\\n \\ \\P 0 []\\ mapME f xs \\\\ys. P (length xs) (rev ys)\\, \\E\\\"\nproof (induct xs rule: rev_induct)\n case Nil\n show ?case\n by (wp | simp add: mapME_Nil)+\nnext\n case (snoc x xs)\n from snoc.prems have x: \"x = zs ! length xs\"\n by simp\n from snoc.prems have zs: \"\\i. i < length xs \\ xs ! i = zs ! i\"\n by (metis length_append_singleton less_SucI nth_append)\n show ?case\n apply (simp add: mapME_append mapME_Cons mapME_Nil bindE_assoc x)\n apply (wp snoc.hyps snoc.prems | simp add: zs)+\n done\nqed\n\nlemma mapME_x_mapME:\n \"mapME_x m l = (mapME m l >>=E (%_. returnOk ()))\"\n apply (simp add: mapME_x_def sequenceE_x_def mapME_def sequenceE_def)\n apply (induct l, simp_all add: Let_def bindE_assoc)\n done\n\nlemmas mapME_validE_nth = mapME_validE_nth_induct[OF _ refl]\nlemma mapME_x_validE_nth:\n \"\\ \\i. i < length xs \\ \\P i\\ f (xs ! i) \\\\y. P (Suc i)\\, \\E\\ \\\n \\ \\P 0\\ mapME_x f xs \\\\_. P (length xs)\\, \\E\\\"\n by (wp mapME_validE_nth | simp add: mapME_x_mapME)+\n\nlemma alignUp_ge_nat:\n \"0 < m\n \\ (n :: nat) \\ ((n + m - 1) div m) * m\"\n apply (cases n, simp_all add: Suc_le_eq)\n apply (subgoal_tac \"\\q r. nat = q * m + r \\ r < m\")\n apply clarsimp\n apply (metis div_mult_mod_eq mod_less_divisor)\n done\n\nlemma alignUp_le_nat:\n \"0 < m \\ n \\ (b :: nat) \\ m dvd b\n \\ ((n + m - 1) div m) * m \\ b\"\n apply (clarsimp simp: dvd_def)\n apply (rule less_Suc_eq_le[THEN iffD1])\n apply (simp add: td_gal_lt[symmetric])\n apply (subst less_eq_Suc_le, simp add: mult.commute)\n done\n\nlemma filter_upt_eq:\n assumes mono: \"\\a b. a \\ b \\ f b \\ f a\"\n and preds: \"\\ f k\" \"k \\ 0 \\ f (k - 1)\" \"k \\ j\"\n shows \"filter f (upt i j) = upt i k\"\nproof -\n have mono': \"\\a b. a \\ b \\ f b \\ f a\"\n by (metis mono)\n\n have f: \"f = (\\x. x < k)\"\n apply (rule ext)\n apply (cut_tac a=k and b=x in mono')\n apply (cut_tac a=x and b=\"k - 1\" in mono')\n apply (cut_tac preds(1))\n apply (cases \"k = 0\")\n apply (simp add: preds)\n apply (simp add: preds[simplified])\n apply (cases k, auto)\n done\n\n show ?thesis\n apply (rule sorted_distinct_set_unique,\n simp_all add: sorted_filter[where f=id, simplified])\n apply (cut_tac preds)\n apply (auto simp add: f)\n done\nqed\n\nlemma nat_diff_less2:\n fixes x :: nat\n shows \"\\ x < y + z; 0 < y\\ \\ x - z < y\"\n apply (cases \"z \\ x\")\n apply (metis nat_diff_less)\n apply simp\n done\n\nlemma upt_mult_lt_prop:\n assumes n: \"n \\ 2 ^ a\"\n assumes b: \"b \\ a\"\n shows \"\\bd. [i\\[0..<2 ^ (a - b)]. i * 2 ^ b < n]\n = [0 ..< bd] \\ n \\ bd * 2 ^ b \\ bd * 2 ^ b \\ 2 ^ a\n \\ (bd - 1) * 2 ^ b \\ n\"\nproof -\n let ?al = \"(n + (2 ^ b - 1)) div 2 ^ b\"\n\n have sub1: \"0 < n \\ (?al - 1) * 2 ^ b < n\"\n apply (cases \"?al = 0\")\n apply simp\n apply (simp add: diff_mult_distrib)\n apply (rule nat_diff_less2, simp_all)\n apply (rule order_le_less_trans, rule div_mult_le)\n apply simp\n done\n\n have le1: \"(n + 2 ^ b - Suc 0) div 2 ^ b * 2 ^ b \\ 2 ^ a\"\n apply (rule alignUp_le_nat[simplified], simp_all add: n)\n apply (simp add: b le_imp_power_dvd)\n done\n\n note le2 = div_le_mono[OF le1, where k=\"2 ^ b\", simplified]\n\n show ?thesis\n apply (cases \"n = 0\")\n apply (simp add: exI[where x=0])\n apply (rule exI[where x=\"?al\"])\n apply (strengthen filter_upt_eq)\n apply (simp add: linorder_not_less conj_ac)\n apply (simp add: alignUp_ge_nat[simplified] sub1[simplified]\n sub1[THEN order_less_imp_le, simplified]\n power_minus_is_div[OF b] le1 le2)\n apply (auto elim: order_le_less_trans[rotated])\n done\nqed\n\nlemma delete_objects_ex_cte_cap_wp_to:\n notes untyped_range.simps[simp del]\n shows\n \"\\ex_cte_cap_wp_to P slot and invs and\n cte_wp_at (\\cp. is_untyped_cap cp \\ {ptr_base .. ptr_base + 2 ^ sz - 1} \\ untyped_range cp)\n src_slot and (\\s. descendants_of src_slot (cdt s) = {})\\\n delete_objects ptr_base sz\n \\\\rv s. ex_cte_cap_wp_to P slot s\\\"\n apply (simp add: delete_objects_def ex_cte_cap_wp_to_def)\n apply (rule hoare_pre)\n apply (rule hoare_lift_Pf2 [where f=\"interrupt_irq_node\"])\n apply (wp hoare_vcg_ex_lift | simp)+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (intro exI conjI, assumption+)\n apply (frule if_unsafe_then_capD[OF caps_of_state_cteD], clarsimp+)\n apply (case_tac \"the (caps_of_state s src_slot)\", simp_all)\n apply (frule ex_cte_cap_protects, simp add: cte_wp_at_caps_of_state,\n rule empty_descendants_range_in, (assumption | clarsimp)+)\n done\n\nlemma do_machine_op_ex_cte_cap_wp_to[wp]:\n \"\\ex_cte_cap_wp_to P slot\\\n do_machine_op oper\n \\\\rv s. ex_cte_cap_wp_to P slot s\\\"\n apply (simp add: do_machine_op_def split_def)\n apply wp\n apply (clarsimp simp: ex_cte_cap_wp_to_def)\n done\n\nlemma delete_objects_real_cte_at[wp]:\n \"\\\\s. real_cte_at p s \\ fst p \\ {ptr_base .. ptr_base + 2 ^ sz - 1}\\\n delete_objects ptr_base sz\n \\\\rv. real_cte_at p\\\"\n by (wp | simp add: delete_objects_def)+\n\nlemma delete_objects_ct_in_state[wp]:\n \"\\\\s. ct_in_state P s \\ cur_thread s \\ {ptr_base .. ptr_base + 2 ^ sz - 1}\\\n delete_objects ptr_base sz\n \\\\rv. ct_in_state P\\\"\n apply (rule hoare_pre)\n apply (wp | simp add: delete_objects_def ct_in_state_def\n st_tcb_at_def\n | simp add: detype_def)+\n apply (rule hoare_lift_Pf2[where f=cur_thread])\n apply wp+\n apply (clarsimp simp: ct_in_state_def st_tcb_at_def)\n done\n\n(* FIXME: move? *)\nlemma pspace_no_overlap_subset:\n \"pspace_no_overlap S s \\ T \\ S\n \\ pspace_no_overlap T s\"\n by (clarsimp simp: pspace_no_overlap_def disjoint_subset2)\n\ncrunch cur_thread[wp]: delete_objects \"\\s. P (cur_thread s)\"\n (simp: detype_def)\n\nlemma ct_in_state_trans_state[simp]:\n \"ct_in_state P (trans_state a s) = ct_in_state P s\"\n by (simp add: ct_in_state_def)\n\nlemmas unat_of_nat_word_bits\n = unat_of_nat_eq[where 'a = machine_word_len, unfolded word_bits_len_of, simplified]\n\nlemma caps_of_state_pspace_no_overlapD:\n \"\\ caps_of_state s cref = Some (cap.UntypedCap dev ptr sz idx); invs s;\n idx < 2 ^ sz \\\n \\ pspace_no_overlap_range_cover (ptr + of_nat idx) sz s\"\n apply (frule(1) caps_of_state_valid)\n apply (clarsimp simp: valid_cap_simps cap_aligned_def)\n apply (cut_tac neg_mask_add_aligned[where p=ptr and q=\"of_nat idx\" and n=sz])\n apply (rule cte_wp_at_pspace_no_overlapI[where idx=idx and cref=cref], simp_all)\n apply (simp add: cte_wp_at_caps_of_state)\n apply (simp add: mask_out_sub_mask)\n apply (subst unat_of_nat_word_bits, erule order_less_le_trans, simp_all)\n apply (rule word_of_nat_less)\n apply (erule order_less_le_trans)\n apply simp\n done\n\n\nlemma set_untyped_cap_invs_simple:\n \"\\\\s. descendants_range_in {ptr .. ptr+2^sz - 1} cref s\n \\ pspace_no_overlap_range_cover ptr sz s \\ invs s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz\n \\ cap_is_device c = dev\\ obj_ref_of c = ptr) cref s \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s. invs s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp:cte_wp_at_caps_of_state invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp set_free_index_valid_pspace_simple set_cap_valid_mdb_simple\n set_cap_idle update_cap_ifunsafe set_cap_valid_arch_caps_simple)\n apply (simp add:valid_irq_node_def)\n apply wps\n apply (wp hoare_vcg_all_lift set_cap_irq_handlers\n set_cap_irq_handlers cap_table_at_lift_valid set_cap_ioports'\n set_cap_typ_at set_cap_valid_arch_caps_simple set_cap_kernel_window_simple\n set_cap_cap_refs_respects_device_region)\n apply (clarsimp simp del: split_paired_Ex)\n apply (strengthen exI[where x=cref])\n apply (clarsimp simp:cte_wp_at_caps_of_state is_cap_simps valid_pspace_def)\n apply (intro conjI; clarsimp?)\n apply (clarsimp simp: fun_eq_iff)\n apply (clarsimp split:cap.splits simp:is_cap_simps appropriate_cte_cap_def)\n apply (drule(1) if_unsafe_then_capD[OF caps_of_state_cteD])\n apply clarsimp\n apply (clarsimp simp: is_cap_simps ex_cte_cap_wp_to_def appropriate_cte_cap_def\n cte_wp_at_caps_of_state)\n apply (clarsimp dest!:valid_global_refsD2 simp:cap_range_def)\n apply (simp add:valid_irq_node_def)\n apply (clarsimp simp:valid_irq_node_def)\n apply (clarsimp intro!: safe_ioport_insert_triv simp: is_cap_simps)\n done\n\nlemma reset_untyped_cap_invs_etc:\n \"\\invs and valid_untyped_inv_wcap ui\n (Some (UntypedCap dev ptr sz idx))\n and ct_active\n and K (\\ptr_base ptr' ty us slots. ui = Retype slot True ptr_base ptr' ty us slots dev)\\\n reset_untyped_cap slot\n \\\\_. invs and valid_untyped_inv_wcap ui (Some (UntypedCap dev ptr sz 0))\n and ct_active\n and pspace_no_overlap {ptr .. ptr + 2 ^ sz - 1}\\, \\\\_. invs\\\"\n (is \"\\invs and valid_untyped_inv_wcap ?ui (Some ?cap) and ct_active and _\\\n ?f \\\\_. invs and ?vu2 and ct_active and ?psp\\, \\\\_. invs\\\")\n apply (simp add: reset_untyped_cap_def)\n apply (rule hoare_vcg_seqE[rotated])\n apply ((wp (once) get_cap_sp)+)[1]\n apply (rule hoare_name_pre_stateE)\n apply (clarsimp simp: cte_wp_at_caps_of_state bits_of_def split del: if_split)\n apply (subgoal_tac \"is_aligned ptr sz\")\n prefer 2\n apply (frule caps_of_state_valid_cap, clarsimp)\n apply auto[1]\n apply (cases \"idx = 0\")\n apply (clarsimp simp: free_index_of_def)\n apply wp\n apply clarsimp\n apply (frule(1) caps_of_state_pspace_no_overlapD, simp+)\n apply (simp add: word_bw_assocs field_simps)\n apply (clarsimp simp: free_index_of_def split del: if_split)\n apply (rule_tac B=\"\\_. invs and valid_untyped_inv_wcap ?ui (Some ?cap)\n and ct_active and ?psp\" in hoare_vcg_seqE[rotated])\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp hoare_vcg_ex_lift hoare_vcg_const_Ball_lift\n delete_objects_ex_cte_cap_wp_to[where src_slot=slot]\n )\n apply (clarsimp simp: cte_wp_at_caps_of_state ct_in_state_def)\n apply (frule if_unsafe_then_capD[OF caps_of_state_cteD], clarsimp+)\n apply (drule(1) ex_cte_cap_protects[OF _ caps_of_state_cteD _ _ order_refl])\n apply (simp add: empty_descendants_range_in)\n apply clarsimp+\n apply (strengthen ballEI[mk_strg I E] refl)\n apply (strengthen exI[where x=\"fst slot\"], strengthen exI[where x=\"snd slot\"])\n apply (strengthen ex_cte_cap_protects[OF _ caps_of_state_cteD _ _ order_refl, mk_strg D E])\n apply (simp add: empty_descendants_range_in invs_untyped_children\n invs_valid_global_refs descendants_range_def bits_of_def)\n apply (strengthen refl)\n apply (drule st_tcb_ex_cap, clarsimp, fastforce)\n apply (drule ex_nonz_cap_to_overlap[where p=slot],\n (simp add: cte_wp_at_caps_of_state descendants_range_def)+)\n apply (drule caps_of_state_valid_cap | clarify)+\n apply (intro conjI; clarify?; blast)[1]\n apply (cases \"dev \\ sz < reset_chunk_bits\")\n apply (simp add: bits_of_def)\n apply (simp add: unless_def)\n apply (rule hoare_pre)\n apply (wp set_untyped_cap_invs_simple set_cap_cte_wp_at set_cap_no_overlap\n hoare_vcg_const_Ball_lift set_cap_cte_cap_wp_to\n ct_in_state_thread_state_lift)\n apply (strengthen empty_descendants_range_in)\n apply (rule hoare_lift_Pf2 [where f=\"interrupt_irq_node\"])\n apply (wp hoare_vcg_const_Ball_lift hoare_vcg_const_imp_lift\n hoare_vcg_ex_lift ct_in_state_thread_state_lift)+\n apply (clarsimp simp add: bits_of_def field_simps cte_wp_at_caps_of_state\n empty_descendants_range_in)\n apply (cut_tac a=sz and b=reset_chunk_bits and n=idx in upt_mult_lt_prop)\n apply (frule caps_of_state_valid_cap, clarsimp+)\n apply (simp add: valid_cap_def)\n apply simp\n apply (clarsimp simp: bits_of_def free_index_of_def)\n apply (rule hoare_pre, rule hoare_post_impErr,\n rule_tac P=\"\\i. invs and ?psp and ct_active and valid_untyped_inv_wcap ?ui\n (Some (UntypedCap dev ptr sz (if i = 0 then idx else (bd - i) * 2 ^ reset_chunk_bits)))\"\n and E=\"\\_. invs\"\n in mapME_x_validE_nth)\n apply (rule hoare_pre)\n apply (wp set_untyped_cap_invs_simple\n set_cap_no_overlap set_cap_cte_wp_at\n preemption_point_inv\n hoare_vcg_ex_lift hoare_vcg_const_imp_lift\n hoare_vcg_const_Ball_lift set_cap_cte_cap_wp_to\n | strengthen empty_descendants_range_in\n | simp\n | rule irq_state_independent_A_conjI\n | simp add: cte_wp_at_caps_of_state\n | wp (once) ct_in_state_thread_state_lift\n | (rule irq_state_independent_A_def[THEN meta_eq_to_obj_eq, THEN iffD2],\n simp add: ex_cte_cap_wp_to_def ct_in_state_def))+\n apply (clarsimp simp: is_aligned_neg_mask_eq bits_of_def field_simps\n cte_wp_at_caps_of_state nth_rev)\n apply (strengthen order_trans[where z=\"2 ^ sz\", rotated, mk_strg I E])\n apply (clarsimp split: if_split_asm)\n apply auto[1]\n apply (auto elim: order_trans[rotated])[1]\n apply (clarsimp simp: cte_wp_at_caps_of_state split: if_split_asm)\n apply simp\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n done\n\nlemma get_cap_prop_known:\n \"\\cte_wp_at (\\cp. f cp = v) slot and Q v\\ get_cap slot \\\\rv. Q (f rv)\\\"\n apply (wp get_cap_wp)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n done\n\nlemma reset_untyped_cap_st_tcb_at:\n \"\\invs and st_tcb_at P t and cte_wp_at (\\cp. t \\ cap_range cp \\ is_untyped_cap cp) slot\\\n reset_untyped_cap slot\n \\\\_. st_tcb_at P t\\, \\\\_. st_tcb_at P t\\\"\n apply (simp add: reset_untyped_cap_def)\n apply (rule hoare_pre)\n apply (wp mapME_x_inv_wp preemption_point_inv | simp add: unless_def)+\n apply (simp add: delete_objects_def)\n apply (wp get_cap_wp hoare_vcg_const_imp_lift | simp)+\n apply (auto simp: cte_wp_at_caps_of_state cap_range_def\n bits_of_def is_cap_simps)\n done\n\nlemma create_cap_iflive[wp]:\n \"\\if_live_then_nonz_cap\n and cte_wp_at ((=) cap.NullCap) cref\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. if_live_then_nonz_cap\\\"\n apply (simp add: create_cap_def)\n apply (wp new_cap_iflive set_cdt_cte_wp_at | simp)+\n done\n\ncrunch cap_to_again[wp]: set_cdt \"ex_cte_cap_wp_to P p\"\n (simp: ex_cte_cap_wp_to_def)\n\nlemma create_cap_ifunsafe[wp]:\n \"\\if_unsafe_then_cap\n and ex_cte_cap_wp_to (appropriate_cte_cap (default_cap tp oref sz dev)) cref\n and cte_wp_at ((=) cap.NullCap) cref\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. if_unsafe_then_cap\\\"\n apply (simp add: create_cap_def)\n apply (wp new_cap_ifunsafe set_cdt_cte_wp_at | simp)+\n done\n\nlemma set_cdt_state_refs_of[wp]:\n \"\\\\s. P (state_refs_of s)\\\n set_cdt m\n \\\\rv s. P (state_refs_of s)\\\"\n apply (simp add: set_cdt_def)\n apply wp\n apply (clarsimp elim!: state_refs_of_pspaceI)\n done\n\nlemma set_cdt_state_hyp_refs_of[wp]:\n \"\\\\s. P (state_hyp_refs_of s)\\\n set_cdt m\n \\\\rv s. P (state_hyp_refs_of s)\\\"\n apply (simp add: set_cdt_def)\n apply wp\n apply (clarsimp elim!: state_hyp_refs_of_pspaceI)\n done\n\nlemma state_refs_of_rvk[simp]:\n \"state_refs_of (is_original_cap_update f s) = state_refs_of s\"\n by (simp add: state_refs_of_def)\n\n\nlemma create_cap_state_refs_of[wp]:\n \"\\\\s. P (state_refs_of s)\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv s. P (state_refs_of s)\\\"\n unfolding create_cap_def by wpsimp\n\nlemma create_cap_state_hyp_refs_of[wp]:\n \"\\\\s. P (state_hyp_refs_of s)\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv s. P (state_hyp_refs_of s)\\\"\n apply (simp add: create_cap_def)\n apply (wp | simp)+\n done\n\nlemma create_cap_zombies[wp]:\n \"\\zombies_final and cte_wp_at ((=) cap.NullCap) cref\n and (\\s. \\r\\obj_refs (default_cap tp oref sz dev). \\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. zombies_final\\\"\n unfolding create_cap_def set_cdt_def by (wpsimp wp: new_cap_zombies)\n\nlemma create_cap_cur_tcb[wp]:\n \"\\cur_tcb\\ create_cap tp sz p dev tup \\\\rv. cur_tcb\\\"\n unfolding create_cap_def split_def set_cdt_def by wpsimp\n\nlemma create_cap_valid_idle[wp]:\n \"\\valid_idle\\\n create_cap tp sz p dev tup\n \\\\rv. valid_idle\\\"\n unfolding create_cap_def split_def set_cdt_def by (wpsimp wp: set_cap_idle)\n\n\ncrunch it[wp]: create_cap \"\\s. P (idle_thread s)\"\n (simp: crunch_simps)\n\n\nlemma default_cap_reply:\n \"default_cap tp ptr sz dev \\ cap.ReplyCap ptr' bool R\"\n by (cases tp; simp)\n\nlemma create_cap_valid_reply_caps[wp]:\n \"\\valid_reply_caps\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. valid_reply_caps\\\"\n apply (simp add: valid_reply_caps_def has_reply_cap_def\n cte_wp_at_caps_of_state create_cap_def is_reply_cap_to_def\n set_cdt_def)\n apply (simp only: imp_conv_disj)\n apply (rule hoare_pre)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift | simp)+\n apply (clarsimp simp: default_cap_reply)\n apply (erule conjI [OF allEI], fastforce)\n apply (simp add: unique_reply_caps_def default_cap_reply)\n done\n\n\nlemma create_cap_valid_reply_masters[wp]:\n \"\\valid_reply_masters\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. valid_reply_masters\\\"\n apply (simp add: valid_reply_masters_def cte_wp_at_caps_of_state\n create_cap_def is_master_reply_cap_to_def)\n apply (wp | simp add: default_cap_reply)+\n done\n\n\nlemma create_cap_valid_global_refs[wp]:\n \"\\valid_global_refs\n and cte_wp_at (\\c. cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. valid_global_refs\\\"\n apply (simp add: valid_global_refs_def valid_refs_def\n cte_wp_at_caps_of_state create_cap_def pred_conj_def)\n apply (simp only: imp_conv_disj)\n apply (wpsimp wp: hoare_vcg_all_lift hoare_vcg_disj_lift)\n apply (subgoal_tac \"global_refs s \\ cap_range (default_cap tp oref sz dev) = {}\")\n apply auto[1]\n apply (erule disjoint_subset2)\n apply (cases p, simp)\n done\n\n\ncrunch arch_state[wp]: create_cap \"\\s. P (arch_state s)\"\n (simp: crunch_simps)\n\nlemma create_cap_aobj_at:\n \"arch_obj_pred P' \\\n \\\\s. P (obj_at P' pd s)\\ create_cap type bits ut is_dev cref \\\\r s. P (obj_at P' pd s)\\\"\n unfolding create_cap_def split_def set_cdt_def\n by (wpsimp wp: set_cap.aobj_at)\n\nlemma create_cap_valid_arch_state[wp]:\n \"\\valid_arch_state\\ create_cap type bits ut is_dev cref \\\\_. valid_arch_state\\\"\n by (wp valid_arch_state_lift_aobj_at create_cap_aobj_at)\n\ncrunch irq_node[wp]: create_cap \"\\s. P (interrupt_irq_node s)\"\n (simp: crunch_simps)\n\nlemmas create_cap_valid_irq_node[wp]\n = valid_irq_node_typ [OF create_cap_typ_at create_cap_irq_node]\n\n\nlemma default_cap_irqs[simp]:\n \"cap_irqs (default_cap tp oref sz dev) = {}\"\n by (cases tp, simp_all)\n\n\nlemma create_cap_irq_handlers[wp]:\n \"\\valid_irq_handlers\\ create_cap tp sz p dev (cref, oref) \\\\rv. valid_irq_handlers\\\"\n apply (simp add: valid_irq_handlers_def irq_issued_def)\n apply (simp add: create_cap_def Ball_def)\n apply (simp only: imp_conv_disj)\n apply (wpsimp wp: hoare_vcg_all_lift hoare_vcg_disj_lift)\n apply (auto simp: ran_def split: if_split_asm)\n done\n\n\ncrunch valid_vspace_objs[wp]: create_cap \"valid_vspace_objs\"\n (simp: crunch_simps)\n\nlocale Untyped_AI_nonempty_table =\n fixes state_ext_t :: \"('state_ext::state_ext) itself\"\n fixes nonempty_table :: \"machine_word set \\ Structures_A.kernel_object \\ bool\"\n assumes create_cap_valid_arch_caps[wp]:\n \"\\tp oref sz dev cref p.\\valid_arch_caps\n and valid_cap (default_cap tp oref sz dev)\n and (\\(s::'state_ext state). \\r\\obj_refs (default_cap tp oref sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n and cte_wp_at ((=) cap.NullCap) cref\n and K (tp \\ ArchObject ASIDPoolObj)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_arch_caps\\\"\n assumes create_cap_cap_refs_in_kernel_window[wp]:\n \"\\tp oref sz p dev cref.\\cap_refs_in_kernel_window and cte_wp_at (\\c. cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref) \\\\rv. (cap_refs_in_kernel_window::'state_ext state \\ bool)\\\"\n assumes nonempty_default[simp]:\n \"\\tp S us dev. tp \\ Untyped \\ \\ nonempty_table S (default_object tp dev us)\"\n assumes nonempty_table_caps_of:\n \"\\S ko. nonempty_table S ko \\ caps_of ko = {}\"\n assumes init_arch_objects_nonempty_table:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\ref\\set refs. is_aligned ref (obj_bits_api tp us))\\\n init_arch_objects tp ptr bits us refs\n \\\\rv. \\s :: 'state_ext state. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n assumes create_cap_ioports[wp]:\n \"\\tp oref sz dev cref p. \\valid_ioports and cte_wp_at (\\_. True) cref\\\n create_cap tp sz p dev (cref,oref) \\\\rv (s::'state_ext state). valid_ioports s\\\"\n\n\ncrunch v_ker_map[wp]: create_cap \"valid_kernel_mappings\"\n (simp: crunch_simps)\n\n\ncrunch eq_ker_map[wp]: create_cap \"equal_kernel_mappings\"\n (simp: crunch_simps)\n\nlemma create_cap_asid_map[wp]:\n \"\\valid_asid_map\\ create_cap tp sz p dev (cref, oref) \\\\rv. valid_asid_map\\\"\n unfolding create_cap_def set_cdt_def by wpsimp\n\ncrunch only_idle[wp]: create_cap only_idle\n (simp: crunch_simps)\n\ncrunch pspace_in_kernel_window[wp]: create_cap \"pspace_in_kernel_window\"\n (simp: crunch_simps)\n\nlemma set_original_valid_ioc[wp]:\n \"\\valid_ioc\\ create_cap tp sz p dev slot \\\\_. valid_ioc\\\"\n apply (cases slot)\n apply (wpsimp wp: set_cdt_cos_ioc set_cap_caps_of_state\n simp: create_cap_def set_original_set_cap_comm cte_wp_at_caps_of_state)\n apply (cases tp; simp)\n done\n\ninterpretation create_cap: non_vspace_non_mem_op \"create_cap tp sz p slot dev\"\n apply (cases slot)\n apply (simp add: create_cap_def set_cdt_def)\n apply unfold_locales\n apply (rule hoare_pre, (wp set_cap.vsobj_at | wpc |simp add: create_cap_def set_cdt_def bind_assoc)+)+\n done\n\n(* by (wp set_cap.vsobj_at | simp)+ *) (* ARMHYP might need this *)\n\ncrunch valid_irq_states[wp]: create_cap \"valid_irq_states\"\ncrunch pspace_respects_device_region[wp]: create_cap pspace_respects_device_region\n\nlemma cap_range_subseteq_weaken:\n \"\\obj_refs c \\ untyped_range cap; untyped_range c \\ untyped_range cap\\\n \\ cap_range c \\ cap_range cap\"\n by (fastforce simp add: cap_range_def)\n\nlemma create_cap_refs_respects_device:\n \"\\cap_refs_respects_device_region and cte_wp_at (\\c. cap_is_device (default_cap tp oref sz dev) = cap_is_device c \\is_untyped_cap c \\ cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref) \\\\rv s. cap_refs_respects_device_region s\\\"\n apply (simp add: create_cap_def)\n apply (rule hoare_pre)\n apply (wp set_cap_cap_refs_respects_device_region hoare_vcg_ex_lift\n set_cdt_cte_wp_at | simp del: split_paired_Ex)+\n apply (rule_tac x = p in exI)\n apply clarsimp\n apply (erule cte_wp_at_weakenE)\n apply (fastforce simp: is_cap_simps)\n done\n\nlemma (in Untyped_AI_nonempty_table) create_cap_invs[wp]:\n \"\\invs\n and cte_wp_at (\\c. is_untyped_cap c \\ cap_is_device (default_cap tp oref sz dev) = cap_is_device c\n \\ obj_refs (default_cap tp oref sz dev) \\ untyped_range c \\\n untyped_range (default_cap tp oref sz dev) \\ untyped_range c\n \\ untyped_range (default_cap tp oref sz dev) \\ usable_untyped_range c = {}) p\n and descendants_range (default_cap tp oref sz dev) p\n and cte_wp_at ((=) cap.NullCap) cref\n and valid_cap (default_cap tp oref sz dev)\n and ex_cte_cap_wp_to (appropriate_cte_cap (default_cap tp oref sz dev)) cref\n and real_cte_at cref\n and (\\(s::'state_ext state). \\r\\obj_refs (default_cap tp oref sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n and K (p \\ cref \\ tp \\ ArchObject ASIDPoolObj)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. invs\\\"\n apply (rule hoare_pre)\n apply (simp add: invs_def valid_state_def valid_pspace_def)\n apply (wp create_cap_refs_respects_device | simp add: valid_cap_def)+\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_caps_of_state valid_pspace_def)\n apply (frule_tac p1 = p in valid_cap_aligned[OF caps_of_state_valid])\n apply simp\n apply (simp add: invs_def valid_state_def valid_pspace_def )\n apply (simp add: cap_range_def)\n done\n\nlemma create_cap_ex_cap_to[wp]:\n \"\\ex_cte_cap_wp_to P p' and cte_wp_at ((=) cap.NullCap) cref\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv. ex_cte_cap_wp_to P p'\\\"\n apply (simp add: create_cap_def)\n apply (wp set_cap_cte_cap_wp_to set_cdt_cte_wp_at\n | simp | wps set_cdt_irq_node)+\n apply (clarsimp elim!: cte_wp_at_weakenE)\n done\n\n(* FIXME: move *)\nlemma hoare_vcg_split_lift[wp]:\n \"\\P\\ f x y \\Q\\ \\ \\P\\ case (x, y) of (a, b) \\ f a b \\Q\\\"\n by simp\n\nlemma create_cap_no_cap[wp]:\n \"\\\\s. (\\p'. \\ cte_wp_at P p' s) \\ \\ P (default_cap tp oref sz dev)\\\n create_cap tp sz p dev (cref, oref)\n \\\\rv s. \\oref' cref'. \\ cte_wp_at P (oref', cref') s\\\"\n unfolding create_cap_def cte_wp_at_caps_of_state by wpsimp\n\nlemma (in Untyped_AI_nonempty_table) create_cap_nonempty_tables[wp]:\n \"\\\\s. P (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) p s)\\\n create_cap tp sz p' dev (cref, oref)\n \\\\rv s. P (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) p s)\\\"\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=arch_state, OF create_cap_arch_state])\n apply (simp add: create_cap_def set_cdt_def)\n apply (wp set_cap_obj_at_impossible|simp)+\n apply (clarsimp simp: nonempty_table_caps_of)\n done\n\nlemma cap_range_not_untyped:\n \"\\ is_untyped_cap c \\ cap_range c = obj_refs c\"\n apply (case_tac c)\n apply (simp_all add: is_cap_simps cap_range_def)\n done\n\nlemma cap_range_inter_emptyI:\n \"\\is_untyped_cap a = is_untyped_cap b; untyped_range a \\ untyped_range b ={};\n obj_refs a \\ obj_refs b = {}\\\n \\ cap_range a \\ cap_range b = {}\"\n apply (case_tac \"is_untyped_cap a\")\n apply (simp_all add: cap_range_not_untyped)\n done\n\nlemma (in Untyped_AI_nonempty_table) create_caps_invs_inv:\n assumes create_cap_Q[wp]:\n \"\\invs and Q and cte_wp_at (\\c. is_untyped_cap c\n \\ cap_range (default_cap tp oref sz dev) \\ untyped_range c\n \\ {oref .. oref + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c) p\n and cte_wp_at ((=) NullCap) cref\n and valid_cap (default_cap tp oref sz dev)\\\n create_cap tp sz p dev (cref,oref) \\\\_. Q \\\"\n shows\n \"\\(\\s. invs (s::('state_ext::state_ext) state) \\ Q s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ obj_is_device tp dev = cap_is_device c) p s\n \\ (\\tup \\ set ((cref,oref)#list).\n cte_wp_at (\\c. cap_range (default_cap tp (snd tup) sz dev) \\ untyped_range c\n \\ {snd tup .. snd tup + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c\n \\ (untyped_range (default_cap tp (snd tup) sz dev) \\ usable_untyped_range c = {})) p s)\n \\ (\\tup \\ set ((cref,oref)#list).\n descendants_range (default_cap tp (snd tup) sz dev) p s)\n \\ distinct_sets (map (\\tup. cap_range (default_cap tp (snd tup) sz dev)) ((cref,oref)#list))\n \\ (\\tup \\ set ((cref,oref)#list).\n cte_wp_at ((=) cap.NullCap) (fst tup) s)\n \\ (\\tup \\ set ((cref,oref)#list).\n valid_cap (default_cap tp (snd tup) sz dev) s)\n \\ (\\tup \\ set ((cref,oref)#list).\n ex_cte_cap_wp_to is_cnode_cap (fst tup) s)\n \\ (\\tup \\ set ((cref,oref)#list).\n real_cte_at (fst tup) s)\n \\ (\\tup \\ set ((cref,oref)#list). \\r \\ obj_refs (default_cap tp (snd tup) sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ Structures_A.obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ distinct (p # (map fst ((cref,oref)#list)))\n \\ tp \\ ArchObject ASIDPoolObj) \\\n create_cap tp sz p dev (cref,oref)\n \\(\\r s.\n invs s \\ Q s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ obj_is_device tp dev = cap_is_device c) p s\n \\ (\\tup \\ set list.\n cte_wp_at (\\c.\n cap_range (default_cap tp (snd tup) sz dev) \\ untyped_range c\n \\ {snd tup .. snd tup + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c\n \\ (untyped_range (default_cap tp (snd tup) sz dev) \\ usable_untyped_range c = {})) p s)\n \\ (\\tup \\ set list.\n descendants_range (default_cap tp (snd tup) sz dev) p s)\n \\ distinct_sets (map (\\tup. cap_range (default_cap tp (snd tup) sz dev)) list)\n \\ (\\tup \\ set list.\n cte_wp_at ((=) cap.NullCap) (fst tup) s)\n \\ (\\tup \\ set list.\n valid_cap (default_cap tp (snd tup) sz dev) s)\n \\ (\\tup \\ set list.\n ex_cte_cap_wp_to is_cnode_cap (fst tup) s)\n \\ (\\tup \\ set list.\n real_cte_at (fst tup) s)\n \\ (\\tup \\ set list. \\r \\ obj_refs (default_cap tp (snd tup) sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ Structures_A.obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ distinct (p # (map fst list))\n \\ tp \\ ArchObject ASIDPoolObj) \\\"\n apply (rule hoare_pre)\n apply (wp hoare_vcg_const_Ball_lift | clarsimp)+\n apply (clarsimp simp: conj_comms invs_mdb distinct_sets_prop distinct_prop_map\n ex_cte_cap_to_cnode_always_appropriate_strg)\n apply (simp add: cte_wp_at_caps_of_state[where p=p]\n | erule exE conjE)+\n apply (intro conjI)\n apply (clarsimp simp:image_def)\n apply (drule(1) bspec)+\n apply simp\n apply (fastforce simp:cap_range_def)\n apply (clarsimp simp:is_cap_simps)\n apply (simp only: UN_extend_simps UNION_empty_conv)\n apply (drule(1) bspec)+\n apply clarsimp\n apply blast\n apply (clarsimp simp: cap_range_def)\n apply (clarsimp simp: cap_range_def)\n done\n\nlemma (in Untyped_AI_nonempty_table) create_caps_invs:\n assumes create_cap_Q[wp]: \"\\cref oref.\n \\invs and Q and cte_wp_at (\\c. is_untyped_cap c\n \\ cap_range (default_cap tp oref sz dev) \\ untyped_range c\n \\ {oref .. oref + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c) p\n and cte_wp_at ((=) NullCap) cref\n and valid_cap (default_cap tp oref sz dev)\n and K (cref \\ set crefs \\ oref \\ set (retype_addrs ptr tp (length slots) us))\\\n create_cap tp sz p dev (cref,oref) \\\\_. Q \\\"\n shows\n \"\\(\\s. invs (s::('state_ext::state_ext) state) \\ (Q::('state_ext::state_ext) state \\ bool) s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ obj_is_device tp dev = cap_is_device c) p s\n \\ (\\tup \\ set (zip crefs orefs).\n cte_wp_at (\\c. cap_range (default_cap tp (snd tup) sz dev) \\ untyped_range c\n \\ {snd tup .. snd tup + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c\n \\ (untyped_range (default_cap tp (snd tup) sz dev) \\ usable_untyped_range c = {})) p s)\n \\ (\\tup \\ set (zip crefs orefs).\n descendants_range (default_cap tp (snd tup) sz dev) p s)\n \\ distinct_sets (map (\\tup. cap_range (default_cap tp (snd tup) sz dev)) (zip crefs orefs))\n \\ (\\tup \\ set (zip crefs orefs).\n cte_wp_at ((=) cap.NullCap) (fst tup) s)\n \\ (\\tup \\ set (zip crefs orefs).\n valid_cap (default_cap tp (snd tup) sz dev) s)\n \\ (\\tup \\ set (zip crefs orefs).\n ex_cte_cap_wp_to is_cnode_cap (fst tup) s)\n \\ (\\tup \\ set (zip crefs orefs).\n real_cte_at (fst tup) s)\n \\ (\\tup \\ set (zip crefs orefs). \\r \\ obj_refs (default_cap tp (snd tup) sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ Structures_A.obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ distinct (p # (map fst (zip crefs orefs)))\n \\ tp \\ ArchObject ASIDPoolObj)\n and K (set orefs \\ set (retype_addrs ptr tp (length slots) us))\\\n mapM_x (create_cap tp sz p dev) (zip crefs orefs)\n \\\\rv s. invs s \\ Q s\\\"\n apply (rule hoare_gen_asm)\n apply (subgoal_tac \"set (zip crefs orefs) \\ set crefs \\ set (retype_addrs ptr tp (length slots) us)\")\n prefer 2\n apply (auto dest!: set_zip_helper)[1]\n apply (induct (\"zip crefs orefs\"))\n apply (simp add: mapM_x_def sequence_x_def)\n apply wpsimp\n apply (clarsimp simp add: mapM_x_def sequence_x_def)\n apply (rule hoare_seq_ext)\n apply assumption\n apply (thin_tac \"valid a b c\" for a b c)\n apply (rule hoare_pre)\n apply (rule hoare_strengthen_post)\n apply (rule_tac list=list and us=us in create_caps_invs_inv)\n apply (rule hoare_pre, rule create_cap_Q)\n apply (clarsimp | drule(1) bspec)+\n done\n\nlemma retype_region_cte_at_other':\n \"\\pspace_no_overlap_range_cover ptr sz and cte_wp_at P p\n and valid_pspace and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\n \\\\rv. cte_wp_at P p\\\"\n apply (rule hoare_gen_asm)\n apply (wpsimp wp: retype_region_cte_at_other)\n done\n\nlemma retype_region_ex_cte_cap_to:\n \"\\pspace_no_overlap_range_cover ptr sz and ex_cte_cap_wp_to P p\n and valid_pspace and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\n \\\\rv. ex_cte_cap_wp_to P p\\\"\n apply (simp add: ex_cte_cap_wp_to_def)\n apply (wp hoare_vcg_ex_lift retype_region_cte_at_other'\n | wps retype_region_irq_node)+\n apply auto\n done\n\nlemma retype_region_obj_ref_range:\n \"\\ \\r. \\P r\\ retype_region ptr n us ty dev\\\\rv. Q r\\ \\\n \\\n \\(\\s. \\r \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}. P r s) and K (range_cover ptr sz (obj_bits_api ty us) n)\\\n retype_region ptr n us ty dev\n \\\\rv s. \\x \\ set rv. \\r \\ obj_refs (default_cap tp x us dev). Q r s\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule hoare_vcg_conj_lift [OF retype_region_ret, simplified])\n apply (rule hoare_vcg_const_Ball_lift)\n apply assumption\n apply (clarsimp)\n apply (drule subsetD[OF obj_refs_default_cap])\n apply (drule_tac x = ra in bspec)\n apply (simp add: ptr_add_def)\n apply (drule(1) range_cover_mem)\n apply simp\n apply simp\n done\n\nlemma retype_region_not_cte_wp_at:\n \"\\(\\s. \\ cte_wp_at P p s) and valid_pspace and\n caps_overlap_reserved {ptr..ptr + of_nat n * 2 ^ obj_bits_api tp us - 1} and\n valid_mdb and pspace_no_overlap_range_cover ptr sz and caps_no_overlap ptr sz and\n (\\s. \\cref. cte_wp_at (\\c. up_aligned_area ptr sz \\ cap_range c \\ cap_is_device c = dev) cref s) and\n K (\\ P cap.NullCap \\ (tp = CapTableObject \\ 0 < us) \\ range_cover ptr sz (obj_bits_api tp us) n)\\\n retype_region ptr n us tp dev\n \\\\rv s. \\ cte_wp_at P p s\\\"\n apply (rule hoare_gen_asm)\n apply (clarsimp simp: P_null_filter_caps_of_cte_wp_at[symmetric])\n apply (wpsimp wp: retype_region_caps_of)\n apply auto\n done\n\n\nlemma retype_region_refs_distinct[wp]:\n \"\\K (range_cover ptr sz (obj_bits_api tp us) n)\\ retype_region ptr n us tp dev\n \\\\rv s. distinct_prop\n (\\x y. obj_refs (default_cap tp (snd x) us dev)\n \\ obj_refs (default_cap tp (snd y) us dev) = {})\n (zip xs rv)\\\"\n apply simp\n apply (rule hoare_gen_asm[where P'=\"\\\", simplified])\n apply (rule hoare_strengthen_post [OF retype_region_ret])\n apply (subst distinct_prop_map[symmetric, where f=snd])\n apply (rule distinct_prop_prefixE [OF _ map_snd_zip_prefix [unfolded less_eq_list_def]])\n apply (clarsimp simp: retype_addrs_def distinct_prop_map\n word_unat_power[symmetric] power_sub[symmetric]\n power_add[symmetric] mult.commute\n | rule conjI distinct_prop_distinct [where xs=\"upt a b\" for a b]\n set_eqI diff_le_mono\n | erule(3) ptr_add_distinct_helper ptr_add_distinct_helper [OF _ not_sym]\n | drule subsetD [OF obj_refs_default_cap]\n less_two_pow_divD)+\n apply (simp add: range_cover_def word_bits_def)\n apply (erule range_cover.range_cover_n_le[where 'a=machine_word_len])\n done\n\n\nlemma unsafe_protected:\n \"\\ cte_wp_at P p s; cte_wp_at ((=) (cap.UntypedCap dev ptr bits idx)) p' s;\n descendants_range_in S p' s; invs s; S \\ untyped_range (cap.UntypedCap dev ptr bits idx);\n \\cap. P cap \\ cap \\ cap.NullCap \\\n \\ fst p \\ S\"\n apply (rule ex_cte_cap_protects)\n apply (erule if_unsafe_then_capD)\n apply (clarsimp simp: invs_def valid_state_def)\n apply simp\n apply assumption+\n apply clarsimp+\n done\n\nlemma cap_to_protected:\n \"\\ ex_cte_cap_wp_to P p s; cte_wp_at ((=) (cap.UntypedCap dev ptr bits idx)) p' s;\n descendants_range (cap.UntypedCap dev ptr bits idx) p' s; invs s \\\n \\ ex_cte_cap_wp_to P p (detype {ptr .. ptr + 2 ^ bits - 1} s)\"\n apply (clarsimp simp: ex_cte_cap_wp_to_def, simp add: detype_def descendants_range_def2)\n apply (intro exI conjI, assumption)\n apply (case_tac \"a = fst p\")\n apply (frule(1) ex_cte_cap_protects\n [rotated,where P=P])\n apply clarsimp+\n apply (simp add: ex_cte_cap_wp_to_def)\n apply fastforce+\n apply (drule(2) unsafe_protected[rotated])\n apply simp+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply auto\n done\n\nlemma valid_cap_aligned:\n \"valid_cap cap s \\ cap_aligned cap\"\n by (simp add: valid_cap_def)\n\ncrunch irq_node[wp]: do_machine_op \"\\s. P (interrupt_irq_node s)\"\n\n(* FIXME: move *)\nlemma ge_mask_eq: \"len_of TYPE('a) \\ n \\ (x::'a::len word) && mask n = x\"\n by (simp add: mask_def p2_eq_0[THEN iffD2])\n\n(* FIXME: replace do_machine_op_obj_at in KHeap_R by the lemma below *)\nlemma do_machine_op_obj_at_arch_state[wp]:\n \"\\\\s. P (obj_at (Q (arch_state s)) p s)\\\n do_machine_op f\n \\\\_ s. P (obj_at (Q (arch_state s)) p s)\\\"\n by (clarsimp simp: do_machine_op_def split_def | wp)+\n\nlemma (in Untyped_AI_nonempty_table) retype_nonempty_table[wp]:\n \"\\\\(s::('state_ext::state_ext) state). \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\n retype_region ptr sz us tp dev\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (simp add: retype_region_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp|simp del: fun_upd_apply)+\n apply (clarsimp simp del: fun_upd_apply)\n apply (simp add: foldr_upd_app_if)\n apply (clarsimp simp: obj_at_def split: if_split_asm)\n done\n\n\nlemma invs_arch_state_strg:\n \"invs s \\ valid_arch_state s\"\n by (clarsimp simp: invs_def valid_state_def)\n\n\nlemma invs_psp_aligned_strg:\n \"invs s \\ pspace_aligned s\"\n by (clarsimp simp: invs_def valid_state_def)\n\n\n(* FIXME: move *)\nlemma invs_cap_refs_in_kernel_window[elim!]:\n \"invs s \\ cap_refs_in_kernel_window s\"\n by (simp add: invs_def valid_state_def)\n\nlemma (in Untyped_AI_nonempty_table) set_cap_nonempty_tables[wp]:\n \"\\\\s. P (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) p s)\\\n set_cap cap cref\n \\\\rv s. P (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) p s)\\\"\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=arch_state, OF set_cap_arch])\n apply (wp set_cap_obj_at_impossible)\n apply (clarsimp simp: nonempty_table_caps_of)\n done\n\n\nlemma ex_cte_cap_wp_to_def_msu[simp]:\n \"ex_cte_cap_wp_to P x (machine_state_update f s) = ex_cte_cap_wp_to P x s\"\n by (simp add: ex_cte_cap_wp_to_def)\n\nlemma (in Untyped_AI_arch) retype_region_caps_reserved:\n \"\\cte_wp_at (is_untyped_cap) p and caps_overlap_reserved {ptr..ptr + of_nat (n * 2 ^ obj_bits_api tp us) - 1}\n and K (range_cover ptr sz (obj_bits_api tp us) n) and pspace_no_overlap_range_cover ptr sz and valid_pspace \\\n retype_region ptr n us tp dev\n \\\\rv (s::('state_ext::state_ext) state). \\y\\set rv. cte_wp_at (\\a. untyped_range (default_cap tp y us dev) \\ usable_untyped_range a = {}) p s\\\"\n apply (clarsimp simp: valid_def cte_wp_at_caps_of_state)\n apply (frule use_valid[OF _ retype_region_ranges'])\n apply fastforce\n apply (drule(1) bspec)\n apply (frule_tac P1 = \"(=) cap\" in use_valid[OF _ retype_region_cte_at_other])\n apply simp+\n apply (fastforce simp: cte_wp_at_caps_of_state)\n apply (clarsimp simp: cte_wp_at_caps_of_state caps_overlap_reserved_def)\n apply (drule bspec)\n apply fastforce\n apply (clarsimp simp: cap_range_def)\n apply blast\n done\n\nlemma untyped_mdb_descendants_range:\n \"\\caps_of_state s p = Some ucap; is_untyped_cap ucap; valid_mdb s; descendants_range_in S p s; S \\ untyped_range ucap;\n caps_of_state s slot = Some cap; x\\ obj_refs cap \\\\ x\\ S\"\n apply (clarsimp simp: valid_mdb_def)\n apply (drule untyped_mdbD)\n apply simp+\n apply (rule ccontr)\n apply (clarsimp)\n apply blast\n apply simp\n apply (drule(2) descendants_range_inD)\n apply (simp add: cap_range_def,blast)\n done\n\nlemma global_refs_detype[simp]: \"global_refs (detype S s) = global_refs s\"\n by (simp add: detype_def)\n\nlemma ex_cte_cap_wp_to_clear_um[simp]:\n \"ex_cte_cap_wp_to P p (clear_um T s) = ex_cte_cap_wp_to P p s\"\n by (clarsimp simp: ex_cte_cap_wp_to_def clear_um_def)\n\n\nlocale Untyped_AI =\n Untyped_AI_of_bl_nat_to_cref +\n Untyped_AI_arch state_ext_t +\n Untyped_AI_nonempty_table state_ext_t nonempty_table\n for state_ext_t :: \"'state_ext :: state_ext itself\"\n and nonempty_table\n\nlemma set_cap_device_and_range:\n \"\\\\\\ set_cap (UntypedCap dev (ptr && ~~ mask sz) sz idx) aref\n \\\\rv s. (\\slot. cte_wp_at (\\c. cap_is_device c = dev \\ up_aligned_area ptr sz \\ cap_range c) slot s)\\\"\n apply (rule hoare_pre)\n apply (clarsimp simp: cte_wp_at_caps_of_state simp del: split_paired_All split_paired_Ex)\n apply (wp set_cap_cte_wp_at' hoare_vcg_ex_lift)\n apply (rule_tac x=\"aref\" in exI)\n apply (auto intro: word_and_le2 simp: p_assoc_help)\n done\n\n\n\n\nlemma set_free_index_invs_UntypedCap:\n \"\\\\s. invs s \\ (\\cap. free_index_of cap \\ idx\n \\ is_untyped_cap cap \\ idx \\ 2^cap_bits cap\n \\ free_index_update (\\_. idx) cap = UntypedCap dev ptr sz idx\n \\ cte_wp_at ((=) cap) cref s)\\\n set_cap (UntypedCap dev ptr sz idx) cref\n \\\\rv s'. invs s'\\\"\n apply (rule hoare_name_pre_state)\n apply clarsimp\n apply (cut_tac cap=cap and idx=idx in set_free_index_invs)\n apply clarsimp\n apply (erule hoare_pre)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (case_tac cap, simp_all add: free_index_of_def)\n done\n\nlemma monadic_rewrite_state_assert_true:\n \"monadic_rewrite F E P (state_assert P) (return ())\"\n by (simp add: state_assert_def monadic_rewrite_def\n exec_get)\n\nlemma retype_region_aligned_for_init_sz:\n \"\\\\s. range_cover ptr sz (obj_bits_api new_type obj_sz) n\n \\ obj_bits_api new_type obj_sz = some_us_sz\\\n retype_region ptr n obj_sz new_type is_dev\n \\\\rv s. \\ref \\ set rv. is_aligned ref some_us_sz\\\"\n apply (rule hoare_name_pre_state)\n apply (rule hoare_pre, rule hoare_strengthen_post,\n rule retype_region_aligned_for_init, auto)\n done\n\nlemma (in strengthen_implementation) strengthen_Not[strg]:\n \"\\ st (\\ F) (\\) P P' \\\n \\ st F (\\) (\\ P) (\\ P')\"\n by (cases F, auto)\n\nlemma retype_region_ret_folded_general:\n \"\\\\s. P (retype_addrs y ty n bits)\\ retype_region y n bits ty dev\n \\\\r s. P r\\\"\n apply (rule hoare_name_pre_state)\n apply (rule hoare_pre, rule hoare_strengthen_post,\n rule retype_region_ret_folded, auto)\n done\n\nlemma retype_region_post_retype_invs_folded:\n \"\\P\\ retype_region y n bits ty dev \\\\r. post_retype_invs ty r\\\n \\ \\P\\ retype_region y n bits ty dev \\\\r. post_retype_invs ty (retype_addrs y ty n bits)\\\"\n apply (rule hoare_strengthen_post,\n rule hoare_vcg_conj_lift[OF retype_region_ret_folded, simplified],\n assumption)\n apply clarsimp\n done\n\nlemma tup_in_fst_image_set_zipD:\n \"x \\ fst ` set (zip xs ys) \\ x \\ set xs\"\n by (auto dest!: set_zip_helper)\n\nlemma distinct_map_fst_zip:\n \"distinct xs \\ distinct (map fst (zip xs ys))\"\n apply (induct xs arbitrary: ys, simp_all)\n apply (case_tac ys, simp_all)\n apply (metis tup_in_fst_image_set_zipD)\n done\n\nlemma retype_region_ranges_obj_bits_api:\n \"\\cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz\n \\ obj_ref_of c = ptr && ~~ mask sz) p and\n pspace_no_overlap_range_cover ptr sz and\n valid_pspace and K (range_cover ptr sz (obj_bits_api tp us) n)\n \\\n retype_region ptr n us tp dev\n \\\\rv s. \\y\\set rv. cte_wp_at\n (\\c. {y .. y + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c )\n p s\\\"\n apply (clarsimp simp:cte_wp_at_caps_of_state valid_def)\n apply (frule_tac P1 = \"(=) cap\" in use_valid[OF _ retype_region_cte_at_other])\n apply simp\n apply (fastforce simp:cte_wp_at_caps_of_state)\n apply (clarsimp simp:cte_wp_at_caps_of_state del: subsetI)\n apply (frule use_valid[OF _ retype_region_ret_folded], simp+)\n apply (rule order_trans, erule(1) retype_addrs_range_subset)\n apply (clarsimp simp: is_cap_simps word_and_le2 del: subsetI)\n done\n\ncontext Untyped_AI begin\n\nlemma invoke_untyp_invs':\n assumes create_cap_Q: \"\\tp sz cref slot oref reset ptr us slots dev.\n ui = Invocations_A.Retype slot reset (ptr && ~~ mask sz) ptr tp us slots dev\n \\ \\invs and Q and cte_wp_at (\\c. is_untyped_cap c\n \\ cap_range (default_cap tp oref us dev) \\ untyped_range c\n \\ {oref .. oref + 2 ^ (obj_bits_api tp us) - 1} \\ untyped_range c) slot\n and cte_wp_at ((=) NullCap) cref\n and K (cref \\ set slots \\ oref \\ set (retype_addrs ptr tp (length slots) us))\n and K (range_cover ptr sz (obj_bits_api tp us) (length slots))\\\n create_cap tp us slot dev (cref,oref) \\\\_. Q\\\"\n assumes init_arch_Q: \"\\tp slot reset sz slots ptr n us refs dev.\n ui = Invocations_A.Retype slot reset (ptr && ~~ mask sz) ptr tp us slots dev\n \\ \\Q and post_retype_invs tp refs\n and cte_wp_at (\\c. \\idx. c = cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) slot\n and K (refs = retype_addrs ptr tp n us\n \\ range_cover ptr sz (obj_bits_api tp us) n)\\\n init_arch_objects tp ptr n us refs \\\\_. Q\\\"\n assumes retype_region_Q: \"\\ptr us tp slot reset sz slots dev.\n ui = Invocations_A.Retype slot reset (ptr && ~~ mask sz) ptr tp us slots dev\n \\ \\\\s. invs s \\ Q s\n \\ cte_wp_at (\\c. \\idx. c = cap.UntypedCap dev (ptr && ~~ mask sz) sz idx) slot s\n \\ pspace_no_overlap {ptr..(ptr && ~~ mask sz) + (2 ^ sz - 1)} s\n \\ range_cover ptr sz (obj_bits_api tp us) (length slots)\n \\ (tp = CapTableObject \\ 0 < us)\n \\ caps_overlap_reserved {ptr..ptr + of_nat ((length slots) * 2 ^ obj_bits_api tp us) - 1} s\n \\ caps_no_overlap ptr sz s \\\n retype_region ptr (length slots) us tp dev \\\\_.Q\\\"\n assumes set_cap_Q[wp]: \"\\ptr sz idx cref dev.\n \\\\s. Q s \\ invs s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr) cref s\n \\ (case ui of Invocations_A.Retype slot reset ptr' ptr tp us slots dev'\n \\ cref = slot \\ dev' = dev)\n \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv. Q\\\"\n assumes reset_Q: \"\\Q'\\ reset_untyped_cap (case ui of Retype src_slot _ _ _ _ _ _ _ \\ src_slot) \\\\_. Q\\\"\n shows\n \"\\(invs ::'state_ext state \\ bool)\n and (\\s. (case ui of Retype _ reset _ _ _ _ _ _ \\ reset) \\ Q' s)\n and Q and valid_untyped_inv ui and ct_active\\\n invoke_untyped ui \\\\rv s. invs s \\ Q s\\, \\\\_ s. invs s \\ Q s\\\"\n apply (cases ui)\n apply (rule hoare_name_pre_stateE)\n apply (clarsimp simp only: valid_untyped_inv_wcap untyped_invocation.simps)\n proof -\n fix cref oref reset ptr_base ptr tp us slots s sz idx dev\n assume ui: \"ui = Retype (cref, oref) reset ptr_base ptr tp us slots dev\"\n assume Q: \"Q s\" and Q': \"reset \\ Q' s\"\n assume invs: \"invs s\" \"ct_active s\"\n assume vui: \"valid_untyped_inv_wcap (Retype (cref, oref) reset ptr_base ptr tp us slots dev)\n (Some (UntypedCap dev (ptr && ~~ mask sz) sz idx)) s\"\n (is \"valid_untyped_inv_wcap _ (Some ?orig_cap) s\")\n\n have cte_at: \"cte_wp_at ((=) ?orig_cap) (cref,oref) s\"\n (is \"?cte_cond s\")\n using vui by (clarsimp simp add:cte_wp_at_caps_of_state)\n\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps\n atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex\n\n note neg_mask_add_mask = word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr,symmetric]\n\n have p_neq_0:\"ptr \\ 0\"\n using cte_at invs\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid)+\n apply (simp add:valid_cap_def)\n done\n\n have cover: \"range_cover ptr sz (obj_bits_api tp us) (length slots)\"\n using vui\n by (clarsimp simp:cte_wp_at_caps_of_state)\n\n note neg_mask_add_mask = word_plus_and_or_coroll2[symmetric,where w = \"mask sz\" and t = ptr,symmetric]\n\n note set_cap_free_index_invs_spec = set_free_index_invs[where\n cap = \"cap.UntypedCap dev (ptr && ~~ mask sz) sz (if reset then 0 else idx)\",\n unfolded free_index_update_def free_index_of_def,simplified]\n\n have slot_not_in: \"(cref, oref) \\ set slots\"\n using vui cte_at\n by (auto simp: cte_wp_at_caps_of_state)\n\n note reset_Q' = reset_Q[simplified ui, simplified]\n\n have ptr_base: \"ptr_base = ptr && ~~ mask sz\"\n using vui by (clarsimp simp: cte_wp_at_caps_of_state)\n\n note ui' = ui[unfolded ptr_base]\n\n note msimp[simp] = neg_mask_add_mask\n let ?ui = \"Retype (cref, oref) reset ptr_base ptr tp us slots dev\"\n show \"\\(=) s\\ invoke_untyped ?ui \\\\rv s. invs s \\ Q s\\, \\\\_ s. invs s \\ Q s\\\"\n using cover\n apply (simp add:mapM_x_def[symmetric] invoke_untyped_def)\n apply (rule_tac B=\"\\_ s. invs s \\ Q s \\ ct_active s\n \\ valid_untyped_inv_wcap ?ui\n (Some (UntypedCap dev (ptr && ~~ mask sz) sz (if reset then 0 else idx))) s\n \\ (reset \\ pspace_no_overlap {ptr && ~~ mask sz..(ptr && ~~ mask sz) + 2 ^ sz - 1} s)\n \" in hoare_vcg_seqE[rotated])\n apply (simp only: whenE_def)\n apply (rule hoare_pre, wp)\n apply (rule hoare_post_impErr, rule combine_validE,\n rule reset_untyped_cap_invs_etc, rule valid_validE, rule reset_Q')\n apply (clarsimp simp only: pred_conj_def if_True, blast)\n apply (wp | simp)+\n apply (cut_tac vui Q Q' invs)\n apply (clarsimp simp: cte_wp_at_caps_of_state slot_not_in)\n apply blast\n\n apply (simp add: cte_wp_at_conj ball_conj_distrib\n split del: if_split\n | wp hoare_vcg_const_Ball_lift set_tuple_pick\n retype_region_ex_cte_cap_to [where sz = sz]\n retype_region_obj_ref_range [where sz = sz]\n hoare_vcg_all_lift\n [of _ _ \"%a _ p. \\b. ~ cte_wp_at P (a,b) p\" for P]\n hoare_vcg_all_lift\n [of _ _ \"%b _ p. ~ cte_wp_at P (a,b) p\" for P a]\n retype_region_not_cte_wp_at [where sz = sz]\n init_arch_objects_invs_from_restricted\n retype_ret_valid_caps [where sz = sz]\n retype_region_global_refs_disjoint [where sz = sz]\n retype_region_post_retype_invs [where sz = sz]\n retype_region_cte_at_other[where sz = sz]\n retype_region_invs_extras[where sz = sz]\n retype_region_ranges [where sz = sz]\n retype_region_ranges_obj_bits_api[where sz=sz]\n retype_region_caps_reserved [where sz = sz]\n retype_region_distinct_sets [where sz = sz]\n create_caps_invs[where ptr=ptr and slots=slots and us=us]\n create_cap_Q[OF ui']\n init_arch_Q[OF ui']\n retype_region_Q[OF ui']\n retype_region_descendants_range_ret[where sz = sz]\n retype_region_obj_at_other2\n [where P=\"is_cap_table n\" for n]\n distinct_tuple_helper\n init_arch_objects_wps\n init_arch_objects_nonempty_table\n | wp (once) retype_region_ret_folded_general)+\n apply ((wp hoare_vcg_const_imp_lift hoare_drop_imp\n retype_region_invs_extras[where sz = sz]\n retype_region_aligned_for_init[where sz = sz]\n set_free_index_invs_UntypedCap\n set_cap_caps_no_overlap set_cap_no_overlap\n set_untyped_cap_caps_overlap_reserved\n | strengthen tup_in_fst_image_set_zipD[mk_strg D]\n distinct_map_fst_zip\n | simp add: ptr_base\n | wp (once) retype_region_ret_folded_general)+)[1]\n apply (clarsimp simp:conj_comms,simp cong:conj_cong)\n apply (simp add:ball_conj_distrib conj_comms)\n apply (strengthen invs_mdb invs_valid_pspace\n caps_region_kernel_window_imp[where p=\"(cref, oref)\"]\n invs_cap_refs_in_kernel_window\n exI[where x=\"(cref, oref)\"]\n | clarsimp simp: conj_comms\n | simp cong: conj_cong)+\n apply (rule_tac P = \"bits_of cap = sz\"\n in hoare_gen_asm)\n apply (simp add:bits_of_def)\n apply (wp set_cap_no_overlap hoare_vcg_ball_lift\n set_free_index_invs_UntypedCap\n set_cap_cte_wp_at set_cap_descendants_range_in\n set_cap_caps_no_overlap\n set_untyped_cap_caps_overlap_reserved[where\n idx=\"if reset then 0 else idx\"]\n set_cap_cte_cap_wp_to\n hoare_vcg_ex_lift\n | wp (once) hoare_drop_imps)+\n apply (wp set_cap_cte_wp_at_neg hoare_vcg_all_lift get_cap_wp)+\n\n apply (clarsimp simp: slot_not_in field_simps ui free_index_of_def\n split del: if_split)\n apply ((strengthen cover refl)+)?\n apply (simp only: cte_wp_at_caps_of_state, clarify,\n simp only: option.simps, simp(no_asm_use) split del: if_split, clarify)\n apply (clarsimp simp: bits_of_def untyped_range.simps\n if_split[where P=\"\\v. v \\ unat x\" for x])\n\n apply (frule(1) valid_global_refsD2[OF _ invs_valid_global_refs])\n apply (clarsimp simp:cte_wp_at_caps_of_state untyped_range.simps\n conj_comms\n split del: if_split)\n apply (frule invoke_untyped_proofs.intro[where cref=\"(cref, oref)\" and reset=reset, rotated 1],\n simp_all add: cte_wp_at_caps_of_state split del: if_split)\n apply (rule conjI, (rule refl | assumption))+\n apply clarsimp\n apply (simp add: invoke_untyped_proofs.simps p_neq_0)\n apply (simp add: arg_cong[OF mask_out_sub_mask, where f=\"\\y. x - y\" for x]\n field_simps invoke_untyped_proofs.idx_le_new_offs\n invoke_untyped_proofs.idx_compare'\n exI invoke_untyped_proofs.simps\n word_bw_assocs)\n apply (frule cte_wp_at_pspace_no_overlapI,\n simp add: cte_wp_at_caps_of_state, simp+,\n simp add: invoke_untyped_proofs.szw)\n apply (cut_tac s=s in obj_is_device_vui_eq[where ui=ui])\n apply (clarsimp simp: ui cte_wp_at_caps_of_state)\n apply (simp_all add: field_simps ui)\n\n apply (intro conjI)\n\n (* slots not in retype_addrs *)\n apply (clarsimp dest!:retype_addrs_subset_ptr_bits)\n apply (drule(1) invoke_untyped_proofs.slots_invD)\n apply (drule(1) subsetD)\n apply (simp add:p_assoc_help)\n\n (* not global refs*)\n apply (simp add: Int_commute, erule disjoint_subset2[rotated])\n apply (simp add: atLeastatMost_subset_iff word_and_le2)\n\n (* idx less_eq new offs *)\n apply (auto dest: invoke_untyped_proofs.idx_le_new_offs)[1]\n\n (* not empty tables *)\n apply clarsimp\n apply (drule(1) pspace_no_overlap_obj_not_in_range, clarsimp+)[1]\n\n (* set ineqs *)\n apply (simp add: atLeastatMost_subset_iff word_and_le2)\n\n apply (erule order_trans[OF invoke_untyped_proofs.subset_stuff])\n apply (simp add: atLeastatMost_subset_iff word_and_le2)\n\n (* new untyped range disjoint *)\n apply (drule invoke_untyped_proofs.usable_range_disjoint)\n apply (clarsimp simp: field_simps mask_out_sub_mask shiftl_t2n)\n\n (* something about caps *)\n apply clarsimp\n apply (frule untyped_mdb_descendants_range, clarsimp+,\n erule invoke_untyped_proofs.descendants_range, simp_all+)[1]\n apply (simp add: untyped_range_def atLeastatMost_subset_iff word_and_le2)\n done\nqed\n\nlemmas invoke_untyp_invs[wp] =\n invoke_untyp_invs'[where Q=\\ and Q'=\\, simplified,\n simplified hoare_post_taut, simplified]\n\nlemmas invoke_untyped_Q\n = invoke_untyp_invs'[THEN validE_valid, THEN hoare_conjD2[unfolded pred_conj_def]]\n\nlemma invoke_untyped_st_tcb_at[wp]:\n \"\\invs and st_tcb_at (P and (Not \\ inactive) and (Not \\ idle)) t\n and ct_active and valid_untyped_inv ui\\\n invoke_untyped ui\n \\\\rv. \\s :: 'state_ext state. st_tcb_at P t s\\\"\n apply (rule hoare_pre, rule invoke_untyped_Q,\n (wp init_arch_objects_wps | simp)+)\n apply (rule hoare_name_pre_state, clarsimp)\n apply (wp retype_region_st_tcb_at, auto)[1]\n apply (wp reset_untyped_cap_st_tcb_at | simp)+\n apply (cases ui, clarsimp)\n apply (strengthen st_tcb_weakenE[mk_strg I E], clarsimp)\n apply (frule(1) st_tcb_ex_cap[OF _ invs_iflive])\n apply (clarsimp split: Structures_A.thread_state.splits)\n apply (drule ex_nonz_cap_to_overlap,\n ((simp add:cte_wp_at_caps_of_state\n is_cap_simps descendants_range_def2\n empty_descendants_range_in)+))\n done\n\nlemma invoked_untyp_tcb[wp]:\n \"\\invs and st_tcb_at active tptr\n and valid_untyped_inv ui and ct_active\\\n invoke_untyped ui \\\\rv. \\s :: 'state_ext state. tcb_at tptr s\\\"\n apply (simp add: tcb_at_st_tcb_at)\n apply (rule hoare_pre, wp invoke_untyped_st_tcb_at)\n apply (clarsimp elim!: pred_tcb_weakenE)\n apply fastforce\n done\n\nend\n\nlemma sts_mdb[wp]:\n \"\\\\s. P (cdt s)\\ set_thread_state t st \\\\rv s. P (cdt s)\\\"\n by (simp add: set_thread_state_def | wp)+\n\nlemma sts_ex_cap[wp]:\n \"\\ex_cte_cap_wp_to P p\\ set_thread_state t st \\\\rv. ex_cte_cap_wp_to P p\\\"\n by (wp ex_cte_cap_to_pres)\n\nlemmas sts_real_cte_at[wp] =\n cap_table_at_lift_valid [OF set_thread_state_typ_at]\n\nlemma sts_valid_untyped_inv:\n \"\\valid_untyped_inv ui\\ set_thread_state t st \\\\rv. valid_untyped_inv ui\\\"\n apply (cases ui, simp add: descendants_range_in_def)\n apply (wp hoare_vcg_const_Ball_lift hoare_vcg_ex_lift hoare_vcg_imp_lift | wps)+\n apply clarsimp\n done\n\nlemma update_untyped_cap_valid_objs:\n \"\\ valid_objs and valid_cap cap\n and cte_wp_at (is_untyped_cap) p and K (is_untyped_cap cap)\\\n set_cap cap p \\ \\rv. valid_objs \\\"\n apply (wp set_cap_valid_objs)\n apply (clarsimp simp: is_cap_simps cte_wp_at_caps_of_state)\n apply (drule tcb_cap_valid_caps_of_stateD, simp+)\n apply (simp add: tcb_cap_valid_untyped_to_thread)\n done\n\nlemma valid_untyped_pspace_no_overlap:\n \"pspace_no_overlap {ptr .. ptr + 2 ^ sz - 1} s\n \\ valid_untyped (cap.UntypedCap dev ptr sz idx) s\"\n apply (clarsimp simp: valid_untyped_def split del: if_split)\n apply (drule(1) pspace_no_overlap_obj_range)\n apply simp\n done\n\n(* FIXME: move *)\nlemma snd_set_zip_in_set:\n \"x\\ snd ` set (zip a b) \\ x\\ set b\"\n apply (clarsimp)\n apply (erule in_set_zipE)\n apply simp\n done\n\nend\n", "meta": {"author": "NICTA", "repo": "l4v", "sha": "3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b", "save_path": "github-repos/isabelle/NICTA-l4v", "path": "github-repos/isabelle/NICTA-l4v/l4v-3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b/proof/invariant-abstract/Untyped_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.523420348936324, "lm_q2_score": 0.2720245392906821, "lm_q1q2_score": 0.14238317927477162}} {"text": "(* Title: Aodv_Message.thy\n License: BSD 2-Clause. See LICENSE.\n Author: Timothy Bourke, Inria\n*)\n\nsection \"AODV protocol messages\"\n\ntheory Aodv_Message\nimports Aodv_Basic\nbegin\n\ndatatype msg =\n Rreq nat rreqid ip sqn k ip sqn ip\n | Rrep nat ip sqn ip ip\n | Rerr \"ip \\ sqn\" ip\n | Newpkt data ip\n | Pkt data ip ip\n\ninstantiation msg :: msg\nbegin\n definition newpkt_def [simp]: \"newpkt \\ \\(d, dip). Newpkt d dip\"\n definition eq_newpkt_def: \"eq_newpkt m \\ case m of Newpkt d dip \\ True | _ \\ False\"\n\n instance by intro_classes (simp add: eq_newpkt_def)\nend\n\ntext \\The @{type msg} type models the different messages used within AODV.\n The instantiation as a @{class msg} is a technicality due to the special\n treatment of @{term newpkt} messages in the AWN SOS rules.\n This use of classes allows a clean separation of the AWN-specific definitions\n and these AODV-specific definitions.\\\n\ndefinition rreq :: \"nat \\ rreqid \\ ip \\ sqn \\ k \\ ip \\ sqn \\ ip \\ msg\"\n where \"rreq \\ \\(hops, rreqid, dip, dsn, dsk, oip, osn, sip).\n Rreq hops rreqid dip dsn dsk oip osn sip\"\n\nlemma rreq_simp [simp]:\n \"rreq(hops, rreqid, dip, dsn, dsk, oip, osn, sip) = Rreq hops rreqid dip dsn dsk oip osn sip\"\n unfolding rreq_def by simp\n\ndefinition rrep :: \"nat \\ ip \\ sqn \\ ip \\ ip \\ msg\"\n where \"rrep \\ \\(hops, dip, dsn, oip, sip). Rrep hops dip dsn oip sip\"\n\nlemma rrep_simp [simp]:\n \"rrep(hops, dip, dsn, oip, sip) = Rrep hops dip dsn oip sip\"\n unfolding rrep_def by simp\n\ndefinition rerr :: \"(ip \\ sqn) \\ ip \\ msg\"\n where \"rerr \\ \\(dests, sip). Rerr dests sip\"\n\nlemma rerr_simp [simp]:\n \"rerr(dests, sip) = Rerr dests sip\"\n unfolding rerr_def by simp\n\nlemma not_eq_newpkt_rreq [simp]: \"\\eq_newpkt (Rreq hops rreqid dip dsn dsk oip osn sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_rrep [simp]: \"\\eq_newpkt (Rrep hops dip dsn oip sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_rerr [simp]: \"\\eq_newpkt (Rerr dests sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_pkt [simp]: \"\\eq_newpkt (Pkt d dip sip)\"\n unfolding eq_newpkt_def by simp\n\ndefinition pkt :: \"data \\ ip \\ ip \\ msg\"\n where \"pkt \\ \\(d, dip, sip). Pkt d dip sip\"\n\nlemma pkt_simp [simp]:\n \"pkt(d, dip, sip) = Pkt d dip sip\"\n unfolding pkt_def by simp\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/AODV/Aodv_Message.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5234203340678567, "lm_q2_score": 0.2720245451923523, "lm_q1q2_score": 0.14238317831923783}} {"text": "(* Title: HOL/Auth/n_flash_nodata_cub_lemma_on_inv__30.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_flash_nodata_cub Protocol Case Study*} \n\ntheory n_flash_nodata_cub_lemma_on_inv__30 imports n_flash_nodata_cub_base\nbegin\nsection{*All lemmas on causal relation between inv__30 and some rule r*}\nlemma n_PI_Remote_PutXVsinv__30:\nassumes a1: \"(\\ dst. dst\\N\\r=n_PI_Remote_PutX dst)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain dst where a1:\"dst\\N\\r=n_PI_Remote_PutX dst\" apply fastforce done\n have \"?P3 s\"\n apply (cut_tac a1 a2 , simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Para (Field (Ident ''Sta'') ''Proc'') dst) ''CacheState'')) (Const CACHE_E)) (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Dirty'')) (Const false))))\" in exI, auto) done\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_Get_Put_DirtyVsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Put_Dirty src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_Get_Put_Dirty src\" apply fastforce done\n have \"?P3 s\"\n apply (cut_tac a1 a2 , simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Field (Ident ''Sta'') ''WbMsg'') ''Cmd'')) (Const WB_Wb)) (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Local'')) (Const true))))\" in exI, auto) done\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_1Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_1 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_1 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_2Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_2 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_2 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_3Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_3 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_3 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_4Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_4 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_4 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_5Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_5 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_5 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_6Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_6 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_6 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_7__part__0Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__0 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_7__part__0 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_7__part__1Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__1 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_7__part__1 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_7_NODE_Get__part__0Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__0 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__0 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_7_NODE_Get__part__1Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__1 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__1 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_8_HomeVsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_8_Home N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_8_Home_NODE_GetVsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home_NODE_Get N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_8_Home_NODE_Get N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_8Vsinv__30:\nassumes a1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8 N src pp)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src pp where a1:\"src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8 N src pp\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_8_NODE_GetVsinv__30:\nassumes a1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8_NODE_Get N src pp)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src pp where a1:\"src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8_NODE_Get N src pp\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_9__part__0Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__0 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_9__part__0 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_9__part__1Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__1 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_9__part__1 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_10_HomeVsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_10_Home N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_10_Home N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_10Vsinv__30:\nassumes a1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_10 N src pp)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src pp where a1:\"src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_10 N src pp\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_GetX_PutX_11Vsinv__30:\nassumes a1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_11 N src)\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nfrom a1 obtain src where a1:\"src\\N\\r=n_NI_Local_GetX_PutX_11 N src\" apply fastforce done\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_PI_Local_GetX_PutX_HeadVld__part__0Vsinv__30:\nassumes a1: \"(r=n_PI_Local_GetX_PutX_HeadVld__part__0 N )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_PI_Local_GetX_PutX_HeadVld__part__1Vsinv__30:\nassumes a1: \"(r=n_PI_Local_GetX_PutX_HeadVld__part__1 N )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_PI_Local_GetX_PutX__part__0Vsinv__30:\nassumes a1: \"(r=n_PI_Local_GetX_PutX__part__0 )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_PI_Local_GetX_PutX__part__1Vsinv__30:\nassumes a1: \"(r=n_PI_Local_GetX_PutX__part__1 )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_PI_Local_PutXVsinv__30:\nassumes a1: \"(r=n_PI_Local_PutX )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\nhave \"((formEval (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Pending'')) (Const true)) s))\\((formEval (neg (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Pending'')) (Const true))) s))\" by auto\n moreover {\n assume c1: \"((formEval (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Pending'')) (Const true)) s))\"\n have \"?P3 s\"\n apply (cut_tac a1 a2 c1, simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Field (Ident ''Sta'') ''HomeProc'') ''CacheState'')) (Const CACHE_E)) (eqn (IVar (Field (Field (Ident ''Sta'') ''WbMsg'') ''Cmd'')) (Const WB_Wb))))\" in exI, auto) done\n then have \"invHoldForRule s f r (invariants N)\" by auto\n }\n moreover {\n assume c1: \"((formEval (neg (eqn (IVar (Field (Field (Ident ''Sta'') ''Dir'') ''Pending'')) (Const true))) s))\"\n have \"?P3 s\"\n apply (cut_tac a1 a2 c1, simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Field (Ident ''Sta'') ''HomeProc'') ''CacheState'')) (Const CACHE_E)) (eqn (IVar (Field (Field (Ident ''Sta'') ''WbMsg'') ''Cmd'')) (Const WB_Wb))))\" in exI, auto) done\n then have \"invHoldForRule s f r (invariants N)\" by auto\n }\nultimately show \"invHoldForRule s f r (invariants N)\" by satx\nqed\n\nlemma n_NI_Local_PutVsinv__30:\nassumes a1: \"(r=n_NI_Local_Put )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P3 s\"\n apply (cut_tac a1 a2 , simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Field (Ident ''Sta'') ''WbMsg'') ''Cmd'')) (Const WB_Wb)) (eqn (IVar (Field (Field (Ident ''Sta'') ''HomeUniMsg'') ''Cmd'')) (Const UNI_Put))))\" in exI, auto) done\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_WbVsinv__30:\nassumes a1: \"(r=n_NI_Wb )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P1 s\"\n proof(cut_tac a1 a2 , auto) qed\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_ShWbVsinv__30:\nassumes a1: \"(r=n_NI_ShWb N )\" and\na2: \"(f=inv__30 )\"\nshows \"invHoldForRule s f r (invariants N)\" (is \"?P1 s \\ ?P2 s \\ ?P3 s\")\nproof -\n have \"?P3 s\"\n apply (cut_tac a1 a2 , simp, rule_tac x=\"(neg (andForm (eqn (IVar (Field (Field (Ident ''Sta'') ''WbMsg'') ''Cmd'')) (Const WB_Wb)) (eqn (IVar (Field (Field (Ident ''Sta'') ''ShWbMsg'') ''Cmd'')) (Const SHWB_ShWb))))\" in exI, auto) done\n then show \"invHoldForRule s f r (invariants N)\" by auto\nqed\n\nlemma n_NI_Local_Get_Get__part__1Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Get__part__1 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_GetX_PutX_HomeVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_GetX_PutX_Home dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Remote_GetVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_PI_Remote_Get src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_GetX_GetX__part__1Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__1 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvAck_3Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_InvAck_3 N src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvAck_1Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_InvAck_1 N src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Local_GetX_GetX__part__1Vsinv__30:\n assumes a1: \"r=n_PI_Local_GetX_GetX__part__1 \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Local_GetX_GetX__part__0Vsinv__30:\n assumes a1: \"r=n_PI_Local_GetX_GetX__part__0 \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Remote_ReplaceVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_PI_Remote_Replace src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Local_ReplaceVsinv__30:\n assumes a1: \"r=n_PI_Local_Replace \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_GetX_Nak__part__1Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__1 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_Nak__part__1Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__1 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_Get__part__0Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Get__part__0 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvAck_existsVsinv__30:\n assumes a1: \"\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_InvAck_exists src pp\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_GetX_Nak__part__2Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__2 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_Get_Put_HomeVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_Get_Put_Home dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_Put_HeadVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Put_Head N src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Inv dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_Nak__part__2Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__2 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_GetX_GetX__part__0Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__0 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Local_Get_PutVsinv__30:\n assumes a1: \"r=n_PI_Local_Get_Put \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_ReplaceVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Replace src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_GetX_Nak_HomeVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_GetX_Nak_Home dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_PutXAcksDoneVsinv__30:\n assumes a1: \"r=n_NI_Local_PutXAcksDone \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_GetX_NakVsinv__30:\n assumes a1: \"\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_Nak src dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_NakVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Nak dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Remote_GetXVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_PI_Remote_GetX src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_Get_Nak_HomeVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_Get_Nak_Home dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_PutXVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_PutX dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_PutVsinv__30:\n assumes a1: \"\\ dst. dst\\N\\r=n_NI_Remote_Put dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_PutVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Put src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_GetX_Nak__part__0Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__0 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvAck_exists_HomeVsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_InvAck_exists_Home src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Replace_HomeVsinv__30:\n assumes a1: \"r=n_NI_Replace_Home \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_GetX_PutXVsinv__30:\n assumes a1: \"\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_PutX src dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_Get_NakVsinv__30:\n assumes a1: \"\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Nak src dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Nak_ClearVsinv__30:\n assumes a1: \"r=n_NI_Nak_Clear \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Local_Get_Nak__part__0Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__0 src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_PI_Local_Get_GetVsinv__30:\n assumes a1: \"r=n_PI_Local_Get_Get \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Remote_Get_PutVsinv__30:\n assumes a1: \"\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Put src dst\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_Nak_HomeVsinv__30:\n assumes a1: \"r=n_NI_Nak_Home \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_InvAck_2Vsinv__30:\n assumes a1: \"\\ src. src\\N\\r=n_NI_InvAck_2 N src\" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \n\nlemma n_NI_FAckVsinv__30:\n assumes a1: \"r=n_NI_FAck \" and\n a2: \"(f=inv__30 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n apply (rule noEffectOnRule, cut_tac a1 a2, auto) done\n \nend\n", "meta": {"author": "paraVerifier", "repo": "paraVerifier", "sha": "5de62b433a160bf8d714e0a5085a38b9dd8899f0", "save_path": "github-repos/isabelle/paraVerifier-paraVerifier", "path": "github-repos/isabelle/paraVerifier-paraVerifier/paraVerifier-5de62b433a160bf8d714e0a5085a38b9dd8899f0/proof_scripts/flash_without_data/n_flash_nodata_cub_lemma_on_inv__30.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5156199157230156, "lm_q2_score": 0.2751297238231752, "lm_q1q2_score": 0.14186236501060215}} {"text": "(* This work was done by Denis Lohner (denis.lohner@kit.edu). *)\n\nchapter \\A Control Flow Graph for Jinja Byte Code\\\n\nsection \\Formalizing the CFG\\\n\ntheory JVMCFG imports \"../Basic/BasicDefs\" Jinja.BVExample begin\n\n\ndeclare lesub_list_impl_same_size [simp del]\ndeclare nlistsE_length [simp del]\n\nsubsection \\Type definitions\\\n\nsubsubsection \\Wellformed Programs\\\n\ndefinition \"wf_jvmprog = {(P, Phi). wf_jvm_prog\\<^bsub>Phi\\<^esub> P}\"\n\ntypedef wf_jvmprog = wf_jvmprog\nproof\n show \"(E, Phi) \\ wf_jvmprog\"\n unfolding wf_jvmprog_def by (auto intro: wf_prog)\nqed\n\nhide_const Phi E\n\nabbreviation rep_jvmprog_jvm_prog :: \"wf_jvmprog \\ jvm_prog\"\n(\"_\\<^bsub>wf\\<^esub>\")\n where \"P\\<^bsub>wf\\<^esub> \\ fst(Rep_wf_jvmprog(P))\"\n\nabbreviation rep_jvmprog_phi :: \"wf_jvmprog \\ ty\\<^sub>P\"\n(\"_\\<^bsub>\\\\<^esub>\")\n where \"P\\<^bsub>\\\\<^esub> \\ snd(Rep_wf_jvmprog(P))\"\n\nlemma wf_jvmprog_is_wf: \"wf_jvm_prog\\<^bsub>P\\<^bsub>\\\\<^esub>\\<^esub> (P\\<^bsub>wf\\<^esub>)\"\nusing Rep_wf_jvmprog [of P]\n by (auto simp: wf_jvmprog_def split_beta)\n\nsubsubsection \\Basic Types\\\n\ntext \\\nWe consider a program to be a well-formed Jinja program,\ntogether with a given base class and a main method\n\\\n\ntype_synonym jvmprog = \"wf_jvmprog \\ cname \\ mname\"\ntype_synonym callstack = \"(cname \\ mname \\ pc) list\"\n\ntext \\\nThe state is modeled as $\\textrm{heap} \\times \\textrm{stack-variables} \\times \\textrm{local-variables}$\n\nstack and local variables are modeled as pairs of natural numbers. The first number\ngives the position in the call stack (i.e. the method in which the variable is used),\nthe second the position in the method's stack or array of local variables resp.\n\nThe stack variables are numbered from bottom up (which is the reverse order of the\narray for the stack in Jinja's state representation), whereas local variables are identified\nby their position in the array of local variables of Jinja's state representation.\n\\\n\ntype_synonym state = \"heap \\ ((nat \\ nat) \\ val) \\ ((nat \\ nat) \\ val)\"\n\n\nabbreviation heap_of :: \"state \\ heap\"\nwhere\n \"heap_of s \\ fst(s)\"\n\nabbreviation stk_of :: \"state \\ ((nat \\ nat) \\ val)\"\nwhere\n \"stk_of s \\ fst(snd(s))\"\n\nabbreviation loc_of :: \"state \\ ((nat \\ nat) \\ val)\"\nwhere\n \"loc_of s \\ snd(snd(s))\"\n\n\nsubsection \\Basic Definitions\\\n\nsubsubsection \\State update (instruction execution)\\\n\ntext \\\nThis function models instruction execution for our state representation.\n\nAdditional parameters are the call depth of the current program point,\nthe stack length of the current program point,\nthe length of the stack in the underlying call frame (needed for {\\sc Return}),\nand (for {\\sc Invoke}) the length of the array of local variables of the invoked method.\n\nException handling is not covered by this function.\n\\\n\nfun exec_instr :: \"instr \\ wf_jvmprog \\ state \\ nat \\ nat \\ nat \\ nat \\ state\"\nwhere\n exec_instr_Load:\n \"exec_instr (Load n) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s\n in (h, stk((calldepth,stk_length):=loc(calldepth,n)), loc))\"\n\n| exec_instr_Store:\n \"exec_instr (Store n) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s\n in (h, stk, loc((calldepth,n):=stk(calldepth,stk_length - 1))))\"\n\n| exec_instr_Push:\n \"exec_instr (Push v) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s\n in (h, stk((calldepth,stk_length):=v), loc))\"\n\n| exec_instr_New:\n \"exec_instr (New C) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s;\n a = the(new_Addr h)\n in (h(a \\ (blank (P\\<^bsub>wf\\<^esub>) C)), stk((calldepth,stk_length):=Addr a), loc))\"\n\n| exec_instr_Getfield:\n \"exec_instr (Getfield F C) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s;\n a = the_Addr (stk (calldepth,stk_length - 1));\n (D,fs) = the(h a)\n in (h, stk((calldepth,stk_length - 1) := the(fs(F,C))), loc))\"\n\n| exec_instr_Putfield:\n \"exec_instr (Putfield F C) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s;\n v = stk (calldepth,stk_length - 1);\n a = the_Addr (stk (calldepth,stk_length - 2));\n (D,fs) = the(h a)\n in (h(a \\ (D,fs((F,C) \\ v))), stk, loc))\"\n\n| exec_instr_Checkcast:\n \"exec_instr (Checkcast C) P s calldepth stk_length rs ill = s\"\n\n| exec_instr_Pop:\n \"exec_instr (Pop) P s calldepth stk_length rs ill = s\"\n\n| exec_instr_IAdd:\n \"exec_instr (IAdd) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s;\n i\\<^sub>1 = the_Intg (stk (calldepth, stk_length - 1));\n i\\<^sub>2 = the_Intg (stk (calldepth, stk_length - 2))\n in (h, stk((calldepth, stk_length - 2) := Intg (i\\<^sub>1 + i\\<^sub>2)), loc))\"\n\n| exec_instr_IfFalse:\n \"exec_instr (IfFalse b) P s calldepth stk_length rs ill = s\"\n\n| exec_instr_CmpEq:\n \"exec_instr (CmpEq) P s calldepth stk_length rs ill =\n (let (h,stk,loc) = s;\n v\\<^sub>1 = stk (calldepth, stk_length - 1);\n v\\<^sub>2 = stk (calldepth, stk_length - 2)\n in (h, stk((calldepth, stk_length - 2) := Bool (v\\<^sub>1 = v\\<^sub>2)), loc))\"\n\n| exec_instr_Goto:\n \"exec_instr (Goto i) P s calldepth stk_length rs ill = s\"\n \n| exec_instr_Throw:\n \"exec_instr (Throw) P s calldepth stk_length rs ill = s\"\n\n| exec_instr_Invoke:\n \"exec_instr (Invoke M n) P s calldepth stk_length rs invoke_loc_length =\n (let (h,stk,loc) = s;\n loc' = (\\(a,b). if (a \\ Suc calldepth \\ b \\ invoke_loc_length) then loc(a,b) else\n (if (b \\ n) then stk(calldepth, stk_length - (Suc n - b)) else arbitrary))\n in (h,stk,loc'))\"\n\n| exec_instr_Return:\n \"exec_instr (Return) P s calldepth stk_length ret_stk_length ill =\n (if (calldepth = 0)\n then s\n else\n (let (h,stk,loc) = s;\n v = stk(calldepth, stk_length - 1)\n in (h,stk((calldepth - 1, ret_stk_length - 1) := v),loc))\n )\"\n\n\nsubsubsection \\length of stack and local variables\\\n\ntext \\The following terms extract the stack length at a given program point\nfrom the well-typing of the given program\\\n\nabbreviation stkLength :: \"wf_jvmprog \\ cname \\ mname \\ pc \\ nat\"\n where\n \"stkLength P C M pc \\ length (fst(the(((P\\<^bsub>\\\\<^esub>) C M)!pc)))\"\n\nabbreviation locLength :: \"wf_jvmprog \\ cname \\ mname \\ pc \\ nat\"\n where\n \"locLength P C M pc \\ length (snd(the(((P\\<^bsub>\\\\<^esub>) C M)!pc)))\"\n\n\nsubsubsection \\Conversion functions\\\n\ntext \\\nThis function takes a natural number n and a function f with domain \\nat\\\nand creates the array [f 0, f 1, f 2, ..., f (n - 1)].\n\nThis is used for extracting the array of local variables\n\\\n\n(*\nfun locs :: \"nat \\ (nat \\ 'a) \\ 'a list\"\nwhere\n \"locs 0 loc = []\"\n| \"locs (Suc n) loc = (locs n loc)@[loc n]\"\n*)\n\nabbreviation locs :: \"nat \\ (nat \\ 'a) \\ 'a list\"\nwhere \"locs n loc \\ map loc [0..\nThis function takes a natural number n and a function f with domain \\nat\\\nand creates the array [f (n - 1), ..., f 1, f 0].\n\nThis is used for extracting the stack as a list\n\\\n\n(*\nfun stks :: \"nat \\ (nat \\ 'a) \\ 'a list\"\nwhere\n \"stks 0 stk = []\"\n| \"stks (Suc n) stk = (stk n)#(stks n stk)\"\n*)\n\nabbreviation stks :: \"nat \\ (nat \\ 'a) \\ 'a list\"\nwhere \"stks n stk \\ map stk (rev [0..\nThis function creates a list of the arrays for local variables from the given state\ncorresponding to the given callstack\n\\\n\nfun locss :: \"wf_jvmprog \\ callstack \\ ((nat \\ nat) \\ 'a) \\ 'a list list\"\nwhere\n \"locss P [] loc = []\"\n| \"locss P ((C,M,pc)#cs) loc =\n (locs (locLength P C M pc) (\\a. loc (length cs, a)))#(locss P cs loc)\"\n\ntext \\\nThis function creates a list of the (methods') stacks from the given state\ncorresponding to the given callstack\n\\\n\nfun stkss :: \"wf_jvmprog \\ callstack \\ ((nat \\ nat) \\ 'a) \\ 'a list list\"\nwhere\n \"stkss P [] stk = []\"\n| \"stkss P ((C,M,pc)#cs) stk =\n (stks (stkLength P C M pc) (\\a. stk (length cs, a)))#(stkss P cs stk)\"\n\ntext \\Given a callstack and a state, this abbreviation converts the state\nto Jinja's state representation\n\\\n\nabbreviation state_to_jvm_state :: \"wf_jvmprog \\ callstack \\ state \\ jvm_state\"\nwhere \"state_to_jvm_state P cs s \\ \n (None, heap_of s, zip (stkss P cs (stk_of s)) (zip (locss P cs (loc_of s)) cs))\"\n\ntext \\This function extracts the call stack from a given frame stack (as it is given\nby Jinja's state representation)\n\\\n\ndefinition framestack_to_callstack :: \"frame list \\ callstack\"\nwhere \"framestack_to_callstack frs \\ map snd (map snd frs)\"\n\n\nsubsubsection \\State Conformance\\\n\ntext \\Now we lift byte code verifier conformance to our state representation\\\n\ndefinition bv_conform :: \"wf_jvmprog \\ callstack \\ state \\ bool\"\n (\"_,_ \\\\<^bsub>BV\\<^esub> _ \\\")\nwhere \"P,cs \\\\<^bsub>BV\\<^esub> s \\ \\ correct_state (P\\<^bsub>wf\\<^esub>) (P\\<^bsub>\\\\<^esub>) (state_to_jvm_state P cs s)\"\n\n\nsubsubsection \\Statically determine catch-block\\\n\ntext \\This function is equivalent to Jinja's \\find_handler\\ function\\\nfun find_handler_for :: \"wf_jvmprog \\ cname \\ callstack \\ callstack\"\nwhere\n \"find_handler_for P C [] = []\"\n| \"find_handler_for P C (c#cs) = (let (C',M',pc') = c in\n (case match_ex_table (P\\<^bsub>wf\\<^esub>) C pc' (ex_table_of (P\\<^bsub>wf\\<^esub>) C' M') of\n None \\ find_handler_for P C cs\n | Some pc_d \\ (C', M', fst pc_d)#cs))\"\n\n\nsubsection \\Simplification lemmas\\\n\nlemma find_handler_decr [simp]: \"find_handler_for P Exc cs \\ c#cs\"\nproof\n assume \"find_handler_for P Exc cs = c#cs\"\n hence \"length cs < length (find_handler_for P Exc cs)\" by simp\n thus False by (induct cs, auto)\nqed\n\n(*\nlemma locs_length [simp]: \"length (locs n loc) = n\"\n by (induct n) auto\n\nlemma stks_length [simp]: \"length (stks n stk) = n\"\n by (induct n) auto\n*)\n\nlemma stkss_length [simp]: \"length (stkss P cs stk) = length cs\"\n by (induct cs) auto\n\nlemma locss_length [simp]: \"length (locss P cs loc) = length cs\"\n by (induct cs) auto\n\n(*\nlemma nth_stks: \"b < n \\ stks n stk ! b = stk(n - Suc b)\"\n by (auto simp: rev_nth)\nproof (induct n arbitrary: b)\n case (0 b)\n thus ?case by simp\nnext\n case (Suc n b)\n thus ?case\n by (auto simp: nth_Cons' less_Suc_eq)\nqed\n*)\n\nlemma nth_stkss: \n \"\\ a < length cs; b < length (stkss P cs stk ! (length cs - Suc a)) \\\n \\ stkss P cs stk ! (length cs - Suc a) ! \n (length (stkss P cs stk ! (length cs - Suc a)) - Suc b) = stk (a,b)\"\nproof (induct cs)\n case Nil\n thus ?case by (simp add: nth_Cons')\nnext\n case (Cons aa cs)\n thus ?case\n by (cases aa, auto simp add: nth_Cons' rev_nth less_Suc_eq)\nqed\n\n(*\nlemma nth_locs: \"b < n \\ locs n loc ! b = loc b\"\nproof (induct n)\n case 0\n thus ?case by simp\nnext\n case (Suc n)\n thus ?case\n by (auto simp: nth_append less_Suc_eq)\nqed\n*)\n\nlemma nth_locss:\n \"\\ a < length cs; b < length (locss P cs loc ! (length cs - Suc a)) \\\n \\ locss P cs loc ! (length cs - Suc a) ! b = loc (a,b)\"\nproof (induct cs)\n case Nil\n thus ?case by (simp add: nth_Cons')\nnext\n case (Cons aa cs)\n thus ?case\n by (cases aa, auto simp: nth_Cons' (* nth_locs *) less_Suc_eq)\nqed\n\nlemma hd_stks [simp]: \"n \\ 0 \\ hd (stks n stk) = stk(n - 1)\"\n by (cases n, simp_all)\n\nlemma hd_tl_stks: \"n > 1 \\ hd (tl (stks n stk)) = stk(n - 2)\"\n by (cases n, auto)\n\n(*\nlemma stks_purge:\n \"d \\ b \\ stks b (stk(d := e)) = stks b stk\"\n by (induct b, auto)\n\nlemma stks_purge':\n \"d \\ b \\ stks b (\\x. if x = d then e else stk x) = stks b stk\"\n by (fold fun_upd_def, simp only: stks_purge)\n*)\n\nlemma stkss_purge:\n \"length cs \\ a \\ stkss P cs (stk((a,b) := c)) = stkss P cs stk\"\n by (induct cs, auto (* simp: stks_purge *))\n\nlemma stkss_purge':\n \"length cs \\ a \\ stkss P cs (\\s. if s = (a, b) then c else stk s) = stkss P cs stk\"\n by (fold fun_upd_def, simp only: stkss_purge)\n\n(*\nlemma locs_purge:\n \"d \\ b \\ locs b (loc(d := e)) = locs b loc\"\n by (induct b, auto)\n\nlemma locs_purge':\n \"d \\ b \\ locs b (\\b. if b = d then e else loc b) = locs b loc\"\n by (fold fun_upd_def, simp only: locs_purge)\n*)\n \nlemma locss_purge:\n \"length cs \\ a \\ locss P cs (loc((a,b) := c)) = locss P cs loc\"\n by (induct cs, auto (*simp: locs_purge *))\n\nlemma locss_purge':\n \"length cs \\ a \\ locss P cs (\\s. if s = (a, b) then c else loc s) = locss P cs loc\"\n by (fold fun_upd_def, simp only: locss_purge)\n\nlemma locs_pullout [simp]:\n \"locs b (loc(n := e)) = (locs b loc) [n := e]\"\nproof (induct b)\n case 0\n thus ?case by simp\nnext\n case (Suc b)\n thus ?case\n by (cases \"n - b\", auto simp: list_update_append not_less_eq less_Suc_eq)\nqed\n\nlemma locs_pullout' [simp]:\n \"locs b (\\a. if a = n then e else loc (c, a)) = (locs b (\\a. loc (c, a))) [n := e]\"\n by (fold fun_upd_def) simp\n\nlemma stks_pullout:\n \"n < b \\ stks b (stk(n := e)) = (stks b stk) [b - Suc n := e]\"\nproof (induct b)\n case 0\n thus ?case by simp\nnext\n case (Suc b)\n thus ?case\n proof (cases \"b = n\")\n case True\n with Suc show ?thesis\n by auto\n(* by (auto simp: stks_purge') *)\n next\n case False\n with Suc show ?thesis\n by (cases \"b - n\") (auto intro!: nth_equalityI simp: nth_list_update)\n qed\nqed\n\nlemma nth_tl : \"xs \\ [] \\ tl xs ! n = xs ! (Suc n)\"\n by (cases xs, simp_all)\n\nlemma f2c_Nil [simp]: \"framestack_to_callstack [] = []\"\n by (simp add: framestack_to_callstack_def)\n\nlemma f2c_Cons [simp]:\n \"framestack_to_callstack ((stk,loc,C,M,pc)#frs) = (C,M,pc)#(framestack_to_callstack frs)\"\n by (simp add: framestack_to_callstack_def)\n\nlemma f2c_length [simp]:\n \"length (framestack_to_callstack frs) = length frs\"\n by (simp add: framestack_to_callstack_def)\n\nlemma f2c_s2jvm_id [simp]:\n \"framestack_to_callstack\n (snd(snd(state_to_jvm_state P cs s))) =\n cs\"\n by (cases s, simp add: framestack_to_callstack_def)\n\nlemma f2c_s2jvm_id' [simp]:\n \"framestack_to_callstack\n (zip (stkss P cs stk) (zip (locss P cs loc) cs)) = cs\"\n by (simp add: framestack_to_callstack_def)\n\nlemma f2c_append [simp]:\n \"framestack_to_callstack (frs @ frs') =\n (framestack_to_callstack frs) @ (framestack_to_callstack frs')\"\n by (simp add: framestack_to_callstack_def)\n\n\nsubsection \\CFG construction\\\n\nsubsection \\Datatypes\\\n\ntext \\Nodes are labeled with a callstack and an optional tuple (consisting of\na callstack and a flag).\n\nThe first callstack determines the current program point (i.e. the next statement\nto execute). If the second parameter is not None, we are at an intermediate state,\nwhere the target of the instruction is determined (the second callstack)\nand the flag is set to whether an exception is thrown or not.\n\\\ndatatype j_node =\n Entry (\"'('_Entry'_')\")\n | Node \"callstack\" \"(callstack \\ bool) option\" (\"'('_ _,_ '_')\")\n\ntext \\The empty callstack indicates the exit node\\\n\nabbreviation j_node_Exit :: \"j_node\" (\"'('_Exit'_')\")\nwhere \"j_node_Exit \\ (_ [],None _)\"\n\ntext \\An edge is a triple, consisting of two nodes and the edge kind\\\n\ntype_synonym j_edge = \"(j_node \\ state edge_kind \\ j_node)\"\n\n\nsubsection \\CFG\\\n\ntext \\\nThe CFG is constructed by a case analysis on the instructions and\ntheir different behavior in different states. E.g. the exceptional behavior of\n{\\sc New}, if there is no more space in the heap, vs. the normal behavior.\n\nNote: The set of edges defined by this predicate is a first approximation to the\nreal set of edges in the CFG. We later (theory JVMInterpretation) add some well-formedness\nrequirements to the nodes.\n\\\n\ninductive JVM_CFG :: \"jvmprog \\ j_node \\ state edge_kind \\ j_node \\ bool\"\n (\"_ \\ _ -_\\ _\")\nwhere\n JCFG_EntryExit:\n \"prog \\ (_Entry_) -(\\s. False)\\<^sub>\\\\ (_Exit_)\"\n\n| JCFG_EntryStart:\n \"prog = (P, C0, Main) \\ prog \\ (_Entry_) -(\\s. True)\\<^sub>\\\\ (_ [(C0, Main, 0)],None _)\"\n\n| JCFG_ReturnExit:\n \"\\ prog = (P,C0,Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Return \\\n \\ prog \\ (_ [(C, M, pc)],None _) -\\id\\ (_Exit_)\"\n\n| JCFG_Straight_NoExc:\n \"\\ prog = (P, C0, Main);\n instrs_of (P\\<^bsub>wf\\<^esub>) C M ! pc \\ {Load idx, Store idx, Push val, Pop, IAdd, CmpEq};\n ek = \\(\\s. exec_instr ((instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc) P s\n (length cs) (stkLength P C M pc) arbitrary arbitrary) \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_New_Normal_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (New Cl);\n ek = (\\(h,stk,loc). new_Addr h \\ None)\\<^sub>\\\\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs,False)\\ _)\"\n\n| JCFG_New_Normal_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (New Cl);\n ek = \\(\\s. exec_instr (New Cl) P s (length cs) (stkLength P C M pc) arbitrary arbitrary) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs, False)\\ _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_New_Exc_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (New Cl);\n find_handler_for P OutOfMemory ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc). new_Addr h = None)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs',True)\\ _)\"\n\n| JCFG_New_Exc_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (New Cl);\n find_handler_for P OutOfMemory ((C, M, pc)#cs) = (C', M', pc')#cs';\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) := Addr (addr_of_sys_xcpt OutOfMemory)),\n loc)\n ) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_New_Exc_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (New Cl);\n find_handler_for P OutOfMemory ((C, M, pc)#cs) = [] \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([], True)\\ _) -\\id\\ (_Exit_)\"\n\n| JCFG_Getfield_Normal_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Getfield Fd Cl);\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 1) \\ Null)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs, False)\\ _)\"\n\n| JCFG_Getfield_Normal_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Getfield Fd Cl);\n ek = \\(\\s. exec_instr (Getfield Fd Cl) P s (length cs) (stkLength P C M pc)\n arbitrary arbitrary) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs, False)\\ _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_Getfield_Exc_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Getfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 1) = Null)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs', True)\\ _)\"\n\n| JCFG_Getfield_Exc_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Getfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = (C', M', pc')#cs';\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) := Addr (addr_of_sys_xcpt NullPointer)),\n loc)\n ) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_Getfield_Exc_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Getfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = [] \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([], True)\\ _) -\\id\\ (_Exit_)\"\n\n| JCFG_Putfield_Normal_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Putfield Fd Cl);\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 2) \\ Null)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs, False)\\ _)\"\n\n| JCFG_Putfield_Normal_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Putfield Fd Cl);\n ek = \\(\\s. exec_instr (Putfield Fd Cl) P s (length cs) (stkLength P C M pc)\n arbitrary arbitrary) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C, M, Suc pc)#cs, False)\\ _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_Putfield_Exc_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Putfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 2) = Null)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs', True)\\ _)\"\n\n| JCFG_Putfield_Exc_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Putfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = (C', M', pc')#cs';\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) := Addr (addr_of_sys_xcpt NullPointer)),\n loc)\n ) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_Putfield_Exc_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Putfield Fd Cl);\n find_handler_for P NullPointer ((C, M, pc)#cs) = [] \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([], True)\\ _) -\\id\\ (_Exit_)\"\n\n| JCFG_Checkcast_Normal_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Checkcast Cl);\n ek = (\\(h,stk,loc). cast_ok (P\\<^bsub>wf\\<^esub>) Cl h (stk(length cs, stkLength P C M pc - Suc 0)))\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_Checkcast_Exc_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Checkcast Cl);\n find_handler_for P ClassCast ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc). \\ cast_ok (P\\<^bsub>wf\\<^esub>) Cl h (stk(length cs, stkLength P C M pc - Suc 0)))\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs', True)\\ _)\"\n\n| JCFG_Checkcast_Exc_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Checkcast Cl);\n find_handler_for P ClassCast ((C, M, pc)#cs) = (C', M', pc')#cs';\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) := Addr (addr_of_sys_xcpt ClassCast)),\n loc)\n ) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_Checkcast_Exc_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Checkcast Cl);\n find_handler_for P ClassCast ((C, M, pc)#cs) = [] \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([], True)\\ _) -\\id\\ (_Exit_)\"\n\n| JCFG_Invoke_Normal_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Invoke M2 n);\n cd = length cs;\n stk_length = stkLength P C M pc;\n ek = (\\(h,stk,loc).\n stk(cd, stk_length - Suc n) \\ Null \\\n fst(method (P\\<^bsub>wf\\<^esub>) (cname_of h (the_Addr(stk(cd, stk_length - Suc n)))) M2) = D\n )\\<^sub>\\ \\\n \\\n prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\((D, M2, 0)#(C, M, pc)#cs, False)\\ _)\"\n\n| JCFG_Invoke_Normal_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Invoke M2 n);\n stk_length = stkLength P C M pc;\n loc_length = locLength P D M2 0;\n ek = \\(\\s. exec_instr (Invoke M2 n) P s (length cs) stk_length arbitrary loc_length)\n \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((D, M2, 0)#(C, M, pc)#cs, False)\\ _) -ek\\\n (_ (D, M2, 0)#(C, M, pc)#cs,None _)\"\n\n| JCFG_Invoke_Exc_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Invoke m2 n);\n find_handler_for P NullPointer ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - Suc n) = Null)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs', True)\\ _)\"\n\n| JCFG_Invoke_Exc_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Invoke M2 n);\n find_handler_for P NullPointer ((C, M, pc)#cs) = (C', M', pc')#cs';\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) := Addr (addr_of_sys_xcpt NullPointer)),\n loc)\n )\n \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_Invoke_Exc_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (Invoke M2 n);\n find_handler_for P NullPointer ((C, M, pc)#cs) = [] \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([], True)\\ _) -\\id\\ (_Exit_)\"\n\n| JCFG_Return_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Return;\n stk_length = stkLength P C M pc;\n r_stk_length = stkLength P C' M' (Suc pc');\n ek = \\(\\s. exec_instr Return P s (Suc (length cs)) stk_length r_stk_length arbitrary) \\\n \\ prog \\ (_ (C, M, pc)#(C', M', pc')#cs,None _) -ek\\ (_ (C', M', Suc pc')#cs,None _)\"\n\n| JCFG_Goto_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Goto idx \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -\\id\\ (_ (C, M, nat (int pc + idx))#cs,None _)\"\n\n| JCFG_IfFalse_False:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (IfFalse b);\n b \\ 1;\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 1) = Bool False)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, nat (int pc + b))#cs,None _)\"\n\n| JCFG_IfFalse_Next:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = (IfFalse b);\n ek = (\\(h,stk,loc). stk(length cs, stkLength P C M pc - 1) \\ Bool False \\ b = 1)\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, Suc pc)#cs,None _)\"\n\n| JCFG_Throw_Pred:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Throw;\n cd = length cs;\n stk_length = stkLength P C M pc;\n \\Exc. find_handler_for P Exc ((C, M, pc)#cs) = cs';\n ek = (\\(h,stk,loc).\n (stk(length cs, stkLength P C M pc - 1) = Null \\\n find_handler_for P NullPointer ((C, M, pc)#cs) = cs') \\\n (stk(length cs, stkLength P C M pc - 1) \\ Null \\\n find_handler_for P (cname_of h (the_Addr(stk(cd, stk_length - 1)))) ((C, M, pc)#cs) = cs')\n )\\<^sub>\\ \\\n \\ prog \\ (_ (C, M, pc)#cs,None _) -ek\\ (_ (C, M, pc)#cs,\\(cs', True)\\ _)\"\n\n| JCFG_Throw_Update:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Throw;\n ek = \\(\\(h,stk,loc).\n (h,\n stk((length cs',(stkLength P C' M' pc') - 1) :=\n if (stk(length cs, stkLength P C M pc - 1) = Null) then\n Addr (addr_of_sys_xcpt NullPointer)\n else (stk(length cs, stkLength P C M pc - 1))),\n loc)\n ) \\\n \\ prog \\ (_ (C, M, pc)#cs,\\((C', M', pc')#cs', True)\\ _) -ek\\ (_ (C', M', pc')#cs',None _)\"\n\n| JCFG_Throw_Exit:\n \"\\ prog = (P, C0, Main);\n (instrs_of (P\\<^bsub>wf\\<^esub>) C M) ! pc = Throw \\\n \\ prog \\ (_ (C, M, pc)#cs,\\([],True)\\ _) -\\id\\ (_Exit_)\"\n\n\nsubsection \\CFG properties\\\n\n\n\nlemma JVMCFG_Entry_no_targetnode [dest]:\n assumes edge:\"prog \\ n -et\\ (_Entry_)\"\n shows \"False\"\nproof -\n { fix n' have \"\\prog \\ n -et\\ n'; n' = (_Entry_)\\ \\ False\"\n by (auto elim!: JVM_CFG.cases)\n }\n with edge show ?thesis by fastforce\nqed\n\nlemma JVMCFG_EntryD:\n \"\\(P,C,M) \\ n -et\\ n'; n = (_Entry_)\\ \n \\ (n' = (_Exit_) \\ et = (\\s. False)\\<^sub>\\) \\ (n' = (_ [(C,M,0)],None _) \\ et = (\\s. True)\\<^sub>\\)\"\nby (erule JVM_CFG.cases) simp_all\n\ndeclare split_def [simp add]\ndeclare find_handler_for.simps [simp del]\n\n(* The following lemma explores many cases, it takes a little to prove *)\nlemma JVMCFG_edge_det:\n \"\\prog \\ n -et\\ n'; prog \\ n -et'\\ n'\\ \\ et = et'\"\n by (erule JVM_CFG.cases, (erule JVM_CFG.cases, fastforce+)+)\n\ndeclare split_def [simp del]\ndeclare find_handler_for.simps [simp add]\n\nend\n", "meta": {"author": "isabelle-prover", "repo": "mirror-afp-devel", "sha": "c84055551f07621736c3eb6a1ef4fb7e8cc57dd1", "save_path": "github-repos/isabelle/isabelle-prover-mirror-afp-devel", "path": "github-repos/isabelle/isabelle-prover-mirror-afp-devel/mirror-afp-devel-c84055551f07621736c3eb6a1ef4fb7e8cc57dd1/thys/Slicing/JinjaVM/JVMCFG.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061854293322, "lm_q2_score": 0.2814056194821861, "lm_q1q2_score": 0.14180203227164656}} {"text": "theory FO_Proofs\n imports FO_Specification General_Proofs T_Proofs FO_Proofs0 T_Security\n (* \"HOL-Eisbach.Eisbach\" \"HOL-Eisbach.Eisbach_Tools\" *)\nbegin\n\n(* Can be used with \"simp split!:\" or with Splitter.split_asm_tac *)\nlemma Cla_split_asm: \"P (Cla[Q]) = (\\ ((Q \\ \\ P top) \\ (\\ Q \\ \\ P bot)))\"\n by (cases Q, auto) \n\nlemma correctness_enc_leq1[simp]: \n \"correctness params keygen enc dec msg_space \\ 1\"\n apply (rule correctness_leq1)\n by auto\n\nlemma correctness_enc_pos[simp]: \n \"correctness params keygen enc dec msg_space \\ 0\"\n apply (rule correctness_pos)\n by auto\n\n\n\n(* lemma case_option_beta: \"x\\None \\ (case x of None \\ y | Some z \\ w z) = w (the x)\" *)\n (* by auto *)\n\n\nlemma decapsQuery_decapsQueryPRF_vc:\n\"\\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ K'1 = K'2 \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\ \\ (\\\\\\[c2 \\ cstar2] + (\\\\\\[c1 \\ cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = None \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = None \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)) \\ (\\\\\\[c2 = cstar2] + (\\\\\\[\\ (dec () sk2 c2 = None \\ encr () pk2 (the (dec () sk2 c2)) (G2 (the (dec () sk2 c2))) \\ c2)] + (\\\\\\[c1 \\ cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = Some (PRF prfk2 c2) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = Some (PRF prfk2 c2) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)) \\ (\\\\\\[dec () sk2 c2 = None \\ encr () pk2 (the (dec () sk2 c2)) (G2 (the (dec () sk2 c2))) \\ c2] + (\\\\\\[c1 \\ cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = Some (H2 (the (dec () sk2 c2))) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] + \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = Some (H2 (the (dec () sk2 c2))) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)))\"\n(* \"\\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ K'1 = K'2 \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\ \\ (\\\\\\[c2 \\ cstar2] \\ (\\\\\\[c1 \\ cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = None \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = None \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)) \\ (\\\\\\[c2 = cstar2] \\ (\\\\\\[\\ (dec () sk2 c2 = None \\ encr () pk2 (the (dec () sk2 c2)) (G2 (the (dec () sk2 c2))) \\ c2)] \\ (\\\\\\[c1 \\ cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = Some (PRF prfk2 c2) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = Some (PRF prfk2 c2) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)) \\ (\\\\\\[dec () sk2 c2 = None \\ encr () pk2 (the (dec () sk2 c2)) (G2 (the (dec () sk2 c2))) \\ c2] \\ (\\\\\\[c1 \\ cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ None = Some (H2 (the (dec () sk2 c2))) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\) \\ (\\\\\\[c1 = cstar1] \\ \\\\\\[pk_of_sk sk2 = pk2 \\ skfo1 = (sk2, prfk2) \\ cstar1 = cstar2 \\ classA1 = classA2 \\ c1 = c2 \\ decapsFO (G1, H1) skfo1 c1 = Some (H2 (the (dec () sk2 c2))) \\ b1 = b2 \\ G1 = G2 \\ H1 = H2 \\ Kstar1 = Kstar2 \\ in_pk1 = in_pk2 \\ in_cstar1 = in_cstar2] \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)))\" *)\nproof -\n note encrT_def[simp] decapsFO_def[simp] decT_def[simp]\n obtain sk1 prfk1 where [simp]: \"skfo1 = (sk1,prfk1)\" apply atomize_elim by auto\n consider (ccstar) \"c1=cstar1\" | (decNone) \"c1\\cstar1 \\ dec () sk1 c1 = None\"\n | (decM) m where \"c1\\cstar1 \\ dec () sk1 c1 = Some m\"\n apply atomize_elim by auto\n\n then show ?thesis\n proof cases\n case ccstar\n then show ?thesis\n by simp\n next\n case decNone\n then show ?thesis \n by auto\n next case (decM m)\n then show ?thesis\n by auto\n qed\nqed\n\n\n\nlemma keygenFO_keygenT: \"map_distr (\\x. ((fst x, fst (snd x)), snd (snd x))) (keygenFO (G, H2)) = product_distr (keygenT G) keygenPRF\"\n unfolding keygenFO_def by (auto simp: case_prod_beta)\n\n\nlemma pk_of_sk_keygenFO:\n assumes \"x \\ supp (keygenFO (G1, H2))\"\n shows \"pk_of_sk (fst (snd x)) = fst x\"\n using assms unfolding keygenFO_def \n by (auto simp: pk_of_sk)\n\nlemma [simp]: \"uniform (msg_spaceT G1) = uniform (msg_spaceT G2)\"\n unfolding msg_spaceT_def by simp\n\nlemma [simp]: \"keygenFO (G, H) = keygenFO (G1, H1)\"\n unfolding keygenFO_def keygenT_def by simp\n\n(* lemma [simp]: \"map_distr (\\x. ((fst x, fst (snd x)), snd (snd x), snd x)) (keygenFO (G, H)) = bind_distr (keygenT G2) (\\z. map_distr (\\x. (z, x, snd z, x)) keygenPRF)\"\n unfolding keygenFO_def keygenT_def case_prod_conv\n by (simp add: case_prod_beta bind_distr_map_distr[symmetric]) *)\n\n\nlemma [simp]: \"map_distr (\\x. (fst x, fst (snd x))) (keygenFO (G, H)) = keygenT G2\"\n unfolding keygenFO_def keygenT_def case_prod_beta\n by simp\n\nlemma G2G2:\n assumes [simp]: \"declared_qvars \\Gin1,Gin2,Gout1,Gout2,quantA1,quantA2,Hin1,Hout1,Hin2,Hout2\\\"\n shows \"Uoracle H\\\\Gin2, Gout2\\ \\ (Uoracle H\\\\Gin1, Gout1\\ \\ \n \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\\"\n (is \"_ = ?Q1 \\\\ ?Q2\")\nproof -\n have 1: \"Uoracle H\\\\Gin1, Gout1\\ = (idOp \\ (idOp \\ (idOp \\ Uoracle H)))\\?Q1\"\n apply (subst lift_tensorOp[symmetric], simp)+ by simp\n have 2: \"Uoracle H\\\\Gin2, Gout2\\ = (idOp \\ (idOp \\ (idOp \\ Uoracle H)))\\?Q2\"\n apply (subst lift_tensorOp[symmetric], simp)+ by simp\n show ?thesis\n unfolding 1 2 by simp\nqed\n\nlemma Cla_split': \n assumes \"Q \\ P top\" and \"\\ Q \\ P bot\"\n shows \"P (Cla[Q])\"\n using assms by (cases Q, auto) \n\nlemma H2H2':\n assumes [simp]: \"declared_qvars \\Gin1,Gin2,Gout1,Gout2,quantA1,quantA2,Hin1,Hout1,Hin2,Hout2\\\"\n shows \"Uoracle H\\\\Hin2, Hout2\\ \\ (Uoracle H\\\\Hin1, Hout1\\ \\ \n \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\\"\n (is \"_ = ?Q1 \\\\ ?Q2\")\nproof -\n have 1: \"Uoracle H\\\\Hin1, Hout1\\ = (idOp \\ (assoc_op* o\\<^sub>C\\<^sub>L (Uoracle H \\ idOp) o\\<^sub>C\\<^sub>L assoc_op))\\?Q1\"\n apply (subst lift_tensorOp[symmetric], simp_all)\n apply (subst assoc_op_lift')\n by (subst lift_tensorOp[symmetric], simp_all)\n have 2: \"Uoracle H\\\\Hin2, Hout2\\ = (idOp \\ (assoc_op* o\\<^sub>C\\<^sub>L (Uoracle H \\ idOp) o\\<^sub>C\\<^sub>L assoc_op))\\?Q2\"\n apply (subst lift_tensorOp[symmetric], simp_all)\n apply (subst assoc_op_lift')\n by (subst lift_tensorOp[symmetric], simp_all)\n have \"(assoc_op* \\ Uoracle H \\ idOp \\ assoc_op) \\ (assoc_op* \\ (Uoracle H* \\ idOp \\ assoc_op)) = \n assoc_op* \\ (Uoracle H \\ idOp \\ (assoc_op \\ assoc_op*) \\ Uoracle H* \\ idOp) \\ assoc_op\"\n by (simp only: timesOp_assoc)\n also have \"\\ = idOp\"\n by simp\n finally have cancel: \"(assoc_op* \\ Uoracle H \\ idOp \\ assoc_op) \\ (assoc_op* \\ (Uoracle H* \\ idOp \\ assoc_op)) = idOp\"\n by -\n show ?thesis\n unfolding 1 2 by (simp add: cancel)\nqed\n\n\nlemma Hq1_Hq2:\n assumes notin: \"cstar2 \\ (encrT G2 pk2) ` msg_spaceT G2\"\n assumes eq: \"(\\x. x \\ cstar2 \\ Hq1 x = Hq2 x)\"\n shows \"mk_Hq Hq1 H0 G2 pk2 = mk_Hq Hq2 H0 G2 pk2\"\nproof (rule ext)\n fix m\n consider (cstar) \"m \\ msg_spaceT G2\" and \"encrT G2 pk2 m = cstar2\" | (msgspace) \"m \\ msg_spaceT G2\" and \"encrT G2 pk2 m \\ cstar2\" | (outside) \"m \\ msg_spaceT G2\" by auto\n then show \"mk_Hq Hq1 H0 G2 pk2 m = mk_Hq Hq2 H0 G2 pk2 m\"\n proof cases\n case msgspace\n then have \"Hq1 (encrT G2 pk2 m) = Hq2 (encrT G2 pk2 m)\"\n apply (subst eq[rule_format]) by simp_all\n then show ?thesis\n unfolding mk_Hq_def by auto\n next\n case cstar\n with notin have False by auto\n then show ?thesis by simp\n next\n case outside\n then show ?thesis \n unfolding mk_Hq_def by auto\n qed\nqed\n\nlemma map_distr_Hq_Kstar:\n \"map_distr (\\HK::(ciph\\key)*key. ((fst HK)(cstar1 := snd HK), snd HK)) (uniform UNIV) = map_distr (\\H. (H, H cstar1)) (uniform UNIV)\"\n (is \"?lhs=?rhs\")\nproof -\n define S :: \"(_ * key) set\" where \"S = {(H,K). H cstar1 = K}\"\n have \"regular_betw (\\(x,y). (x(cstar1 := y), y)) UNIV S\"\n proof (rule regular_betwI)\n define n :: nat where \"n=CARD(key)\"\n show \"n\\0\" unfolding n_def by simp\n show \"range (\\(x, y). (x(cstar1 := y), y)) = S\"\n unfolding S_def \n using image_iff case_prod_beta by fastforce\n show \"card ((\\(x, y). (x(cstar1 := y), y)) -` {HK} \\ UNIV) = n\" if \"HK \\ S\" for HK\n proof -\n obtain H K where HK_def: \"HK = (H,K)\" by fastforce\n with that have H_cstar1: \"H cstar1 = K\" by (simp add: S_def)\n define f :: \"((ciph\\key)*key) \\ _\" where \"f = (\\(H',K'). H' cstar1)\"\n define g :: \"_ \\ ((ciph\\key)*key)\" where \"g K' = (H(cstar1:=K'),K)\" for K'\n show ?thesis\n unfolding n_def HK_def apply simp\n proof (rule card_bij_eq[where f=f and g=g])\n show \"inj_on f ((\\(x, y). (x(cstar1 := y), y)) -` {(H, K)})\"\n apply (rule inj_onI) unfolding f_def apply auto\n by (metis array_rules(5) fun_upd_triv)\n show \"inj g\"\n apply (rule injI) unfolding g_def apply auto\n by (meson fun_upd_eqD)\n show \"range g \\ (\\(x, y). (x(cstar1 := y), y)) -` {(H, K)}\"\n apply (auto simp: g_def case_prod_beta)\n using H_cstar1 by blast\n qed auto\n qed\n qed\n then have 1: \"?lhs = uniform S\"\n unfolding case_prod_beta by simp\n have \"bij_betw (\\d. (d, d cstar1)) UNIV S\"\n apply (rule bij_betwI')\n by (auto simp: S_def)\n then have 2: \"?rhs = uniform S\"\n by simp\n from 1 2 show ?thesis by simp\nqed\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n(* lemma [simp]: \"weight (keygenT p) = 1\"\n unfolding keygenT_def keygen_def by simp *)\n\nlemma [simp]: \"weight (keygenFO p) = 1\"\n unfolding keygenFO_def case_prod_beta by auto\n\n\nlemma [simp]: \"weight (fakeenc () pk) = 1\"\n unfolding fakeenc_def enc0_def by simp\n\n(* \nlemma\n quantum_eq_add_state2: \n fixes U :: \"('a::universe,'c) l2bounded\" and V :: \"('b::universe,'c) l2bounded\" and \\ :: \"'d::universe ell2\"\n and Q :: \"'a::universe variables\" and R :: \"'b::universe variables\" and T :: \"'d variables\"\n assumes \"distinct_qvars (variable_concat Q (variable_concat R T))\"\n assumes \"norm \\ = 1\"\n shows \"quantum_equality_full V R U Q \\ Span {\\}\\T\n = quantum_equality_full (addState \\ \\ V) R (U \\ idOp) (variable_concat Q T)\"\nproof -\n from assms(1) have [simp]: \"distinct_qvars (variable_concat T Q)\"\n by (subst (asm) distinct_qvars_split2, simp)\n then have [simp]: \"distinct_qvars (variable_concat Q T)\"\n by (rule distinct_qvars_swap)\n from assms(1) have [simp]: \"distinct_qvars (variable_concat R Q)\"\n by (subst (asm) distinct_qvars_split2, simp)\n then have [simp]: \"distinct_qvars (variable_concat Q R)\"\n by (rule distinct_qvars_swap)\n from assms(1) have [simp]: \"distinct_qvars (variable_concat R T)\"\n by (subst (asm) distinct_qvars_split2, simp)\n then have [simp]: \"distinct_qvars (variable_concat T R)\"\n by (rule distinct_qvars_swap)\n have [simp]: \"distinct_qvars (variable_concat (variable_concat Q T) R)\"\n by (subst distinct_qvars_split1, simp)\n show ?thesis\n apply (subst quantum_equality_sym, simp)\n apply (subst quantum_eq_add_state)\n apply (simp_all add: assms)[2]\n by (rule quantum_equality_sym, simp)\nqed\n*)\n\n(* lemma [simp]: \"paramsT \\ 0\"\n by (metis UNIV_not_empty finite paramsT_def suppP_empty_simp supp_uniform) *)\n\nlemma [simp]: \"disjointnessT \\ 1\"\n unfolding disjointnessT_def\n apply (rule disjointness_leq1)\n by auto\n\nlemma [simp]: \"disjointnessT \\ 0\"\n unfolding disjointnessT_def\n apply (rule disjointness_geq0)\n by auto\n\nlemma Prob_leq_disjointnessT: \n assumes \"G1 \\ supp paramsT\" and \"(pk1, sk1) \\ supp (keygenT G1)\"\n shows \"Prob (fakeenc () pk1) (encrT G1 pk1 ` msg_spaceT G1) \\ disjointnessT\"\n unfolding disjointnessT_def fakeencT_def[symmetric, of G1] encT_def\n using _ assms apply (rule disjointness_geqI[where p=G1 and pk=pk1])\n apply (metis assms(2) keygenT_def mem_simps(2) suppP_empty_simp)\n by (simp add: UNION_singleton_eq_range fakeencT_def)\n\n(* lemma aux_xa_x_1: \"(\\x xa::bit. xa = x + 1 \\ P xa x) = (\\x. P x x)\"\n using bit_neq by blast *)\n\nlemma encT_injective: \n assumes \"P \\ supp paramsT\"\n assumes \"(pk,sk) \\ supp (keygenT P)\"\n shows \"inj_on (encrT P pk) (msg_spaceT P)\"\nproof -\n have \"(pk,sk) \\ supp (keygen0 ())\"\n using assms(2) unfolding keygenT_def keygen_def by simp\n then have iep: \"injective_enc_pk () enc0 msg_space0 pk\"\n using enc0_injective[unfolded injective_enc_def, rule_format]\n by auto\n\n show ?thesis\n proof (rule inj_onI)\n fix m0 :: msg\n and m1 :: msg\n assume m0: \"m0 \\ msg_spaceT P\"\n and m1: \"m1 \\ msg_spaceT P\"\n and eqT: \"encrT P pk m0 = encrT P pk m1\"\n have disj: \"disjnt (supp (enc0 () pk m0)) (supp (enc0 () pk m1))\"\n apply (rule iep[unfolded injective_enc_pk_def, rule_format])\n using m0 m1 msg_space unfolding msg_spaceT_def by auto\n moreover have \"encrT P pk m0 \\ supp (enc0 () pk m0)\"\n unfolding encrT_def encr_def enc0_def by auto\n moreover have \"encrT P pk m1 \\ supp (enc0 () pk m1)\"\n unfolding encrT_def encr_def enc0_def by auto\n ultimately show \"m0 = m1\"\n using eqT by (auto simp: disjnt_def)\n qed\nqed\n\nlemma mk_Hq_uniform: \n assumes \"(pk,(sk,prfk)) \\ supp (keygenFO (G,anyH))\"\n shows \"map_distr (\\HqH0. mk_Hq (snd HqH0) (fst HqH0) G pk) (uniform UNIV) = uniform UNIV\"\n (is \"?lhs = ?rhs\")\nproof -\n have inj_encrT: \"inj_on (encrT G pk) (msg_spaceT G)\"\n apply (rule encT_injective)\n using assms by (auto simp: keygenFO_def paramsT_def)\n have \"?lhs = map_distr (\\HqH0' m. HqH0' (if m \\ msg_spaceT G then Inr (encrT G pk m) else Inl m))\n (map_distr (\\HqH0 m. case m of Inl m' \\ fst HqH0 m' | Inr m' \\ snd HqH0 m') (uniform UNIV))\"\n apply (simp add: mk_Hq_def[abs_def])\n apply (subst if_distrib[where f=\"\\x. case x of Inl x \\ _ x | Inr x \\ _ x\"])\n apply (subst sum.case)+\n by auto\n also have \"\\ = map_distr (\\HqH0' m. HqH0' (if m \\ msg_spaceT G then Inr (encrT G pk m) else Inl m)) (uniform UNIV)\"\n apply (subst map_distr_uniform[where B=UNIV])\n apply (rule bijI')\n apply auto\n apply (metis case_sum_o_inj(1))\n apply (metis case_sum_o_inj(2))\n by (metis case_sum_expand_Inr_pointfree)\n also have \"\\ = uniform UNIV\"\n apply (rule map_distr_uniform_regular[where B=UNIV])\n thm reindex_regular[where i = \"\\m. (if m \\ msg_spaceT G then Inr (encrT G pk m) else Inl m)\"]\n apply (rule reindex_regular)\n apply (rule injI)\n apply (case_tac \"x \\ msg_spaceT G\"; case_tac \"y \\ msg_spaceT G\")\n using inj_encrT by (auto simp: inj_onD)\n finally show ?thesis\n by -\nqed\n\nlemma keygenFO_anyH: \"NO_MATCH undefined H \\ keygenFO (G,H) = keygenFO (G,undefined)\"\n unfolding keygenFO_def by simp\n\nlemma keygenFO_anyG: \"NO_MATCH undefined G \\ keygenFO (G,H) = keygenFO (undefined,H)\"\n unfolding keygenFO_def keygenT_def by simp\n\ndefinition \"Rbad pk sk m = \n (if m\\msg_space() then {r. dec () sk (encr () pk m r) \\ Some m} else {})\"\ndefinition \"bad_pk pk sk = (\\m\\msg_space(). Rbad pk sk m = UNIV)\"\ndefinition \"RgoodG pk sk G \\ (\\m. G m \\ Rbad pk sk m)\"\n\ndefinition \"\\bad pk sk m = real (card (Rbad pk sk m)) / real (card (UNIV::rand set))\"\n\nlemma [simp]: \"\\bad pk sk m \\ 0\"\n unfolding \\bad_def by auto\n\nlemma [simp]: \"\\bad pk sk m \\ 1\"\n unfolding \\bad_def\n by (simp add: card_mono)\n\nlemma \\bad_correctness_pkskm: \"\\bad pk sk m = correctness_pkskm enc dec () pk sk m\"\n if \"m \\ msg_space()\"\nproof -\n have \"correctness_pkskm enc dec () pk sk m = Prob (uniform UNIV) (encr () pk m -` {c. dec () sk c \\ Some m})\"\n unfolding correctness_pkskm_def enc_def Prob_map_distr' by simp\n also have \"\\ = real (card {r. dec () sk (encr () pk m r) \\ Some m}) / real CARD(rand)\"\n unfolding Prob_uniform by simp\n also have \"\\ = \\bad pk sk m\"\n by (simp add: \\bad_def Rbad_def that)\n finally show ?thesis\n by simp\nqed\n\nlemma \\bad_correctness_pksk:\n \"\\bad pk sk m \\ correctness_pksk enc dec msg_space () pk sk\"\nproof (cases \"m \\ msg_space()\")\n case True\n then show ?thesis\n unfolding correctness_pksk_def \n by (simp add: cSUP_upper \\bad_correctness_pkskm)\nnext\n case False\n then show ?thesis \n unfolding \\bad_def Rbad_def by auto\nqed\n\ndefinition \"Rbad_select pk sk = \n map_distr (\\F. {m. F m = 1}) (product_distr' (\\m. bernoulli (\\bad pk sk m)))\"\n\nlemma [simp]: \"weight (Rbad_select a b) = 1\"\n unfolding Rbad_select_def apply simp\n apply (rule total_product_distr'I)\n by simp\n\n(* Needed to avoid undesired corner cases where we uniformly pick from the empty set *)\ndefinition \"Rbad' pk sk m = (if Rbad pk sk m = {} then {undefined} else Rbad pk sk m)\"\ndefinition \"Rgood' pk sk m = (if Rbad pk sk m = UNIV then {undefined} else - Rbad pk sk m)\"\ndefinition \"Rgood'G pk sk G \\ (\\m. G m \\ Rgood' pk sk m)\"\n\nlemma Rgood'_notempty[simp]: \"Rgood' pk sk m \\ {}\"\n unfolding Rgood'_def (* apply (cases \"Rbad pk sk m = {}\") *) by auto\nlemma Rbad'_notempty[simp]: \"Rbad' pk sk m \\ {}\"\n unfolding Rbad'_def (* apply (cases \"Rbad pk sk m = {}\") *) by auto\n\nlemma Rgood'_ex: \"\\x. \\m. x m \\ Rgood' pk sk m\"\n apply (subst choice_iff[symmetric])\n using Rgood'_notempty by (meson equals0I)\nlemma Rbad'_ex: \"\\x. \\m. x m \\ Rbad' pk sk m\"\n apply (subst choice_iff[symmetric])\n using Rbad'_notempty by (meson equals0I)\n\n(* Need to use uniform' instead of uniform in case Rbad is empty or UNIV *)\ndefinition \"G_goodbad_squash pk sk =\n bind_distr (uniform {G. \\m. G m \\ Rgood' pk sk m})\n (\\Ggood. map_distr (Pair Ggood) \n (bind_distr (uniform {G. \\m. G m \\ Rbad' pk sk m}) \n (\\Gbad. map_distr (\\S. (Gbad, S, \\m. if m \\ S then Gbad m else Ggood m)) \n (Rbad_select pk sk))))\"\n\nlemma G_goodbad_squash_4th: \"map_distr (\\x. snd (snd (snd x))) (G_goodbad_squash pk2 sk2) = uniform UNIV\"\n (is \"?lhs = _\")\nproof -\n define good bad Ber where \"good = Rgood' pk2 sk2\"\n and \"bad = Rbad' pk2 sk2\" and \"Ber i = bernoulli (\\bad pk2 sk2 i)\" for i\n have [simp]: \"bad m \\ {}\" and [simp]: \"good m \\ {}\" for m\n unfolding bad_def Rbad'_def good_def Rgood'_def by auto\n have \"?lhs = bind_distr (uniform {G. \\m. G m \\ good m})\n (\\goodG. bind_distr (uniform {G. \\m. G m \\ bad m})\n (\\badG. map_distr (\\c m. if m \\ c then badG m else goodG m)\n (Rbad_select pk2 sk2)))\"\n unfolding G_goodbad_squash_def good_def bad_def \n by (simp add: map_product_distr' flip: bind_distr_map_distr)\n also have \"\\ = product_distr'\n (\\m. bind_distr (uniform (good m))\n (\\Ggood. bind_distr (uniform (bad m))\n (\\Gbad. map_distr (\\c. if c = 1 then Gbad else Ggood)\n (Ber m))))\"\n (is \"_ = product_distr' ?U\")\n unfolding Rbad_select_def Ber_def\n apply (simp flip: product_distr'_uniform bind_distr_map_distr)\n apply (subst map_product_distr')\n apply (subst bind_product_distr')\n apply (subst bind_product_distr')\n by simp\n also { fix m\n consider (allGood) \"Rbad pk2 sk2 m = {}\"| (allBad) \"Rbad pk2 sk2 m = UNIV\"\n | (normal) \"Rbad pk2 sk2 m \\ {}\" and \"Rbad pk2 sk2 m \\ UNIV\" by auto\n then have \"?U m = uniform UNIV\"\n proof cases\n case normal\n then show ?thesis \n unfolding Ber_def apply (subst bernoulli_combine_uniform)\n by (auto simp: \\bad_def bad_def good_def disjnt_iff Rbad'_def Rgood'_def)\n next\n case allGood\n then have \"\\bad pk2 sk2 m = 0\"\n unfolding \\bad_def by simp\n then have [simp]: \"Ber m = point_distr 0\"\n unfolding Ber_def by (simp add: bernoulli_p0)\n from allGood have [simp]: \"good m = UNIV\"\n unfolding good_def Rgood'_def by simp\n show ?thesis \n apply (subst bind_point_distr[symmetric])\n apply (subst bind_distr_twice_indep[where A=\"Ber m\", symmetric])\n apply (subst bind_distr_twice_indep[where A=\"Ber m\", symmetric])\n by simp\n next\n case allBad\n then have \"\\bad pk2 sk2 m = 1\"\n unfolding \\bad_def by simp\n then have [simp]: \"Ber m = point_distr 1\"\n unfolding Ber_def by (simp add: bernoulli_p1)\n from allBad have [simp]: \"bad m = UNIV\"\n unfolding bad_def Rbad'_def by simp\n show ?thesis \n apply (subst bind_point_distr[symmetric])\n apply (subst bind_distr_twice_indep[where A=\"Ber m\", symmetric])\n apply (subst bind_distr_twice_indep[where A=\"Ber m\", symmetric])\n by simp\n qed\n }\n then have \"product_distr' ?U = uniform UNIV\"\n by auto\n finally show ?thesis by -\nqed\n\n(* Ggood,Gbad,S,G <$ G_goodbad_squash pk sk; *)\n(* Must be defined exactly like the term resulting from the squash tacting \nin indcca-enc-fo-game1-game2.qrhl because it is used via \"simp * G_goodbad_o2h_squash[symmetric]\" *)\ndefinition \"G_goodbad_o2h_squash = \nbind_distr (keygenT undefined) (\\z. map_distr (Pair z) \n(bind_distr (uniform {G. \\m. G m \\ Rgood' (fst z) (snd z) m})\n(\\za. map_distr (Pair za) (bind_distr \n(uniform {G. \\m. G m \\ Rbad' (fst z) (snd z) m})\n(\\zb. map_distr (\\x. (zb, x, \\m. if m \\ x then zb m else za m))\n(Rbad_select (fst z) (snd z)))))))\"\n\nlemma [simp]: \"weight G_goodbad_o2h_squash = 1\"\n unfolding G_goodbad_o2h_squash_def\n apply (simp flip: not_ex not_all)\n apply (subst choice_iff[symmetric])+\n apply (subst ex_in_conv[])+\n using Rgood'_notempty Rbad'_notempty\n by simp\n\n(* A coupling of goodbad_o2h_distr and G_goodbad_o2h_squash.\n Returns ((pk,sk),Ggood,Gbad,S,G), (S,G,Ggood,(pk,sk)) *)\ndefinition \"goodbad_o2h_distr_ext = \n bind_distr (keygenT undefined) (\\(pk,sk).\n bind_distr (uniform {G. \\m. G m \\ Rgood' pk sk m}) (\\Ggood.\n bind_distr (uniform {G. \\m. G m \\ Rbad' pk sk m}) (\\Gbad.\n bind_distr (Rbad_select pk sk) (\\S::msg set.\n let G = \\m. if m \\ S then Gbad m else Ggood m in\n point_distr (((pk,sk),Ggood,Gbad,S,G), (S,Ggood,G,(pk,sk)))))))\"\n\nlemma [simp]: \"weight goodbad_o2h_distr_ext = 1\"\n unfolding goodbad_o2h_distr_ext_def\n apply (simp flip: not_ex not_all add: Let_def case_prod_beta)\n apply (subst choice_iff[symmetric])+\n apply (subst ex_in_conv[])+\n using Rgood'_notempty Rbad'_notempty\n by simp\n\n(* (S,G,G',z') <$ goodbad_o2h_distr; *)\ndefinition \"goodbad_o2h_distr =\n map_distr snd goodbad_o2h_distr_ext\"\n\nlemma weight_goodbad_o2h_distr[simp]: \"weight goodbad_o2h_distr = 1\"\n unfolding goodbad_o2h_distr_def by simp\n\nlemma [simp]: \"goodbad_o2h_distr \\ 0\"\n using weight_goodbad_o2h_distr by fastforce \n\nlemma goodbad_o2h_distr_oradiff:\n assumes \"(S, G, H, z) \\ supp goodbad_o2h_distr\"\n assumes \"x \\ S\"\n shows \"G x = H x\"\n using assms unfolding goodbad_o2h_distr_def goodbad_o2h_distr_ext_def\n by (auto simp add: Let_def)\n\nlemma [simp]: \"map_distr fst goodbad_o2h_distr_ext = G_goodbad_o2h_squash\"\n by (simp add: goodbad_o2h_distr_ext_def G_goodbad_o2h_squash_def\n bind_distr_map_distr[symmetric] case_prod_beta Let_def)\n\nlemma [simp]: \"map_distr snd goodbad_o2h_distr_ext = goodbad_o2h_distr\"\n unfolding goodbad_o2h_distr_def by simp\n\nlemma goodbad_o2h_distr_ext_relationships[simplified Ball_def case_prod_beta prod_eq_iff fst_conv snd_conv, rule_format]:\n \"\\(((pk1,sk1),Ggood1,Gbad1,S1,G1), (S2,G2,G'2,z'2))\\supp goodbad_o2h_distr_ext. \n (pk1,sk1) = z'2 \\ G1=G'2 \\ S1=S2\" \n unfolding goodbad_o2h_distr_ext_def\n by (simp add: case_prod_beta Let_def)\n\n(* (S,G,z) <$ goodbad_scs_distr; *)\ndefinition \"goodbad_scs_distr = \n bind_distr (keygenT undefined) (\\(pk,sk).\n bind_distr (uniform {G. \\m. G m \\ Rgood' pk sk m}) (\\Ggood.\n bind_distr (Rbad_select pk sk) (\\S::msg set.\n point_distr (S,Ggood,(pk,sk)))))\"\n\nlemma [simp]: \"weight goodbad_scs_distr = 1\"\n unfolding goodbad_scs_distr_def \n apply (simp flip: not_ex not_all add: Let_def case_prod_beta)\n apply (subst choice_iff[symmetric])+\n apply (subst ex_in_conv[])+\n using Rgood'_notempty Rbad'_notempty\n by simp\n\nlemma map_distr_goodbad_o2h_distr_goodbad_scs_distr:\n \"map_distr (\\x. (fst x, fst (snd x), snd (snd (snd x)))) goodbad_o2h_distr = goodbad_scs_distr\"\nproof -\n have \"map_distr (\\(S,G,G',z'). (S,G,z')) goodbad_o2h_distr = goodbad_scs_distr\"\n unfolding goodbad_o2h_distr_def goodbad_o2h_distr_ext_def goodbad_scs_distr_def\n apply (simp flip: bind_distr_map_distr add: case_prod_beta Let_def)\n apply (subst choice_iff[symmetric])+\n apply (subst ex_in_conv[])+\n using Rbad'_notempty unfolding case_prod_beta by simp\n then show ?thesis\n unfolding case_prod_beta by -\nqed\n\nlemma squash_rnd1:\n \"map_distr (\\x. (snd (snd x), fst (snd x), fst x)) goodbad_scs_distr = bind_distr (keygenT undefined) (\\z. map_distr (Pair z) (product_distr (uniform {G. \\m. G m \\ Rgood' (fst z) (snd z) m}) (Rbad_select (fst z) (snd z))))\"\n unfolding goodbad_scs_distr_def\n by (simp flip: bind_distr_map_distr add: case_prod_beta)\n\n\n\n\nlemma comm_op_Gout2_tmp_Gout2:\n assumes [simp]: \"declared_qvars \\quantA1, Hin1, Hout1, Gin1, Gout1, quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gout2\\\"\n shows \"(comm_op\\\\Gout2, tmp_Gout2\\) \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2\\\"\n (is \"?lhs = ?rhs\")\nproof -\n define C where \"C = comm_op\\\\Gout2, tmp_Gout2\\\"\n have \"unitary C\"\n unfolding C_def by simp\n note colo = qvar_trafo'_colocal[OF _ \\unitary C\\]\n have C_tmp_Gout2: \"qvar_trafo' C \\tmp_Gout2\\ \\Gout2\\\"\n unfolding C_def by (rule qvar_trafo'_comm_op', simp)\n have C1: \"qvar_trafo' C \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\\"\n by (rule colo, simp add: C_def)\n have C2:\"qvar_trafo' C \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\\"\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n by (fact C_tmp_Gout2)\n from C1 C2 have \"qvar_trafo' C\n (variable_concat \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2\\)\n (variable_concat \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\)\"\n by (rule qvar_trafo'_concat, simp_all)\n then show ?thesis\n unfolding C_def\n by (rule qvar_trafo'_quantum_equality_full)\nqed\n\nlemma comm_op_Gout2_tmp_Gout2_tmp:\n assumes [simp]: \"declared_qvars \\quantA1, Hin1, Hout1, Gin1, Gout1, quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gout2, tmp_Gout1\\\"\n shows \"(comm_op\\\\Gout2, tmp_Gout2\\) \\ \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gout2\\\n = \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2, Gout2\\\"\n (is \"?lhs = ?rhs\")\nproof -\n define C where \"C = comm_op\\\\Gout2, tmp_Gout2\\\"\n have \"unitary C\"\n unfolding C_def by simp\n note colo = qvar_trafo'_colocal[OF _ \\unitary C\\]\n have C_tmp_Gout2: \"qvar_trafo' C \\tmp_Gout2\\ \\Gout2\\\"\n unfolding C_def by (rule qvar_trafo'_comm_op', simp)\n have C_tmp_Gout2': \"qvar_trafo' C \\Gout2\\ \\tmp_Gout2\\\"\n unfolding C_def by (rule qvar_trafo'_comm_op, simp)\n have C1: \"qvar_trafo' C \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\ \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\\"\n by (rule colo, simp add: C_def)\n have C2:\"qvar_trafo' C \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2, Gout2\\ \\quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gout2\\\"\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule colo, simp add: C_def)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (fact C_tmp_Gout2)\n by (fact C_tmp_Gout2')\n from C1 C2 have \"qvar_trafo' C\n (variable_concat \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\ \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2, Gout2\\)\n (variable_concat \\quantA1, Hin1, Hout1, Gin1, Gout1, tmp_Gout1\\ \\quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gout2\\)\"\n by (rule qvar_trafo'_concat, simp_all)\n then show ?thesis\n unfolding C_def\n by (rule qvar_trafo'_quantum_equality_full)\nqed\n\nlemma comm_op_Gout2_tmp_Gout2':\n assumes [simp]: \"declared_qvars \\quantA1, Hin1, Hout1, Gin1, Gout1, quantA2, Hin2, Hout2, tmp_Gin2, Gout2, tmp_Gout2\\\"\n shows \"(comm_op\\\\Gout2, tmp_Gout2\\) \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, tmp_Gin2, tmp_Gout2\\\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, tmp_Gin2, Gout2\\\"\n (is \"?lhs = ?rhs\")\n apply (rule qvar_trafo'_quantum_equality_full)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_comm_op, simp)\n by -\n\n\n\nlemma comm_op_Gin2_tmp_Gin2:\n assumes [simp]: \"declared_qvars \\quantA1, Hin1, Hout1, Gin1, Gout1, quantA2, Hin2, Hout2, Gin2, tmp_Gout2, tmp_Gin2\\\"\n shows \"(comm_op\\\\Gin2, tmp_Gin2\\) \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, tmp_Gout2\\\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, tmp_Gin2, tmp_Gout2\\\"\n apply (rule qvar_trafo'_quantum_equality_full)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_comm_op', simp)\n by (rule qvar_trafo'_colocal, simp, simp)\n\nlemma comm_op_Gin2_tmp_Gin2':\n assumes [simp]: \"declared_qvars \\quantA1, Hin1, Hout1, Gin1, Gout1, quantA2, Hin2, Hout2, Gin2, Gout2, tmp_Gin2\\\"\n shows \"comm_op\\\\Gin2, tmp_Gin2\\ \\ \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, tmp_Gin2, Gout2\\\n = \\quantA1, Hin1, Hout1, Gin1, Gout1\\ \\\\ \\quantA2, Hin2, Hout2, Gin2, Gout2\\\"\n apply (rule qvar_trafo'_quantum_equality_full)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n apply (rule qvar_trafo'_concat[rotated 2], simp, simp)\n apply (rule qvar_trafo'_comm_op, simp)\n apply (rule qvar_trafo'_colocal, simp, simp)\n by -\n\n\nlemma aux5a:\n assumes [simp]: \"declared_qvars \\quantA1, quantA2, Gout2, Gin2, aux1, aux2\\\"\n shows \"\\quantA1,aux1\\ \\\\ \\quantA2,aux2\\ \n \\ Span {ket (gin2, G2 gin2)}\\\\Gin2, Gout2\\ \n \\ \\quantA1,aux1\\ \\\\ \\quantA2,aux2\\ \n \\ Span {ket (G2 gin2)}\\\\Gout2\\ \\ (- Span {ket (G2 gin2)})\\\\Gout2\\\"\n apply (rule sup.coboundedI1)\n apply (rule inf_mono)\n apply simp\n apply (rule ket_less_specific)\n by simp\n\nlemma aux5b:\n assumes [simp]: \"declared_qvars \\quantA1, quantA2, Gout2, Gin2, aux1, aux2\\\"\n shows \"x \\ G2 gin2 \\ \\quantA1,aux1\\ \\\\ \\quantA2,aux2\\ \n \\ Span {ket (gin2, G2 gin2)}\\\\Gin2, Gout2\\ \\ (- Span {ket x})\\\\Gout2\\\"\n apply (rule inf.coboundedI2)\n apply (rule order_trans)\n apply (rule ket_less_specific)\n apply simp\n apply simp\n apply (rule span_ortho_span)\n by simp\n\n(* lemma variable_for_name[intro]: \"variable_name (Abs_variable (Abs_variable_raw (name,range (embedding::'a\\_))) :: 'a::universe variable) = name\"\n unfolding variable_name.rep_eq\n apply (subst Abs_variable_inverse)\n unfolding variable_raw_domain.rep_eq\n apply simp\n apply (subst Abs_variable_raw_inverse)\n apply simp_all\n unfolding variable_raw_name.rep_eq\n apply (subst Abs_variable_raw_inverse)\n by auto *)\n\nlemma aux6:\n assumes [simp]: \"declared_qvars \\quantA1, quantA2, Gout2, Gin2, aux1, aux2\\\"\n shows \"\\quantA1,aux1\\ \\\\ \\quantA2,aux2\\ \\ Span {ket gin2}\\\\Gin2\\ \\ \\\\\\[\\ket 0\\ = 1] \\ (\\quantA1,aux1\\ \\\\ \\quantA2,aux2\\ \\ Span {ket (gin2, 0)}\\\\Gin2, Gout2\\) \\
ket 0\\\\Gout2\\\"\n apply (auto intro: inf.coboundedI2 inf.coboundedI1)\n apply (subst inf_commute, subst inf_assoc, rule inf.coboundedI2, subst inf_commute)\n apply (subst tensor_lift[symmetric], simp)\n apply (subst span_tensor)\n by (simp add: ket_product)\n\nlemma [simp]: \"{.. n=0\" for n :: nat\n by auto\n\nlemma correctness_pksk_enc_leq1[simp]: \"correctness_pksk enc dec msg_space p pk sk \\ 1\"\n apply (rule correctness_pksk_leq1)\n by auto\n\n\nlemma Prob_Rbad_select: \"Prob (Rbad_select pk sk) (Collect ((\\) guess2)) = \\bad pk sk guess2\"\nproof -\n have \"Prob (Rbad_select pk sk) (Collect ((\\) guess2)) =\n prob (map_distr (\\S. guess2\\S) (Rbad_select pk sk)) True\"\n by (subst Prob_map_distr, simp)\n also have \"\\ = prob (bernoulli (\\bad pk sk guess2)) 1\"\n apply (simp add: Rbad_select_def)\n apply (subst map_distr_product_distr'_onepoint, simp)\n apply (subst prob_True_prob_1, simp)\n apply (rewrite at \"map_distr \\\" DEADID.rel_mono_strong[of _ \"\\x. x\"])\n by auto\n also have \"\\ = \\bad pk sk guess2\"\n apply (subst bernoulli1)\n by auto\n finally show ?thesis\n by -\nqed\n\n(* lemma \"bind_distr \\ (\\x. bernoulli (f x)) = bernoulli (expectation (map_distr f \\))\" *)\n\n\nlemma bind_keygen_bernoulli_correct: \n \"bind_distr (keygenT undefined) (\\x. bernoulli (correctness_pksk enc dec msg_space () (fst x) (snd x))) = bernoulli (correctness params keygen enc dec msg_space)\"\nproof (rule bin_distr_eqI[where x=1 and y=0], (auto)[3])\n define c C where \"c x = correctness_pksk enc dec msg_space () (fst x) (snd x)\" \n and \"C = correctness params keygen enc dec msg_space\" for x\n have \"prob (bind_distr (keygenT undefined) (\\x. bernoulli (c x))) 1 = \n prob (bind_distr (map_distr c (keygenT undefined)) bernoulli) 1\"\n apply (subst bind_distr_map_distr') by simp\n also have \"\\ = expectation' (keygenT undefined) c\"\n apply (rule prob_bind_distr_bernoulli) \n unfolding c_def by auto\n also have \"\\ = C\"\n unfolding C_def c_def correctness_def params_def params0_def keygenT_def case_prod_beta\n by simp\n also have \"\\ = prob (bernoulli C) 1\"\n apply (subst bernoulli1)\n unfolding C_def by auto\n finally show \"prob (bind_distr (keygenT undefined) (\\x. bernoulli (c x))) 1 = prob (bernoulli C) 1\"\n by -\nqed\n\nlemma aux7: \n assumes \"x <= 4 * real (qG + 2 * qH + qD + 1) * y\"\n shows \"2 * sqrt ((1 + real (qG + 2 * qH + qD + 1)) * x)\n \\ 2 * sqrt (4 * (1 + real (qG + 2 * qH + qD + 1)) * \n real (qG + 2 * qH + qD + 1) * y)\"\n apply (subst (5) mult.commute)\n apply (subst mult.assoc)\n using assms by auto\n\nlemma aux8:\n assumes \"x \\ y\"\n shows \"4 * real (qG + 2 * qH + qD + 1) * x \\ (4 + (4 * real qG + 8 * real qH + 4 * real qD)) * y\"\n (* shows \"4 * real (qG + 2 * qH + qD + 1) * x \\ (1 + (real qG + 2 * real qH + real qD)) * y\" *)\n (* shows \"4 * real (qG + 2 * qH + qD + 1) * x \\ (4 + (4 * real qG + 8 * real qH + 4 * real qD)) * y\" *)\n using assms by auto\n\ndefinition \"G_goodbad_o2h_squash2 = \nbind_distr (keygenT undefined) (\\z. map_distr (Pair z) (bind_distr (uniform {G. \\m. G m \\ Rgood' (fst z) (snd z) m}) (\\za. map_distr (Pair za) (bind_distr (uniform {G. \\m. G m \\ Rbad' (fst z) (snd z) m}) (\\zb. map_distr (\\x. (zb, x, za)) (Rbad_select (fst z) (snd z)))))))\"\n\n(* A coupling of goodbad_o2h_distr and G_goodbad_o2h_squash2.\n Returns ((pk,sk),Ggood,Gbad,S,G), (S,G,Ggood,(pk,sk)) *)\ndefinition \"goodbad_o2h_distr_ext2 = \n bind_distr (keygenT undefined) (\\(pk,sk).\n bind_distr (uniform {G. \\m. G m \\ Rgood' pk sk m}) (\\Ggood.\n bind_distr (uniform {G. \\m. G m \\ Rbad' pk sk m}) (\\Gbad.\n bind_distr (Rbad_select pk sk) (\\S::msg set.\n let G = \\m. if m \\ S then Gbad m else Ggood m in\n point_distr (((pk,sk),Ggood,Gbad,S,Ggood), (S,Ggood,G,(pk,sk)))))))\"\n\nlemma goodbad_o2h_distr_ext2_relationships[simplified Ball_def case_prod_beta prod_eq_iff fst_conv snd_conv, rule_format]:\n \"\\(((pk1,sk1),Ggood1,Gbad1,S1,G1), (S2,G2,G'2,z'2))\\supp goodbad_o2h_distr_ext2. \n (pk1,sk1) = z'2 \\ G1=G2 \\ S1=S2\" \n unfolding goodbad_o2h_distr_ext2_def\n by (simp add: case_prod_beta Let_def)\n\nlemma [simp]: \"map_distr fst goodbad_o2h_distr_ext2 = G_goodbad_o2h_squash2\"\n unfolding goodbad_o2h_distr_ext2_def G_goodbad_o2h_squash2_def\n Let_def bind_distr_map_distr[symmetric] case_prod_beta \n by simp\n\nlemma [simp]: \"map_distr snd goodbad_o2h_distr_ext2 = goodbad_o2h_distr\"\n unfolding goodbad_o2h_distr_def goodbad_o2h_distr_ext2_def goodbad_o2h_distr_ext_def\n Let_def bind_distr_map_distr[symmetric] case_prod_beta \n by simp\n\nlemma [simp]: \"a \\ b \\ c \\ b\" for b :: \"_::semilattice_inf\"\n by (simp add: inf.coboundedI1)\n\nlemma [simp]: \"a \\ b \\ c \\ a\" for b :: \"_::semilattice_inf\"\n by (simp add: inf.coboundedI1)\n\n\n\nlemma Prob_goodbad_o2h_distr_bad_pk: \n \"Prob goodbad_o2h_distr {(S, G, G', x, y). bad_pk x y} \\ correctness params keygen enc dec msg_space\"\nproof -\n have [simp]: \"\\xa. \\m. xa m \\ Rgood' (fst x) (snd x) m\" for x\n by (simp add: Rgood'_ex)\n have [simp]: \"\\xa. \\m. xa m \\ Rbad' (fst x) (snd x) m\" for x\n by (simp add: Rbad'_ex)\n let ?cpksk = \"correctness_pksk enc dec msg_space ()\"\n let ?cpkskm = \"correctness_pkskm enc dec ()\"\n have \"?cpksk pk sk \\ 1\" if \"bad_pk pk sk\" for pk sk\n proof -\n from that obtain m where msg_space: \"m\\msg_space ()\" and \"Rbad pk sk m = UNIV\"\n unfolding bad_pk_def by auto\n then have \"dec () sk (encr () pk m r) \\ Some m\" for r\n unfolding Rbad_def by auto\n with msg_space have \"?cpkskm pk sk m = 1\"\n unfolding correctness_pkskm_def enc_def Prob_map_distr by auto\n with msg_space show \"?cpksk pk sk \\ 1\"\n by (metis (full_types) \\bad_correctness_pksk \\bad_correctness_pkskm)\n qed\n moreover have \"bad_pk pk sk\" if \"?cpksk pk sk \\ 1\" for pk sk\n proof -\n from that have \"?cpksk pk sk = 1\"\n by (simp add: basic_trans_rules(24))\n from this[symmetric] have \"1 \\ correctness_pkskm enc dec () pk sk ` msg_space ()\"\n unfolding correctness_pksk_def\n by (metis (full_types) Max_ge Max_in cSup_eq_maximum equals0D equals0I finite finite_imageI imageI nonempty_msg_space)\n then obtain m where msg_space: \"m\\msg_space ()\" and \"?cpkskm pk sk m = 1\"\n by auto\n then have \"Prob (enc () pk m) {c. dec () sk c \\ Some m} = 1\"\n unfolding correctness_pkskm_def by simp\n then have \"Prob (uniform UNIV) {r. dec () sk (encr () pk m r) \\ Some m} = 1\"\n unfolding Prob_map_distr enc_def by simp\n then have \"{r. dec () sk (encr () pk m r) \\ Some m} = UNIV\"\n apply (rule full_Prob[rotated 2])\n by auto\n with msg_space have \"Rbad pk sk m = UNIV\"\n unfolding Rbad_def by simp\n with msg_space show \"bad_pk pk sk\"\n unfolding bad_pk_def by auto\n qed\n ultimately have bad_pk_cpksk: \"bad_pk pk sk \\ ?cpksk pk sk \\ 1\" for pk sk\n by auto\n\n have \"Prob goodbad_o2h_distr {(S, G, G', x, y). bad_pk x y} = Prob (keygenT undefined) {(pk,sk). bad_pk pk sk}\"\n unfolding goodbad_o2h_distr_def goodbad_o2h_distr_ext_def Prob_map_distr case_prod_beta bind_distr_map_distr[symmetric] Let_def\n by simp\n\n also have \"\\ = Prob (map_distr (\\(pk,sk). ?cpksk pk sk) (keygenT undefined)) {1..}\"\n apply (subst bad_pk_cpksk)\n unfolding bad_pk_def correctness_pksk_def Prob_map_distr case_prod_beta\n by auto\n\n also have \"\\ \\ expectation (map_distr (\\(pk,sk). ?cpksk pk sk) (keygenT undefined)) / 1\"\n apply (rule markov_inequality)\n apply (rule expectation_exists_bounded[where a=0 and b=1])\n by auto\n also have \"\\ = correctness params keygen enc dec msg_space\"\n unfolding correctness_def params_def params0_def keygenT_def\n by simp\n finally show ?thesis\n by -\nqed\n\nlemma Rgood'_def':\n assumes \"\\ bad_pk pk sk\"\n assumes \"m \\ msg_space()\"\n shows \"Rgood' pk sk m = - Rbad pk sk m\"\n using assms unfolding Rgood'_def bad_pk_def by auto\n\nlemma guard_equal_not_in_range:\n fixes pk sk G c\n assumes good: \"Rgood'G pk sk G\"\n defines \"m' == dec () sk c\"\n shows \"(if bad_pk pk sk then (c \\ encrT G pk ` msg_space ()) \n else (m'=None \\ encrT G pk (the m') \\ c))\n \\ c \\ encrT G pk ` msg_space ()\"\nproof (cases \"bad_pk pk sk\")\n case True\n then show ?thesis by simp\nnext\n case False\n note not_bad = False\n\n have \"m'\\None\" if \"c \\ encrT G pk ` msg_space ()\"\n proof -\n from that obtain m2 where msg_space: \"m2 \\ msg_space ()\" and c: \"c = encrT G pk m2\"\n unfolding msg_spaceT_def apply atomize_elim by auto\n from good have \"G m2 \\ Rgood' pk sk m2\"\n unfolding Rgood'G_def by simp\n with not_bad msg_space have \"G m2 \\ Rbad pk sk m2\"\n apply (subst (asm) Rgood'_def')\n by auto\n with msg_space have \"dec () sk c = Some m2\"\n unfolding Rbad_def encrT_def c by simp\n with m'_def have \"m' = Some m2\"\n by simp\n then show ?thesis\n by simp\n qed\n\n moreover have \"encrT G pk (the m') = c\" if \"c \\ encrT G pk ` msg_space ()\" and \"m' \\ None\"\n proof -\n from \\m' \\ None\\ obtain m where m': \"m' = Some m\"\n by auto\n from that obtain m2 where msg_space: \"m2 \\ msg_space ()\" and c: \"c = encrT G pk m2\"\n unfolding msg_spaceT_def apply atomize_elim by auto\n from good have \"G m2 \\ Rgood' pk sk m2\"\n unfolding Rgood'G_def by simp\n with not_bad msg_space have \"G m2 \\ Rbad pk sk m2\"\n apply (subst (asm) Rgood'_def')\n by auto\n with msg_space have \"dec () sk c = Some m2\"\n unfolding Rbad_def encrT_def c by simp\n with m' m'_def have \"m = m2\"\n by simp\n with c show ?thesis\n unfolding encrT_def m' by auto\n qed\n\n moreover have \"c \\ encrT G pk ` msg_space ()\" \n if \"m'\\None\" and c_def[symmetric]: \"encrT G pk (the m') = c\"\n proof -\n from that obtain m where msg_space: \"m \\ msg_space ()\" and m': \"m' = Some m\"\n \\ \\Uses that dec never returns a message outside the msg_space by construction\\\n apply atomize_elim unfolding dec_def m'_def apply auto\n by (smt option.case_eq_if option.sel option.simps(2))\n have \"c = encrT G pk m\"\n unfolding encrT_def c_def m' by simp\n with msg_space show ?thesis by auto\n qed\n ultimately show ?thesis using False by auto\nqed\n \nlemma goodbad_o2h_distr_goodG:\n assumes \"(S, Ggood, Gbad, (pk,sk)) \\ supp goodbad_o2h_distr\"\n shows \"Rgood'G pk sk Ggood\"\nproof -\n from assms have \"Ggood \\ supp (uniform {G. \\m. G m \\ Rgood' pk sk m})\"\n unfolding goodbad_o2h_distr_def goodbad_o2h_distr_ext_def\n by (auto simp: Let_def)\n then have \"Ggood m \\ Rgood' pk sk m\" for m\n apply (cases \"{G. \\m. G m \\ Rgood' pk sk m} = {}\")\n apply simp\n apply (subst (asm) supp_uniform)\n apply auto using Rgood'_ex by blast\n then show ?thesis\n unfolding Rgood'G_def by simp\nqed\n\n\nlemma dec_msg_spaceI: \"Some m = dec () sk c \\ m \\ msg_space ()\"\n unfolding dec_def apply (cases \"dec0 () sk c\") apply auto\n by (metis option.sel option.simps(2))\n\ndefinition \"HqHr_match pk G Hq1 Hr1 Hq2 \\ \n (\\c\\encrT G pk ` msg_space (). Hq1 c = Hq2 c) \n \\ (\\c. c \\ encrT G pk ` msg_space () \\ Hr1 c = Hq2 c)\"\n for Hq1 Hr1 Hq2 :: \"ciph \\ key\"\n\ndefinition \"HqHr_joint_pick pk G = map_distr (\\(Hq::ciph\\key,Hr). ((Hq,Hr),\n ((\\c. if c \\ encrT G pk ` msg_space() then Hq c else Hr c),\n (\\c. if c \\ encrT G pk ` msg_space() then Hr c else Hq c))))\n (uniform UNIV)\"\n \n\nlemma HqHr_joint_pick_fst: \"map_distr fst (HqHr_joint_pick pk G) = uniform UNIV\"\n unfolding HqHr_joint_pick_def by (simp add: case_prod_beta)\n\nlemma HqHr_joint_pick_snd: \"map_distr snd (HqHr_joint_pick pk G) = uniform UNIV\"\nproof -\n define f :: \\(ciph\\key) * (ciph\\key) \\ (ciph\\key) * (ciph\\key)\\ where \"f = (\\(Hq,Hr).\n ((\\c. if c \\ encrT G pk ` msg_space() then Hq c else Hr c),\n (\\c. if c \\ encrT G pk ` msg_space() then Hr c else Hq c)))\"\n have \"f o f = id\"\n proof (rule ext, case_tac x, simp)\n fix Hq Hr\n have \\fst (f (f (Hq,Hr))) = Hq\\\n unfolding f_def by auto\n moreover have \\snd (f (f (Hq,Hr))) = Hr\\\n unfolding f_def by auto\n ultimately show \\f (f (Hq,Hr)) = (Hq,Hr)\\\n by (simp add: prod_eq_iff)\n qed\n with this have \"bij f\"\n by (rule o_bij)\n have \"map_distr snd (HqHr_joint_pick pk G) = map_distr f (uniform UNIV)\"\n unfolding case_prod_beta HqHr_joint_pick_def f_def by simp\n also from \\bij f\\ have \"\\ = uniform UNIV\"\n by (rule map_distr_uniform)\n finally show ?thesis\n by -\nqed\n\nlemma HqHr_joint_pick_supp: \n assumes \"((Hq1,Hr1),(Hq2,Hr2)) \\ supp (HqHr_joint_pick pk G)\"\n shows \"HqHr_match pk G Hq1 Hr1 Hq2\"\nproof -\n have \"Hq1 c = Hq2 c\" if \"c\\encrT G pk ` msg_space ()\" for c\n proof -\n from assms \n have \"(Hq1,Hq2) \\ (\\((Hq1,Hr1),(Hq2,Hr2)). (Hq1,Hq2)) ` supp (HqHr_joint_pick pk G)\"\n by (metis (mono_tags, lifting) old.prod.case rev_image_eqI)\n also have \"\\ = (\\(Hq, Hr).\n (Hq, (\\c. if c \\ encrT G pk ` msg_space () then Hq c else Hr c))) ` UNIV\"\n unfolding HqHr_joint_pick_def by (simp add: image_comp case_prod_beta)\n finally obtain Hq Hr where \"Hq1 = Hq\" and \"Hq2 = (\\c. if c \\ encrT G pk ` msg_space () then Hq c else Hr c)\"\n apply atomize_elim by auto\n then show \"Hq1 c = Hq2 c\"\n using that by simp\n qed\n moreover have \"Hr1 c = Hq2 c\" if \"c \\ encrT G pk ` msg_space ()\" for c\n proof -\n from assms \n have \"(Hr1,Hq2) \\ (\\((Hq1,Hr1),(Hq2,Hr2)). (Hr1,Hq2)) ` supp (HqHr_joint_pick pk G)\"\n by (metis (mono_tags, lifting) old.prod.case rev_image_eqI)\n also have \"\\ = (\\(Hq, Hr).\n (Hr, (\\c. if c \\ encrT G pk ` msg_space () then Hq c else Hr c))) ` UNIV\"\n unfolding HqHr_joint_pick_def by (simp add: image_comp case_prod_beta)\n finally obtain Hq Hr where \"Hr1 = Hr\" and \"Hq2 = (\\c. if c \\ encrT G pk ` msg_space () then Hq c else Hr c)\"\n apply atomize_elim by auto\n then show \"Hr1 c = Hq2 c\"\n using that by simp\n qed\n ultimately show ?thesis\n unfolding HqHr_match_def by auto\nqed\n\nlemma HqHr_match_mk_Hq:\n assumes \"HqHr_match pk G Hq1 Hr1 Hq2\"\n shows \"mk_Hq Hq1 H0 G pk = mk_Hq Hq2 H0 G pk\"\nproof (rule ext, rename_tac m, case_tac \"m \\ msg_space ()\")\n fix m :: msg\n assume m: \"m \\ msg_space ()\"\n then have \"Hq1 (encrT G pk m) = Hq2 (encrT G pk m)\"\n using assms unfolding HqHr_match_def by auto\n then show \"mk_Hq Hq1 H0 G pk m = mk_Hq Hq2 H0 G pk m\"\n by (simp add: mk_Hq_def m msg_spaceT_def)\nnext\n fix m :: msg\n assume \"m \\ msg_space ()\"\n then show \"mk_Hq Hq1 H0 G pk m = mk_Hq Hq2 H0 G pk m\"\n by (simp add: mk_Hq_def msg_spaceT_def)\nqed\n\nlemma reorder_qeq1:\n assumes [simp]: \"declared_qvars \\quantA1,Gin1,Gout1,Hin1,Hout1,quantA2,Gin2,Gout2,Hin2,Hout2\\\"\n shows \"\\quantA1,Gin1,Gout1,Hin1,Hout1\\ \\\\ \\quantA2,Gin2,Gout2,Hin2,Hout2\\\n = \\quantA1,Hin1,Hout1,Gin1,Gout1\\ \\\\ \\quantA2,Hin2,Hout2,Gin2,Gout2\\\"\nproof -\n obtain A where A1: \"qvar_trafo A \\quantA1,Gin1,Gout1,Hin1,Hout1\\ \\quantA1,Hin1,Hout1,Gin1,Gout1\\\"\n and A2: \"qvar_trafo A \\quantA2,Gin2,Gout2,Hin2,Hout2\\ \\quantA2,Hin2,Hout2,Gin2,Gout2\\\"\n apply atomize_elim apply (rule exI, rule conjI)\n\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_comm_op, simp)\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_tensor, simp)\n defer\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_assoc_op, simp)\n apply (rule qvar_trafo_comm_op, simp)\n apply (rule qvar_trafo_id, simp)\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_tensor, simp)\n defer\n apply (rule qvar_trafo_adj)\n apply (rule qvar_trafo_assoc_op, simp)\n apply (rule qvar_trafo_id, simp)\n apply (rule qvar_trafo_comm_op, simp)\n\n (* Witness is \\<^term>\\(comm_op \\ assoc_op* \\ idOp \\ (comm_op \\ assoc_op) \\ idOp \\ comm_op)\\ *)\n\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_comm_op, simp)\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_tensor, simp)\n defer\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_assoc_op, simp)\n apply (rule qvar_trafo_comm_op, simp)\n apply (rule qvar_trafo_id, simp)\n apply (rule qvar_trafo_mult)\n apply (rule qvar_trafo_tensor, simp)\n defer\n apply (rule qvar_trafo_adj)\n apply (rule qvar_trafo_assoc_op, simp)\n apply (rule qvar_trafo_id, simp)\n apply (rule qvar_trafo_comm_op, simp)\n\n by auto\n\n have [simp]: \"(A \\ A*) = idOp\"\n using qvar_trafo_unitary[OF A1] by simp\n\n show ?thesis\n apply (subst quantum_equality_reorder[OF A1 A2])\n by auto\nqed\n\nlemma abs_compute_step:\n fixes r s x y z :: real\n assumes \"abs (x - z) \\ s\"\n assumes \"abs (z - y) \\ r - s\"\n shows \"abs (x - y) \\ r\"\n using assms by auto\n\nlemma abs_compute_end:\n fixes r s x y z :: real\n assumes \"r \\ 0\"\n shows \"abs (x - x) \\ r\"\n using assms by auto\n\nlemma flip_abs:\n fixes r :: real\n assumes \"abs (x - y) \\ r\"\n shows \"abs (y - x) \\ r\"\n using assms apply (subst abs_minus_commute) by simp\n\nlemma ds_encT_security2_aux: \n assumes abs1: \"abs1' \\ abs1\" and abs2: \"abs2' \\ abs2\"\n assumes abs2_pos: \"abs2' \\ 0\"\n assumes ds: \"ds \\ abs1' + 2 * sqrt(1+real q) * sqrt( abs2' + 4 * q / real (card (msg_space())) )\"\n shows \"ds \\ abs1 + 2 * sqrt(1+q) * sqrt( abs2 + 4 * q / card (msg_space()) )\"\n using ds apply (rule order.trans)\n using abs1 apply (rule add_mono)\n apply (rule mult_mono)\n apply simp\n apply (rule real_sqrt_le_mono)\n using abs2 abs2_pos by auto\n\nlemma disjointnessT0': \"disjointnessT = 0\"\n apply (rule disjointnessT0)\n by (simp add: enc0_injective)\n\nlemma security_encFO_aux:\n assumes leq1: \"ds' \\ ds0'a+ds0'b\"\n assumes leq2: \"ds \\ ds0a+ds0b\"\n assumes sec: \"sec \\ prf1 + prf2 + ds' + ds + disjointnessT + \n 8 * sqrt( 4 * (1+real (qG+2*qH+qD+1))\n * real (qG+2*qH+qD+1) * correctness params keygen enc dec msg_space)\n + 2 * correctness params keygen enc dec msg_space\"\n shows \"sec \\ prf1 + prf2 + ds0'a+ds0'b + ds0a+ds0b +\n 8 * sqrt( 4 * (q+qD+2)\n * (q+qD+1) * correctness params0 keygen0 enc0 dec0 msg_space0)\n + 2 * correctness params0 keygen0 enc0 dec0 msg_space0\"\n\n using assms unfolding q_def of_nat_mult of_nat_add of_nat_1 of_nat_numeral\n by (smt Rings.mult_sign_intros(1) correctness_punc disjointnessT0 enc0_injective mult_left_mono qD_geq_1 qG_geq_1 qH_geq_1 real_of_nat_ge_one_iff real_sqrt_le_mono)\n\nend\n", "meta": {"author": "dominique-unruh", "repo": "hksu-verification", "sha": "66b28f0e955bd54113eb316247208e94ec60be6a", "save_path": "github-repos/isabelle/dominique-unruh-hksu-verification", "path": "github-repos/isabelle/dominique-unruh-hksu-verification/hksu-verification-66b28f0e955bd54113eb316247208e94ec60be6a/FO_Proofs.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290806, "lm_q2_score": 0.28140560742914383, "lm_q1q2_score": 0.14180202200502967}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__43_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__43_on_rules imports n_german_lemma_on_inv__43\nbegin\nsection{*All lemmas on causal relation between inv__43*}\nlemma lemma_inv__43_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__43 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__43) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__43) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__43_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.2782567817320044, "lm_q1q2_score": 0.14130209507966085}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__34_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__34_on_rules imports n_german_lemma_on_inv__34\nbegin\nsection{*All lemmas on causal relation between inv__34*}\nlemma lemma_inv__34_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__34 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__34) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__34) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__34_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.27512971193602087, "lm_q1q2_score": 0.1407884420451357}} {"text": "section {*L\\_ATS\\_SchedF\\_SDB*}\ntheory\n L_ATS_SchedF_SDB\n\nimports\n L_ATS_SchedF_DB\n L_ATS_SchedF_SB\n\nbegin\n\nlocale ATS_SchedF_SDB =\n ATS_SchedF_SB\n \"TSstructure :: 'TSstructure \\ bool\"\n \"configurations :: 'TSstructure \\ 'conf set\"\n \"initial_configurations :: 'TSstructure \\ 'conf set\"\n \"step_labels :: 'TSstructure \\ 'label set\"\n \"step_relation :: 'TSstructure \\ 'conf \\ 'label \\ 'conf \\ bool\"\n \"effects :: 'TSstructure \\ 'event set\"\n \"marking_condition :: 'TSstructure \\ ('label, 'conf) derivation \\ bool\"\n \"marked_effect :: 'TSstructure \\ ('label, 'conf) derivation \\ 'event set\"\n \"unmarked_effect :: 'TSstructure \\ ('label, 'conf) derivation \\ 'event set\"\n \"fixed_schedulers :: 'TSstructure \\ 'fixed_scheduler set\"\n \"empty_fixed_scheduler :: 'TSstructure \\ 'fixed_scheduler\"\n \"fixed_scheduler_extendable :: 'TSstructure \\ 'fixed_scheduler \\ bool\"\n \"get_fixed_scheduler :: 'conf \\ 'fixed_scheduler\"\n +\n ATS_SchedF_DB\n \"TSstructure :: 'TSstructure \\ bool\"\n \"configurations :: 'TSstructure \\ 'conf set\"\n \"initial_configurations :: 'TSstructure \\ 'conf set\"\n \"step_labels :: 'TSstructure \\ 'label set\"\n \"step_relation :: 'TSstructure \\ 'conf \\ 'label \\ 'conf \\ bool\"\n \"effects :: 'TSstructure \\ 'event set\"\n \"marking_condition :: 'TSstructure \\ ('label, 'conf) derivation \\ bool\"\n \"marked_effect :: 'TSstructure \\ ('label, 'conf) derivation \\ 'event set\"\n \"unmarked_effect :: 'TSstructure \\ ('label, 'conf) derivation \\ 'event set\"\n \"fixed_schedulers :: 'TSstructure \\ 'fixed_scheduler set\"\n \"empty_fixed_scheduler :: 'TSstructure \\ 'fixed_scheduler\"\n \"fixed_scheduler_extendable :: 'TSstructure \\ 'fixed_scheduler \\ bool\"\n \"get_fixed_scheduler_DB :: 'TSstructure \\ ('label, 'conf) derivation \\ nat \\ 'fixed_scheduler\"\n for\n TSstructure configurations initial_configurations step_labels step_relation effects marking_condition marked_effect unmarked_effect fixed_schedulers empty_fixed_scheduler fixed_scheduler_extendable get_fixed_scheduler get_fixed_scheduler_DB\n +\n\nassumes AX_state_based_vs_derivation_based_get_fixed_scheduler: \"\n TSstructure G\n \\ derivation_initial G d\n \\ d n = Some (pair e c)\n \\ get_fixed_scheduler_DB G d n = get_fixed_scheduler c\"\n\ncontext ATS_SchedF_SDB\nbegin\n\nlemma Nonblockingness_branching_SB_DB_restricted: \"\n TSstructure G\n \\ Nonblockingness_branching_restricted G \\ Nonblockingness_branching_restricted_DB G\"\n apply(rule order_antisym)\n apply(simp add: Nonblockingness_branching_restricted_def Nonblockingness_branching_restricted_DB_def)\n apply(clarsimp)\n apply(rename_tac dh n)(*strict*)\n apply(erule_tac\n x=\"dh\"\n in allE)\n apply(erule_tac\n x=\"n\"\n in allE)\n apply(clarsimp)\n apply(subgoal_tac \"\\e c. dh n = Some (pair e c)\")\n apply(rename_tac dh n)(*strict*)\n apply(clarsimp)\n apply(rename_tac dh n e c)(*strict*)\n apply(subgoal_tac \"get_fixed_scheduler_DB G dh n = get_fixed_scheduler c\")\n apply(rename_tac dh n e c)(*strict*)\n apply(simp add: get_configuration_def)\n apply(rename_tac dh n e c)(*strict*)\n apply(rule AX_state_based_vs_derivation_based_get_fixed_scheduler)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(rule some_position_has_details_before_max_dom)\n apply(rename_tac dh n)(*strict*)\n apply(rule derivation_initial_is_derivation)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(force)\n apply(simp add: Nonblockingness_branching_restricted_def Nonblockingness_branching_restricted_DB_def)\n apply(clarsimp)\n apply(rename_tac dh n)(*strict*)\n apply(erule_tac\n x=\"dh\"\n in allE)\n apply(erule_tac\n x=\"n\"\n in allE)\n apply(clarsimp)\n apply(subgoal_tac \"\\e c. dh n = Some (pair e c)\")\n apply(rename_tac dh n)(*strict*)\n apply(clarsimp)\n apply(rename_tac dh n e c)(*strict*)\n apply(subgoal_tac \"get_fixed_scheduler_DB G dh n = get_fixed_scheduler c\")\n apply(rename_tac dh n e c)(*strict*)\n apply(simp add: get_configuration_def)\n apply(rename_tac dh n e c)(*strict*)\n apply(rule AX_state_based_vs_derivation_based_get_fixed_scheduler)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n e c)(*strict*)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(rule some_position_has_details_before_max_dom)\n apply(rename_tac dh n)(*strict*)\n apply(rule derivation_initial_is_derivation)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(force)\n apply(rename_tac dh n)(*strict*)\n apply(force)\n done\n\nend\n\nend\n", "meta": {"author": "ControllerSynthesis", "repo": "Isabelle", "sha": "fc776edec292363e49785e5d3a752d9f9cfcf1c9", "save_path": "github-repos/isabelle/ControllerSynthesis-Isabelle", "path": "github-repos/isabelle/ControllerSynthesis-Isabelle/Isabelle-fc776edec292363e49785e5d3a752d9f9cfcf1c9/PRJ_06_03/L_ATS_SchedF_SDB.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290806, "lm_q2_score": 0.27825680567280014, "lm_q1q2_score": 0.14021532137023526}} {"text": "(* Title: HOL/Auth/n_g2kAbsAfter_lemma_inv__38_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_g2kAbsAfter Protocol Case Study*} \n\ntheory n_g2kAbsAfter_lemma_inv__38_on_rules imports n_g2kAbsAfter_lemma_on_inv__38\nbegin\nsection{*All lemmas on causal relation between inv__38*}\nlemma lemma_inv__38_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(f=inv__38 )\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\\\n (\\ d. d\\N\\r=n_n_AStore_i1 d)\\\n (r=n_n_SendReqS_j1 )\\\n (r=n_n_SendReqEI_i1 )\\\n (r=n_n_SendReqES_i1 )\\\n (r=n_n_RecvReq_i1 )\\\n (r=n_n_SendInvE_i1 )\\\n (r=n_n_SendInvS_i1 )\\\n (r=n_n_SendInvAck_i1 )\\\n (r=n_n_RecvInvAck_i1 )\\\n (r=n_n_SendGntS_i1 )\\\n (r=n_n_SendGntE_i1 )\\\n (r=n_n_RecvGntS_i1 )\\\n (r=n_n_RecvGntE_i1 )\\\n (r=n_n_ASendReqIS_j1 )\\\n (r=n_n_ASendReqSE_j1 )\\\n (r=n_n_ASendReqEI_i1 )\\\n (r=n_n_ASendReqES_i1 )\\\n (r=n_n_SendReqEE_i1 )\\\n (r=n_n_ARecvReq_i1 )\\\n (r=n_n_ASendInvE_i1 )\\\n (r=n_n_ASendInvS_i1 )\\\n (r=n_n_ASendInvAck_i1 )\\\n (r=n_n_ARecvInvAck_i1 )\\\n (r=n_n_ASendGntS_i1 )\\\n (r=n_n_ASendGntE_i1 )\\\n (r=n_n_ARecvGntS_i1 )\\\n (r=n_n_ARecvGntE_i1 )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_Store_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_Store_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(\\ d. d\\N\\r=n_n_AStore_i1 d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_AStore_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqS_j1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEI_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqES_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvReq_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendInvAck_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvInvAck_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendGntE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_RecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_RecvGntE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqIS_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqIS_j1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqSE_j1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqSE_j1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqEI_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqEI_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendReqES_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendReqES_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_SendReqEE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_SendReqEE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvReq_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvReq_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendInvAck_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvInvAck_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvInvAck_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ASendGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ASendGntE_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntS_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntS_i1Vsinv__38) done\n }\n\n moreover {\n assume d1: \"(r=n_n_ARecvGntE_i1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_n_ARecvGntE_i1Vsinv__38) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "lyj238Gmail", "repo": "newParaVerifier", "sha": "5c2d49bf8e6c46c60efa53c98b0ba5c577d59618", "save_path": "github-repos/isabelle/lyj238Gmail-newParaVerifier", "path": "github-repos/isabelle/lyj238Gmail-newParaVerifier/newParaVerifier-5c2d49bf8e6c46c60efa53c98b0ba5c577d59618/examples/n_g2kAbsAfter/n_g2kAbsAfter_lemma_inv__38_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2782567996876011, "lm_q1q2_score": 0.1402153183542565}} {"text": "(* Title: Jinja/J/BigStep.thy\n\n Author: Tobias Nipkow\n Copyright 2003 Technische Universitaet Muenchen\n*)\n\nsection \\Big Step Semantics\\\n\ntheory BigStep imports Expr State begin\n\ninductive\n eval :: \"J_prog \\ expr \\ state \\ expr \\ state \\ bool\"\n (\"_ \\ ((1\\_,/_\\) \\/ (1\\_,/_\\))\" [51,0,0,0,0] 81)\n and evals :: \"J_prog \\ expr list \\ state \\ expr list \\ state \\ bool\"\n (\"_ \\ ((1\\_,/_\\) [\\]/ (1\\_,/_\\))\" [51,0,0,0,0] 81)\n for P :: J_prog\nwhere\n\n New:\n \"\\ new_Addr h = Some a; P \\ C has_fields FDTs; h' = h(a\\(C,init_fields FDTs)) \\\n \\ P \\ \\new C,(h,l)\\ \\ \\addr a,(h',l)\\\"\n\n| NewFail:\n \"new_Addr h = None \\\n P \\ \\new C, (h,l)\\ \\ \\THROW OutOfMemory,(h,l)\\\"\n\n| Cast:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\addr a,(h,l)\\; h a = Some(D,fs); P \\ D \\\\<^sup>* C \\\n \\ P \\ \\Cast C e,s\\<^sub>0\\ \\ \\addr a,(h,l)\\\"\n\n| CastNull:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\ \\\n P \\ \\Cast C e,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\\"\n\n| CastFail:\n \"\\ P \\ \\e,s\\<^sub>0\\\\ \\addr a,(h,l)\\; h a = Some(D,fs); \\ P \\ D \\\\<^sup>* C \\\n \\ P \\ \\Cast C e,s\\<^sub>0\\ \\ \\THROW ClassCast,(h,l)\\\"\n\n| CastThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\Cast C e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| Val:\n \"P \\ \\Val v,s\\ \\ \\Val v,s\\\"\n\n| BinOp:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Val v\\<^sub>1,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\Val v\\<^sub>2,s\\<^sub>2\\; binop(bop,v\\<^sub>1,v\\<^sub>2) = Some v \\\n \\ P \\ \\e\\<^sub>1 \\bop\\ e\\<^sub>2,s\\<^sub>0\\\\\\Val v,s\\<^sub>2\\\"\n\n| BinOpThrow1:\n \"P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\throw e,s\\<^sub>1\\ \\\n P \\ \\e\\<^sub>1 \\bop\\ e\\<^sub>2, s\\<^sub>0\\ \\ \\throw e,s\\<^sub>1\\\"\n\n| BinOpThrow2:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Val v\\<^sub>1,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\throw e,s\\<^sub>2\\ \\\n \\ P \\ \\e\\<^sub>1 \\bop\\ e\\<^sub>2,s\\<^sub>0\\ \\ \\throw e,s\\<^sub>2\\\"\n\n| Var:\n \"l V = Some v \\\n P \\ \\Var V,(h,l)\\ \\ \\Val v,(h,l)\\\"\n\n| LAss:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\Val v,(h,l)\\; l' = l(V\\v) \\\n \\ P \\ \\V:=e,s\\<^sub>0\\ \\ \\unit,(h,l')\\\"\n\n| LAssThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\V:=e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| FAcc:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\addr a,(h,l)\\; h a = Some(C,fs); fs(F,D) = Some v \\\n \\ P \\ \\e\\F{D},s\\<^sub>0\\ \\ \\Val v,(h,l)\\\"\n\n| FAccNull:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\ \\\n P \\ \\e\\F{D},s\\<^sub>0\\ \\ \\THROW NullPointer,s\\<^sub>1\\\"\n\n| FAccThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\e\\F{D},s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| FAss:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\addr a,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\Val v,(h\\<^sub>2,l\\<^sub>2)\\;\n h\\<^sub>2 a = Some(C,fs); fs' = fs((F,D)\\v); h\\<^sub>2' = h\\<^sub>2(a\\(C,fs')) \\\n \\ P \\ \\e\\<^sub>1\\F{D}:=e\\<^sub>2,s\\<^sub>0\\ \\ \\unit,(h\\<^sub>2',l\\<^sub>2)\\\"\n\n| FAssNull:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\Val v,s\\<^sub>2\\ \\ \\\n P \\ \\e\\<^sub>1\\F{D}:=e\\<^sub>2,s\\<^sub>0\\ \\ \\THROW NullPointer,s\\<^sub>2\\\"\n\n| FAssThrow1:\n \"P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\e\\<^sub>1\\F{D}:=e\\<^sub>2,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| FAssThrow2:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Val v,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\throw e',s\\<^sub>2\\ \\\n \\ P \\ \\e\\<^sub>1\\F{D}:=e\\<^sub>2,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>2\\\"\n\n| CallObjThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\e\\M(ps),s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| CallParamsThrow:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\Val v,s\\<^sub>1\\; P \\ \\es,s\\<^sub>1\\ [\\] \\map Val vs @ throw ex # es',s\\<^sub>2\\ \\\n \\ P \\ \\e\\M(es),s\\<^sub>0\\ \\ \\throw ex,s\\<^sub>2\\\"\n\n| CallNull:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\; P \\ \\ps,s\\<^sub>1\\ [\\] \\map Val vs,s\\<^sub>2\\ \\\n \\ P \\ \\e\\M(ps),s\\<^sub>0\\ \\ \\THROW NullPointer,s\\<^sub>2\\\"\n\n| Call:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\addr a,s\\<^sub>1\\; P \\ \\ps,s\\<^sub>1\\ [\\] \\map Val vs,(h\\<^sub>2,l\\<^sub>2)\\;\n h\\<^sub>2 a = Some(C,fs); P \\ C sees M:Ts\\T = (pns,body) in D;\n length vs = length pns; l\\<^sub>2' = [this\\Addr a, pns[\\]vs];\n P \\ \\body,(h\\<^sub>2,l\\<^sub>2')\\ \\ \\e',(h\\<^sub>3,l\\<^sub>3)\\ \\\n \\ P \\ \\e\\M(ps),s\\<^sub>0\\ \\ \\e',(h\\<^sub>3,l\\<^sub>2)\\\"\n\n| Block:\n \"P \\ \\e\\<^sub>0,(h\\<^sub>0,l\\<^sub>0(V:=None))\\ \\ \\e\\<^sub>1,(h\\<^sub>1,l\\<^sub>1)\\ \\\n P \\ \\{V:T; e\\<^sub>0},(h\\<^sub>0,l\\<^sub>0)\\ \\ \\e\\<^sub>1,(h\\<^sub>1,l\\<^sub>1(V:=l\\<^sub>0 V))\\\"\n\n| Seq:\n \"\\ P \\ \\e\\<^sub>0,s\\<^sub>0\\ \\ \\Val v,s\\<^sub>1\\; P \\ \\e\\<^sub>1,s\\<^sub>1\\ \\ \\e\\<^sub>2,s\\<^sub>2\\ \\\n \\ P \\ \\e\\<^sub>0;;e\\<^sub>1,s\\<^sub>0\\ \\ \\e\\<^sub>2,s\\<^sub>2\\\"\n\n| SeqThrow:\n \"P \\ \\e\\<^sub>0,s\\<^sub>0\\ \\ \\throw e,s\\<^sub>1\\ \\\n P \\ \\e\\<^sub>0;;e\\<^sub>1,s\\<^sub>0\\\\\\throw e,s\\<^sub>1\\\"\n\n| CondT:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\true,s\\<^sub>1\\; P \\ \\e\\<^sub>1,s\\<^sub>1\\ \\ \\e',s\\<^sub>2\\ \\\n \\ P \\ \\if (e) e\\<^sub>1 else e\\<^sub>2,s\\<^sub>0\\ \\ \\e',s\\<^sub>2\\\"\n\n| CondF:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\false,s\\<^sub>1\\; P \\ \\e\\<^sub>2,s\\<^sub>1\\ \\ \\e',s\\<^sub>2\\ \\\n \\ P \\ \\if (e) e\\<^sub>1 else e\\<^sub>2,s\\<^sub>0\\ \\ \\e',s\\<^sub>2\\\"\n\n| CondThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\if (e) e\\<^sub>1 else e\\<^sub>2, s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| WhileF:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\false,s\\<^sub>1\\ \\\n P \\ \\while (e) c,s\\<^sub>0\\ \\ \\unit,s\\<^sub>1\\\"\n\n| WhileT:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\true,s\\<^sub>1\\; P \\ \\c,s\\<^sub>1\\ \\ \\Val v\\<^sub>1,s\\<^sub>2\\; P \\ \\while (e) c,s\\<^sub>2\\ \\ \\e\\<^sub>3,s\\<^sub>3\\ \\\n \\ P \\ \\while (e) c,s\\<^sub>0\\ \\ \\e\\<^sub>3,s\\<^sub>3\\\"\n\n| WhileCondThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\ throw e',s\\<^sub>1\\ \\\n P \\ \\while (e) c,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| WhileBodyThrow:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\true,s\\<^sub>1\\; P \\ \\c,s\\<^sub>1\\ \\ \\throw e',s\\<^sub>2\\\\\n \\ P \\ \\while (e) c,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>2\\\"\n\n| Throw:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\addr a,s\\<^sub>1\\ \\\n P \\ \\throw e,s\\<^sub>0\\ \\ \\Throw a,s\\<^sub>1\\\"\n\n| ThrowNull:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\null,s\\<^sub>1\\ \\\n P \\ \\throw e,s\\<^sub>0\\ \\ \\THROW NullPointer,s\\<^sub>1\\\"\n\n| ThrowThrow:\n \"P \\ \\e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\ \\\n P \\ \\throw e,s\\<^sub>0\\ \\ \\throw e',s\\<^sub>1\\\"\n\n| Try:\n \"P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Val v\\<^sub>1,s\\<^sub>1\\ \\\n P \\ \\try e\\<^sub>1 catch(C V) e\\<^sub>2,s\\<^sub>0\\ \\ \\Val v\\<^sub>1,s\\<^sub>1\\\"\n\n| TryCatch:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Throw a,(h\\<^sub>1,l\\<^sub>1)\\; h\\<^sub>1 a = Some(D,fs); P \\ D \\\\<^sup>* C;\n P \\ \\e\\<^sub>2,(h\\<^sub>1,l\\<^sub>1(V\\Addr a))\\ \\ \\e\\<^sub>2',(h\\<^sub>2,l\\<^sub>2)\\ \\\n \\ P \\ \\try e\\<^sub>1 catch(C V) e\\<^sub>2,s\\<^sub>0\\ \\ \\e\\<^sub>2',(h\\<^sub>2,l\\<^sub>2(V:=l\\<^sub>1 V))\\\"\n\n| TryThrow:\n \"\\ P \\ \\e\\<^sub>1,s\\<^sub>0\\ \\ \\Throw a,(h\\<^sub>1,l\\<^sub>1)\\; h\\<^sub>1 a = Some(D,fs); \\ P \\ D \\\\<^sup>* C \\\n \\ P \\ \\try e\\<^sub>1 catch(C V) e\\<^sub>2,s\\<^sub>0\\ \\ \\Throw a,(h\\<^sub>1,l\\<^sub>1)\\\"\n\n| Nil:\n \"P \\ \\[],s\\ [\\] \\[],s\\\"\n\n| Cons:\n \"\\ P \\ \\e,s\\<^sub>0\\ \\ \\Val v,s\\<^sub>1\\; P \\ \\es,s\\<^sub>1\\ [\\] \\es',s\\<^sub>2\\ \\\n \\ P \\ \\e#es,s\\<^sub>0\\ [\\] \\Val v # es',s\\<^sub>2\\\"\n\n| ConsThrow:\n \"P \\ \\e, s\\<^sub>0\\ \\ \\throw e', s\\<^sub>1\\ \\\n P \\ \\e#es, s\\<^sub>0\\ [\\] \\throw e' # es, s\\<^sub>1\\\"\n\n(*<*)\nlemmas eval_evals_induct = eval_evals.induct [split_format (complete)]\n and eval_evals_inducts = eval_evals.inducts [split_format (complete)]\n\ninductive_cases eval_cases [cases set]:\n \"P \\ \\Cast C e,s\\ \\ \\e',s'\\\"\n \"P \\ \\Val v,s\\ \\ \\e',s'\\\"\n \"P \\ \\e\\<^sub>1 \\bop\\ e\\<^sub>2,s\\ \\ \\e',s'\\\"\n \"P \\ \\V:=e,s\\ \\ \\e',s'\\\"\n \"P \\ \\e\\F{D},s\\ \\ \\e',s'\\\"\n \"P \\ \\e\\<^sub>1\\F{D}:=e\\<^sub>2,s\\ \\ \\e',s'\\\"\n \"P \\ \\e\\M{D}(es),s\\ \\ \\e',s'\\\"\n \"P \\ \\{V:T;e\\<^sub>1},s\\ \\ \\e',s'\\\"\n \"P \\ \\e\\<^sub>1;;e\\<^sub>2,s\\ \\ \\e',s'\\\"\n \"P \\ \\if (e) e\\<^sub>1 else e\\<^sub>2,s\\ \\ \\e',s'\\\"\n \"P \\ \\while (b) c,s\\ \\ \\e',s'\\\"\n \"P \\ \\throw e,s\\ \\ \\e',s'\\\"\n \"P \\ \\try e\\<^sub>1 catch(C V) e\\<^sub>2,s\\ \\ \\e',s'\\\"\n \ninductive_cases evals_cases [cases set]:\n \"P \\ \\[],s\\ [\\] \\e',s'\\\"\n \"P \\ \\e#es,s\\ [\\] \\e',s'\\\"\n(*>*) \n\n\nsubsection\"Final expressions\"\n\ndefinition final :: \"'a exp \\ bool\"\nwhere\n \"final e \\ (\\v. e = Val v) \\ (\\a. e = Throw a)\"\n\ndefinition finals:: \"'a exp list \\ bool\"\nwhere\n \"finals es \\ (\\vs. es = map Val vs) \\ (\\vs a es'. es = map Val vs @ Throw a # es')\"\n\n\n\nlemma [simp]: \"final(throw e) = (\\a. e = addr a)\"\n(*<*)by(simp add:final_def)(*>*)\n\nlemma finalE: \"\\ final e; \\v. e = Val v \\ R; \\a. e = Throw a \\ R \\ \\ R\"\n(*<*)by(auto simp:final_def)(*>*)\n\n\n\nlemma [iff]: \"finals (Val v # es) = finals es\"\n(*<*)\napply(clarsimp simp add: finals_def)\napply(rule iffI)\n apply(erule disjE)\n apply simp\n apply(rule disjI2)\n apply clarsimp\n apply(case_tac vs)\n apply simp\n apply fastforce\napply(erule disjE)\n apply clarsimp\napply(rule disjI2)\napply clarsimp\napply(rule_tac x = \"v#vs\" in exI)\napply simp\ndone\n(*>*)\n\nlemma finals_app_map[iff]: \"finals (map Val vs @ es) = finals es\"\n(*<*)by(induct_tac vs, auto)(*>*)\n\nlemma [iff]: \"finals (map Val vs)\"\n(*<*)using finals_app_map[of vs \"[]\"]by(simp)(*>*)\n\nlemma [iff]: \"finals (throw e # es) = (\\a. e = addr a)\"\n(*<*)\napply(simp add:finals_def)\napply(rule iffI)\n apply clarsimp\n apply(case_tac vs)\n apply simp\n apply fastforce\napply clarsimp\napply(rule_tac x = \"[]\" in exI)\napply simp\ndone\n(*>*)\n\nlemma not_finals_ConsI: \"\\ final e \\ \\ finals(e#es)\"\n (*<*)\napply(clarsimp simp add:finals_def final_def)\napply(case_tac vs)\napply auto\ndone\n(*>*)\n\n\nlemma eval_final: \"P \\ \\e,s\\ \\ \\e',s'\\ \\ final e'\"\n and evals_final: \"P \\ \\es,s\\ [\\] \\es',s'\\ \\ finals es'\"\n(*<*)by(induct rule:eval_evals.inducts, simp_all)(*>*)\n\n\nlemma eval_lcl_incr: \"P \\ \\e,(h\\<^sub>0,l\\<^sub>0)\\ \\ \\e',(h\\<^sub>1,l\\<^sub>1)\\ \\ dom l\\<^sub>0 \\ dom l\\<^sub>1\"\n and evals_lcl_incr: \"P \\ \\es,(h\\<^sub>0,l\\<^sub>0)\\ [\\] \\es',(h\\<^sub>1,l\\<^sub>1)\\ \\ dom l\\<^sub>0 \\ dom l\\<^sub>1\"\n(*<*)\nproof (induct rule: eval_evals_inducts)\n case BinOp show ?case by(rule subset_trans)(rule BinOp.hyps)+\nnext\n case Call thus ?case\n by(simp del: fun_upd_apply) \nnext\n case Seq show ?case by(rule subset_trans)(rule Seq.hyps)+\nnext\n case CondT show ?case by(rule subset_trans)(rule CondT.hyps)+\nnext\n case CondF show ?case by(rule subset_trans)(rule CondF.hyps)+\nnext\n case WhileT thus ?case by(blast)\nnext\n case TryCatch thus ?case by(clarsimp simp:dom_def split:if_split_asm) blast\nnext\n case Cons show ?case by(rule subset_trans)(rule Cons.hyps)+\nnext\n case Block thus ?case by(auto simp del:fun_upd_apply)\nqed auto\n(*>*)\n\ntext\\Only used later, in the small to big translation, but is already a\ngood sanity check:\\\n\n\n\n\nlemma eval_finalsId:\nassumes finals: \"finals es\" shows \"P \\ \\es,s\\ [\\] \\es,s\\\"\n(*<*)\n using finals\nproof (induct es type: list)\n case Nil show ?case by (rule eval_evals.intros)\nnext\n case (Cons e es)\n have hyp: \"finals es \\ P \\ \\es,s\\ [\\] \\es,s\\\"\n and finals: \"finals (e # es)\" by fact+\n show \"P \\ \\e # es,s\\ [\\] \\e # es,s\\\"\n proof cases\n assume \"final e\"\n thus ?thesis\n proof (cases rule: finalE)\n fix v assume e: \"e = Val v\"\n have \"P \\ \\Val v,s\\ \\ \\Val v,s\\\" by (simp add: eval_finalId)\n moreover from finals e have \"P \\ \\es,s\\ [\\] \\es,s\\\" by(fast intro:hyp)\n ultimately have \"P \\ \\Val v#es,s\\ [\\] \\Val v#es,s\\\"\n by (rule eval_evals.intros)\n with e show ?thesis by simp\n next\n fix a assume e: \"e = Throw a\"\n have \"P \\ \\Throw a,s\\ \\ \\Throw a,s\\\" by (simp add: eval_finalId)\n hence \"P \\ \\Throw a#es,s\\ [\\] \\Throw a#es,s\\\" by (rule eval_evals.intros)\n with e show ?thesis by simp\n qed\n next\n assume \"\\ final e\"\n with not_finals_ConsI finals have False by blast\n thus ?thesis ..\n qed\nqed\n(*>*)\n\n\ntheorem eval_hext: \"P \\ \\e,(h,l)\\ \\ \\e',(h',l')\\ \\ h \\ h'\"\nand evals_hext: \"P \\ \\es,(h,l)\\ [\\] \\es',(h',l')\\ \\ h \\ h'\"\n(*<*)\nproof (induct rule: eval_evals_inducts)\n case New thus ?case\n by(fastforce intro!: hext_new intro:LeastI simp:new_Addr_def\n split:if_split_asm simp del:fun_upd_apply)\nnext\n case BinOp thus ?case by (fast elim!:hext_trans)\nnext\n case BinOpThrow2 thus ?case by(fast elim!: hext_trans)\nnext\n case FAss thus ?case\n by(auto simp:sym[THEN hext_upd_obj] simp del:fun_upd_apply\n elim!: hext_trans)\nnext\n case FAssNull thus ?case by (fast elim!:hext_trans)\nnext\n case FAssThrow2 thus ?case by (fast elim!:hext_trans)\nnext\n case CallParamsThrow thus ?case by(fast elim!: hext_trans)\nnext\n case CallNull thus ?case by(fast elim!: hext_trans)\nnext\n case Call thus ?case by(fast elim!: hext_trans)\nnext\n case Seq thus ?case by(fast elim!: hext_trans)\nnext\n case CondT thus ?case by(fast elim!: hext_trans)\nnext\n case CondF thus ?case by(fast elim!: hext_trans)\nnext\n case WhileT thus ?case by(fast elim!: hext_trans)\nnext\n case WhileBodyThrow thus ?case by (fast elim!: hext_trans)\nnext\n case TryCatch thus ?case by(fast elim!: hext_trans)\nnext\n case Cons thus ?case by (fast intro: hext_trans)\nqed auto\n(*>*)\n\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/Jinja/J/BigStep.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5039061705290805, "lm_q2_score": 0.2782567937024021, "lm_q1q2_score": 0.1402153153382778}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\nCSpace invariants\n*)\n\ntheory ArchCSpaceInvPre_AI\nimports \"../CSpaceInvPre_AI\"\nbegin\n\n\ncontext Arch begin global_naming RISCV64\n\nlemma aobj_ref_acap_rights_update[simp]:\n \"aobj_ref (acap_rights_update f x) = aobj_ref x\"\n by (cases x; simp add: acap_rights_update_def)\n\nlemma arch_obj_size_acap_rights_update[simp]:\n \"arch_obj_size (acap_rights_update f x) = arch_obj_size x\"\n by (cases x; simp add: acap_rights_update_def)\n\nlemma valid_arch_cap_acap_rights_update[intro]:\n \"valid_arch_cap x s \\ valid_arch_cap (acap_rights_update f x) s\"\n by (cases x; simp add: acap_rights_update_def valid_arch_cap_def)\n\ndefinition cap_master_arch_cap :: \"arch_cap \\ arch_cap\" where\n \"cap_master_arch_cap acap \\\n (case acap of\n ASIDPoolCap pool asid \\ ASIDPoolCap pool 0\n | FrameCap ptr R sz dev _ \\ FrameCap ptr UNIV sz dev None\n | PageTableCap ptr _ \\ PageTableCap ptr None\n | _ \\ acap)\"\n\nlemma cap_master_arch_cap_eqDs1:\n \"cap_master_arch_cap cap = ASIDPoolCap pool asid\n \\ asid = 0 \\ (\\asid. cap = ASIDPoolCap pool asid)\"\n \"cap_master_arch_cap cap = ASIDControlCap \\ cap = ASIDControlCap\"\n \"cap_master_arch_cap cap = FrameCap ptr R sz dev map_data\n \\ R = UNIV \\ map_data = None\n \\ (\\R map_data. cap = FrameCap ptr R sz dev map_data)\"\n \"cap_master_arch_cap cap = PageTableCap ptr data\n \\ data = None \\ (\\data. cap = PageTableCap ptr data)\"\n by (clarsimp simp: cap_master_arch_cap_def split: arch_cap.split_asm)+\n\nlemma cap_master_arch_inv[simp]:\n \"cap_master_arch_cap (cap_master_arch_cap ac) = cap_master_arch_cap ac\"\n by (cases ac; simp add: cap_master_arch_cap_def)\n\ndefinition\n \"reachable_target \\ \\(asid, vref) p s.\n \\level. vs_lookup_target level asid vref s = Some (level, p) \\\n pool_for_asid asid s = Some p\"\n\ndefinition\n \"reachable_frame_cap cap \\ \\s.\n is_frame_cap cap \\ (\\ref. vs_cap_ref cap = Some ref \\ reachable_target ref (obj_ref_of cap) s)\"\n\n(* The conditions under which it is legal to immediately replace an arch_cap\n cap with newcap at slot sl, assuming cap is final. *)\ndefinition\n replaceable_final_arch_cap :: \"'z::state_ext state \\ cslot_ptr \\ cap \\ cap \\ bool\"\nwhere\n \"replaceable_final_arch_cap s sl newcap \\ \\cap.\n \\ \\Don't leave dangling vspace references. That is, if cap points to a mapped vspace object,\\\n (\\ref. vs_cap_ref cap = Some ref\n \\ \\ then either newcap maintains the same vs_refs \\\n \\ (vs_cap_ref newcap = Some ref \\ obj_refs newcap = obj_refs cap)\n \\ \\ or the object pointed to by cap is not currently mapped. \\\n \\ (\\oref \\ obj_refs cap. \\ reachable_target ref oref s))\n \\ \\ Don't introduce duplicate caps to vspace table objects with different vs_refs. \\\n \\ no_cap_to_obj_with_diff_ref newcap {sl} s\n \\ \\ Don't introduce non-empty unmapped table objects. \\\n \\ (is_pt_cap newcap\n \\ cap_asid newcap = None\n \\ (\\r \\ obj_refs newcap. pts_of s r = Some empty_pt))\n \\ \\ If newcap is vspace table cap such that either:\n - newcap and cap have different types or different obj_refs, or\n - newcap is unmapped while cap is mapped, \\\n \\ (is_pt_cap newcap\n \\ (is_pt_cap cap\n \\ (cap_asid newcap = None \\ cap_asid cap = None)\n \\ obj_refs cap \\ obj_refs newcap)\n \\ \\then, aside from sl, there is no other slot with a cap that\n - has the same obj_refs and type as newcap, and\n - is unmapped if newcap is mapped. \\\n \\ (\\sl'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs newcap\n \\ is_pt_cap cap'\n \\ (cap_asid newcap = None \\ cap_asid cap' = None)) sl' s \\ sl' = sl))\n \\ \\Don't replace with an ASID pool. \\\n \\ \\is_ap_cap newcap\"\n\ndefinition\n replaceable_non_final_arch_cap :: \"'z::state_ext state \\ cslot_ptr \\ cap \\ cap \\ bool\"\nwhere\n \"replaceable_non_final_arch_cap s sl newcap \\ \\cap. \\ reachable_frame_cap cap s\"\n\ndeclare\n replaceable_final_arch_cap_def[simp]\n replaceable_non_final_arch_cap_def[simp]\n\nlemma unique_table_refsD:\n \"\\ unique_table_refs_2 cps; cps p = Some cap; cps p' = Some cap';\n obj_refs cap = obj_refs cap'\\\n \\ table_cap_ref cap = table_cap_ref cap'\"\n unfolding unique_table_refs_def\n by blast\n\nlemma table_cap_ref_vs_cap_ref_Some:\n \"table_cap_ref x = Some y \\ vs_cap_ref x = Some y\"\n by (clarsimp simp: table_cap_ref_def vs_cap_ref_def table_cap_ref_arch_def vs_cap_ref_arch_def\n simp del: arch_cap_fun_lift_Some\n split: cap.splits arch_cap.splits)\n\nlemma set_cap_aobjs_of[wp]:\n \"set_cap cap ptr \\\\s. P (aobjs_of s)\\\"\n unfolding set_cap_def\n apply (wpsimp wp: set_object_wp get_object_wp)\n apply (auto simp: opt_map_def obj_at_def split: option.splits elim!: rsubst[where P=P])\n done\n\nlemma set_cap_pool_for_asid[wp]:\n \"set_cap cap ptr \\\\s. P (pool_for_asid asid s)\\\"\n unfolding pool_for_asid_def by wpsimp\n\nlemma set_cap_valid_vs_lookup:\n \"\\\\s. valid_vs_lookup s\n \\ (\\vref cap'. caps_of_state s ptr = Some cap'\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref. oref \\ obj_refs cap' \\ \\ reachable_target vref oref s))\n \\ unique_table_refs s\\\n set_cap cap ptr\n \\\\rv. valid_vs_lookup\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n apply (wpsimp wp: hoare_vcg_all_lift hoare_convert_imp vs_lookup_target_lift hoare_vcg_disj_lift\n simp: valid_vs_lookup_def)\n apply (drule vs_lookup_target_level)\n apply (rename_tac level' level asid vref p)\n apply (erule allE, erule allE, erule allE, erule allE, erule allE, erule (1) impE)\n apply (erule (1) impE)\n apply (elim exE conjE)\n apply (case_tac \"p' = ptr\")\n apply clarsimp\n apply (elim disjE impCE)\n apply fastforce\n apply clarsimp\n apply (drule (1) not_final_another_caps)\n apply (rule obj_ref_is_gen_obj_ref)\n apply simp\n apply (simp, elim exEI, clarsimp simp: gen_obj_refs_eq)\n apply (drule_tac cap=cap' and cap'=cap in unique_table_refsD; simp?)\n apply (clarsimp simp: reachable_frame_cap_def)\n apply (case_tac cap, simp_all)[1]\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap, simp_all)[1]\n apply (clarsimp dest!: table_cap_ref_vs_cap_ref_Some)\n apply (clarsimp simp: reachable_target_def)\n apply (erule_tac x=level in allE)\n apply (clarsimp)\n apply (clarsimp dest!: table_cap_ref_vs_cap_ref_Some)\n apply (clarsimp simp: reachable_target_def)\n apply (erule_tac x=level in allE)\n apply (clarsimp)\n apply fastforce\n done\n\nlemma set_cap_valid_table_caps:\n \"\\\\s. valid_table_caps s \\\n (is_pt_cap cap \\ cap_asid cap = None \\ (\\r \\ obj_refs cap. pts_of s r = Some empty_pt))\\\n set_cap cap ptr\n \\\\rv. valid_table_caps\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n apply (simp add: valid_table_caps_def)\n apply (wp hoare_vcg_all_lift\n hoare_vcg_disj_lift hoare_convert_imp[OF set_cap_caps_of_state]\n hoare_use_eq[OF set_cap_arch set_cap_obj_at_impossible])\n apply (fastforce simp: cap_asid_def split: if_split_asm)\n done\n\nlemma cap_asid_vs_cap_ref_None:\n \"is_pt_cap cap \\ (cap_asid cap = None) = (vs_cap_ref cap = None)\"\n by (clarsimp simp: is_pt_cap_def is_PageTableCap_def cap_asid_def split: option.splits)\n\nlemma cap_asid_vs_cap_ref_Some:\n \"is_pt_cap cap \\ (cap_asid cap = Some asid) = (\\vref. vs_cap_ref cap = Some (asid, vref))\"\n by (clarsimp simp: is_pt_cap_def is_PageTableCap_def cap_asid_def split: option.splits)\n\nlemma set_cap_unique_table_caps:\n \"\\\\s. unique_table_caps s\n \\ (is_pt_cap cap\n \\ (\\oldcap. caps_of_state s ptr = Some oldcap\n \\ is_pt_cap oldcap\n \\ (cap_asid cap = None \\ cap_asid oldcap = None)\n \\ obj_refs oldcap \\ obj_refs cap)\n \\ (\\ptr'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs cap\n \\ is_pt_cap cap'\n \\ (cap_asid cap = None \\ cap_asid cap' = None)) ptr' s \\ ptr' = ptr))\\\n set_cap cap ptr\n \\\\_. unique_table_caps\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n supply cap_asid_vs_cap_ref_None[simp] cap_asid_vs_cap_ref_Some[simp]\n apply wp\n apply (simp only: unique_table_caps_def cte_wp_at_caps_of_state)\n apply (elim conjE)\n apply (erule impCE, clarsimp)\n apply (erule impCE)\n prefer 2\n apply (simp del: imp_disjL)\n apply (thin_tac \"\\a b. P a b\" for P)\n subgoal by fastforce\n apply (clarsimp simp del: imp_disjL del: allI)\n apply (case_tac \"cap_asid cap \\ None\")\n apply (clarsimp del: allI)\n apply (elim allEI | rule impI)+\n subgoal by auto\n apply (elim allEI)\n apply (intro conjI impI)\n apply (elim allEI)\n subgoal by auto\n apply auto\n done\n\nlemma set_cap_unique_table_refs[wp]:\n \"\\ unique_table_refs and no_cap_to_obj_with_diff_ref cap {ptr} \\\n set_cap cap ptr\n \\\\rv. unique_table_refs\\\"\n apply wp\n apply clarsimp\n apply (simp add: unique_table_refs_def\n split del: if_split del: split_paired_All)\n apply (erule allEI, erule allEI)\n apply (clarsimp split del: if_split)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state\n split: if_split_asm)\n done\n\nlemma table_cap_ref_vs_ref_or_frame:\n \"\\ table_cap_ref cap = table_cap_ref cap'; vs_cap_ref cap = Some x \\\n \\ vs_cap_ref cap' = Some x \\ is_frame_cap cap\"\n by (simp add: vs_cap_ref_def table_cap_ref_def arch_cap_fun_lift_def vs_cap_ref_arch_def\n table_cap_ref_arch_def\n split: cap.splits arch_cap.splits)\n\nlemma obj_refs_obj_ref_of:\n \"obj_refs cap = {p} \\ obj_ref_of cap = p\"\n by (cases cap; simp) (rename_tac acap, case_tac acap; simp)\n\nlemma set_cap_valid_asid_pool_caps[wp]:\n \"\\\\s. valid_asid_pool_caps s\n \\ (\\vref cap'. caps_of_state s ptr = Some cap'\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref. oref \\ obj_refs cap' \\ \\ reachable_target vref oref s))\n \\ unique_table_refs s\\\n set_cap cap ptr\n \\\\_. valid_asid_pool_caps\\\"\n apply (wp_pre, wps, wp)\n supply split_paired_Ex[simp del] split_paired_All[simp del]\n apply (clarsimp simp: valid_asid_pool_caps_def simp del: fun_upd_apply)\n apply (erule allE, erule allE, erule (1) impE)\n apply (elim exE conjE)\n apply (case_tac \"ptr \\ cptr\", fastforce)\n apply simp\n apply (erule disjE, rule_tac x=cptr in exI, fastforce)\n apply (erule disjE)\n apply (erule conjE)\n apply (drule (1) not_final_another_caps)\n apply (rule obj_ref_is_gen_obj_ref, simp)\n apply (simp add: gen_obj_refs_eq)\n apply (elim exE conjE)\n apply (rule_tac x=p' in exI)\n apply simp\n apply (drule_tac cap=cap and cap'=cap' in unique_table_refsD; simp?)\n apply (drule (1) table_cap_ref_vs_ref_or_frame)\n apply (erule disjE, simp)\n apply (simp add: reachable_frame_cap_def)\n apply (clarsimp simp: reachable_target_def pool_for_asid_def obj_refs_obj_ref_of)\n apply (rule_tac x=cptr in exI)\n apply (clarsimp simp: reachable_target_def pool_for_asid_def)\n done\n\nlemma set_cap_valid_arch_caps:\n \"\\\\s. valid_arch_caps s\n \\ (\\vref cap'. cte_wp_at ((=) cap') ptr s\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref \\ obj_refs cap'. \\ reachable_target vref oref s))\n \\ no_cap_to_obj_with_diff_ref cap {ptr} s\n \\ (is_pt_cap cap \\ cap_asid cap = None\n \\ (\\r \\ obj_refs cap. pts_of s r = Some empty_pt))\n \\ (is_pt_cap cap\n \\ (\\oldcap. caps_of_state s ptr = Some oldcap \\\n is_pt_cap oldcap\n \\ (cap_asid cap = None \\ cap_asid oldcap = None)\n \\ obj_refs oldcap \\ obj_refs cap)\n \\ (\\ptr'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs cap\n \\ is_pt_cap cap'\n \\ (cap_asid cap = None \\ cap_asid cap' = None)) ptr' s \\ ptr' = ptr))\\\n set_cap cap ptr\n \\\\rv. valid_arch_caps\\\"\n unfolding valid_arch_caps_def\n by (wpsimp wp: set_cap_valid_vs_lookup set_cap_valid_table_caps set_cap_unique_table_caps\n simp: cte_wp_at_caps_of_state)\n\nlemma valid_table_capsD:\n \"\\ cte_wp_at ((=) cap) ptr s; valid_table_caps s; is_pt_cap cap; cap_asid cap = None \\\n \\ \\r \\ obj_refs cap. pts_of s r = Some empty_pt\"\n apply (clarsimp simp: cte_wp_at_caps_of_state valid_table_caps_def is_pt_cap_def\n is_PageTableCap_def cap_asid_def\n split: option.splits)\n apply (cases ptr, fastforce)+\n done\n\nlemma pt_caps_asid_vsref:\n \"is_pt_cap cap \\ (cap_asid cap = None) = (vs_cap_ref cap = None)\"\n apply (cases cap; simp)\n apply (rename_tac acap, case_tac acap; simp add: cap_asid_def split: option.splits)\n done\n\nlemma unique_table_capsD:\n \"\\ unique_table_caps_2 cps; cps ptr = Some cap; cps ptr' = Some cap';\n obj_refs cap = obj_refs cap'; vs_cap_ref cap = None \\ vs_cap_ref cap' = None;\n is_pt_cap cap; is_pt_cap cap' \\\n \\ ptr = ptr'\"\n unfolding unique_table_caps_def\n by blast\n\nlemma valid_refs_def2:\n \"valid_refs R s = (\\p c. caps_of_state s p = Some c \\ cap_range c \\ R = {})\"\n by (auto simp: valid_refs_def cte_wp_at_caps_of_state)\n\nlemma set_cap_cap_refs_in_kernel_window[wp]:\n \"\\cap_refs_in_kernel_window and (\\s. \\ref \\ cap_range cap. ref \\ kernel_window s)\\\n set_cap cap p\n \\\\rv. cap_refs_in_kernel_window\\\"\n apply (simp add: cap_refs_in_kernel_window_def valid_refs_def2 pred_conj_def)\n apply (wp_pre, wps, wp)\n apply (clarsimp simp: not_kernel_window_def)\n apply fastforce\n done\n\nlemma cap_refs_in_kernel_windowD:\n \"\\ caps_of_state s ptr = Some cap; cap_refs_in_kernel_window s \\\n \\ \\ref \\ cap_range cap. ref \\ kernel_window s\"\n apply (clarsimp simp: cap_refs_in_kernel_window_def valid_refs_def cte_wp_at_caps_of_state\n not_kernel_window_def)\n apply (cases ptr, fastforce)\n done\n\nlemma valid_cap_imp_valid_vm_rights:\n \"valid_cap (ArchObjectCap (FrameCap p rs sz dev m)) s \\ rs \\ valid_vm_rights\"\n by (simp add: valid_cap_def valid_vm_rights_def)\n\nlemma acap_rights_update_idem [simp]:\n \"acap_rights_update R (acap_rights_update R' cap) = acap_rights_update R cap\"\n by (simp add: acap_rights_update_def split: arch_cap.splits)\n\nlemma cap_master_arch_cap_rights [simp]:\n \"cap_master_arch_cap (acap_rights_update R cap) = cap_master_arch_cap cap\"\n by (simp add: cap_master_arch_cap_def acap_rights_update_def\n split: arch_cap.splits)\n\nlemma acap_rights_update_id [intro!, simp]:\n \"valid_arch_cap ac s \\ acap_rights_update (acap_rights ac) ac = ac\"\n unfolding acap_rights_update_def acap_rights_def valid_arch_cap_def\n by (cases ac; simp)\n\nlemma obj_ref_none_no_asid:\n \"{} = obj_refs new_cap \\ None = table_cap_ref new_cap\"\n \"obj_refs new_cap = {} \\ table_cap_ref new_cap = None\"\n by (simp add: table_cap_ref_def table_cap_ref_arch_def arch_cap_fun_lift_def\n split: cap.split arch_cap.split)+\n\nlemma set_cap_hyp_refs_of [wp]:\n \"\\\\s. P (state_hyp_refs_of s)\\\n set_cap cp p\n \\\\rv s. P (state_hyp_refs_of s)\\\"\n apply (simp add: set_cap_def set_object_def split_def)\n apply (wp get_object_wp | wpc)+\n by (force elim!: rsubst[where P=P]\n simp: state_hyp_refs_of_def obj_at_def\n split: if_split_asm)\n\nlemma state_hyp_refs_of_revokable[simp]:\n \"state_hyp_refs_of (s \\ is_original_cap := m \\) = state_hyp_refs_of s\"\n by (rule revokable_update.state_hyp_refs_update)\n\nlemma is_valid_vtable_root_is_arch_cap:\n \"is_valid_vtable_root cap \\ is_arch_cap cap\"\n by (clarsimp simp: is_valid_vtable_root_def is_arch_cap_def split: cap.splits)\n\nlemma unique_table_refs_no_cap_asidE:\n \"\\caps_of_state s p = Some cap; unique_table_refs s\\\n \\ no_cap_to_obj_with_diff_ref cap S s\"\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (unfold unique_table_refs_def)\n apply (drule_tac x=p in spec, drule_tac x=\"(a,b)\" in spec)\n apply (drule spec)+\n apply (erule impE, assumption)+\n apply (clarsimp simp: is_cap_simps)\n done\n\nlemmas unique_table_refs_no_cap_asidD\n = unique_table_refs_no_cap_asidE[where S=\"{}\"]\n\nend\nend\n", "meta": {"author": "NICTA", "repo": "l4v", "sha": "3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b", "save_path": "github-repos/isabelle/NICTA-l4v", "path": "github-repos/isabelle/NICTA-l4v/l4v-3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b/proof/invariant-abstract/RISCV64/ArchCSpaceInvPre_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5428632831725052, "lm_q2_score": 0.256832002764217, "lm_q1q2_score": 0.1394246642443528}} {"text": "(* Title: HOL/Auth/n_german_lemma_inv__49_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\n(*header{*The n_german Protocol Case Study*}*) \n\ntheory n_german_lemma_inv__49_on_rules imports n_german_lemma_on_inv__49\nbegin\nsection{*All lemmas on causal relation between inv__49*}\nlemma lemma_inv__49_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv0 p__Inv2. p__Inv0\\N\\p__Inv2\\N\\p__Inv0~=p__Inv2\\f=inv__49 p__Inv0 p__Inv2)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\\\n (\\ i. i\\N\\r=n_SendReqS i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__0 i)\\\n (\\ i. i\\N\\r=n_SendReqE__part__1 i)\\\n (\\ i. i\\N\\r=n_RecvReqS N i)\\\n (\\ i. i\\N\\r=n_RecvReqE N i)\\\n (\\ i. i\\N\\r=n_SendInv__part__0 i)\\\n (\\ i. i\\N\\r=n_SendInv__part__1 i)\\\n (\\ i. i\\N\\r=n_SendInvAck i)\\\n (\\ i. i\\N\\r=n_RecvInvAck i)\\\n (\\ i. i\\N\\r=n_SendGntS i)\\\n (\\ i. i\\N\\r=n_SendGntE N i)\\\n (\\ i. i\\N\\r=n_RecvGntS i)\\\n (\\ i. i\\N\\r=n_RecvGntE i)\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ i d. i\\N\\d\\N\\r=n_Store i d)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqSVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__0Vsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendReqE__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendReqE__part__1Vsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqS N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqSVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvReqE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvReqEVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__0 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__0Vsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInv__part__1 i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInv__part__1Vsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendInvAckVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvInvAck i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvInvAckVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntSVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_SendGntE N i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_SendGntEVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntS i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntSVsinv__49) done\n }\n\n moreover {\n assume d1: \"(\\ i. i\\N\\r=n_RecvGntE i)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_RecvGntEVsinv__49) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "hongjianjiang", "repo": "paraverif_dafny", "sha": "083d86afb46a847783cb9319d975b3c2ad0afe93", "save_path": "github-repos/isabelle/hongjianjiang-paraverif_dafny", "path": "github-repos/isabelle/hongjianjiang-paraverif_dafny/paraverif_dafny-083d86afb46a847783cb9319d975b3c2ad0afe93/examples/n_german/n_german_lemma_inv__49_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.27202454519235225, "lm_q1q2_score": 0.13919947666202528}} {"text": "(* Title: JinjaThreads/MM/SC_Completion.thy\n Author: Andreas Lochbihler\n*)\n\nheader {* \\isaheader{Sequentially consistent completion of executions in the JMM} *}\n\ntheory SC_Completion \nimports\n \"Non_Speculative\"\nbegin\n\nsection {* Most recently written values *}\n\nfun mrw_value :: \n \"'m prog \\ (('addr \\ addr_loc) \\ ('addr val \\ bool)) \\ ('addr, 'thread_id) obs_event action\n \\ (('addr \\ addr_loc) \\ ('addr val \\ bool))\"\nwhere\n \"mrw_value P vs (NormalAction (WriteMem ad al v)) = vs((ad, al) \\ (v, True))\"\n| \"mrw_value P vs (NormalAction (NewHeapElem ad hT)) =\n (\\(ad', al). if ad = ad' \\ al \\ addr_locs P hT \\ (case vs (ad, al) of None \\ True | Some (v, b) \\ \\ b)\n then Some (addr_loc_default P hT al, False)\n else vs (ad', al))\"\n| \"mrw_value P vs _ = vs\"\n\nlemma mrw_value_cases:\n obtains ad al v where \"x = NormalAction (WriteMem ad al v)\"\n | ad hT where \"x = NormalAction (NewHeapElem ad hT)\"\n | ad M vs v where \"x = NormalAction (ExternalCall ad M vs v)\"\n | ad al v where \"x = NormalAction (ReadMem ad al v)\"\n | t where \"x = NormalAction (ThreadStart t)\"\n | t where \"x = NormalAction (ThreadJoin t)\"\n | ad where \"x = NormalAction (SyncLock ad)\"\n | ad where \"x = NormalAction (SyncUnlock ad)\"\n | t where \"x = NormalAction (ObsInterrupt t)\"\n | t where \"x = NormalAction (ObsInterrupted t)\"\n | \"x = InitialThreadAction\"\n | \"x = ThreadFinishAction\"\nby pat_completeness\n\nabbreviation mrw_values ::\n \"'m prog \\ (('addr \\ addr_loc) \\ ('addr val \\ bool)) \\ ('addr, 'thread_id) obs_event action list\n \\ (('addr \\ addr_loc) \\ ('addr val \\ bool))\"\nwhere \"mrw_values P \\ foldl (mrw_value P)\"\n\nlemma mrw_values_eq_SomeD:\n assumes mrw: \"mrw_values P vs0 obs (ad, al) = \\(v, b)\\\"\n and \"vs0 (ad, al) = \\(v, b)\\ \\ \\wa. wa \\ set obs \\ is_write_action wa \\ (ad, al) \\ action_loc_aux P wa \\ (b \\ \\ is_new_action wa)\"\n shows \"\\obs' wa obs''. obs = obs' @ wa # obs'' \\ is_write_action wa \\ (ad, al) \\ action_loc_aux P wa \\\n value_written_aux P wa al = v \\ (is_new_action wa \\ \\ b) \\\n (\\ob\\set obs''. is_write_action ob \\ (ad, al) \\ action_loc_aux P ob \\ is_new_action ob \\ b)\"\n (is \"?concl obs\")\nusing assms\nproof(induct obs rule: rev_induct)\n case Nil thus ?case by simp\nnext\n case (snoc ob obs)\n note mrw = `mrw_values P vs0 (obs @ [ob]) (ad, al) = \\(v, b)\\`\n show ?case\n proof(cases \"is_write_action ob \\ (ad, al) \\ action_loc_aux P ob \\ (is_new_action ob \\ \\ b)\")\n case True thus ?thesis using mrw\n by(fastforce elim!: is_write_action.cases intro: action_loc_aux_intros split: split_if_asm)\n next\n case False\n with mrw have \"mrw_values P vs0 obs (ad, al) = \\(v, b)\\\"\n by(cases \"ob\" rule: mrw_value_cases)(auto split: split_if_asm simp add: addr_locs_def split: htype.split_asm)\n moreover\n { assume \"vs0 (ad, al) = \\(v, b)\\\"\n hence \"\\wa. wa \\ set (obs @ [ob]) \\ is_write_action wa \\ (ad, al) \\ action_loc_aux P wa \\ (b \\ \\ is_new_action wa)\"\n by(rule snoc)\n with False have \"\\wa. wa \\ set obs \\ is_write_action wa \\ (ad, al) \\ action_loc_aux P wa \\ (b \\ \\ is_new_action wa)\"\n by auto }\n ultimately have \"?concl obs\" by(rule snoc)\n thus ?thesis using False mrw by fastforce\n qed\nqed\n\nlemma mrw_values_WriteMemD:\n assumes \"NormalAction (WriteMem ad al v') \\ set obs\"\n shows \"\\v. mrw_values P vs0 obs (ad, al) = Some (v, True)\"\nusing assms\napply(induct obs rule: rev_induct)\n apply simp\napply clarsimp\napply(erule disjE)\n apply clarsimp\napply clarsimp\napply(case_tac x rule: mrw_value_cases)\napply simp_all\ndone\n\nlemma mrw_values_new_actionD:\n assumes \"w \\ set obs\" \"is_new_action w\" \"adal \\ action_loc_aux P w\"\n shows \"\\v b. mrw_values P vs0 obs adal = Some (v, b)\"\nusing assms\napply(induct obs rule: rev_induct)\n apply simp\napply clarsimp\napply(erule disjE)\n apply(fastforce simp add: split_beta elim!: action_loc_aux_cases is_new_action.cases)\napply clarsimp\napply(rename_tac w' obs' v b)\napply(case_tac w' rule: mrw_value_cases)\napply(auto simp add: split_beta)\ndone\n\nlemma mrw_value_dom_mono:\n \"dom vs \\ dom (mrw_value P vs ob)\"\nby(cases ob rule: mrw_value_cases) auto\n\nlemma mrw_values_dom_mono:\n \"dom vs \\ dom (mrw_values P vs obs)\"\nby(induct obs arbitrary: vs)(auto intro: subset_trans[OF mrw_value_dom_mono] del: subsetI)\n\nlemma mrw_values_eq_NoneD:\n assumes \"mrw_values P vs0 obs adal = None\"\n and \"w \\ set obs\" and \"is_write_action w\" and \"adal \\ action_loc_aux P w\"\n shows False\nusing assms\napply -\napply(erule is_write_action.cases)\napply(fastforce dest: mrw_values_WriteMemD[where ?vs0.0=vs0 and P=P] mrw_values_new_actionD[where ?vs0.0=vs0] elim: action_loc_aux_cases)+\ndone\n\n\n\n from obs have len: \"length (map snd obs) = Suc (length obs') + length obs''\" by simp\n hence \"?i < length obs\" by simp\n moreover\n hence obs_i: \"action_obs ?E ?i = wa\" using len obs\n by(auto simp add: action_obs_def map_eq_append_conv)\n\n have \"P,?E \\ length obs \\mrw ?i\"\n proof(rule most_recent_write_for.intros)\n show \"length obs \\ read_actions ?E\"\n by(auto intro: read_actions.intros simp add: actions_def action_obs_def)\n show \"(ad, al) \\ action_loc P ?E (length obs)\"\n by(simp add: action_obs_def lnth_llist_of)\n show \"?E \\ length obs' \\a length obs\" using len\n by-(rule action_orderI, auto simp add: actions_def action_obs_def nth_append)\n show \"?i \\ write_actions ?E\" using len obs wa\n by-(rule write_actions.intros, auto simp add: actions_def action_obs_def nth_append map_eq_append_conv)\n show \"(ad, al) \\ action_loc P ?E ?i\" using obs_i adal by simp\n\n fix wa'\n assume wa': \"wa' \\ write_actions ?E\"\n and adal': \"(ad, al) \\ action_loc P ?E wa'\"\n from wa' `?i \\ write_actions ?E`\n have \"wa' \\ actions ?E\" \"?i \\ actions ?E\" by simp_all\n hence \"?E \\ wa' \\a ?i\"\n proof(rule action_orderI)\n assume new_wa': \"is_new_action (action_obs ?E wa')\"\n and new_i: \"is_new_action (action_obs ?E ?i)\"\n from new_i obs_i new have b: \"\\ b\" by simp\n\n show \"wa' \\ ?i\"\n proof(rule ccontr)\n assume \"\\ ?thesis\"\n hence \"?i < wa'\" by simp\n hence \"snd (obs ! wa') \\ set obs''\" using obs wa' unfolding in_set_conv_nth\n by -(rule exI[where x=\"wa' - Suc (length obs')\"], auto elim!: write_actions.cases actionsE simp add: action_obs_def lnth_llist_of actions_def nth_append map_eq_append_conv nth_Cons' split: split_if_asm)\n moreover from wa' have \"is_write_action (snd (obs ! wa'))\"\n by cases(auto simp add: action_obs_def nth_append actions_def split: split_if_asm)\n moreover from adal' wa' have \"(ad, al) \\ action_loc_aux P (snd (obs ! wa'))\"\n by(auto simp add: action_obs_def nth_append nth_Cons' actions_def split: split_if_asm elim!: write_actions.cases)\n ultimately show False using last[of \"snd (obs ! wa')\"] b by simp\n qed\n next\n assume new_wa': \"\\ is_new_action (action_obs ?E wa')\"\n with wa' adal' obtain v' where \"NormalAction (WriteMem ad al v') \\ set (map snd obs)\"\n unfolding in_set_conv_nth\n by (fastforce elim!: write_actions.cases is_write_action.cases simp add: action_obs_def actions_def nth_append split: split_if_asm intro!: exI[where x=wa'])\n from mrw_values_WriteMemD[OF this, of P vs0] mrw have b by simp\n with new obs_i have \"\\ is_new_action (action_obs ?E ?i)\" by simp\n moreover\n have \"wa' \\ ?i\"\n proof(rule ccontr)\n assume \"\\ ?thesis\"\n hence \"?i < wa'\" by simp\n hence \"snd (obs ! wa') \\ set obs''\" using obs wa' unfolding in_set_conv_nth\n by -(rule exI[where x=\"wa' - Suc (length obs')\"], auto elim!: write_actions.cases actionsE simp add: action_obs_def lnth_llist_of actions_def nth_append map_eq_append_conv nth_Cons' split: split_if_asm)\n moreover from wa' have \"is_write_action (snd (obs ! wa'))\"\n by cases(auto simp add: action_obs_def nth_append actions_def split: split_if_asm)\n moreover from adal' wa' have \"(ad, al) \\ action_loc_aux P (snd (obs ! wa'))\"\n by(auto simp add: action_obs_def nth_append nth_Cons' actions_def split: split_if_asm elim!: write_actions.cases)\n ultimately have \"is_new_action (snd (obs ! wa'))\" using last[of \"snd (obs ! wa')\"] by simp\n moreover from new_wa' wa' have \"\\ is_new_action (snd (obs ! wa'))\"\n by(auto elim!: write_actions.cases simp add: action_obs_def nth_append actions_def split: split_if_asm)\n ultimately show False by contradiction\n qed\n ultimately\n show \"\\ is_new_action (action_obs ?E ?i) \\ wa' \\ ?i\" by blast\n qed\n thus \"?E \\ wa' \\a ?i \\ ?E \\ length obs \\a wa'\" ..\n qed\n moreover from written `?i < length obs` obs_i\n have \"value_written P (llist_of obs) ?i (ad, al) = v\"\n by(simp add: value_written_def action_obs_def nth_append)\n ultimately show ?thesis by blast\nqed\n\nlemma mrw_values_no_write_unchanged:\n assumes no_write: \"\\w. \\ w \\ set obs; is_write_action w; adal \\ action_loc_aux P w \\\n \\ case vs adal of None \\ False | Some (v, b) \\ b \\ is_new_action w\"\n shows \"mrw_values P vs obs adal = vs adal\"\nusing assms\nproof(induct obs arbitrary: vs)\n case Nil show ?case by simp\nnext\n case (Cons ob obs)\n from Cons.prems[of ob]\n have \"mrw_value P vs ob adal = vs adal\"\n apply(cases adal)\n apply(cases ob rule: mrw_value_cases, fastforce+)\n apply(auto simp add: addr_locs_def split: htype.split_asm)\n apply blast+\n done\n moreover\n have \"mrw_values P (mrw_value P vs ob) obs adal = mrw_value P vs ob adal\"\n proof(rule Cons.hyps)\n fix w\n assume \"w \\ set obs\" \"is_write_action w\" \"adal \\ action_loc_aux P w\"\n with Cons.prems[of w] `mrw_value P vs ob adal = vs adal`\n show \"case mrw_value P vs ob adal of None \\ False | \\(v, b)\\ \\ b \\ is_new_action w\" by simp\n qed\n ultimately show ?case by simp\nqed\n\nsection {* Coinductive version of sequentially consistent prefixes *}\n\ncoinductive ta_seq_consist :: \n \"'m prog \\ ('addr \\ addr_loc \\ 'addr val \\ bool) \\ ('addr, 'thread_id) obs_event action llist \\ bool\"\nfor P :: \"'m prog\" \nwhere\n LNil: \"ta_seq_consist P vs LNil\"\n| LCons:\n \"\\ case ob of NormalAction (ReadMem ad al v) \\ \\b. vs (ad, al) = \\(v, b)\\ | _ \\ True;\n ta_seq_consist P (mrw_value P vs ob) obs \\ \n \\ ta_seq_consist P vs (LCons ob obs)\"\n\ninductive_simps ta_seq_consist_simps [simp]:\n \"ta_seq_consist P vs LNil\"\n \"ta_seq_consist P vs (LCons ob obs)\"\n\nlemma ta_seq_consist_lappend:\n assumes \"lfinite obs\"\n shows \"ta_seq_consist P vs (lappend obs obs') \\\n ta_seq_consist P vs obs \\ ta_seq_consist P (mrw_values P vs (list_of obs)) obs'\"\n (is \"?concl vs obs\")\nusing assms\nproof(induct arbitrary: vs)\n case lfinite_LNil thus ?case by simp\nnext\n case (lfinite_LConsI obs ob)\n have \"?concl (mrw_value P vs ob) obs\" by fact\n thus ?case using `lfinite obs` by(simp split: action.split add: list_of_LCons)\nqed\n\nlemma\n assumes \"ta_seq_consist P vs obs\"\n shows ta_seq_consist_ltake: \"ta_seq_consist P vs (ltake n obs)\" (is ?thesis1)\n and ta_seq_consist_ldrop: \"ta_seq_consist P (mrw_values P vs (list_of (ltake n obs))) (ldrop n obs)\" (is ?thesis2)\nproof -\n note assms\n also have \"obs = lappend (ltake n obs) (ldrop n obs)\" by(simp add: lappend_ltake_ldrop)\n finally have \"?thesis1 \\ ?thesis2\"\n by(cases n)(simp_all add: ta_seq_consist_lappend del: lappend_ltake_enat_ldropn)\n thus ?thesis1 ?thesis2 by blast+\nqed\n\nlemma ta_seq_consist_coinduct_append [consumes 1, case_names ta_seq_consist, case_conclusion ta_seq_consist LNil lappend]:\n assumes major: \"X vs obs\"\n and step: \"\\vs obs. X vs obs \n \\ obs = LNil \\\n (\\obs' obs''. obs = lappend obs' obs'' \\ obs' \\ LNil \\ ta_seq_consist P vs obs' \\\n (lfinite obs' \\ (X (mrw_values P vs (list_of obs')) obs'' \\ \n ta_seq_consist P (mrw_values P vs (list_of obs')) obs'')))\"\n (is \"\\vs obs. _ \\ _ \\ ?step vs obs\")\n shows \"ta_seq_consist P vs obs\"\nproof -\n from major\n have \"\\obs' obs''. obs = lappend (llist_of obs') obs'' \\ ta_seq_consist P vs (llist_of obs') \\ \n X (mrw_values P vs obs') obs''\"\n by(auto intro: exI[where x=\"[]\"])\n thus ?thesis\n proof(coinduct)\n case (ta_seq_consist vs obs)\n then obtain obs' obs'' \n where obs: \"obs = lappend (llist_of obs') obs''\"\n and sc_obs': \"ta_seq_consist P vs (llist_of obs')\"\n and X: \"X (mrw_values P vs obs') obs''\" by blast\n\n show ?case\n proof(cases obs')\n case Nil\n with X have \"X vs obs''\" by simp\n from step[OF this] show ?thesis\n proof\n assume \"obs'' = LNil\" \n with Nil obs show ?thesis by simp\n next\n assume \"?step vs obs''\"\n then obtain obs''' obs'''' \n where obs'': \"obs'' = lappend obs''' obs''''\" and \"obs''' \\ LNil\"\n and sc_obs''': \"ta_seq_consist P vs obs'''\" \n and fin: \"lfinite obs''' \\ X (mrw_values P vs (list_of obs''')) obs'''' \\\n ta_seq_consist P (mrw_values P vs (list_of obs''')) obs''''\"\n by blast\n from `obs''' \\ LNil` obtain ob obs''''' where obs''': \"obs''' = LCons ob obs'''''\"\n unfolding neq_LNil_conv by blast\n with Nil obs'' obs have concl1: \"obs = LCons ob (lappend obs''''' obs'''')\" by simp\n have concl2: \"case ob of NormalAction (ReadMem ad al v) \\ \\b. vs (ad, al) = \\(v, b)\\ | _ \\ True\"\n using sc_obs''' obs''' by simp\n\n show ?thesis\n proof(cases \"lfinite obs'''\")\n case False\n hence \"lappend obs''''' obs'''' = obs'''''\" using obs''' by(simp add: lappend_inf)\n hence \"ta_seq_consist P (mrw_value P vs ob) (lappend obs''''' obs'''')\" \n using sc_obs''' obs''' by simp\n with concl1 concl2 have ?LCons by blast\n thus ?thesis by simp\n next\n case True\n with obs''' obtain obs'''''' where obs''''': \"obs''''' = llist_of obs''''''\"\n by simp(auto simp add: lfinite_eq_range_llist_of)\n from fin[OF True] have \"?LCons\"\n proof\n assume X: \"X (mrw_values P vs (list_of obs''')) obs''''\"\n hence \"X (mrw_values P (mrw_value P vs ob) obs'''''') obs''''\"\n using obs''''' obs''' by simp\n moreover from obs'''''\n have \"lappend obs''''' obs'''' = lappend (llist_of obs'''''') obs''''\" by simp\n moreover have \"ta_seq_consist P (mrw_value P vs ob) (llist_of obs'''''')\" \n using sc_obs''' obs''' obs''''' by simp\n ultimately show ?thesis using concl1 concl2 by blast\n next\n assume \"ta_seq_consist P (mrw_values P vs (list_of obs''')) obs''''\"\n with sc_obs''' obs''''' obs'''\n have \"ta_seq_consist P (mrw_value P vs ob) (lappend obs''''' obs'''')\"\n by(simp add: ta_seq_consist_lappend)\n with concl1 concl2 show ?thesis by blast\n qed\n thus ?thesis by simp\n qed\n qed\n next\n case (Cons ob obs''')\n hence \"obs = LCons ob (lappend (llist_of obs''') obs'')\"\n using obs by simp\n moreover from sc_obs' Cons \n have \"case ob of NormalAction (ReadMem ad al v) \\ \\b. vs (ad, al) = \\(v, b)\\ | _ \\ True\"\n and \"ta_seq_consist P (mrw_value P vs ob) (llist_of obs''')\" by simp_all\n moreover from X Cons have \"X (mrw_values P (mrw_value P vs ob) obs''') obs''\" by simp\n ultimately show ?thesis by blast\n qed\n qed\nqed\n\nlemma ta_seq_consist_coinduct_append_wf\n [consumes 2, case_names ta_seq_consist, case_conclusion ta_seq_consist LNil lappend]:\n assumes major: \"X vs obs a\"\n and wf: \"wf R\"\n and step: \"\\vs obs a. X vs obs a\n \\ obs = LNil \\\n (\\obs' obs'' a'. obs = lappend obs' obs'' \\ ta_seq_consist P vs obs' \\ (obs' = LNil \\ (a', a) \\ R) \\\n (lfinite obs' \\ X (mrw_values P vs (list_of obs')) obs'' a' \\\n ta_seq_consist P (mrw_values P vs (list_of obs')) obs''))\"\n (is \"\\vs obs a. _ \\ _ \\ ?step vs obs a\")\n shows \"ta_seq_consist P vs obs\"\nproof -\n { fix vs obs a\n assume \"X vs obs a\"\n with wf\n have \"obs = LNil \\ (\\obs' obs''. obs = lappend obs' obs'' \\ obs' \\ LNil \\ ta_seq_consist P vs obs' \\\n (lfinite obs' \\ (\\a. X (mrw_values P vs (list_of obs')) obs'' a) \\ \n ta_seq_consist P (mrw_values P vs (list_of obs')) obs''))\"\n (is \"_ \\ ?step_concl vs obs\")\n proof(induct a arbitrary: vs obs rule: wf_induct[consumes 1, case_names wf])\n case (wf a)\n note IH = wf.hyps[rule_format]\n from step[OF `X vs obs a`]\n show ?case\n proof\n assume \"obs = LNil\" thus ?thesis ..\n next\n assume \"?step vs obs a\"\n then obtain obs' obs'' a'\n where obs: \"obs = lappend obs' obs''\"\n and sc_obs': \"ta_seq_consist P vs obs'\"\n and decr: \"obs' = LNil \\ (a', a) \\ R\"\n and fin: \"lfinite obs' \\ \n X (mrw_values P vs (list_of obs')) obs'' a' \\\n ta_seq_consist P (mrw_values P vs (list_of obs')) obs''\"\n by blast\n show ?case\n proof(cases \"obs' = LNil\")\n case True\n hence \"lfinite obs'\" by simp\n from fin[OF this] show ?thesis\n proof\n assume X: \"X (mrw_values P vs (list_of obs')) obs'' a'\"\n from True have \"(a', a) \\ R\" by(rule decr)\n from IH[OF this X] show ?thesis\n proof\n assume \"obs'' = LNil\"\n with True obs have \"obs = LNil\" by simp\n thus ?thesis ..\n next\n assume \"?step_concl (mrw_values P vs (list_of obs')) obs''\"\n hence \"?step_concl vs obs\" using True obs by simp\n thus ?thesis ..\n qed\n next\n assume \"ta_seq_consist P (mrw_values P vs (list_of obs')) obs''\"\n thus ?thesis using obs True\n by cases(auto cong: action.case_cong obs_event.case_cong intro: exI[where x=\"LCons x LNil\" for x])\n qed\n next\n case False\n with obs sc_obs' fin show ?thesis by auto\n qed\n qed\n qed }\n note step' = this\n\n from major show ?thesis\n proof(coinduction arbitrary: vs obs a rule: ta_seq_consist_coinduct_append)\n case (ta_seq_consist vs obs a)\n thus ?case by simp(rule step')\n qed\nqed\n\nlemma ta_seq_consist_nthI:\n \"(\\i ad al v. \\ enat i < llength obs; lnth obs i = NormalAction (ReadMem ad al v);\n ta_seq_consist P vs (ltake (enat i) obs) \\ \n \\ \\b. mrw_values P vs (list_of (ltake (enat i) obs)) (ad, al) = \\(v, b)\\)\n \\ ta_seq_consist P vs obs\"\nproof(coinduction arbitrary: vs obs)\n case (ta_seq_consist vs obs)\n hence nth:\n \"\\i ad al v. \\ enat i < llength obs; lnth obs i = NormalAction (ReadMem ad al v); \n ta_seq_consist P vs (ltake (enat i) obs) \\ \n \\ \\b. mrw_values P vs (list_of (ltake (enat i) obs)) (ad, al) = \\(v, b)\\\" by blast\n show ?case\n proof(cases obs)\n case LNil thus ?thesis by simp\n next\n case (LCons ob obs')\n { fix ad al v\n assume \"ob = NormalAction (ReadMem ad al v)\"\n with nth[of 0 ad al v] LCons\n have \"\\b. vs (ad, al) = \\(v, b)\\\"\n by(simp add: zero_enat_def[symmetric]) }\n note base = this\n moreover { \n fix i ad al v\n assume \"enat i < llength obs'\" \"lnth obs' i = NormalAction (ReadMem ad al v)\"\n and \"ta_seq_consist P (mrw_value P vs ob) (ltake (enat i) obs')\"\n with LCons nth[of \"Suc i\" ad al v] base\n have \"\\b. mrw_values P (mrw_value P vs ob) (list_of (ltake (enat i) obs')) (ad, al) = \\(v, b)\\\"\n by(clarsimp simp add: eSuc_enat[symmetric] split: obs_event.split action.split) }\n ultimately have ?LCons using LCons by(simp split: action.split obs_event.split)\n thus ?thesis ..\n qed\nqed\n\nlemma ta_seq_consist_into_non_speculative:\n \"\\ ta_seq_consist P vs obs; \\adal. set_option (vs adal) \\ vs' adal \\ UNIV \\\n \\ non_speculative P vs' obs\"\nusing assms\nproof(coinduction arbitrary: vs' obs vs)\n case (non_speculative vs' obs vs)\n thus ?case\n apply cases\n apply(auto split: action.split_asm obs_event.split_asm)\n apply(rule exI, erule conjI, auto)+\n done\nqed\n\nlemma llist_of_list_of_append:\n \"lfinite xs \\ llist_of (list_of xs @ ys) = lappend xs (llist_of ys)\"\nunfolding lfinite_eq_range_llist_of by(clarsimp simp add: lappend_llist_of_llist_of)\n\n\n\n from E' r have sim: \"ltake (enat (Suc r)) E' [\\] ltake (enat (Suc r)) E\"\n by(subst E_unfold)(simp add: ltake_lappend llist_of_list_of_append min_def, auto simp add: eSuc_enat[symmetric] zero_enat_def[symmetric] eq_into_sim_actions)\n from nth_r have adal_r: \"(ad, al) \\ action_loc P E r\" by(simp add: action_obs_def)\n from E' r have nth_r': \"lnth E' r = (t, NormalAction (ReadMem ad al v))\"\n by(auto simp add: nth_append length_list_of_conv_the_enat min_def)\n with mrw'' w' r adal_r obtain \"E \\ w' \\a r\" \"w' \\ write_actions E\" \"(ad, al) \\ action_loc P E w'\"\n by cases(fastforce simp add: action_obs_def action_loc_change_prefix[OF sim[symmetric], simplified action_obs_def] intro: action_order_change_prefix[OF _ sim] write_actions_change_prefix[OF _ sim])\n \n with read adal_r have \"P,E \\ r \\mrw w'\"\n proof(rule most_recent_write_for.intros)\n fix wa'\n assume write': \"wa' \\ write_actions E\"\n and adal_wa': \"(ad, al) \\ action_loc P E wa'\"\n show \"E \\ wa' \\a w' \\ E \\ r \\a wa'\"\n proof(cases \"r \\ wa'\")\n assume \"r \\ wa'\"\n show ?thesis\n proof(cases \"is_new_action (action_obs E wa')\")\n case False\n with `r \\ wa'` have \"E \\ r \\a wa'\" using read write'\n by(auto simp add: action_order_def elim!: read_actions.cases)\n thus ?thesis ..\n next\n case True\n with write' adal_wa' have \"wa' \\ new_actions_for P E (ad, al)\"\n by(simp add: new_actions_for_def)\n hence \"w' \\ new_actions_for P E (ad, al)\" using r w' `r \\ wa'`\n by(auto dest: new_actions_for_fun)\n with `w' \\ write_actions E` `(ad, al) \\ action_loc P E w'`\n have \"\\ is_new_action (action_obs E w')\" by(simp add: new_actions_for_def)\n with write' True `w' \\ write_actions E` have \"E \\ wa' \\a w'\" by(simp add: action_order_def)\n thus ?thesis ..\n qed\n next\n assume \"\\ r \\ wa'\"\n hence \"wa' < r\" by simp\n with write' adal_wa'\n have \"wa' \\ write_actions E'\" \"(ad, al) \\ action_loc P E' wa'\"\n by(auto intro: write_actions_change_prefix[OF _ sim[symmetric]] simp add: action_loc_change_prefix[OF sim])\n from most_recent_write_recent[OF mrw'' _ this] nth_r'\n have \"E' \\ wa' \\a w' \\ E' \\ r \\a wa'\" by(simp add: action_obs_def)\n thus ?thesis using `wa' < r` w'\n by(auto 4 3 del: disjCI intro: disjI1 disjI2 action_order_change_prefix[OF _ sim])\n qed\n qed\n with w' show ?thesis by blast\nqed\n\nlemma ta_seq_consist_mrw_before:\n assumes sc: \"ta_seq_consist P empty (lmap snd E)\"\n and new_actions_for_fun: \"\\adal a a'. \\ a \\ new_actions_for P E adal; a' \\ new_actions_for P E adal \\ \\ a = a'\"\n and mrw: \"P,E \\ r \\mrw w\"\n shows \"w < r\"\nproof -\n from mrw have \"r \\ read_actions E\" by cases\n with sc new_actions_for_fun obtain w' where \"P,E \\ r \\mrw w'\" \"w' < r\"\n by(auto dest: ta_seq_consist_most_recent_write_for)\n with mrw show ?thesis by(auto dest: most_recent_write_for_fun)\nqed\n\nlemma ta_seq_consist_imp_sequentially_consistent:\n assumes tsa_ok: \"thread_start_actions_ok E\"\n and new_actions_for_fun: \"\\adal a a'. \\ a \\ new_actions_for P E adal; a' \\ new_actions_for P E adal \\ \\ a = a'\"\n and seq: \"ta_seq_consist P empty (lmap snd E)\"\n shows \"\\ws. sequentially_consistent P (E, ws) \\ P \\ (E, ws) \\\"\nproof(intro exI conjI)\n def ws == \"\\i. THE w. P,E \\ i \\mrw w\"\n from seq have ns: \"non_speculative P (\\_. {}) (lmap snd E)\"\n by(rule ta_seq_consist_into_non_speculative) simp\n show \"sequentially_consistent P (E, ws)\" unfolding ws_def\n proof(rule sequentially_consistentI)\n fix r\n assume \"r \\ read_actions E\"\n with seq new_actions_for_fun\n obtain w where \"P,E \\ r \\mrw w\" by(auto dest: ta_seq_consist_most_recent_write_for)\n thus \"P,E \\ r \\mrw THE w. P,E \\ r \\mrw w\" by(simp add: THE_most_recent_writeI)\n qed\n\n show \"P \\ (E, ws) \\\"\n proof(rule wf_execI)\n show \"is_write_seen P E ws\"\n proof(rule is_write_seenI)\n fix a ad al v\n assume a: \"a \\ read_actions E\"\n and adal: \"action_obs E a = NormalAction (ReadMem ad al v)\"\n from ns have seq': \"non_speculative P (\\_. {}) (ltake (enat a) (lmap snd E))\" by(rule non_speculative_ltake)\n from seq a seq new_actions_for_fun\n obtain w where mrw: \"P,E \\ a \\mrw w\" \n and \"w < a\" by(auto dest: ta_seq_consist_most_recent_write_for)\n hence w: \"ws a = w\" by(simp add: ws_def THE_most_recent_writeI)\n with mrw adal\n\n show \"ws a \\ write_actions E\"\n and \"(ad, al) \\ action_loc P E (ws a)\"\n and \"\\ P,E \\ a \\hb ws a\"\n by(fastforce elim!: most_recent_write_for.cases dest: happens_before_into_action_order antisymPD[OF antisym_action_order] read_actions_not_write_actions)+\n\n let ?between = \"ltake (enat (a - Suc w)) (ldropn (Suc w) E)\"\n let ?prefix = \"ltake (enat w) E\"\n let ?vs_prefix = \"mrw_values P empty (map snd (list_of ?prefix))\"\n\n { fix v'\n assume new: \"is_new_action (action_obs E w)\"\n and vs': \"?vs_prefix (ad, al) = \\(v', True)\\\"\n from mrw_values_eq_SomeD[OF vs']\n obtain obs' wa obs'' where split: \"map snd (list_of ?prefix) = obs' @ wa # obs''\"\n and wa: \"is_write_action wa\"\n and adal': \"(ad, al) \\ action_loc_aux P wa\"\n and new_wa: \"\\ is_new_action wa\" by blast\n from split have \"length (map snd (list_of ?prefix)) = Suc (length obs' + length obs'')\" by simp\n hence len_prefix: \"llength ?prefix = enat \\\" by(simp add: length_list_of_conv_the_enat min_enat1_conv_enat)\n with split have \"nth (map snd (list_of ?prefix)) (length obs') = wa\"\n and \"enat (length obs') < llength ?prefix\" by simp_all\n hence \"snd (lnth ?prefix (length obs')) = wa\" by(simp add: list_of_lmap[symmetric] del: list_of_lmap)\n hence wa': \"action_obs E (length obs') = wa\" and \"enat (length obs') < llength E\"\n using `enat (length obs') < llength ?prefix` by(auto simp add: action_obs_def lnth_ltake)\n with wa have \"length obs' \\ write_actions E\" by(auto intro: write_actions.intros simp add: actions_def)\n from most_recent_write_recent[OF mrw _ this, of \"(ad, al)\"] adal adal' wa'\n have \"E \\ length obs' \\a w \\ E \\ a \\a length obs'\" by simp\n hence False using new_wa new wa' adal len_prefix `w < a`\n by(auto elim!: action_orderE simp add: min_enat1_conv_enat split: enat.split_asm) \n }\n hence mrw_value_w: \"mrw_value P ?vs_prefix (snd (lnth E w)) (ad, al) =\n \\(value_written P E w (ad, al), \\ is_new_action (action_obs E w))\\\"\n using `ws a \\ write_actions E` `(ad, al) \\ action_loc P E (ws a)` w\n by(cases \"snd (lnth E w)\" rule: mrw_value_cases)(fastforce elim: write_actions.cases simp add: value_written_def action_obs_def)+\n have \"mrw_values P (mrw_value P ?vs_prefix (snd (lnth E w))) (list_of (lmap snd ?between)) (ad, al) = \\(value_written P E w (ad, al), \\ is_new_action (action_obs E w))\\\"\n proof(subst mrw_values_no_write_unchanged)\n fix wa\n assume \"wa \\ set (list_of (lmap snd ?between))\"\n and write_wa: \"is_write_action wa\"\n and adal_wa: \"(ad, al) \\ action_loc_aux P wa\"\n hence wa: \"wa \\ lset (lmap snd ?between)\" by simp\n from wa obtain i_wa where \"wa = lnth (lmap snd ?between) i_wa\"\n and i_wa: \"enat i_wa < llength (lmap snd ?between)\"\n unfolding lset_conv_lnth by blast\n moreover hence i_wa_len: \"enat (Suc (w + i_wa)) < llength E\" by(cases \"llength E\") auto\n ultimately have wa': \"wa = action_obs E (Suc (w + i_wa))\"\n by(simp_all add: lnth_ltake action_obs_def ac_simps)\n with write_wa i_wa_len have \"Suc (w + i_wa) \\ write_actions E\"\n by(auto intro: write_actions.intros simp add: actions_def)\n from most_recent_write_recent[OF mrw _ this, of \"(ad, al)\"] adal adal_wa wa'\n have \"E \\ Suc (w + i_wa) \\a w \\ E \\ a \\a Suc (w + i_wa)\" by(simp)\n hence \"is_new_action wa \\ \\ is_new_action (action_obs E w)\"\n using adal i_wa wa' by(auto elim: action_orderE)\n thus \"case (mrw_value P ?vs_prefix (snd (lnth E w)) (ad, al)) of None \\ False | Some (v, b) \\ b \\ is_new_action wa\"\n unfolding mrw_value_w by simp\n qed(simp add: mrw_value_w)\n\n moreover\n\n from a have \"a \\ actions E\" by simp\n hence \"enat a < llength E\" by(rule actionsE)\n with `w < a` have \"enat (a - Suc w) < llength E - enat (Suc w)\"\n by(cases \"llength E\") simp_all\n hence \"E = lappend (lappend ?prefix (LCons (lnth E w) ?between)) (LCons (lnth (ldropn (Suc w) E) (a - Suc w)) (ldropn (Suc (a - Suc w)) (ldropn (Suc w) E)))\"\n using `w < a` `enat a < llength E` unfolding lappend_assoc lappend_code\n apply(subst ldropn_Suc_conv_ldropn, simp)\n apply(subst lappend_ltake_enat_ldropn)\n apply(subst ldropn_Suc_conv_ldropn, simp add: less_trans[where y=\"enat a\"])\n by simp\n hence E': \"E = lappend (lappend ?prefix (LCons (lnth E w) ?between)) (LCons (lnth E a) (ldropn (Suc a) E))\"\n using `w < a` `enat a < llength E` by simp\n \n from seq have \"ta_seq_consist P (mrw_values P empty (list_of (lappend (lmap snd ?prefix) (LCons (snd (lnth E w)) (lmap snd ?between))))) (lmap snd (LCons (lnth E a) (ldropn (Suc a) E)))\"\n by(subst (asm) E')(simp add: lmap_lappend_distrib ta_seq_consist_lappend)\n ultimately show \"value_written P E (ws a) (ad, al) = v\" using adal w\n by(clarsimp simp add: action_obs_def list_of_lappend list_of_LCons)\n\n (* assume \"is_volatile P al\" *)\n show \"\\ P,E \\ a \\so ws a\" using `w < a` w adal by(auto elim!: action_orderE sync_orderE)\n\n fix a'\n assume a': \"a' \\ write_actions E\" \"(ad, al) \\ action_loc P E a'\"\n\n {\n presume \"E \\ ws a \\a a'\" \"E \\ a' \\a a\"\n with mrw adal a' have \"a' = ws a\" unfolding w\n by cases(fastforce dest: antisymPD[OF antisym_action_order] read_actions_not_write_actions elim!: meta_allE[where x=a'])\n thus \"a' = ws a\" \"a' = ws a\" by -\n next\n assume \"P,E \\ ws a \\hb a'\" \"P,E \\ a' \\hb a\"\n thus \"E \\ ws a \\a a'\" \"E \\ a' \\a a\" using a' by(blast intro: happens_before_into_action_order)+\n next\n assume \"is_volatile P al\" \"P,E \\ ws a \\so a'\" \"P,E \\ a' \\so a\"\n thus \"E \\ ws a \\a a'\" \"E \\ a' \\a a\" by(auto elim: sync_orderE)\n }\n qed\n qed(rule tsa_ok)\nqed\n\nsection {* Cut-and-update and sequentially consistent completion *}\n\ninductive foldl_list_all2 ::\n \"('b \\ 'c \\ 'a \\ 'a) \\ ('b \\ 'c \\ 'a \\ bool) \\ ('b \\ 'c \\ 'a \\ bool) \\ 'b list \\ 'c list \\ 'a \\ bool\"\nfor f and P and Q\nwhere\n \"foldl_list_all2 f P Q [] [] s\"\n| \"\\ Q x y s; P x y s \\ foldl_list_all2 f P Q xs ys (f x y s) \\ \\ foldl_list_all2 f P Q (x # xs) (y # ys) s\"\n\ninductive_simps foldl_list_all2_simps [simp]:\n \"foldl_list_all2 f P Q [] ys s\"\n \"foldl_list_all2 f P Q xs [] s\"\n \"foldl_list_all2 f P Q (x # xs) (y # ys) s\"\n\ninductive_simps foldl_list_all2_Cons1:\n \"foldl_list_all2 f P Q (x # xs) ys s\"\n\ninductive_simps foldl_list_all2_Cons2:\n \"foldl_list_all2 f P Q xs (y # ys) s\"\n\ndefinition eq_upto_seq_inconsist ::\n \"'m prog \\ ('addr, 'thread_id) obs_event action list \\ ('addr, 'thread_id) obs_event action list\n \\ ('addr \\ addr_loc \\ 'addr val \\ bool) \\ bool\"\nwhere\n \"eq_upto_seq_inconsist P =\n foldl_list_all2 (\\ob ob' vs. mrw_value P vs ob) \n (\\ob ob' vs. case ob of NormalAction (ReadMem ad al v) \\ \\b. vs (ad, al) = Some (v, b) | _ \\ True)\n (\\ob ob' vs. if (case ob of NormalAction (ReadMem ad al v) \\ \\b. vs (ad, al) = Some (v, b) | _ \\ True) then ob = ob' else ob \\ ob')\"\n\nlemma eq_upto_seq_inconsist_simps:\n \"eq_upto_seq_inconsist P [] obs' vs \\ obs' = []\"\n \"eq_upto_seq_inconsist P obs [] vs \\ obs = []\"\n \"eq_upto_seq_inconsist P (ob # obs) (ob' # obs') vs \\ \n (case ob of NormalAction (ReadMem ad al v) \\ \n if (\\b. vs (ad, al) = \\(v, b)\\) \n then ob = ob' \\ eq_upto_seq_inconsist P obs obs' (mrw_value P vs ob) \n else ob \\ ob'\n | _ \\ ob = ob' \\ eq_upto_seq_inconsist P obs obs' (mrw_value P vs ob))\"\nby(auto simp add: eq_upto_seq_inconsist_def split: action.split obs_event.split)\n\nlemma eq_upto_seq_inconsist_Cons1:\n \"eq_upto_seq_inconsist P (ob # obs) obs' vs \\\n (\\ob' obs''. obs' = ob' # obs'' \\ \n (case ob of NormalAction (ReadMem ad al v) \\ \n if (\\b. vs (ad, al) = \\(v, b)\\) \n then ob' = ob \\ eq_upto_seq_inconsist P obs obs'' (mrw_value P vs ob)\n else ob \\ ob'\n | _ \\ ob' = ob \\ eq_upto_seq_inconsist P obs obs'' (mrw_value P vs ob)))\"\nunfolding eq_upto_seq_inconsist_def\nby(auto split: obs_event.split action.split simp add: foldl_list_all2_Cons1)\n\nlemma eq_upto_seq_inconsist_appendD:\n assumes \"eq_upto_seq_inconsist P (obs @ obs') obs'' vs\"\n and \"ta_seq_consist P vs (llist_of obs)\"\n shows \"length obs \\ length obs''\" (is ?thesis1)\n and \"take (length obs) obs'' = obs\" (is ?thesis2)\n and \"eq_upto_seq_inconsist P obs' (drop (length obs) obs'') (mrw_values P vs obs)\" (is ?thesis3)\nusing assms\nby(induct obs arbitrary: obs'' vs)(auto split: action.split_asm obs_event.split_asm simp add: eq_upto_seq_inconsist_Cons1)\n\nlemma ta_seq_consist_imp_eq_upto_seq_inconsist_refl:\n \"ta_seq_consist P vs (llist_of obs) \\ eq_upto_seq_inconsist P obs obs vs\"\napply(induct obs arbitrary: vs)\napply(auto simp add: eq_upto_seq_inconsist_simps split: action.split obs_event.split)\ndone\n\ndeclare split_paired_Ex [simp del]\ndeclare eq_upto_seq_inconsist_simps [simp]\n\nlemma eq_upto_seq_inconsist_appendI:\n \"\\ eq_upto_seq_inconsist P obs OBS vs;\n \\ ta_seq_consist P vs (llist_of obs) \\ \\ eq_upto_seq_inconsist P obs' OBS' (mrw_values P vs OBS) \\\n \\ eq_upto_seq_inconsist P (obs @ obs') (OBS @ OBS') vs\"\napply(induct obs arbitrary: vs OBS)\n apply simp\napply(auto simp add: eq_upto_seq_inconsist_Cons1)\napply(simp split: action.split obs_event.split)\napply auto\ndone\n\ndeclare split_paired_Ex [simp]\ndeclare eq_upto_seq_inconsist_simps [simp del]\n\ncontext executions_sc_hb begin\n\nlemma ta_seq_consist_mrwI:\n assumes E: \"E \\ \\\"\n and wf: \"P \\ (E, ws) \\\"\n and mrw: \"\\a. \\ enat a < r; a \\ read_actions E \\ \\ P,E \\ a \\mrw ws a\"\n shows \"ta_seq_consist P empty (lmap snd (ltake r E))\"\nproof(rule ta_seq_consist_nthI)\n fix i ad al v\n assume i_len: \"enat i < llength (lmap snd (ltake r E))\"\n and E_i: \"lnth (lmap snd (ltake r E)) i = NormalAction (ReadMem ad al v)\"\n and sc: \"ta_seq_consist P empty (ltake (enat i) (lmap snd (ltake r E)))\"\n from i_len have \"enat i < r\" by simp\n with sc have \"ta_seq_consist P empty (ltake (enat i) (lmap snd E))\"\n by(simp add: min_def split: split_if_asm)\n hence ns: \"non_speculative P (\\_. {}) (ltake (enat i) (lmap snd E))\"\n by(rule ta_seq_consist_into_non_speculative) simp\n from i_len have \"i \\ actions E\" by(simp add: actions_def)\n moreover from E_i i_len have obs_i: \"action_obs E i = NormalAction (ReadMem ad al v)\"\n by(simp add: action_obs_def lnth_ltake)\n ultimately have read: \"i \\ read_actions E\" ..\n with i_len have mrw_i: \"P,E \\ i \\mrw ws i\" by(auto intro: mrw)\n with E have \"ws i < i\" using ns by(rule mrw_before)\n\n from mrw_i obs_i obtain adal_w: \"(ad, al) \\ action_loc P E (ws i)\"\n and adal_r: \"(ad, al) \\ action_loc P E i\"\n and \"write\": \"ws i \\ write_actions E\" by cases auto\n \n from wf have \"is_write_seen P E ws\" by(rule wf_exec_is_write_seenD)\n from is_write_seenD[OF this read obs_i]\n have vw_v: \"value_written P E (ws i) (ad, al) = v\" by simp\n\n let ?vs = \"mrw_values P empty (map snd (list_of (ltake (enat (ws i)) E)))\"\n\n from `ws i < i` i_len have \"enat (ws i) < llength (ltake (enat i) E)\"\n by(simp add: less_trans[where y=\"enat i\"])\n hence \"ltake (enat i) E = lappend (ltake (enat (ws i)) (ltake (enat i) E)) (LCons (lnth (ltake (enat i) E) (ws i)) (ldropn (Suc (ws i)) (ltake (enat i) E)))\"\n by(simp only: ldropn_Suc_conv_ldropn lappend_ltake_enat_ldropn)\n also have \"\\ = lappend (ltake (enat (ws i)) E) (LCons (lnth E (ws i)) (ldropn (Suc (ws i)) (ltake (enat i) E)))\"\n using `ws i < i` i_len `enat (ws i) < llength (ltake (enat i) E)` \n by(simp add: lnth_ltake)(simp add: min_def)\n finally have r_E: \"ltake (enat i) E = \\\" .\n\n have \"mrw_values P empty (list_of (ltake (enat i) (lmap snd (ltake r E)))) (ad, al)\n = mrw_values P empty (map snd (list_of (ltake (enat i) E))) (ad, al)\"\n using `enat i < r` by(auto simp add: min_def)\n also have \"\\ = mrw_values P (mrw_value P ?vs (snd (lnth E (ws i)))) (map snd (list_of (ldropn (Suc (ws i)) (ltake (enat i) E)))) (ad, al)\"\n by(subst r_E)(simp add: list_of_lappend)\n also have \"\\ = mrw_value P ?vs (snd (lnth E (ws i))) (ad, al)\"\n proof(rule mrw_values_no_write_unchanged)\n fix wa\n assume wa: \"wa \\ set (map snd (list_of (ldropn (Suc (ws i)) (ltake (enat i) E))))\"\n and \"is_write_action wa\" \"(ad, al) \\ action_loc_aux P wa\"\n\n from wa obtain w where \"w < length (map snd (list_of (ldropn (Suc (ws i)) (ltake (enat i) E))))\"\n and \"map snd (list_of (ldropn (Suc (ws i)) (ltake (enat i) E))) ! w = wa\"\n unfolding in_set_conv_nth by blast\n moreover hence \"Suc (ws i + w) < i\" (is \"?w < _\") using i_len \n by(cases \"llength E\")(simp_all add: length_list_of_conv_the_enat)\n ultimately have obs_w': \"action_obs E ?w = wa\" using i_len\n by(simp add: action_obs_def lnth_ltake less_trans[where y=\"enat i\"] ac_simps)\n from `?w < i` i_len have \"?w \\ actions E\"\n by(simp add: actions_def less_trans[where y=\"enat i\"])\n with `is_write_action wa` obs_w' `(ad, al) \\ action_loc_aux P wa`\n have write': \"?w \\ write_actions E\" \n and adal': \"(ad, al) \\ action_loc P E ?w\"\n by(auto intro: write_actions.intros)\n \n from `?w < i` `i \\ read_actions E` `?w \\ actions E`\n have \"E \\ ?w \\a i\" by(auto simp add: action_order_def elim: read_actions.cases)\n\n from mrw_i adal_r write' adal'\n have \"E \\ ?w \\a ws i \\ E \\ i \\a ?w\" by(rule most_recent_write_recent)\n hence \"E \\ ?w \\a ws i\"\n proof\n assume \"E \\ i \\a ?w\"\n with `E \\ ?w \\a i` have \"?w = i\" by(rule antisymPD[OF antisym_action_order])\n with write' read have False by(auto dest: read_actions_not_write_actions)\n thus ?thesis ..\n qed\n\n from adal_w \"write\" have \"mrw_value P ?vs (snd (lnth E (ws i))) (ad, al) \\ None\"\n by(cases \"snd (lnth E (ws i))\" rule: mrw_value_cases)\n (auto simp add: action_obs_def split: split_if_asm elim: write_actions.cases)\n then obtain b v where vb: \"mrw_value P ?vs (snd (lnth E (ws i))) (ad, al) = Some (v, b)\" by auto\n moreover\n from `E \\ ?w \\a ws i` obs_w'\n have \"is_new_action wa\" \"\\ is_new_action (action_obs E (ws i))\" by(auto elim!: action_orderE)\n from `\\ is_new_action (action_obs E (ws i))` \"write\" adal_w\n obtain v' where \"action_obs E (ws i) = NormalAction (WriteMem ad al v')\"\n by(auto elim!: write_actions.cases is_write_action.cases)\n with vb have b by(simp add: action_obs_def)\n with `is_new_action wa` vb \n show \"case mrw_value P ?vs (snd (lnth E (ws i))) (ad, al) of None \\ False | \\(v, b)\\ \\ b \\ is_new_action wa\" by simp\n qed\n also {\n fix v\n assume \"?vs (ad, al) = Some (v, True)\"\n and \"is_new_action (action_obs E (ws i))\"\n \n from mrw_values_eq_SomeD[OF this(1)]\n obtain wa where \"wa \\ set (map snd (list_of (ltake (enat (ws i)) E)))\"\n and \"is_write_action wa\"\n and \"(ad, al) \\ action_loc_aux P wa\"\n and \"\\ is_new_action wa\" by(fastforce simp del: set_map)\n moreover then obtain w where w: \"w < ws i\" and wa: \"wa = snd (lnth E w)\"\n unfolding in_set_conv_nth by(cases \"llength E\")(auto simp add: lnth_ltake length_list_of_conv_the_enat)\n ultimately have \"w \\ write_actions E\" \"action_obs E w = wa\" \"(ad, al) \\ action_loc P E w\"\n using `ws i \\ write_actions E`\n by(auto intro!: write_actions.intros simp add: actions_def less_trans[where y=\"enat (ws i)\"] action_obs_def elim!: write_actions.cases)\n with mrw_i adal_r have \"E \\ w \\a ws i \\ E \\ i \\a w\" by -(rule most_recent_write_recent)\n hence False\n proof\n assume \"E \\ w \\a ws i\"\n moreover from `\\ is_new_action wa` `is_new_action (action_obs E (ws i))` \"write\" w wa `w \\ write_actions E`\n have \"E \\ ws i \\a w\" by(auto simp add: action_order_def action_obs_def)\n ultimately have \"w = ws i\" by(rule antisymPD[OF antisym_action_order])\n with `w < ws i` show False by simp\n next\n assume \"E \\ i \\a w\"\n moreover from `w \\ write_actions E` `w < ws i` `ws i < i` read\n have \"E \\ w \\a i\" by(auto simp add: action_order_def elim: read_actions.cases)\n ultimately have \"i = w\" by(rule antisymPD[OF antisym_action_order])\n with `w < ws i` `ws i < i` show False by simp\n qed }\n then obtain b where \"\\ = Some (v, b)\" using vw_v \"write\" adal_w\n apply(atomize_elim)\n apply(auto simp add: action_obs_def value_written_def write_actions_iff)\n apply(erule is_write_action.cases)\n apply auto\n apply blast+\n done\n finally show \"\\b. mrw_values P empty (list_of (ltake (enat i) (lmap snd (ltake r E)))) (ad, al) = \\(v, b)\\\"\n by blast\nqed\n\nend\n\ncontext jmm_multithreaded begin\n\ndefinition complete_sc :: \"('l,'thread_id,'x,'m,'w) state \\ ('addr \\ addr_loc \\ 'addr val \\ bool) \\ \n ('thread_id \\ ('l, 'thread_id, 'x, 'm, 'w, ('addr, 'thread_id) obs_event action) thread_action) llist\"\nwhere\n \"complete_sc s vs = unfold_llist\n (\\(s, vs). \\t ta s'. \\ s -t\\ta\\ s')\n (\\(s, vs). fst (SOME ((t, ta), s'). s -t\\ta\\ s' \\ ta_seq_consist P vs (llist_of \\ta\\\\<^bsub>o\\<^esub>)))\n (\\(s, vs). let ((t, ta), s') = SOME ((t, ta), s'). s -t\\ta\\ s' \\ ta_seq_consist P vs (llist_of \\ta\\\\<^bsub>o\\<^esub>)\n in (s', mrw_values P vs \\ta\\\\<^bsub>o\\<^esub>))\n (s, vs)\"\n\ndefinition sc_completion :: \"('l, 'thread_id, 'x, 'm, 'w) state \\ ('addr \\ addr_loc \\ 'addr val \\ bool) \\ bool\"\nwhere\n \"sc_completion s vs \\\n (\\ttas s' t x ta x' m'.\n s -\\ttas\\* s' \\ ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) \\\n thr s' t = \\(x, no_wait_locks)\\ \\ t \\ (x, shr s') -ta\\ (x', m') \\ actions_ok s' t ta \\\n (\\ta' x'' m''. t \\ (x, shr s') -ta'\\ (x'', m'') \\ actions_ok s' t ta' \\\n ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>)))\"\n\nlemma sc_completionD:\n \"\\ sc_completion s vs; s -\\ttas\\* s'; ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))); \n thr s' t = \\(x, no_wait_locks)\\; t \\ (x, shr s') -ta\\ (x', m'); actions_ok s' t ta \\\n \\ \\ta' x'' m''. t \\ (x, shr s') -ta'\\ (x'', m'') \\ actions_ok s' t ta' \\\n ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>)\"\nunfolding sc_completion_def by blast\n\n\n\n\n\nlemma complete_sc_in_Runs:\n assumes cau: \"sc_completion s vs\"\n and ta_seq_consist_convert_RA: \"\\vs ln. ta_seq_consist P vs (llist_of (convert_RA ln))\"\n shows \"mthr.Runs s (complete_sc s vs)\"\nproof -\n let ?ttas' = \"\\ttas' :: ('thread_id \\ ('l,'thread_id,'x,'m,'w, ('addr, 'thread_id) obs_event action) thread_action) list.\n concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas')\"\n let \"?vs ttas'\" = \"mrw_values P vs (?ttas' ttas')\"\n\n def s' \\ s and vs' \\ vs\n and ttas \\ \"[] :: ('thread_id \\ ('l,'thread_id,'x,'m,'w, ('addr, 'thread_id) obs_event action) thread_action) list\"\n hence \"s -\\ttas\\* s'\" \"ta_seq_consist P vs (llist_of (?ttas' ttas))\" by auto\n hence \"mthr.Runs s' (complete_sc s' (?vs ttas))\"\n proof(coinduction arbitrary: s' ttas rule: mthr.Runs.coinduct)\n case (Runs s' ttas')\n note Red = `s -\\ttas'\\* s'`\n and sc = `ta_seq_consist P vs (llist_of (?ttas' ttas'))`\n show ?case\n proof(cases \"\\t' ta' s''. s' -t'\\ta'\\ s''\")\n case False\n hence ?Stuck by(simp add: complete_sc_def)\n thus ?thesis ..\n next\n case True\n let ?proceed = \"\\((t', ta'), s''). s' -t'\\ta'\\ s'' \\ ta_seq_consist P (?vs ttas') (llist_of \\ta'\\\\<^bsub>o\\<^esub>)\"\n from True obtain t' ta' s'' where red: \"s' -t'\\ta'\\ s''\" by(auto)\n then obtain ta'' s''' where \"s' -t'\\ta''\\ s'''\"\n and \"ta_seq_consist P (?vs ttas') (llist_of \\ta''\\\\<^bsub>o\\<^esub>)\"\n proof(cases)\n case (redT_normal x x' m')\n note red = `t' \\ \\x, shr s'\\ -ta'\\ \\x', m'\\`\n and ts''t' = `thr s' t' = \\(x, no_wait_locks)\\`\n and aok = `actions_ok s' t' ta'`\n and s'' = `redT_upd s' t' ta' x' m' s''`\n from sc_completionD[OF cau Red sc ts''t' red aok]\n obtain ta'' x'' m'' where red': \"t' \\ \\x, shr s'\\ -ta''\\ \\x'', m''\\\"\n and aok': \"actions_ok s' t' ta''\"\n and sc': \"ta_seq_consist P (?vs ttas') (llist_of \\ta''\\\\<^bsub>o\\<^esub>)\" by blast\n from redT_updWs_total obtain ws' where \"redT_updWs t' (wset s') \\ta''\\\\<^bsub>w\\<^esub> ws'\" ..\n then obtain s''' where \"redT_upd s' t' ta'' x'' m'' s'''\" by fastforce\n with red' ts''t' aok' have \"s' -t'\\ta''\\ s'''\" ..\n thus thesis using sc' by(rule that)\n next\n case redT_acquire\n thus thesis by(simp add: that[OF red] ta_seq_consist_convert_RA)\n qed\n hence \"?proceed ((t', ta''), s''')\" using Red by(auto)\n hence \"?proceed (Eps ?proceed)\" by(rule someI)\n moreover with Red have \"s -\\ttas' @ [fst (Eps ?proceed)]\\* snd (Eps ?proceed)\"\n by(auto simp add: split_beta RedT_def intro: rtrancl3p_step)\n moreover from True\n have \"complete_sc s' (?vs ttas') = LCons (fst (Eps ?proceed)) (complete_sc (snd (Eps ?proceed)) (?vs (ttas' @ [fst (Eps ?proceed)])))\"\n unfolding complete_sc_def by(simp add: split_def)\n moreover from sc `?proceed (Eps ?proceed)`\n have \"ta_seq_consist P vs (llist_of (?ttas' (ttas' @ [fst (Eps ?proceed)])))\"\n unfolding map_append concat_append lappend_llist_of_llist_of[symmetric] \n by(subst ta_seq_consist_lappend)(auto simp add: split_def)\n ultimately have ?Step\n by(fastforce intro: exI[where x=\"ttas' @ [fst (Eps ?proceed)]\"] simp del: split_paired_Ex)\n thus ?thesis by simp\n qed\n qed\n thus ?thesis by(simp add: s'_def ttas_def)\nqed\n\n\n\n show ?case\n proof(cases \"\\t' ta' s''. s' -t'\\ta'\\ s''\")\n case False\n hence \"obs = LNil\" unfolding obs_def complete_sc_def by simp\n hence ?LNil unfolding obs_def by auto\n thus ?thesis ..\n next\n case True\n let ?proceed = \"\\((t', ta'), s''). s' -t'\\ta'\\ s'' \\ ta_seq_consist P (?vs ttas') (llist_of \\ta'\\\\<^bsub>o\\<^esub>)\"\n let ?tta = \"fst (Eps ?proceed)\"\n let ?s' = \"snd (Eps ?proceed)\"\n\n from True obtain t' ta' s'' where red: \"s' -t'\\ta'\\ s''\" by blast\n then obtain ta'' s''' where \"s' -t'\\ta''\\ s'''\"\n and \"ta_seq_consist P (?vs ttas') (llist_of \\ta''\\\\<^bsub>o\\<^esub>)\"\n proof(cases)\n case (redT_normal x x' m')\n note red = `t' \\ \\x, shr s'\\ -ta'\\ \\x', m'\\`\n and ts''t' = `thr s' t' = \\(x, no_wait_locks)\\`\n and aok = `actions_ok s' t' ta'`\n and s''' = `redT_upd s' t' ta' x' m' s''`\n from sc_completionD[OF cau Red sc ts''t' red aok]\n obtain ta'' x'' m'' where red': \"t' \\ \\x, shr s'\\ -ta''\\ \\x'', m''\\\"\n and aok': \"actions_ok s' t' ta''\"\n and sc': \"ta_seq_consist P (?vs ttas') (llist_of \\ta''\\\\<^bsub>o\\<^esub>)\" by blast\n from redT_updWs_total obtain ws' where \"redT_updWs t' (wset s') \\ta''\\\\<^bsub>w\\<^esub> ws'\" ..\n then obtain s''' where \"redT_upd s' t' ta'' x'' m'' s'''\" by fastforce\n with red' ts''t' aok' have \"s' -t'\\ta''\\ s'''\" ..\n thus thesis using sc' by(rule that)\n next\n case redT_acquire\n thus thesis by(simp add: that[OF red] ta_seq_consist_convert_RA)\n qed\n hence \"?proceed ((t', ta''), s''')\" by auto\n hence \"?proceed (Eps ?proceed)\" by(rule someI)\n show ?thesis\n proof(cases \"obs = LNil\")\n case True thus ?thesis ..\n next\n case False\n from True\n have csc_unfold: \"complete_sc s' (?vs ttas') = LCons ?tta (complete_sc ?s' (?vs (ttas' @ [?tta])))\"\n unfolding complete_sc_def by(simp add: split_def)\n hence \"obs = lappend (llist_of \\snd ?tta\\\\<^bsub>o\\<^esub>) (?obs (complete_sc ?s' (?vs (ttas' @ [?tta]))))\"\n using obs_def by(simp add: split_beta)\n moreover have \"ta_seq_consist P vs' (llist_of \\snd ?tta\\\\<^bsub>o\\<^esub>)\"\n using `?proceed (Eps ?proceed)` vs'_def by(clarsimp simp add: split_beta)\n moreover {\n assume \"llist_of \\snd ?tta\\\\<^bsub>o\\<^esub> = LNil\"\n moreover from obs_def `obs \\ LNil`\n have \"lfinite (ltakeWhile (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub> = []) (complete_sc s' (?vs ttas')))\"\n unfolding lfinite_ltakeWhile by(fastforce simp add: split_def lconcat_eq_LNil)\n ultimately have \"(complete_sc ?s' (?vs (ttas' @ [?tta])), a) \\ ?R\"\n unfolding a_def vs'_def csc_unfold\n by(clarsimp simp add: split_def llist_of_eq_LNil_conv)(auto simp add: lfinite_eq_range_llist_of) }\n moreover have \"?obs (complete_sc ?s' (?vs (ttas' @ [?tta]))) = ?obs (complete_sc ?s' (mrw_values P vs' (list_of (llist_of \\snd ?tta\\\\<^bsub>o\\<^esub>))))\"\n unfolding vs'_def by(simp add: split_def)\n moreover from `?proceed (Eps ?proceed)` Red\n have \"s -\\ttas' @ [?tta]\\* ?s'\" by(auto simp add: RedT_def split_def intro: rtrancl3p_step)\n moreover from sc `?proceed (Eps ?proceed)`\n have \"ta_seq_consist P vs (llist_of (?ttas' (ttas' @ [?tta])))\"\n by(clarsimp simp add: split_def ta_seq_consist_lappend lappend_llist_of_llist_of[symmetric] simp del: lappend_llist_of_llist_of)\n moreover have \"mrw_values P vs' (list_of (llist_of \\snd ?tta\\\\<^bsub>o\\<^esub>)) = ?vs (ttas' @ [?tta])\" \n unfolding vs'_def by(simp add: split_def)\n moreover have \"complete_sc ?s' (?vs (ttas' @ [?tta])) = complete_sc ?s' (mrw_values P vs' (list_of (llist_of \\snd ?tta\\\\<^bsub>o\\<^esub>)))\"\n unfolding vs'_def by(simp add: split_def)\n ultimately have \"?lappend\" by blast\n thus ?thesis ..\n qed\n qed\n qed\nqed\n\nlemma sequential_completion_Runs:\n assumes \"sc_completion s vs\"\n and \"\\vs ln. ta_seq_consist P vs (llist_of (convert_RA ln))\"\n shows \"\\ttas. mthr.Runs s ttas \\ ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) ttas))\"\nusing complete_sc_ta_seq_consist[OF assms] complete_sc_in_Runs[OF assms]\nby blast\n\n\ndefinition cut_and_update :: \"('l, 'thread_id, 'x, 'm, 'w) state \\ ('addr \\ addr_loc \\ 'addr val \\ bool) \\ bool\"\nwhere\n \"cut_and_update s vs \\\n (\\ttas s' t x ta x' m'.\n s -\\ttas\\* s' \\ ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) \\\n thr s' t = \\(x, no_wait_locks)\\ \\ t \\ (x, shr s') -ta\\ (x', m') \\ actions_ok s' t ta \\ \n (\\ta' x'' m''. t \\ (x, shr s') -ta'\\ (x'', m'') \\ actions_ok s' t ta' \\\n ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>) \\\n eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))))\"\n\nlemma cut_and_updateI[intro?]:\n \"(\\ttas s' t x ta x' m'. \n \\ s -\\ttas\\* s'; ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)));\n thr s' t = \\(x, no_wait_locks)\\; t \\ (x, shr s') -ta\\ (x', m'); actions_ok s' t ta \\\n \\ \\ta' x'' m''. t \\ (x, shr s') -ta'\\ (x'', m'') \\ actions_ok s' t ta' \\ \n ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>) \\\n eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))))\n \\ cut_and_update s vs\"\nunfolding cut_and_update_def by blast\n\nlemma cut_and_updateD:\n \"\\ cut_and_update s vs; s -\\ttas\\* s'; ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)));\n thr s' t = \\(x, no_wait_locks)\\; t \\ (x, shr s') -ta\\ (x', m'); actions_ok s' t ta \\\n \\ \\ta' x'' m''. t \\ (x, shr s') -ta'\\ (x'', m'') \\ actions_ok s' t ta' \\ \n ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>) \\\n eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\nunfolding cut_and_update_def by blast\n\nlemma cut_and_update_imp_sc_completion:\n \"cut_and_update s vs \\ sc_completion s vs\"\napply(rule sc_completionI)\napply(drule (5) cut_and_updateD)\napply blast\ndone\n\nlemma sequential_completion:\n assumes cut_and_update: \"cut_and_update s vs\"\n and ta_seq_consist_convert_RA: \"\\vs ln. ta_seq_consist P vs (llist_of (convert_RA ln))\"\n and Red: \"s -\\ttas\\* s'\"\n and sc: \"ta_seq_consist P vs (llist_of (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\n and red: \"s' -t\\ta\\ s''\"\n shows\n \"\\ta' ttas'. mthr.Runs s' (LCons (t, ta') ttas') \\ \n ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (lappend (llist_of ttas) (LCons (t, ta') ttas')))) \\ \n eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\nproof -\n from red obtain ta' s''' \n where red': \"redT s' (t, ta') s'''\"\n and sc': \"ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (lappend (llist_of ttas) (LCons (t, ta') LNil))))\"\n and eq: \"eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\n proof cases\n case (redT_normal x x' m')\n note ts't = `thr s' t = \\(x, no_wait_locks)\\`\n and red = `t \\ \\x, shr s'\\ -ta\\ \\x', m'\\`\n and aok = `actions_ok s' t ta`\n and s'' = `redT_upd s' t ta x' m' s''`\n from cut_and_updateD[OF cut_and_update, OF Red sc ts't red aok]\n obtain ta' x'' m'' where red: \"t \\ \\x, shr s'\\ -ta'\\ \\x'', m''\\\"\n and sc': \"ta_seq_consist P (mrw_values P vs (concat (map (\\(t, y). \\y\\\\<^bsub>o\\<^esub>) ttas))) (llist_of \\ta'\\\\<^bsub>o\\<^esub>)\"\n and eq: \"eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta'\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\n and aok: \"actions_ok s' t ta'\" by blast\n obtain ws''' where \"redT_updWs t (wset s') \\ta'\\\\<^bsub>w\\<^esub> ws'''\"\n using redT_updWs_total ..\n then obtain s''' where s''': \"redT_upd s' t ta' x'' m'' s'''\" by fastforce\n with red `thr s' t = \\(x, no_wait_locks)\\` aok have \"s' -t\\ta'\\ s'''\" by(rule redT.redT_normal)\n moreover from sc sc'\n have \"ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (lappend (llist_of ttas) (LCons (t, ta') LNil))))\"\n by(auto simp add: lmap_lappend_distrib ta_seq_consist_lappend split_def lconcat_llist_of[symmetric] o_def list_of_lconcat)\n ultimately show thesis using eq by(rule that)\n next\n case (redT_acquire x ln n)\n hence \"ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (lappend (llist_of ttas) (LCons (t, ta) LNil))))\"\n and \"eq_upto_seq_inconsist P \\ta\\\\<^bsub>o\\<^esub> \\ta\\\\<^bsub>o\\<^esub> (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) ttas)))\"\n using sc\n by(simp_all add: lmap_lappend_distrib ta_seq_consist_lappend split_def lconcat_llist_of[symmetric] o_def list_of_lconcat ta_seq_consist_convert_RA ta_seq_consist_imp_eq_upto_seq_inconsist_refl)\n with red show thesis by(rule that)\n qed\n\n txt {* Now, find a sequentially consistent completion from @{term \"s'''\"} onwards. *}\n from Red red' have Red': \"s -\\ttas @ [(t, ta')]\\* s'''\"\n unfolding RedT_def by(auto intro: rtrancl3p_step)\n\n from sc sc'\n have \"ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (llist_of (ttas @ [(t, ta')]))))\"\n by(simp add: o_def split_def lappend_llist_of_llist_of[symmetric])\n with cut_and_update_imp_sc_completion[OF cut_and_update] Red'\n have \"sc_completion s''' (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) (ttas @ [(t, ta')]))))\"\n by(rule sc_completion_shift)\n from sequential_completion_Runs[OF this ta_seq_consist_convert_RA]\n obtain ttas' where \\Runs: \"mthr.Runs s''' ttas'\"\n and sc'': \"ta_seq_consist P (mrw_values P vs (concat (map (\\(t, ta). \\ta\\\\<^bsub>o\\<^esub>) (ttas @ [(t, ta')])))) \n (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) ttas'))\"\n by blast\n from red' \\Runs have \"mthr.Runs s' (LCons (t, ta') ttas')\" ..\n moreover from sc sc' sc''\n have \"ta_seq_consist P vs (lconcat (lmap (\\(t, ta). llist_of \\ta\\\\<^bsub>o\\<^esub>) (lappend (llist_of ttas) (LCons (t, ta') ttas'))))\"\n unfolding lmap_lappend_distrib lconcat_lappend by(simp add: o_def ta_seq_consist_lappend split_def list_of_lconcat)\n ultimately show ?thesis using eq by blast\nqed\n\nend\n\nend", "meta": {"author": "Josh-Tilles", "repo": "AFP", "sha": "f4bf1d502bde2a3469d482b62c531f1c3af3e881", "save_path": "github-repos/isabelle/Josh-Tilles-AFP", "path": "github-repos/isabelle/Josh-Tilles-AFP/AFP-f4bf1d502bde2a3469d482b62c531f1c3af3e881/thys/JinjaThreads/MM/SC_Completion.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.27202455109402257, "lm_q1q2_score": 0.1381372944207693}} {"text": "(* Title: JinjaThreads/BV/TF_JVM.thy\n Author: Tobias Nipkow, Gerwin Klein, Andreas Lochbihler\n*)\n\nsection \\The Typing Framework for the JVM \\label{sec:JVM}\\\n\ntheory TF_JVM\nimports\n \"../DFA/Typing_Framework_err\" \n EffectMono \n BVSpec\n \"../Common/ExternalCallWF\"\nbegin\n\ndefinition exec :: \"'addr jvm_prog \\ nat \\ ty \\ ex_table \\ 'addr instr list \\ ty\\<^sub>i' err step_type\"\nwhere\n \"exec G maxs rT et bs \\\n err_step (size bs) (\\pc. app (bs!pc) G maxs rT pc (size bs) et) (\\pc. eff (bs!pc) G pc et)\"\n\nlocale JVM_sl =\n fixes P :: \"'addr jvm_prog\" and mxs and mxl\\<^sub>0\n fixes Ts :: \"ty list\" and \"is\" :: \"'addr instr list\" and xt and T\\<^sub>r\n\n fixes mxl and A and r and f and app and eff and step\n defines [simp]: \"mxl \\ 1+size Ts+mxl\\<^sub>0\"\n defines [simp]: \"A \\ states P mxs mxl\"\n defines [simp]: \"r \\ JVM_SemiType.le P mxs mxl\"\n defines [simp]: \"f \\ JVM_SemiType.sup P mxs mxl\"\n\n defines [simp]: \"app \\ \\pc. Effect.app (is!pc) P mxs T\\<^sub>r pc (size is) xt\"\n defines [simp]: \"eff \\ \\pc. Effect.eff (is!pc) P pc xt\"\n defines [simp]: \"step \\ err_step (size is) app eff\"\n\n\nlocale start_context = JVM_sl +\n fixes p and C\n assumes wf: \"wf_prog p P\"\n assumes C: \"is_class P C\"\n assumes Ts: \"set Ts \\ types P\"\n\n fixes first :: ty\\<^sub>i' and start\n defines [simp]: \n \"first \\ Some ([],OK (Class C) # map OK Ts @ replicate mxl\\<^sub>0 Err)\"\n defines [simp]:\n \"start \\ OK first # replicate (size is - 1) (OK None)\"\n\n\nsubsection \\Connecting JVM and Framework\\\n\nlemma (in JVM_sl) step_def_exec: \"step \\ exec P mxs T\\<^sub>r xt is\" \n by (simp add: exec_def) \n\nlemma special_ex_swap_\n\nlemma ex_in_list [iff]:\n \"(\\n. ST \\ list n A \\ n \\ mxs) = (set ST \\ A \\ size ST \\ mxs)\"\n by (unfold list_def) auto\n\nlemma singleton_list: \n \"(\\n. [Class C] \\ list n (types P) \\ n \\ mxs) = (is_class P C \\ 0 < mxs)\"\n by(auto)\n\nlemma set_drop_subset:\n \"set xs \\ A \\ set (drop n xs) \\ A\"\n by (auto dest: in_set_dropD)\n\nlemma Suc_minus_minus_le:\n \"n < mxs \\ Suc (n - (n - b)) \\ mxs\"\n by arith\n\nlemma in_listE:\n \"\\ xs \\ list n A; \\size xs = n; set xs \\ A\\ \\ P \\ \\ P\"\n by (unfold list_def) blast\n\ndeclare is_relevant_entry_def [simp]\ndeclare set_drop_subset [simp]\n\nlemma (in start_context) [simp, intro!]: \"is_class P Throwable\"\napply(rule converse_subcls_is_class[OF wf])\n apply(rule xcpt_subcls_Throwable[OF _ wf])\n prefer 2\n apply(rule is_class_xcpt[OF _ wf])\napply(fastforce simp add: sys_xcpts_def sys_xcpts_list_def)+\ndone\n\ndeclare option.splits[split del]\ndeclare option.case_cong[cong]\ndeclare is_type_array [simp del]\n\ntheorem (in start_context) exec_pres_type:\n \"pres_type step (size is) A\"\n(*<*)\n apply (insert wf)\n apply simp\n apply (unfold JVM_states_unfold)\n apply (rule pres_type_lift)\n apply clarify\n apply (rename_tac s pc pc' s')\n apply (case_tac s)\n apply simp\n apply (drule effNone)\n apply simp \n apply (simp add: Effect.app_def xcpt_app_def Effect.eff_def \n xcpt_eff_def norm_eff_def relevant_entries_def)\n apply (case_tac \"is!pc\")\n\n subgoal \\ \\Load\\\n apply(clarsimp split: option.splits)\n apply (frule listE_nth_in, assumption)\n apply(fastforce split: option.splits)\n done\n\n subgoal \\ \\Store\\\n apply clarsimp\n apply(erule disjE)\n apply clarsimp\n apply(fastforce split: option.splits)\n done\n\n subgoal \\ \\Push\\\n by(fastforce simp add: typeof_lit_is_type split: option.splits)\n\n subgoal \\ \\New\\\n apply (clarsimp)\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp)\n apply(rule conjI)\n apply(force split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\NewArray\\\n apply clarsimp\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp)\n apply (erule allE)+\n apply(erule impE, blast)\n apply(force split: option.splits)\n done\n\n subgoal \\ \\ALoad\\\n apply(clarsimp split: if_split_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce dest: is_type_ArrayD)\n apply(clarsimp)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n done\n\n subgoal \\ \\AStore\\\n apply(clarsimp split: if_split_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n done\n\n subgoal \\ \\ALength\\\n apply(clarsimp split: if_split_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n done\n\n subgoal \\ \\Getfield\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce dest: sees_field_is_type)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\Putfield\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\CAS\\\n apply clarsimp\n apply(erule disjE)\n apply fastforce\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\Checkcast\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\Instanceof\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal for \\ the_s M n\n apply (clarsimp split: if_split_asm)\n apply(rule conjI)\n apply(fastforce split!: option.splits)\n apply fastforce\n apply(erule disjE)\n apply clarsimp\n apply(rule conjI)\n apply(drule (1) sees_wf_mdecl)\n apply(clarsimp simp add: wf_mdecl_def)\n apply(arith)\n apply(clarsimp)\n apply(erule allE)+\n apply(rotate_tac -2)\n apply(erule impE, blast)\n apply(clarsimp split: option.splits)\n done\n \n subgoal \\ \\Return\\\n by(fastforce split: option.splits)\n\n subgoal \\ \\Pop\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\Dup\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\Swap\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\BinOpInstr\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce intro: WTrt_binop_is_type)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n \n subgoal \\ \\Goto\\\n by(fastforce split: option.splits)\n\n subgoal \\ \\IfFalse\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply(erule disjE)\n apply fastforce\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\ThrowExc\\\n apply(clarsimp)\n apply(rule conjI)\n apply(erule allE)+\n apply(erule impE, blast)\n apply(clarsimp split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\MEnter\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n\n subgoal \\ \\MExit\\\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n done\n done\n(*>*)\n\ndeclare option.case_cong_weak[cong]\ndeclare option.splits[split]\ndeclare is_type_array[simp]\n\ndeclare is_relevant_entry_def [simp del]\ndeclare set_drop_subset [simp del]\n\nlemma lesubstep_type_simple:\n \"xs [\\\\<^bsub>Product.le (=) r\\<^esub>] ys \\ set xs {\\\\<^bsub>r\\<^esub>} set ys\"\n(*<*)\n apply (unfold lesubstep_type_def)\n apply clarify\n apply (simp add: set_conv_nth)\n apply clarify\n apply (drule le_listD, assumption)\n apply (clarsimp simp add: lesub_def Product.le_def)\n apply (rule exI)\n apply (rule conjI)\n apply (rule exI)\n apply (rule conjI)\n apply (rule sym)\n apply assumption\n apply assumption\n apply assumption\n done\n(*>*)\n\ndeclare is_relevant_entry_def [simp del]\n\n\nlemma conjI2: \"\\ A; A \\ B \\ \\ A \\ B\" by blast\n \nlemma (in JVM_sl) eff_mono:\n \"\\wf_prog p P; pc < length is; s \\\\<^bsub>sup_state_opt P\\<^esub> t; app pc t\\\n \\ set (eff pc s) {\\\\<^bsub>sup_state_opt P\\<^esub>} set (eff pc t)\"\n(*<*)\n apply simp\n apply (unfold Effect.eff_def) \n apply (cases t)\n apply (simp add: lesub_def)\n apply (rename_tac a)\n apply (cases s)\n apply simp\n apply (rename_tac b)\n apply simp\n apply (rule lesubstep_union)\n prefer 2\n apply (rule lesubstep_type_simple)\n apply (simp add: xcpt_eff_def)\n apply (rule le_listI)\n apply (simp add: split_beta)\n apply (simp add: split_beta)\n apply (simp add: lesub_def fun_of_def)\n apply (case_tac a)\n apply (case_tac b)\n apply simp \n apply (subgoal_tac \"size ab = size aa\")\n prefer 2\n apply (clarsimp simp add: list_all2_lengthD)\n apply simp\n apply (clarsimp simp add: norm_eff_def lesubstep_type_def lesub_def iff del: sup_state_conv)\n apply (rule exI)\n apply (rule conjI2)\n apply (rule imageI)\n apply (clarsimp simp add: Effect.app_def iff del: sup_state_conv)\n apply (drule (2) succs_mono)\n apply blast\n apply simp\n apply (erule eff\\<^sub>i_mono)\n apply simp\n apply assumption \n apply clarsimp\n apply clarsimp \n done\n(*>*)\n\nlemma (in JVM_sl) bounded_step: \"bounded step (size is)\"\n(*<*)\n apply simp\n apply (unfold bounded_def err_step_def Effect.app_def Effect.eff_def)\n apply (auto simp add: error_def map_snd_def split: err.splits option.splits)\n done\n(*>*)\n\ntheorem (in JVM_sl) step_mono:\n \"wf_prog wf_mb P \\ mono r step (size is) A\"\n(*<*)\n apply (simp add: JVM_le_Err_conv) \n apply (insert bounded_step)\n apply (unfold JVM_states_unfold)\n apply (rule mono_lift)\n apply blast\n apply (unfold app_mono_def lesub_def)\n apply clarsimp\n apply (erule (2) app_mono)\n apply simp\n apply clarify\n apply (drule eff_mono)\n apply (auto simp add: lesub_def)\n done\n(*>*)\n\n\nlemma (in start_context) first_in_A [iff]: \"OK first \\ A\"\n using Ts C by (force intro!: list_appendI simp add: JVM_states_unfold)\n\n\nlemma (in JVM_sl) wt_method_def2:\n \"wt_method P C' Ts T\\<^sub>r mxs mxl\\<^sub>0 is xt \\s =\n (is \\ [] \\ \n size \\s = size is \\\n OK ` set \\s \\ states P mxs mxl \\\n wt_start P C' Ts mxl\\<^sub>0 \\s \\ \n wt_app_eff (sup_state_opt P) app eff \\s)\"\n(*<*)\n apply (unfold wt_method_def wt_app_eff_def wt_instr_def lesub_def check_types_def)\n apply auto\n done\n(*>*)\n\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/JinjaThreads/BV/TF_JVM.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5156199157230156, "lm_q2_score": 0.2658804672827599, "lm_q1q2_score": 0.13709326413273265}} {"text": "(* Title: JinjaThreads/MM/JMM_Interp.thy\n Author: Andreas Lochbihler\n\n Interpret the language specific heap locales with the Java memory model\n*)\n\ntheory JMM_Interp imports\n JMM_Compiler\n \"../J/Deadlocked\"\n \"../BV/JVMDeadlocked\"\n JMM_Type2\n DRF_J\n DRF_JVM\nbegin\n\nlemma jmm'_J_typesafe:\n \"J_typesafe addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\nby unfold_locales\n\nlemma jmm'_JVM_typesafe:\n \"JVM_typesafe addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\nby unfold_locales\n\nlemma jmm_typeof_addr_compP [simp]:\n \"jmm_typeof_addr (compP f P) = jmm_typeof_addr P\"\nby(simp add: jmm_typeof_addr_def fun_eq_iff)\n\nlemma compP2_compP1_convs:\n \"is_type (compP2 (compP1 P)) = is_type P\"\n \"is_class (compP2 (compP1 P)) = is_class P\"\n \"jmm'_addr_loc_type (compP2 (compP1 P)) = jmm'_addr_loc_type P\"\n \"jmm'_conf (compP2 (compP1 P)) = jmm'_conf P\"\nby(simp_all add: compP2_def heap_base.compP_conf heap_base.compP_addr_loc_type fun_eq_iff split: addr_loc.splits)\n\nlemma jmm'_J_JVM_conf_read:\n \"J_JVM_conf_read addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf P\"\napply(rule J_JVM_conf_read.intro)\napply(rule J1_JVM_conf_read.intro)\napply(rule JVM_conf_read.intro)\n prefer 2\n apply(rule JVM_heap_conf.intro)\n apply(rule JVM_heap_conf_base'.intro)\n apply(unfold compP2_def compP1_def compP_heap compP_heap_conf compP_heap_conf_read jmm_typeof_addr_compP)\n apply unfold_locales\ndone\n\nlemma jmm_J_allocated_progress:\n \"J_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) jmm_heap_read jmm_heap_write jmm_hconf jmm_allocated P\"\nby unfold_locales\n\nlemma jmm'_J_allocated_progress:\n \"J_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf jmm_allocated P\"\nby(unfold_locales)\n\nlemma jmm_JVM_allocated_progress:\n \"JVM_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) jmm_heap_read jmm_heap_write jmm_hconf jmm_allocated P\"\nby unfold_locales\n\nlemma jmm'_JVM_allocated_progress:\n \"JVM_allocated_progress addr2thread_id thread_id2addr jmm_empty jmm_allocate (jmm_typeof_addr P) (jmm_heap_read_typed P) jmm_heap_write jmm_hconf jmm_allocated P\"\nby(unfold_locales)\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/JinjaThreads/MM/JMM_Interp.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.2689414213699951, "lm_q1q2_score": 0.13657164456779627}} {"text": "(* Title: variants/a_norreqid/Aodv_Message.thy\n License: BSD 2-Clause. See LICENSE.\n Author: Timothy Bourke, Inria\n Author: Peter Höfner, NICTA\n*)\n\nsection \"AODV protocol messages\"\n\ntheory A_Aodv_Message\nimports A_Norreqid\nbegin\n\ndatatype msg =\n Rreq nat ip sqn k ip sqn ip\n | Rrep nat ip sqn ip ip\n | Rerr \"ip \\ sqn\" ip\n | Newpkt data ip\n | Pkt data ip ip\n\ninstantiation msg :: msg\nbegin\n definition newpkt_def [simp]: \"newpkt \\ \\(d, dip). Newpkt d dip\"\n definition eq_newpkt_def: \"eq_newpkt m \\ case m of Newpkt d dip \\ True | _ \\ False\"\n\n instance by intro_classes (simp add: eq_newpkt_def) \nend\n \ntext \\The @{type msg} type models the different messages used within AODV.\n The instantiation as a @{class msg} is a technicality due to the special\n treatment of @{term newpkt} messages in the AWN SOS rules.\n This use of classes allows a clean separation of the AWN-specific definitions\n and these AODV-specific definitions.\\\n\ndefinition rreq :: \"nat \\ ip \\ sqn \\ k \\ ip \\ sqn \\ ip \\ msg\"\n where \"rreq \\ \\(hops, dip, dsn, dsk, oip, osn, sip).\n Rreq hops dip dsn dsk oip osn sip\"\n\nlemma rreq_simp [simp]:\n \"rreq(hops, dip, dsn, dsk, oip, osn, sip) = Rreq hops dip dsn dsk oip osn sip\"\n unfolding rreq_def by simp\n\ndefinition rrep :: \"nat \\ ip \\ sqn \\ ip \\ ip \\ msg\"\n where \"rrep \\ \\(hops, dip, dsn, oip, sip). Rrep hops dip dsn oip sip\"\n\nlemma rrep_simp [simp]:\n \"rrep(hops, dip, dsn, oip, sip) = Rrep hops dip dsn oip sip\"\n unfolding rrep_def by simp\n\ndefinition rerr :: \"(ip \\ sqn) \\ ip \\ msg\"\n where \"rerr \\ \\(dests, sip). Rerr dests sip\"\n\nlemma rerr_simp [simp]:\n \"rerr(dests, sip) = Rerr dests sip\"\n unfolding rerr_def by simp\n\nlemma not_eq_newpkt_rreq [simp]: \"\\eq_newpkt (Rreq hops dip dsn dsk oip osn sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_rrep [simp]: \"\\eq_newpkt (Rrep hops dip dsn oip sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_rerr [simp]: \"\\eq_newpkt (Rerr dests sip)\"\n unfolding eq_newpkt_def by simp\n\nlemma not_eq_newpkt_pkt [simp]: \"\\eq_newpkt (Pkt d dip sip)\"\n unfolding eq_newpkt_def by simp\n\ndefinition pkt :: \"data \\ ip \\ ip \\ msg\"\n where \"pkt \\ \\(d, dip, sip). Pkt d dip sip\"\n\nlemma pkt_simp [simp]:\n \"pkt(d, dip, sip) = Pkt d dip sip\"\n unfolding pkt_def by simp\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/AODV/variants/a_norreqid/A_Aodv_Message.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5234203489363239, "lm_q2_score": 0.2598256494239272, "lm_q1q2_score": 0.13599803208407896}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchLevityCatch_AI\nimports\n \"ArchBCorres_AI\"\n \"Lib.LemmaBucket\"\n \"Lib.SplitRule\"\nbegin\n\ncontext Arch begin global_naming ARM_HYP\n\nlemma asid_high_bits_of_shift :\n \"asid_high_bits_of (ucast x << asid_low_bits) = x\"\n apply (simp add: asid_high_bits_of_def)\n apply (rule word_eqI)\n apply (simp add: word_size nth_ucast nth_shiftr nth_shiftl asid_low_bits_def)\n done\n\nlemma ptrFormPAddr_addFromPPtr :\n \"ptrFromPAddr (Platform.ARM_HYP.addrFromPPtr x) = x\"\n by (simp add: ptrFromPAddr_def Platform.ARM_HYP.addrFromPPtr_def)\n\n(****** From GeneralLib *******)\n\nlemma asid_high_bits_of_add_ucast:\n \"is_aligned w asid_low_bits \\\n asid_high_bits_of (ucast (x::10 word) + w) = asid_high_bits_of w\"\n apply (rule word_eqI)\n apply (simp add: word_size asid_high_bits_of_def is_aligned_nth)\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply clarsimp\n apply (drule test_bit_size)\n apply (simp add: asid_low_bits_def)\n apply (auto dest: test_bit_size simp: word_size asid_low_bits_def)\n done\n\nlemma asid_high_bits_of_add:\n \"\\is_aligned w asid_low_bits; x \\ 2 ^ asid_low_bits - 1\\\n \\ asid_high_bits_of (w + x) = asid_high_bits_of w\"\n apply (rule word_eqI)\n apply (simp add: word_size asid_high_bits_of_def is_aligned_nth)\n apply (drule le2p_bits_unset_32, simp add: asid_low_bits_def)\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size)\n apply (case_tac \"na < asid_low_bits\")\n apply (simp add: asid_low_bits_def linorder_not_less word_bits_def)\n apply (auto dest: test_bit_size\n simp: asid_low_bits_def word_bits_def)\n done\n\nlemma pageBits_less_word_bits [simp]:\n \"pageBits < word_bits\" by (simp add: pageBits_def word_bits_conv)\n\nlemma aobj_ref_arch_cap[simp]:\n \"aobj_ref (arch_default_cap aty ptr us dev) = Some ptr\"\n apply (case_tac aty)\n apply (simp_all add: aobj_ref_def arch_default_cap_def p_assoc_help)\n done\n\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/ARM_HYP/ArchLevityCatch_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.523420348936324, "lm_q2_score": 0.2598256322295121, "lm_q1q2_score": 0.13599802308417222}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchLevityCatch_AI\nimports\n \"ArchBCorres_AI\"\n \"Lib.LemmaBucket\"\n \"Lib.SplitRule\"\nbegin\n\ncontext Arch begin global_naming ARM\n\nlemma asid_high_bits_of_shift :\n \"asid_high_bits_of (ucast x << asid_low_bits) = x\"\n apply (simp add: asid_high_bits_of_def)\n apply (rule word_eqI)\n apply (simp add: word_size nth_ucast nth_shiftr nth_shiftl asid_low_bits_def)\n done\n\nlemma ptrFormPAddr_addFromPPtr :\n \"ptrFromPAddr (Platform.ARM.addrFromPPtr x) = x\"\n by (simp add: ptrFromPAddr_def Platform.ARM.addrFromPPtr_def)\n\n(****** From GeneralLib *******)\n\nlemma asid_high_bits_of_add_ucast:\n \"is_aligned w asid_low_bits \\\n asid_high_bits_of (ucast (x::10 word) + w) = asid_high_bits_of w\"\n apply (rule word_eqI)\n apply (simp add: word_size asid_high_bits_of_def is_aligned_nth)\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply clarsimp\n apply (drule test_bit_size)\n apply (simp add: asid_low_bits_def)\n apply (auto dest: test_bit_size simp: word_size asid_low_bits_def)\n done\n\nlemma asid_high_bits_of_add:\n \"\\is_aligned w asid_low_bits; x \\ 2 ^ asid_low_bits - 1\\\n \\ asid_high_bits_of (w + x) = asid_high_bits_of w\"\n apply (rule word_eqI)\n apply (simp add: word_size asid_high_bits_of_def is_aligned_nth)\n apply (drule le2p_bits_unset_32, simp add: asid_low_bits_def)\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size)\n apply (case_tac \"na < asid_low_bits\")\n apply (simp add: asid_low_bits_def linorder_not_less word_bits_def)\n apply (auto dest: test_bit_size\n simp: asid_low_bits_def word_bits_def)\n done\n\nlemma pageBits_less_word_bits [simp]:\n \"pageBits < word_bits\" by (simp add: pageBits_def word_bits_conv)\n\nlemma aobj_ref_arch_cap[simp]:\n \"aobj_ref (arch_default_cap aty ptr us dev) = Some ptr\"\n apply (case_tac aty)\n apply (simp_all add: aobj_ref_def arch_default_cap_def p_assoc_help)\n done\n\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/ARM/ArchLevityCatch_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.519521321952093, "lm_q2_score": 0.2598256264980406, "lm_q1q2_score": 0.1349849529552928}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\nX64-specific VSpace invariants\n*)\n\ntheory ArchVSpace_AI\nimports VSpacePre_AI\nbegin\n\ncontext Arch begin global_naming X64\n\n(* FIXME: should go in Machine_AI, but needs dmo_invs from KHeap_AI. *)\nlemmas machine_op_lift_irq_masks = no_irq[OF no_irq_machine_op_lift]\n\nlemma machine_op_lift_underlying_memory:\n \"\\\\m'. underlying_memory m' p = um\\ machine_op_lift m \\\\_ m'. underlying_memory m' p = um\\\"\n by (wpsimp simp: machine_op_lift_def machine_rest_lift_def split_def)\n\nlemma do_machine_op_lift_invs:\n \"\\invs\\ do_machine_op (machine_op_lift m) \\\\_. invs\\\"\n apply (wp dmo_invs)\n apply safe\n apply (drule use_valid[OF _ machine_op_lift_underlying_memory]; fastforce)\n apply (erule (1) use_valid[OF _ machine_op_lift_irq_masks])\n done\n\nabbreviation \"canonicalise x \\ (scast ((ucast x) :: 48 word)) :: 64 word\"\n\nlemma pptr_base_shift_cast_le:\n fixes x :: \"9 word\"\n shows \"((pptr_base >> pml4_shift_bits) && mask ptTranslationBits \\ ucast x) =\n (ucast (pptr_base >> pml4_shift_bits) \\ x)\"\n apply (subgoal_tac \"((pptr_base >> pml4_shift_bits) && mask ptTranslationBits) = ucast (ucast (pptr_base >> pml4_shift_bits) :: 9 word)\")\n prefer 2\n apply (simp add: ucast_ucast_mask ptTranslationBits_def)\n apply (simp add: ucast_le_ucast)\n done\n\n(* FIXME: move to Invariant_AI *)\ndefinition\n glob_vs_refs_arch :: \"arch_kernel_obj \\ (vs_ref \\ obj_ref) set\"\n where \"glob_vs_refs_arch \\ \\ko. case ko of\n ASIDPool pool \\\n (\\(r,p). (VSRef (ucast r) (Some AASIDPool), p)) ` graph_of pool\n | PageMapL4 pm \\\n (\\(r,p). (VSRef (ucast r) (Some APageMapL4), p)) ` graph_of (pml4e_ref \\ pm)\n | PDPointerTable pdpt \\\n (\\(r,p). (VSRef (ucast r) (Some APDPointerTable), p)) ` graph_of (pdpte_ref \\ pdpt)\n | PageDirectory pd \\\n (\\(r,p). (VSRef (ucast r) (Some APageDirectory), p)) ` graph_of (pde_ref \\ pd)\n | _ \\ {}\"\n\ndeclare glob_vs_refs_arch_def[simp]\n\ndefinition\n \"glob_vs_refs \\ arch_obj_fun_lift glob_vs_refs_arch {}\"\n\ncrunch pspace_in_kernel_window[wp]: unmap_page, perform_page_invocation \"pspace_in_kernel_window\"\n (simp: crunch_simps wp: crunch_wps)\n\ncrunch inv[wp]: find_vspace_for_asid_assert \"P\"\n (simp: crunch_simps wp: crunch_wps)\n\nlemma asid_word_bits [simp]: \"asid_bits < word_bits\"\n by (simp add: asid_bits_def word_bits_def)\n\n\nlemma asid_low_high_bits:\n \"\\ asid_low_bits_of x = asid_low_bits_of y;\n ucast (asid_high_bits_of x) = (ucast (asid_high_bits_of y)::machine_word);\n asid_wf x; asid_wf y \\\n \\ x = y\"\n apply (rule word_eqI)\n apply (simp add: upper_bits_unset_is_l2p_64[symmetric] bang_eq nth_ucast word_size asid_wf_def)\n apply (clarsimp simp: asid_bits_of_defs nth_ucast nth_shiftr)\n apply (simp add: asid_high_bits_def asid_bits_def asid_low_bits_def word_bits_def)\n subgoal premises prems[rule_format] for n\n apply (cases \"n < asid_low_bits\")\n using prems(1)\n apply (fastforce simp: asid_bits_defs)\n apply (cases \"n < asid_bits\")\n using prems(2)[where n=\"n - asid_low_bits\"]\n apply (fastforce simp: asid_bits_defs)\n using prems(3-)\n by (simp add: linorder_not_less asid_bits_defs)\n done\n\nlemma asid_low_high_bits':\n \"\\ asid_low_bits_of x = asid_low_bits_of y;\n asid_high_bits_of x = asid_high_bits_of y;\n asid_wf x; asid_wf y \\\n \\ x = y\"\n by (rule asid_low_high_bits; (assumption|word_eqI_solve simp: asid_low_bits_def)?)\n\nlemma is_aligned_asid_low_bits_of_zero:\n \"is_aligned asid asid_low_bits \\ asid_low_bits_of asid = 0\"\n apply (simp add: is_aligned_mask word_eq_iff word_size asid_bits_defs asid_bits_of_defs nth_ucast)\n apply (intro iffI allI; drule_tac x=n in spec; fastforce)\n done\n\nlemma table_cap_ref_at_eq:\n \"table_cap_ref c = Some [x] \\ vs_cap_ref c = Some [x]\"\n by (auto simp: table_cap_ref_def vs_cap_ref_simps vs_cap_ref_def\n split: cap.splits arch_cap.splits vmpage_size.splits option.splits)\n\nlemma table_cap_ref_ap_eq:\n \"table_cap_ref c = Some [x,y] \\ vs_cap_ref c = Some [x,y]\"\n by (auto simp: table_cap_ref_def vs_cap_ref_simps vs_cap_ref_def\n split: cap.splits arch_cap.splits vmpage_size.splits option.splits)\n\nlemma vspace_at_asid_unique:\n \"\\ vspace_at_asid asid pm s; vspace_at_asid asid' pm s;\n unique_table_refs (caps_of_state s);\n valid_vs_lookup s; valid_vspace_objs s; valid_global_objs s;\n valid_arch_state s; asid_wf asid; asid_wf asid' \\\n \\ asid = asid'\"\n apply (clarsimp simp: vspace_at_asid_def)\n apply (drule(1) valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI])+\n apply (clarsimp simp: table_cap_ref_ap_eq[symmetric])\n apply (clarsimp simp: table_cap_ref_def\n split: cap.split_asm arch_cap.split_asm option.split_asm)\n apply (drule(2) unique_table_refsD,\n simp+, clarsimp simp: table_cap_ref_def,\n erule(1) asid_low_high_bits)\n apply simp+\n done\n\nlemma vspace_at_asid_unique2:\n \"\\ vspace_at_asid asid pm s; vspace_at_asid asid pm' s \\\n \\ pm = pm'\"\n apply (clarsimp simp: vspace_at_asid_def vs_asid_refs_def\n dest!: graph_ofD vs_lookup_2ConsD vs_lookup_atD\n vs_lookup1D)\n apply (clarsimp simp: obj_at_def vs_refs_def\n split: kernel_object.splits\n arch_kernel_obj.splits\n dest!: graph_ofD)\n done\n\n\nlemma valid_vs_lookupE:\n \"\\ valid_vs_lookup s; \\ref p. (ref \\ p) s' \\ (ref \\ p) s;\n set (x64_global_pdpts (arch_state s)) \\ set (x64_global_pdpts (arch_state s'));\n caps_of_state s = caps_of_state s' \\\n \\ valid_vs_lookup s'\"\n by (simp add: valid_vs_lookup_def, blast)\n\n\nlemma dmo_vspace_at_asid [wp]:\n \"\\vspace_at_asid a pd\\ do_machine_op f \\\\_. vspace_at_asid a pd\\\"\n apply (simp add: do_machine_op_def split_def)\n apply wp\n apply (simp add: vspace_at_asid_def)\n done\n\nlemma find_vspace_for_asid_vspace_at_asid [wp]:\n \"\\\\\\ find_vspace_for_asid asid \\\\pd. vspace_at_asid asid pd\\, -\"\n apply (simp add: find_vspace_for_asid_def assertE_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp|wpc)+\n apply (clarsimp simp: vspace_at_asid_def)\n apply (rule vs_lookupI)\n apply (simp add: vs_asid_refs_def graph_of_def)\n apply fastforce\n apply (rule r_into_rtrancl)\n apply (erule vs_lookup1I)\n prefer 2\n apply (rule refl)\n apply (simp add: vs_refs_def graph_of_def asid_bits_of_defs)\n apply fastforce\n done\n\ncrunch valid_vs_lookup[wp]: do_machine_op \"valid_vs_lookup\"\n\n\nlemma invalidateTLB_underlying_memory:\n \"\\\\m'. underlying_memory m' p = um\\\n invalidateTLB\n \\\\_ m'. underlying_memory m' p = um\\\"\n by (simp add: invalidateTLB_def machine_op_lift_underlying_memory)\n\n\nlemma vspace_at_asid_arch_up':\n \"x64_asid_table (f (arch_state s)) = x64_asid_table (arch_state s)\n \\ vspace_at_asid asid pml4 (arch_state_update f s) = vspace_at_asid asid pml4 s\"\n by (clarsimp simp add: vspace_at_asid_def vs_lookup_def vs_lookup1_def)\n\n\nlemmas ackInterrupt_irq_masks = no_irq[OF no_irq_ackInterrupt]\n\n\nlemma ucast_ucast_low_bits:\n fixes x :: machine_word\n shows \"x \\ 2^asid_low_bits - 1 \\ ucast (ucast x:: 9 word) = x\"\n apply (simp add: ucast_ucast_mask)\n apply (rule less_mask_eq)\n apply (subst (asm) word_less_sub_le)\n apply (simp add: asid_low_bits_def word_bits_def)\n apply (simp add: asid_low_bits_def)\n done\n\n\nlemma asid_high_bits_of_or:\n \"x \\ 2^asid_low_bits - 1 \\ asid_high_bits_of (base || x) = asid_high_bits_of base\"\n apply (rule word_eqI)\n apply (drule le_2p_upper_bits)\n apply (simp add: asid_low_bits_def word_bits_def)\n apply (simp add: asid_high_bits_of_def word_size nth_ucast nth_shiftr asid_low_bits_def word_bits_def)\n done\n\n\nlemma vs_lookup_clear_asid_table:\n \"(rf \\ p) (s\\arch_state := arch_state s\n \\x64_asid_table := (x64_asid_table (arch_state s))\n (pptr := None)\\\\)\n \\ (rf \\ p) s\"\n apply (simp add: vs_lookup_def vs_lookup1_def)\n apply (rule impI, erule subsetD[rotated])\n apply (rule Image_mono[OF order_refl])\n apply (simp add: vs_asid_refs_def graph_of_def)\n apply (rule image_mono)\n apply (clarsimp split: if_split_asm)\n done\n\n\nlemma vs_lookup_pages_clear_asid_table:\n \"(rf \\ p) (s\\arch_state := arch_state s\n \\x64_asid_table := (x64_asid_table (arch_state s))\n (pptr := None)\\\\)\n \\ (rf \\ p) s\"\n apply (simp add: vs_lookup_pages_def vs_lookup_pages1_def)\n apply (erule subsetD[rotated])\n apply (rule Image_mono[OF order_refl])\n apply (simp add: vs_asid_refs_def graph_of_def)\n apply (rule image_mono)\n apply (clarsimp split: if_split_asm)\n done\n\n\nlemma valid_arch_state_unmap_strg:\n \"valid_arch_state s \\\n valid_arch_state(s\\arch_state := arch_state s\\x64_asid_table := (x64_asid_table (arch_state s))(ptr := None)\\\\)\"\n apply (clarsimp simp: valid_arch_state_def valid_asid_table_def)\n apply (rule conjI)\n apply (clarsimp simp add: ran_def)\n apply blast\n apply (clarsimp simp: inj_on_def)\n done\n\nlemma valid_vspace_objs_unmap_strg:\n \"valid_vspace_objs s \\\n valid_vspace_objs(s\\arch_state := arch_state s\\x64_asid_table := (x64_asid_table (arch_state s))(ptr := None)\\\\)\"\n apply (clarsimp simp: valid_vspace_objs_def)\n apply (drule vs_lookup_clear_asid_table [rule_format])\n apply blast\n done\n\n\nlemma valid_vs_lookup_unmap_strg:\n \"valid_vs_lookup s \\\n valid_vs_lookup(s\\arch_state := arch_state s\\x64_asid_table := (x64_asid_table (arch_state s))(ptr := None)\\\\)\"\n apply (clarsimp simp: valid_vs_lookup_def)\n apply (drule vs_lookup_pages_clear_asid_table)\n apply blast\n done\n\n\nlemma ex_asid_high_bits_plus:\n \"asid \\ mask asid_bits \\ \\x \\ 2^asid_low_bits - 1. asid = (ucast (asid_high_bits_of asid) << asid_low_bits) + x\"\n apply (rule_tac x=\"asid && mask asid_low_bits\" in exI)\n apply (rule conjI)\n apply (simp add: mask_def)\n apply (rule word_and_le1)\n apply (subst (asm) mask_def)\n apply (simp add: upper_bits_unset_is_l2p_64 [symmetric])\n apply (subst word_plus_and_or_coroll)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size nth_ucast nth_shiftl)\n apply (rule word_eqI)\n apply (clarsimp simp: word_size nth_ucast nth_shiftl nth_shiftr asid_high_bits_of_def\n asid_low_bits_def word_bits_def asid_bits_def)\n apply (rule iffI)\n prefer 2\n apply fastforce\n apply (clarsimp simp: linorder_not_less)\n apply (subgoal_tac \"n < 12\", fastforce)\n apply (clarsimp simp add: linorder_not_le [symmetric])\n done\n\n\nlemma asid_high_bits_shl:\n \"\\ is_aligned base asid_low_bits; base \\ mask asid_bits \\ \\ ucast (asid_high_bits_of base) << asid_low_bits = base\"\n apply (simp add: mask_def upper_bits_unset_is_l2p_64 [symmetric])\n apply (rule word_eqI[rule_format])\n apply (simp add: is_aligned_nth nth_ucast nth_shiftl nth_shiftr asid_low_bits_def\n asid_high_bits_of_def word_size asid_bits_def word_bits_def)\n apply (rule iffI, clarsimp)\n apply (rule context_conjI)\n apply (clarsimp simp add: linorder_not_less [symmetric])\n apply simp\n apply (subgoal_tac \"n < 12\", fastforce)\n apply (clarsimp simp add: linorder_not_le [symmetric])\n done\n\n\ncrunch vs_lookup [wp]: hw_asid_invalidate \"\\s. P (vs_lookup s)\"\n\ncrunch aligned [wp]: hw_asid_invalidate pspace_aligned\n\ncrunch \"distinct\" [wp]: hw_asid_invalidate pspace_distinct\n\ncrunch caps_of_state[wp]: hw_asid_invalidate \"\\s. P (caps_of_state s)\"\n\ncrunch vspace_objs [wp]: hw_asid_invalidate valid_vspace_objs\n (simp: valid_vspace_objs_arch_update)\n\ncrunch typ_at [wp]: hw_asid_invalidate \"\\s. P (typ_at T p s)\"\n\nlemmas hw_asid_invalidate_typ_ats [wp] =\n abs_typ_at_lifts [OF hw_asid_invalidate_typ_at]\n\ncrunch cur [wp]: hw_asid_invalidate cur_tcb\n\ncrunch valid_objs [wp]: hw_asid_invalidate valid_objs\n\ncrunch obj_at [wp]: hw_asid_invalidate \"\\s. P (obj_at Q p s)\"\n\ncrunch valid_vs_lookup[wp]: hw_asid_invalidate \"valid_vs_lookup\"\n\ncrunch arm_asid_table_inv[wp]: hw_asid_invalidate\n \"\\s. P (x64_asid_table (arch_state s))\"\n\nlemma invalidateASID_underlying_memory:\n \"\\\\m'. underlying_memory m' p = um\\\n invalidateASID a b\n \\\\_ m'. underlying_memory m' p = um\\\"\n by (simp add: invalidateASID_def invalidateASID_def machine_op_lift_underlying_memory)\n\n(* FIXME x64: move to Machine_AI *)\nlemma no_irq_invalidateASID: \"no_irq (invalidateASID a b)\"\n by (clarsimp simp: invalidateASID_def invalidateASID_def)\n\nlemmas invalidateASID_irq_masks = no_irq[OF no_irq_invalidateASID]\n\ncrunch device_state_inv[wp]: invalidateASID \"\\ms. P (device_state ms)\"\n (ignore: ignore_failure)\n\nlemma dmo_invalidateASID_invs[wp]:\n \"\\invs\\ do_machine_op (invalidateASID a b) \\\\_. invs\\\"\n by (simp add: invalidateASID_def do_machine_op_lift_invs)\n\nlemma hw_asid_invalidate_invs[wp]: \"\\invs\\ hw_asid_invalidate asid vspace \\\\_. invs\\\"\n by (wpsimp simp: hw_asid_invalidate_def)\n\n\nlemma asid_low_bits_word_bits:\n \"asid_low_bits < word_bits\"\n by (simp add: asid_low_bits_def word_bits_def)\n\n\nlemma valid_global_objs_arch_update:\n \"x64_global_pml4 (f (arch_state s)) = x64_global_pml4 (arch_state s)\n \\ x64_global_pdpts (f (arch_state s)) = x64_global_pdpts (arch_state s)\n \\ x64_global_pds (f (arch_state s)) = x64_global_pds (arch_state s)\n \\ x64_global_pts (f (arch_state s)) = x64_global_pts (arch_state s)\n \\ valid_global_objs (arch_state_update f s) = valid_global_objs s\"\n by (simp add: valid_global_objs_def second_level_tables_def)\n\n\nlemma find_vspace_for_asid_assert_wp:\n \"\\\\s. \\pd. vspace_at_asid asid pd s \\ asid \\ 0 \\ P pd s\\ find_vspace_for_asid_assert asid \\P\\\"\n apply (simp add: find_vspace_for_asid_assert_def\n find_vspace_for_asid_def assertE_def\n split del: if_split)\n apply (rule hoare_pre)\n apply (wp get_pde_wp get_asid_pool_wp | wpc)+\n apply clarsimp\n apply (drule spec, erule mp)\n apply (clarsimp simp: vspace_at_asid_def word_neq_0_conv)\n apply (rule vs_lookupI)\n apply (simp add: vs_asid_refs_def)\n apply (rule image_eqI[OF refl])\n apply (erule graph_ofI)\n apply (rule r_into_rtrancl, simp)\n apply (erule vs_lookup1I)\n apply (simp add: vs_refs_def)\n apply (rule image_eqI[rotated])\n apply (erule graph_ofI)\n apply simp\n apply (simp add: asid_low_bits_of_def)\n done\n\nlemma valid_vs_lookup_arch_update:\n \"x64_asid_table (f (arch_state s)) = x64_asid_table (arch_state s)\n \\ valid_vs_lookup (arch_state_update f s) = valid_vs_lookup s\"\n by (simp add: valid_vs_lookup_def vs_lookup_pages_arch_update)\n\nlemmas find_vspace_for_asid_typ_ats [wp] = abs_typ_at_lifts [OF find_vspace_for_asid_inv]\n\nlemma find_vspace_for_asid_page_map_l4 [wp]:\n \"\\valid_vspace_objs\\\n find_vspace_for_asid asid\n \\\\pd. page_map_l4_at pd\\, -\"\n apply (simp add: find_vspace_for_asid_def assertE_def whenE_def split del: if_split)\n apply (wp|wpc|clarsimp|rule conjI)+\n apply (drule vs_lookup_atI)\n apply (drule (2) valid_vspace_objsD)\n apply clarsimp\n apply (drule bspec, blast)\n apply (clarsimp simp: obj_at_def)\n done\n\n\nlemma find_vspace_for_asid_lookup_ref:\n \"\\\\\\ find_vspace_for_asid asid \\\\pd. ([VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None] \\ pd)\\, -\"\n apply (simp add: find_vspace_for_asid_def assertE_def whenE_def split del: if_split)\n apply (wp|wpc|clarsimp|rule conjI)+\n apply (drule vs_lookup_atI)\n apply (erule vs_lookup_step)\n apply (erule vs_lookup1I [OF _ _ refl])\n apply (simp add: vs_refs_def)\n apply (rule image_eqI[rotated], erule graph_ofI)\n apply (simp add: asid_bits_of_defs)\n done\n\n\nlemma find_vspace_for_asid_lookup[wp]:\n \"\\\\\\ find_vspace_for_asid asid \\\\pd. \\\\ pd\\,-\"\n apply (rule hoare_post_imp_R, rule find_vspace_for_asid_lookup_ref)\n apply auto\n done\n\n\nlemma find_vspace_for_asid_pde [wp]:\n \"\\valid_vspace_objs and pspace_aligned\\\n find_vspace_for_asid asid\n \\\\pd. pml4e_at (pd + (get_pml4_index vptr << word_size_bits))\\, -\"\nproof -\n have x:\n \"\\valid_vspace_objs and pspace_aligned\\ find_vspace_for_asid asid\n \\\\pd. pspace_aligned and page_map_l4_at pd\\, -\"\n by wpsimp\n show ?thesis\n apply (rule hoare_post_imp_R, rule x)\n apply clarsimp\n apply (erule page_map_l4_pml4e_atI)\n prefer 2\n apply assumption\n apply (rule vptr_shiftr_le_2p)\n done\nqed\n\nlemma vs_lookup1_rtrancl_iterations:\n \"(tup, tup') \\ (vs_lookup1 s)\\<^sup>*\n \\ (length (fst tup) \\ length (fst tup')) \\\n (tup, tup') \\ ((vs_lookup1 s)\n ^^ (length (fst tup') - length (fst tup)))\"\n apply (erule rtrancl_induct)\n apply simp\n apply (elim conjE)\n apply (subgoal_tac \"length (fst z) = Suc (length (fst y))\")\n apply (simp add: Suc_diff_le)\n apply (erule(1) relcompI)\n apply (clarsimp simp: vs_lookup1_def)\n done\n\n\nlemma find_vspace_for_asid_lookup_none:\n \"\\\\\\\n find_vspace_for_asid asid\n -, \\\\e s. \\p. \\ ([VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None] \\ p) s\\\"\n apply (simp add: find_vspace_for_asid_def assertE_def\n split del: if_split)\n apply (rule hoare_pre)\n apply (wp | wpc)+\n apply clarsimp\n apply (intro allI conjI impI)\n apply (clarsimp simp: vs_lookup_def vs_asid_refs_def up_ucast_inj_eq\n dest!: vs_lookup1_rtrancl_iterations\n graph_ofD vs_lookup1D)\n apply (clarsimp simp: vs_lookup_def vs_asid_refs_def\n dest!: vs_lookup1_rtrancl_iterations\n graph_ofD vs_lookup1D)\n apply (clarsimp simp: obj_at_def vs_refs_def up_ucast_inj_eq\n asid_low_bits_of_def\n dest!: graph_ofD)\n done\n\n\nlemma find_vspace_for_asid_aligned_pm [wp]:\n \"\\pspace_aligned and valid_vspace_objs\\ find_vspace_for_asid asid \\\\rv s. is_aligned rv table_size\\,-\"\n apply (simp add: find_vspace_for_asid_def assertE_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp|wpc)+\n apply clarsimp\n apply (drule vs_lookup_atI)\n apply (drule (2) valid_vspace_objsD)\n apply clarsimp\n apply (drule bspec, blast)\n apply (thin_tac \"ko_at ko p s\" for ko p)\n apply (clarsimp simp: pspace_aligned_def obj_at_def)\n apply (drule bspec, blast)\n apply (clarsimp simp: a_type_def bit_simps\n split: Structures_A.kernel_object.splits arch_kernel_obj.splits if_split_asm)\n done\n\nlemma find_vspace_for_asid_aligned_pm_bits[wp]:\n \"\\pspace_aligned and valid_vspace_objs\\\n find_vspace_for_asid asid\n \\\\rv s. is_aligned rv pml4_bits\\, -\"\n by (simp add: pml4_bits_def pageBits_def, rule find_vspace_for_asid_aligned_pm)\n\nlemma find_vspace_for_asid_lots:\n \"\\\\s. (\\rv. ([VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None] \\ rv) s\n \\ (valid_vspace_objs s \\ page_map_l4_at rv s)\n \\ Q rv s)\n \\ ((\\rv. \\ ([VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None] \\ rv) s) \\ (\\e. E e s))\\\n find_vspace_for_asid asid\n \\Q\\,\\E\\\"\n apply (clarsimp simp: validE_def valid_def)\n apply (frule in_inv_by_hoareD [OF find_vspace_for_asid_inv])\n apply (frule use_valid [OF _ find_vspace_for_asid_lookup_none\n [unfolded validE_E_def validE_def]])\n apply simp\n apply (frule use_valid [OF _ find_vspace_for_asid_lookup_ref\n [unfolded validE_R_def validE_def]])\n apply simp\n apply (clarsimp split: sum.split_asm)\n apply (drule spec, drule uncurry, erule mp)\n apply clarsimp\n apply (frule use_valid [OF _ find_vspace_for_asid_page_map_l4\n [unfolded validE_R_def validE_def]])\n apply simp\n apply simp\n done\n\nlemma vs_lookup1_inj:\n \"\\ ((ref, p), (ref', p')) \\ vs_lookup1 s ^^ n;\n ((ref, p), (ref', p'')) \\ vs_lookup1 s ^^ n \\\n \\ p' = p''\"\n apply (induct n arbitrary: ref ref' p p' p'')\n apply simp\n apply (clarsimp dest!: vs_lookup1D)\n apply (subgoal_tac \"pa = pb\", simp_all)\n apply (simp add: obj_at_def)\n apply (auto simp: vs_refs_def up_ucast_inj_eq dest!: graph_ofD\n split: Structures_A.kernel_object.split_asm arch_kernel_obj.split_asm)\n done\n\nlemma vs_lookup_Cons_eq:\n \"(ref \\ p) s \\ ((v # ref) \\ p') s = ((ref, p) \\1 (v # ref, p')) s\"\n apply (rule iffI)\n apply (clarsimp simp: vs_lookup_def vs_asid_refs_def\n dest!: graph_ofD)\n apply (frule vs_lookup1_trans_is_append[where ys=ref])\n apply (frule vs_lookup1_trans_is_append[where ys=\"v # ref\"])\n apply (clarsimp dest!: vs_lookup1_rtrancl_iterations vs_lookup1D)\n apply (clarsimp simp add: up_ucast_inj_eq)\n apply (drule(1) vs_lookup1_inj)\n apply (simp add: vs_lookup1I)\n apply (erule vs_lookup_trancl_step)\n apply simp\n done\n\ndefinition\n valid_unmap :: \"vmpage_size \\ asid * vspace_ref \\ bool\"\nwhere\n \"valid_unmap sz \\ \\(asid, vptr). 0 < asid \\ is_aligned vptr (pageBitsForSize sz)\"\n\nlemma lookup_pdpt_slot_is_aligned:\n \"\\(\\\\ pm) and K (vmsz_aligned vptr sz) and K (is_aligned pm pml4_bits)\n and valid_arch_state and valid_vspace_objs and equal_kernel_mappings\n and pspace_aligned and valid_global_objs\\\n lookup_pdpt_slot pm vptr\n \\\\rv s. is_aligned rv word_size_bits\\,-\"\n apply (simp add: lookup_pdpt_slot_def)\n apply (wp get_pml4e_wp | wpc)+\n apply (clarsimp simp: lookup_pml4_slot_eq)\n apply (frule(2) valid_vspace_objsD[rotated])\n apply simp\n apply (rule is_aligned_add)\n apply (case_tac \"ucast (lookup_pml4_slot pm vptr && mask pml4_bits >> word_size_bits) \\ kernel_mapping_slots\")\n apply (frule kernel_mapping_slots_empty_pml4eI)\n apply (simp add: obj_at_def)+\n apply (erule_tac x=\"ptrFromPAddr x\" in allE)\n apply (simp add: pml4e_ref_def second_level_tables_def)\n apply (erule is_aligned_weaken[OF is_aligned_global_pdpt])\n apply ((simp add: invs_psp_aligned invs_vspace_objs invs_arch_state\n pdpt_bits_def bit_simps\n split: vmpage_size.split)+)[3]\n apply (drule_tac x=\"ucast (lookup_pml4_slot pm vptr && mask pml4_bits >> word_size_bits)\" in bspec, simp)\n apply (clarsimp simp: obj_at_def a_type_def)\n apply (simp split: Structures_A.kernel_object.split_asm if_split_asm\n arch_kernel_obj.split_asm)\n apply (erule is_aligned_weaken[OF pspace_alignedD], simp)\n apply (simp add: obj_bits_def bit_simps split: vmpage_size.splits)\n apply (rule is_aligned_shiftl)\n apply (simp add: bit_simps)\n done\n\n(* FIXME: remove *)\nlemmas page_directory_at_aligned_pd_bits = is_aligned_pd\n\n(* FIXME x64: check *)\ndefinition\n \"empty_refs m \\ case m of (VMPDE pde, _) \\ pde_ref pde = None\n | (VMPDPTE pdpte, _) \\ pdpte_ref pdpte = None\n | _ \\ True\"\n\ndefinition\n \"parent_for_refs entry \\ \\cap.\n case entry of (VMPTE _, slot)\n \\ slot && ~~ mask pt_bits \\ obj_refs cap \\ is_pt_cap cap \\ cap_asid cap \\ None\n | (VMPDE _, slot)\n \\ slot && ~~ mask pd_bits \\ obj_refs cap \\ is_pd_cap cap \\ cap_asid cap \\ None\n | (VMPDPTE _, slot)\n \\ slot && ~~ mask pdpt_bits \\ obj_refs cap \\ is_pdpt_cap cap \\ cap_asid cap \\ None\"\n\n(* FIXME x64: check *)\ndefinition\n \"same_refs m cap s \\\n case m of\n (VMPTE pte, slot) \\\n (\\p. pte_ref_pages pte = Some p \\ p \\ obj_refs cap) \\\n (\\ref. (ref \\ (slot && ~~ mask pt_bits)) s \\\n vs_cap_ref cap = Some (VSRef ((slot && mask pt_bits >> word_size_bits) && mask ptTranslationBits) (Some APageTable) # ref))\n | (VMPDE pde, slot) \\\n (\\p. pde_ref_pages pde = Some p \\ p \\ obj_refs cap) \\\n (\\ref. (ref \\ (slot && ~~ mask pd_bits)) s \\\n vs_cap_ref cap = Some (VSRef ((slot && mask pd_bits >> word_size_bits) && mask ptTranslationBits) (Some APageDirectory) # ref))\n | (VMPDPTE pdpte, slot) \\\n (\\p. pdpte_ref_pages pdpte = Some p \\ p \\ obj_refs cap) \\\n (\\ref. (ref \\ (slot && ~~ mask pdpt_bits)) s \\\n vs_cap_ref cap = Some (VSRef ((slot && mask pdpt_bits >> word_size_bits)&& mask ptTranslationBits) (Some APDPointerTable) # ref))\"\n\ndefinition\n \"valid_page_inv page_inv \\ case page_inv of\n PageMap cap ptr m vspace \\\n cte_wp_at (is_arch_update cap) ptr\n and (cte_wp_at (\\c. vs_cap_ref c = None) ptr or (\\s. cte_wp_at (\\c. same_refs m c s) ptr s))\n and cte_wp_at is_pg_cap ptr\n and (\\s. same_refs m cap s)\n and valid_slots m\n and valid_cap cap\n and K (is_pg_cap cap \\ empty_refs m)\n and (\\s. \\slot. cte_wp_at (parent_for_refs m) slot s)\n | PageUnmap cap ptr \\\n \\s. \\d r R maptyp sz m. cap = PageCap d r R maptyp sz m \\\n case_option True (valid_unmap sz) m \\\n cte_wp_at ((=) (cap.ArchObjectCap cap)) ptr s \\\n s \\ (cap.ArchObjectCap cap)\n | PageGetAddr ptr \\ \\\"\n\ncrunch aligned [wp]: unmap_page pspace_aligned\n (wp: crunch_wps simp: crunch_simps)\n\n\ncrunch \"distinct\" [wp]: unmap_page pspace_distinct\n (wp: crunch_wps simp: crunch_simps)\n\n\ncrunch valid_objs[wp]: unmap_page \"valid_objs\"\n (wp: crunch_wps simp: crunch_simps)\n\n\ncrunch caps_of_state [wp]: unmap_page \"\\s. P (caps_of_state s)\"\n (wp: crunch_wps simp: crunch_simps set_arch_obj_simps)\n\nlemma set_cap_valid_slots[wp]:\n \"\\valid_slots x2\\ set_cap cap (a, b)\n \\\\rv s. valid_slots x2 s \\\"\n apply (case_tac x2)\n apply (simp only:)\n apply (case_tac aa; clarsimp simp: valid_slots_def)\n by (wp hoare_vcg_ball_lift)+\n\ndefinition\n empty_pde_at :: \"obj_ref \\ 'z::state_ext state \\ bool\"\nwhere\n \"empty_pde_at p \\ \\s.\n \\pd. ko_at (ArchObj (PageDirectory pd)) (p && ~~ mask pd_bits) s \\\n pd (ucast (p && mask pd_bits >> word_size_bits)) = InvalidPDE\"\n\ndefinition\n empty_pdpte_at :: \"obj_ref \\ 'z::state_ext state \\ bool\"\nwhere\n \"empty_pdpte_at p \\ \\s.\n \\pdpt. ko_at (ArchObj (PDPointerTable pdpt)) (p && ~~ mask pdpt_bits) s \\\n pdpt (ucast (p && mask pdpt_bits >> word_size_bits)) = InvalidPDPTE\"\n\ndefinition\n empty_pml4e_at :: \"obj_ref \\ 'z::state_ext state \\ bool\"\nwhere\n \"empty_pml4e_at p \\ \\s.\n \\pml4. ko_at (ArchObj (PageMapL4 pml4)) (p && ~~ mask pml4_bits) s \\\n pml4 (ucast (p && mask pml4_bits >> word_size_bits)) = InvalidPML4E\"\n\ndefinition\n kernel_vsrefs :: \"vs_ref set\"\nwhere\n \"kernel_vsrefs \\ {r. case r of VSRef x y \\ (pptr_base >> pml4_shift_bits) && mask ptTranslationBits \\ x}\"\n\ndefinition\n \"valid_pti pti \\ case pti of\n PageTableMap cap cptr pde p vspace\\\n (\\s. p && ~~ mask pd_bits \\ global_refs s)\n and K(wellformed_pde pde)\n and valid_cap cap\n and valid_pde pde\n and pde_at p\n and cte_wp_at (\\c. is_arch_update cap c \\ cap_asid c = None) cptr\n and (\\s. \\x ref. (pde_ref_pages pde = Some x)\n \\ x \\ obj_refs cap\n \\ obj_at (empty_table (set (second_level_tables (arch_state s)))) x s\n \\ (ref \\ (p && ~~ mask pd_bits)) s\n \\ vs_cap_ref cap = Some (VSRef ((p && mask pd_bits >> word_size_bits) && mask ptTranslationBits) (Some APageDirectory) # ref))\n and K (is_pt_cap cap)\n | PageTableUnmap cap ptr \\\n cte_wp_at ((=) cap) ptr and valid_cap cap\n and is_final_cap' cap\n and K (is_pt_cap cap)\"\n\ndefinition\n \"valid_pdi pdi \\ case pdi of\n PageDirectoryMap cap cptr pdpte p vspace\\\n (\\s. p && ~~ mask pdpt_bits \\ global_refs s)\n and K(wellformed_pdpte pdpte)\n and valid_cap cap\n and valid_pdpte pdpte\n and pdpte_at p\n and cte_wp_at (\\c. is_arch_update cap c \\ cap_asid c = None) cptr\n and (\\s. \\x ref. (pdpte_ref_pages pdpte = Some x)\n \\ x \\ obj_refs cap\n \\ obj_at (empty_table (set (second_level_tables (arch_state s)))) x s\n \\ (ref \\ (p && ~~ mask pdpt_bits)) s\n \\ vs_cap_ref cap =\n Some (VSRef ((p && mask pdpt_bits >> word_size_bits) && mask ptTranslationBits)\n (Some APDPointerTable) # ref))\n and K (is_pd_cap cap)\n | PageDirectoryUnmap cap cptr \\\n cte_wp_at ((=) cap) cptr and valid_cap cap and is_final_cap' cap and K (is_pd_cap cap)\"\n\ndefinition\n \"valid_pdpti pdpti \\ case pdpti of\n PDPTMap cap cptr pml4e p vspace\\\n (\\s. p && ~~ mask pml4_bits \\ global_refs s)\n and K(wellformed_pml4e pml4e)\n and valid_cap cap and pml4e_at p\n and valid_pml4e pml4e and empty_pml4e_at p\n and cte_wp_at (\\c. is_arch_update cap c \\ cap_asid c = None) cptr\n and (\\s. \\x ref. (pml4e_ref_pages pml4e = Some x)\n \\ x \\ obj_refs cap\n \\ obj_at (empty_table (set (second_level_tables (arch_state s)))) x s\n \\ (ref \\ (p && ~~ mask pml4_bits)) s\n \\ vs_cap_ref cap =\n Some (VSRef ((p && mask pml4_bits >> word_size_bits) && mask ptTranslationBits)\n (Some APageMapL4) # ref)\n \\ hd (the (vs_cap_ref cap)) \\ kernel_vsrefs)\n and K (is_pdpt_cap cap)\n | PDPTUnmap cap cptr \\\n cte_wp_at ((=) cap) cptr and valid_cap cap and is_final_cap' cap and K (is_pdpt_cap cap)\"\n\n\nlemmas mapM_x_wp_inv_weak = mapM_x_wp_inv[OF hoare_weaken_pre]\n\ncrunch aligned [wp]: unmap_page_table pspace_aligned\n (wp: mapM_x_wp_inv_weak crunch_wps dmo_aligned simp: crunch_simps)\ncrunch aligned [wp]: unmap_pd pspace_aligned\n (wp: mapM_x_wp_inv_weak crunch_wps dmo_aligned simp: crunch_simps)\ncrunch aligned [wp]: unmap_pdpt pspace_aligned\n (wp: mapM_x_wp_inv_weak crunch_wps dmo_aligned simp: crunch_simps)\n\ncrunch valid_objs [wp]: unmap_page_table valid_objs\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\ncrunch \"distinct\" [wp]: unmap_page_table pspace_distinct\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\ncrunch caps_of_state [wp]: unmap_page_table \"\\s. P (caps_of_state s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\ncrunch typ_at [wp]: unmap_page_table \"\\s. P (typ_at T p s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps hoare_drop_imps)\n\ncrunch typ_at [wp]: unmap_pd \"\\s. P (typ_at T p s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps hoare_drop_imps)\n\ncrunch caps_of_state [wp]: unmap_pd \"\\s. P (caps_of_state s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\ncrunch typ_at [wp]: unmap_pdpt \"\\s. P (typ_at T p s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps hoare_drop_imps)\n\ncrunch typ_at [wp]: unmap_page \"\\s. P (typ_at T p s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\ncrunch caps_of_state [wp]: unmap_pdpt \"\\s. P (caps_of_state s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps set_arch_obj_simps)\n\nlemmas flush_table_typ_ats [wp] = abs_typ_at_lifts [OF flush_table_typ_at]\n\ndefinition\n \"valid_apinv ap \\ case ap of\n asid_pool_invocation.Assign asid p slot \\\n (\\s. \\pool. ko_at (ArchObj (arch_kernel_obj.ASIDPool pool)) p s \\\n pool (asid_low_bits_of asid) = None)\n and cte_wp_at (\\cap. is_pml4_cap cap \\ cap_asid cap = None) slot\n and K (0 < asid \\ asid_wf asid)\n and ([VSRef (ucast (asid_high_bits_of asid)) None] \\ p)\"\n\ncrunch device_state_inv[wp]: ackInterrupt, writeCR3 \"\\ms. P (device_state ms)\"\n\n\nlemma dmo_ackInterrupt[wp]: \"\\invs\\ do_machine_op (ackInterrupt irq) \\\\y. invs\\\"\n by (simp add: ackInterrupt_def do_machine_op_lift_invs)\n\nlemmas writeCR3_irq_masks = no_irq[OF no_irq_writeCR3]\n\nlemma dmo_writeCR3[wp]: \"\\invs\\ do_machine_op (writeCR3 vs asid) \\\\rv. invs\\\"\n by (simp add: writeCR3_def do_machine_op_lift_invs)\n\ncrunch inv[wp]: get_current_cr3 P\n\nlemma get_current_cr3_rewrite_lift[wp]:\n \"\\P\\ get_current_cr3 \\\\rv s. Q rv \\ P s\\\"\n by (wp hoare_drop_imps)\n\nlemma arch_state_update_invs:\n assumes \"invs s\"\n assumes \"x64_asid_table (f (arch_state s)) = x64_asid_table (arch_state s)\"\n assumes \"valid_global_refs s \\ valid_global_refs (arch_state_update f s)\"\n assumes \"valid_arch_state s \\ valid_arch_state (arch_state_update f s)\"\n assumes \"valid_table_caps s \\ valid_table_caps (arch_state_update f s)\"\n assumes \"valid_global_objs s \\ valid_global_objs (arch_state_update f s)\"\n assumes \"valid_kernel_mappings s \\ valid_kernel_mappings (arch_state_update f s)\"\n assumes \"valid_global_vspace_mappings s \\ valid_global_vspace_mappings (arch_state_update f s)\"\n assumes \"pspace_in_kernel_window s \\ pspace_in_kernel_window (arch_state_update f s)\"\n assumes \"cap_refs_in_kernel_window s \\ cap_refs_in_kernel_window (arch_state_update f s)\"\n assumes \"valid_ioports s \\ valid_ioports (arch_state_update f s)\"\n shows \"invs (arch_state_update f s)\"\n using assms by (simp add: invs_def valid_state_def valid_irq_node_def valid_irq_states_def\n valid_machine_state_def valid_arch_caps_def valid_asid_map_def\n valid_vspace_objs_arch_update valid_vs_lookup_arch_update)\n\nlemma valid_ioports_cr3_update[iff]:\n \"valid_ioports (s\\arch_state := arch_state s\\x64_current_cr3 := c\\\\) = valid_ioports s\"\n by (clarsimp simp: valid_ioports_def all_ioports_issued_def issued_ioports_def)\n\ncrunch global_pml4[wp]: set_current_cr3 \"\\s. P (x64_global_pml4 (arch_state s))\"\n\nlemma set_current_cr3_invs[wp]:\n \"\\invs and K (valid_cr3 c)\\ set_current_cr3 c \\\\rv. invs\\\"\n apply (wpsimp simp: set_current_cr3_def; erule arch_state_update_invs)\n by (auto simp: valid_global_refs_def global_refs_def valid_arch_state_def valid_table_caps_def\n valid_global_objs_def valid_kernel_mappings_def second_level_tables_def)\n\nlemma valid_cr3_make_cr3:\n \"asid_wf asid \\ valid_cr3 (make_cr3 addr asid)\"\n apply (clarsimp simp: valid_cr3_def make_cr3_def cr3_addr_mask_def bit_simps\n is_aligned_andI2[OF is_aligned_shift])\n apply (rule order.trans[OF word_and_le1])\n apply (simp add: mask_def asid_bits_def)\n done\n\nlemma set_current_vspace_root_invs[wp]:\n \"\\invs and K (asid_wf asid)\\ set_current_vspace_root vspace asid \\\\rv. invs\\\"\n by (wpsimp simp: set_current_vspace_root_def valid_cr3_make_cr3)\n\nlemma drop_imp:\n \"A \\ B \\ A\"\n by blast\n\nlemma asid_wf_0:\n \"asid_wf 0\"\n by (simp add: asid_wf_def)\n\nlemma svr_invs [wp]:\n \"\\invs\\ set_vm_root t' \\\\_. invs\\\"\n apply (simp add: set_vm_root_def)\n apply (wp whenE_wp\n | wpc\n | simp add: split_def if_apply_def2 cong: conj_cong if_cong\n | strengthen valid_cr3_make_cr3)+\n apply (strengthen drop_imp)\n apply (wpsimp wp: get_cap_wp simp: asid_wf_0)+\n apply (drule (1) cte_wp_valid_cap[OF _ invs_valid_objs])\n apply (simp add: valid_cap_def)\n done\n\ncrunch pred_tcb_at[wp]: set_current_vspace_root \"pred_tcb_at proj P t\"\n\ncrunch pred_tcb_at[wp]: set_vm_root \"pred_tcb_at proj P t\"\n (simp: crunch_simps)\n\ncrunch typ_at [wp]: get_current_cr3, set_vm_root \"\\s. P (typ_at T p s)\"\n (simp: crunch_simps)\n\nlemmas set_vm_root_typ_ats [wp] = abs_typ_at_lifts [OF set_vm_root_typ_at]\n\nlemma valid_pte_lift3:\n assumes x: \"(\\P T p. \\\\s. P (typ_at T p s)\\ f \\\\rv s. P (typ_at T p s)\\)\"\n shows \"\\\\s. P (valid_pte pte s)\\ f \\\\rv s. P (valid_pte pte s)\\\"\n apply (insert bool_function_four_cases[where f=P])\n apply (erule disjE)\n apply (cases pte)\n apply (simp add: data_at_def | wp hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (cases pte)\n apply (simp add: data_at_def | wp hoare_vcg_disj_lift hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (simp | wp)+\n done\n\nlemma set_cap_valid_pte_stronger:\n \"\\\\s. P (valid_pte pte s)\\ set_cap cap p \\\\rv s. P (valid_pte pte s)\\\"\n by (wp valid_pte_lift3 set_cap_typ_at)\n\nlemma valid_pde_lift3:\n assumes x: \"(\\P T p. \\\\s. P (typ_at T p s)\\ f \\\\rv s. P (typ_at T p s)\\)\"\n shows \"\\\\s. P (valid_pde pde s)\\ f \\\\rv s. P (valid_pde pde s)\\\"\n apply (insert bool_function_four_cases[where f=P])\n apply (erule disjE)\n apply (cases pde)\n apply (simp add: data_at_def | wp hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (cases pde)\n apply (simp add: data_at_def | wp hoare_vcg_disj_lift hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (simp | wp)+\n done\n\nlemma set_cap_valid_pde_stronger:\n \"\\\\s. P (valid_pde pde s)\\ set_cap cap p \\\\rv s. P (valid_pde pde s)\\\"\n by (wp valid_pde_lift3 set_cap_typ_at)\n\nlemma valid_pdpte_lift3:\n assumes x: \"(\\P T p. \\\\s. P (typ_at T p s)\\ f \\\\rv s. P (typ_at T p s)\\)\"\n shows \"\\\\s. P (valid_pdpte pdpte s)\\ f \\\\rv s. P (valid_pdpte pdpte s)\\\"\n apply (insert bool_function_four_cases[where f=P])\n apply (erule disjE)\n apply (cases pdpte)\n apply (simp add: data_at_def | wp hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (cases pdpte)\n apply (simp add: data_at_def | wp hoare_vcg_disj_lift hoare_vcg_const_imp_lift x)+\n apply (erule disjE)\n apply (simp | wp)+\n done\n\nlemma set_cap_valid_pdpte_stronger:\n \"\\\\s. P (valid_pdpte pdpte s)\\ set_cap cap p \\\\rv s. P (valid_pdpte pdpte s)\\\"\n by (wp valid_pdpte_lift3 set_cap_typ_at)\nend\n\ncontext Arch begin global_naming X64\n\n(* FIXME: move *)\ncontext\n fixes c :: cap and s :: \"'a::state_ext state\" and p :: obj_ref\n assumes vc: \"valid_cap c s\"\nbegin\n\nlemma valid_cap_to_table_cap':\n assumes ref: \"p \\ obj_refs c\"\n shows valid_cap_to_pt_cap' : \"page_table_at p s \\ is_pt_cap c\"\n and valid_cap_to_pd_cap' : \"page_directory_at p s \\ is_pd_cap c\"\n and valid_cap_to_pdpt_cap': \"pd_pointer_table_at p s \\ is_pdpt_cap c\"\n using vc ref\n by (auto simp: valid_cap_def obj_at_def is_obj_defs is_pt_cap_def is_pd_cap_def is_pdpt_cap_def\n split: cap.splits option.splits arch_cap.splits if_splits)\n\nlemma valid_cap_to_table_cap:\n assumes ref: \"obj_refs c = {p}\"\n shows valid_cap_to_pt_cap : \"page_table_at p s \\ is_pt_cap c\"\n and valid_cap_to_pd_cap : \"page_directory_at p s \\ is_pd_cap c\"\n and valid_cap_to_pdpt_cap: \"pd_pointer_table_at p s \\ is_pdpt_cap c\"\n by (rule valid_cap_to_table_cap'; simp add: ref)+\n\nend\n\n\nlemma ref_is_unique:\n \"\\(ref \\ p) s; (ref' \\ p) s; p \\ set (second_level_tables (arch_state s));\n valid_vs_lookup s; unique_table_refs (caps_of_state s);\n valid_vspace_objs s; valid_asid_table (x64_asid_table (arch_state s)) s;\n valid_caps (caps_of_state s) s\\\n \\ ref = ref'\"\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply (clarsimp simp: valid_asid_table_def up_ucast_inj_eq)\n apply (erule (2) inj_on_domD)\n apply ((clarsimp simp: obj_at_def)+)[4]\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply (clarsimp simp: obj_at_def)\n apply (drule (2) vs_lookup_apI)+\n apply (clarsimp dest!: valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI]\n obj_ref_elemD\n simp: table_cap_ref_ap_eq[symmetric])\n apply (drule_tac cap=cap and cap'=capa in unique_table_refsD, simp+)[1]\n apply ((clarsimp simp: obj_at_def)+)[3]\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply ((clarsimp simp: obj_at_def)+)[2]\n apply (simp add: pml4e_ref_def split: pml4e.splits)\n apply (drule (5) vs_lookup_pml4I)+\n apply (clarsimp dest!: valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI]\n obj_ref_elemD)\n apply (drule_tac cap=cap and cap'=capa in unique_table_refsD, simp+)[1]\n apply (drule (3) valid_capsD[THEN valid_cap_to_pdpt_cap])+\n apply (clarsimp simp: is_pdpt_cap_def table_cap_ref_simps vs_cap_ref_simps)\n apply ((clarsimp simp: obj_at_def)+)[2]\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply ((clarsimp simp: obj_at_def)+)[3]\n apply (simp add: pdpte_ref_def split: pdpte.splits)\n apply (drule (7) vs_lookup_pdptI)+\n apply (clarsimp dest!: valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI] obj_ref_elemD)\n apply (drule_tac cap=cap and cap'=capa in unique_table_refsD, simp+)[1]\n apply (drule (3) valid_capsD[THEN valid_cap_to_pd_cap])+\n apply (clarsimp simp: is_pd_cap_def table_cap_ref_simps vs_cap_ref_simps)\n apply (clarsimp simp: obj_at_def)\n apply (erule (1) vs_lookupE_alt[OF _ _ valid_asid_table_ran], clarsimp)\n apply ((clarsimp simp: obj_at_def)+)[4]\n apply (simp add: pde_ref_def split: pde.splits)\n apply (drule (9) vs_lookup_pdI)+\n apply (clarsimp dest!: valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI] obj_ref_elemD)\n apply (drule_tac cap=cap and cap'=capa in unique_table_refsD, simp+)[1]\n apply (drule (3) valid_capsD[THEN valid_cap_to_pt_cap])+\n apply (clarsimp simp: is_pt_cap_def table_cap_ref_simps vs_cap_ref_simps)\n done\n\nlemma pml4_translation_bits:\n fixes p :: machine_word\n shows \"p && mask pml4_bits >> word_size_bits < 2 ^ ptTranslationBits\"\n apply (rule shiftr_less_t2n)\n apply (simp add: pml4_bits_def simple_bit_simps)\n apply (rule and_mask_less'[of 12 p, simplified])\n done\n\nlemma ucast_ucast_mask_shift_helper:\n \"ucast (ucast (p && mask pml4_bits >> word_size_bits :: machine_word) :: 9 word)\n = (p && mask pml4_bits >> word_size_bits :: machine_word)\"\n apply (rule ucast_ucast_len)\n using pml4_translation_bits by (auto simp: ptTranslationBits_def)\n\nlemma unat_ucast_pml4_bits_shift:\n \"unat (ucast (p && mask pml4_bits >> word_size_bits :: machine_word) :: 9 word)\n = unat (p && mask pml4_bits >> word_size_bits)\"\n apply (simp only: unat_ucast)\n apply (rule mod_less[OF unat_less_power])\n using pml4_translation_bits by (auto simp: ptTranslationBits_def)\n\nlemma kernel_vsrefs_kernel_mapping_slots:\n \"(ucast (p && mask pml4_bits >> word_size_bits) \\ kernel_mapping_slots) =\n (VSRef (p && mask pml4_bits >> word_size_bits) (Some APageMapL4) \\ kernel_vsrefs)\"\n apply (clarsimp simp: kernel_mapping_slots_def kernel_vsrefs_def\n word_le_nat_alt unat_ucast_pml4_bits_shift)\n apply (clarsimp simp: pptr_base_def pptrBase_def bit_simps mask_def)\n done\n\nlemma vs_lookup_typI:\n \"\\(r \\ p) s; valid_vspace_objs s; valid_asid_table (x64_asid_table (arch_state s)) s\\\n \\ asid_pool_at p s \\ vspace_table_at p s\"\n apply (erule (1) vs_lookupE_alt)\n apply (clarsimp simp: ran_def)\n apply (drule (2) valid_asid_tableD)\n apply simp+\n done\n\nlemma vs_lookup_vs_lookup_pagesI:\n \"\\(r \\ p) s; (r' \\ p) s; valid_vspace_objs s; valid_asid_table (x64_asid_table (arch_state s)) s\\\n \\ (r' \\ p) s\"\n by (erule (5) vs_lookup_vs_lookup_pagesI'[OF _ vs_lookup_typI])\n\n(* FIXME: move *)\nlemma valid_cap_to_pml4_cap:\n \"\\valid_cap c s; obj_refs c = {p}; page_map_l4_at p s\\ \\ is_pml4_cap c\"\n by (clarsimp simp: valid_cap_def obj_at_def is_obj_defs is_pml4_cap_def\n split: cap.splits option.splits arch_cap.splits if_splits)\n\nlemma set_cap_empty_pde:\n \"\\empty_pde_at p and cte_at p'\\ set_cap cap p' \\\\_. empty_pde_at p\\\"\n apply (simp add: empty_pde_at_def)\n apply (rule hoare_pre)\n apply (wp set_cap_obj_at_other hoare_vcg_ex_lift)\n apply clarsimp\n apply (rule exI, rule conjI, assumption)\n apply (erule conjI)\n apply (clarsimp simp: cte_wp_at_cases obj_at_def)\n done\n\nlemma set_cap_empty_pml4e:\n \"\\empty_pml4e_at p and cte_at p'\\ set_cap cap p' \\\\_. empty_pml4e_at p\\\"\n apply (simp add: empty_pml4e_at_def)\n apply (rule hoare_pre)\n apply (wp set_cap_obj_at_other hoare_vcg_ex_lift)\n apply clarsimp\n apply (rule exI, rule conjI, assumption)\n apply (erule conjI)\n apply (clarsimp simp: cte_wp_at_cases obj_at_def)\n done\n\nlemma set_cap_empty_pdpte:\n \"\\empty_pdpte_at p and cte_at p'\\ set_cap cap p' \\\\_. empty_pdpte_at p\\\"\n apply (simp add: empty_pdpte_at_def)\n apply (rule hoare_pre)\n apply (wp set_cap_obj_at_other hoare_vcg_ex_lift)\n apply clarsimp\n apply (rule exI, rule conjI, assumption)\n apply (erule conjI)\n apply (clarsimp simp: cte_wp_at_cases obj_at_def)\n done\n\nlemma valid_cap_obj_ref_vspace:\n \"\\ s \\ cap; s \\ cap'; obj_refs cap = obj_refs cap' \\\n \\ (is_pt_cap cap \\ is_pt_cap cap')\n \\ (is_pd_cap cap \\ is_pd_cap cap')\n \\ (is_pdpt_cap cap \\ is_pdpt_cap cap')\n \\ (is_pml4_cap cap \\ is_pml4_cap cap')\"\n by (auto simp: is_cap_simps valid_cap_def\n obj_at_def is_ep is_ntfn is_cap_table\n is_tcb a_type_def\n split: cap.split_asm if_split_asm\n arch_cap.split_asm option.split_asm)\n\nlemma is_vspace_cap_asid_None_table_ref:\n \"is_pt_cap cap \\ is_pd_cap cap \\ is_pdpt_cap cap \\ is_pml4_cap cap\n \\ ((table_cap_ref cap = None) = (cap_asid cap = None))\"\n by (auto simp: is_cap_simps table_cap_ref_def cap_asid_def\n split: option.split_asm)\n\nlemma no_cap_to_obj_with_diff_ref_map:\n \"\\ caps_of_state s p = Some cap; is_pt_cap cap \\ is_pd_cap cap \\ is_pdpt_cap cap \\ is_pml4_cap cap;\n table_cap_ref cap = None;\n unique_table_caps (caps_of_state s);\n valid_objs s; obj_refs cap = obj_refs cap' \\\n \\ no_cap_to_obj_with_diff_ref cap' {p} s\"\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid_cap[where p=p])\n apply (frule(1) caps_of_state_valid_cap[where p=\"(a, b)\" for a b])\n apply (drule(1) valid_cap_obj_ref_vspace, simp)\n apply (drule(1) unique_table_capsD[rotated, where cps=\"caps_of_state s\"])\n apply simp\n apply (simp add: is_vspace_cap_asid_None_table_ref)\n apply fastforce\n apply assumption\n apply simp\n done\n\n\nlemmas store_pte_cte_wp_at1[wp]\n = hoare_cte_wp_caps_of_state_lift [OF store_pte_caps_of_state]\n\nlemmas store_pde_cte_wp_at1[wp]\n = hoare_cte_wp_caps_of_state_lift [OF store_pde_caps_of_state]\n\nlemmas store_pdpte_cte_wp_at1[wp]\n = hoare_cte_wp_caps_of_state_lift [OF store_pdpte_caps_of_state]\n\ncrunch global_refs_inv[wp]: store_pml4e \"\\s. P (global_refs s)\"\n (wp: get_object_wp)\n\ncrunch global_refs_inv[wp]: store_pde \"\\s. P (global_refs s)\"\n (wp: get_object_wp)\n\ncrunch global_refs_inv[wp]: store_pdpte \"\\s. P (global_refs s)\"\n (wp: get_object_wp)\n\ncrunch global_refs_inv[wp]: store_pte \"\\s. P (global_refs s)\"\n (wp: get_object_wp)\n\nlemma mapM_swp_store_pte_invs_unmap:\n \"\\invs and\n (\\s. \\sl\\set slots. sl && ~~ mask pt_bits \\ global_refs s) and\n K (pte = InvalidPTE)\\\n mapM (swp store_pte pte) slots \\\\_. invs\\\"\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule mapM_wp')\n apply simp\n apply (rule hoare_pre, wp store_pte_invs hoare_vcg_const_Ball_lift\n hoare_vcg_ex_lift)\n apply (clarsimp simp: pte_ref_pages_def)+\n done\n\nlemma mapM_swp_store_pde_invs_unmap:\n \"\\invs and\n (\\s. \\sl\\set slots. sl && ~~ mask pd_bits \\ global_refs s) and\n K (pde = InvalidPDE)\\\n mapM (swp store_pde pde) slots \\\\_. invs\\\"\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule mapM_wp')\n apply simp\n apply (rule hoare_pre, wp store_pde_invs hoare_vcg_const_Ball_lift\n hoare_vcg_ex_lift)\n apply clarsimp+\n done\n\nlemma mapM_swp_store_pdpte_invs_unmap:\n \"\\invs and\n (\\s. \\sl\\set slots. sl && ~~ mask pdpt_bits \\ global_refs s) and\n K (pdpte = InvalidPDPTE)\\\n mapM (swp store_pdpte pdpte) slots \\\\_. invs\\\"\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule mapM_wp')\n apply simp\n apply (rule hoare_pre, wp store_pdpte_invs hoare_vcg_const_Ball_lift\n hoare_vcg_ex_lift)\n apply (clarsimp simp: pdpte_ref_pages_def)+\n done\n\nlemma mapM_swp_store_pml4e_invs_unmap:\n \"\\invs and\n (\\s. \\sl\\set slots.\n ucast (sl && mask pml4_bits >> word_size_bits) \\ kernel_mapping_slots) and\n (\\s. \\sl\\set slots. sl && ~~ mask pml4_bits \\ global_refs s) and\n K (pml4e = InvalidPML4E)\\\n mapM (swp store_pml4e pml4e) slots \\\\_. invs\\\"\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule mapM_wp')\n apply simp\n apply (rule hoare_pre, wp store_pml4e_invs hoare_vcg_const_Ball_lift\n hoare_vcg_ex_lift)\n apply (clarsimp simp: pml4e_ref_pages_def)+\n done\n\nlemma vs_refs_pml4I3:\n \"\\pml4e_ref (pml4 x) = Some p; x \\ kernel_mapping_slots\\\n \\ (VSRef (ucast x) (Some APageMapL4), p) \\ vs_refs (ArchObj (PageMapL4 pml4))\"\n by (auto simp: pml4e_ref_def vs_refs_def graph_of_def)\n\n\nlemma mapM_x_swp_store_pte_invs_unmap:\n \"\\invs and (\\s. \\sl \\ set slots. sl && ~~ mask pt_bits \\ global_refs s) and\n K (pde = InvalidPTE)\\\n mapM_x (swp store_pte pde) slots \\\\_. invs\\\"\n by (simp add: mapM_x_mapM | wp mapM_swp_store_pte_invs_unmap)+\n\nlemma mapM_x_swp_store_pde_invs_unmap:\n \"\\invs and (\\s. \\sl \\ set slots. sl && ~~ mask pd_bits \\ global_refs s) and\n K (pde = InvalidPDE)\\\n mapM_x (swp store_pde pde) slots \\\\_. invs\\\"\n by (simp add: mapM_x_mapM | wp mapM_swp_store_pde_invs_unmap)+\n\nlemma mapM_x_swp_store_pdpte_invs_unmap:\n \"\\invs and (\\s. \\sl \\ set slots. sl && ~~ mask pdpt_bits \\ global_refs s) and\n K (pdpte = InvalidPDPTE)\\\n mapM_x (swp store_pdpte pdpte) slots \\\\_. invs\\\"\n by (simp add: mapM_x_mapM | wp mapM_swp_store_pdpte_invs_unmap)+\n\nlemma mapM_x_swp_store_pml4e_invs_unmap:\n \"\\invs and K (\\sl\\set slots.\n ucast (sl && mask pml4_bits >> word_size_bits) \\ kernel_mapping_slots) and\n (\\s. \\sl \\ set slots. sl && ~~ mask pml4_bits \\ global_refs s) and\n K (pml4e = InvalidPML4E)\\\n mapM_x (swp store_pml4e pml4e) slots \\\\_. invs\\\"\n by (simp add: mapM_x_mapM | wp mapM_swp_store_pml4e_invs_unmap)+\n\n(* FIXME: move *)\nlemma vs_cap_ref_table_cap_ref_None:\n \"vs_cap_ref x = None \\ table_cap_ref x = None\"\n by (simp add: vs_cap_ref_def table_cap_ref_simps\n split: cap.splits arch_cap.splits)\n\n(* FIXME: move *)\nlemma master_cap_eq_is_pg_cap_eq:\n \"cap_master_cap c = cap_master_cap d \\ is_pg_cap c = is_pg_cap d\"\n by (simp add: cap_master_cap_def is_pg_cap_def\n split: cap.splits arch_cap.splits)\n\n(* FIXME: move *)\nlemma master_cap_eq_is_device_cap_eq:\n \"cap_master_cap c = cap_master_cap d \\ cap_is_device c = cap_is_device d\"\n by (simp add: cap_master_cap_def\n split: cap.splits arch_cap.splits)\n\n(* FIXME: move *)\nlemmas vs_cap_ref_eq_imp_table_cap_ref_eq' =\n vs_cap_ref_eq_imp_table_cap_ref_eq[OF master_cap_eq_is_pg_cap_eq]\n\nlemma arch_update_cap_invs_map:\n \"\\cte_wp_at (is_arch_update cap and\n (\\c. \\r. vs_cap_ref c = Some r \\ vs_cap_ref cap = Some r)) p\n and invs and valid_cap cap\\\n set_cap cap p\n \\\\rv. invs\\\"\n apply (simp add: invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp arch_update_cap_pspace arch_update_cap_valid_mdb set_cap_idle\n update_cap_ifunsafe valid_irq_node_typ set_cap_typ_at\n set_cap_irq_handlers set_cap_valid_arch_caps set_cap_ioports_no_new_ioports\n set_cap_cap_refs_respects_device_region_spec[where ptr = p])\n apply (clarsimp simp: cte_wp_at_caps_of_state\n simp del: imp_disjL)\n apply (frule(1) valid_global_refsD2)\n apply (frule(1) cap_refs_in_kernel_windowD)\n apply (clarsimp simp: is_cap_simps is_arch_update_def\n simp del: imp_disjL)\n apply (frule master_cap_cap_range, simp del: imp_disjL)\n apply (thin_tac \"cap_range a = cap_range b\" for a b)\n apply (rule conjI)\n apply (fastforce simp:is_valid_vtable_root_def vs_cap_ref_def split:arch_cap.splits vmpage_size.splits option.splits)\n apply (rule conjI)\n apply (rule ext)\n apply (simp add: cap_master_cap_def split: cap.splits arch_cap.splits)\n apply (rule context_conjI)\n apply (simp add: appropriate_cte_cap_irqs)\n apply (clarsimp simp: cap_irqs_def cap_irq_opt_def cap_master_cap_def\n split: cap.split)\n apply (rule conjI)\n apply (drule(1) if_unsafe_then_capD [OF caps_of_state_cteD])\n apply (clarsimp simp: cap_master_cap_def)\n apply (erule ex_cte_cap_wp_to_weakenE)\n apply (clarsimp simp: appropriate_cte_cap_def cap_master_cap_def\n split: cap.split_asm)\n apply (rule conjI)\n apply (frule master_cap_obj_refs)\n apply (clarsimp simp: cap_ioports_def cap_master_cap_def split: arch_cap.splits cap.splits)\n apply (rule conjI, frule master_cap_obj_refs, simp)\n apply (rule conjI)\n apply (frule master_cap_obj_refs)\n apply (case_tac \"table_cap_ref capa =\n table_cap_ref (ArchObjectCap a)\")\n apply (frule unique_table_refs_no_cap_asidE[where S=\"{p}\"])\n apply (simp add: valid_arch_caps_def)\n apply (simp add: no_cap_to_obj_with_diff_ref_def Ball_def)\n apply (case_tac \"table_cap_ref capa\")\n apply clarsimp\n apply (erule no_cap_to_obj_with_diff_ref_map,\n simp_all)[1]\n apply (clarsimp simp: table_cap_ref_def cap_master_cap_simps\n is_cap_simps\n split: cap.split_asm arch_cap.split_asm\n dest!: cap_master_cap_eqDs)\n apply (simp add: valid_arch_caps_def)\n apply (simp add: valid_pspace_def)\n apply (erule swap)\n apply (erule vs_cap_ref_eq_imp_table_cap_ref_eq'[symmetric])\n apply (frule table_cap_ref_vs_cap_ref_Some)\n apply simp\n apply (rule conjI)\n apply (clarsimp simp del: imp_disjL)\n apply ((erule disjE |\n ((clarsimp simp: is_cap_simps cap_master_cap_simps\n cap_asid_def vs_cap_ref_def\n dest!: cap_master_cap_eqDs\n split: option.split_asm prod.split_asm),\n drule valid_table_capsD[OF caps_of_state_cteD],\n (clarsimp simp: invs_def valid_state_def valid_arch_caps_def is_cap_simps\n cap_asid_def)+))+)[1]\n apply (clarsimp simp: is_cap_simps is_pt_cap_def cap_master_cap_simps\n cap_asid_def vs_cap_ref_def ranI\n dest!: cap_master_cap_eqDs split: option.split_asm if_split_asm\n elim!: ranE\n cong: master_cap_eq_is_device_cap_eq\n | rule conjI)+\n apply (clarsimp dest!: master_cap_eq_is_device_cap_eq)\n done\n\nlemma arch_update_cap_invs_unmap_page:\n \"\\(\\s. cte_wp_at (\\c. (\\p'\\obj_refs c. \\ref. vs_cap_ref c = Some ref \\ \\ (ref \\ p') s) \\ is_arch_update cap c) p s)\n and invs and valid_cap cap\n and K (is_pg_cap cap)\\\n set_cap cap p\n \\\\rv. invs\\\"\n apply (simp add: invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp arch_update_cap_pspace arch_update_cap_valid_mdb set_cap_idle\n update_cap_ifunsafe valid_irq_node_typ set_cap_typ_at\n set_cap_irq_handlers set_cap_valid_arch_caps set_cap_ioports_no_new_ioports\n set_cap_cap_refs_respects_device_region_spec[where ptr = p])\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_caps_of_state is_arch_update_def\n is_cap_simps cap_master_cap_simps\n fun_eq_iff appropriate_cte_cap_irqs\n is_pt_cap_def is_valid_vtable_root_def\n dest!: cap_master_cap_eqDs\n simp del: imp_disjL)\n apply (rule conjI)\n apply (drule(1) if_unsafe_then_capD [OF caps_of_state_cteD])\n apply (clarsimp simp: cap_master_cap_def)\n apply (erule ex_cte_cap_wp_to_weakenE)\n apply (clarsimp simp: appropriate_cte_cap_def)\n apply (rule conjI)\n apply (drule valid_global_refsD2, clarsimp)\n subgoal by (simp add: cap_range_def)\n apply (rule conjI[rotated])\n apply (frule(1) cap_refs_in_kernel_windowD)\n apply (simp add: cap_range_def)\n apply (drule unique_table_refs_no_cap_asidE[where S=\"{p}\"])\n apply (simp add: valid_arch_caps_def)\n apply (simp add: no_cap_to_obj_with_diff_ref_def table_cap_ref_def Ball_def)\n done\n\nlemma arch_update_cap_invs_unmap_page_table:\n \"\\cte_wp_at (is_arch_update cap) p\n and invs and valid_cap cap\n and (\\s. cte_wp_at (\\c. is_final_cap' c s) p s)\n and obj_at (empty_table {}) (obj_ref_of cap)\n and (\\s. cte_wp_at (\\c. \\r. vs_cap_ref c = Some r\n \\ \\ (r \\ obj_ref_of cap) s) p s)\n and K (is_pt_cap cap \\ vs_cap_ref cap = None)\\\n set_cap cap p\n \\\\rv. invs\\\"\n apply (simp add: invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp arch_update_cap_pspace arch_update_cap_valid_mdb set_cap_idle\n update_cap_ifunsafe valid_irq_node_typ set_cap_typ_at\n set_cap_irq_handlers set_cap_valid_arch_caps set_cap_ioports_no_new_ioports\n set_cap_cap_refs_respects_device_region_spec[where ptr = p])\n apply (simp add: final_cap_at_eq)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_arch_update_def\n is_cap_simps cap_master_cap_simps is_valid_vtable_root_def\n appropriate_cte_cap_irqs is_pt_cap_def\n fun_eq_iff[where f=\"cte_refs cap\" for cap]\n dest!: cap_master_cap_eqDs\n simp del: imp_disjL)\n apply (rule conjI)\n apply (drule(1) if_unsafe_then_capD [OF caps_of_state_cteD])\n apply (clarsimp simp: cap_master_cap_def)\n apply (erule ex_cte_cap_wp_to_weakenE)\n apply (clarsimp simp: appropriate_cte_cap_def)\n apply (rule conjI)\n apply (drule valid_global_refsD2, clarsimp)\n apply (simp add: cap_range_def)\n apply (frule(1) cap_refs_in_kernel_windowD)\n apply (simp add: cap_range_def gen_obj_refs_def image_def)\n apply (intro conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply fastforce\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm)\n apply clarsimp\n apply fastforce\n done\n\nlemma arch_update_cap_invs_unmap_page_directory:\n \"\\cte_wp_at (is_arch_update cap) p\n and invs and valid_cap cap\n and (\\s. cte_wp_at (\\c. is_final_cap' c s) p s)\n and obj_at (empty_table {}) (obj_ref_of cap)\n and (\\s. cte_wp_at (\\c. \\r. vs_cap_ref c = Some r\n \\ \\ (r \\ obj_ref_of cap) s) p s)\n and K (is_pd_cap cap \\ vs_cap_ref cap = None)\\\n set_cap cap p\n \\\\rv. invs\\\"\n apply (simp add: invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp arch_update_cap_pspace arch_update_cap_valid_mdb set_cap_idle\n update_cap_ifunsafe valid_irq_node_typ set_cap_typ_at\n set_cap_irq_handlers set_cap_valid_arch_caps set_cap_ioports_no_new_ioports\n set_cap_cap_refs_respects_device_region_spec[where ptr = p])\n apply (simp add: final_cap_at_eq)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_arch_update_def\n is_cap_simps cap_master_cap_simps is_valid_vtable_root_def\n appropriate_cte_cap_irqs is_pt_cap_def\n fun_eq_iff[where f=\"cte_refs cap\" for cap]\n dest!: cap_master_cap_eqDs\n simp del: imp_disjL)\n apply (rule conjI)\n apply (drule(1) if_unsafe_then_capD [OF caps_of_state_cteD])\n apply (clarsimp simp: cap_master_cap_def)\n apply (erule ex_cte_cap_wp_to_weakenE)\n apply (clarsimp simp: appropriate_cte_cap_def)\n apply (rule conjI)\n apply (drule valid_global_refsD2, clarsimp)\n apply (simp add: cap_range_def)\n apply (frule(1) cap_refs_in_kernel_windowD)\n apply (simp add: cap_range_def gen_obj_refs_def image_def)\n apply (intro conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply fastforce\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm)\n apply clarsimp\n apply fastforce\n done\n\nlemma arch_update_cap_invs_unmap_pd_pointer_table:\n \"\\cte_wp_at (is_arch_update cap) p\n and invs and valid_cap cap\n and (\\s. cte_wp_at (\\c. is_final_cap' c s) p s)\n and obj_at (empty_table {}) (obj_ref_of cap)\n and (\\s. cte_wp_at (\\c. \\r. vs_cap_ref c = Some r\n \\ \\ (r \\ obj_ref_of cap) s) p s)\n and K (is_pdpt_cap cap \\ vs_cap_ref cap = None)\\\n set_cap cap p\n \\\\rv. invs\\\"\n apply (simp add: invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp arch_update_cap_pspace arch_update_cap_valid_mdb set_cap_idle\n update_cap_ifunsafe valid_irq_node_typ set_cap_typ_at\n set_cap_irq_handlers set_cap_valid_arch_caps set_cap_ioports_no_new_ioports\n set_cap_cap_refs_respects_device_region_spec[where ptr = p])\n apply (simp add: final_cap_at_eq)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_arch_update_def\n is_cap_simps cap_master_cap_simps is_valid_vtable_root_def\n appropriate_cte_cap_irqs is_pt_cap_def\n fun_eq_iff[where f=\"cte_refs cap\" for cap]\n dest!: cap_master_cap_eqDs\n simp del: imp_disjL)\n apply (rule conjI)\n apply (drule(1) if_unsafe_then_capD [OF caps_of_state_cteD])\n apply (clarsimp simp: cap_master_cap_def)\n apply (erule ex_cte_cap_wp_to_weakenE)\n apply (clarsimp simp: appropriate_cte_cap_def)\n apply (rule conjI)\n apply (drule valid_global_refsD2, clarsimp)\n apply (simp add: cap_range_def)\n apply (frule(1) cap_refs_in_kernel_windowD)\n apply (simp add: cap_range_def gen_obj_refs_def image_def)\n apply (intro conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply fastforce\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm)\n apply clarsimp\n apply fastforce\n done\n\nlemma invalidateTLBEntry_underlying_memory:\n \"\\\\m'. underlying_memory m' p = um\\\n invalidateTLBEntry a\n \\\\_ m'. underlying_memory m' p = um\\\"\n by (simp add: invalidateTLBEntry_def machine_op_lift_underlying_memory)\n\nlemmas invalidateTLBEntry_irq_masks = no_irq[OF no_irq_invalidateTLBEntry]\n\ncrunch device_state_inv[wp]: invalidateTLBEntry \"\\ms. P (device_state ms)\"\n (ignore: ignore_failure)\n\nlemma dmo_invalidateTLBEntry_invs[wp]:\n \"\\invs\\ do_machine_op (invalidateTLBEntry a) \\\\_. invs\\\"\n by (simp add: invalidateTLBEntry_def do_machine_op_lift_invs)\n\ncrunch device_state[wp]: invalidateTranslationSingleASID \"\\ms. P (device_state ms)\"\n\nlemma invalidatePageStructureCache_invs[wp]:\n \"\\invs\\ do_machine_op (invalidateTranslationSingleASID a b)\\\\_. invs\\\"\n by (simp add: invalidateTranslationSingleASID_def do_machine_op_lift_invs)\n\nlemma flush_table_invs[wp]:\n \"\\invs\\ flush_table pm vaddr pt vspace \\\\rv. invs\\\"\n by (wp mapM_x_wp_inv_weak get_cap_wp | wpc | simp add: flush_table_def)+\n\ncrunch vs_lookup[wp]: flush_table \"\\s. P (vs_lookup s)\"\n (wp: mapM_x_wp_inv_weak get_cap_wp simp: crunch_simps)\n\ncrunch cte_wp_at[wp]: flush_table \"\\s. P (cte_wp_at P' p s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps)\n\nlemma global_refs_arch_update_eq:\n \"\\ x64_global_pml4 (f (arch_state s)) = x64_global_pml4 (arch_state s);\n x64_global_pdpts (f (arch_state s)) = x64_global_pdpts (arch_state s);\n x64_global_pds (f (arch_state s)) = x64_global_pds (arch_state s);\n x64_global_pts (f (arch_state s)) = x64_global_pts (arch_state s)\\\n \\ global_refs (arch_state_update f s) = global_refs s\"\n by (simp add: global_refs_def)\n\ncrunch global_refs_inv[wp]: flush_table \"\\s. P (global_refs s)\"\n (wp: mapM_x_wp_inv_weak crunch_wps simp: crunch_simps global_refs_arch_update_eq)\n\nlemma lookup_pml4_slot_kernel_mappings:\n \"\\vptr < pptr_base; canonical_address vptr; is_aligned pml4 pml4_bits\\\n \\ ucast (lookup_pml4_slot pml4 vptr && mask pml4_bits >> word_size_bits) \\ kernel_mapping_slots\"\n by (simp add: less_kernel_base_mapping_slots)\n\nlemma not_in_global_refs_vs_lookup:\n \"(\\\\ p) s \\ valid_vs_lookup s \\ valid_global_refs s\n \\ valid_arch_state s \\ valid_global_objs s\n \\ p \\ global_refs s\"\n apply (clarsimp dest!: valid_vs_lookupD[OF vs_lookup_pages_vs_lookupI])\n apply (drule(1) valid_global_refsD2)\n apply (simp add: cap_range_def)\n apply blast\n done\n\nlemma flush_all_invs[wp]:\n \"\\invs\\ flush_all vspace asid \\\\_. invs\\\"\n by (simp add: flush_all_def invalidateASID_def do_machine_op_lift_invs)\n\nlemma valid_asid_table_inverse_injD:\n \"\\(a,b) \\ vs_asid_refs (x64_asid_table (arch_state s)); (a,c) \\ vs_asid_refs (x64_asid_table (arch_state s))\\\n \\ c = b\"\n by (clarsimp simp: vs_asid_refs_def graph_of_def valid_asid_table_def up_ucast_inj_eq)\n\nlemma valid_asid_table_injD:\n \"\\(b,a) \\ vs_asid_refs (x64_asid_table (arch_state s)); (c,a) \\ vs_asid_refs (x64_asid_table (arch_state s));\n valid_asid_table (x64_asid_table (arch_state s)) s\\\n \\ c = b\"\n apply (clarsimp simp: vs_asid_refs_def graph_of_def valid_asid_table_def up_ucast_inj_eq)\n apply (drule(2) inj_on_domD,fastforce)\n done\n\nlemma update_aobj_not_reachable:\n \"\\\\s. lookup_refs (Some (ArchObj aobj)) vs_lookup_pages1_on_heap_obj \\ lookup_refs (kheap s p) vs_lookup_pages1_on_heap_obj\n \\ (b, p) \\ (vs_lookup_pages s) \\ (VSRef offset (Some ty), ptr) \\ vs_refs_pages (ArchObj aobj)\n \\ valid_asid_table (x64_asid_table (arch_state s)) s\\\n set_object p\n (ArchObj aobj)\n \\\\yb s. ([VSRef offset (Some ty)] @ b, ptr) \\ vs_lookup_pages s\\\"\n apply (simp add: set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: vs_lookup_pages_def)\n apply (erule rtranclE[where b = \"(VSRef offset (Some ty) # b, ptr)\"])\n apply (clarsimp simp: vs_asid_refs_def)\n apply (case_tac y, clarsimp)\n apply (cut_tac s1 = s in lookup_bound_estimate[OF vs_lookup_pages1_is_wellformed_lookup, rotated -1])\n apply (simp add: Image_def)\n apply (rule_tac x = \"(aa, baa)\" in bexI[rotated])\n apply assumption\n apply (simp add: fun_upd_def[symmetric])\n apply (rule_tac s4 = s in vs_lookup_pages1_is_wellformed_lookup[where s = \"s\\kheap := kheap s(p \\ ArchObj aobj)\\\" for s\n ,simplified])\n apply (clarsimp simp: lookup_refs_def vs_lookup_pages1_on_heap_obj_def vs_refs_pages_def image_def obj_at_def\n graph_of_def pde_ref_pages_def Image_def split: if_split_asm pde.split_asm)\n apply (clarsimp dest!: vs_lookup_pages1D)\n apply (subgoal_tac \"p = pa\")\n apply (clarsimp simp: obj_at_def)\n apply (subgoal_tac \"a = ab\")\n apply simp\n apply (drule valid_asid_table_inverse_injD)\n apply simp\n apply simp\n apply (erule wellformed_lookup.lookupable_is_unique[OF vs_lookup_pages1_is_wellformed_lookup])\n apply simp\n apply (clarsimp simp: vs_lookup_pages_def vs_asid_refs_def\n dest!: wellformed_lookup.lookup_ref_step[OF vs_lookup_pages1_is_wellformed_lookup] vs_lookup_pages1D)\n done\n\nlemma lookup_refs_pdpt_shrink_strg:\n \"ko_at (ArchObj (PDPointerTable pdpt)) ptr s \\\n lookup_refs (Some (ArchObj (PDPointerTable (pdpt(slot := InvalidPDPTE))))) vs_lookup_pages1_on_heap_obj\n \\ lookup_refs (kheap s ptr) vs_lookup_pages1_on_heap_obj\"\n by (clarsimp simp: obj_at_def lookup_refs_def vs_lookup_pages1_on_heap_obj_def\n vs_refs_pages_def graph_of_def pdpte_ref_pages_def image_def\n split: if_splits)\n\nlemma lookup_refs_pd_shrink_strg:\n \"ko_at (ArchObj (PageDirectory pd)) ptr s \\\n lookup_refs (Some (ArchObj (PageDirectory (pd(slot := InvalidPDE))))) vs_lookup_pages1_on_heap_obj\n \\ lookup_refs (kheap s ptr) vs_lookup_pages1_on_heap_obj\"\n by (clarsimp simp: obj_at_def lookup_refs_def vs_lookup_pages1_on_heap_obj_def\n vs_refs_pages_def graph_of_def pdpte_ref_pages_def image_def\n split: if_splits)\n\nlemma lookup_refs_pt_shrink_strg:\n \"ko_at (ArchObj (PageTable pt)) ptr s \\\n lookup_refs (Some (ArchObj (PageTable (pt(slot := InvalidPTE))))) vs_lookup_pages1_on_heap_obj\n \\ lookup_refs (kheap s ptr) vs_lookup_pages1_on_heap_obj\"\n by (clarsimp simp: obj_at_def lookup_refs_def vs_lookup_pages1_on_heap_obj_def\n vs_refs_pages_def graph_of_def pte_ref_pages_def image_def\n split: if_splits)\n\ncrunch vs_lookup_pages[wp]: flush_all \"\\s. P (vs_lookup_pages s)\"\ncrunch obj_at[wp]: flush_all \"\\s. P (obj_at Q q s)\"\ncrunch valid_arch_state[wp]: flush_all \"\\s. valid_arch_state s\"\n\ncrunch vs_lookup_pages[wp]: flush_table \"\\s. P (vs_lookup_pages s)\"\n (wp: mapM_x_wp_inv_weak get_cap_wp simp: flush_table_def)\n\ncrunch obj_at[wp]: flush_table \"\\s. P (obj_at Q q s)\"\n (wp: mapM_x_wp_inv_weak get_cap_wp simp: flush_table_def)\n\ncrunch valid_arch_state[wp]: flush_table \"\\s. valid_arch_state s\"\n (wp: mapM_x_wp_inv_weak get_cap_wp simp: flush_table_def)\n\nlemma valid_arch_state_asid_table_strg:\n \"valid_arch_state s \\ valid_asid_table (x64_asid_table (arch_state s)) s\"\n by (simp add: valid_arch_state_def)\n\nlemma not_in_vs_refs_pages_strg:\n \"ptr = ucast ptr' \\ (VSRef ptr (Some APDPointerTable), pd)\n \\ vs_refs_pages (ArchObj (PDPointerTable (pda(ptr' := InvalidPDPTE))))\"\n by (clarsimp simp: vs_refs_pages_def graph_of_def pdpte_ref_pages_def)\n\nlemma vs_lookup_pages_current_cr3[iff]:\n \"(vs_lookup_pages (s\\arch_state := arch_state s\\x64_current_cr3 := p\\\\)) =\n vs_lookup_pages s\"\n by (simp add: vs_lookup_pages_arch_update)\n\ncrunch vs_lookup_pages[wp]: invalidate_page_structure_cache_asid \"\\s. P (vs_lookup_pages s)\"\n (simp: crunch_simps wp: crunch_wps)\n\nlemma vs_ref_pages_simps:\n \"vs_refs_pages (ArchObj aobj) = vs_refs_pages_arch aobj\"\n by (simp add: vs_refs_pages_def)\n\nlemma pml4e_ref_pages_SomeD:\n \"pml4e_ref_pages c = Some b \\ \\x21 x22 x23. c = PDPointerTablePML4E x21 x22 x23 \\ b = ptrFromPAddr x21\"\n by (clarsimp simp: pml4e_ref_pages_def split: pml4e.split_asm)\n\nlemma get_pml4_index_bit_def:\n \"get_pml4_index vaddr = (vaddr >> 39) && mask 9\"\n by (simp add: get_pml4_index_def bit_simps)\n\nlemma get_pdpt_index_bit_def:\n \"get_pdpt_index vaddr = (vaddr >> 30) && mask 9\"\n by (simp add: get_pdpt_index_def bit_simps)\n\nlemma get_pd_index_bit_def:\n \"get_pd_index vaddr = (vaddr >> 21) && mask 9\"\n by (simp add: get_pd_index_def bit_simps)\n\nlemma obj_bits_from_vs_refs_pagesD:\n \"(VSRef A (Some G), pd) \\ vs_refs_pages ko \\ if G = AASIDPool then obj_bits ko = pageBits else obj_bits ko = table_size\"\n by (clarsimp simp: vs_refs_pages_def split: kernel_object.split_asm arch_kernel_obj.split_asm option.splits\n dest!: graph_ofD)\n\nlemma vs_lookup_pages1I:\n \"\\ko_at ko p s; (r, q) \\ vs_refs_pages ko\\ \\ ((a,p),r # a, q) \\ vs_lookup_pages1 s\"\n by (clarsimp simp: vs_lookup_pages1_def obj_at_def)\n\nlemma asid_pool_refs_pagesD:\n \"pool (asid_low_bits_of asid) = Some pml4\n \\ (VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), pml4) \\ vs_refs_pages (ArchObj (ASIDPool pool))\"\n by (clarsimp simp: vs_refs_pages_def graph_of_def image_def)\n\nlemma asid_pool_refsD:\n \"pool (asid_low_bits_of asid) = Some xa\n \\ (VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool) ,xa) \\ vs_refs (ArchObj (ASIDPool pool))\"\n by (clarsimp simp: vs_refs_def graph_of_def image_def)\n\nlemma context_vs_lookup_pages_step:\n \"\\(ref \\ p) s \\ ((ref, p), ref', p') \\ vs_lookup_pages1 s; (ref \\ p) s\\\n \\ (ref' \\ p') s\"\n apply (rule vs_lookup_pages_step)\n apply (intro vs_lookup_pages_vs_lookupI | simp)+\n done\n\nlemma context_vs_lookup_step:\n \"\\(ref \\ p) s \\ ((ref, p), ref', p') \\ vs_lookup1 s; (ref \\ p) s\\\n \\ (ref' \\ p') s\"\n apply (rule vs_lookup_step)\n apply (intro vs_lookup_pages_vs_lookupI | simp)+\n done\n\nlemmas entry_ref_pages_simps = pdpte_ref_pages_def[split_simps pdpte.split] pte_ref_pages_def[split_simps pte.split]\n pml4e_ref_pages_def[split_simps pml4e.split]\n pde_ref_pages_def[split_simps pde.split]\n\nmethod rewrite_lookup_when_aligned\n = (match premises in M: \"P (lookup_pml4_slot p _)\" and L: \"pspace_aligned s\"\n and KS : \"kheap s p = Some _\" for s p P \\ \\rule revcut_rl[OF pspace_alignedD[OF KS L]]\\\n , clarsimp simp: pml4_bits_def pml4_shifting[folded lookup_pml4_slot_def[unfolded Let_def], unfolded pml4_bits_def])\n | (match premises in M: \"P (p + _)\" and L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APDPointerTable) p s\" for s p P \\ \\rule revcut_rl[OF is_aligned_pdpt[OF TP L]]\\\n , clarsimp simp: pdpt_bits_def pdpt_shifting[folded lookup_pdpt_slot_def[unfolded Let_def], unfolded pdpt_bits_def])\n | (match conclusion in \"P ((p::64 word) + _ && ~~ mask pdpt_bits)\" for p P \\ \\(match premises in L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APDPointerTable) p s\" for s \\ \\rule revcut_rl[OF is_aligned_pdpt[OF TP L]]\\\n , clarsimp simp: pdpt_bits_def pdpt_shifting[folded lookup_pdpt_slot_def[unfolded Let_def], unfolded pdpt_bits_def])\\)\n | (match premises in M: \"P (p + _)\" and L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APageDirectory) p s\" for s p P \\ \\rule revcut_rl[OF is_aligned_pd[OF TP L]]\\\n , clarsimp simp: pd_bits_def pd_shifting[folded lookup_pd_slot_def[unfolded Let_def], unfolded pd_bits_def])\n | (match conclusion in \"P ((p::64 word) + _ && ~~ mask pd_bits)\" for p P \\ \\(match premises in L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APageDirectory) p s\" for s \\ \\rule revcut_rl[OF is_aligned_pd[OF TP L]]\\\n , clarsimp simp: pd_bits_def pd_shifting[folded lookup_pd_slot_def[unfolded Let_def], unfolded pd_bits_def])\\)\n\n | (match premises in M: \"P (p + _)\" and L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APageTable) p s\" for s p P \\ \\rule revcut_rl[OF is_aligned_pt[OF TP L]]\\\n , clarsimp simp: pt_bits_def pt_shifting[folded lookup_pt_slot_def[unfolded Let_def], unfolded pt_bits_def])\n | (match conclusion in \"P ((p::64 word) + _ && ~~ mask pt_bits)\" for p P \\ \\(match premises in L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APageTable) p s\" for s \\ \\rule revcut_rl[OF is_aligned_pt[OF TP L]]\\\n , clarsimp simp: pt_bits_def pt_shifting[folded lookup_pt_slot_def[unfolded Let_def], unfolded pt_bits_def])\\)\n\n | (match premises in M: \"P (lookup_pml4_slot p _)\" and L: \"pspace_aligned s\"\n and TP : \"typ_at (AArch APageMapL4) p s\" for s p P \\ \\rule revcut_rl[OF is_aligned_pml4[OF TP L]]\\\n , clarsimp simp: pml4_bits_def pml4_shifting[folded lookup_pml4_slot_def[unfolded Let_def], unfolded pml4_bits_def])\n\nlemma valid_vspace_objs_asidpoolD:\n \"\\valid_vspace_obj (ASIDPool pool) s; pool (asid_low_bits_of asid) = Some x\\ \\ typ_at (AArch APageMapL4) x s\"\n by fastforce\n\nlemma vs_refs_get_pml4_index:\n \"\\pm (ucast (get_pml4_index vaddr)) = PDPointerTablePML4E a b c; vaddr < pptr_base; canonical_address vaddr\\\n \\ (VSRef (get_pml4_index vaddr) (Some APageMapL4), ptrFromPAddr a) \\ vs_refs (ArchObj (PageMapL4 pm))\"\n apply (clarsimp simp: vs_refs_def graph_of_def image_def)\n apply (drule(1) kernel_base_kernel_mapping_slots)\n apply (intro exI conjI)\n apply assumption\n apply (clarsimp simp: pml4e_ref_def get_pml4_index_def pml4_shift_bits_def bit_simps)\n apply word_bitwise\n apply (clarsimp simp: mask_def)\n done\n\nlemma vs_refs_pages_pdpt:\n \"\\pdpte_ref_pages (pdpta a) = Some pd\\ \\ (VSRef (ucast a) (Some APDPointerTable),pd) \\ vs_refs_pages (ArchObj (PDPointerTable pdpta))\"\n by (clarsimp simp: vs_refs_pages_def image_def graph_of_def)\n\nlemma vs_refs_get_pdpt_index:\n \"\\pdpt (ucast (get_pdpt_index vaddr)) = PageDirectoryPDPTE a b c\\\n \\ (VSRef (get_pdpt_index vaddr) (Some APDPointerTable), ptrFromPAddr a) \\ vs_refs (ArchObj (PDPointerTable pdpt))\"\n apply (clarsimp simp: vs_refs_def graph_of_def image_def)\n apply (rule_tac x = \"ucast (get_pdpt_index vaddr)\" in exI)\n apply (clarsimp simp: pdpte_ref_def)\n apply (clarsimp simp: get_pdpt_index_def bit_simps)\n apply word_bitwise\n apply (clarsimp simp: mask_def)\n done\n\nlemma vs_refs_get_pd_index:\n \"\\pd (ucast (get_pd_index vaddr)) = PageTablePDE pt a b\\\n \\ (VSRef (get_pd_index vaddr) (Some APageDirectory), (ptrFromPAddr pt)) \\ vs_refs (ArchObj (PageDirectory pd))\"\n apply (clarsimp simp: vs_refs_def graph_of_def image_def)\n apply (rule_tac x = \"(ucast (get_pd_index vaddr))\" in exI)\n apply (clarsimp simp: pdpte_ref_def)\n apply (clarsimp simp: get_pd_index_def bit_simps)\n apply word_bitwise\n apply (clarsimp simp: mask_def)\n done\n\nlemma valid_vspace_objs_pml4D:\n \"\\valid_vspace_obj (PageMapL4 pm) s; pm (ucast (get_pml4_index vaddr)) = PDPointerTablePML4E a b c;\n vaddr < pptr_base; canonical_address vaddr\\ \\ typ_at (AArch APDPointerTable) (ptrFromPAddr a) s\"\n apply (clarsimp)\n apply (drule bspec)\n apply (drule kernel_base_kernel_mapping_slots, simp+)\n done\n\nlemma valid_vspace_objs_pdptD:\n \"\\valid_vspace_obj (PDPointerTable pdpt) s; pdpt x = PageDirectoryPDPTE a b c\\\n \\ typ_at (AArch APageDirectory) (ptrFromPAddr a) s\"\n apply (clarsimp)\n apply (drule_tac x = x in spec)\n apply fastforce\n done\n\nlemma valid_vspace_objs_pdD:\n \"\\valid_vspace_obj (PageDirectory pd) s; pd x = PageTablePDE a b c\\\n \\ typ_at (AArch APageTable) (ptrFromPAddr a) s\"\n apply (clarsimp)\n apply (drule_tac x = x in spec)\n apply fastforce\n done\n\nlemma valid_vspace_objs_largePage:\n \"\\valid_vspace_obj (PageDirectory pd) s; pd x = LargePagePDE a b c; ko_at ko (ptrFromPAddr a) s\\\n \\ vs_refs_pages ko = {}\"\n apply (clarsimp)\n apply (drule_tac x = x in spec)\n apply clarsimp\n apply (auto simp: data_at_def obj_at_def vs_refs_pages_def)\n done\n\nlemma valid_vspace_objs_hugePage:\n \"\\valid_vspace_obj (PDPointerTable pdpt) s; pdpt x = HugePagePDPTE a b c; ko_at ko (ptrFromPAddr a) s\\\n \\ vs_refs_pages ko = {}\"\n apply (clarsimp)\n apply (drule_tac x = x in spec)\n apply clarsimp\n apply (auto simp: data_at_def obj_at_def vs_refs_pages_def)\n done\n\nlemma ucast_ucast_get_index_simps[simp]:\n \"(ucast (ucast (get_pml4_index vaddr):: 9 word)) = get_pml4_index vaddr\"\n \"(ucast (ucast (get_pdpt_index vaddr):: 9 word)) = get_pdpt_index vaddr\"\n \"(ucast (ucast (get_pd_index vaddr):: 9 word)) = get_pd_index vaddr\"\n \"(ucast (ucast (get_pt_index vaddr):: 9 word)) = get_pt_index vaddr\"\n by (auto simp: get_pdpt_index_def get_pd_index_def get_pt_index_def get_pml4_index_def bit_simps mask_def ucast_ucast_mask)\n\n\nmethod extract_vs_lookup =\n (match premises in at[thin]: \"x64_asid_table (arch_state s) a = Some p\" for s a p \\ \\rule revcut_rl[OF vs_lookup_atI[OF at]]\\)\n | (match premises in path[thin]: \"(_ \\ p) s\"\n and ko_at: \"ko_at (ArchObj (ASIDPool pool)) p s\"\n and pool: \"pool _ = Some _\"\n and vs : \"valid_vspace_objs s\" for pool p s\n \\ \\cut_tac vs_lookup_step[OF path vs_lookup1I[OF ko_at asid_pool_refsD refl], OF pool]\n , cut_tac valid_vspace_objs_asidpoolD[OF valid_vspace_objsD,OF path ko_at vs pool]\\)\n | (match premises in path[thin]: \"(_ \\ p) s\"\n and ko_at: \"ko_at (ArchObj (PageMapL4 pm)) p s\"\n and pm: \"pm _ = _\"\n and vaddr: \"vaddr < pptr_base\"\n and cano: \"canonical_address vaddr\"\n and vs : \"valid_vspace_objs s\" for pm p s vaddr\n \\ \\cut_tac vs_lookup_step[OF path vs_lookup1I[OF ko_at vs_refs_get_pml4_index refl],OF pm vaddr cano]\n , cut_tac valid_vspace_objs_pml4D[OF valid_vspace_objsD,OF path ko_at vs pm vaddr cano]\\)\n | (match premises in path[thin]: \"(_ \\ p) s\"\n and ko_at: \"ko_at (ArchObj (PDPointerTable pdpt)) p s\"\n and pdpt: \"pdpt (ucast (_::word64)) = PageDirectoryPDPTE _ _ _\"\n and vs : \"valid_vspace_objs s\" for pdpt p s\n \\ \\cut_tac vs_lookup_step[OF path vs_lookup1I[OF ko_at vs_refs_get_pdpt_index refl],OF pdpt]\n , cut_tac valid_vspace_objs_pdptD[OF valid_vspace_objsD,OF path ko_at vs pdpt]\\)\n | (match premises in path[thin]: \"(_ \\ p) s\"\n and ko_at: \"ko_at (ArchObj (PageDirectory pd)) p s\"\n and pd: \"pd (ucast (_::word64)) = PageTablePDE _ _ _\"\n and vs : \"valid_vspace_objs s\" for pd p s\n \\ \\cut_tac vs_lookup_step[OF path vs_lookup1I[OF ko_at vs_refs_get_pd_index refl],OF pd]\n , cut_tac valid_vspace_objs_pdD[OF valid_vspace_objsD,OF path ko_at vs pd]\\)\n\nlemma in_vs_asid_refsD:\n \"(a,b)\\ vs_asid_refs table \\ \\p. table p = Some b \\ a = [VSRef (ucast p) None]\"\n by (fastforce simp: vs_asid_refs_def dest!: graph_ofD)\n\nlemma lookup_refs_pml4_shrink_strg:\n \"ko_at (ArchObj (PageMapL4 pm)) ptr s \\\n lookup_refs (Some (ArchObj (PageMapL4 (pm(slot := InvalidPML4E))))) vs_lookup_pages1_on_heap_obj\n \\ lookup_refs (kheap s ptr) vs_lookup_pages1_on_heap_obj\"\n by (fastforce simp: obj_at_def lookup_refs_def vs_lookup_pages1_on_heap_obj_def\n vs_refs_pages_def graph_of_def pml4e_ref_pages_def image_def\n split: if_splits)\n\nlemma vs_refs_pages_pml4:\n \"\\pml4e_ref_pages (pml4a a) = Some pdpt; a \\ kernel_mapping_slots\\ \\ (VSRef (ucast a) (Some APageMapL4),pdpt) \\ vs_refs_pages (ArchObj (PageMapL4 pml4a))\"\n by (clarsimp simp: vs_refs_pages_def image_def graph_of_def)\n\nlemma lookup_pml4_slot_mask:\n \"is_aligned a table_size \\ lookup_pml4_slot a b && mask pml4_bits = (get_pml4_index b << word_size_bits)\"\n apply (simp add: lookup_pml4_slot_def is_aligned_mask bit_simps)\n apply (simp add: mask_inner_mask[symmetric])\n apply (simp add: get_pml4_index_def bit_simps mask_def)\n apply (word_bitwise)\n done\n\nlemma unmap_pdpt_vs_lookup_pages_pre:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and typ_at (AArch APDPointerTable) pdpt\n and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_pdpt asid vaddr pdpt\n \\\\r s. (the (vs_cap_ref (ArchObjectCap (PDPointerTableCap pdpt (Some (asid,vaddr))))),pdpt) \\ vs_lookup_pages s\\\"\n proof -\n note ref_simps[simp] = vs_cap_ref_simps vs_ref_pages_simps\n note ucast_simps[simp] = up_ucast_inj_eq ucast_up_ucast mask_asid_low_bits_ucast_ucast ucast_ucast_id\n show ?thesis\n apply (clarsimp simp: unmap_pdpt_def vs_cap_ref_simps store_pml4e_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c]\" for b c,simplified])\n apply (strengthen lookup_refs_pml4_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp)+\n apply (strengthen | wp hoare_vcg_imp_lift hoare_vcg_all_lift | clarsimp simp: conj_ac)+\n apply (wpc | wp)+\n apply (wp get_pml4e_wp)\n apply (simp add: find_vspace_for_asid_def | wp | wpc)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp assertE_wp | clarsimp simp: lookup_pml4_slot_def find_vspace_for_asid_def)\n apply clarsimp\n apply (case_tac \"([VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), VSRef (ucast (asid_high_bits_of asid)) None],\n pdpt)\n \\ vs_lookup_pages s\")\n apply (clarsimp simp: graph_of_def split: if_splits)\n apply (extract_vs_lookup)\n apply (extract_vs_lookup)\n apply (rewrite_lookup_when_aligned)\n apply (clarsimp simp: get_pml4_index_def bit_simps vs_lookup_pages_vs_lookupI lookup_pml4_slot_def obj_at_def pml4e_ref_pages_def\n split: if_splits)\n apply (drule_tac a2=a in vs_lookup_pages_step[OF vs_lookup_pages_vs_lookupI vs_lookup_pages1I[OF _ vs_refs_pages_pml4 ]])\n apply (simp add: obj_at_def)\n apply (simp add: pml4e_ref_pages_def)\n apply assumption\n apply simp\n apply (clarsimp split:if_splits simp: vs_lookup_pages_def graph_of_def dest!: in_vs_asid_refsD)\n apply (erule wellformed_lookup.lookupE[OF vs_lookup_pages1_is_wellformed_lookup], simp)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD simp: lookup_leaf_def)\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def)\n apply (extract_vs_lookup)+\n apply (rewrite_lookup_when_aligned)\n apply (clarsimp simp: obj_at_def pml4e_ref_pages_def dest!: graph_ofD split: if_splits pml4e.split_asm)\n apply (fold ko_at_def2 vs_asid_refs_def)\n apply (drule eq_ucast_ucast_eq[rotated], simp)\n apply clarsimp\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (clarsimp simp: obj_at_def pdpte_ref_pages_def image_def vs_lookup_pages_def lookup_pml4_slot_mask triple_shift_fun\n pml4e_ref_pages_def\n dest!: graph_ofD split: if_splits pdpte.split_asm)\n done\nqed\n\nlemma unmap_pdpt_vs_lookup_pages:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and typ_at (AArch APDPointerTable) pd and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_pdpt asid vaddr pd\n \\\\r s. ([VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), VSRef (ucast (asid_high_bits_of asid)) None],\n pd)\n \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_pdpt_vs_lookup_pages_pre])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\n\nlemma unmap_pt_vs_lookup_pages_pre:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state\n and typ_at (AArch APageTable) pt\n and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page_table asid vaddr pt\n \\\\r s. (the (vs_cap_ref (ArchObjectCap (PageTableCap pt (Some (asid,vaddr))))),pt) \\ vs_lookup_pages s\\\"\n proof -\n note ref_simps[simp] = vs_cap_ref_simps vs_ref_pages_simps\n note ucast_simps[simp] = up_ucast_inj_eq ucast_up_ucast mask_asid_low_bits_ucast_ucast ucast_ucast_id\n show ?thesis\n apply (clarsimp simp: unmap_page_table_def)\n apply wp\n apply (clarsimp simp: unmap_pd_def store_pde_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c,d,e]\" for b c d e,simplified])\n apply (strengthen lookup_refs_pd_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp )+\n apply (strengthen | wp hoare_vcg_imp_lift hoare_vcg_all_lift | clarsimp)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp get_pde_wp)+\n apply ((simp add: lookup_pdpt_slot_def lookup_pd_slot_def | wp get_pdpte_wp get_pml4e_wp | wpc)+)[1]\n apply (simp add: find_vspace_for_asid_def | wp | wpc)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp assertE_wp | clarsimp simp: lookup_pdpt_slot_def find_vspace_for_asid_def)\n apply clarsimp\n apply (case_tac \"([VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory),\n VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None], pt) \\ vs_lookup_pages s\")\n apply (clarsimp simp: graph_of_def split: if_splits)\n apply (extract_vs_lookup)+\n apply (rewrite_lookup_when_aligned)+\n apply (extract_vs_lookup)+\n apply (rewrite_lookup_when_aligned)+\n apply (extract_vs_lookup, rewrite_lookup_when_aligned)\n apply (clarsimp simp: get_pml4_index_def bit_simps vs_lookup_pages_vs_lookupI obj_at_def get_pdpt_index_def\n split: if_splits)\n apply (drule vs_lookup_pages_step[OF vs_lookup_pages_vs_lookupI vs_lookup_pages1I])\n apply (simp add: obj_at_def)\n apply (erule subsetD[OF vs_refs_pages_subset vs_refs_get_pd_index])\n apply (clarsimp simp: get_pd_index_def bit_simps vs_lookup_pages_def Image_def ptrFormPAddr_addFromPPtr)\n apply (clarsimp split:if_splits simp: vs_lookup_pages_def graph_of_def dest!: in_vs_asid_refsD)\n apply (erule wellformed_lookup.lookupE[OF vs_lookup_pages1_is_wellformed_lookup], simp)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD simp: lookup_leaf_def)\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def pml4e_ref_pages_def dest!: graph_ofD split: if_splits pml4e.split_asm)\n apply (fold ko_at_def2 vs_asid_refs_def)\n apply (drule eq_ucast_ucast_eq[rotated], simp)\n apply clarsimp\n apply (extract_vs_lookup, rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def pdpte_ref_pages_def image_def vs_lookup_pages_def\n dest!: graph_ofD split: if_splits pdpte.split_asm)\n apply (fold ko_at_def2 vs_asid_refs_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup, rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def pde_ref_pages_def image_def vs_lookup_pages_def\n dest!: graph_ofD split: if_splits pde.split_asm)\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (clarsimp simp: obj_at_def pdpte_ref_pages_def image_def vs_lookup_pages_def\n dest!: graph_ofD split: if_splits pdpte.split_asm)\n apply (clarsimp dest!: in_vs_asid_refsD wellformed_lookup.lookup_ref_step[OF vs_lookup_pages1_is_wellformed_lookup])\n apply (drule valid_vspace_objsD)\n apply (simp add: ko_at_def2)\n apply simp\n apply clarsimp\n apply (drule_tac x = a in spec)\n apply (clarsimp simp: data_at_def obj_at_def a_type_simps)\n apply (clarsimp dest!: in_vs_asid_refsD wellformed_lookup.lookup_ref_step[OF vs_lookup_pages1_is_wellformed_lookup])\n apply (drule valid_vspace_objsD)\n apply (simp add: ko_at_def2)\n apply simp\n apply clarsimp\n apply (drule_tac x = a in spec)\n apply (clarsimp simp: data_at_def obj_at_def a_type_simps vs_refs_pages_def\n split: kernel_object.split_asm arch_kernel_obj.split_asm)\n done\nqed\n\nlemma get_index_neq:\n \"((a :: 9 word) \\ ucast (get_pt_index vaddr)) \\ ((get_pt_index vaddr) \\ ucast a)\"\n \"((a :: 9 word) \\ ucast (get_pdpt_index vaddr)) \\ ((get_pdpt_index vaddr) \\ ucast a)\"\n by (auto simp: get_pt_index_def bit_simps up_ucast_inj_eq ucast_up_ucast ucast_ucast_id)\n\nlemma unmap_page_vs_lookup_pages_pre:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state\n and data_at sz pg and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page sz asid vaddr pg\n \\\\r s. (the (vs_cap_ref (ArchObjectCap (PageCap dev pg R typ sz (Some (asid,vaddr))))),pg) \\ vs_lookup_pages s\\\"\n proof -\n note ref_simps[simp] = vs_cap_ref_simps vs_ref_pages_simps\n note ucast_simps[simp] = up_ucast_inj_eq ucast_up_ucast mask_asid_low_bits_ucast_ucast ucast_ucast_id get_index_neq\n note [wp_comb del] = hoare_vcg_conj_lift\n note [wp_comb] = hoare_post_comb_imp_conj hoare_vcg_precond_imp hoare_vcg_conj_lift\n hoare_vcg_precond_impE[OF valid_validE]\n hoare_vcg_precond_impE_R[OF valid_validE_R]\n hoare_vcg_precond_impE\n hoare_vcg_precond_impE_R\n\n show ?thesis\n apply (clarsimp simp: unmap_page_def vs_cap_ref_simps)\n apply (wp | wpc)+\n(* X64SmallPage *)\n apply (clarsimp simp: store_pte_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c,d,e,f]\" for b c d e f,simplified])\n apply (strengthen lookup_refs_pt_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp)+\n apply (wpsimp simp: unlessE_def split_del: if_split)+\n apply (wpc | wp get_pte_wp get_pml4e_wp get_pde_wp get_pdpte_wp)+\n apply ((simp add: lookup_pt_slot_def lookup_pd_slot_def lookup_pdpt_slot_def | wp get_pdpte_wp get_pml4e_wp get_pde_wp | wpc)+)[1]\n(* X64LargePage *)\n apply (clarsimp simp: store_pde_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c,d,e]\" for b c d e,simplified])\n apply (strengthen lookup_refs_pd_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp )+\n apply (strengthen | wp hoare_vcg_imp_lift hoare_vcg_all_lift unlessE_wp | clarsimp simp: conj_comms)+\n apply (wpc | wp get_pte_wp get_pml4e_wp get_pde_wp get_pdpte_wp)+\n apply ((simp add: lookup_pt_slot_def lookup_pd_slot_def lookup_pdpt_slot_def | wp get_pdpte_wp get_pml4e_wp get_pde_wp | wpc)+)[1]\n(* X64HugePage *)\n apply (clarsimp simp: store_pdpte_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c,d]\" for b c d,simplified])\n apply (strengthen lookup_refs_pdpt_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp )+\n apply (strengthen | wp hoare_vcg_imp_lift hoare_vcg_all_lift unlessE_wp | clarsimp simp: conj_ac)+\n apply (wpc | wp get_pte_wp get_pml4e_wp get_pde_wp get_pdpte_wp)+\n apply ((simp add: lookup_pt_slot_def lookup_pd_slot_def lookup_pdpt_slot_def | wp get_pdpte_wp get_pml4e_wp get_pde_wp | wpc)+)[1]\n apply (simp add: find_vspace_for_asid_def | wp | wpc)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp assertE_wp | clarsimp simp: lookup_pdpt_slot_def find_vspace_for_asid_def)\n apply clarsimp\n apply (case_tac \"(the (vs_cap_ref (ArchObjectCap (PageCap dev pg R typ sz (Some (asid, vaddr))))), pg)\n \\ vs_lookup_pages s\")\n apply (clarsimp simp: graph_of_def vs_cap_ref_def split: if_splits vmpage_size.splits)\n apply (clarsimp simp: image_def pte_ref_pages_def[split_simps pte.split])\n apply (fold get_pt_index_def[simplified bit_simps])\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def bit_simps get_pd_index_def get_pml4_index_def get_pdpt_index_def\n dest!: vs_lookup_pages_vs_lookupI)\n apply (clarsimp simp: image_def pde_ref_pages_def[split_simps pte.split])\n apply (fold get_pd_index_def[simplified bit_simps])\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def bit_simps get_pd_index_def get_pml4_index_def get_pdpt_index_def\n dest!: vs_lookup_pages_vs_lookupI)\n apply (clarsimp simp: image_def pdpte_ref_pages_def[split_simps pte.split] split: pdpte.splits)\n apply (fold get_pdpt_index_def[simplified bit_simps])\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def bit_simps get_pd_index_def ucast_ucast_mask\n get_pml4_index_def get_pdpt_index_def\n dest!: vs_lookup_pages_vs_lookupI\n split: pdpte.split_asm)\n apply (clarsimp split:if_splits simp: vs_lookup_pages_def graph_of_def dest!: in_vs_asid_refsD)\n apply (erule wellformed_lookup.lookupE[OF vs_lookup_pages1_is_wellformed_lookup], simp)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD simp: lookup_leaf_def vs_cap_ref_def split: vmpage_size.splits)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pml4e_ref_pages_def\n split: if_split_asm pml4e.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pdpte_ref_pages_def\n split: if_split_asm pdpte.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pde_ref_pages_def\n split: if_split_asm pde.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def image_def pte_ref_pages_def[split_simps pte.split]\n dest!: graph_ofD wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n split: if_splits)\n apply (strengthen vs_lookup_pages_vs_lookupI[mk_strg, simplified vs_lookup_pages_def])\n apply (clarsimp simp: check_mapping_pptr_def get_pd_index_def get_pml4_index_def get_pdpt_index_def\n ucast_ucast_mask bit_simps obj_at_def\n dest!: vs_lookup_pages1D graph_ofD split: pte.split_asm)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply (clarsimp simp: get_pt_index_def bit_simps pte_ref_pages_def)\n apply (clarsimp simp: get_pt_index_def bit_simps\n dest!: graph_ofD split: pte.split_asm)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply (clarsimp simp: pte_ref_pages_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply (clarsimp simp: check_mapping_pptr_def get_pd_index_def get_pml4_index_def get_pdpt_index_def\n ucast_ucast_mask bit_simps obj_at_def\n dest!: vs_lookup_pages1D graph_ofD wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n split: pte.split_asm)\n apply (drule valid_vspace_objs_largePage[OF valid_vspace_objsD])\n apply (simp add: ko_at_def2)+\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply (clarsimp simp: check_mapping_pptr_def get_pd_index_def get_pml4_index_def get_pdpt_index_def\n ucast_ucast_mask bit_simps obj_at_def\n dest!: vs_lookup_pages1D graph_ofD wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n wellformed_lookup.lookup_rtrancl_stepsD[where r = \"[a]\" for a, simplified,OF vs_lookup_pages1_is_wellformed_lookup]\n split: pte.split_asm)\n apply (drule valid_vspace_objs_hugePage[OF valid_vspace_objsD])\n apply (simp add: ko_at_def2)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pml4e_ref_pages_def\n split: if_split_asm pml4e.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pdpte_ref_pages_def\n split: if_split_asm pdpte.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (clarsimp simp: obj_at_def image_def pte_ref_pages_def[split_simps pte.split]\n dest!: graph_ofD wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n split: if_splits)\n apply (strengthen vs_lookup_pages_vs_lookupI[mk_strg, simplified vs_lookup_pages_def])\n apply (clarsimp simp: check_mapping_pptr_def get_pd_index_def get_pml4_index_def get_pdpt_index_def\n ucast_ucast_mask obj_at_def bit_simps\n dest!: vs_lookup_pages1D graph_ofD split: pde.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def ptTranslationBits_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply (clarsimp simp: pde_ref_pages_def split: pde.split_asm)\n apply (extract_vs_lookup)+\n apply (clarsimp simp: obj_at_def data_at_def a_type_simps)\n apply (clarsimp simp: mask_def)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (drule valid_vspace_objs_hugePage[OF valid_vspace_objsD])\n apply (simp add: ko_at_def2)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n simp: obj_at_def pml4e_ref_pages_def\n split: if_split_asm pml4e.split_asm)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def get_pd_index_bit_def)\n apply (drule eq_ucast_ucast_eq[rotated,THEN sym], simp)\n apply clarsimp\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)+\n apply (strengthen vs_lookup_pages_vs_lookupI[mk_strg, simplified vs_lookup_pages_def])\n apply (clarsimp simp: check_mapping_pptr_def obj_at_def image_def pdpte_ref_pages_def[split_simps pdpte.split]\n split: pdpte.splits)\n apply (clarsimp simp: check_mapping_pptr_def get_pd_index_def get_pml4_index_def get_pdpt_index_def\n ucast_ucast_mask obj_at_def image_def bit_simps pdpte_ref_pages_def[split_simps pdpte.split]\n dest!: vs_lookup_pages1D graph_ofD split: pdpte.splits)\n apply (intro conjI impI)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def pdpte_ref_pages_def[split_simps pdpte.split])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def pdpte_ref_pages_def[split_simps pdpte.split])\n apply (drule valid_vspace_objs_pdptD[OF valid_vspace_objsD])\n apply (simp add: ko_at_def2)+\n apply (clarsimp simp: obj_at_def data_at_def a_type_simps)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def pdpte_ref_pages_def[split_simps pdpte.split])\n done\nqed\n\n(* FIXME x64: unmap_pdpt_vs_lookup_pages_pre might also needed here*)\nlemma unmap_pd_vs_lookup_pages_pre:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and typ_at (AArch APageDirectory) pd and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_pd asid vaddr pd\n \\\\r s. (the (vs_cap_ref (ArchObjectCap (PageDirectoryCap pd (Some (asid,vaddr))))),pd) \\ vs_lookup_pages s\\\"\n proof -\n note ref_simps[simp] = vs_cap_ref_simps vs_ref_pages_simps\n note ucast_simps[simp] = up_ucast_inj_eq ucast_up_ucast mask_asid_low_bits_ucast_ucast ucast_ucast_id\n show ?thesis\n apply (clarsimp simp: unmap_pd_def store_pdpte_def set_arch_obj_simps)\n apply wp\n apply (rule update_aobj_not_reachable[where b = \"[b,c,d]\" for b c d,simplified])\n apply (strengthen lookup_refs_pdpt_shrink_strg valid_arch_state_asid_table_strg not_in_vs_refs_pages_strg\n | clarsimp )+\n apply (strengthen | wp hoare_vcg_imp_lift hoare_vcg_all_lift | clarsimp)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp )+\n apply ((simp add: lookup_pdpt_slot_def | wp get_pml4e_wp | wpc)+)[1]\n apply (simp add: find_vspace_for_asid_def | wp | wpc)+\n apply (wpc | wp get_pdpte_wp get_pml4e_wp assertE_wp | clarsimp simp: lookup_pdpt_slot_def find_vspace_for_asid_def)\n apply clarsimp\n apply (case_tac \"([VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None], pd) \\ vs_lookup_pages s\")\n apply (clarsimp simp: graph_of_def split: if_splits)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)\n apply (extract_vs_lookup | rewrite_lookup_when_aligned)\n apply (clarsimp simp: get_pml4_index_def bit_simps vs_lookup_pages_vs_lookupI obj_at_def entry_ref_pages_simps\n split: if_splits)\n apply (drule vs_lookup_pages_step[OF vs_lookup_pages_vs_lookupI vs_lookup_pages1I[OF _ vs_refs_pages_pdpt ]])\n apply (simp add: obj_at_def)\n apply assumption\n apply simp\n apply (clarsimp split:if_splits simp: vs_lookup_pages_def graph_of_def dest!: in_vs_asid_refsD)\n apply (erule wellformed_lookup.lookupE[OF vs_lookup_pages1_is_wellformed_lookup], simp)\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD simp: lookup_leaf_def)\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (erule wellformed_lookup.lookup_forwardE[OF vs_lookup_pages1_is_wellformed_lookup], (simp+)[2])\n apply (clarsimp dest!: vs_lookup_pages1D graph_ofD\n wellformed_lookup.lookup_rtrancl_stepD[OF vs_lookup_pages1_is_wellformed_lookup]\n simp: obj_at_def)\n apply (fold ko_at_def2 get_pml4_index_bit_def get_pdpt_index_bit_def)\n apply (extract_vs_lookup)+\n apply (rewrite_lookup_when_aligned)\n apply (clarsimp simp: obj_at_def pml4e_ref_pages_def dest!: graph_ofD split: if_splits pml4e.split_asm)\n apply (fold ko_at_def2 vs_asid_refs_def)\n apply (drule eq_ucast_ucast_eq[rotated], simp)\n apply clarsimp\n apply (extract_vs_lookup, rewrite_lookup_when_aligned)\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (clarsimp simp: obj_at_def pdpte_ref_pages_def image_def vs_lookup_pages_def\n dest!: graph_ofD split: if_splits pdpte.split_asm)\n apply (clarsimp dest!: in_vs_asid_refsD wellformed_lookup.lookup_ref_step[OF vs_lookup_pages1_is_wellformed_lookup])\n apply (drule valid_vspace_objsD)\n apply (simp add: ko_at_def2)\n apply simp\n apply clarsimp\n apply (drule_tac x = aa in spec)\n apply (clarsimp simp: data_at_def obj_at_def a_type_simps)\n done\nqed\n\nlemma unmap_pd_vs_lookup_pages:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and typ_at (AArch APageDirectory) pd and K(vaddr < pptr_base \\ canonical_address vaddr)\\ unmap_pd asid vaddr pd\n \\\\r s. ([VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable), VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), VSRef (ucast (asid_high_bits_of asid)) None],\n pd)\n \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_pd_vs_lookup_pages_pre])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\nlemma unmap_pt_vs_lookup_pages:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and typ_at (AArch APageTable) pt and K(vaddr < pptr_base \\ canonical_address vaddr)\\ unmap_page_table asid vaddr pt\n \\\\rv s. ([VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory), VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4), VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None],\n pt) \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_pt_vs_lookup_pages_pre])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\nlemma unmap_page_vs_lookup_pages_small:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and data_at X64SmallPage pg and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page X64SmallPage asid vaddr pg\n \\\\rv s. ([VSRef ((vaddr >> 12) && mask 9) (Some APageTable), VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory), VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4), VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None],\n pg) \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_page_vs_lookup_pages_pre[where sz=X64SmallPage, simplified]])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\nlemma unmap_page_vs_lookup_pages_large:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and data_at X64LargePage pg and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page X64LargePage asid vaddr pg\n \\\\rv s. ([VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory), VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4), VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None],\n pg) \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_page_vs_lookup_pages_pre[where sz=X64LargePage, simplified]])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\nlemma unmap_page_vs_lookup_pages_huge:\n \"\\pspace_aligned and valid_vspace_objs and valid_arch_state and data_at X64HugePage pg and K(vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page X64HugePage asid vaddr pg\n \\\\rv s. ([VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4), VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None],\n pg) \\ vs_lookup_pages s\\\"\n apply (rule hoare_pre)\n apply (rule hoare_post_imp[OF _ unmap_page_vs_lookup_pages_pre[where sz=X64HugePage, simplified]])\n apply (simp add: vs_cap_ref_def)\n apply simp\n done\n\nlemma unmap_pdpt_invs[wp]:\n \"\\invs and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_pdpt asid vaddr pdpt\n \\\\rv. invs\\\"\n apply (simp add: unmap_pdpt_def)\n apply (rule hoare_pre)\n apply (wp store_pml4e_invs do_machine_op_global_refs_inv get_pml4e_wp\n hoare_vcg_all_lift find_vspace_for_asid_lots\n | wpc | simp add: flush_all_def pml4e_ref_pages_def)+\n apply (strengthen lookup_pml4_slot_kernel_mappings[THEN notE[where R=False], rotated -1, mk_strg D], simp)\n apply (strengthen not_in_global_refs_vs_lookup)+\n apply (auto simp: vspace_at_asid_def is_aligned_pml4[simplified] invs_vspace_objs\n invs_psp_aligned lookup_pml4_slot_eq pml4e_ref_def)\n done\n\ncrunch invs[wp]: lookup_pdpt_slot \"\\s. P s\"\ncrunch invs[wp]: lookup_pd_slot \"\\s. P s\"\n\nlemma pdpte_at_strg:\n \"pdpte_at p s \\ typ_at (AArch APDPointerTable) (p && ~~ mask pdpt_bits) s\"\n by (simp add: pdpte_at_def)\nlemma pde_at_strg:\n \"pde_at p s \\ typ_at (AArch APageDirectory) (p && ~~ mask pd_bits) s\"\n by (simp add: pde_at_def)\n\nlemma vs_lookup1_archD:\n \"(x \\1 y) s \\ \\rs r p p' ko. x = (rs,p) \\ y = (r # rs,p')\n \\ ko_at (ArchObj ko) p s \\ (r,p') \\ vs_refs_arch ko\"\n by (clarsimp dest!: vs_lookup1D simp: obj_at_def vs_refs_def split: kernel_object.splits)\n\nlemma dmo_invalidateLocalPageStructureCacheASID[wp]:\n \"\\invs\\ do_machine_op (invalidateLocalPageStructureCacheASID vs asid) \\\\rv. invs\\\"\n by (simp add: invalidateLocalPageStructureCacheASID_def do_machine_op_lift_invs)\n\nlemma invalidate_page_structure_cache_asid_invs[wp]:\n \"\\invs\\ invalidate_page_structure_cache_asid vs asid \\\\rv. invs\\\"\n by (wpsimp simp: invalidate_page_structure_cache_asid_def)\n\nlemma unmap_pd_invs[wp]:\n \"\\invs and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_pd asid vaddr pd\n \\\\rv. invs\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: unmap_pd_def)\n apply (wp store_pdpte_invs do_machine_op_global_refs_inv get_pdpte_wp\n hoare_vcg_all_lift find_vspace_for_asid_lots\n | wpc | simp add: flush_all_def pdpte_ref_pages_def\n | strengthen imp_consequent )+\n apply (strengthen not_in_global_refs_vs_lookup invs_valid_vs_lookup invs_valid_global_refs\n invs_arch_state invs_valid_global_objs | wp find_vspace_for_asid_aligned_pm_bits | simp)+\n apply (auto simp: vspace_at_asid_def is_aligned_pml4[simplified] invs_vspace_objs\n invs_psp_aligned lookup_pml4_slot_eq pml4e_ref_def)\n done\n\nlemma unmap_pt_invs[wp]:\n \"\\invs and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page_table asid vaddr pt\n \\\\rv. invs\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: unmap_page_table_def)\n apply (rule hoare_pre)\n apply (wp store_pde_invs do_machine_op_global_refs_inv get_pde_wp\n hoare_vcg_all_lift find_vspace_for_asid_lots\n | wpc | simp add: flush_all_def pdpte_ref_pages_def\n | strengthen imp_consequent )+\n apply (strengthen not_in_global_refs_vs_lookup invs_valid_vs_lookup invs_valid_global_refs\n invs_arch_state invs_valid_global_objs | wp find_vspace_for_asid_aligned_pm_bits | simp)+\n apply (auto simp: vspace_at_asid_def is_aligned_pml4[simplified] invs_vspace_objs\n invs_psp_aligned lookup_pml4_slot_eq pml4e_ref_def)\n done\n\nlemma final_cap_lift:\n assumes x: \"\\P. \\\\s. P (caps_of_state s)\\ f \\\\rv s. P (caps_of_state s)\\\"\n shows \"\\\\s. P (is_final_cap' cap s)\\ f \\\\rv s. P (is_final_cap' cap s)\\\"\n by (simp add: is_final_cap'_def2 cte_wp_at_caps_of_state, rule x)\n\nlemmas dmo_final_cap[wp] = final_cap_lift [OF do_machine_op_caps_of_state]\nlemmas store_pte_final_cap[wp] = final_cap_lift [OF store_pte_caps_of_state]\nlemmas unmap_page_table_final_cap[wp] = final_cap_lift [OF unmap_page_table_caps_of_state]\nlemmas unmap_page_directory_final_cap[wp] = final_cap_lift [OF unmap_pd_caps_of_state]\nlemmas unmap_pdpt_final_cap[wp] = final_cap_lift [OF unmap_pdpt_caps_of_state]\n\n\nlemma mapM_x_swp_store_empty_pt':\n \"\\obj_at (\\ko. \\pt. ko = ArchObj (PageTable pt)\n \\ (\\x. x \\ (\\sl. ucast ((sl && mask pt_bits) >> word_size_bits)) ` set slots\n \\ pt x = InvalidPTE)) p\n and K (is_aligned p pt_bits \\ (\\x \\ set slots. x && ~~ mask pt_bits = p))\\\n mapM_x (swp store_pte InvalidPTE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (rule hoare_gen_asm)\n apply (induct slots, simp_all add: mapM_x_Nil mapM_x_Cons)\n apply wp\n apply (clarsimp simp: obj_at_def empty_table_def fun_eq_iff)\n apply (rule hoare_seq_ext, assumption)\n apply (thin_tac \"\\P\\ f \\Q\\\" for P f Q)\n apply (simp add: store_pte_def set_object_def set_arch_obj_simps)\n apply (wp get_object_wp | simp)\n apply (clarsimp simp: obj_at_def)\n apply auto\n done\n\nlemma mapM_x_swp_store_empty_pd':\n \"\\obj_at (\\ko. \\pd. ko = ArchObj (PageDirectory pd)\n \\ (\\x. x \\ (\\sl. ucast ((sl && mask pd_bits) >> word_size_bits)) ` set slots\n \\ pd x = InvalidPDE)) p\n and K (is_aligned p pt_bits \\ (\\x \\ set slots. x && ~~ mask pd_bits = p))\\\n mapM_x (swp store_pde InvalidPDE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (rule hoare_gen_asm)\n apply (induct slots, simp_all add: mapM_x_Nil mapM_x_Cons)\n apply wp\n apply (clarsimp simp: obj_at_def empty_table_def fun_eq_iff)\n apply (rule hoare_seq_ext, assumption)\n apply (thin_tac \"\\P\\ f \\Q\\\" for P f Q)\n apply (simp add: store_pde_def set_object_def set_arch_obj_simps)\n apply (wp get_object_wp | simp)\n apply (clarsimp simp: obj_at_def)\n apply auto\n done\n\nlemma mapM_x_swp_store_empty_pt:\n \"\\page_table_at p and pspace_aligned\n and K ((UNIV :: 9 word set) \\ (\\sl. ucast ((sl && mask pt_bits) >> word_size_bits)) ` set slots\n \\ (\\x\\set slots. x && ~~ mask pt_bits = p))\\\n mapM_x (swp store_pte InvalidPTE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (wp mapM_x_swp_store_empty_pt')\n apply (clarsimp simp: obj_at_def a_type_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm if_split_asm)\n apply (frule(1) pspace_alignedD)\n apply (clarsimp simp: pt_bits_def pageBits_def image_def table_size_def ptTranslationBits_def word_size_bits_def)\n apply blast\n done\n\nlemma mapM_x_swp_store_empty_pdpt':\n \"\\obj_at (\\ko. \\pd. ko = ArchObj (PDPointerTable pd)\n \\ (\\x. x \\ (\\sl. ucast ((sl && mask pdpt_bits) >> word_size_bits)) ` set slots\n \\ pd x = InvalidPDPTE)) p\n and K (is_aligned p pd_bits \\ (\\x \\ set slots. x && ~~ mask pdpt_bits = p))\\\n mapM_x (swp store_pdpte InvalidPDPTE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (rule hoare_gen_asm)\n apply (induct slots, simp_all add: mapM_x_Nil mapM_x_Cons)\n apply wp\n apply (clarsimp simp: obj_at_def empty_table_def fun_eq_iff)\n apply (rule hoare_seq_ext, assumption)\n apply (thin_tac \"\\P\\ f \\Q\\\" for P f Q)\n apply (simp add: store_pdpte_def set_object_def set_arch_obj_simps)\n apply (wp get_object_wp | simp)\n apply (clarsimp simp: obj_at_def)\n apply auto\n done\n\nlemma mapM_x_swp_store_empty_pdpt:\n \"\\pd_pointer_table_at p and pspace_aligned\n and K ((UNIV :: 9 word set) \\ (\\sl. ucast ((sl && mask pdpt_bits) >> word_size_bits)) ` set slots\n \\ (\\x\\set slots. x && ~~ mask pdpt_bits = p))\\\n mapM_x (swp store_pdpte InvalidPDPTE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (wp mapM_x_swp_store_empty_pdpt')\n apply (clarsimp simp: obj_at_def a_type_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm if_split_asm)\n apply (frule(1) pspace_alignedD)\n apply (clarsimp simp: pd_bits_def pageBits_def image_def table_size_def ptTranslationBits_def word_size_bits_def)\n apply blast\n done\n\nlemma mapM_x_swp_store_empty_pd:\n \"\\page_directory_at p and pspace_aligned\n and K ((UNIV :: 9 word set) \\ (\\sl. ucast ((sl && mask pd_bits) >> word_size_bits)) ` set slots\n \\ (\\x\\set slots. x && ~~ mask pd_bits = p))\\\n mapM_x (swp store_pde InvalidPDE) slots\n \\\\rv. obj_at (empty_table {}) p\\\"\n apply (wp mapM_x_swp_store_empty_pd')\n apply (clarsimp simp: obj_at_def a_type_def)\n apply (clarsimp split: Structures_A.kernel_object.split_asm\n arch_kernel_obj.split_asm if_split_asm)\n apply (frule(1) pspace_alignedD)\n apply (clarsimp simp: pt_bits_def pageBits_def image_def table_size_def ptTranslationBits_def word_size_bits_def)\n apply blast\n done\n\n(* FIXME: move near Invariants_A.vs_lookup_2ConsD *)\nlemma vs_lookup_pages_2ConsD:\n \"((v # v' # vs) \\ p) s \\\n \\p'. ((v' # vs) \\ p') s \\ ((v' # vs, p') \\1 (v # v' # vs, p)) s\"\n apply (clarsimp simp: vs_lookup_pages_def)\n apply (erule rtranclE)\n apply (clarsimp simp: vs_asid_refs_def)\n apply (fastforce simp: vs_lookup_pages1_def)\n done\n\n(* FIXME: move to Invariants_A *)\nlemma vs_lookup_pages_eq_at:\n \"[VSRef a None] \\ pd = [VSRef a None] \\ pd\"\n apply (simp add: vs_lookup_pages_def vs_lookup_def Image_def)\n apply (rule ext)\n apply (rule iffI)\n apply (erule bexEI)\n apply (erule rtranclE, simp)\n apply (clarsimp simp: vs_refs_def graph_of_def image_def\n dest!: vs_lookup1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n apply (erule bexEI)\n apply (erule rtranclE, simp)\n apply (clarsimp simp: vs_refs_pages_def graph_of_def image_def\n dest!: vs_lookup_pages1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n done\n\n(* FIXME: move to Invariants_A *)\nlemma vs_lookup_pages_eq_ap:\n \"[VSRef b (Some AASIDPool), VSRef a None] \\ pm =\n [VSRef b (Some AASIDPool), VSRef a None] \\ pm\"\n apply (simp add: vs_lookup_pages_def vs_lookup_def Image_def)\n apply (rule ext)\n apply (rule iffI)\n apply (erule bexEI)\n apply (erule rtranclE, simp)\n apply (clarsimp simp: vs_refs_def graph_of_def image_def\n dest!: vs_lookup1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n apply (erule rtranclE)\n apply (clarsimp simp: vs_asid_refs_def graph_of_def image_def)\n apply (rule converse_rtrancl_into_rtrancl[OF _ rtrancl_refl])\n apply (fastforce simp: vs_refs_pages_def graph_of_def image_def\n vs_lookup_pages1_def)\n apply (clarsimp simp: vs_refs_def graph_of_def image_def\n dest!: vs_lookup1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n apply (erule bexEI)\n apply (erule rtranclE, simp)\n apply (clarsimp simp: vs_refs_pages_def graph_of_def image_def\n dest!: vs_lookup_pages1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n apply (erule rtranclE)\n apply (clarsimp simp: vs_asid_refs_def graph_of_def image_def)\n apply (rule converse_rtrancl_into_rtrancl[OF _ rtrancl_refl])\n apply (fastforce simp: vs_refs_def graph_of_def image_def\n vs_lookup1_def)\n apply (clarsimp simp: vs_refs_pages_def graph_of_def image_def\n dest!: vs_lookup_pages1D\n split: Structures_A.kernel_object.splits\n arch_kernel_obj.splits)\n done\n\n(* FIXME: move to Invariants_A *)\nlemma pte_ref_pages_invalid_None[simp]:\n \"pte_ref_pages InvalidPTE = None\"\n by (simp add: pte_ref_pages_def)\n\nlemma is_final_cap_caps_of_state_2D:\n \"\\ caps_of_state s p = Some cap; caps_of_state s p' = Some cap';\n is_final_cap' cap'' s; gen_obj_refs cap \\ gen_obj_refs cap'' \\ {};\n gen_obj_refs cap' \\ gen_obj_refs cap'' \\ {} \\\n \\ p = p'\"\n apply (clarsimp simp: is_final_cap'_def3)\n apply (frule_tac x=\"fst p\" in spec)\n apply (drule_tac x=\"snd p\" in spec)\n apply (drule_tac x=\"fst p'\" in spec)\n apply (drule_tac x=\"snd p'\" in spec)\n apply (clarsimp simp: cte_wp_at_caps_of_state Int_commute\n prod_eqI)\n done\n\n(* FIXME: move *)\nlemma empty_table_pt_capI:\n \"\\caps_of_state s p =\n Some (cap.ArchObjectCap (arch_cap.PageTableCap pt None));\n valid_table_caps s\\\n \\ obj_at (empty_table (set (second_level_tables (arch_state s)))) pt s\"\n apply (case_tac p)\n apply (clarsimp simp: valid_table_caps_def simp del: imp_disjL)\n apply (drule spec)+\n apply (erule impE, simp add: is_cap_simps)+\n by assumption\n\nsublocale vs_refs_empty: vspace_only_obj_pred \"\\ko. vs_refs ko = {}\"\n by unfold_locales\n (fastforce simp: vspace_obj_pred_def arch_obj_pred_def non_arch_obj_def vs_refs_def\n split: kernel_object.splits arch_kernel_obj.splits)\n\nsublocale vs_refs_pages_empty: vspace_only_obj_pred \"\\ko. vs_refs_pages ko = {}\"\n by unfold_locales\n (fastforce simp: vspace_obj_pred_def arch_obj_pred_def non_arch_obj_def vs_refs_pages_def\n split: kernel_object.splits arch_kernel_obj.splits)\n\nlemma set_cap_cte_wp_at_ex:\n \"\\K (P cap) and cte_wp_at \\ slot\\ set_cap cap slot \\\\r s. \\slot. cte_wp_at P slot s\\\"\n apply (rule hoare_pre)\n apply (wp hoare_vcg_ex_lift set_cap_cte_wp_at)\n apply fastforce\n done\n\nlemma vs_cap_ref_of_table_capNone:\n \"\\is_pd_cap cap \\ is_pt_cap cap \\ is_pdpt_cap cap \\ is_pml4_cap cap; cap_asid cap = None\\ \\ vs_cap_ref cap = None\"\n by (auto simp: cap_asid_def is_cap_simps vs_cap_ref_def split: cap.splits arch_cap.splits option.split_asm)\n\nlemma unique_table_caps_ptD2:\n \"\\ is_pt_cap cap; cs p = Some cap; cap_asid cap = None;\n cs p' = Some cap';\n obj_refs cap' = obj_refs cap;\n unique_table_caps cs; valid_cap cap s; valid_cap cap' s\\\n \\ p = p'\"\n apply (erule(3) unique_table_caps_ptD)\n apply (clarsimp simp: is_cap_simps)\n apply (case_tac cap')\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits)+\n apply (rename_tac p acap pd)\n apply (case_tac acap)\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits if_splits)+\n done\n\n\nlemma unique_table_caps_pdD2:\n \"\\ is_pd_cap cap; cs p = Some cap; cap_asid cap = None;\n cs p' = Some cap';\n obj_refs cap' = obj_refs cap;\n unique_table_caps cs; valid_cap cap s; valid_cap cap' s\\\n \\ p = p'\"\n apply (erule(3) unique_table_caps_pdD)\n apply (clarsimp simp: is_cap_simps)\n apply (case_tac cap')\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits)+\n apply (rename_tac p acap pd)\n apply (case_tac acap)\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits if_splits)+\n done\n\nlemma unique_table_caps_pdptD2:\n \"\\ is_pdpt_cap cap; cs p = Some cap; cap_asid cap = None;\n cs p' = Some cap';\n obj_refs cap' = obj_refs cap;\n unique_table_caps cs; valid_cap cap s; valid_cap cap' s\\\n \\ p = p'\"\n apply (erule(3) unique_table_caps_pdptD)\n apply (clarsimp simp: is_cap_simps)\n apply (case_tac cap')\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits)+\n apply (rename_tac p acap pd)\n apply (case_tac acap)\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits if_splits)+\n done\n\nlemma unique_table_caps_pml4D2:\n \"\\ is_pml4_cap cap; cs p = Some cap; cap_asid cap = None;\n cs p' = Some cap';\n obj_refs cap' = obj_refs cap;\n unique_table_caps cs; valid_cap cap s; valid_cap cap' s\\\n \\ p = p'\"\n apply (erule(3) unique_table_caps_pml4D)\n apply (clarsimp simp: is_cap_simps)\n apply (case_tac cap')\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits)+\n apply (rename_tac p acap pd)\n apply (case_tac acap)\n apply (clarsimp simp: valid_cap_simps obj_at_def is_ep_def is_ntfn_def is_cap_table_def is_tcb_def\n split: option.splits if_splits)+\n done\n\nlemma obj_refs_eqI:\n \"\\a \\ obj_refs c; a \\ obj_refs b\\ \\ obj_refs c = obj_refs b\"\n by (clarsimp dest!: obj_ref_elemD)\n\nlemma valid_pd_cap_asidNone[simp]:\n \"s \\ ArchObjectCap (PageDirectoryCap pa asid) \\ s \\ ArchObjectCap (PageDirectoryCap pa None)\"\n by (clarsimp simp: valid_cap_def cap_aligned_def)\n\nlemma valid_pdpt_cap_asidNone[simp]:\n \"s \\ ArchObjectCap (PDPointerTableCap pa asid) \\ s \\ ArchObjectCap (PDPointerTableCap pa None)\"\n by (clarsimp simp: valid_cap_def cap_aligned_def)\n\nlemma valid_pt_cap_asidNone[simp]:\n \"s \\ ArchObjectCap (PageTableCap pa asid) \\ s \\ ArchObjectCap (PageTableCap pa None)\"\n by (clarsimp simp: valid_cap_def cap_aligned_def)\n\n\nlemma update_aobj_zombies[wp]:\n \"\\\\s. is_final_cap' cap s\\\n set_object ptr (ArchObj obj)\n \\\\_ s. is_final_cap' cap s\\\"\n apply (simp add: is_final_cap'_def2)\n apply (wp hoare_vcg_ex_lift hoare_vcg_all_lift set_aobject_cte_wp_at)\n done\n\ncrunch is_final_cap' [wp]: store_pde \"is_final_cap' cap\"\n (wp: crunch_wps simp: crunch_simps set_arch_obj_simps ignore: set_object set_pd)\n\ncrunch is_final_cap' [wp]: store_pdpte \"is_final_cap' cap\"\n (wp: crunch_wps simp: crunch_simps set_arch_obj_simps ignore: set_object set_pdpt)\n\ncrunch is_final_cap' [wp]: store_pml4e \"is_final_cap' cap\"\n (wp: crunch_wps simp: crunch_simps set_arch_obj_simps ignore: set_object set_pml4)\n\nlemma lookup_pages_shrink_store_pdpte:\n \"\\\\s. p \\ vs_lookup_pages s\\ store_pdpte slot InvalidPDPTE \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (case_tac p)\n apply (simp add: store_pdpte_def set_object_def set_arch_obj_simps | wp get_object_wp | clarsimp)+\n apply (simp add: vs_lookup_pages_def)\n apply (drule_tac s1 = s in lookup_bound_estimate[OF vs_lookup_pages1_is_wellformed_lookup, rotated -1])\n apply (simp add: fun_upd_def[symmetric])\n apply (rule vs_lookup_pages1_is_wellformed_lookup[where s = \"s\\kheap := kheap s(ptr \\ ArchObj obj)\\\" for s ptr obj\n ,simplified])\n apply (clarsimp simp: lookup_refs_def vs_lookup_pages1_on_heap_obj_def vs_refs_pages_def image_def obj_at_def\n graph_of_def pdpte_ref_pages_def split: if_split_asm pde.split_asm)\n apply clarsimp\n done\n\nlemma lookup_pages_shrink_store_pde:\n \"\\\\s. p \\ vs_lookup_pages s\\ store_pde slot InvalidPDE \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (case_tac p)\n apply (simp add: store_pde_def set_object_def set_arch_obj_simps | wp get_object_wp | clarsimp)+\n apply (simp add: vs_lookup_pages_def)\n apply (drule_tac s1 = s in lookup_bound_estimate[OF vs_lookup_pages1_is_wellformed_lookup, rotated -1])\n apply (simp add: fun_upd_def[symmetric])\n apply (rule vs_lookup_pages1_is_wellformed_lookup[where s = \"s\\kheap := kheap s(ptr \\ ArchObj obj)\\\" for s ptr obj\n ,simplified])\n apply (clarsimp simp: lookup_refs_def vs_lookup_pages1_on_heap_obj_def vs_refs_pages_def image_def obj_at_def\n graph_of_def pde_ref_pages_def split: if_split_asm pde.split_asm)\n apply clarsimp\n done\n\nlemma lookup_pages_shrink_store_pte:\n \"\\\\s. p \\ vs_lookup_pages s\\ store_pte slot InvalidPTE \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (case_tac p)\n apply (simp add: store_pte_def set_object_def set_arch_obj_simps | wp get_object_wp | clarsimp)+\n apply (simp add: vs_lookup_pages_def)\n apply (drule_tac s1 = s in lookup_bound_estimate[OF vs_lookup_pages1_is_wellformed_lookup, rotated -1])\n apply (simp add: fun_upd_def[symmetric])\n apply (rule vs_lookup_pages1_is_wellformed_lookup[where s = \"s\\kheap := kheap s(ptr \\ ArchObj obj)\\\" for s ptr obj\n ,simplified])\n apply (clarsimp simp: lookup_refs_def vs_lookup_pages1_on_heap_obj_def vs_refs_pages_def image_def obj_at_def\n graph_of_def pde_ref_pages_def split: if_split_asm pde.split_asm)\n apply clarsimp\n done\n\nlemma store_invalid_pdpte_vs_lookup_pages_shrink:\n \"\\\\s. invs s \\ p \\ vs_lookup_pages s\\ mapM_x (\\a. store_pdpte a InvalidPDPTE) ls \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (wp mapM_x_wp lookup_pages_shrink_store_pdpte)\n apply force+\n done\n\n\nlemma store_invalid_pde_vs_lookup_pages_shrink:\n \"\\\\s. invs s \\ p \\ vs_lookup_pages s\\ mapM_x (\\a. store_pde a InvalidPDE) ls \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (wp mapM_x_wp lookup_pages_shrink_store_pde)\n apply force+\n done\n\nlemma store_invalid_pte_vs_lookup_pages_shrink:\n \"\\\\s. invs s \\ p \\ vs_lookup_pages s\\ mapM_x (\\a. store_pte a InvalidPTE) ls \\\\rv s. p \\ vs_lookup_pages s\\\"\n apply (wp mapM_x_wp lookup_pages_shrink_store_pte)\n apply force+\n done\n\nlemma set_current_cr3_global_refs_inv[iff]:\n \"global_refs (s\\arch_state := arch_state s\\x64_current_cr3 := param_a\\\\) = global_refs s\"\n by (simp add: global_refs_def)\n\ncrunch global_refs[wp]: unmap_pd \"\\s. P (global_refs s)\"\ncrunch global_refs[wp]: unmap_pdpt \"\\s. P (global_refs s)\"\ncrunch global_refs[wp]: unmap_page_table \"\\s. P (global_refs s)\"\n\nlemma range_neg_mask_strengthen:\n \"\\is_aligned ptr table_size; P ptr\\ \\ (\\x\\set [ptr , ptr + 2 ^ word_size_bits .e. ptr + 2 ^ table_size - 1]. P (x && ~~ mask table_size))\"\n apply clarsimp\n apply (drule subsetD[OF upto_enum_step_subset])\n apply (fastforce dest!: mask_in_range)\n done\n\nlemma vtable_range_univ:\n \"is_aligned (ptr :: word64) table_size \\\n {y. \\x\\set [ptr , ptr + 2 ^ word_size_bits .e. ptr + 2 ^ table_size - 1].\n (y :: 9 word) = ucast (x && mask table_size >> word_size_bits)} = UNIV\"\n apply (intro set_eqI iffI | clarsimp)+\n apply (rule_tac x = \"ptr + (ucast x << word_size_bits)\" in bexI)\n apply (clarsimp simp: mask_add_aligned)\n apply (subst le_mask_imp_and_mask)\n apply (subst le_mask_iff_lt_2n[THEN iffD1])\n apply (clarsimp simp: bit_simps)\n apply (rule shiftl_less_t2n)\n apply (clarsimp simp: bit_simps)\n apply word_bitwise\n apply (simp add: bit_simps)\n apply (simp add: shiftl_shiftr3 word_size bit_simps)\n apply word_bitwise\n apply (simp add: mask_def)\n apply (simp add: upto_enum_step_subtract[OF is_aligned_no_overflow])\n apply (clarsimp simp: upto_enum_step_def image_def)\n apply (rule_tac x = \"ucast x\" in exI)\n apply (clarsimp simp: shift_times_fold[where m= 0,simplified])\n apply word_bitwise\n apply (auto simp: bit_simps)\n done\n\nlemma subset_refl_subst:\n \"y = x \\ x \\ y\"\n by simp\n\nlemma empty_refs_strg:\n \"empty_table {} a \\ (vs_refs_pages a = {})\"\n by (simp add: empty_table_def split: kernel_object.splits arch_kernel_obj.splits)\n\nlemma obj_at_empty_refs_strg:\n \"obj_at (empty_table (set (second_level_tables (arch_state s)))) ptr s \\ obj_at (\\a. vs_refs_pages a = {}) ptr s\"\n apply (clarsimp simp: obj_at_def second_level_tables_def)\n done\n\nlemma perform_page_directory_invocation_invs[wp]:\n \"\\invs and valid_pdi pdi\\\n perform_page_directory_invocation pdi\n \\\\_. invs\\\"\n apply (cases pdi)\n apply (rename_tac cap cslot_ptr pdpte obj_ref vspace)\n apply (rule hoare_pre)\n apply (clarsimp simp: perform_page_directory_invocation_def)\n apply (wp hoare_vcg_const_imp_lift hoare_vcg_all_lift hoare_vcg_conj_lift\n store_pdpte_invs arch_update_cap_invs_map\n | strengthen obj_at_empty_refs_strg\n | simp add: empty_table.arch_only del: split_paired_All | wps\n | rule set_cap.aobj_at | wpc)+\n apply (rule set_cap_cte_wp_at_ex[simplified])\n apply wp+\n apply (clarsimp simp: valid_pdi_def is_arch_update_def cte_wp_at_caps_of_state\n vs_cap_ref_of_table_capNone\n simp del: split_paired_All)\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (rule conjI)\n apply (clarsimp dest!: same_master_cap_same_types simp: vs_cap_ref_of_table_capNone)\n apply (intro conjI allI)\n apply clarsimp\n apply (drule_tac ref = ref in valid_vs_lookupD)\n apply fastforce\n apply (rule ccontr, clarsimp)\n apply (frule_tac cap = x and cap' = cap in unique_table_caps_pdptD2[OF _ _ _ _ obj_refs_eqI invs_unique_table_caps])\n apply assumption+\n apply (erule caps_of_state_valid, fastforce)\n apply (erule caps_of_state_valid, fastforce)\n apply (clarsimp simp: is_cap_simps cap_asid_def vs_cap_ref_def split: option.split_asm)\n apply (clarsimp simp: is_cap_simps)\n apply (rule ref_is_unique)\n apply simp\n apply (erule(1) vs_lookup_vs_lookup_pagesI)\n apply fastforce+\n apply (simp add: global_refs_def)\n apply (fastforce simp: second_level_tables_def)+\n apply (clarsimp dest!: invs_valid_objs valid_objs_caps)\n apply (rename_tac cap cslot)\n apply (clarsimp simp: perform_page_directory_invocation_def)\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: valid_pdi_def is_cap_simps)\n apply (rule hoare_pre)\n apply (wpc | clarsimp simp: cte_wp_at_caps_of_state | wp arch_update_cap_invs_unmap_page_directory get_cap_wp)+\n apply (rule_tac P = \"is_pd_cap (ArchObjectCap (PageDirectoryCap p (Some (x1, x2a))))\" in hoare_gen_asm)\n apply (rule_tac Q = \"\\r. cte_wp_at ((=) (ArchObjectCap (PageDirectoryCap p (Some (x1, x2a))))) (a,b)\n and invs and is_final_cap' (ArchObjectCap (PageDirectoryCap p (Some (x1, x2a))))\n and (\\s. (the (vs_cap_ref (ArchObjectCap (PageDirectoryCap p (Some (x1, x2a))))), p) \\ vs_lookup_pages s)\n and obj_at (empty_table {}) (the (aobj_ref (update_map_data\n (Structures_A.the_arch_cap (ArchObjectCap (PageDirectoryCap p (Some (x1, x2a))))) None None)))\"\n in hoare_post_imp)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps update_map_data_def\n is_arch_update_def cap_master_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid_cap[OF _ invs_valid_objs] split: option.split_asm\n simp: mask_cap_def cap_rights_update_def acap_rights_update_def vs_cap_ref_simps)\n apply (wp hoare_vcg_conj_lift)\n apply (wp mapM_x_wp, force)\n apply (rule mapM_x_swp_store_pde_invs_unmap[unfolded swp_def])\n apply (wp mapM_x_wp)\n apply force\n apply (wp store_invalid_pde_vs_lookup_pages_shrink)\n apply (wp mapM_x_swp_store_empty_pd[unfolded swp_def])\n apply (clarsimp simp: cte_wp_at_caps_of_state vs_cap_ref_def\n is_cap_simps mask_cap_def)\n apply (wp unmap_pd_vs_lookup_pages)\n apply (clarsimp simp: is_final_cap'_def2 gen_obj_refs_def acap_rights_update_def cte_wp_at_caps_of_state\n mask_cap_def)\n apply (clarsimp simp: cap_rights_update_def acap_rights_update_def is_arch_update_def is_cap_simps\n update_map_data_def vs_cap_ref_simps invs_psp_aligned pd_bits_def)\n apply (rule conjI)\n apply (clarsimp simp: valid_cap_def)\n apply (drule valid_table_caps_pdD, force)\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (strengthen range_neg_mask_strengthen[mk_strg] vtable_range_univ[THEN subset_refl_subst, mk_strg])\n apply (frule valid_global_refsD2, force)\n apply (clarsimp simp: valid_cap_def wellformed_mapdata_def image_def le_mask_iff_lt_2n cap_aligned_def\n cap_range_def invs_vspace_objs pd_bits_def vtable_range_univ invs_arch_state)\n done\n\nlemmas valid_table_caps_empty_ptD = empty_table_pt_capI\n\nlemma perform_page_table_invocation_invs[wp]:\n \"\\invs and valid_pti pti\\\n perform_page_table_invocation pti\n \\\\_. invs\\\"\n apply (cases pti)\n apply (rename_tac cap cslot_ptr pdpte obj_ref vspace)\n apply (rule hoare_pre)\n apply (clarsimp simp: perform_page_table_invocation_def)\n apply (wp hoare_vcg_const_imp_lift hoare_vcg_all_lift hoare_vcg_conj_lift\n store_pde_invs arch_update_cap_invs_map\n | strengthen obj_at_empty_refs_strg\n | simp add: empty_table.arch_only del: split_paired_all split_paired_All | wps\n | wp set_cap.aobj_at | wpc)+\n apply (rule set_cap_cte_wp_at_ex[simplified])\n apply wp+\n apply (clarsimp simp: valid_pti_def is_arch_update_def cte_wp_at_caps_of_state\n vs_cap_ref_of_table_capNone\n simp del: split_paired_All)\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (rule conjI)\n apply (clarsimp dest!: same_master_cap_same_types simp: vs_cap_ref_of_table_capNone)\n apply (intro conjI allI)\n apply clarsimp\n apply (drule_tac ref = ref in valid_vs_lookupD)\n apply fastforce\n apply (rule ccontr, clarsimp)\n apply (frule_tac cap = x and cap' = cap in unique_table_caps_pdD2[OF _ _ _ _ obj_refs_eqI invs_unique_table_caps])\n apply assumption+\n apply (erule caps_of_state_valid, fastforce)\n apply (erule caps_of_state_valid, fastforce)\n apply (clarsimp simp: is_cap_simps cap_asid_def vs_cap_ref_def split: option.split_asm)\n apply (clarsimp simp: is_cap_simps)\n apply (rule ref_is_unique)\n apply simp\n apply (erule(1) vs_lookup_vs_lookup_pagesI)\n apply fastforce+\n apply (simp add:global_refs_def)\n apply (fastforce simp: second_level_tables_def)+\n apply (clarsimp dest!: invs_valid_objs valid_objs_caps)\n apply (rename_tac cap cslot)\n apply (clarsimp simp: perform_page_table_invocation_def)\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: valid_pti_def is_cap_simps)\n apply (rule hoare_pre)\n apply (wpc | clarsimp simp: cte_wp_at_caps_of_state | wp arch_update_cap_invs_unmap_page_table get_cap_wp)+\n apply (rule_tac P = \"is_pt_cap (ArchObjectCap (PageTableCap p (Some (x1, x2a))))\" in hoare_gen_asm)\n apply (rule_tac Q = \"\\r. cte_wp_at ((=) (ArchObjectCap (PageTableCap p (Some (x1, x2a))))) (a,b)\n and invs and is_final_cap' (ArchObjectCap (PageTableCap p (Some (x1, x2a))))\n and (\\s. (the (vs_cap_ref (ArchObjectCap (PageTableCap p (Some (x1, x2a))))), p) \\ vs_lookup_pages s)\n and obj_at (empty_table {}) (the (aobj_ref (update_map_data\n (Structures_A.the_arch_cap (ArchObjectCap (PageTableCap p (Some (x1, x2a))))) None None)))\"\n in hoare_post_imp)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps update_map_data_def\n is_arch_update_def cap_master_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid_cap[OF _ invs_valid_objs] split: option.split_asm\n simp: mask_cap_def cap_rights_update_def acap_rights_update_def vs_cap_ref_simps)\n apply (wp hoare_vcg_conj_lift)\n apply (wp mapM_x_wp, force)\n apply (rule mapM_x_swp_store_pte_invs_unmap[unfolded swp_def])\n apply (wp mapM_x_wp)\n apply force\n apply (wp store_invalid_pte_vs_lookup_pages_shrink)\n apply (wp mapM_x_swp_store_empty_pt[unfolded swp_def])\n apply (clarsimp simp: cte_wp_at_caps_of_state vs_cap_ref_def is_cap_simps mask_cap_def)\n apply (wp unmap_pt_vs_lookup_pages unmap_page_table_caps_of_state)\n apply (clarsimp simp: is_final_cap'_def2 gen_obj_refs_def acap_rights_update_def cte_wp_at_caps_of_state\n mask_cap_def)\n apply (clarsimp simp: cap_rights_update_def acap_rights_update_def is_arch_update_def is_cap_simps\n update_map_data_def vs_cap_ref_simps invs_psp_aligned pt_bits_def\n split: cap.split_asm arch_cap.split_asm)\n apply (rule conjI)\n apply (clarsimp simp: valid_cap_def)\n apply (drule valid_table_caps_empty_ptD, force)\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (strengthen range_neg_mask_strengthen[mk_strg])\n apply (frule valid_global_refsD2, force)\n apply (clarsimp simp: valid_cap_def wellformed_mapdata_def image_def le_mask_iff_lt_2n cap_range_def\n invs_vspace_objs vtable_range_univ invs_arch_state cap_aligned_def)\n done\n\nlemma pml4_mask_shift_mask_irrelevant[simp]: \"(((obj_ref::machine_word) && mask pml4_bits >> word_size_bits) &&\n mask ptTranslationBits) = (obj_ref && mask pml4_bits >> word_size_bits)\"\n apply (clarsimp simp: bit_simps mask_def)\n by word_bitwise\n\nlemma valid_table_caps_pdptD:\n \"\\ caps_of_state s p = Some (ArchObjectCap (PDPointerTableCap pd None));\n valid_table_caps s \\ \\\n obj_at (empty_table (set (second_level_tables (arch_state s)))) pd s\"\n apply (clarsimp simp: valid_table_caps_def simp del: split_paired_All)\n apply (erule allE)+\n apply (erule (1) impE)\n apply (fastforce simp add: is_pdpt_cap_def cap_asid_def)\n done\n\nlemma valid_global_refs_pdptD:\n \"\\caps_of_state s (a,b) = Some (ArchObjectCap (PDPointerTableCap p asid)); valid_global_refs s\\\n \\ p \\ set (second_level_tables (arch_state s))\"\n apply (clarsimp simp: valid_global_refs_def valid_refs_def\n cte_wp_at_caps_of_state is_cap_simps)\n apply (drule_tac x=a in spec)\n apply (drule_tac x=b in spec)\n apply (drule_tac x=\"ArchObjectCap (PDPointerTableCap p asid)\" in spec)\n apply (clarsimp simp: cap_range_def global_refs_def second_level_tables_def)\n done\n\nlemma perform_pdpt_invocation_invs[wp]:\n \"\\invs and valid_pdpti pdpti\\\n perform_pdpt_invocation pdpti\n \\\\_. invs\\\"\n apply (cases pdpti)\n apply (rename_tac cap cslot_ptr pml4e obj_ref vspace)\n apply (rule hoare_pre)\n apply (clarsimp simp: perform_pdpt_invocation_def)\n apply (wp hoare_vcg_const_imp_lift hoare_vcg_all_lift hoare_vcg_conj_lift\n store_pml4e_invs arch_update_cap_invs_map\n | strengthen obj_at_empty_refs_strg\n | simp add: empty_table.arch_only del: split_paired_all split_paired_All | wps\n | rule set_cap.aobj_at | wpc)+\n apply (rule set_cap_cte_wp_at_ex[simplified])\n apply (wp hoare_vcg_all_lift set_cap.aobj_at, simp)\n apply wp+\n apply (clarsimp simp: valid_pdpti_def is_arch_update_def cte_wp_at_caps_of_state\n vs_cap_ref_of_table_capNone\n simp del: split_paired_All)\n apply (frule vs_lookup_pages_vs_lookupI)\n apply (rule conjI)\n apply (clarsimp dest!: same_master_cap_same_types simp: vs_cap_ref_of_table_capNone)\n apply (rule conjI)\n apply (frule same_master_cap_same_types)\n apply (clarsimp simp: is_cap_simps cap_master_cap_def kernel_vsrefs_kernel_mapping_slots\n dest!: valid_global_refs_pdptD[OF _ invs_valid_global_refs])\n apply (intro conjI allI)\n apply clarsimp\n apply (drule_tac ref = ref in valid_vs_lookupD)\n apply fastforce\n apply (rule ccontr, clarsimp)\n apply (frule_tac cap = x and cap' = cap in unique_table_caps_pml4D2[OF _ _ _ _ obj_refs_eqI invs_unique_table_caps])\n apply assumption+\n apply (erule caps_of_state_valid, fastforce)\n apply (erule caps_of_state_valid, fastforce)\n apply (clarsimp simp: is_cap_simps cap_asid_def vs_cap_ref_def split: option.split_asm)\n apply (clarsimp simp: is_cap_simps)\n apply (rule ref_is_unique)\n apply simp\n apply (erule(1) vs_lookup_vs_lookup_pagesI)\n apply fastforce+\n apply (simp add:global_refs_def)\n apply (fastforce simp: second_level_tables_def)+\n apply (clarsimp dest!:invs_valid_objs valid_objs_caps)\n apply (clarsimp simp: kernel_vsrefs_kernel_mapping_slots)\n apply (rename_tac cap cslot)\n apply (clarsimp simp: perform_pdpt_invocation_def)\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: valid_pdpti_def is_cap_simps)\n apply (rule hoare_pre)\n apply (wpc | clarsimp simp: cte_wp_at_caps_of_state | wp arch_update_cap_invs_unmap_pd_pointer_table get_cap_wp)+\n apply (rule_tac P = \"is_pdpt_cap (ArchObjectCap (PDPointerTableCap p (Some (x1, x2a))))\" in hoare_gen_asm)\n apply (rule_tac Q = \"\\r. cte_wp_at ((=) (ArchObjectCap (PDPointerTableCap p (Some (x1, x2a))))) (a,b)\n and invs and is_final_cap' (ArchObjectCap (PDPointerTableCap p (Some (x1, x2a))))\n and (\\s. (the (vs_cap_ref (ArchObjectCap (PDPointerTableCap p (Some (x1, x2a))))), p) \\ vs_lookup_pages s)\n and obj_at (empty_table {}) (the (aobj_ref (update_map_data\n (Structures_A.the_arch_cap (ArchObjectCap (PDPointerTableCap p (Some (x1, x2a))))) None None)))\"\n in hoare_post_imp)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps update_map_data_def\n is_arch_update_def cap_master_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid_cap[OF _ invs_valid_objs] split: option.split_asm\n simp: mask_cap_def cap_rights_update_def acap_rights_update_def vs_cap_ref_simps)\n apply (wp hoare_vcg_conj_lift)\n apply (wp mapM_x_wp, force)\n apply (rule mapM_x_swp_store_pdpte_invs_unmap[unfolded swp_def])\n apply (wp mapM_x_wp)\n apply force\n apply (wp store_invalid_pdpte_vs_lookup_pages_shrink)\n apply (wp mapM_x_swp_store_empty_pdpt[unfolded swp_def])\n apply (clarsimp simp: cte_wp_at_caps_of_state vs_cap_ref_def is_cap_simps mask_cap_def)\n apply (wp unmap_pdpt_vs_lookup_pages)\n apply (clarsimp simp: is_final_cap'_def2 gen_obj_refs_Int acap_rights_update_def cte_wp_at_caps_of_state\n mask_cap_def)\n apply (clarsimp simp: cap_rights_update_def acap_rights_update_def is_arch_update_def is_cap_simps\n update_map_data_def vs_cap_ref_simps invs_psp_aligned pd_bits_def\n split: cap.split_asm arch_cap.split_asm)\n apply (intro conjI impI)\n apply (clarsimp simp: valid_cap_def)\n apply (drule valid_table_caps_pdptD, force)\n apply (clarsimp simp: obj_at_def empty_table_def)\n apply (simp add: pdpt_bits_def)\n apply (strengthen range_neg_mask_strengthen[mk_strg] vtable_range_univ[THEN subset_refl_subst, mk_strg])\n apply (frule valid_global_refsD2, force)\n apply (clarsimp simp: valid_cap_def wellformed_mapdata_def image_def le_mask_iff_lt_2n cap_aligned_def\n cap_range_def invs_vspace_objs pdpt_bits_def vtable_range_univ invs_arch_state)\n done\n\nlemma valid_kernel_mappingsD:\n \"\\ kheap s pml4ptr = Some (ArchObj (PageMapL4 pml4));\n valid_kernel_mappings s \\\n \\ \\x r. pml4e_ref (pml4 x) = Some r \\\n (r \\ set (second_level_tables (arch_state s)))\n = (ucast (pptr_base >> pml4_shift_bits) \\ x)\"\n apply (simp add: valid_kernel_mappings_def)\n apply (drule bspec, erule ranI)\n unfolding valid_kernel_mappings_if_pm_def valid_kernel_mappings_if_pm_arch_def\n apply (simp add: valid_kernel_mappings_if_pm_def\n kernel_mapping_slots_def)\n done\n\nlemma set_mi_invs[wp]: \"\\invs\\ set_message_info t a \\\\x. invs\\\"\n by (simp add: set_message_info_def, wp)\n\nlemma reachable_page_table_not_global:\n \"\\(ref \\ p) s; valid_kernel_mappings s; valid_global_pdpts s;\n valid_vspace_objs s; valid_asid_table (x64_asid_table (arch_state s)) s\\\n \\ p \\ set (second_level_tables (arch_state s))\"\n apply clarsimp\n apply (erule (2) vs_lookupE_alt[OF _ _valid_asid_table_ran])\n apply (fastforce simp: second_level_tables_def valid_global_pdpts_def obj_at_def)+\n apply (clarsimp simp: second_level_tables_def valid_global_pdpts_def)\n apply (drule (1) bspec)\n apply (clarsimp simp: obj_at_def)\n apply (clarsimp simp: valid_kernel_mappings_def valid_kernel_mappings_if_pm_def ran_def)\n apply (drule_tac x=\"ArchObj (PageMapL4 pm)\" in spec)\n apply (drule mp, erule_tac x=p\\<^sub>2 in exI)\n apply (clarsimp simp: second_level_tables_def)\n apply (fastforce simp: second_level_tables_def valid_global_pdpts_def obj_at_def)+\n done\n\nlemma invs_valid_global_pdpts[elim]:\n \"invs s \\ valid_global_pdpts s\"\n by (clarsimp simp: invs_def valid_arch_state_def valid_state_def)\n\nlemmas valid_table_caps_ptD = empty_table_pt_capI\n\nlemma empty_ref_pageD[elim]:\n \"\\ data_at X64LargePage page s \\ \\\n obj_at (\\ko. vs_refs_pages ko = {}) page s\"\n \"\\ data_at X64HugePage page s \\ \\\n obj_at (\\ko. vs_refs_pages ko = {}) page s\"\n by (fastforce simp: vs_refs_pages_def data_at_def obj_at_def)+\n\nlemma empty_refs_pageCapD[elim]:\n \"s \\ ArchObjectCap (PageCap dev p Ra tpa sz ma) \\ obj_at (\\ko. vs_refs_pages ko = {}) p s\"\n by (clarsimp simp: valid_cap_def vs_refs_pages_def obj_at_def split: if_splits)\n\nlemma reachable_pd_not_global:\n \"\\(ref \\ p) s; valid_kernel_mappings s; valid_global_pdpts s;\n valid_vspace_objs s; valid_asid_table (x64_asid_table (arch_state s)) s\\\n \\ p \\ set (second_level_tables (arch_state s))\"\n apply clarsimp\n apply (erule (2) vs_lookupE_alt[OF _ _valid_asid_table_ran])\n apply (fastforce simp: second_level_tables_def valid_global_pdpts_def obj_at_def)+\n apply (clarsimp simp: second_level_tables_def valid_global_pdpts_def)\n apply (drule (1) bspec)\n apply (clarsimp simp: obj_at_def)\n apply (clarsimp simp: valid_kernel_mappings_def valid_kernel_mappings_if_pm_def ran_def)\n apply (drule_tac x=\"ArchObj (PageMapL4 pm)\" in spec)\n apply (drule mp, erule_tac x=p\\<^sub>2 in exI)\n apply clarsimp\n apply (fastforce simp: second_level_tables_def valid_global_pdpts_def obj_at_def)+\n done\n\nlemma vs_lookup_invs_ref_is_unique: \"\\ (ref \\ p) s; (ref' \\ p) s; invs s \\ \\ ref = ref'\"\n apply (erule (1) ref_is_unique)\n apply (erule reachable_pd_not_global)\n by (auto elim: invs_valid_kernel_mappings intro!: valid_objs_caps)\n\ncrunch invs[wp]: pte_check_if_mapped, pde_check_if_mapped \"invs\"\n\ncrunch vs_lookup[wp]: pte_check_if_mapped, pde_check_if_mapped \"\\s. P (vs_lookup s)\"\n\ncrunch valid_pte[wp]: pte_check_if_mapped \"\\s. P (valid_pte p s)\"\n\ncrunch invs[wp]: lookup_pt_slot invs\n\nlemma unmap_page_invs[wp]:\n \"\\invs and K (vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page pgsz asid vaddr pptr\n \\\\rv. invs\\\"\n apply (simp add: unmap_page_def)\n apply (rule hoare_pre)\n apply (wpc | wp | strengthen imp_consequent)+\n apply ((wp store_pde_invs store_pte_invs unlessE_wp do_machine_op_global_refs_inv get_pde_wp\n hoare_vcg_all_lift find_vspace_for_asid_lots get_pte_wp store_pdpte_invs get_pdpte_wp\n hoare_vcg_all_lift_R\n | wpc | simp add: flush_all_def pdpte_ref_pages_def if_apply_def2\n | strengthen not_in_global_refs_vs_lookup\n not_in_global_refs_vs_lookup invs_valid_vs_lookup\n invs_valid_global_refs\n invs_arch_state invs_valid_global_objs | clarsimp simp: conj_comms\n | wp (once) hoare_drop_imps)+)\n apply (auto simp: vspace_at_asid_def is_aligned_pml4[simplified] invs_vspace_objs\n invs_psp_aligned lookup_pml4_slot_eq pml4e_ref_def)\n done\n\nlemma unmap_page_unmapped:\n \"\\pspace_aligned and valid_vspace_objs and data_at sz pptr and valid_arch_state and\n valid_objs and (\\s. valid_asid_table (x64_asid_table (arch_state s)) s) and\n K ((sz = X64SmallPage \\ ref =\n [VSRef ((vaddr >> 12) && mask 9) (Some APageTable),\n VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory),\n VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None]) \\\n (sz = X64LargePage \\ ref =\n [VSRef ((vaddr >> 21) && mask 9) (Some APageDirectory),\n VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None]) \\\n (sz = X64HugePage \\ ref =\n [VSRef ((vaddr >> 30) && mask 9) (Some APDPointerTable),\n VSRef ((vaddr >> 39) && mask 9) (Some APageMapL4),\n VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool),\n VSRef (ucast (asid_high_bits_of asid)) None]) \\\n p = pptr \\ vaddr < pptr_base \\ canonical_address vaddr)\\\n unmap_page sz asid vaddr pptr\n \\\\rv s. \\ (ref \\ p) s\\\"\n apply (rule hoare_gen_asm, clarsimp)\n apply (cases sz; simp)\n by (wpsimp wp: unmap_page_vs_lookup_pages_small unmap_page_vs_lookup_pages_large\n unmap_page_vs_lookup_pages_huge)+\n\nlemma set_cap_obj_at_vs_refs_pages[wp]:\n \"set_cap p cap \\obj_at (\\ko. vs_refs_pages ko = {}) ptr\\\"\n by (wpsimp wp: set_cap.aobj_at simp: vs_refs_pages_empty.arch_only)\n\nlemmas invs_implies =\n invs_equal_kernel_mappings\n invs_arch_state\n invs_valid_asid_map\n invs_valid_global_objs\n invs_valid_ioports\n invs_valid_vs_lookup\n invs_vspace_objs\n invs_psp_aligned\n invs_distinct\n invs_cur\n invs_iflive\n invs_ifunsafe\n invs_valid_global_refs\n invs_valid_idle\n invs_valid_irq_node\n invs_valid_irq_states\n invs_mdb\n invs_valid_objs\n invs_valid_pspace\n invs_valid_reply_caps\n invs_valid_reply_masters\n invs_valid_stateI\n invs_zombies\n invs_unique_table_caps\n invs_unique_refs\n invs_hyp_sym_refs\n invs_sym_refs\n invs_valid_asid_table\n tcb_at_invs\n invs_valid_kernel_mappings\n\nlemma vs_cap_ref_None:\n \"vs_cap_ref (ArchObjectCap (PageCap dev pg_ptr rghts maptype pg_sz mapdata)) = None \\ mapdata = None\"\n by (cases mapdata; clarsimp simp: vs_cap_ref_def split: vmpage_size.splits)\n\nlemma perform_page_invs [wp]:\n \"\\invs and valid_page_inv page_inv\\ perform_page_invocation page_inv \\\\_. invs\\\"\n apply (simp add: perform_page_invocation_def)\n apply (cases page_inv, simp_all)\n \\ \\PageMap\\\n apply (rename_tac cap cslot_ptr sum)\n apply clarsimp\n apply (rule hoare_pre)\n apply (wpsimp wp: store_pte_invs store_pde_invs store_pdpte_invs hoare_vcg_const_imp_lift\n hoare_vcg_all_lift set_cap_arch_obj arch_update_cap_invs_map\n simp: pte_check_if_mapped_def pde_check_if_mapped_def\n simp_del: fun_upd_apply split_paired_Ex)\n apply (wp set_cap_cte_wp_at_ex hoare_vcg_imp_lift hoare_vcg_all_lift arch_update_cap_invs_map\n set_cap.aobj_at[OF vs_refs_pages_empty.arch_only] | wps)+\n apply (clarsimp simp: valid_page_inv_def cte_wp_at_caps_of_state valid_slots_def is_cap_simps\n parent_for_refs_def empty_refs_def same_refs_def pt_bits_def\n is_arch_update_def cap_master_cap_def\n split: vm_page_entry.splits\n simp del: split_paired_Ex split_paired_All\n | strengthen not_in_global_refs_vs_lookup invs_valid_global_refs invs_arch_state\n invs_valid_vs_lookup invs_valid_global_objs)+\n apply (rule conjI, fastforce)\n apply (intro conjI impI allI)\n apply (clarsimp simp del: split_paired_Ex split_paired_All)\n apply (frule(2) unique_table_caps_ptD[OF _ _ _ _ _ _ invs_unique_table_caps],\n simp add: is_cap_simps, fastforce simp: is_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid[OF _ invs_valid_objs]\n is_aligned_pt[OF _ invs_psp_aligned]\n simp: obj_refs_def valid_cap_def pt_bits_def)\n apply simp\n apply clarsimp\n apply (rule ref_is_unique[OF _ vs_lookup_vs_lookup_pagesI reachable_page_table_not_global])\n apply ((fastforce simp: local.invs_valid_kernel_mappings\n elim: valid_objs_caps[OF invs_valid_objs])+)[16]\n apply (drule_tac x = ref in spec)\n apply (clarsimp simp: vs_cap_ref_def pde_ref_pages_def split: pde.splits)\n apply (clarsimp simp: valid_pde_def split: pde.splits\n split: vmpage_size.splits option.split_asm pde.splits)\n apply (intro conjI impI allI)\n apply fastforce\n apply (clarsimp simp del: split_paired_Ex split_paired_All)\n apply (frule(2) unique_table_caps_pdD[OF _ _ _ _ _ _ invs_unique_table_caps],\n simp add: is_cap_simps, fastforce simp: is_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid[OF _ invs_valid_objs] is_aligned_pd[OF _ invs_psp_aligned]\n simp: obj_refs_def valid_cap_def pt_bits_def)\n apply simp\n apply clarsimp\n apply (rule ref_is_unique[OF _ vs_lookup_vs_lookup_pagesI reachable_page_table_not_global])\n apply ((fastforce simp: local.invs_valid_kernel_mappings\n elim: valid_objs_caps[OF invs_valid_objs])+)[16]\n apply (frule(1) caps_of_state_valid[OF _ invs_valid_objs])\n apply (match premises in P: \\caps_of_state _ _ = Some (ArchObjectCap (PageDirectoryCap _ _))\\\n \\ \\rule revcut_rl[OF valid_global_refsD2[OF P]]\\, fastforce)\n apply (clarsimp dest!: is_aligned_pd[OF _ invs_psp_aligned]\n simp: cap_range_def valid_cap_def)\n apply (simp add: empty_ref_pageD)\n apply (match premises in P: \\caps_of_state _ _ = Some (ArchObjectCap (PageDirectoryCap _ _))\\\n \\ \\rule revcut_rl[OF valid_global_refsD2[OF P]]\\, fastforce)\n apply (clarsimp dest!: is_aligned_pd[OF _ invs_psp_aligned]\n simp: cap_range_def valid_cap_def)\n apply (rule conjI)\n apply (rename_tac pd_cap_cnode pd_cap_idx pd_asid pd_map_data pg_rghts pg_map_ty\n map_asid map_vaddr pde_paddr pde_attrs pde_rghts pg_asid pg_vaddr)\n apply (intro allI impI, rename_tac pd_cap_cnode' pd_cap_idx' pd_cap')\n apply (case_tac pd_cap'; clarsimp; rename_tac pd_acap'; case_tac pd_acap'; clarsimp)\n apply (frule_tac ptr=\"(pd_cap_cnode, pd_cap_idx)\" and ptr'=\"(pd_cap_cnode', pd_cap_idx')\"\n in unique_table_capsD[OF invs_unique_table_caps]; assumption?; clarsimp simp: is_cap_simps)\n apply (clarsimp, frule (1) vs_lookup_invs_ref_is_unique[OF vs_lookup_vs_lookup_pagesI]\n ; assumption?; clarsimp)\n apply (rule conjI, fastforce)\n apply (clarsimp dest!: empty_refs_pageCapD)\n apply (intro conjI impI allI)\n apply (clarsimp simp del: split_paired_Ex split_paired_All)\n apply (frule(2) unique_table_caps_pdptD[OF _ _ _ _ _ _ invs_unique_table_caps],\n simp add: is_cap_simps, fastforce simp: is_cap_simps)\n apply (clarsimp dest!: caps_of_state_valid[OF _ invs_valid_objs]\n is_aligned_pdpt[OF _ invs_psp_aligned]\n simp: obj_refs_def valid_cap_def pdpt_bits_def)\n apply simp\n apply clarsimp\n apply (rule ref_is_unique[OF _ vs_lookup_vs_lookup_pagesI reachable_page_table_not_global])\n apply ((fastforce simp: local.invs_valid_kernel_mappings\n elim: valid_objs_caps[OF invs_valid_objs])+)[16]\n apply (frule(1) caps_of_state_valid[\n OF _ invs_valid_objs,\n where c = \"(ArchObjectCap (PDPointerTableCap pc asid))\" for pc asid])\n apply (drule valid_global_refsD2[\n where cap = \"(ArchObjectCap (PDPointerTableCap pc asid))\" for pc asid], fastforce)\n apply (clarsimp dest!: is_aligned_pdpt[OF _ invs_psp_aligned]\n simp: cap_range_def valid_cap_def cap_aligned_def)\n \\ \\PageUnmap\\\n apply (rename_tac arch_cap cslot_ptr)\n apply (rule hoare_pre)\n apply (wp dmo_invs arch_update_cap_invs_unmap_page get_cap_wp\n | wpc | simp add: perform_page_invocation_unmap_def)+\n apply (rule_tac Q=\"\\_ s. invs s \\\n cte_wp_at (\\c. is_pg_cap c \\\n (\\ref. vs_cap_ref c = Some ref \\\n \\ (ref \\ obj_ref_of c) s)) cslot_ptr s\"\n in hoare_strengthen_post)\n prefer 2\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps\n update_map_data_def\n is_arch_update_def cap_master_cap_simps)\n apply (drule caps_of_state_valid, fastforce)\n apply (clarsimp simp: valid_cap_def cap_aligned_def vs_cap_ref_def\n split: option.splits vmpage_size.splits cap.splits)\n apply (simp add: cte_wp_at_caps_of_state)\n apply (wp unmap_page_invs hoare_vcg_ex_lift hoare_vcg_all_lift hoare_vcg_imp_lift\n unmap_page_unmapped)+\n apply (clarsimp simp: valid_page_inv_def cte_wp_at_caps_of_state)\n apply (clarsimp simp: is_cap_simps cap_master_cap_simps is_arch_update_def\n update_map_data_def cap_rights_update_def\n acap_rights_update_def)\n using valid_validate_vm_rights[simplified valid_vm_rights_def]\n apply (auto simp: valid_cap_simps cap_aligned_def mask_def vs_cap_ref_def data_at_def\n split: vmpage_size.splits option.splits if_splits)[1]\n apply (clarsimp simp: valid_page_inv_def cte_wp_at_caps_of_state valid_cap_def mask_def)\n done\n\n\nlemma not_kernel_slot_not_global_pml4:\n \"\\pml4e_ref (pml4 x) = Some p; x \\ kernel_mapping_slots;\n kheap s p' = Some (ArchObj (PageMapL4 pml4)); valid_kernel_mappings s\\\n \\ p \\ set (second_level_tables (arch_state s))\"\n apply (clarsimp simp: valid_kernel_mappings_def valid_kernel_mappings_if_pm_def)\n apply (drule_tac x=\"ArchObj (PageMapL4 pml4)\" in bspec)\n apply ((fastforce simp: ran_def)+)[1]\n apply (simp split: arch_kernel_obj.split_asm)\n done\n\nlemma valid_table_caps_asid_upd:\n \"\\invs s; typ_at (AArch AASIDPool) p s\\\n \\ valid_table_caps_aobj (caps_of_state s) (arch_state s) (ArchObj (ASIDPool (pool(asid_low_bits_of asid := pml4base)))) p\"\n by (fastforce dest!: caps_of_state_valid_cap[OF _ invs_valid_objs]\n simp: valid_table_caps_aobj_def is_cap_simps valid_cap_simps obj_at_def)\n\nlemma vs_refs_of_set_diff:\n \"set_diff (vs_refs (ArchObj (ASIDPool (pool(ucast asid := pml4base))))) (vs_refs (ArchObj (ASIDPool pool)))\n \\ (case pml4base of Some a \\ {(VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), a)} | _ \\ {})\n \\ (case pool (ucast asid) of Some a \\ {(VSRef (ucast (asid_low_bits_of asid)) (Some AASIDPool), a)} | _ \\ {})\"\n by (fastforce simp: set_diff_def vs_refs_def graph_of_def image_def ucast_ucast_id asid_low_bits_of_def\n split: if_split_asm)\n\nlemma asid_lvl_lookup1D:\n \"([VSRef (ucast (asid_high_bits_of asid)) None] \\ p) s \\ ([VSRef (ucast (asid_high_bits_of asid)) None], p) \\ vs_asid_refs (x64_asid_table (arch_state s))\"\n apply (clarsimp simp: vs_lookup_def)\n apply (erule rtranclE)\n apply clarsimp\n apply (erule rtranclE)\n apply (clarsimp simp: vs_asid_refs_def vs_lookup1_def)\n apply (clarsimp dest!: wellformed_lookup.lookup1_is_append[OF vs_lookup1_is_wellformed_lookup])\n done\n\nlemma valid_kernel_mappings_if_pm_asid:\n \"\\valid_kernel_mappings s; kheap s p = Some (ArchObj (ASIDPool pool))\\\n \\ valid_kernel_mappings_if_pm (set (second_level_tables (arch_state s))) (ArchObj (ASIDPool (pool(asid_low_bits_of asid := pml4base))))\"\n by (fastforce simp: pml4e_ref_def valid_kernel_mappings_if_pm_def valid_kernel_mappings_def\n dest!: bspec split: option.split_asm pml4e.split_asm)\n\nlemma valid_global_objs_upd_invalid_asid_slot:\n \"\\valid_global_objs s; kheap s p = Some (ArchObj (ASIDPool pool))\\\n \\ valid_global_objs_upd p (ASIDPool (pool(slot := e))) (arch_state s)\"\n by (clarsimp simp: valid_global_objs_def valid_global_objs_upd_def obj_at_def valid_ao_at_def\n empty_table_def global_refs_def)\n\n\nlemma refs_diff_empty_simps_vslookup1_asid[simp]:\n \"kheap s p = Some (ArchObj (ASIDPool pool)) \\\n (refs_diff vs_lookup1_on_heap_obj (ASIDPool (pool(a := b))) p s) = (case b of None \\ {}\n | Some x \\\n if b = (pool a)\n then {}\n else {([VSRef (ucast a)\n (Some AASIDPool)],\n x)})\"\n apply (clarsimp simp: refs_diff_def vs_lookup1_on_heap_obj_def lookup_refs_def vs_refs_def)\n apply (auto simp: graph_of_def image_def split: if_splits option.splits)\n done\n\nlemma refs_diff_empty_simps_vslookup_pages1_asid[simp]:\n \"kheap s p = Some (ArchObj (ASIDPool pool)) \\\n (refs_diff vs_lookup_pages1_on_heap_obj (ASIDPool (pool(a := b))) p s) = (case b of None \\ {}\n | Some x \\\n if b = (pool a)\n then {}\n else {([VSRef (ucast a)\n (Some AASIDPool)],\n x)})\"\n apply (clarsimp simp: refs_diff_def vs_lookup_pages1_on_heap_obj_def lookup_refs_def vs_refs_pages_def)\n apply (auto simp: graph_of_def image_def split: if_splits option.splits)\n done\n\nlemma asid_is_zeroI:\n \"\\ ucast (asid_low_bits_of asid) = (0 :: word64);\n ucast (asid_high_bits_of asid) = (0 :: word64);\n asid_wf asid \\ \\ asid = 0\"\n apply (clarsimp simp: bit_simps asid_bits_of_defs asid_low_bits_def asid_bits_def mask_def asid_wf_def)\n apply word_bitwise\n apply simp\n done\n\nlemma store_asid_pool_entry_invs:\n \"\\invs and K (0 < asid \\ asid_wf asid) and\n (\\s. case pml4base of None \\ True\n | Some ptr \\ obj_at (empty_table (set (second_level_tables (arch_state s)))) ptr s\n \\ typ_at (AArch APageMapL4) ptr s \\ (\\pool. ko_at (ArchObj (ASIDPool pool)) p s \\ pool (asid_low_bits_of asid) = None)\n \\ p \\ set (second_level_tables (arch_state s))\n \\ (\\slot. cte_wp_at (\\cap. is_pml4_cap cap \\ ptr \\ obj_refs cap \\ cap_asid cap = Some asid) slot s))\n and [VSRef (ucast (asid_high_bits_of asid)) None] \\ p\n \\\n store_asid_pool_entry p asid pml4base \\\\_. invs\\\"\n unfolding store_asid_pool_entry_def\n apply (simp add: set_arch_obj_simps)\n apply wp\n apply simp\n apply (intro impI allI conjI valid_table_caps_aobj_upd_invalid_pml4e invs_valid_table_caps , simp_all add: obj_at_def)\n apply (clarsimp simp: obj_at_def aa_type_simps aobj_upd_invalid_slots_simps ucast_ucast_mask a_type_simps\n split: if_split_asm option.split_asm dest:valid_vspace_obj_from_invs valid_obj_from_invs\n | intro valid_table_caps_asid_upd)+\n apply (clarsimp simp: obj_at_def aa_type_simps aobj_upd_invalid_slots_simps ucast_ucast_mask\n split: if_split_asm option.split_asm dest:valid_vspace_obj_from_invs valid_obj_from_invs\n | intro valid_kernel_mappings_if_pm_asid invs_valid_kernel_mappings valid_global_objs_upd_invalid_asid_slot\n | fastforce)+\n apply (fastforce dest!: valid_vspace_obj_from_invs ran_del_subset simp: obj_at_def)+\n apply (clarsimp simp: obj_at_def aa_type_simps aobj_upd_invalid_slots_simps ucast_ucast_mask\n split: if_split_asm option.split_asm dest:valid_vspace_obj_from_invs valid_obj_from_invs)\n apply (rule ccontr)\n apply (erule(1) unmapped_cap_lookup_refs_empty[OF _ rtrancl_into_trancl1])\n apply (drule wellformed_lookup.lookup1_cut[OF vs_lookup1_is_wellformed_lookup],fastforce,fastforce)\n apply (clarsimp simp: aa_type_simps obj_at_def split: option.split_asm if_split_asm)\n apply (clarsimp simp: obj_at_def aa_type_simps aobj_upd_invalid_slots_simps ucast_ucast_mask\n split: if_split_asm option.split_asm dest:valid_vspace_obj_from_invs valid_obj_from_invs)\n apply (rule ccontr)\n apply (erule unmapped_cap_lookup_refs_pages_empty[OF _ ])\n apply (erule rtrancl_into_trancl1)\n apply (drule wellformed_lookup.lookup1_cut[OF vs_lookup_pages1_is_wellformed_lookup],fastforce,fastforce)\n apply (clarsimp split: option.split_asm if_split_asm simp: aa_type_simps obj_at_def)\n apply (clarsimp split: if_split_asm option.split_asm dest!:ref_pages_Some simp: lookupable_refs_def obj_at_def)\n apply (frule(2) empty_table_lookup_refs_refl)\n apply (clarsimp simp: empty_table_def)\n apply (clarsimp split: if_split_asm option.split_asm dest!:ref_pages_Some simp: lookupable_refs_def obj_at_def)\n apply (frule(2) empty_table_lookup_refs_pages_refl)\n apply clarsimp\n apply (drule vs_lookup_vs_lookup_pagesI')\n apply (clarsimp simp: obj_at_def aa_type_simps a_type_simps)\n apply force\n apply force\n apply (drule(1) ref_is_unique)\n apply force+\n apply (clarsimp dest!: invs_valid_objs valid_objs_caps)\n apply clarsimp\n apply (frule (2) asid_is_zeroI, simp)\n apply (clarsimp simp: lookupable_refs_def obj_at_def split: option.split_asm if_split_asm)\n apply (frule(2) empty_table_lookup_refs_pages_refl)\n apply clarsimp\n apply (drule vs_lookup_vs_lookup_pagesI')\n apply (clarsimp simp: obj_at_def aa_type_simps a_type_simps)\n apply force\n apply force\n apply (drule(1) ref_is_unique)\n apply force+\n apply (clarsimp dest!: invs_valid_objs valid_objs_caps)\n apply (clarsimp simp: cte_wp_at_caps_of_state is_cap_simps)\n apply (intro exI conjI)\n apply assumption\n apply (fastforce simp: vs_cap_ref_def cap_asid_def split: option.split_asm)+\n done\n\nlemma valid_table_caps_pml4D:\n \"\\ caps_of_state s p = Some (ArchObjectCap (PML4Cap pool None));\n valid_table_caps s \\ \\\n obj_at (empty_table (set (second_level_tables (arch_state s)))) pool s\"\n apply (clarsimp simp: valid_table_caps_def simp del: split_paired_All)\n apply (erule allE)+\n apply (erule (1) impE)\n apply (fastforce simp add: is_cap_simps cap_asid_def)\n done\n\nlemma perform_asid_pool_invs [wp]:\n \"\\invs and valid_apinv api\\ perform_asid_pool_invocation api \\\\_. invs\\\"\n apply (clarsimp simp: perform_asid_pool_invocation_def split: asid_pool_invocation.splits)\n apply (wp arch_update_cap_invs_map store_asid_pool_entry_invs\n get_cap_wp set_cap_typ_at empty_table_lift[OF _ hoare_weaken_pre]\n set_cap_obj_at_other hoare_vcg_all_lift set_cap_cte_wp_at_ex\n | wpc | simp del: split_paired_Ex)+\n apply (rename_tac asid pml4base a b s)\n apply (clarsimp simp: valid_apinv_def cap_asid_def cte_wp_at_caps_of_state is_arch_update_def\n is_cap_simps cap_master_cap_simps vs_cap_ref_simps\n split: option.split_asm)\n apply (frule caps_of_state_cteD)\n apply (drule cte_wp_valid_cap, fastforce)\n apply (frule valid_table_caps_pml4D)\n apply force\n apply (simp add: valid_cap_def cap_aligned_def obj_at_def)\n apply (drule caps_of_state_cteD)\n apply (clarsimp simp: obj_at_def cte_wp_at_cases a_type_def second_level_tables_def)\n apply (clarsimp split: Structures_A.kernel_object.splits arch_kernel_obj.splits if_split_asm)\n apply (fastforce dest!: invs_valid_global_objs simp: valid_global_objs_def obj_at_def)\n done\n\nlemma invs_aligned_pml4D:\n \"\\ pspace_aligned s; valid_arch_state s \\ \\ is_aligned (x64_global_pml4 (arch_state s)) pml4_bits\"\n apply (clarsimp simp: valid_arch_state_def)\n apply (drule (1) is_aligned_pml4)\n apply (simp add: pml4_bits_def pageBits_def)\n done\n\n(* is this the right way? we need this fact globally but it's proven with\n X64 defns. *)\nlemma set_cap_valid_arch_caps_simple:\n \"\\\\s. valid_arch_caps s\n \\ valid_objs s\n \\ cte_wp_at (Not o is_arch_cap) ptr s\n \\ (obj_refs cap \\ {} \\ s \\ cap)\n \\ \\ (is_arch_cap cap)\\\n set_cap cap ptr\n \\\\rv. valid_arch_caps\\\"\n apply (wp set_cap_valid_arch_caps)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid_cap)\n apply (rename_tac cap')\n apply (subgoal_tac \"\\x \\ {cap, cap'}. \\ is_pt_cap x \\ \\ X64.is_pd_cap x\")\n apply simp\n apply (rule conjI)\n apply (clarsimp simp: vs_cap_ref_def is_cap_simps split: cap.splits)\n apply (erule impCE)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state is_cap_simps\n obj_ref_none_no_asid)\n apply (clarsimp simp: is_cap_simps)\n apply (rule no_cap_to_obj_with_diff_ref_triv, simp_all)\n apply (rule ccontr, clarsimp simp: table_cap_ref_def is_cap_simps)\n apply (auto simp: is_cap_simps table_cap_ref_def split: cap.splits)\n done\n\ncrunch device_state_inv[wp]: in8, in16, in32, out8, out16, out32 \"\\ms. P (device_state ms)\"\n\nlemmas in8_irq_masks = no_irq[OF no_irq_in8]\nlemmas in16_irq_masks = no_irq[OF no_irq_in16]\nlemmas in32_irq_masks = no_irq[OF no_irq_in32]\n\nlemmas out8_irq_masks = no_irq[OF no_irq_out8]\nlemmas out16_irq_masks = no_irq[OF no_irq_out16]\nlemmas out32_irq_masks = no_irq[OF no_irq_out32]\n\nlemma dmo_in8[wp]: \"\\invs\\ do_machine_op (in8 irq) \\\\y. invs\\\"\n apply (wp dmo_invs)\n apply safe\n apply (drule_tac Q=\"\\_ m'. underlying_memory m' p = underlying_memory m p\"\n in use_valid)\n apply ((clarsimp simp: in8_def machine_op_lift_def\n machine_rest_lift_def split_def | wp)+)[3]\n apply(erule (1) use_valid[OF _ in8_irq_masks])\n done\n\nlemma dmo_in16[wp]: \"\\invs\\ do_machine_op (in16 irq) \\\\y. invs\\\"\n apply (wp dmo_invs)\n apply safe\n apply (drule_tac Q=\"\\_ m'. underlying_memory m' p = underlying_memory m p\"\n in use_valid)\n apply ((clarsimp simp: in16_def machine_op_lift_def\n machine_rest_lift_def split_def | wp)+)[3]\n apply(erule (1) use_valid[OF _ in16_irq_masks])\n done\n\nlemma dmo_in32[wp]: \"\\invs\\ do_machine_op (in32 irq) \\\\y. invs\\\"\n apply (wp dmo_invs)\n apply safe\n apply (drule_tac Q=\"\\_ m'. underlying_memory m' p = underlying_memory m p\"\n in use_valid)\n apply ((clarsimp simp: in32_def machine_op_lift_def\n machine_rest_lift_def split_def | wp)+)[3]\n apply(erule (1) use_valid[OF _ in32_irq_masks])\n done\n\nlemma dmo_out8[wp]: \"\\invs\\ do_machine_op (out8 irq b) \\\\y. invs\\\"\n by (clarsimp simp: out8_def do_machine_op_lift_invs)\n\nlemma dmo_out16[wp]: \"\\invs\\ do_machine_op (out16 irq b) \\\\y. invs\\\"\n by (clarsimp simp: out16_def do_machine_op_lift_invs)\n\nlemma dmo_out32[wp]: \"\\invs\\ do_machine_op (out32 irq b) \\\\y. invs\\\"\n by (clarsimp simp: out32_def do_machine_op_lift_invs)\n\nlemma perform_io_port_invocation_invs[wp]:\n \"\\invs\\ perform_io_port_invocation iopinv \\\\rv. invs\\\"\n apply (clarsimp simp: perform_io_port_invocation_def)\n apply (rule hoare_pre)\n apply (wpsimp simp: port_in_def port_out_def)\n apply (clarsimp simp: tcb_at_invs)\n done\n\nlemma user_vtop_mask: \"user_vtop = mask 47\"\n by (simp add: user_vtop_def pptrUserTop_def mask_def)\n\nlemma user_vtop_le: \"p && user_vtop \\ mask 47\"\n by (simp add: user_vtop_mask word_and_le1)\n\nlemma canonical_address_user_vtop_p: \"p = p' && user_vtop \\ canonical_address p\"\n by (simp add: canonical_address_range user_vtop_le)\n\nlemmas canonical_address_user_vtop [simp] = canonical_address_user_vtop_p[OF refl]\n\nlemma user_vtop_less_pptr_base [simp]: \"p && user_vtop < pptr_base\"\n by (rule le_less_trans[OF user_vtop_le];\n simp add: mask_def user_vtop_def pptr_base_def pptrBase_def)\n\nlemma user_vtop_kernel_mapping_slots:\n \"ucast (get_pml4_index (p && user_vtop)) \\ kernel_mapping_slots\"\n by (rule kernel_base_kernel_mapping_slots; simp)\n\nlemma kernel_vsrefs_kernel_mapping_slots':\n \"VSRef (get_pml4_index p) (Some APageMapL4) \\ kernel_vsrefs\n \\ ucast (p >> pml4_shift_bits) \\ kernel_mapping_slots\"\n using kernel_vsrefs_kernel_mapping_slots[of \"p >> (pml4_shift_bits - word_size_bits)\", symmetric]\n apply (clarsimp simp: shiftr_over_and_dist get_pml4_index_def bit_simps shiftr_mask2 shiftr_shiftr)\n apply (subst ucast_mask_drop; clarsimp)\n done\n\nlemma user_vtop_kernel_vsrefs:\n \"VSRef (get_pml4_index (p && user_vtop)) (Some APageMapL4) \\ kernel_vsrefs\"\n using user_vtop_kernel_mapping_slots kernel_vsrefs_kernel_mapping_slots'\n by (simp add: get_pml4_index_def bit_simps ucast_mask_drop)\n\ncontext\n fixes c :: cap\n assumes vsc: \"is_vspace_table_cap c\"\nbegin\n\nend\n\ncontext begin\n\nprivate lemma is_vspace_table_cap:\n \"is_vspace_table_cap (ArchObjectCap (PageTableCap ptr mapped))\"\n \"is_vspace_table_cap (ArchObjectCap (PageDirectoryCap ptr mapped))\"\n \"is_vspace_table_cap (ArchObjectCap (PDPointerTableCap ptr mapped))\"\n \"is_vspace_table_cap (ArchObjectCap (PML4Cap ptr asid))\"\n by (auto simp: is_cap_simps)\n\nend\n\nlemma valid_vspace_obj_default:\n assumes tyunt: \"ty \\ Structures_A.apiobject_type.Untyped\"\n shows \"ArchObj ao = default_object ty dev us \\ valid_vspace_obj ao s'\"\n apply (cases ty, simp_all add: default_object_def tyunt)\n apply (simp add: valid_vspace_obj_default')\n done\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/X64/ArchVSpace_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.26284184314569564, "lm_q1q2_score": 0.13450053554870017}} {"text": "(* Title: JinjaThreads/BV/TF_JVM.thy\n Author: Tobias Nipkow, Gerwin Klein, Andreas Lochbihler\n*)\n\nheader {* \\isaheader{The Typing Framework for the JVM}\\label{sec:JVM} *}\n\ntheory TF_JVM\nimports\n \"../DFA/Typing_Framework_err\" \n EffectMono \n BVSpec\n \"../Common/ExternalCallWF\"\nbegin\n\ndefinition exec :: \"'addr jvm_prog \\ nat \\ ty \\ ex_table \\ 'addr instr list \\ ty\\<^sub>i' err step_type\"\nwhere\n \"exec G maxs rT et bs \\\n err_step (size bs) (\\pc. app (bs!pc) G maxs rT pc (size bs) et) (\\pc. eff (bs!pc) G pc et)\"\n\nlocale JVM_sl =\n fixes P :: \"'addr jvm_prog\" and mxs and mxl\\<^sub>0\n fixes Ts :: \"ty list\" and \"is\" :: \"'addr instr list\" and xt and T\\<^sub>r\n\n fixes mxl and A and r and f and app and eff and step\n defines [simp]: \"mxl \\ 1+size Ts+mxl\\<^sub>0\"\n defines [simp]: \"A \\ states P mxs mxl\"\n defines [simp]: \"r \\ JVM_SemiType.le P mxs mxl\"\n defines [simp]: \"f \\ JVM_SemiType.sup P mxs mxl\"\n\n defines [simp]: \"app \\ \\pc. Effect.app (is!pc) P mxs T\\<^sub>r pc (size is) xt\"\n defines [simp]: \"eff \\ \\pc. Effect.eff (is!pc) P pc xt\"\n defines [simp]: \"step \\ err_step (size is) app eff\"\n\n\nlocale start_context = JVM_sl +\n fixes p and C\n assumes wf: \"wf_prog p P\"\n assumes C: \"is_class P C\"\n assumes Ts: \"set Ts \\ types P\"\n\n fixes first :: ty\\<^sub>i' and start\n defines [simp]: \n \"first \\ Some ([],OK (Class C) # map OK Ts @ replicate mxl\\<^sub>0 Err)\"\n defines [simp]:\n \"start \\ OK first # replicate (size is - 1) (OK None)\"\n\n\nsection {* Connecting JVM and Framework *}\n\nlemma (in JVM_sl) step_def_exec: \"step \\ exec P mxs T\\<^sub>r xt is\" \n by (simp add: exec_def) \n\nlemma special_ex_swap_\n\nlemma ex_in_list [iff]:\n \"(\\n. ST \\ list n A \\ n \\ mxs) = (set ST \\ A \\ size ST \\ mxs)\"\n by (unfold list_def) auto\n\nlemma singleton_list: \n \"(\\n. [Class C] \\ list n (types P) \\ n \\ mxs) = (is_class P C \\ 0 < mxs)\"\n by(auto)\n\nlemma set_drop_subset:\n \"set xs \\ A \\ set (drop n xs) \\ A\"\n by (auto dest: in_set_dropD)\n\nlemma Suc_minus_minus_le:\n \"n < mxs \\ Suc (n - (n - b)) \\ mxs\"\n by arith\n\nlemma in_listE:\n \"\\ xs \\ list n A; \\size xs = n; set xs \\ A\\ \\ P \\ \\ P\"\n by (unfold list_def) blast\n\ndeclare is_relevant_entry_def [simp]\ndeclare set_drop_subset [simp]\n\nlemma (in start_context) [simp, intro!]: \"is_class P Throwable\"\napply(rule converse_subcls_is_class[OF wf])\n apply(rule xcpt_subcls_Throwable[OF _ wf])\n prefer 2\n apply(rule is_class_xcpt[OF _ wf])\napply(fastforce simp add: sys_xcpts_def sys_xcpts_list_def)+\ndone\n\ndeclare option.splits[split del]\ndeclare option.case_cong[cong]\ndeclare is_type_array [simp del]\n\ntheorem (in start_context) exec_pres_type:\n \"pres_type step (size is) A\"\n(*<*)\n apply (insert wf)\n apply simp\n apply (unfold JVM_states_unfold)\n apply (rule pres_type_lift)\n apply clarify\n apply (rename_tac s pc pc' s')\n apply (case_tac s)\n apply simp\n apply (drule effNone)\n apply simp \n apply (simp add: Effect.app_def xcpt_app_def Effect.eff_def \n xcpt_eff_def norm_eff_def relevant_entries_def)\n apply (case_tac \"is!pc\")\n\n -- Load\n apply(clarsimp split: option.splits)\n apply (frule listE_nth_in, assumption)\n apply(fastforce split: option.splits)\n\n -- Store\n apply clarsimp\n apply(erule disjE)\n apply clarsimp\n apply(fastforce split: option.splits)\n\n -- Push\n apply(fastforce simp add: typeof_lit_is_type split: option.splits)\n\n -- New\n apply (clarsimp)\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp)\n apply(rule conjI)\n apply(force split: option.splits)\n apply fastforce\n\n -- NewArray\n apply clarsimp\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp)\n apply (erule allE)+\n apply(erule impE, blast)\n apply(force split: option.splits)\n\n -- ALoad\n apply(clarsimp split: split_if_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce dest: is_type_ArrayD)\n apply(clarsimp)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n\n -- AStore\n apply(clarsimp split: split_if_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n\n -- ALength\n apply(clarsimp split: split_if_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply(erule allE)+\n apply(erule impE, blast)\n apply arith\n\n\n -- Getfield\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce dest: sees_field_is_type)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Putfield\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Checkcast\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Instanceof\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n defer \n \n -- Return\n apply(fastforce split: option.splits)\n\n -- Pop\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Dup\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Swap\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- BinOpInstr\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce intro: WTrt_binop_is_type)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n \n -- Goto\n apply(fastforce split: option.splits)\n\n -- IfFalse\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply(erule disjE)\n apply fastforce\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- ThrowExc\n apply(clarsimp)\n apply(rule conjI)\n apply(erule allE)+\n apply(erule impE, blast)\n apply(clarsimp split: option.splits)\n apply fastforce\n\n -- MEnter\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- MExit\n apply(clarsimp)\n apply(erule disjE)\n apply(fastforce)\n apply clarsimp\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n\n -- Invoke\n apply(rename_tac the_s M n)\n apply (clarsimp split: split_if_asm)\n apply(rule conjI)\n apply(fastforce split: option.splits)\n apply fastforce\n apply(erule disjE)\n apply clarsimp\n apply(rule conjI)\n apply(drule (1) sees_wf_mdecl)\n apply(clarsimp simp add: wf_mdecl_def)\n apply(arith)\n apply(clarsimp)\n apply(erule allE)+\n apply(rotate_tac -2)\n apply(erule impE, blast)\n apply(clarsimp split: option.splits)\n done\n\n(*>*)\n\ndeclare option.case_cong_weak[cong]\ndeclare option.splits[split]\ndeclare is_type_array[simp]\n\ndeclare is_relevant_entry_def [simp del]\ndeclare set_drop_subset [simp del]\n\nlemma lesubstep_type_simple:\n \"xs [\\\\<^bsub>Product.le (op =) r\\<^esub>] ys \\ set xs {\\\\<^bsub>r\\<^esub>} set ys\"\n(*<*)\n apply (unfold lesubstep_type_def)\n apply clarify\n apply (simp add: set_conv_nth)\n apply clarify\n apply (drule le_listD, assumption)\n apply (clarsimp simp add: lesub_def Product.le_def)\n apply (rule exI)\n apply (rule conjI)\n apply (rule exI)\n apply (rule conjI)\n apply (rule sym)\n apply assumption\n apply assumption\n apply assumption\n done\n(*>*)\n\ndeclare is_relevant_entry_def [simp del]\n\n\nlemma conjI2: \"\\ A; A \\ B \\ \\ A \\ B\" by blast\n \nlemma (in JVM_sl) eff_mono:\n \"\\wf_prog p P; pc < length is; s \\\\<^bsub>sup_state_opt P\\<^esub> t; app pc t\\\n \\ set (eff pc s) {\\\\<^bsub>sup_state_opt P\\<^esub>} set (eff pc t)\"\n(*<*)\n apply simp\n apply (unfold Effect.eff_def) \n apply (cases t)\n apply (simp add: lesub_def)\n apply (rename_tac a)\n apply (cases s)\n apply simp\n apply (rename_tac b)\n apply simp\n apply (rule lesubstep_union)\n prefer 2\n apply (rule lesubstep_type_simple)\n apply (simp add: xcpt_eff_def)\n apply (rule le_listI)\n apply (simp add: split_beta)\n apply (simp add: split_beta)\n apply (simp add: lesub_def fun_of_def)\n apply (case_tac a)\n apply (case_tac b)\n apply simp \n apply (subgoal_tac \"size ab = size aa\")\n prefer 2\n apply (clarsimp simp add: list_all2_lengthD)\n apply simp\n apply (clarsimp simp add: norm_eff_def lesubstep_type_def lesub_def iff del: sup_state_conv)\n apply (rule exI)\n apply (rule conjI2)\n apply (rule imageI)\n apply (clarsimp simp add: Effect.app_def iff del: sup_state_conv)\n apply (drule (2) succs_mono)\n apply blast\n apply simp\n apply (erule eff\\<^sub>i_mono)\n apply simp\n apply assumption \n apply clarsimp\n apply clarsimp \n done\n(*>*)\n\nlemma (in JVM_sl) bounded_step: \"bounded step (size is)\"\n(*<*)\n apply simp\n apply (unfold bounded_def err_step_def Effect.app_def Effect.eff_def)\n apply (auto simp add: error_def map_snd_def split: err.splits option.splits)\n done\n(*>*)\n\ntheorem (in JVM_sl) step_mono:\n \"wf_prog wf_mb P \\ mono r step (size is) A\"\n(*<*)\n apply (simp add: JVM_le_Err_conv) \n apply (insert bounded_step)\n apply (unfold JVM_states_unfold)\n apply (rule mono_lift)\n apply blast\n apply (unfold app_mono_def lesub_def)\n apply clarsimp\n apply (erule (2) app_mono)\n apply simp\n apply clarify\n apply (drule eff_mono)\n apply (auto simp add: lesub_def)\n done\n(*>*)\n\n\nlemma (in start_context) first_in_A [iff]: \"OK first \\ A\"\n using Ts C by (force intro!: list_appendI simp add: JVM_states_unfold)\n\n\nlemma (in JVM_sl) wt_method_def2:\n \"wt_method P C' Ts T\\<^sub>r mxs mxl\\<^sub>0 is xt \\s =\n (is \\ [] \\ \n size \\s = size is \\\n OK ` set \\s \\ states P mxs mxl \\\n wt_start P C' Ts mxl\\<^sub>0 \\s \\ \n wt_app_eff (sup_state_opt P) app eff \\s)\"\n(*<*)\n apply (unfold wt_method_def wt_app_eff_def wt_instr_def lesub_def check_types_def)\n apply auto\n done\n(*>*)\n\n\nend\n", "meta": {"author": "Josh-Tilles", "repo": "AFP", "sha": "f4bf1d502bde2a3469d482b62c531f1c3af3e881", "save_path": "github-repos/isabelle/Josh-Tilles-AFP", "path": "github-repos/isabelle/Josh-Tilles-AFP/AFP-f4bf1d502bde2a3469d482b62c531f1c3af3e881/thys/JinjaThreads/BV/TF_JVM.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5273165233795671, "lm_q2_score": 0.2538610069692489, "lm_q1q2_score": 0.1338651036166604}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchUntyped_AI\nimports \"../Untyped_AI\"\nbegin\n\ncontext Arch begin global_naming X64\n\nnamed_theorems Untyped_AI_assms\n\nlemma of_bl_nat_to_cref[Untyped_AI_assms]:\n \"\\ x < 2 ^ bits; bits < word_bits \\\n \\ (of_bl (nat_to_cref bits x) :: word64) = of_nat x\"\n apply (clarsimp intro!: less_mask_eq\n simp: nat_to_cref_def of_drop_to_bl\n word_size word_less_nat_alt word_bits_def)\n apply (subst unat_of_nat)\n apply (erule order_le_less_trans [OF mod_less_eq_dividend])\n done\n\n\nlemma cnode_cap_ex_cte[Untyped_AI_assms]:\n \"\\ is_cnode_cap cap; cte_wp_at (\\c. \\m. cap = mask_cap m c) p s;\n (s::'state_ext::state_ext state) \\ cap; valid_objs s; pspace_aligned s \\ \\\n ex_cte_cap_wp_to is_cnode_cap (obj_ref_of cap, nat_to_cref (bits_of cap) x) s\"\n apply (simp only: ex_cte_cap_wp_to_def)\n apply (rule exI, erule cte_wp_at_weakenE)\n apply (clarsimp simp: is_cap_simps bits_of_def)\n apply (case_tac c, simp_all add: mask_cap_def cap_rights_update_def split:bool.splits)\n apply (clarsimp simp: nat_to_cref_def word_bits_def)\n apply (erule(2) valid_CNodeCapE)\n apply (simp add: word_bits_def cte_level_bits_def)\n done\n\n\n\nlemma inj_on_nat_to_cref[Untyped_AI_assms]:\n \"bits < word_bits \\ inj_on (nat_to_cref bits) {..< 2 ^ bits}\"\n apply (rule inj_onI)\n apply (drule arg_cong[where f=\"\\x. replicate (64 - bits) False @ x\"])\n apply (subst(asm) word_bl.Abs_inject[where 'a=64, symmetric])\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: of_bl_rep_False of_bl_nat_to_cref)\n apply (erule word_unat.Abs_eqD)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, (simp add: word_bits_def) +)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, simp+)\n done\n\n\nlemma data_to_obj_type_sp[Untyped_AI_assms]:\n \"\\P\\ data_to_obj_type x \\\\ts (s::'state_ext::state_ext state). ts \\ ArchObject ASIDPoolObj \\ P s\\, -\"\n unfolding data_to_obj_type_def\n apply (rule hoare_pre)\n apply (wp|wpc)+\n apply clarsimp\n apply (simp add: arch_data_to_obj_type_def split: if_split_asm)\n done\n\nlemma dui_inv_wf[wp, Untyped_AI_assms]:\n \"\\invs and cte_wp_at ((=) (cap.UntypedCap dev w sz idx)) slot\n and (\\s. \\cap \\ set cs. is_cnode_cap cap\n \\ (\\r\\cte_refs cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s))\n and (\\s. \\x \\ set cs. s \\ x)\\\n decode_untyped_invocation label args slot (cap.UntypedCap dev w sz idx) cs\n \\valid_untyped_inv\\,-\"\nproof -\n have inj: \"\\node_cap s. \\is_cnode_cap node_cap;\n unat (args ! 5) \\ 2 ^ bits_of node_cap - unat (args ! 4);valid_cap node_cap s\\ \\\n inj_on (Pair (obj_ref_of node_cap) \\ nat_to_cref (bits_of node_cap))\n {unat (args ! 4)..S a f s. (\\x\\S. cte_wp_at ((=) cap.NullCap) (a, f x) s)\n \\ cte_wp_at (\\c. c \\ cap.NullCap) slot s\n \\ slot \\ (Pair a \\ f) ` S\"\n by (auto simp:cte_wp_at_caps_of_state)\n show ?thesis\n apply (simp add: decode_untyped_invocation_def unlessE_def[symmetric] unlessE_whenE\n split del: if_split)\n apply (rule validE_R_sp[OF whenE_throwError_sp]\n validE_R_sp[OF data_to_obj_type_sp]\n validE_R_sp[OF dui_sp_helper] validE_R_sp[OF map_ensure_empty])+\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp whenE_throwError_wp[THEN validE_validE_R] check_children_wp\n map_ensure_empty_wp)\n apply (clarsimp simp: distinct_map cases_imp_eq)\n apply (subgoal_tac \"s \\ node_cap\")\n prefer 2\n apply (erule disjE)\n apply (drule bspec [where x = \"cs ! 0\"],clarsimp)+\n apply fastforce\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid[rotated])+\n apply assumption\n apply (subgoal_tac \"\\r\\cte_refs node_cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s\")\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid[rotated])\n apply (clarsimp simp: not_less)\n apply (frule(2) inj)\n apply (clarsimp simp: comp_def)\n apply (frule(1) caps_of_state_valid)\n apply (simp add: nasty_strengthen[unfolded o_def] cte_wp_at_caps_of_state)\n apply (intro conjI)\n apply (intro impI)\n apply (frule range_cover_stuff[where w=w and rv = 0 and sz = sz], simp_all)[1]\n apply (clarsimp simp: valid_cap_simps cap_aligned_def)+\n apply (frule alignUp_idem[OF is_aligned_weaken,where a = w])\n apply (erule range_cover.sz)\n apply (simp add: range_cover_def)\n apply (clarsimp simp: get_free_ref_def empty_descendants_range_in)\n apply (rule conjI[rotated], blast, clarsimp)\n apply (drule_tac x = \"(obj_ref_of node_cap, nat_to_cref (bits_of node_cap) slota)\" in bspec)\n apply (clarsimp simp: is_cap_simps nat_to_cref_def word_bits_def\n bits_of_def valid_cap_simps cap_aligned_def)+\n apply (simp add: free_index_of_def)\n apply (frule(1) range_cover_stuff[where sz = sz])\n apply (clarsimp dest!: valid_cap_aligned simp:cap_aligned_def word_bits_def)+\n apply simp+\n apply (clarsimp simp: get_free_ref_def)\n apply (erule disjE)\n apply (drule_tac x= \"cs!0\" in bspec, clarsimp)\n apply simp\n apply (clarsimp simp: cte_wp_at_caps_of_state ex_cte_cap_wp_to_def)\n apply (rule_tac x=aa in exI, rule exI, rule exI)\n apply (rule conjI, assumption)\n apply (rule conjI, assumption)\n apply (clarsimp simp: is_cap_simps mask_cap_def cap_rights_update_def)\n done\nqed\n\nlemma asid_bits_ge_0:\n \"(0::word32) < 2 ^ asid_bits\" by (simp add: asid_bits_def)\n\nlemma retype_ret_valid_caps_captable[Untyped_AI_assms]:\n \"\\pspace_no_overlap_range_cover ptr sz (s::'state_ext::state_ext state) \\ 0 < us\n \\ range_cover ptr sz (obj_bits_api CapTableObject us) n \\ ptr \\ 0\n \\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object CapTableObject dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api CapTableObject us)) [0.. \\ CNodeCap (ptr_add ptr (y * 2 ^ obj_bits_api CapTableObject us)) us []\"\nby ((clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def | rule conjI | intro conjI obj_at_foldr_intro imageI\n | rule is_aligned_add_multI[OF _ le_refl],\n (simp add:range_cover_def word_bits_def obj_bits_api_def slot_bits_def)+)+)[1]\n\nlemma retype_ret_valid_caps_aobj[Untyped_AI_assms]:\n \"\\ptr sz (s::'state_ext::state_ext state) x6 us n.\n \\pspace_no_overlap_range_cover ptr sz s \\ x6 \\ ASIDPoolObj \\\n range_cover ptr sz (obj_bits_api (ArchObject x6) us) n \\ ptr \\ 0\\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object (ArchObject x6) dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api (ArchObject x6) us)) [0.. \\ ArchObjectCap (arch_default_cap x6 (ptr_add ptr (y * 2 ^ obj_bits_api (ArchObject x6) us)) us dev)\"\n apply (rename_tac aobject_type us n)\n apply (case_tac aobject_type)\n by (clarsimp simp: valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def\n | intro conjI obj_at_foldr_intro\n imageI valid_vm_rights_def\n | rule is_aligned_add_multI[OF _ le_refl]\n | fastforce simp:range_cover_def obj_bits_api_def\n default_arch_object_def valid_vm_rights_def word_bits_def a_type_def)+\n\n\n\nlemma copy_global_mappings_hoare_lift:(*FIXME: arch_split \\ these do not seem to be used globally *)\n assumes wp: \"\\ptr val. \\Q\\ store_pml4e ptr val \\\\rv. Q\\\"\n shows \"\\Q\\ copy_global_mappings pd \\\\rv. Q\\\"\n apply (simp add: copy_global_mappings_def)\n apply (wp mapM_x_wp' wp)\n done\n\nlemma init_arch_objects_hoare_lift:\n assumes wp: \"\\ptr val. \\P\\ store_pml4e ptr val \\\\rv. P\\\"\n shows \"\\P\\ init_arch_objects tp ptr sz us adds \\\\rv. P\\\"\nproof -\n have pres: \"\\P\\ return () \\\\rv. P\\\"\n by (wp wp | simp)+\n show ?thesis\n apply (simp add: init_arch_objects_def\n pres reserve_region_def unless_def when_def\n split: Structures_A.apiobject_type.split\n aobject_type.split)\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp mapM_x_wp' copy_global_mappings_hoare_lift wp)\n apply simp\n done\nqed\n\ncrunch pdistinct[wp]: do_machine_op \"pspace_distinct\"\ncrunch vmdb[wp]: do_machine_op \"valid_mdb\"\ncrunch mdb[wp]: do_machine_op \"\\s. P (cdt s)\"\ncrunch cte_wp_at[wp]: do_machine_op \"\\s. P (cte_wp_at P' p s)\"\n\nlemma cap_refs_in_kernel_windowD2:\n \"\\ cte_wp_at P p (s::'state_ext::state_ext state); cap_refs_in_kernel_window s \\\n \\ \\cap. P cap \\ region_in_kernel_window (cap_range cap) s\"\n apply (clarsimp simp: cte_wp_at_caps_of_state region_in_kernel_window_def)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply fastforce\n done\n\nlemma init_arch_objects_descendants_range[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). descendants_range x cref s \\ init_arch_objects ty ptr n us y\n \\\\rv s. descendants_range x cref s\\\"\n apply (simp add:descendants_range_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply (simp add: store_pml4e_def set_arch_obj_simps)\n apply (wp hoare_vcg_ball_lift | wps)+\n apply simp\n apply fastforce\n done\n\n\n\nlemma init_arch_objects_caps_overlap_reserved[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). caps_overlap_reserved S s\\\n init_arch_objects ty ptr n us y\n \\\\rv s. caps_overlap_reserved S s\\\"\n apply (simp add:caps_overlap_reserved_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply fastforce\n done\n\n(* FIXME ioportcontrol: move *)\nlemma cap_ioports_not_ioport_cap[simp]:\n \"\\is_ioport_cap cap \\ cap_ioports cap = {}\"\n by (clarsimp simp: is_cap_simps cap_ioports_def split: arch_cap.splits cap.splits)\n\nlemma default_cap_not_ioport:\n \"\\ is_ioport_cap (default_cap tp oref sz dev)\"\n apply (case_tac tp; clarsimp simp: is_cap_simps)\n by (case_tac x6; clarsimp simp: arch_default_cap_def)\n\nlemma safe_ioport_insert_not_ioport[simp]:\n \"\\is_ioport_cap newcap \\ safe_ioport_insert newcap oldcap s\"\n by (clarsimp simp: safe_ioport_insert_def)\n\nlemma set_untyped_cap_invs_simple[Untyped_AI_assms]:\n \"\\\\s. descendants_range_in {ptr .. ptr+2^sz - 1} cref s \\ pspace_no_overlap_range_cover ptr sz s \\ invs s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr \\ cap_is_device c = dev) cref s \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s. invs s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: cte_wp_at_caps_of_state invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp set_free_index_valid_pspace_simple set_cap_valid_mdb_simple\n set_cap_idle update_cap_ifunsafe)\n apply (simp add:valid_irq_node_def)\n apply wps\n apply (wp hoare_vcg_all_lift set_cap_irq_handlers set_cap_valid_arch_caps\n set_cap_irq_handlers cap_table_at_lift_valid set_cap_typ_at\n set_untyped_cap_refs_respects_device_simple set_cap_ioports_no_new_ioports)\n apply (clarsimp simp:cte_wp_at_caps_of_state is_cap_simps)\n apply (intro conjI,clarsimp)\n apply (rule ext,clarsimp simp:is_cap_simps)\n apply (clarsimp split:cap.splits simp:is_cap_simps appropriate_cte_cap_def)\n apply (drule(1) if_unsafe_then_capD[OF caps_of_state_cteD])\n apply clarsimp\n apply (clarsimp simp:is_cap_simps ex_cte_cap_wp_to_def appropriate_cte_cap_def cte_wp_at_caps_of_state)\n apply (clarsimp dest!:valid_global_refsD2 simp:cap_range_def)\n apply (simp add:valid_irq_node_def)\n apply (clarsimp simp:valid_irq_node_def)\n apply (clarsimp simp:no_cap_to_obj_with_diff_ref_def cte_wp_at_caps_of_state vs_cap_ref_def)\n apply (case_tac cap)\n apply (simp_all add:vs_cap_ref_def table_cap_ref_def)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap)\n apply simp_all\n apply (clarsimp simp:cap_refs_in_kernel_window_def\n valid_refs_def simp del:split_paired_All)\n apply (drule_tac x = cref in spec)\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply fastforce\n done\n\n\nlemma pbfs_atleast_pageBits':\n \"pageBits \\ pageBitsForSize sz\"by (cases sz, simp_all add: pageBits_def)\n\n\nlemma pbfs_less_wb':\n \"pageBitsForSize sz < word_bits\"by (cases sz, simp_all add: word_bits_conv pageBits_def bit_simps)\n\nlemma delete_objects_rewrite[Untyped_AI_assms]:\n \"\\ word_size_bits \\ sz; sz\\ word_bits;ptr && ~~ mask sz = ptr\\ \\ delete_objects ptr sz =\n do y \\ modify (clear_um {ptr + of_nat k |k. k < 2 ^ sz});\n modify (detype {ptr && ~~ mask sz..ptr + 2 ^ sz - 1})\n od\"\n apply (clarsimp simp:delete_objects_def freeMemory_def word_size_def word_size_bits_def)\n apply (subgoal_tac \"is_aligned (ptr &&~~ mask sz) sz\")\n apply (subst mapM_storeWord_clear_um[simplified word_size_def word_size_bits_def])\n apply (simp)\n apply simp\n apply (simp add:range_cover_def)\n apply clarsimp\n apply (rule is_aligned_neg_mask)\n apply simp\n done\n\ndeclare store_pde_pred_tcb_at [wp]\n\n(* nonempty_table *)\ndefinition\n nonempty_table :: \"machine_word set \\ Structures_A.kernel_object \\ bool\"\nwhere\n \"nonempty_table S ko \\\n (a_type ko \\ AArch ` { APageTable, APageDirectory, APDPointerTable, APageMapL4 })\n \\ \\ empty_table S ko\"\n\nlemma reachable_pg_cap_exst_update[simp]:\n \"reachable_pg_cap x (trans_state f (s::'state_ext::state_ext state)) = reachable_pg_cap x s\"\n by (simp add: reachable_pg_cap_def vs_lookup_pages_def\n vs_lookup_pages1_def obj_at_def)\n\nlemma default_PDPT_capD:\n \"default_cap tp oref sz dev = ArchObjectCap (PDPointerTableCap p None)\n \\oref = p \\ tp = ArchObject PDPTObj\"\n apply (case_tac tp, simp_all)\n apply (case_tac x6, simp_all add: arch_default_cap_def)\n done\n\nlemma create_cap_valid_arch_caps[wp, Untyped_AI_assms]:\n \"\\valid_arch_caps\n and valid_cap (default_cap tp oref sz dev)\n and (\\(s::'state_ext::state_ext state). \\r\\obj_refs (default_cap tp oref sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n and cte_wp_at ((=) cap.NullCap) cref\n and K (tp \\ ArchObject ASIDPoolObj)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_arch_caps\\\"\n apply (simp add: create_cap_def set_cdt_def)\n apply (wp set_cap_valid_arch_caps)\n apply (simp add: trans_state_update[symmetric] del: trans_state_update)\n apply (wp hoare_vcg_disj_lift hoare_vcg_conj_lift hoare_vcg_all_lift hoare_vcg_imp_lift | simp)+\n\n apply (clarsimp simp del: split_paired_All split_paired_Ex\n imp_disjL\n simp: cte_wp_at_caps_of_state)\n apply (rule conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply (case_tac cref, fastforce)\n apply (simp add: obj_ref_none_no_asid)\n apply (rule conjI)\n apply (auto simp: is_cap_simps valid_cap_def second_level_tables_def\n obj_at_def nonempty_table_def a_type_simps)[1]\n apply (clarsimp simp del: imp_disjL)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply fastforce\n apply (auto simp: is_cap_simps)[1]\n done\n\n\nlemma create_cap_cap_refs_in_kernel_window[wp, Untyped_AI_assms]:\n \"\\cap_refs_in_kernel_window and cte_wp_at (\\c. cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref) \\\\rv. cap_refs_in_kernel_window\\\"\n apply (simp add: create_cap_def)\n apply (wp | simp)+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply blast\n done\n\nlemma create_cap_ioports[wp, Untyped_AI_assms]:\n \"\\valid_ioports and cte_wp_at (\\_. True) cref\\ create_cap tp sz p dev (cref,oref) \\\\rv. valid_ioports\\\"\n by (wpsimp wp: set_cap_ioports' set_cdt_cte_wp_at\n simp: safe_ioport_insert_not_ioport[OF default_cap_not_ioport] create_cap_def)\n\ncrunch irq_node[wp]: store_pde \"\\s. P (interrupt_irq_node s)\"\n (wp: crunch_wps)\n\n(* make these available in the generic theory? *)\nlemma init_arch_objects_irq_node[wp]:\n \"\\\\s. P (interrupt_irq_node s)\\ init_arch_objects tp ptr bits us refs \\\\rv s. P (interrupt_irq_node s)\\\"\n by (wp init_arch_objects_hoare_lift | simp)+\n\nlemma init_arch_objects_excap[wp]:\n \"\\ex_cte_cap_wp_to P p\\ init_arch_objects tp ptr bits us refs \\\\rv. ex_cte_cap_wp_to P p\\\"\n by (wp ex_cte_cap_to_pres init_arch_objects_irq_node init_arch_objects_cte_wp_at)\n\ncrunch nonempty_table[wp]: do_machine_op\n \"\\s. P' (obj_at (nonempty_table (set (x64_global_pts (arch_state s)))) r s)\"\n\n(* FIXME: move *)\nlemma simpler_store_pml4e_def:\n \"store_pml4e p pde s =\n (case kheap s (p && ~~ mask pml4_bits) of\n Some (ArchObj (PageMapL4 pml4)) =>\n ({((), s\\kheap := (kheap s((p && ~~ mask pml4_bits) \\\n (ArchObj (PageMapL4 (pml4(ucast (p && mask pml4_bits >> word_size_bits) := pde))))))\\)}, False)\n | _ => ({}, True))\"\n apply (auto simp: store_pml4e_def set_object_def get_object_def simpler_gets_def assert_def a_type_simps\n return_def fail_def set_object_def get_def put_def bind_def get_pml4_def aa_type_simps\n set_arch_obj_simps\n split: Structures_A.kernel_object.splits option.splits arch_kernel_obj.splits if_split_asm)\n done\n\nlemma neg_mask_pml4_bits_3_aligned[simp]:\n \"is_aligned (p && ~~ mask pml4_bits) 3\"\n apply (rule_tac x = 3 in is_aligned_weaken[OF is_aligned_neg_mask])\n apply (simp add: bit_simps)+\n done\n\nlemma store_pml4e_weaken:\n \"\\\\s. pml4e_at (p && ~~ mask pml4_bits) s \\ P s\\ store_pml4e p e \\Q\\ =\n \\P\\ store_pml4e p e \\Q\\\"\n apply (rule iffI)\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (rule use_valid, assumption)\n apply (simp add: store_pml4e_def set_arch_obj_simps set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: pml4e_at_def obj_at_def a_type_simps)\n apply (drule bspec, assumption)\n apply (simp add: simpler_store_pml4e_def obj_at_def fun_upd_def\n split: Structures_A.kernel_object.splits arch_kernel_obj.splits)\n done\n\nlemma store_pml4e_nonempty_table:\n \"\\\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ (\\rf. pml4e_ref pml4e = Some rf \\\n rf \\ set (second_level_tables (arch_state s)))\n \\ ucast (pml4e_ptr && mask pml4_bits >> 3) \\ kernel_mapping_slots\\\n store_pml4e pml4e_ptr pml4e\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (simp add: store_pml4e_def set_arch_obj_simps set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def nonempty_table_def a_type_def word_size_bits_def empty_table_def)\n done\n\nlemma store_pml4e_global_global_objs:\n \"\\\\s. valid_global_objs s \\ valid_arch_state s\n \\ (\\rf. pml4e_ref pml4e = Some rf \\\n rf \\ set (second_level_tables (arch_state s)))\n \\ ucast (pml4e_ptr && mask pml4_bits >> 3) \\ kernel_mapping_slots\n \\\n store_pml4e pml4e_ptr pml4e\n \\\\rv s. valid_global_objs s\\\"\n apply (simp add: store_pml4e_def set_arch_obj_simps set_pd_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def fun_upd_def[symmetric] bit_simps\n valid_global_objs_upd_def empty_table_def valid_global_objs_def)\n done\n\nlemma valid_arch_state_global_pml4:\n \"\\ valid_arch_state s; pspace_aligned s \\\n \\ obj_at (\\ko. \\pd. ko = ArchObj (PageMapL4 pd)) (x64_global_pml4 (arch_state s)) s\n \\ is_aligned (x64_global_pml4 (arch_state s)) pml4_bits\"\n apply (clarsimp simp: valid_arch_state_def obj_at_def\n pd_bits_def pageBits_def\n elim!: obj_at_weakenE)\n apply (clarsimp dest!: pspace_alignedD simp: pml4_bits_def)\n done\n\nlemmas pml4_shifting' = pml4_shifting(2)\n\nlemma pml4_bits_ptTranslationBits_diff:\n \"pml4_bits - word_size_bits = ptTranslationBits\"\n by (simp add: bit_simps)\n\nlemma copy_global_mappings_nonempty_table:\n \"is_aligned pm pml4_bits \\\n \\\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s) \\\n valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s\\\n copy_global_mappings pm\n \\\\rv s. \\ (obj_at (nonempty_table\n (set (second_level_tables (arch_state s)))) r s) \\\n valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s\\\"\n apply (simp add: copy_global_mappings_def)\n apply (rule hoare_seq_ext [OF _ gets_sp])\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp[where S=\"{x. get_pml4_index pptr_base \\ x\n \\ x < 2 ^ (pml4_bits - word_size_bits)}\"])\n apply (wp get_pml4e_wp hoare_vcg_ball_lift\n store_pml4e_weaken[THEN iffD2,OF store_pml4e_nonempty_table]\n store_pml4e_weaken[THEN iffD2,OF store_pml4e_global_global_objs]\n | simp)+\n apply clarsimp\n apply (subst (asm) is_aligned_add_helper[THEN conjunct2])\n apply (clarsimp simp: valid_arch_state_def pspace_aligned_def dom_def\n obj_at_def)\n apply (drule_tac x=\"x64_global_pml4 (arch_state s)\" in spec, erule impE,\n fastforce)\n apply (simp add: pml4_bits_def pageBits_def)\n apply (erule shiftl_less_t2n)\n apply (simp add: bit_simps)\n apply (clarsimp simp: valid_arch_state_def valid_global_objs_def obj_at_def\n empty_table_def imp_conjR)\n apply (clarsimp simp: is_aligned_neg_mask_eq mask_add_aligned)\n apply (fold word_size_bits_def)\n apply (strengthen in_kernel_mapping_slotsI[mk_strg] shiftl_shiftr_id[mk_strg]\n shiftr_less_t2n3[mk_strg])+\n apply (clarsimp simp: pml4_bits_ptTranslationBits_diff pml4_translation_bits)\n apply (simp add: is_aligned_shiftr_shiftl[OF aligned_after_mask,OF is_aligned_shiftl])\n apply (cut_tac x = \"x << word_size_bits\" and n = pml4_bits in less_mask_eq)\n apply (rule shiftl_less_t2n)\n apply (simp add: pml4_bits_ptTranslationBits_diff)\n apply (simp add: bit_simps)\n apply (simp add: word_size_bits_def)\n apply (subst shiftl_shiftr_id)\n apply simp\n apply (erule less_le_trans, simp add: bit_simps)\n apply simp\n apply (rule shiftl_less_t2n, simp add: bit_simps)\n apply (simp add: bit_simps)\n apply (clarsimp simp: bit_simps le_less_trans)\n apply simp\n done\n\n\nlemma mapM_copy_global_mappings_nonempty_table[wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\pd\\set pds. is_aligned pd pml4_bits)\\\n mapM_x copy_global_mappings pds\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp', rule copy_global_mappings_nonempty_table)\n apply simp_all\n done\n\nlemma init_arch_objects_nonempty_table[Untyped_AI_assms, wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\ref\\set refs. is_aligned ref (obj_bits_api tp us))\\\n init_arch_objects tp ptr bits us refs\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: init_arch_objects_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp hoare_unless_wp | wpc | simp add: reserve_region_def second_level_tables_def)+\n apply (clarsimp simp: obj_bits_api_def default_arch_object_def pml4_bits_def pageBits_def)\n done\n\nlemma nonempty_table_caps_of[Untyped_AI_assms]:\n \"nonempty_table S ko \\ caps_of ko = {}\"\n by (auto simp: caps_of_def cap_of_def nonempty_table_def a_type_def\n split: Structures_A.kernel_object.split if_split_asm)\n\n\nlemma nonempty_default[simp, Untyped_AI_assms]:\n \"tp \\ Untyped \\ \\ nonempty_table S (default_object tp dev us)\"\n apply (case_tac tp, simp_all add: default_object_def nonempty_table_def\n a_type_def)\n apply (rename_tac aobject_type)\n apply (case_tac aobject_type, simp_all add: default_arch_object_def)\n apply (simp_all add: empty_table_def pde_ref_def)\n done\n\nlemma set_pml4e_cte_wp_at_iin[wp]:\n \"\\\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\n store_pml4e q pml4\n \\\\_ s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\"\n apply (clarsimp simp: store_pml4e_def set_arch_obj_simps)\n apply (rule hoare_pre)\n apply (wp set_aobject_cte_wp_at | wps | simp)+\n done\n\ncrunch cte_wp_at_iin[wp]: init_arch_objects\n \"\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\"\n (ignore: clearMemory store_pml4e wp: crunch_wps hoare_unless_wp)\n\nlemmas init_arch_objects_ex_cte_cap_wp_to\n = init_arch_objects_excap\n\nlemma obj_is_device_vui_eq[Untyped_AI_assms]:\n \"valid_untyped_inv ui s\n \\ case ui of Retype slot reset ptr_base ptr tp us slots dev\n \\ obj_is_device tp dev = dev\"\n apply (cases ui, clarsimp)\n apply (clarsimp simp: obj_is_device_def\n split: apiobject_type.split)\n apply (intro impI conjI allI, simp_all add: is_frame_type_def default_object_def)\n apply (simp add: default_arch_object_def split: aobject_type.split)\n apply (auto simp: arch_is_frame_type_def)\n done\n\nend\n\nglobal_interpretation Untyped_AI? : Untyped_AI\n where nonempty_table = X64.nonempty_table\n proof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact Untyped_AI_assms)?)\n qed\n\nend\n", "meta": {"author": "NICTA", "repo": "l4v", "sha": "3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b", "save_path": "github-repos/isabelle/NICTA-l4v", "path": "github-repos/isabelle/NICTA-l4v/l4v-3c3514fe99082f7b6a6fb8445b8dfc592ff7f02b/proof/invariant-abstract/X64/ArchUntyped_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5350984286266115, "lm_q2_score": 0.24508501313237172, "lm_q1q2_score": 0.13114460540706455}} {"text": "theory Eg1Eg2\nimports Eg1\n Eg2\n \"../CompositionalRefinement\"\nbegin\n\nlocale sifum_refinement_eg1_eg2 =\n A: sifum_example +\n C: sifum_example2\n\nprimrec Eg2_var\\<^sub>C_of_Eg1 :: \"Eg1.var \\ Eg2.var\\<^sub>C\"\nwhere\n \"Eg2_var\\<^sub>C_of_Eg1 control_var = control_var\\<^sub>C\" |\n \"Eg2_var\\<^sub>C_of_Eg1 buffer = buffer\\<^sub>C\" |\n \"Eg2_var\\<^sub>C_of_Eg1 high_var = high_var\\<^sub>C\" |\n \"Eg2_var\\<^sub>C_of_Eg1 low_var = low_var\\<^sub>C\" |\n \"Eg2_var\\<^sub>C_of_Eg1 temp = temp\\<^sub>C\"\n\nsublocale sifum_refinement_eg1_eg2 \\ sifum_refinement dma dma\\<^sub>C \\_vars \\_vars\\<^sub>C \\ \\\\<^sub>C A.eval\\<^sub>w C.eval\\<^sub>w undefined Eg2_var\\<^sub>C_of_Eg1\n supply image_cong_simp [cong del] INF_cong_simp [cong] SUP_cong_simp [cong] subst_all [simp del]\n apply(unfold_locales)\n apply(erule C.eval_det, simp)\n apply(rule C.Var_finite)\n apply(simp add:\\_vars\\<^sub>C_def split:if_splits)\n apply(simp add:\\_vars\\<^sub>C_def dma\\<^sub>C_def)\n apply(simp add:\\_vars\\<^sub>C_def dma\\<^sub>C_def)\n apply(rule inj_onI, simp)\n apply(case_tac x)\n apply(case_tac y, simp+)\n apply(case_tac y, simp+)\n apply(case_tac y, simp+)\n apply(case_tac y, simp+)\n apply(case_tac y, simp+)\n apply(case_tac x\\<^sub>A)\n apply(clarsimp simp:dma\\<^sub>C_def dma_def dma_control_var_def dma_control_var\\<^sub>C_def)+\n apply(case_tac x\\<^sub>A)\n apply(clarsimp simp:\\_vars\\<^sub>C_def \\_vars_def)+\n apply(rule set_eqI, clarsimp)\n apply(case_tac x, clarsimp)\n apply(rule_tac x=control_var in rev_image_eqI, clarsimp+)\n apply(case_tac xa, clarsimp+)\n apply(case_tac xb, clarsimp+)\n apply(case_tac xa, clarsimp+)\n apply(case_tac xb, clarsimp+)\n apply(case_tac xa, clarsimp+)\n apply(case_tac xb, clarsimp+)\n apply(case_tac xa, clarsimp+)\n apply(case_tac xb, clarsimp+)\n apply(case_tac xa, clarsimp+)\n apply(simp add:\\\\<^sub>C_def)\n done\n\ncontext sifum_refinement_eg1_eg2\nbegin\n\n\nlemma bisim_simple_\\:\n \"bisim_simple (A.\\ \\ \\ P)\"\n unfolding bisim_simple_def\n apply clarsimp\n apply(drule_tac lc=\"\\c\\<^sub>1\\<^sub>A, mds, mem\\<^sub>1\\<^sub>A\\\\<^sub>A\" and lc'=\"\\c\\<^sub>2\\<^sub>A, mds, mem\\<^sub>2\\<^sub>A\\\\<^sub>A\" in A.bisim_simple_\\\\<^sub>u)\n by simp\n\n(* Don't know to what extent these helpers can be made generic enough to go into any parent theories.\n Again, mightn't be able to (or bother to) make some generic considering the aexp evaluator\n is going to be specific to each language. *)\n\nlemma conc_only_vars_not_visible_abs:\n \"(\\v\\<^sub>C. v\\<^sub>C \\ range Eg2_var\\<^sub>C_of_Eg1 \\ mem\\<^sub>C v\\<^sub>C = mem\\<^sub>C' v\\<^sub>C) \\ mem\\<^sub>A_of mem\\<^sub>C = mem\\<^sub>A_of mem\\<^sub>C'\"\n by (simp add: mem\\<^sub>A_of_def)\n\nlemma conc_only_var_assign_not_visible_abs:\n \"\\v\\<^sub>C e. v\\<^sub>C \\ range Eg2_var\\<^sub>C_of_Eg1 \\ mem\\<^sub>A_of mem\\<^sub>C = mem\\<^sub>A_of (mem\\<^sub>C(v\\<^sub>C := e))\"\n using conc_only_vars_not_visible_abs\n by simp\n\nlemma reg\\<^sub>C_is_not_the_var\\<^sub>C_of_anything:\n \"reg\\<^sub>C = Eg2_var\\<^sub>C_of_Eg1 x \\ False\"\n by (induct x, clarsimp+)\n\nlemma reg\\<^sub>C_not_visible_abs:\n \"reg\\<^sub>C \\ range Eg2_var\\<^sub>C_of_Eg1\"\n using reg\\<^sub>C_is_not_the_var\\<^sub>C_of_anything\n by blast\n\n(* This one's pretty specific to this refinement... *)\nlemma reg\\<^sub>C_the_only_concrete_only_var:\n \"v\\<^sub>C \\ range Eg2_var\\<^sub>C_of_Eg1 \\ v\\<^sub>C = reg\\<^sub>C\"\n apply(case_tac v\\<^sub>C)\n apply(erule rev_notE, clarsimp, rule_tac x=control_var in range_eqI, clarsimp)\n apply(erule rev_notE, clarsimp, rule_tac x=buffer in range_eqI, clarsimp)\n apply(erule rev_notE, clarsimp, rule_tac x=high_var in range_eqI, clarsimp)\n apply(erule rev_notE, clarsimp, rule_tac x=low_var in range_eqI, clarsimp)\n apply(erule rev_notE, clarsimp, rule_tac x=temp in range_eqI, clarsimp)\n apply clarsimp\n done\n\nlemma NoRW\\<^sub>A_implies_NoRW\\<^sub>C:\n \"x \\ mds\\<^sub>A_of mds\\<^sub>C AsmNoReadOrWrite \\\n Eg2_var\\<^sub>C_of_Eg1 x \\ mds\\<^sub>C AsmNoReadOrWrite\"\n unfolding mds\\<^sub>A_of_def\n apply clarsimp\n apply (simp only: Eg2_var\\<^sub>C_of_Eg1_def)\n apply clarsimp\n apply (simp add: f_inv_into_f)\n done\n\nlemma NoWrite\\<^sub>A_implies_NoWrite\\<^sub>C:\n \"x \\ mds\\<^sub>A_of mds\\<^sub>C AsmNoWrite \\\n Eg2_var\\<^sub>C_of_Eg1 x \\ mds\\<^sub>C AsmNoWrite\"\n unfolding mds\\<^sub>A_of_def\n apply clarsimp\n apply (simp only: Eg2_var\\<^sub>C_of_Eg1_def)\n apply clarsimp\n apply (simp add: f_inv_into_f)\n done\n\nlemma assign_eval\\<^sub>w_load\\<^sub>A:\n shows \"(\\x \\ Eg1.Load y, mds, mem\\\\<^sub>A, \\Stop, mds, mem (x := mem y)\\\\<^sub>A) \\ A.eval\\<^sub>w\"\n by (metis A.assign_eval\\<^sub>w ev\\<^sub>A.simps(2))\n\nlemma assign_eval\\<^sub>w_load\\<^sub>C:\n shows \"(\\x \\ Load y, mds, mem\\\\<^sub>C, \\Stop, mds, mem (x := mem y)\\\\<^sub>C) \\ C.eval\\<^sub>w\"\n using C.unannotated[OF C.assign, where E=\"[]\", simplified]\n apply(drule_tac x=x in meta_spec)\n apply(drule_tac x=\"Load y\" in meta_spec)\n apply(drule_tac x=mds in meta_spec)\n apply(drule_tac x=mem in meta_spec)\n apply clarsimp\n done\n\nlemma assign_eval\\<^sub>w_const\\<^sub>A:\n shows \"(\\x \\ Eg1.Const c, mds, mem\\, \\Stop, mds, mem (x := c)\\) \\ A.eval\\<^sub>w\"\n by (metis A.assign_eval\\<^sub>w ev\\<^sub>A.simps(1))\n\nlemma assign_eval\\<^sub>w_const\\<^sub>C:\n shows \"(\\x \\ Const c, mds, mem\\, \\Stop, mds, mem (x := c)\\) \\ C.eval\\<^sub>w\"\n using C.unannotated[OF C.assign, where E=\"[]\", simplified]\n apply(drule_tac x=x in meta_spec)\n apply(drule_tac x=\"Const c\" in meta_spec)\n apply(drule_tac x=mds in meta_spec)\n apply(drule_tac x=mem in meta_spec)\n apply clarsimp\n done\n\nlemma if_seq_eval\\<^sub>w_helper\\<^sub>A:\n \"(\\If B T E, mds, mem\\,\n \\if ev\\<^sub>B mem B then T else E, mds, mem\\\\<^sub>A) \\ A.eval\\<^sub>w\n \\\n (\\If B T E ;; TAIL, mds, mem\\,\n \\if ev\\<^sub>B mem B then T ;; TAIL else E ;; TAIL, mds, mem\\\\<^sub>A) \\ A.eval\\<^sub>w\"\n using A.eval\\<^sub>w.seq\n by auto\n\nlemma if_seq_eval\\<^sub>w_helper\\<^sub>C:\n \"(\\If B T E, mds, mem\\,\n \\if ev\\<^sub>B\\<^sub>C mem B then T else E, mds, mem\\\\<^sub>C) \\ C.eval\\<^sub>w\n \\\n (\\If B T E ;; TAIL, mds, mem\\,\n \\if ev\\<^sub>B\\<^sub>C mem B then T ;; TAIL else E ;; TAIL, mds, mem\\\\<^sub>C) \\ C.eval\\<^sub>w\"\n using C.eval\\<^sub>w.seq\n by auto\n\nlemma mem_assign_refinement_helper_var:\n \"mem\\<^sub>A_of (mem\\<^sub>C (Eg2_var\\<^sub>C_of_Eg1 x := mem\\<^sub>C (Eg2_var\\<^sub>C_of_Eg1 y)))\n = (mem\\<^sub>A_of mem\\<^sub>C) (x := (mem\\<^sub>A_of mem\\<^sub>C) y)\"\n apply(clarsimp simp: mem\\<^sub>A_of_def)\n apply(rule ext, clarsimp)\n apply(cases x)\n apply(case_tac x\\<^sub>A, clarsimp+)+\n done\n\nlemma mem_assign_refinement_helper_const:\n \"mem\\<^sub>A_of (mem\\<^sub>C (Eg2_var\\<^sub>C_of_Eg1 x := c))\n = (mem\\<^sub>A_of mem\\<^sub>C) (x := c)\"\n apply(clarsimp simp: mem\\<^sub>A_of_def)\n apply(rule ext, clarsimp)\n apply(cases x)\n apply(case_tac x\\<^sub>A, clarsimp+)+\n done\n\nlemma if_true_eval\\<^sub>w\\<^sub>C:\n shows \"mem\\<^sub>C x = 0 \\\n (\\(If (Eq x 0) c\\<^sub>C_then c\\<^sub>C_else) ;; c\\<^sub>C_tail, mds\\<^sub>C, mem\\<^sub>C\\\\<^sub>C,\n \\(c\\<^sub>C_then ;; c\\<^sub>C_tail), mds\\<^sub>C, mem\\<^sub>C\\\\<^sub>C) \\ C.eval\\<^sub>w\"\n using C.if_eval\\<^sub>w C.eval\\<^sub>w.seq ev\\<^sub>B\\<^sub>C.simps by presburger\n\nlemma if_false_eval\\<^sub>w\\<^sub>C:\n shows \"mem\\<^sub>C x \\ 0 \\\n (\\(If (Eq x 0) c\\<^sub>C_then c\\<^sub>C_else) ;; c\\<^sub>C_tail, mds\\<^sub>C, mem\\<^sub>C\\\\<^sub>C,\n \\(c\\<^sub>C_else ;; c\\<^sub>C_tail), mds\\<^sub>C, mem\\<^sub>C\\\\<^sub>C) \\ C.eval\\<^sub>w\"\n using C.if_eval\\<^sub>w C.eval\\<^sub>w.seq ev\\<^sub>B\\<^sub>C.simps by presburger\n\n\nend\n\nend\n", "meta": {"author": "isabelle-prover", "repo": "mirror-afp-devel", "sha": "c84055551f07621736c3eb6a1ef4fb7e8cc57dd1", "save_path": "github-repos/isabelle/isabelle-prover-mirror-afp-devel", "path": "github-repos/isabelle/isabelle-prover-mirror-afp-devel/mirror-afp-devel-c84055551f07621736c3eb6a1ef4fb7e8cc57dd1/thys/Dependent_SIFUM_Refinement/Examples/Eg1Eg2.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5156199157230157, "lm_q2_score": 0.2538610069692489, "lm_q1q2_score": 0.13089579101884402}} {"text": "theory MMU_Prg_Logic\n\nimports\n \"HOL-Word.Word\" \n PTABLE_TLBJ.PageTable_seL4\n \"./../Eisbach/Rule_By_Method\"\n\nbegin\n\ntype_synonym val = \"32 word\"\ntype_synonym asid = \"8 word\"\ntype_synonym word_t = \"32 word\"\ntype_synonym heap = \"paddr \\ word_t\"\ntype_synonym incon_set = \"vaddr set\"\ntype_synonym global_set = \"vaddr set\"\n\ndatatype mode_t = Kernel | User\n\n\ntype_synonym vSm = \"20 word\"\ntype_synonym pSm = \"20 word\"\n\ntype_synonym vSe = \"12 word\"\ntype_synonym pSe = \"12 word\"\n\nrecord tlb_flags =\n nG :: \"1 word\" (* nG = 0 means global *) \n perm_APX :: \"1 word\" (* Access permission bit 2 *)\n perm_AP :: \"2 word\" (* Access permission bits 1 and 0 *)\n perm_XN :: \"1 word\" (* Execute-never bit *)\n\ndatatype pdc_entry = PDE_Section \"asid option\" \"12 word\" (bpa_pdc_entry :\"32 word\") tlb_flags\n | PDE_Table asid \"12 word\" (bpa_pdc_entry : \"32 word\")\n\n\ndatatype tlb_entry = EntrySmall (asid_of : \"asid option\") vSm pSm tlb_flags\n | EntrySection (asid_of : \"asid option\") vSe pSe tlb_flags\n\ndatatype pt_walk_typ = Fault \n | Partial_Walk pdc_entry\n | Full_Walk tlb_entry pdc_entry\n\ntype_synonym ptable_snapshot = \"asid \\ (vaddr set \\ (vaddr \\ pt_walk_typ))\"\n\nrecord p_state =\n heap :: heap\n asid :: asid \n root :: paddr\n incon_set :: incon_set\n global_set :: global_set\n ptable_snapshot :: ptable_snapshot\n mode :: mode_t\n\n \ndefinition\n load_list_word_hp :: \"heap \\ nat \\ paddr \\ val list\"\nwhere\n \"load_list_word_hp h n p = load_list h n p\"\n\n\ndefinition\n from_word :: \"32 word list => 'b :: len0 word\" \nwhere\n \"from_word \\ word_rcat \\ rev\"\n\ndefinition\n load_value_word_hp :: \"heap \\ paddr \\ val\"\nwhere\n \"load_value_word_hp h p = map_option from_word (load_list_word_hp h 1 p)\"\n\n\ndefinition\n mem_read_word_heap :: \"paddr \\ p_state \\ word_t\"\nwhere\n \"mem_read_word_heap p s = load_value_word_hp (heap s) p \"\n\n\ndefinition\n decode_heap_pde' :: \"heap \\ paddr \\ pde\"\nwhere\n\"decode_heap_pde' h p \\ map_option decode_pde (h p)\"\n\ndefinition\n get_pde' :: \"heap \\ paddr \\ vaddr \\ pde\" \nwhere\n \"get_pde' h rt vp \\\n let\n pd_idx_offset = ((vaddr_pd_index (addr_val vp)) << 2)\n in\n decode_heap_pde' h (rt r+ pd_idx_offset)\"\n\ndefinition\n decode_heap_pte' :: \"heap \\ paddr \\ pte\" \nwhere\n \"decode_heap_pte' h p \\ map_option decode_pte (h p)\"\n\n\ndefinition\n get_pte' :: \"heap \\ paddr \\ vaddr \\ pte\" \nwhere\n \"get_pte' h pt_base vp \\\n let\n pt_idx_offset = ((vaddr_pt_index (addr_val vp)) << 2)\n in\n decode_heap_pte' h (pt_base r+ pt_idx_offset)\"\n\n\ndefinition \n lookup_pte' :: \"heap \\ paddr \\ vaddr \\ (paddr \\ page_type \\ arm_perm_bits)\"\nwhere\n \"lookup_pte' h pt_base vp \\\n case_option None\n (\\pte. case pte\n of InvalidPTE \\ None\n | SmallPagePTE base perms \\ Some (base, ArmSmallPage, perms))\n (get_pte' h pt_base vp)\"\n\n\ndefinition\n lookup_pde' :: \"heap \\ paddr \\ vaddr \\ (paddr \\ page_type \\ arm_perm_bits)\"\nwhere\n \"lookup_pde' h rt vp \\\n case_option None\n (\\pde. case pde\n of InvalidPDE \\ None\n | ReservedPDE \\ None\n | SectionPDE base perms \\ Some (base, ArmSection, perms)\n | PageTablePDE pt_base \\ lookup_pte' h pt_base vp)\n (get_pde' h rt vp)\"\n\n\n(* page table look-up *) \n\ndefinition\n ptable_lift' :: \"heap \\ paddr \\ vaddr \\ paddr\" \nwhere\n \"ptable_lift' h pt_root vp \\\n let\n vp_val = addr_val vp\n in\n map_option\n (\\(base, pg_size, perms).\n base r+ (vaddr_offset pg_size vp_val))\n (lookup_pde' h pt_root vp)\"\n\n\ndefinition\n mem_read_hp :: \"heap \\ paddr \\ vaddr \\ val\"\nwhere\n \"mem_read_hp hp rt vp = (ptable_lift' hp rt \\o load_value_word_hp hp) vp\"\n\n\ndefinition \n ptable_trace' :: \"heap \\ paddr \\ vaddr \\ paddr set\" \nwhere\n \"ptable_trace' h rt vp \\\n let\n vp_val = addr_val vp ;\n pd_idx_offset = ((vaddr_pd_index vp_val) << 2) ;\n pt_idx_offset = ((vaddr_pt_index vp_val) << 2) ;\n pd_touched = {rt r+ pd_idx_offset};\n pt_touched = (\\pt_base. {pt_base r+ pt_idx_offset})\n in\n (case decode_pde (the (h (rt r+ pd_idx_offset)))\n of PageTablePDE pt_base \\ pd_touched \\ pt_touched pt_base\n | _ \\ pd_touched)\"\n\ndefinition \n pde_trace' :: \"heap \\ paddr \\ vaddr \\ paddr\" \nwhere\n \"pde_trace' h rt vp \\\n let\n vp_val = addr_val vp ;\n pd_idx_offset = ((vaddr_pd_index vp_val) << 2) ;\n pd_touched = rt r+ pd_idx_offset\n in\n (case decode_heap_pde' h (rt r+ pd_idx_offset)\n of Some pde \\ Some pd_touched\n | None \\ None)\"\n\n\nlemma ptlift_trace_some:\n \"ptable_lift' h r vp = Some pa \\ ptable_trace' h r vp \\ {}\"\n by (clarsimp simp: ptable_lift'_def lookup_pde'_def get_pde'_def ptable_trace'_def Let_def\n split:option.splits pde.splits)\n\n\nlemma ptable_lift_preserved':\n \" \\p \\ ptable_trace' h r vp; ptable_lift' h r vp = Some pa\\ \\ ptable_lift' (h(p \\ v)) r vp = Some pa\"\n apply (frule ptlift_trace_some , clarsimp simp: ptable_lift'_def lookup_pde'_def get_pde'_def ptable_trace'_def Let_def split: option.splits)\n apply (case_tac x2; clarsimp simp: decode_heap_pde'_def lookup_pte'_def split: option.splits)\n apply (case_tac x2a ; clarsimp)\n apply (rule conjI)\n apply (rule_tac x = \"(SmallPagePTE a b)\" in exI, clarsimp simp: get_pte'_def decode_heap_pte'_def , clarsimp)\n by (case_tac x2 ; clarsimp simp:get_pte'_def decode_heap_pte'_def)\n\n\n\nlemma ptable_trace_get_pde:\n \"\\p \\ ptable_trace' h r x; get_pde' h r x = Some pde\\ \\ \n get_pde' (h(p \\ v)) r x = Some pde\"\n apply (clarsimp simp: ptable_trace'_def Let_def get_pde'_def decode_heap_pde'_def )\n by (case_tac \" decode_pde z\" ; clarsimp)\n\n\nlemma ptable_trace_preserved':\n \"\\ptable_lift' h r vp = Some pb; p \\ ptable_trace' h r vp;\n pa \\ ptable_trace' h r vp \\ \\ pa \\ ptable_trace' (h(p \\ v)) r vp\"\n apply (frule ptlift_trace_some)\n apply (subgoal_tac \"ptable_trace' (h(p \\ v)) r vp \\ {}\")\n prefer 2\n apply (clarsimp simp: ptable_lift'_def lookup_pde'_def get_pde'_def ptable_trace'_def Let_def split: option.splits)\n apply (case_tac x2 ; clarsimp simp: decode_heap_pde'_def)\n by (clarsimp simp: ptable_lift'_def lookup_pde'_def get_pde'_def decode_heap_pde'_def ptable_trace'_def Let_def split: option.splits pde.splits)\n\n\nlemma ptable_trace_get_pde':\n \"\\ get_pde' (h(p \\ v)) r x = Some pde; p \\ ptable_trace' h r x \\ \\ \n get_pde' h r x = Some pde \"\n apply (clarsimp simp: ptable_trace'_def Let_def get_pde'_def decode_heap_pde'_def )\n by (case_tac \" decode_pde (the (h (r r+ (vaddr_pd_index (addr_val x) << 2))))\" ; clarsimp)\n\n\nlemma [simp]:\n \"get_pde' h r va = Some (SectionPDE p perms) \\ \n decode_pde (the (h \n (r r+ (vaddr_pd_index (addr_val va) << 2)))) = SectionPDE p perms \"\n by (clarsimp simp: get_pde'_def decode_heap_pde'_def)\n\n\n\nlemma pt_table_lift_trace_upd'':\n \"p \\ ptable_trace' h r x \\ ptable_lift' (h(p \\ v)) r x = ptable_lift' h r x\"\n apply (clarsimp simp: ptable_trace'_def Let_def ptable_lift'_def lookup_pde'_def get_pde'_def)\n apply (subgoal_tac \"decode_heap_pde' (h(p \\ v)) (r r+ (vaddr_pd_index (addr_val x) << 2)) =\n decode_heap_pde' h (r r+ (vaddr_pd_index (addr_val x) << 2))\")\n apply clarsimp\n apply (clarsimp simp: decode_heap_pde'_def)\n apply (clarsimp split: option.splits)\n apply (clarsimp split: pde.splits)\n apply (clarsimp simp: lookup_pte'_def get_pte'_def)\n apply (subgoal_tac \"decode_heap_pte' (h(p \\ v)) (x3 r+ (vaddr_pt_index (addr_val x) << 2)) =\n decode_heap_pte' h (x3 r+ (vaddr_pt_index (addr_val x) << 2))\")\n apply (clarsimp)\n apply (clarsimp simp: decode_heap_pte'_def)\n by (clarsimp simp: decode_heap_pde'_def decode_pde_def Let_def split: pde.splits)\n\n\n(* page table look-up with mode and access permissions *) \n \ndefinition\n \"user_perms perms = (arm_p_AP perms = 0x2 \\ arm_p_AP perms = 0x3)\"\n\ndefinition\n \"filter_pde m = (\\x. case x of None \\ None\n | Some (base, pg_size, perms) \\\n if (m = Kernel) \\ (m = User \\ user_perms perms)\n then Some (base, pg_size, perms)\n else None) \"\n\ndefinition\n lookup_pde_perm :: \"heap \\ paddr \\ mode_t \\ vaddr \\ (paddr \\ page_type \\ arm_perm_bits)\"\nwhere\n \"lookup_pde_perm h r m vp = filter_pde m (lookup_pde' h r vp)\"\n\ndefinition\n ptable_lift_m :: \"heap \\ paddr \\ mode_t \\ vaddr \\ paddr\"\nwhere\n \"ptable_lift_m h r m vp \\\n map_option (\\(base, pg_size, perms). base r+ (vaddr_offset pg_size (addr_val vp)))\n (lookup_pde_perm h r m vp) \"\n\n\nlemma lookup_pde_kernel[simp]:\n \"lookup_pde_perm h r Kernel vp = lookup_pde' h r vp\"\n by(clarsimp simp: lookup_pde_perm_def filter_pde_def split:option.splits)\n\n\nlemma [simp]:\n \"ptable_lift_m h r Kernel va = ptable_lift' h r va\"\n by (clarsimp simp: ptable_lift_m_def ptable_lift'_def )\n\n\nlemma ptable_lift_m_user [simp]:\n \"ptable_lift_m h r User va = Some pa \\\n ptable_lift_m h r User va = ptable_lift' h r va\"\n by (clarsimp simp: ptable_lift_m_def ptable_lift'_def lookup_pde_perm_def filter_pde_def split: option.splits if_split_asm)\n\n\n\nlemma ptlift_trace_some':\n \"ptable_lift_m h r m vp = Some pa \\ ptable_trace' h r vp \\ {}\"\n by (case_tac m , simp add: ptlift_trace_some , simp, frule ptable_lift_m_user, simp add: ptlift_trace_some)\n\n\nlemma ptable_trace_preserved_m:\n \"\\ptable_lift_m h r m vp = Some pb; p \\ ptable_trace' h r vp;\n pa \\ ptable_trace' h r vp \\ \\ pa \\ ptable_trace' (h(p \\ v)) r vp\"\n by (case_tac m ,simp add: ptable_trace_preserved', simp, frule ptable_lift_m_user, simp add: ptable_trace_preserved')\n\nlemma ptable_lift_user_implies_ptable_lift:\n \"ptable_lift_m h r User va = Some pa \\ ptable_lift' h r va = Some pa\"\n by (clarsimp simp: ptable_lift_m_def lookup_pde_perm_def filter_pde_def \n ptable_lift'_def split:option.splits if_split_asm)\n\n\nlemma ptable_lift_preserved_m:\n \"\\p \\ ptable_trace' h r vp; ptable_lift_m h r m vp = Some pa\\ \\ ptable_lift_m (h(p \\ v)) r m vp = Some pa\"\n apply (case_tac m ; simp add: ptable_lift_preserved')\n apply (frule ptable_lift_m_user ; simp)\n apply (frule_tac pa = pa and v = v in ptable_lift_preserved' , simp)\n apply (clarsimp simp: ptable_trace'_def Let_def ptable_lift'_def lookup_pde'_def get_pde'_def split: option.splits)\n apply (case_tac x2 ; clarsimp)\n prefer 2\n apply (clarsimp simp: decode_heap_pde'_def)\n apply (clarsimp simp: ptable_lift_m_def lookup_pde'_def get_pde'_def decode_heap_pde'_def lookup_pde_perm_def filter_pde_def)\n apply (clarsimp simp: ptable_lift_m_def lookup_pde'_def get_pde'_def lookup_pde_perm_def filter_pde_def lookup_pte'_def get_pte'_def decode_heap_pte'_def\n split:if_split_asm split: option.splits)\n by (case_tac \"decode_pte x2\" ; clarsimp simp: decode_heap_pde'_def lookup_pte'_def get_pte'_def decode_heap_pte'_def)\n\n\nlemma ptable_lift_m_implies_ptlift:\n \"ptable_lift_m (heap s) (root s) (mode s) (Addr vp) = Some p \\ ptable_lift' (heap s) (root s) (Addr vp) = Some p\"\n by (clarsimp simp: ptable_lift_m_def ptable_lift'_def lookup_pde_perm_def filter_pde_def user_perms_def split: option.splits if_split_asm)\n\n\nlemma union_imp_all:\n \"p \\ \\(ptable_trace' h r ` UNIV) \\ \\x. p \\ ptable_trace' h r x\"\n by (clarsimp)\n\n\n (* Mapped page table, used for later in the kernel execution *)\ndefinition\n ptable_mapped :: \"heap \\ paddr \\ vaddr set\"\nwhere\n \"ptable_mapped h r \\ {va. \\p. ptable_lift' h r va = Some p \\ p \\ \\(ptable_trace' h r ` UNIV) } \"\n\n\n\n(* Memory Operations for Logic *)\n\n\ndefinition\n mem_read_hp' :: \"vaddr set \\ heap \\ paddr \\ mode_t \\ vaddr \\ val\"\nwhere\n \"mem_read_hp' iset hp rt m vp \\ if vp \\ iset then\n (ptable_lift_m hp rt m \\o load_value_word_hp hp) vp else None\"\n\n\n\ndefinition \"pagetable_lookup \\ ptable_lift_m\"\n\n\ndefinition\n if_filter :: \"bool \\ 'a option \\ 'a\" (infixl \"\\\" 55)\nwhere\n \"if_filter a b \\ if a then b else None\"\n\n\ndefinition\n \"physical_address iset hp rt m va \\ (va \\ iset) \\ pagetable_lookup hp rt m va\"\n\n\ndefinition\n mem_read_hp'' :: \"vaddr set \\ heap \\ paddr \\ mode_t \\ vaddr \\ val\"\nwhere\n \"mem_read_hp'' iset hp rt m va \\\n (physical_address iset hp rt m \\o load_value_word_hp hp) va\"\n\ndefinition\n \"fun_update' f g v \\\n case f of Some y \\ Some (g (y \\ v))\n | None \\ None \"\n\n\n\ndefinition\n mem_write :: \"vaddr set \\ heap \\ paddr \\ mode_t \\ vaddr \\ val \\ heap\"\nwhere\n \"mem_write iset hp rt m va v \\\n fun_update' (physical_address iset hp rt m va) hp v \"\n\n\n(*Flush Operations for incon_set *)\n\ndatatype flush_type = flushTLB\n | flushASID asid\n | flushvarange \"vaddr set\"\n | flushASIDvarange asid \"vaddr set\"\n\n\n\n\n\n\n\n\n(* ptable_comp function *)\n\n\nfun word_bits :: \"nat \\ nat \\ 'a::len word \\ 'a::len word\" where\n \"word_bits h l w = (w >> l) AND mask (Suc h - l)\"\n\nfun word_extract :: \"nat \\ nat \\ 'a::len word \\ 'b::len word\" where\n \"word_extract h l w = ucast (word_bits h l w)\"\n\ndefinition\n to_tlb_flags :: \"arm_perm_bits \\ tlb_flags\"\nwhere\n \"to_tlb_flags perms \\ \\nG = arm_p_nG perms, perm_APX = arm_p_APX perms, perm_AP = arm_p_AP perms, perm_XN = arm_p_XN perms \\\"\n\ndefinition \"tag_conv (a::asid) fl \\ (if nG fl = 0 then None else Some a)\"\n\n\ndefinition \n pdc_walk :: \"asid \\ heap \\ paddr \\ vaddr \\ pdc_entry option\"\nwhere\n \"pdc_walk a hp rt v \\\n case get_pde' hp rt v\n of Some (SectionPDE p perms) \\ Some (PDE_Section \n (tag_conv a (to_tlb_flags perms))\n (ucast (addr_val v >> 20) :: 12 word) \n (addr_val p) \n (to_tlb_flags perms))\n | Some (PageTablePDE p) \\ Some (PDE_Table a (ucast (addr_val v >> 20) :: 12 word) (addr_val p))\n | _ \\ None\" \n\n\ndefinition\n pte_tlb_entry :: \"asid \\ heap \\ paddr \\ vaddr \\ tlb_entry option\"\nwhere\n \"pte_tlb_entry a hp p v \\ case get_pte' hp p v \n of Some (SmallPagePTE p' perms) \\ Some (EntrySmall (tag_conv a (to_tlb_flags perms))\n (ucast (addr_val v >> 12) :: 20 word)\n ((word_extract 31 12 (addr_val p')):: 20 word)\n (to_tlb_flags perms))\n | _ \\ None\"\n\n\nfun\n pde_tlb_entry :: \"pdc_entry \\ heap \\ vaddr \\ tlb_entry option\"\nwhere\n \"pde_tlb_entry (PDE_Section a vba pba flags) mem va = Some (EntrySection a (ucast (addr_val va >> 20) :: 12 word) ((ucast (pba >> 20)) :: 12 word) flags)\"\n| \"pde_tlb_entry (PDE_Table a vba pba) mem va = pte_tlb_entry a mem (Addr pba) va\"\n\n\n\ndefinition\n map_opt :: \"('a \\ 'b option) \\ 'a option \\ 'b option\"\nwhere\n \"map_opt f x \\ case x of None \\ None | Some y \\ f y\"\n\n\ndefinition\n pt_walk :: \"asid \\ heap \\ paddr \\ vaddr \\ tlb_entry option\"\nwhere\n \"pt_walk a m r v \\ map_opt (\\pde. pde_tlb_entry pde m v) (pdc_walk a m r v)\"\n \n\ndefinition\n pt_walk_pair :: \"asid \\ heap \\ paddr \\ vaddr \\ pt_walk_typ\"\nwhere\n \"pt_walk_pair a mem ttbr0 v \\\n case pdc_walk a mem ttbr0 v\n of None \\ Fault \n | Some pde \\ (case pde_tlb_entry pde mem v \n of None \\ Partial_Walk pde\n | Some tlbentry \\ Full_Walk tlbentry pde)\"\n\n\ndefinition\n entry_leq :: \"pt_walk_typ \\ pt_walk_typ \\ bool\" (\"(_/ \\ _)\" [51, 51] 50)\n where\n \"a \\ b \\ a = Fault \\ a = b \\ (\\y. a = Partial_Walk y \\ (\\x. b = Full_Walk x y))\"\n\n\ndefinition\n entry_less :: \"pt_walk_typ \\ pt_walk_typ \\ bool\" (\"(_/ \\ _)\" [51, 51] 50)\n where\n \"a \\ b = (a \\ b \\ a \\ b)\"\n\n\ninterpretation entry: order entry_leq entry_less\n apply unfold_locales\n by (auto simp: entry_leq_def entry_less_def)\n\n(* faults *)\n\ndefinition\n \"is_fault e \\ (e = None)\"\n\n\ndefinition\n ptable_comp :: \"(vaddr \\ pt_walk_typ) \\ (vaddr \\ pt_walk_typ) \\ vaddr set\"\nwhere\n \"ptable_comp walk walk' \\ {va. \\(walk va \\ walk' va)}\"\n\ndefinition\n incon_comp :: \"asid \\ asid \\ heap \\ heap \\ paddr \\ paddr \\ vaddr set\"\nwhere\n \"incon_comp a a' hp hp' rt rt' \\ ptable_comp (pt_walk_pair a hp rt) (pt_walk_pair a' hp' rt')\"\n\n\nlemma ptable_trace_pde_comp:\n \"\\x. p \\ ptable_trace' h r x \\ incon_comp a a h (h(p \\ v)) r r= {}\"\n apply (clarsimp simp: ptable_trace'_def incon_comp_def ptable_comp_def Let_def)\n apply (drule_tac x = x in spec) \n apply (clarsimp simp: entry_leq_def pt_walk_pair_def pdc_walk_def pte_tlb_entry_def get_pde'_def\n decode_heap_pde'_def decode_pde_def split: option.splits pde.splits pte.splits)\n using Let_def apply auto [1]\n apply (clarsimp simp: Let_def split: if_split_asm) \n apply (clarsimp simp: Let_def split: if_split_asm)\n using Let_def apply auto [1]\n apply (clarsimp simp: Let_def split: if_split_asm) \n apply (clarsimp simp: Let_def split: if_split_asm)\n using Let_def apply auto [1]\n apply (clarsimp simp: Let_def pte_tlb_entry_def get_pte'_def decode_heap_pte'_def split: if_split_asm option.splits pte.splits) \n apply (clarsimp simp: Let_def pte_tlb_entry_def get_pte'_def decode_heap_pte'_def split: if_split_asm option.splits pte.splits)\n using Let_def apply auto [1]\n apply (clarsimp simp: Let_def pte_tlb_entry_def get_pte'_def decode_heap_pte'_def split: if_split_asm option.splits pte.splits) +\ndone\n\n\nlemma pde_comp_empty:\n \"p \\ \\(ptable_trace' h r ` UNIV) \\ incon_comp a a h (h(p \\ v)) r r = {}\"\n apply (drule union_imp_all)\n by (clarsimp simp: ptable_trace_pde_comp)\n\n\nlemma plift_equal_not_in_pde_comp [simp]:\n \"\\pt_walk_pair a h r va = e ; pt_walk_pair a h' r va = e \\ \\\n va \\ incon_comp a a h h' r r\"\n by (clarsimp simp: incon_comp_def ptable_comp_def)\n\n\nlemma pt_walk_pair_pt_trace_upd:\n \"p \\ ptable_trace' h r x \\ pt_walk_pair a h r x = pt_walk_pair a (h(p \\ v)) r x\"\n apply (clarsimp simp: ptable_trace'_def Let_def pt_walk_pair_def pdc_walk_def)\n apply (subgoal_tac \"get_pde' h r x = get_pde' (h(p \\ v)) r x\" , clarsimp)\n apply (cases \"get_pde' (h(p \\ v)) r x\" ;clarsimp)\n apply (case_tac aa ; clarsimp simp: pte_tlb_entry_def)\n apply (subgoal_tac \"get_pte' h x3 x = get_pte' (h(p \\ v)) x3 x\")\n apply clarsimp\n apply (clarsimp simp: get_pde'_def decode_heap_pde'_def get_pte'_def decode_heap_pte'_def)\n by (clarsimp simp: get_pde'_def decode_heap_pde'_def Let_def split: pde.splits)\n\nlemma pt_walk_pt_trace_upd:\n \"p \\ ptable_trace' h r x \\ pt_walk a h r x = pt_walk a (h(p \\ v)) r x\"\n apply (clarsimp simp: ptable_trace'_def Let_def pt_walk_def pdc_walk_def map_opt_def)\n apply (subgoal_tac \"get_pde' h r x = get_pde' (h(p \\ v)) r x\" , clarsimp)\n apply (cases \"get_pde' (h(p \\ v)) r x\" ;clarsimp)\n apply (case_tac aa ; clarsimp simp: pte_tlb_entry_def)\n apply (subgoal_tac \"get_pte' h x3 x = get_pte' (h(p \\ v)) x3 x\")\n apply clarsimp\n apply (clarsimp simp: get_pde'_def decode_heap_pde'_def get_pte'_def decode_heap_pte'_def)\n by (clarsimp simp: get_pde'_def decode_heap_pde'_def Let_def split: pde.splits)\n\n\nlemma pt_trace_upd:\n \"p \\ ptable_trace' h r x \\ ptable_trace' (h (p \\ v)) r x = ptable_trace' h r x\"\n by (clarsimp simp: ptable_trace'_def Let_def split: pde.splits)\n\n\nlemma pt_table_lift_trace_upd:\n \"p \\ ptable_trace' h r x \\ ptable_lift_m (h(p \\ v)) r m x = ptable_lift_m h r m x\"\n apply (clarsimp simp: ptable_trace'_def Let_def ptable_lift_m_def\n lookup_pde_perm_def lookup_pde'_def get_pde'_def)\n apply (subgoal_tac \"decode_heap_pde' (h(p \\ v)) (r r+ (vaddr_pd_index (addr_val x) << 2)) =\n decode_heap_pde' h (r r+ (vaddr_pd_index (addr_val x) << 2))\")\n apply clarsimp\n apply (clarsimp simp: decode_heap_pde'_def)\n apply (clarsimp split: option.splits)\n apply (clarsimp split: pde.splits)\n apply (clarsimp simp: lookup_pte'_def get_pte'_def)\n apply (subgoal_tac \"decode_heap_pte' (h(p \\ v)) (x3 r+ (vaddr_pt_index (addr_val x) << 2)) =\n decode_heap_pte' h (x3 r+ (vaddr_pt_index (addr_val x) << 2))\")\n apply (clarsimp)\n apply (clarsimp simp: decode_heap_pte'_def)\n by (clarsimp simp: decode_heap_pde'_def decode_pde_def Let_def split: pde.splits)\n\n\nlemma pt_table_lift_trace_upd':\n \"p \\ ptable_trace' h r x \\ ptable_lift' h r x = ptable_lift' (h(p \\ v)) r x\"\n apply (clarsimp simp: ptable_trace'_def Let_def ptable_lift'_def\n lookup_pde_perm_def lookup_pde'_def get_pde'_def)\n apply (subgoal_tac \"decode_heap_pde' (h(p \\ v)) (r r+ (vaddr_pd_index (addr_val x) << 2)) =\n decode_heap_pde' h (r r+ (vaddr_pd_index (addr_val x) << 2))\")\n apply clarsimp\n apply (clarsimp simp: decode_heap_pde'_def)\n apply (clarsimp split: option.splits)\n apply (clarsimp split: pde.splits)\n apply (clarsimp simp: lookup_pte'_def get_pte'_def)\n apply (subgoal_tac \"decode_heap_pte' (h(p \\ v)) (x3 r+ (vaddr_pt_index (addr_val x) << 2)) =\n decode_heap_pte' h (x3 r+ (vaddr_pt_index (addr_val x) << 2))\")\n apply (clarsimp)\n apply (clarsimp simp: decode_heap_pte'_def)\n by (clarsimp simp: decode_heap_pde'_def decode_pde_def Let_def split: pde.splits)\n\n\nlemma pt_walk_pt_trace_upd':\n \"p \\ ptable_trace' h r x \\ pt_walk a (h(p \\ v)) r x = pt_walk a h r x\"\n using pt_walk_pt_trace_upd by auto\n\nlemma pt_walk_pair_pt_trace_upd':\n \"p \\ ptable_trace' h r x \\ pt_walk_pair a (h(p \\ v)) r x = pt_walk_pair a h r x\"\n using pt_walk_pair_pt_trace_upd by auto\n\nlemma no_fault_pt_walk_no_fault_pdc_walk:\n \"\\is_fault (pt_walk a m r va) \\ \\is_fault (pdc_walk a m r va)\"\n by (clarsimp simp: is_fault_def pt_walk_def map_opt_def split: option.splits)\n\nlemma pt_walk_pair_no_fault_pdc_walk:\n \"\\pt_walk_pair a m rt v = Full_Walk entry entry'\\ \\ pdc_walk a m rt v = Some entry'\"\n by (clarsimp simp: pt_walk_pair_def pdc_walk_def split: option.splits pde.splits pte.splits)\n\n\nlemma pt_walk_pair_pair_fault_pdc_walk:\n \"\\pt_walk_pair a m r v = Partial_Walk y\\ \\ pdc_walk a m r v = Some y\"\n by (clarsimp simp: pt_walk_pair_def is_fault_def pdc_walk_def split: option.splits pde.splits pte.splits)\n\n\nlemma pt_walk_pair_fault_pdc_walk_fault':\n \"\\pt_walk_pair a m rt v = Fault\\ \\ pdc_walk a m rt v = None\"\n by (clarsimp simp: pt_walk_pair_def pdc_walk_def split: option.splits pde.splits pte.splits)\n\n\nlemma pt_walk_pair_fault_pt_walk_fault':\n \"\\pt_walk_pair a m rt v = Fault\\ \\ pt_walk a m rt v = None\"\n by (clarsimp simp: pt_walk_pair_def pt_walk_def map_opt_def pdc_walk_def split: option.splits pde.splits pte.splits)\n\n\nlemma pt_walk_pair_equal_pdc_walk:\n \"pt_walk_pair a m rt v = pt_walk_pair a' m' rt' v \\ pdc_walk a m rt v = pdc_walk a' m' rt' v\"\n by (cases \"pt_walk_pair a m rt v\"; cases \"pt_walk_pair a' m' rt' v\";\n clarsimp simp: pt_walk_pair_fault_pdc_walk_fault' pt_walk_pair_pair_fault_pdc_walk\n pt_walk_pair_no_fault_pdc_walk)\n\nlemma pt_walk_pair_equal_pdc_walk':\n \"\\pt_walk_pair a m rt v = pt_walk_pair a' m' rt' v\\ \\ \n the(pdc_walk a m rt v) = the(pdc_walk a' m' rt' v)\"\n by (cases \"pt_walk_pair a m rt v\"; cases \"pt_walk_pair a' m' rt' v\";\n clarsimp simp: pt_walk_pair_fault_pdc_walk_fault' pt_walk_pair_pair_fault_pdc_walk\n pt_walk_pair_no_fault_pdc_walk)\n\n\nlemma pt_walk_pair_pdc_no_fault:\n \"\\pt_walk_pair a m rt v = pt_walk_pair a' m' rt' v; \\is_fault (pdc_walk a' m' rt' v) \\ \\ \n \\is_fault (pdc_walk a m rt v)\"\n by (cases \"pt_walk_pair a m rt v\"; cases \"pt_walk_pair a' m' rt' v\";\n clarsimp simp: pt_walk_pair_fault_pdc_walk_fault' pt_walk_pair_pair_fault_pdc_walk\n pt_walk_pair_no_fault_pdc_walk)\n\nlemma pt_walk_pair_fault_pt_walk_fault:\n \"\\pt_walk_pair a m r v = Partial_Walk y\\ \\ is_fault (pt_walk a m r v)\"\n by (clarsimp simp: pt_walk_pair_def is_fault_def pt_walk_def map_opt_def split: option.splits pde.splits)\n\n\nlemma pt_walk_pair_no_fault_pt_walk:\n \"\\pt_walk_pair a m rt v = Full_Walk entry entry'\\ \\ pt_walk a m rt v = Some entry\"\n by (clarsimp simp: pt_walk_pair_def pt_walk_def map_opt_def split: option.splits pde.splits pte.splits)\n\n\nlemma pt_walk_pair_no_fault_pt_walk':\n \"pt_walk_pair a m r v = Full_Walk te pe \\ \\is_fault (pt_walk a m r v)\"\n by (simp add: is_fault_def pt_walk_pair_no_fault_pt_walk)\n\n\nlemma pt_walk_full_no_pdc_fault:\n \"pt_walk_pair a m r v = Full_Walk te pe \\ \\is_fault (pdc_walk a m r v)\"\n using no_fault_pt_walk_no_fault_pdc_walk pt_walk_pair_no_fault_pt_walk' by auto\n\n\nlemma pt_walk_pair_pt_no_fault:\n \"\\pt_walk_pair a m rt v = pt_walk_pair a' m' rt' v; \\is_fault (pt_walk a' m' rt' v) \\ \\ \n \\is_fault (pt_walk a m rt v)\"\n by (cases \"pt_walk_pair a m rt v\"; cases \"pt_walk_pair a' m' rt' v\";\n clarsimp simp: pt_walk_pair_fault_pt_walk_fault' pt_walk_pair_fault_pt_walk_fault\n pt_walk_pair_no_fault_pt_walk')\n\nlemma pdc_walk_pt_trace_upd:\n \"p \\ ptable_trace' h r x \\ pdc_walk a (h(p \\ v)) r x = pdc_walk a h r x\"\n apply (clarsimp simp: ptable_trace'_def Let_def pdc_walk_def split: option.splits)\n apply (subgoal_tac \"get_pde' h r x = get_pde' (h(p \\ v)) r x\" , clarsimp)\n by (clarsimp simp: get_pde'_def decode_pde_def Let_def decode_heap_pde'_def split: pde.splits if_split_asm)\n\n\nlemma pt_walk_not_full_walk_fault:\n \"pt_walk_pair a m r v \\ Full_Walk (the (pt_walk a m r v)) (the (pdc_walk a m r v)) \\\n is_fault (pt_walk a m r v)\"\n by (clarsimp simp: pt_walk_pair_def is_fault_def pt_walk_def map_opt_def split: option.splits)\n \n\nlemma pt_walk_not_full_walk_partial_pdc:\n \"\\\\te. pt_walk_pair a m r v \\ Full_Walk te (the (pdc_walk a m r v)); \n \\is_fault (pdc_walk a m r v)\\ \\ pt_walk_pair a m r v = Partial_Walk (the (pdc_walk a m r v))\"\n by (metis is_fault_def le_boolD option.sel order_refl pt_walk_not_full_walk_fault pt_walk_pair_fault_pdc_walk_fault' \n pt_walk_pair_no_fault_pt_walk' pt_walk_pair_pair_fault_pdc_walk pt_walk_typ.exhaust)\n\nlemma pt_walk_pair_disj:\n \"pt_walk_pair a m r v = Fault \\ pt_walk_pair a m r v = Partial_Walk (the (pdc_walk a m r v)) \\ \n pt_walk_pair a m r v = Full_Walk (the (pt_walk a m r v)) (the (pdc_walk a m r v))\"\n by (clarsimp simp: pt_walk_pair_def is_fault_def pt_walk_def map_opt_def split: option.splits)\n\n\n\n(* snapshot functions *)\n\n\n\ndefinition \n cur_pt_snp :: \"vaddr set \\ heap \\ paddr \\ asid \\ (vaddr set \\ (vaddr \\ pt_walk_typ))\"\nwhere\n \"cur_pt_snp ist m r \\ \\a. (ist, \\v. pt_walk_pair a m r v)\"\n\n\ndefinition \n cur_pt_snp' :: \"(asid \\ (vaddr set \\ (vaddr \\ pt_walk_typ))) \\ vaddr set \\ \n heap \\ paddr \\ asid \\ (asid \\ (vaddr set \\ (vaddr \\ pt_walk_typ)))\"\nwhere\n \"cur_pt_snp' snp ist mem ttbr0 a \\ snp (a := cur_pt_snp ist mem ttbr0 a)\"\n\n\n\ndefinition\n \"range_of (e :: tlb_entry) \\\n case e of EntrySmall a vba pba fl \\ Addr ` {(ucast vba) << 12 ..\n ((ucast vba) << 12) + (2^12 - 1)}\n | EntrySection a vba pba fl \\ Addr ` {(ucast vba) << 20 ..\n ((ucast vba) << 20) + (2^20 - 1)}\"\n\ndefinition \n global_entries :: \" tlb_entry set \\ tlb_entry set\"\nwhere\n \"global_entries t = {e\\t. asid_of e = None}\"\n\n\ndefinition \n incon_load :: \"ptable_snapshot \\ vaddr set \\ vaddr set \\ asid \\ heap \\ paddr \\ vaddr set\"\n where\n \"incon_load snp iset gset a m r \\ fst (snp a) \\ (iset \\ gset) \\ ptable_comp (snd(snp a)) (pt_walk_pair a m r)\"\n\n\n\n\n\nfun\n flush_effect_iset ::\"flush_type \\ vaddr set \\ vaddr set \\ asid \\ vaddr set\"\nwhere\n \"flush_effect_iset flushTLB iset gset a' = {}\"\n|\n \"flush_effect_iset (flushASID a) iset gset a' = (if a = a' then iset \\ gset else iset)\"\n|\n \"flush_effect_iset (flushvarange vset) iset gset a' = iset - vset\"\n|\n \"flush_effect_iset (flushASIDvarange a vset) iset gset a' = (if a = a' then iset - (vset - gset) else iset)\"\n\n\nfun\n flush_effect_glb ::\"flush_type \\ vaddr set \\ asid \\ heap \\ paddr \\ vaddr set\"\nwhere\n \"flush_effect_glb flushTLB gset a' m rt = (\\x\\global_entries (ran(pt_walk a' m rt)). range_of x)\"\n|\n \"flush_effect_glb (flushASID a) gset a' m rt = gset\"\n|\n \"flush_effect_glb (flushvarange vset) gset a' m rt = (gset - vset) \\ (\\x\\global_entries (ran(pt_walk a' m rt)). range_of x)\"\n|\n \"flush_effect_glb (flushASIDvarange a vset) gset a' m rt = gset\"\n\n\nfun\n flush_effect_snp :: \"flush_type \\ ptable_snapshot \\ asid \\ ptable_snapshot\"\nwhere\n \"flush_effect_snp flushTLB snp a' = (\\a. ({}, \\v. Fault))\"\n| \n \"flush_effect_snp (flushASID a) snp a'= (if a = a' then snp else snp(a := ({}, \\v. Fault)))\"\n|\n \"flush_effect_snp (flushvarange vset) snp a' = (\\a. (fst (snp a) - vset, \\v. if v \\ vset then Fault else snd (snp a) v ))\"\n| \n \"flush_effect_snp (flushASIDvarange a vset) snp a'= (if a = a' then snp else \n (\\x. if x = a then (fst (snp x) - vset, \\v. if v \\ vset then Fault else snd (snp x) v) else snp x))\"\n\n\n\n\n\n\n\n(* for global set *)\n\n\ndefinition\n pt_walk' :: \"asid \\ heap \\ paddr \\ vaddr \\ tlb_entry option\"\nwhere\n \"pt_walk' a hp rt v \\\n case get_pde' hp rt v\n of None \\ None\n | Some InvalidPDE \\ None\n | Some ReservedPDE \\ None\n | Some (SectionPDE bpa perms) \\ Some (EntrySection (tag_conv a (to_tlb_flags perms)) (ucast (addr_val v >> 20) :: 12 word)\n ((word_extract 31 20 (addr_val bpa)):: 12 word) \n (to_tlb_flags perms))\n | Some (PageTablePDE p) \\\n (case get_pte' hp p v\n of None \\ None\n | Some InvalidPTE \\ None\n | Some (SmallPagePTE bpa perms) \\ Some(EntrySmall (tag_conv a (to_tlb_flags perms)) (ucast (addr_val v >> 12) :: 20 word)\n ((word_extract 31 12 (addr_val bpa)):: 20 word) \n (to_tlb_flags perms)))\"\n\n\nlemma pt_walk'_pt_walk:\n \"pt_walk' a h rt v = pt_walk a h rt v\"\n apply (clarsimp simp: pt_walk'_def pt_walk_def pdc_walk_def pte_tlb_entry_def map_opt_def\n mask_def split:option.splits pde.splits pte.splits )\n by word_bitwise\n\n\n\nlemma va_20_left [simp]:\n fixes va :: \"32 word\"\n shows \"ucast (ucast (va >> 20) :: 12 word) << 20 \\ va\"\n by word_bitwise\n\nlemma va_12_left [simp]:\n fixes va :: \"32 word\"\n shows \"ucast (ucast (va >> 12) :: 20 word) << 12 \\ va\"\n by word_bitwise\n\nlemma va_20_right [simp]:\n fixes va :: \"32 word\"\n shows \"va \\ (ucast (ucast (va >> 20) :: 12 word) << 20) + 0x000FFFFF\"\n by word_bitwise\n\nlemma va_12_right [simp]:\n fixes va :: \"32 word\"\n shows \"va \\ (ucast (ucast (va >> 12) :: 20 word) << 12) + 0x00000FFF\"\n by word_bitwise\n\nlemma va_offset_add:\n \" (va::32 word) : {ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 .. \n (ucast (ucast (x >> 12):: 20 word) << 12) + mask 12 } \\\n \\a. (0 \\ a \\ a \\ mask 12) \\\n va = (ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12) + a\"\n apply (rule_tac x = \"va - (ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12) \" in exI)\n apply (clarsimp simp: mask_def)\n apply uint_arith\ndone\n\nlemma shift_to_mask:\n \"x AND NOT mask 12 = (ucast (ucast ((x::32 word) >> 12):: 20 word)::32 word) << 12\"\n apply (rule word_eqI)\n apply (simp add : word_ops_nth_size word_size)\n apply (simp add : nth_shiftr nth_shiftl nth_ucast)\n apply auto\n done\n\nlemma nth_bits_false:\n \"\\(n::nat) < 20; (a::32 word) \\ 0xFFF\\ \\ \\(a !! (n + 12))\"\n apply word_bitwise\n apply clarsimp\n apply (case_tac \"n = 0\")\n apply clarsimp\n apply (case_tac \"n = 1\")\n apply clarsimp\n apply (case_tac \"n = 2\")\n apply clarsimp\n apply (case_tac \"n = 3\")\n apply clarsimp\n apply (case_tac \"n = 4\")\n apply clarsimp\n apply (case_tac \"n = 5\")\n apply clarsimp\n apply (case_tac \"n = 6\")\n apply clarsimp\n apply (case_tac \"n = 7\")\n apply clarsimp\n apply (case_tac \"n = 8\")\n apply clarsimp\n apply (case_tac \"n = 9\")\n apply clarsimp\n apply (case_tac \"n = 10\")\n apply clarsimp\n apply (case_tac \"n = 11\")\n apply clarsimp\n apply (case_tac \"n = 12\")\n apply clarsimp\n apply (case_tac \"n = 13\")\n apply clarsimp\n apply (case_tac \"n = 14\")\n apply clarsimp\n apply (case_tac \"n = 15\")\n apply clarsimp\n apply (case_tac \"n = 16\")\n apply clarsimp\n apply (case_tac \"n = 17\")\n apply clarsimp\n apply (case_tac \"n = 18\")\n apply clarsimp\n apply (case_tac \"n = 19\")\n apply clarsimp\n apply (thin_tac \"\\ a !! P\" for P)+\n apply arith\ndone\n\nlemma nth_bits_offset_equal: \"\\n < 20 ; (a::32 word) \\ 0x00000FFF \\ \\ \n (((x::32 word) && 0xFFFFF000) || a) !! (n + 12) = x !! (n + 12)\"\n apply clarsimp\n apply (rule iffI)\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp simp: nth_bits_false)\n apply clarsimp\n apply (simp only: test_bit_int_def [symmetric])\n apply (case_tac \"n = 0\")\n apply clarsimp\n apply (case_tac \"n = 1\")\n apply clarsimp\n apply (case_tac \"n = 2\")\n apply clarsimp\n apply (case_tac \"n = 3\")\n apply clarsimp\n apply (case_tac \"n = 4\")\n apply clarsimp\n apply (case_tac \"n = 5\")\n apply clarsimp\n apply (case_tac \"n = 6\")\n apply clarsimp\n apply (case_tac \"n = 7\")\n apply clarsimp\n apply (case_tac \"n = 8\")\n apply clarsimp\n apply (case_tac \"n = 9\")\n apply clarsimp\n apply (case_tac \"n = 10\")\n apply clarsimp\n apply (case_tac \"n = 11\")\n apply clarsimp\n apply (case_tac \"n = 12\")\n apply clarsimp\n apply (case_tac \"n = 13\")\n apply clarsimp\n apply (case_tac \"n = 14\")\n apply clarsimp\n apply (case_tac \"n = 15\")\n apply clarsimp\n apply (case_tac \"n = 16\")\n apply clarsimp\n apply (case_tac \"n = 17\")\n apply clarsimp\n apply (case_tac \"n = 18\")\n apply clarsimp\n apply (case_tac \"n = 19\")\n apply clarsimp\n by presburger\n\nlemma add_to_or:\n \"(a::32 word) \\ 0xFFF \\\n ((x::32 word) && 0xFFFFF000) + a = (x && 0xFFFFF000) || a\"\n apply word_bitwise\n apply clarsimp\n using xor3_simps carry_simps apply auto\n done\n\nlemma va_offset_higher_bits: \n \" \\ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 \\ va ; \n va \\ (ucast (ucast (x >> 12):: 20 word) << 12) + 0x00000FFF \\ \\\n (ucast (x >> 12)::20 word) = (ucast ((va:: 32 word) >> 12)::20 word)\"\n apply (subgoal_tac \"(va::32 word) : {ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 ..\n (ucast (ucast (x >> 12):: 20 word) << 12) + mask 12 }\")\n prefer 2\n apply (clarsimp simp: mask_def)\n apply (frule va_offset_add)\n apply simp\n apply (erule exE)\n apply (erule conjE)\n apply (simp add: mask_def)\n apply (subgoal_tac \"(ucast ((((ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12)::32 word) + a) >> 12):: 20 word) =\n (ucast (((ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12)::32 word) >> 12):: 20 word) \")\n apply clarsimp\n apply (word_bitwise) [1]\n apply (subgoal_tac \"ucast ((ucast (ucast ((x::32 word) >> 12):: 20 word)::32 word) << 12 >> 12) =\n (ucast (x >> 12) :: 20 word)\")\n prefer 2\n apply (word_bitwise) [1]\n apply simp\n apply (clarsimp simp: shift_to_mask [symmetric])\n apply (rule word_eqI)\n apply (simp only: nth_ucast)\n apply clarsimp\n apply (subgoal_tac \"n < 20\")\n prefer 2\n apply word_bitwise [1]\n apply clarsimp\n apply (clarsimp simp: nth_shiftr)\n apply (clarsimp simp: mask_def)\n apply (frule_tac a = a in nth_bits_offset_equal) apply clarsimp\n apply (drule_tac x= x in add_to_or)\n apply (simp only: )\n done\n\nlemma n_bit_shift:\n \"\\ \\n::nat. n \\ {12 .. 31} \\(a::32 word) !! n = (b::32 word) !! n \\ \\ a >> 12 = b >> 12\"\n apply word_bitwise\n by auto\n lemma nth_bits_offset: \"\\ n \\ {12..31} ; (a::32 word) \\ 0x00000FFF \\ \\ \n (x::32 word) !! n = (x && 0xFFFFF000 || a) !! n\"\n apply (rule iffI)\n apply (case_tac \"n = 12\")\n apply clarsimp\n apply (case_tac \"n = 13\")\n apply clarsimp\n apply (case_tac \"n = 14\")\n apply clarsimp\n apply (case_tac \"n = 15\")\n apply clarsimp\n apply (case_tac \"n = 16\")\n apply clarsimp\n apply (case_tac \"n = 17\")\n apply clarsimp\n apply (case_tac \"n = 18\")\n apply clarsimp\n apply (case_tac \"n = 19\")\n apply clarsimp\n apply (case_tac \"n = 20\")\n apply clarsimp\n apply (case_tac \"n = 21\")\n apply clarsimp\n apply (case_tac \"n = 22\")\n apply clarsimp\n apply (case_tac \"n = 23\")\n apply clarsimp\n apply (case_tac \"n = 24\")\n apply clarsimp\n apply (case_tac \"n = 25\")\n apply clarsimp\n apply (case_tac \"n = 26\")\n apply clarsimp\n apply (case_tac \"n = 27\")\n apply clarsimp\n apply (case_tac \"n = 28\")\n apply clarsimp\n apply (case_tac \"n = 29\")\n apply clarsimp\n apply (case_tac \"n = 30\")\n apply clarsimp\n apply (case_tac \"n = 31\")\n apply clarsimp\n prefer 2\n apply (case_tac \"n = 12\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 13\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 14\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 15\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 16\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 17\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 18\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 19\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 20\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 21\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 22\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 23\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 24\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 25\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 26\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 27\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 28\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 29\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 30\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 31\")\n apply word_bitwise [1] apply clarsimp\n apply clarsimp\n apply arith\n apply clarsimp\n apply arith\ndone\n\nlemma offset_mask_eq:\n \"\\ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 \\ va ; \n va \\ (ucast (ucast (x >> 12):: 20 word) << 12) + 0x00000FFF\\\n \\ (( x >> 12) && mask 8 << 2) = ((va >> 12) && mask 8 << 2)\"\n apply (subgoal_tac \"(va::32 word) : {ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 ..\n (ucast (ucast (x >> 12):: 20 word) << 12) + mask 12 }\")\n prefer 2\n apply (clarsimp simp: mask_def)\n apply (frule va_offset_add)\n apply simp\n apply (erule exE)\n apply (erule conjE)\n apply (simp add: mask_def)\n apply (rule_tac f = \"(\\x. x && 0xFF << 2)\" in arg_cong)\n apply (clarsimp simp: shift_to_mask [symmetric])\n apply (simp add: mask_def)\n apply (rule n_bit_shift)\n apply (rule allI)\n apply (rule impI)\n apply (frule_tac x= x in add_to_or)\n apply (frule_tac x= x in nth_bits_offset)\n apply (simp only:)+\ndone\n\nlemma n_bit_shift_1:\n \"\\ \\n::nat. n \\ {12 .. 31} \\(a::32 word) !! n = (b::32 word) !! n \\ \\ a >> 20 = b >> 20\"\n apply word_bitwise\n by auto\n\nlemma offset_mask_eq_1:\n \"\\ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 \\ va ; \n va \\ (ucast (ucast (x >> 12):: 20 word) << 12) + 0x00000FFF\\\n \\((x >> 20) && mask 12 << 2) = ((va >> 20) && mask 12 << 2)\"\n apply (subgoal_tac \"(va::32 word) : {ucast (ucast ((x:: 32 word) >> 12):: 20 word) << 12 ..\n (ucast (ucast (x >> 12):: 20 word) << 12) + mask 12 }\")\n prefer 2\n apply (clarsimp simp: mask_def)\n apply (frule va_offset_add)\n apply simp\n apply (erule exE)\n apply (erule conjE)\n apply (simp add: mask_def)\n apply (rule_tac f = \"(\\x. x && 0xFFF << 2)\" in arg_cong)\n apply (clarsimp simp: shift_to_mask [symmetric])\n apply (simp add: mask_def)\n apply (rule n_bit_shift_1)\n apply (rule allI)\n apply (rule impI)\n apply (frule_tac x= x in add_to_or)\n apply (frule_tac x= x in nth_bits_offset)\n apply (simp only:)+\n done\n\nlemma va_offset_add_1:\n \" (va::32 word) : {ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20 .. \n (ucast (ucast (x >> 20):: 12 word) << 20) + mask 20 } \\\n \\a. (0 \\ a \\ a \\ mask 20) \\\n va = (ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20) + a\"\n apply (rule_tac x = \"va - (ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20) \" in exI)\n apply (clarsimp simp: mask_def)\n apply uint_arith\ndone\n\nlemma shift_to_mask_1:\n \"x AND NOT mask 20 = (ucast (ucast ((x::32 word) >> 20):: 12 word)::32 word) << 20\"\n apply (rule word_eqI)\n apply (simp add : word_ops_nth_size word_size)\n apply (simp add : nth_shiftr nth_shiftl nth_ucast)\n apply auto\ndone\n\nlemma nth_bits_false_1:\n \"\\(n::nat) < 12; (a::32 word) \\ 0xFFFFF\\ \\ \\(a !! (n + 20))\"\n apply word_bitwise\n apply clarsimp\n apply (case_tac \"n = 0\")\n apply clarsimp\n apply (case_tac \"n = 1\")\n apply clarsimp\n apply (case_tac \"n = 2\")\n apply clarsimp\n apply (case_tac \"n = 3\")\n apply clarsimp\n apply (case_tac \"n = 4\")\n apply clarsimp\n apply (case_tac \"n = 5\")\n apply clarsimp\n apply (case_tac \"n = 6\")\n apply clarsimp\n apply (case_tac \"n = 7\")\n apply clarsimp\n apply (case_tac \"n = 8\")\n apply clarsimp\n apply (case_tac \"n = 9\")\n apply clarsimp\n apply (case_tac \"n = 10\")\n apply clarsimp\n apply (case_tac \"n = 11\")\n apply clarsimp\n apply (thin_tac \"\\ a !! P\" for P)+\n apply arith\n done\n\nlemma nth_bits_offset_equal_1: \"\\n < 12 ; (a::32 word) \\ 0x000FFFFF \\ \\ \n (((x::32 word) && 0xFFF00000) || a) !! (n + 20) = x !! (n + 20)\"\n apply clarsimp\n apply (rule iffI)\n apply (erule disjE)\n apply clarsimp\n apply (clarsimp simp: nth_bits_false_1)\n apply clarsimp\n apply (simp only: test_bit_int_def [symmetric])\n apply (case_tac \"n = 0\")\n apply clarsimp\n apply (case_tac \"n = 1\")\n apply clarsimp\n apply (case_tac \"n = 2\")\n apply clarsimp\n apply (case_tac \"n = 3\")\n apply clarsimp\n apply (case_tac \"n = 4\")\n apply clarsimp\n apply (case_tac \"n = 5\")\n apply clarsimp\n apply (case_tac \"n = 6\")\n apply clarsimp\n apply (case_tac \"n = 7\")\n apply clarsimp\n apply (case_tac \"n = 8\")\n apply clarsimp\n apply (case_tac \"n = 9\")\n apply clarsimp\n apply (case_tac \"n = 10\")\n apply clarsimp\n apply (case_tac \"n = 11\")\n apply clarsimp\n by presburger\n\nlemma add_to_or_1:\n \"(a::32 word) \\ 0xFFFFF \\\n ((x::32 word) && 0xFFF00000) + a = (x && 0xFFF00000) || a\"\n apply word_bitwise\n apply clarsimp\n using xor3_simps carry_simps apply auto\n done\n\nlemma va_offset_higher_bits_1: \n \" \\ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20 \\ va ; \n va \\ (ucast (ucast (x >> 20):: 12 word) << 20) + 0x000FFFFF \\ \\\n (ucast (x >> 20):: 12 word) = (ucast ((va:: 32 word) >> 20)::12 word)\"\n apply (subgoal_tac \"(va::32 word) : {ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20 ..\n (ucast (ucast (x >> 20):: 12 word) << 20) + mask 20 }\")\n prefer 2\n apply (clarsimp simp: mask_def)\n apply (frule va_offset_add_1)\n apply simp\n apply (erule exE)\n apply (erule conjE)\n apply (simp add: mask_def)\n apply (subgoal_tac \"(ucast ((((ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20)::32 word) + a) >> 20):: 12 word) =\n (ucast (((ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20)::32 word) >> 20):: 12 word) \")\n apply clarsimp\n apply (word_bitwise) [1]\n apply (subgoal_tac \"ucast ((ucast (ucast ((x::32 word) >> 20):: 12 word)::32 word) << 20 >> 20) =\n (ucast (x >> 20) :: 12 word)\")\n prefer 2\n apply (word_bitwise) [1]\n apply simp\n apply (clarsimp simp: shift_to_mask_1 [symmetric])\n apply (rule word_eqI)\n apply (simp only: nth_ucast)\n apply clarsimp\n apply (subgoal_tac \"n < 12\")\n prefer 2\n apply word_bitwise [1]\n apply clarsimp\n apply (clarsimp simp: nth_shiftr)\n apply (clarsimp simp: mask_def)\n apply (frule_tac a = a in nth_bits_offset_equal_1) apply clarsimp\n apply (drule_tac x= x in add_to_or_1)\n apply (simp only: )\n done\n\nlemma n_bit_shift_2:\n \"\\ \\n::nat. n \\ {20 .. 31} \\(a::32 word) !! n = (b::32 word) !! n \\ \\ a >> 20 = b >> 20\"\n apply word_bitwise\n by auto\n\n\nlemma nth_bits_offset_1: \"\\ n \\ {20..31} ; (a::32 word) \\ 0x000FFFFF \\ \\ \n (x::32 word) !! n = (x && 0xFFF00000 || a) !! n\"\n apply (rule iffI)\n apply (case_tac \"n = 20\")\n apply clarsimp\n apply (case_tac \"n = 21\")\n apply clarsimp\n apply (case_tac \"n = 22\")\n apply clarsimp\n apply (case_tac \"n = 23\")\n apply clarsimp\n apply (case_tac \"n = 24\")\n apply clarsimp\n apply (case_tac \"n = 25\")\n apply clarsimp\n apply (case_tac \"n = 26\")\n apply clarsimp\n apply (case_tac \"n = 27\")\n apply clarsimp\n apply (case_tac \"n = 28\")\n apply clarsimp\n apply (case_tac \"n = 29\")\n apply clarsimp\n apply (case_tac \"n = 30\")\n apply clarsimp\n apply (case_tac \"n = 31\")\n apply clarsimp\n prefer 2\n apply (case_tac \"n = 20\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 21\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 22\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 23\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 24\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 25\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 26\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 27\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 28\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 29\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 30\")\n apply word_bitwise [1] apply clarsimp\n apply (case_tac \"n = 31\")\n apply word_bitwise [1] apply clarsimp\n apply clarsimp\n apply arith\n apply clarsimp\n apply arith\ndone\n\nlemma shfit_mask_eq:\n \"\\ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20 \\ va ; \n va \\ (ucast (ucast (x >> 20):: 12 word) << 20) + 0x000FFFFF \\\n \\ ((x >> 20) && mask 12 << 2) = ((va >> 20) && mask 12 << 2)\"\n apply (subgoal_tac \"(va::32 word) : {ucast (ucast ((x:: 32 word) >> 20):: 12 word) << 20 ..\n (ucast (ucast (x >> 20):: 12 word) << 20) + mask 20 }\")\n prefer 2\n apply (clarsimp simp: mask_def)\n apply (frule va_offset_add_1)\n apply simp\n apply (erule exE)\n apply (erule conjE)\n apply (simp add: mask_def)\n apply (rule_tac f = \"(\\x. x && 0xFFF << 2)\" in arg_cong)\n apply (clarsimp simp: shift_to_mask_1 [symmetric])\n apply (simp add: mask_def)\n apply (rule n_bit_shift_2)\n apply (rule allI)\n apply (rule impI)\n apply (frule_tac x= x in add_to_or_1)\n apply (frule_tac x= x and a = a in nth_bits_offset_1)\n apply (simp only:)+\n done\n\n\n\n\nlemma asid_entry_range [simp, intro!]:\n \"pt_walk' a m r v \\ None \\ v \\ range_of (the (pt_walk' a m r v))\"\n apply (clarsimp simp: range_of_def pt_walk'_def Let_def split: option.splits ) \n apply (case_tac x2; clarsimp split: option.splits)\n apply (case_tac x2a; clarsimp split: option.splits)\n apply (metis (no_types, hide_lams) Addr_addr_val atLeastAtMost_iff image_iff va_12_left va_12_right)\n by (metis (no_types, hide_lams) Addr_addr_val atLeastAtMost_iff image_iff va_20_left va_20_right)\n\nlemma asid_va_entry_range_pt_entry:\n \"\\is_fault(pt_walk' a m r v) \\ \n v \\ range_of (the(pt_walk' a m r v))\"\n by (clarsimp simp: is_fault_def)\n\n\nlemma va_entry_set_pt_palk_same':\n \"\\\\is_fault (pt_walk a' m r x) ;\n va \\ range_of (the (pt_walk a' m r x))\\ \\\n pt_walk a' m r x = pt_walk a' m r va\"\n apply (simp only: pt_walk'_pt_walk [symmetric])\n apply (subgoal_tac \"x \\ range_of (the(pt_walk' a' m r x))\")\n prefer 2\n apply (clarsimp simp: asid_va_entry_range_pt_entry is_fault_def)\n apply (cases \"the (pt_walk' a' m r x)\")\n apply (simp only: )\n apply (clarsimp simp: range_of_def is_fault_def)\n apply (cases \"get_pde' m r x\" ; clarsimp simp: pt_walk'_def)\n apply (case_tac a ; clarsimp)\n apply (case_tac \"get_pte' m x3 x \" ; clarsimp)\n apply (subgoal_tac \"get_pde' m r (Addr xaa) = get_pde' m r (Addr xa)\" ; clarsimp)\n apply (subgoal_tac \"get_pte' m x3 (Addr xaa) = get_pte' m x3 (Addr xa)\" ; clarsimp)\n apply (case_tac a ; clarsimp)\n using va_offset_higher_bits apply blast\n apply (case_tac a ; clarsimp)\n apply (clarsimp simp: get_pte'_def vaddr_pt_index_def)\n apply (subgoal_tac \"(( xaa >> 12) && mask 8 << 2) =\n (( xa >> 12) && mask 8 << 2) \")\n prefer 2\n using offset_mask_eq apply force\n apply force\n apply (case_tac a ; clarsimp)\n apply (clarsimp simp: get_pde'_def vaddr_pd_index_def)\n apply (subgoal_tac \"((xaa >> 20) && mask 12 << 2) =\n ((xa >> 20) && mask 12 << 2) \")\n prefer 2\n using offset_mask_eq_1 apply force\n apply force\n apply (simp only: )\n apply (clarsimp simp: range_of_def is_fault_def)\n apply (cases \"get_pde' m r x\" ; clarsimp simp: pt_walk'_def)\n apply (case_tac a ; clarsimp)\n apply (case_tac \"get_pte' m x3 x\" ; clarsimp)\n apply (subgoal_tac \"get_pde' m r (Addr xaa) = get_pde' m r (Addr xa)\" ; clarsimp)\n apply (subgoal_tac \"get_pte' m x3 (Addr xaa) = get_pte' m x3 (Addr xa)\" ; clarsimp)\n apply (case_tac a ; clarsimp)\n apply (case_tac a ; clarsimp simp: get_pte'_def vaddr_pt_index_def)\n apply (case_tac a ; clarsimp simp: get_pde'_def vaddr_pd_index_def)\n apply (cases \"get_pde' m r x\" ; clarsimp)\n apply (subgoal_tac \"get_pde' m r (Addr xaa) = get_pde' m r (Addr xa)\" ; clarsimp)\n using va_offset_higher_bits_1 apply blast\n apply (clarsimp simp: get_pde'_def vaddr_pd_index_def)\n apply (subgoal_tac \"((xaa >> 20) && mask 12 << 2) = ((xa >> 20) && mask 12 << 2)\")\n apply force\n using shfit_mask_eq by force\n\n\nend\n", "meta": {"author": "SEL4PROJ", "repo": "tlb", "sha": "88bb017dd96c3830baed93ba62e45b45050d1417", "save_path": "github-repos/isabelle/SEL4PROJ-tlb", "path": "github-repos/isabelle/SEL4PROJ-tlb/tlb-88bb017dd96c3830baed93ba62e45b45050d1417/Logic/MMU_Prg_Logic.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.25683199138751883, "lm_q1q2_score": 0.13042233235303652}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(* Wellformedness of caps, kernel objects, states on the C level\n*)\n\ntheory Wellformed_C\nimports\n \"CLib.CTranslationNICTA\"\n CLevityCatch\n \"CSpec.Substitute\"\nbegin\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nabbreviation\n cte_Ptr :: \"word64 \\ cte_C ptr\" where \"cte_Ptr == Ptr\"\nabbreviation\n mdb_Ptr :: \"word64 \\ mdb_node_C ptr\" where \"mdb_Ptr == Ptr\"\nabbreviation\n cap_Ptr :: \"word64 \\ cap_C ptr\" where \"cap_Ptr == Ptr\"\nabbreviation\n tcb_Ptr :: \"word64 \\ tcb_C ptr\" where \"tcb_Ptr == Ptr\"\nabbreviation\n atcb_Ptr :: \"word64 \\ arch_tcb_C ptr\" where \"atcb_Ptr == Ptr\"\nabbreviation\n ep_Ptr :: \"word64 \\ endpoint_C ptr\" where \"ep_Ptr == Ptr\"\nabbreviation\n ntfn_Ptr :: \"word64 \\ notification_C ptr\" where \"ntfn_Ptr == Ptr\"\nabbreviation\n ap_Ptr :: \"word64 \\ asid_pool_C ptr\" where \"ap_Ptr == Ptr\"\nabbreviation\n pte_Ptr :: \"word64 \\ pte_C ptr\" where \"pte_Ptr == Ptr\"\nabbreviation\n pt_Ptr :: \"machine_word \\ (pte_C[512]) ptr\" where \"pt_Ptr == Ptr\"\n\ntype_synonym tcb_cnode_array = \"cte_C[5]\"\ntype_synonym registers_count = 35\ntype_synonym registers_array = \"machine_word[registers_count]\"\n\ntype_synonym register_idx_len = 8\ntype_synonym register_idx = \"register_idx_len word\"\ntype_synonym int_literal_len = \"32 signed\"\n\nabbreviation \"user_context_Ptr \\ Ptr :: addr \\ user_context_C ptr\"\nabbreviation \"machine_word_Ptr \\ Ptr :: addr \\ machine_word ptr\"\nabbreviation \"tcb_cnode_Ptr \\ Ptr :: addr \\ tcb_cnode_array ptr\"\nabbreviation \"registers_Ptr \\ Ptr :: addr \\ registers_array ptr\"\n\nlemma halt_spec:\n \"Gamma \\ {} Call halt_'proc {}\"\n apply (rule hoare_complete)\n apply (simp add: HoarePartialDef.valid_def)\n done\n\ndefinition\n isUntypedCap_C :: \"cap_CL \\ bool\" where\n \"isUntypedCap_C c \\\n case c of\n Cap_untyped_cap q \\ True\n | _ \\ False\"\n\ndefinition\n isNullCap_C :: \"cap_CL \\ bool\" where\n \"isNullCap_C c \\\n case c of\n Cap_null_cap \\ True\n | _ \\ False\"\n\ndefinition\n isEndpointCap_C :: \"cap_CL \\ bool\" where\n \"isEndpointCap_C v \\ case v of\n Cap_endpoint_cap ec \\ True\n | _ \\ False\"\n\ndefinition\n isCNodeCap_C :: \"cap_CL \\ bool\" where\n \"isCNodeCap_C c \\ case c of\n Cap_cnode_cap a \\ True\n | _ \\ False\"\n\n\ndefinition\n isThreadCap_C :: \"cap_CL \\ bool\" where\n \"isThreadCap_C c \\ case c of\n Cap_thread_cap a \\ True\n | _ \\ False\"\n\ndefinition\n isIRQControlCap_C :: \"cap_CL \\ bool\" where\n \"isIRQControlCap_C c \\ case c of\n Cap_irq_control_cap \\ True\n | _ \\ False\"\n\ndefinition\n isIRQHandlerCap_C :: \"cap_CL \\ bool\" where\n \"isIRQHandlerCap_C c \\ case c of\n Cap_irq_handler_cap a \\ True\n | _ \\ False\"\n\ndefinition\n isNotificationCap_C :: \"cap_CL \\ bool\" where\n \"isNotificationCap_C v \\ case v of\n Cap_notification_cap aec \\ True\n | _ \\ False\"\n\ndefinition\n ep_at_C' :: \"word64 \\ heap_raw_state \\ bool\"\nwhere\n \"ep_at_C' p h \\ Ptr p \\ dom (clift h :: endpoint_C typ_heap)\" \\ \\endpoint_lift is total\\\n\ndefinition\n ntfn_at_C' :: \"word64 \\ heap_raw_state \\ bool\"\n where \\ \\notification_lift is total\\\n \"ntfn_at_C' p h \\ Ptr p \\ dom (clift h :: notification_C typ_heap)\"\n\ndefinition\n tcb_at_C' :: \"word64 \\ heap_raw_state \\ bool\"\n where\n \"tcb_at_C' p h \\ Ptr p \\ dom (clift h :: tcb_C typ_heap)\"\n\ndefinition\n cte_at_C' :: \"word64 \\ heap_raw_state \\ bool\"\n where\n \"cte_at_C' p h \\ Ptr p \\ dom (clift h :: cte_C typ_heap)\"\n\ndefinition\n ctcb_ptr_to_tcb_ptr :: \"tcb_C ptr \\ word64\"\n where\n \"ctcb_ptr_to_tcb_ptr p \\ ptr_val p - ctcb_offset\"\n\ndefinition\n tcb_ptr_to_ctcb_ptr :: \"word64 \\ tcb_C ptr\"\n where\n \"tcb_ptr_to_ctcb_ptr p \\ Ptr (p + ctcb_offset)\"\n\nprimrec\n tcb_queue_relation :: \"(tcb_C \\ tcb_C ptr) \\ (tcb_C \\ tcb_C ptr) \\\n (tcb_C ptr \\ tcb_C option) \\ word64 list \\\n tcb_C ptr \\ tcb_C ptr \\ bool\"\nwhere\n \"tcb_queue_relation getNext getPrev hp [] qprev qhead = (qhead = NULL)\"\n| \"tcb_queue_relation getNext getPrev hp (x#xs) qprev qhead =\n (qhead = tcb_ptr_to_ctcb_ptr x \\\n (\\tcb. (hp qhead = Some tcb \\ getPrev tcb = qprev \\ tcb_queue_relation getNext getPrev hp xs qhead (getNext tcb))))\"\n\nabbreviation\n \"ep_queue_relation \\ tcb_queue_relation tcbEPNext_C tcbEPPrev_C\"\n\nabbreviation\n \"sched_queue_relation \\ tcb_queue_relation tcbSchedNext_C tcbSchedPrev_C\"\n\n\ndefinition\nwordSizeCase :: \"'a \\ 'a \\ 'a\" where\n\"wordSizeCase a b \\ (if bitSize (undefined::machine_word) = 32\n then a\n else if bitSize (undefined::machine_word) = 64\n then b\n else error []\n )\"\n\n\nprimrec\n capBits_C :: \"cap_CL \\ nat\"\nwhere\n \"capBits_C Cap_null_cap = 0\"\n| \"capBits_C (Cap_untyped_cap uc) = unat (capBlockSize_CL uc)\"\n| \"capBits_C (Cap_endpoint_cap ec) = wordSizeCase 4 5\"\n| \"capBits_C (Cap_notification_cap aec) = wordSizeCase 4 5\"\n| \"capBits_C (Cap_cnode_cap cnc) = wordSizeCase 4 5\"\n| \"capBits_C (Cap_thread_cap tc) = 10\"\n| \"capBits_C (Cap_zombie_cap zc) = (wordSizeCase 4 5)\"\n\ndefinition\ncapUntypedPtr_C :: \"cap_CL \\ word64\" where\n \"capUntypedPtr_C cap \\ case cap of\n (Cap_untyped_cap uc) \\ (capBlockSize_CL uc)\n | Cap_endpoint_cap ep \\ (capEPPtr_CL ep)\n | Cap_notification_cap ntfn \\ (capNtfnPtr_CL ntfn)\n | Cap_cnode_cap ccap \\ (capCNodePtr_CL ccap)\n | Cap_reply_cap rc \\ (cap_reply_cap_CL.capTCBPtr_CL rc)\n | Cap_thread_cap tc \\ (cap_thread_cap_CL.capTCBPtr_CL tc)\n | Cap_frame_cap fc \\ (cap_frame_cap_CL.capFBasePtr_CL fc)\n | Cap_page_table_cap ptc \\ (cap_page_table_cap_CL.capPTBasePtr_CL ptc)\n | _ \\ error []\"\n\ndefinition ZombieTCB_C_def:\n\"ZombieTCB_C \\ bit 6\" (*wordRadix*)\n\ndefinition\n isZombieTCB_C :: \"word64 \\ bool\" where\n \"isZombieTCB_C v \\ v = ZombieTCB_C\"\n\ndefinition\nvmrights_to_H :: \"word64 \\ vmrights\" where\n\"vmrights_to_H c \\\n if c = scast Kernel_C.VMReadWrite then VMReadWrite\n else if c = scast Kernel_C.VMReadOnly then VMReadOnly\n else VMKernelOnly\"\n\n(* Force clarity over name collisions *)\nabbreviation\n RISCVSmallPage :: \"vmpage_size\" where\n \"RISCVSmallPage == RISCV64.RISCVSmallPage\"\nabbreviation\n RISCVLargePage :: \"vmpage_size\" where\n \"RISCVLargePage == RISCV64.RISCVLargePage\"\nabbreviation\n RISCVHugePage :: \"vmpage_size\" where\n \"RISCVHugePage == RISCV64.RISCVHugePage\"\n\ndefinition\n framesize_to_H :: \"machine_word \\ vmpage_size\"\nwhere\n \"framesize_to_H c \\\n if c = scast Kernel_C.RISCV_4K_Page then RISCVSmallPage\n else if c = scast Kernel_C.RISCV_Mega_Page then RISCVLargePage\n else RISCVHugePage\" (* for 39-bit address space; 48-bit adds another size *)\n\ndefinition\n framesize_from_H :: \"vmpage_size \\ machine_word\"\nwhere\n \"framesize_from_H sz \\\n case sz of\n RISCVSmallPage \\ scast Kernel_C.RISCV_4K_Page\n | RISCVLargePage \\ scast Kernel_C.RISCV_Mega_Page\n | RISCVHugePage \\ scast Kernel_C.RISCV_Giga_Page\"\n\nlemmas framesize_defs = Kernel_C.RISCV_4K_Page_def Kernel_C.RISCV_Mega_Page_def\n Kernel_C.RISCV_Giga_Page_def\n\nlemma framesize_from_to_H:\n \"framesize_to_H (framesize_from_H sz) = sz\"\n by (simp add: framesize_to_H_def framesize_from_H_def framesize_defs\n split: if_split vmpage_size.splits)\n\nlemma framesize_from_H_eq:\n \"(framesize_from_H sz = framesize_from_H sz') = (sz = sz')\"\n by (cases sz; cases sz';\n simp add: framesize_from_H_def framesize_defs)\n\nend\n\nrecord cte_CL =\n cap_CL :: cap_CL\n cteMDBNode_CL :: mdb_node_CL\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n cte_lift :: \"cte_C \\ cte_CL\"\n where\n \"cte_lift c \\ case cap_lift (cte_C.cap_C c) of\n None \\ None\n | Some cap \\ Some \\ cap_CL = cap,\n cteMDBNode_CL = mdb_node_lift (cteMDBNode_C c) \\\"\n\nlemma to_bool_false [simp]: \"\\ to_bool false\"\n by (simp add: to_bool_def false_def)\n\n(* this is slightly weird, but the bitfield generator\n masks everything with the expected bit length.\n So we do that here too. *)\ndefinition\n to_bool_bf :: \"'a::len word \\ bool\" where\n \"to_bool_bf w \\ (w && mask 1) = 1\"\n\nlemma to_bool_bf_mask1 [simp]:\n \"to_bool_bf (mask (Suc 0))\"\n by (simp add: mask_def to_bool_bf_def)\n\nlemma to_bool_bf_0 [simp]: \"\\to_bool_bf 0\"\n by (simp add: to_bool_bf_def)\n\nlemma to_bool_bf_1 [simp]: \"to_bool_bf 1\"\n by (simp add: to_bool_bf_def mask_def)\n\nlemma to_bool_bf_false [simp]:\n \"\\to_bool_bf false\"\n by (simp add: false_def)\n\nlemma to_bool_bf_true [simp]:\n \"to_bool_bf true\"\n by (simp add: true_def)\n\nlemma to_bool_to_bool_bf:\n \"w = false \\ w = true \\ to_bool_bf w = to_bool w\"\n by (auto simp: false_def true_def to_bool_def to_bool_bf_def mask_def)\n\nlemma to_bool_bf_mask_1 [simp]:\n \"to_bool_bf (w && mask (Suc 0)) = to_bool_bf w\"\n by (simp add: to_bool_bf_def)\n\nlemma to_bool_bf_and [simp]:\n \"to_bool_bf (a && b) = (to_bool_bf a \\ to_bool_bf (b::word64))\"\n apply (clarsimp simp: to_bool_bf_def)\n apply (rule iffI)\n apply (subst (asm) bang_eq)\n apply (simp add: word_size)\n apply (rule conjI)\n apply (rule word_eqI)\n apply (auto simp add: word_size)[1]\n apply (rule word_eqI)\n apply (auto simp add: word_size)[1]\n apply clarsimp\n apply (rule word_eqI)\n apply (subst (asm) bang_eq)+\n apply (auto simp add: word_size)[1]\n done\n\nlemma to_bool_bf_to_bool_mask:\n \"w && mask (Suc 0) = w \\ to_bool_bf w = to_bool (w::word64)\"\n by (metis mask_Suc_0 bool_mask mask_1 to_bool_0 to_bool_1 to_bool_bf_def word_gt_0)\n\ndefinition\n mdb_node_to_H :: \"mdb_node_CL \\ mdbnode\"\n where\n \"mdb_node_to_H n \\ MDB (mdbNext_CL n)\n (mdbPrev_CL n)\n (to_bool (mdbRevocable_CL n))\n (to_bool (mdbFirstBadged_CL n))\"\n\n\ndefinition\ncap_to_H :: \"cap_CL \\ capability\"\nwhere\n\"cap_to_H c \\ case c of\n Cap_null_cap \\ NullCap\n | Cap_zombie_cap zc \\ (if isZombieTCB_C(capZombieType_CL zc)\n then\n (Zombie ((capZombieID_CL zc) && ~~(mask(5)))\n (ZombieTCB)\n (unat ((capZombieID_CL zc) && mask(5))))\n else let radix = unat (capZombieType_CL zc) in\n (Zombie ((capZombieID_CL zc) && ~~(mask (radix+1)))\n (ZombieCNode radix)\n (unat ((capZombieID_CL zc) && mask(radix+1)))))\n | Cap_cnode_cap ccap \\\n CNodeCap (capCNodePtr_CL ccap) (unat (capCNodeRadix_CL ccap))\n (capCNodeGuard_CL ccap)\n (unat (capCNodeGuardSize_CL ccap))\n | Cap_untyped_cap uc \\ UntypedCap (to_bool(capIsDevice_CL uc)) (capPtr_CL uc) (unat (capBlockSize_CL uc)) (unat (capFreeIndex_CL uc << 4))\n | Cap_endpoint_cap ec \\\n EndpointCap (capEPPtr_CL ec) (capEPBadge_CL ec) (to_bool(capCanSend_CL ec)) (to_bool(capCanReceive_CL ec))\n (to_bool(capCanGrant_CL ec)) (to_bool(capCanGrantReply_CL ec))\n | Cap_notification_cap ntfn \\\n NotificationCap (capNtfnPtr_CL ntfn)(capNtfnBadge_CL ntfn)(to_bool(capNtfnCanSend_CL ntfn))\n (to_bool(capNtfnCanReceive_CL ntfn))\n | Cap_reply_cap rc \\ ReplyCap (ctcb_ptr_to_tcb_ptr (Ptr (cap_reply_cap_CL.capTCBPtr_CL rc)))\n (to_bool (capReplyMaster_CL rc)) (to_bool (capReplyCanGrant_CL rc))\n | Cap_thread_cap tc \\ ThreadCap(ctcb_ptr_to_tcb_ptr (Ptr (cap_thread_cap_CL.capTCBPtr_CL tc)))\n | Cap_irq_handler_cap ihc \\ IRQHandlerCap (ucast(capIRQ_CL ihc))\n | Cap_irq_control_cap \\ IRQControlCap\n | Cap_asid_control_cap \\ ArchObjectCap ASIDControlCap\n | Cap_asid_pool_cap apc \\ ArchObjectCap (ASIDPoolCap (capASIDPool_CL apc) (capASIDBase_CL apc))\n | Cap_frame_cap fc \\ ArchObjectCap (FrameCap (capFBasePtr_CL fc)\n (vmrights_to_H(capFVMRights_CL fc))\n (framesize_to_H(capFSize_CL fc))\n (to_bool(capFIsDevice_CL fc))\n (if capFMappedASID_CL fc = 0\n then None else\n Some(capFMappedASID_CL fc, capFMappedAddress_CL fc)))\n | Cap_page_table_cap ptc \\ ArchObjectCap (PageTableCap (cap_page_table_cap_CL.capPTBasePtr_CL ptc)\n (if to_bool (cap_page_table_cap_CL.capPTIsMapped_CL ptc)\n then Some( ((cap_page_table_cap_CL.capPTMappedASID_CL ptc)),(cap_page_table_cap_CL.capPTMappedAddress_CL ptc))\n else None))\n | Cap_domain_cap \\ DomainCap\"\n\nlemmas cap_to_H_simps = cap_to_H_def[split_simps cap_CL.split]\n\ndefinition\n cte_to_H :: \"cte_CL \\ cte\"\n where\n \"cte_to_H cte \\ CTE (cap_to_H (cap_CL cte)) (mdb_node_to_H (cteMDBNode_CL cte))\"\n\n\ndefinition\ncl_valid_cap :: \"cap_CL \\ bool\"\nwhere\n\"cl_valid_cap c \\\n case c of\n Cap_irq_handler_cap fc \\ ((capIRQ_CL fc) && mask 6 = capIRQ_CL fc)\n | Cap_frame_cap fc \\ capFSize_CL fc < 3 \\ capFVMRights_CL fc < 4 \\ capFVMRights_CL fc \\ 0\n | x \\ True\"\n\ndefinition\nc_valid_cap :: \"cap_C \\ bool\"\nwhere\n\"c_valid_cap c \\ case_option True cl_valid_cap (cap_lift c)\"\n\n\ndefinition\ncl_valid_cte :: \"cte_CL \\ bool\"\nwhere\n\"cl_valid_cte c \\ cl_valid_cap (cap_CL c)\"\n\n\ndefinition\nc_valid_cte :: \"cte_C \\ bool\"\nwhere\n\"c_valid_cte c \\ c_valid_cap (cte_C.cap_C c)\"\n\n(* all uninteresting cases can be deduced from the cap tag *)\nlemma c_valid_cap_simps [simp]:\n \"cap_get_tag c = scast cap_thread_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_notification_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_endpoint_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_cnode_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_asid_control_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_irq_control_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_page_table_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_asid_pool_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_untyped_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_zombie_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_reply_cap \\ c_valid_cap c\"\n \"cap_get_tag c = scast cap_null_cap \\ c_valid_cap c\"\n unfolding c_valid_cap_def cap_lift_def cap_tag_defs\n by (simp add: cl_valid_cap_def)+\n\nlemma ptr_val_tcb_ptr_mask2:\n \"is_aligned thread tcbBlockSizeBits\n \\ ptr_val (tcb_ptr_to_ctcb_ptr thread) && (~~ mask tcbBlockSizeBits)\n = thread\"\n apply (clarsimp simp: tcb_ptr_to_ctcb_ptr_def projectKOs)\n apply (simp add: is_aligned_add_helper ctcb_offset_defs objBits_simps')\n done\n\nsection \\Domains\\\n\ntext \\\n seL4's build system allows configuration of the number of domains. This means the proofs have to\n work for any number of domains provided it fits into the hard limit of a 8-bit word.\n\n In the C code, we have the enumerated constant numDomains, one greater than maxDom. In the\n abstract specs, we have the corresponding Platform_Config.numDomains and maxDomain.\n\n To keep the proofs as general as possible, we avoid unfolding definitions of:\n maxDom, maxDomain, numDomains except in this theory where we need to establish basic properties.\n\n Unfortunately, array bounds checks coming from the C code use numerical values, meaning we might\n get 0x10 instead of the number of domains, or 0x1000 for numDomains * numPriorities. To solve\n these, the \"explicit\" lemmas expose direct numbers. They are more risky to deploy, as one could\n prove that 0x5 is less than the number of domains when that's the case, and then the proof will\n break upon reconfiguration.\n\\\n\ntext \\The @{text num_domains} enumerated type and constant represent the number of domains.\\\n\nvalue_type num_domains = \"numDomains\"\n\ncontext includes no_less_1_simps begin\n\n(* The proofs expect the minimum priority and minimum domain to be zero.\n Note that minDom is unused in the C code. *)\nlemma min_prio_dom_sanity:\n \"seL4_MinPrio = 0\"\n \"Kernel_C.minDom = 0\"\n by (auto simp: seL4_MinPrio_def minDom_def)\n\nlemma less_numDomains_is_domain[simplified word_size, simplified]:\n \"x < numDomains \\ x < 2 ^ size (y::domain)\"\n unfolding Kernel_Config.numDomains_def\n by (simp add: word_size)\n\nlemma sint_numDomains_to_H:\n \"sint Kernel_C.numDomains = int Kernel_Config.numDomains\"\n by (clarsimp simp: Kernel_C.numDomains_def Kernel_Config.numDomains_def)\n\nlemma unat_numDomains_to_H:\n \"unat Kernel_C.numDomains = Kernel_Config.numDomains\"\n by (clarsimp simp: Kernel_C.numDomains_def Kernel_Config.numDomains_def)\n\nlemma maxDom_to_H:\n \"ucast maxDom = maxDomain\"\n by (simp add: maxDomain_def Kernel_C.maxDom_def Kernel_Config.numDomains_def)\n\nlemma maxDom_sgt_0_maxDomain:\n \"0 0 < maxDomain\"\n unfolding Kernel_C.maxDom_def maxDomain_def Kernel_Config.numDomains_def\n by clarsimp\n\nlemma num_domains_calculation:\n \"num_domains = numDomains\"\n unfolding num_domains_def by eval\n\nprivate lemma num_domains_card_explicit:\n \"num_domains = CARD(num_domains)\"\n by (simp add: num_domains_def)\n\nlemmas num_domains_index_updates =\n index_update[where 'b=num_domains, folded num_domains_card_explicit num_domains_def,\n simplified num_domains_calculation]\n index_update2[where 'b=num_domains, folded num_domains_card_explicit num_domains_def,\n simplified num_domains_calculation]\n\n(* C ArrayGuards will throw these at us and there is no way to avoid a proof of being less than a\n specific number expressed as a word, so we must introduce these. However, being explicit means\n lack of discipline can lead to a violation. *)\nlemma numDomains_less_numeric_explicit[simplified num_domains_def One_nat_def]:\n \"x < Kernel_Config.numDomains \\ x < num_domains\"\n by (simp add: num_domains_calculation)\n\nlemma numDomains_less_unat_ucast_explicit[simplified num_domains_def]:\n \"unat x < Kernel_Config.numDomains \\ (ucast (x::domain) :: machine_word) < of_nat num_domains\"\n apply (rule word_less_nat_alt[THEN iffD2])\n apply transfer\n apply simp\n apply (drule numDomains_less_numeric_explicit, simp add: num_domains_def)\n done\n\nlemmas maxDomain_le_unat_ucast_explicit =\n numDomains_less_unat_ucast_explicit[simplified le_maxDomain_eq_less_numDomains(2)[symmetric],\n simplified]\n\nend (* numDomain abstraction definitions and lemmas *)\n\n\ntext \\Priorities - not expected to be configurable\\\n\nlemma maxPrio_to_H:\n \"ucast seL4_MaxPrio = maxPriority\"\n by (simp add: maxPriority_def seL4_MaxPrio_def numPriorities_def)\n\n\ntext \\TCB scheduling queues\\\n\n(* establish and sanity-check relationship between the calculation of the number of TCB queues and\n the size of the array in C *)\nvalue_type num_tcb_queues = \"numDomains * numPriorities\"\n\nlemma num_tcb_queues_calculation:\n \"num_tcb_queues = numDomains * numPriorities\"\n unfolding num_tcb_queues_def by eval\n\n\n(* Input abbreviations for API object types *)\n(* disambiguates names *)\n\nabbreviation(input)\n NotificationObject :: sword32\nwhere\n \"NotificationObject == seL4_NotificationObject\"\n\nabbreviation(input)\n CapTableObject :: sword32\nwhere\n \"CapTableObject == seL4_CapTableObject\"\n\nabbreviation(input)\n EndpointObject :: sword32\nwhere\n \"EndpointObject == seL4_EndpointObject\"\n\nabbreviation(input)\n PageTableObject :: sword32\nwhere\n \"PageTableObject == seL4_RISCV_PageTableObject\"\n\nabbreviation(input)\n SmallPageObject :: sword32\nwhere\n \"SmallPageObject == seL4_RISCV_4K_Page\"\n\nabbreviation(input)\n LargePageObject :: sword32\nwhere\n \"LargePageObject == seL4_RISCV_Mega_Page\"\n\nabbreviation(input)\n HugePageObject :: sword32\nwhere\n \"HugePageObject == seL4_RISCV_Giga_Page\"\n\nabbreviation(input)\n TCBObject :: sword32\nwhere\n \"TCBObject == seL4_TCBObject\"\n\nabbreviation(input)\n UntypedObject :: sword32\nwhere\n \"UntypedObject == seL4_UntypedObject\"\n\nabbreviation(input)\n maxPrio :: sword32\nwhere\n \"maxPrio == seL4_MaxPrio\"\n\nabbreviation(input)\n minPrio :: sword32\nwhere\n \"minPrio == seL4_MinPrio\"\n\nabbreviation(input)\n nAPIObjects :: sword32\nwhere\n \"nAPIObjects == seL4_NonArchObjectTypeCount\"\n\nabbreviation(input)\n nObjects :: sword32\nwhere\n \"nObjects == seL4_ObjectTypeCount\"\n\nabbreviation(input)\n prioInvalid :: sword32\nwhere\n \"prioInvalid == seL4_InvalidPrio\"\n\n(* generic lemmas with arch-specific consequences *)\n\nschematic_goal size_gpRegisters:\n \"size RISCV64.gpRegisters = numeral ?x\"\n supply Suc_eq_numeral[simp del] One_nat_def[simp del]\n by (simp add: upto_enum_def fromEnum_def enum_register\n RISCV64.gpRegisters_def)\n (simp add: Suc_eq_plus1)\n\nschematic_goal size_frameRegisters:\n \"size RISCV64.frameRegisters = numeral ?x\"\n supply Suc_eq_numeral[simp del] One_nat_def[simp del]\n by (simp add: upto_enum_def fromEnum_def enum_register\n RISCV64.frameRegisters_def)\n (simp add: Suc_eq_plus1)\n\nend\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/crefine/RISCV64/Wellformed_C.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.25386099567919973, "lm_q1q2_score": 0.12990488677577888}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchScheduler_IF\nimports Scheduler_IF\n\nbegin\n\ncontext Arch begin global_naming ARM\n\nnamed_theorems Scheduler_IF_assms\n\ndefinition arch_globals_equiv_scheduler :: \"kheap \\ kheap \\ arch_state \\ arch_state \\ bool\" where\n \"arch_globals_equiv_scheduler kh kh' as as' \\\n arm_global_pd as = arm_global_pd as' \\ kh (arm_global_pd as) = kh' (arm_global_pd as)\"\n\ndefinition\n \"arch_scheduler_affects_equiv s s' \\ exclusive_state_equiv s s'\"\n\nlemma arch_globals_equiv_from_scheduler[Scheduler_IF_assms]:\n \"\\ arch_globals_equiv_scheduler (kheap s) (kheap s') (arch_state s) (arch_state s');\n cur_thread s' \\ idle_thread s \\ arch_scheduler_affects_equiv s s' \\\n \\ arch_globals_equiv (cur_thread s') (idle_thread s) (kheap s) (kheap s')\n (arch_state s) (arch_state s') (machine_state s) (machine_state s')\"\n by (clarsimp simp: arch_globals_equiv_scheduler_def arch_scheduler_affects_equiv_def)\n\nlemma arch_globals_equiv_scheduler_refl[Scheduler_IF_assms]:\n \"arch_globals_equiv_scheduler (kheap s) (kheap s) (arch_state s) (arch_state s)\"\n by (simp add: idle_equiv_refl arch_globals_equiv_scheduler_def)\n\nlemma arch_globals_equiv_scheduler_sym[Scheduler_IF_assms]:\n \"arch_globals_equiv_scheduler (kheap s) (kheap s') (arch_state s) (arch_state s')\n \\ arch_globals_equiv_scheduler (kheap s') (kheap s) (arch_state s') (arch_state s)\"\n by (auto simp: arch_globals_equiv_scheduler_def)\n\nlemma arch_globals_equiv_scheduler_trans[Scheduler_IF_assms]:\n \"\\ arch_globals_equiv_scheduler (kheap s) (kheap s') (arch_state s) (arch_state s');\n arch_globals_equiv_scheduler (kheap s') (kheap s'') (arch_state s') (arch_state s'') \\\n \\ arch_globals_equiv_scheduler (kheap s) (kheap s'') (arch_state s) (arch_state s'')\"\n by (clarsimp simp: arch_globals_equiv_scheduler_def)\n\nlemma arch_scheduler_affects_equiv_trans[Scheduler_IF_assms, elim]:\n \"\\ arch_scheduler_affects_equiv s s'; arch_scheduler_affects_equiv s' s'' \\\n \\ arch_scheduler_affects_equiv s s''\"\n by (simp add: arch_scheduler_affects_equiv_def)\n\nlemma arch_scheduler_affects_equiv_sym[Scheduler_IF_assms, elim]:\n \"arch_scheduler_affects_equiv s s' \\ arch_scheduler_affects_equiv s' s\"\n by (simp add: arch_scheduler_affects_equiv_def)\n\nlemma arch_scheduler_affects_equiv_sa_update[Scheduler_IF_assms, simp]:\n \"arch_scheduler_affects_equiv (scheduler_action_update f s) s' =\n arch_scheduler_affects_equiv s s'\"\n \"arch_scheduler_affects_equiv s (scheduler_action_update f s') =\n arch_scheduler_affects_equiv s s'\"\n by (auto simp: arch_scheduler_affects_equiv_def)\n\n\nlemma equiv_asid_cur_thread_update[Scheduler_IF_assms, simp]:\n \"equiv_asid asid (cur_thread_update f s) s' = equiv_asid asid s s'\"\n \"equiv_asid asid s (cur_thread_update f s') = equiv_asid asid s s'\"\n by (auto simp: equiv_asid_def)\n\nlemma arch_scheduler_affects_equiv_ready_queues_update[Scheduler_IF_assms, simp]:\n \"arch_scheduler_affects_equiv (ready_queues_update f s) s' = arch_scheduler_affects_equiv s s'\"\n \"arch_scheduler_affects_equiv s (ready_queues_update f s') = arch_scheduler_affects_equiv s s'\"\n by (auto simp: arch_scheduler_affects_equiv_def)\n\ncrunches arch_switch_to_thread, arch_switch_to_idle_thread\n for idle_thread[Scheduler_IF_assms, wp]: \"\\s :: det_state. P (idle_thread s)\"\n and kheap[Scheduler_IF_assms, wp]: \"\\s :: det_state. P (kheap s)\"\n (wp: crunch_wps simp: crunch_simps)\n\ncrunches arch_switch_to_idle_thread\n for cur_domain[Scheduler_IF_assms, wp]: \"\\s. P (cur_domain s)\"\n and domain_fields[Scheduler_IF_assms, wp]: \"domain_fields P\"\n\ncrunches arch_switch_to_idle_thread\n for globals_equiv[Scheduler_IF_assms, wp]: \"globals_equiv st\"\n and states_equiv_for[Scheduler_IF_assms, wp]: \"states_equiv_for P Q R S st\"\n and work_units_completed[Scheduler_IF_assms, wp]: \"\\s. P (work_units_completed s)\"\n\ncrunches arch_activate_idle_thread\n for cur_domain[Scheduler_IF_assms, wp]: \"\\s. P (cur_domain s)\"\n and idle_thread[Scheduler_IF_assms, wp]: \"\\s. P (idle_thread s)\"\n and irq_state_of_state[Scheduler_IF_assms, wp]: \"\\s. P (irq_state_of_state s)\"\n and domain_fields[Scheduler_IF_assms, wp]: \"domain_fields P\"\n\nlemma arch_scheduler_affects_equiv_cur_thread_update[Scheduler_IF_assms, simp]:\n \"arch_scheduler_affects_equiv (cur_thread_update f s) s' = arch_scheduler_affects_equiv s s'\"\n \"arch_scheduler_affects_equiv s (cur_thread_update f s') = arch_scheduler_affects_equiv s s'\"\n by (auto simp: arch_scheduler_affects_equiv_def)\n\nlemma equiv_asid_domain_time_update[Scheduler_IF_assms, simp]:\n \"equiv_asid asid (domain_time_update f s) s' = equiv_asid asid s s'\"\n \"equiv_asid asid s (domain_time_update f s') = equiv_asid asid s s'\"\n by (auto simp: equiv_asid_def)\n\nlemma equiv_asid_ekheap_update[Scheduler_IF_assms, simp]:\n \"equiv_asid asid (ekheap_update f s) s' = equiv_asid asid s s'\"\n \"equiv_asid asid s (ekheap_update f s') = equiv_asid asid s s'\"\n by (auto simp: equiv_asid_def)\n\nlemma arch_scheduler_affects_equiv_domain_time_update[Scheduler_IF_assms, simp]:\n \"arch_scheduler_affects_equiv (domain_time_update f s) s' = arch_scheduler_affects_equiv s s'\"\n \"arch_scheduler_affects_equiv s (domain_time_update f s') = arch_scheduler_affects_equiv s s'\"\n by (auto simp: arch_scheduler_affects_equiv_def)\n\nlemma arch_scheduler_affects_equiv_ekheap_update[Scheduler_IF_assms, simp]:\n \"arch_scheduler_affects_equiv (ekheap_update f s) s' = arch_scheduler_affects_equiv s s'\"\n \"arch_scheduler_affects_equiv s (ekheap_update f s') = arch_scheduler_affects_equiv s s'\"\n by (auto simp: arch_scheduler_affects_equiv_def)\n\ncrunch irq_state[Scheduler_IF_assms, wp]: ackInterrupt \"\\s. P (irq_state s)\"\n\nlemma thread_set_context_globals_equiv[Scheduler_IF_assms]:\n \"\\(\\s. t = idle_thread s \\ tc = idle_context s) and invs and globals_equiv st\\\n thread_set (tcb_arch_update (arch_tcb_context_set tc)) t\n \\\\rv. globals_equiv st\\\"\n apply (clarsimp simp: thread_set_def)\n apply (wpsimp wp: set_object_wp)\n apply (subgoal_tac \"t \\ arm_global_pd (arch_state s)\")\n apply (clarsimp simp: idle_equiv_def globals_equiv_def tcb_at_def2 get_tcb_def idle_context_def)\n apply (clarsimp split: option.splits kernel_object.splits)\n apply (drule arm_global_pd_not_tcb[OF invs_arch_state])\n apply clarsimp\n done\n\nlemma arch_scheduler_affects_equiv_update[Scheduler_IF_assms]:\n \"arch_scheduler_affects_equiv st s\n \\ arch_scheduler_affects_equiv st (s\\kheap := kheap s(x \\ TCB y')\\)\"\n by (clarsimp simp: arch_scheduler_affects_equiv_def)\n\nlemma equiv_asid_equiv_update[Scheduler_IF_assms]:\n \"\\ get_tcb x s = Some y; equiv_asid asid st s \\\n \\ equiv_asid asid st (s\\kheap := kheap s(x \\ TCB y')\\)\"\n by (clarsimp simp: equiv_asid_def obj_at_def get_tcb_def)\n\nend\n\ncontext begin interpretation Arch .\n\nrequalify_consts\n arch_globals_equiv_scheduler\n arch_scheduler_affects_equiv\n\nend\n\n\nglobal_interpretation Scheduler_IF_1?:\n Scheduler_IF_1 arch_globals_equiv_scheduler arch_scheduler_affects_equiv\nproof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact Scheduler_IF_assms)?)\nqed\n\n\ncontext Arch begin global_naming ARM\n\ndefinition swap_things where\n \"swap_things s t \\\n t\\machine_state := underlying_memory_update\n (\\m a. if a \\ scheduler_affects_globals_frame t\n then underlying_memory (machine_state s) a\n else m a)\n (machine_state t)\\exclusive_state := exclusive_state (machine_state s)\\\\\n \\cur_thread := cur_thread s\\\"\n\nlemma globals_equiv_scheduler_inv'[Scheduler_IF_assms]:\n \"(\\st. \\P and globals_equiv st\\ f \\\\_. globals_equiv st\\)\n \\ \\P and globals_equiv_scheduler s\\ f \\\\_. globals_equiv_scheduler s\\\"\n apply atomize\n apply (rule use_spec)\n apply (simp add: spec_valid_def)\n apply (erule_tac x=\"(swap_things sa s)\" in allE)\n apply (rule_tac Q=\"\\r st. globals_equiv (swap_things sa s) st\" in hoare_strengthen_post)\n apply (rule hoare_pre)\n apply assumption\n apply (clarsimp simp: globals_equiv_def swap_things_def globals_equiv_scheduler_def\n arch_globals_equiv_scheduler_def arch_scheduler_affects_equiv_def)+\n done\n\nlemma clearExMonitor_globals_equiv_scheduler[wp]:\n \"do_machine_op clearExMonitor \\globals_equiv_scheduler sta\\\"\n unfolding clearExMonitor_def including no_pre\n apply (wp dmo_no_mem_globals_equiv_scheduler)\n apply simp\n apply (simp add: simpler_modify_def valid_def)\n done\n\nlemma arch_switch_to_thread_globals_equiv_scheduler[Scheduler_IF_assms]:\n \"\\invs and globals_equiv_scheduler sta\\\n arch_switch_to_thread thread\n \\\\_. globals_equiv_scheduler sta\\\"\n unfolding arch_switch_to_thread_def storeWord_def\n by (wpsimp wp: clearExMonitor_globals_equiv_scheduler dmo_wp modify_wp thread_get_wp'\n | wp (once) globals_equiv_scheduler_inv'[where P=\"\\\"])+\n\ncrunches arch_activate_idle_thread\n for silc_dom_equiv[Scheduler_IF_assms, wp]: \"silc_dom_equiv aag st\"\n and scheduler_affects_equiv[Scheduler_IF_assms, wp]: \"scheduler_affects_equiv aag l st\"\n\nlemma dmo_mol_exclusive_state[wp]:\n \"do_machine_op (machine_op_lift mop) \\\\s. P (exclusive_state (machine_state s))\\\"\n by (wp mol_exclusive_state dmo_wp\n | simp add: split_def dmo_bind_valid writeTTBR0_def isb_def dsb_def)+\n\ncrunch exclusive_state[wp]: set_vm_root \"\\s. P (exclusive_state (machine_state s))\"\n (ignore: do_machine_op\n simp: invalidateLocalTLB_ASID_def setHardwareASID_def set_current_pd_def dsb_def isb_def\n writeTTBR0_def dmo_bind_valid crunch_simps)\n\nlemma set_vm_root_arch_scheduler_affects_equiv[wp]:\n \"set_vm_root tcb \\arch_scheduler_affects_equiv st\\\"\n unfolding arch_scheduler_affects_equiv_def by wpsimp\n\nlemmas set_vm_root_scheduler_affects_equiv[wp] =\n scheduler_affects_equiv_unobservable[OF set_vm_root_states_equiv_for\n set_vm_root_exst _ _ _ set_vm_root_it\n set_vm_root_arch_scheduler_affects_equiv]\n\nlemma set_vm_root_reads_respects_scheduler[wp]:\n \"reads_respects_scheduler aag l \\ (set_vm_root thread)\"\n apply (rule reads_respects_scheduler_unobservable'[OF scheduler_equiv_lift'\n [OF globals_equiv_scheduler_inv']])\n apply (wp silc_dom_equiv_states_equiv_lift set_vm_root_states_equiv_for | simp)+\n done\n\nlemma ev_asahi_to_asahi_ex_dmo_clearExMonitor:\n \"equiv_valid (scheduler_equiv aag) (midstrength_scheduler_affects_equiv aag l)\n (asahi_ex_scheduler_affects_equiv aag l) \\ (do_machine_op clearExMonitor)\"\n apply (simp add: clearExMonitor_def)\n apply (wp dmo_ev)\n apply (rule ev_modify)\n apply clarsimp\n apply (rule conjI)\n apply (clarsimp simp: scheduler_equiv_def domain_fields_equiv_def globals_equiv_scheduler_def\n silc_dom_equiv_def equiv_for_def)\n apply (clarsimp simp: midstrength_scheduler_affects_equiv_def asahi_scheduler_affects_equiv_def\n asahi_ex_scheduler_affects_equiv_def states_equiv_for_def equiv_for_def\n arch_scheduler_affects_equiv_def equiv_asids_def equiv_asid_def\n scheduler_globals_frame_equiv_def\n simp del: split_paired_All)\n done\n\nlemma store_cur_thread_fragment_midstrength_reads_respects:\n \"equiv_valid (scheduler_equiv aag) (midstrength_scheduler_affects_equiv aag l)\n (scheduler_affects_equiv aag l) invs\n (do y \\ do_machine_op clearExMonitor;\n x \\ modify (cur_thread_update (\\_. t));\n set_scheduler_action resume_cur_thread\n od)\"\n apply (rule equiv_valid_guard_imp)\n apply (rule bind_ev_general[OF ev_asahi_ex_to_full_fragement])\n apply (rule ev_asahi_to_asahi_ex_dmo_clearExMonitor)\n apply wp\n apply simp\n done\n\nlemma arch_switch_to_thread_globals_equiv_scheduler':\n \"\\invs and globals_equiv_scheduler sta\\\n set_vm_root t\n \\\\_. globals_equiv_scheduler sta\\\"\n by (rule globals_equiv_scheduler_inv', wpsimp)\n\nlemma reads_respects_scheduler_clearExMonitor[wp]:\n \"reads_respects_scheduler aag l \\ (do_machine_op clearExMonitor)\"\n apply (simp add: clearExMonitor_def)\n apply (wp dmo_ev)\n apply (rule ev_modify)\n apply clarsimp\n apply (rule conjI)\n apply (clarsimp simp: scheduler_equiv_def domain_fields_equiv_def globals_equiv_scheduler_def\n silc_dom_equiv_def equiv_for_def)\n apply (clarsimp simp: scheduler_affects_equiv_def arch_scheduler_affects_equiv_def\n states_equiv_for_def equiv_for_def equiv_asids_def equiv_asid_def\n scheduler_globals_frame_equiv_def\n simp del: split_paired_All)\n done\n\nlemma arch_switch_to_thread_reads_respects_scheduler[wp]:\n \"reads_respects_scheduler aag l\n ((\\s. pasObjectAbs aag t \\ pasDomainAbs aag (cur_domain s)) and invs)\n (arch_switch_to_thread t)\"\n apply (rule reads_respects_scheduler_cases)\n apply (simp add: arch_switch_to_thread_def)\n apply wp\n apply (clarsimp simp: scheduler_equiv_def globals_equiv_scheduler_def)\n apply (simp add: arch_switch_to_thread_def)\n apply wp\n apply simp\n done\n\nlemmas globals_equiv_scheduler_inv = globals_equiv_scheduler_inv'[where P=\"\\\",simplified]\n\nlemma arch_switch_to_thread_midstrength_reads_respects_scheduler[Scheduler_IF_assms, wp]:\n assumes domains_distinct[wp]: \"pas_domains_distinct aag\"\n shows \"midstrength_reads_respects_scheduler aag l\n (invs and pas_refined aag and (\\s. pasObjectAbs aag t \\ pasDomainAbs aag (cur_domain s)))\n (do _ <- arch_switch_to_thread t;\n _ <- modify (cur_thread_update (\\_. t));\n modify (scheduler_action_update (\\_. resume_cur_thread))\n od)\"\n apply (rule equiv_valid_guard_imp)\n apply (rule midstrength_reads_respects_scheduler_cases[\n where Q=\"(invs and pas_refined aag and\n (\\s. pasObjectAbs aag t \\ pasDomainAbs aag (cur_domain s)))\",\n OF domains_distinct])\n apply (simp add: arch_switch_to_thread_def bind_assoc)\n apply (rule bind_ev_general)\n apply (fold set_scheduler_action_def)\n apply (rule store_cur_thread_fragment_midstrength_reads_respects)\n apply (rule_tac P=\"\\\" and P'=\"\\\" in equiv_valid_inv_unobservable)\n apply (rule hoare_pre)\n apply (rule scheduler_equiv_lift'[where P=\\])\n apply (wp globals_equiv_scheduler_inv silc_dom_lift | simp)+\n apply (wp midstrength_scheduler_affects_equiv_unobservable set_vm_root_states_equiv_for\n | simp)+\n apply (wp cur_thread_update_not_subject_reads_respects_scheduler | simp | fastforce)+\n done\n\nlemma arch_switch_to_idle_thread_globals_equiv_scheduler[Scheduler_IF_assms, wp]:\n \"\\invs and globals_equiv_scheduler sta\\\n arch_switch_to_idle_thread\n \\\\_. globals_equiv_scheduler sta\\\"\n unfolding arch_switch_to_idle_thread_def storeWord_def\n by (wp dmo_wp modify_wp thread_get_wp' arch_switch_to_thread_globals_equiv_scheduler')\n\nlemma arch_switch_to_idle_thread_unobservable[Scheduler_IF_assms]:\n \"\\(\\s. pasDomainAbs aag (cur_domain s) \\ reads_scheduler aag l = {}) and\n scheduler_affects_equiv aag l st and (\\s. cur_domain st = cur_domain s) and invs\\\n arch_switch_to_idle_thread\n \\\\_ s. scheduler_affects_equiv aag l st s\\\"\n apply (simp add: arch_switch_to_idle_thread_def)\n apply wp\n apply (clarsimp simp add: scheduler_equiv_def domain_fields_equiv_def invs_def valid_state_def)\n done\n\nlemma clearExMonitor_unobservable:\n \"\\(\\s. pasDomainAbs aag (cur_domain s) \\ reads_scheduler aag l = {}) and\n scheduler_affects_equiv aag l st and (\\s. cur_domain s = cur_domain st)\\\n do_machine_op clearExMonitor\n \\\\_. scheduler_affects_equiv aag l st\\\"\n apply (simp add: clearExMonitor_def)\n apply (rule hoare_pre)\n apply (wp dmo_wp modify_wp)\n apply (auto simp: states_equiv_for_def scheduler_affects_equiv_def equiv_for_def equiv_asids_def\n equiv_asid_def scheduler_globals_frame_equiv_def silc_dom_equiv_def)\n done\n\nlemma arch_switch_to_thread_unobservable[Scheduler_IF_assms]:\n \"\\(\\s. \\ reads_scheduler_cur_domain aag l s) and\n scheduler_affects_equiv aag l st and (\\s. cur_domain st = cur_domain s) and invs\\\n arch_switch_to_thread t\n \\\\_ s. scheduler_affects_equiv aag l st s\\\"\n apply (simp add: arch_switch_to_thread_def)\n apply (wp set_vm_root_scheduler_affects_equiv clearExMonitor_unobservable | simp)+\n done\n\n(* Can split, but probably more effort to generalise *)\nlemma next_domain_midstrength_equiv_scheduler[Scheduler_IF_assms]:\n \"equiv_valid (scheduler_equiv aag) (weak_scheduler_affects_equiv aag l)\n (midstrength_scheduler_affects_equiv aag l) \\ next_domain\"\n apply (simp add: next_domain_def)\n apply (rule ev_modify)\n apply (clarsimp simp: equiv_for_def equiv_asid_def equiv_asids_def Let_def scheduler_equiv_def\n globals_equiv_scheduler_def silc_dom_equiv_def domain_fields_equiv_def\n weak_scheduler_affects_equiv_def midstrength_scheduler_affects_equiv_def\n states_equiv_for_def idle_equiv_def)\n done\n\nlemma resetTimer_exclusive_state[wp]:\n \"resetTimer \\\\s. P (exclusive_state s)\\\"\n by (wpsimp simp: resetTimer_def wp: mol_exclusive_state)\n\nlemma resetTimer_irq_state[wp]:\n \"resetTimer \\\\s. P (irq_state s)\\\"\n apply (simp add: resetTimer_def machine_op_lift_def machine_rest_lift_def)\n apply (wp | wpc| simp)+\n done\n\nlemma dmo_resetTimer_reads_respects_scheduler[Scheduler_IF_assms]:\n \"reads_respects_scheduler aag l \\ (do_machine_op resetTimer)\"\n apply (rule reads_respects_scheduler_unobservable)\n apply (rule scheduler_equiv_lift)\n apply (simp add: globals_equiv_scheduler_def[abs_def] idle_equiv_def)\n apply (wpsimp wp: dmo_wp)\n apply ((wp silc_dom_lift dmo_wp | simp)+)[5]\n apply (rule scheduler_affects_equiv_unobservable)\n apply (simp add: states_equiv_for_def[abs_def] equiv_for_def equiv_asids_def equiv_asid_def)\n apply (rule hoare_pre)\n apply (wp | simp add: arch_scheduler_affects_equiv_def | wp dmo_wp)+\n done\n\nlemma ackInterrupt_reads_respects_scheduler[Scheduler_IF_assms]:\n \"reads_respects_scheduler aag l \\ (do_machine_op (ackInterrupt irq))\"\n apply (rule reads_respects_scheduler_unobservable)\n apply (rule scheduler_equiv_lift)\n apply (simp add: globals_equiv_scheduler_def[abs_def] idle_equiv_def)\n apply (rule hoare_pre)\n apply wps\n apply (wp dmo_wp ackInterrupt_irq_masks | simp add:no_irq_def)+\n apply clarsimp\n apply ((wp silc_dom_lift dmo_wp | simp)+)[5]\n apply (rule scheduler_affects_equiv_unobservable)\n apply (simp add: states_equiv_for_def[abs_def] equiv_for_def equiv_asids_def equiv_asid_def)\n apply (rule hoare_pre)\n apply wps\n apply (wp dmo_wp | simp add: arch_scheduler_affects_equiv_def ackInterrupt_def)+\n apply (wp mol_exclusive_state)\n apply (simp add: arch_scheduler_affects_equiv_def)\n done\n\nlemma thread_set_scheduler_affects_equiv[Scheduler_IF_assms, wp]:\n \"\\(\\s. x \\ idle_thread s \\ pasObjectAbs aag x \\ reads_scheduler aag l) and\n (\\s. x = idle_thread s \\ tc = idle_context s) and scheduler_affects_equiv aag l st\\\n thread_set (tcb_arch_update (arch_tcb_context_set tc)) x\n \\\\_. scheduler_affects_equiv aag l st\\\"\n apply (simp add: thread_set_def)\n apply (wp set_object_wp)\n apply (intro impI conjI)\n apply (case_tac \"x \\ idle_thread s\",simp_all)\n apply (clarsimp simp: scheduler_affects_equiv_def get_tcb_def scheduler_globals_frame_equiv_def\n split: option.splits kernel_object.splits)\n apply (clarsimp simp: arch_scheduler_affects_equiv_def)\n apply (elim states_equiv_forE equiv_forE)\n apply (rule states_equiv_forI,simp_all add: equiv_for_def equiv_asids_def equiv_asid_def)\n apply (clarsimp simp: obj_at_def)\n apply (clarsimp simp: idle_context_def get_tcb_def\n split: option.splits kernel_object.splits)\n apply (subst arch_tcb_update_aux)\n apply simp\n apply (subgoal_tac \"s = (s\\kheap := kheap s(idle_thread s \\ TCB y)\\)\", simp)\n apply (rule state.equality)\n apply (rule ext)\n apply simp+\n done\n\nlemma set_object_reads_respects_scheduler[Scheduler_IF_assms, wp]:\n \"reads_respects_scheduler aag l \\ (set_object ptr obj)\"\n unfolding equiv_valid_def2 equiv_valid_2_def\n by (auto simp: set_object_def bind_def get_def put_def return_def get_object_def assert_def\n fail_def gets_def scheduler_equiv_def domain_fields_equiv_def equiv_for_def\n globals_equiv_scheduler_def arch_globals_equiv_scheduler_def silc_dom_equiv_def\n scheduler_affects_equiv_def arch_scheduler_affects_equiv_def\n scheduler_globals_frame_equiv_def identical_kheap_updates_def\n intro: states_equiv_for_identical_kheap_updates idle_equiv_identical_kheap_updates)\n\nlemma arch_activate_idle_thread_reads_respects_scheduler[Scheduler_IF_assms, wp]:\n \"reads_respects_scheduler aag l \\ (arch_activate_idle_thread rv)\"\n unfolding arch_activate_idle_thread_def by wpsimp\n\nend\n\n\nglobal_interpretation Scheduler_IF_2?:\n Scheduler_IF_2 arch_globals_equiv_scheduler arch_scheduler_affects_equiv\nproof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact Scheduler_IF_assms)?)\nqed\n\n\nhide_fact Scheduler_IF_2.globals_equiv_scheduler_inv'\nrequalify_facts ARM.globals_equiv_scheduler_inv'\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/infoflow/ARM/ArchScheduler_IF.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.523420348936324, "lm_q2_score": 0.24798742068237775, "lm_q1q2_score": 0.12980166226538914}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\n Retype refinement\n*)\n\ntheory Retype_R\nimports VSpace_R\nbegin\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n APIType_map2 :: \"kernel_object + ARM_H.object_type \\ Structures_A.apiobject_type\"\nwhere\n \"APIType_map2 ty \\ case ty of\n Inr (APIObjectType ArchTypes_H.Untyped) \\ Structures_A.Untyped\n | Inr (APIObjectType ArchTypes_H.TCBObject) \\ Structures_A.TCBObject\n | Inr (APIObjectType ArchTypes_H.EndpointObject) \\ Structures_A.EndpointObject\n | Inr (APIObjectType ArchTypes_H.NotificationObject) \\ Structures_A.NotificationObject\n | Inr (APIObjectType ArchTypes_H.CapTableObject) \\ Structures_A.CapTableObject\n | Inr PageTableObject \\ ArchObject PageTableObj\n | Inr PageDirectoryObject \\ ArchObject PageDirectoryObj\n | Inr LargePageObject \\ ArchObject LargePageObj\n | Inr SectionObject \\ ArchObject SectionObj\n | Inr SuperSectionObject \\ ArchObject SuperSectionObj\n | Inl (KOArch (KOASIDPool _)) \\ ArchObject ASIDPoolObj\n | _ \\ ArchObject SmallPageObj\"\n\nlemma placeNewObject_def2:\n \"placeNewObject ptr val gb = createObjects' ptr 1 (injectKO val) gb\"\n apply (clarsimp simp:placeNewObject_def placeNewObject'_def\n createObjects'_def shiftL_nat)\n done\n\nlemma createObjects_ret:\n \"\\n < 2^word_bits;n\\ 0\\ \\\n \\\\\\ createObjects y n ko gbits\n \\\\r s. r = map (\\p. ptr_add y (p * 2 ^ objBitsKO ko * 2 ^ gbits))\n [0..< n]\\\"\n unfolding createObjects_def createObjects'_def\n apply (simp add: split_def)\n apply (wp|simp cong: if_cong)+\n apply (clarsimp simp: ptr_add_def upto_enum_def o_def\n unat_sub word_le_nat_alt\n power_sub[symmetric]\n objBits_def[symmetric]\n simp del: upt_Suc)\n apply (clarsimp simp: unat_of_nat_minus_1 word_bits_def\n shiftl_t2n power_add)\n done\n\nlemma objBitsKO_bounded2[simp]:\n \"objBitsKO ko < word_bits\"\n by (simp add: objBits_simps' word_bits_def pageBits_def archObjSize_def pdeBits_def pteBits_def\n split: Structures_H.kernel_object.split arch_kernel_object.split)\n\ndefinition\n APIType_capBits :: \"ARM_H.object_type \\ nat \\ nat\"\nwhere\n \"APIType_capBits ty us \\ case ty of\n APIObjectType ArchTypes_H.Untyped \\ us\n | APIObjectType ArchTypes_H.TCBObject \\ objBits (makeObject :: tcb)\n | APIObjectType ArchTypes_H.EndpointObject \\ objBits (makeObject :: endpoint)\n | APIObjectType ArchTypes_H.NotificationObject \\ objBits (makeObject :: Structures_H.notification)\n | APIObjectType ArchTypes_H.CapTableObject \\ objBits (makeObject :: cte) + us\n | SmallPageObject \\ pageBitsForSize ARMSmallPage\n | LargePageObject \\ pageBitsForSize ARMLargePage\n | SectionObject \\ pageBitsForSize ARMSection\n | SuperSectionObject \\ pageBitsForSize ARMSuperSection\n | PageTableObject \\ 10\n | PageDirectoryObject \\ 14\"\n\ndefinition\n makeObjectKO :: \"bool \\ (kernel_object + ARM_H.object_type) \\ kernel_object\"\nwhere\n \"makeObjectKO dev ty \\ case ty of\n Inl KOUserData \\ Some KOUserData\n | Inl (KOArch (KOASIDPool _)) \\ Some (KOArch (KOASIDPool makeObject))\n | Inr (APIObjectType ArchTypes_H.TCBObject) \\ Some (KOTCB makeObject)\n | Inr (APIObjectType ArchTypes_H.EndpointObject) \\ Some (KOEndpoint makeObject)\n | Inr (APIObjectType ArchTypes_H.NotificationObject) \\ Some (KONotification makeObject)\n | Inr (APIObjectType ArchTypes_H.CapTableObject) \\ Some (KOCTE makeObject)\n | Inr PageTableObject \\ Some (KOArch (KOPTE makeObject))\n | Inr PageDirectoryObject \\ Some (KOArch (KOPDE makeObject))\n | Inr SmallPageObject \\ Some (if dev then KOUserDataDevice else KOUserData)\n | Inr LargePageObject \\ Some(if dev then KOUserDataDevice else KOUserData)\n | Inr SectionObject \\ Some (if dev then KOUserDataDevice else KOUserData)\n | Inr SuperSectionObject \\ Some (if dev then KOUserDataDevice else KOUserData)\n | _ \\ None\"\n\ntext \\makeObject etc. lemmas\\\n\nlemma NullCap_valid' [iff]: \"s \\' capability.NullCap\"\n unfolding valid_cap'_def by simp\n\nlemma valid_obj_makeObject_cte [simp]:\n \"valid_obj' (KOCTE makeObject) s\"\n unfolding valid_obj'_def valid_cte'_def\n by (clarsimp simp: makeObject_cte)\n\nlemma valid_obj_makeObject_tcb [simp]:\n \"valid_obj' (KOTCB makeObject) s\"\n unfolding valid_obj'_def valid_tcb'_def valid_tcb_state'_def\n by (clarsimp simp: makeObject_tcb makeObject_cte tcb_cte_cases_def minBound_word)\n\nlemma valid_obj_makeObject_endpoint [simp]:\n \"valid_obj' (KOEndpoint makeObject) s\"\n unfolding valid_obj'_def valid_ep'_def\n by (clarsimp simp: makeObject_endpoint)\n\nlemma valid_obj_makeObject_notification [simp]:\n \"valid_obj' (KONotification makeObject) s\"\n unfolding valid_obj'_def valid_ntfn'_def\n by (clarsimp simp: makeObject_notification)\n\nlemma valid_obj_makeObject_user_data [simp]:\n \"valid_obj' (KOUserData) s\"\n unfolding valid_obj'_def by simp\n\nlemma valid_obj_makeObject_user_data_device [simp]:\n \"valid_obj' (KOUserDataDevice) s\"\n unfolding valid_obj'_def by simp\n\nlemma valid_obj_makeObject_pte[simp]:\n \"valid_obj' (KOArch (KOPTE makeObject)) s\"\n unfolding valid_obj'_def by (simp add: makeObject_pte)\n\nlemma valid_obj_makeObject_pde[simp]:\n \"valid_obj' (KOArch (KOPDE makeObject)) s\"\n unfolding valid_obj'_def by (simp add: makeObject_pde)\n\nlemma valid_obj_makeObject_asid_pool[simp]:\n \"valid_obj' (KOArch (KOASIDPool makeObject)) s\"\n unfolding valid_obj'_def\n by (simp add: makeObject_asidpool Let_def ran_def dom_def)\n\nlemmas valid_obj_makeObject_rules =\n valid_obj_makeObject_user_data valid_obj_makeObject_tcb\n valid_obj_makeObject_endpoint valid_obj_makeObject_notification\n valid_obj_makeObject_cte valid_obj_makeObject_pte valid_obj_makeObject_pde\n valid_obj_makeObject_asid_pool valid_obj_makeObject_user_data_device\n\ntext \\On the abstract side\\\n\ntext \\Lemmas for createNewObjects etc.\\\n\nlemma pspace_dom_upd:\n assumes orth: \"set as \\ dom ps = {}\"\n shows \"pspace_dom (foldr (\\p ps. ps(p \\ ko)) as ps) =\n pspace_dom ps \\ (\\x \\ set as. fst ` obj_relation_cuts ko x)\"\n using orth\n apply (subst foldr_upd_app_if)\n apply (rule set_eqI, simp add: pspace_dom_def)\n apply (rule iffI)\n apply (clarsimp split: if_split_asm)\n apply (rule rev_bexI, erule domI)\n apply (fastforce simp: image_def)\n apply (erule disjE)\n apply clarsimp\n apply (rule rev_bexI)\n apply (clarsimp simp: domIff)\n apply (erule exI)\n apply clarsimp\n apply (intro conjI impI)\n apply (drule equals0D, erule notE, erule IntI, erule domI)\n apply (fastforce simp: image_def)\n apply clarsimp\n apply (rule rev_bexI)\n apply (clarsimp simp: domIff)\n apply (erule(1) notE)\n apply clarsimp\n apply (fastforce simp: image_def)\n done\n\ndefinition\n \"new_cap_addrs \\ \\n ptr ko. map (\\p. ptr + ((of_nat p :: word32) << (objBitsKO ko)))\n [0 ..< n]\"\n\ndefinition\n null_filter' :: \"('a \\ cte) \\ ('a \\ cte)\"\nwhere\n \"null_filter' f \\ \\x. if f x = Some (CTE NullCap nullMDBNode) then None else f x\"\n\nlemma across_null_filter_eq':\n assumes eq: \"null_filter' xs = null_filter' ys\"\n shows \"\\ xs x = Some v; ys x = Some v \\ R;\n \\ v = CTE NullCap nullMDBNode; ys x = None \\ \\ R \\\n \\ R\"\n apply (cases \"null_filter' xs x\")\n apply (subgoal_tac \"null_filter' ys x = None\")\n apply (simp add: null_filter'_def split: if_split_asm)\n apply (simp add: eq)\n apply (subgoal_tac \"null_filter' ys x = Some a\")\n apply (simp add: null_filter'_def split: if_split_asm)\n apply (simp add: eq)\n done\n\nlemma null_filter_parent_of'':\n \"\\ null_filter' xs = null_filter' ys; xs \\ x \\ c; c \\ 0 \\\n \\ ys \\ x \\ c\"\n apply (clarsimp simp add: mdb_next_unfold)\n apply (drule arg_cong[where f=\"\\xs. xs x\"])\n apply (simp add: null_filter'_def nullPointer_def split: if_split_asm)\n done\n\nlemma null_filter_parentOf:\n \"\\ null_filter' xs = null_filter' ys; xs \\ x parentOf y \\\n \\ ys \\ x parentOf y\"\n apply (clarsimp simp add: parentOf_def)\n apply (rule across_null_filter_eq'[where x=x], assumption+)\n apply (erule(1) across_null_filter_eq')\n apply clarsimp\n apply simp\n apply simp\n done\n\nlemma null_filter_descendant:\n \"\\ null_filter' xs = null_filter' ys; xs \\ x \\ y \\\n \\ ys \\ x \\ y\"\n apply (erule subtree.induct)\n apply (rule subtree.direct_parent)\n apply (erule(2) null_filter_parent_of'')\n apply assumption\n apply (erule(1) null_filter_parentOf)\n apply (erule subtree.trans_parent)\n apply (erule(2) null_filter_parent_of'')\n apply assumption\n apply (erule(1) null_filter_parentOf)\n done\n\nlemma null_filter_descendants_of':\n \"null_filter' xs = null_filter' ys\n \\ descendants_of' x xs = descendants_of' x ys\"\n apply (simp add: descendants_of'_def)\n apply (rule set_eqI, rule iffI)\n apply simp\n apply (erule(1) null_filter_descendant)\n apply simp\n apply (erule(1) null_filter_descendant[OF sym])\n done\n\nlemma descendants_of_cte_at':\n \"\\ p \\ descendants_of x (cdt s); valid_mdb s \\\n \\ cte_wp_at (\\c. c \\ cap.NullCap) p s\"\n apply (simp add: descendants_of_def)\n apply (drule tranclD2)\n apply (clarsimp simp: cdt_parent_defs valid_mdb_def mdb_cte_at_def\n simp del: split_paired_All)\n apply (fastforce elim: cte_wp_at_weakenE)\n done\n\n\nlemma descendants_of_cte_at2':\n \"\\ p \\ descendants_of x (cdt s); valid_mdb s \\\n \\ cte_wp_at (\\c. c \\ cap.NullCap) x s\"\n apply (simp add: descendants_of_def)\n apply (drule tranclD)\n apply (clarsimp simp: cdt_parent_defs valid_mdb_def mdb_cte_at_def\n simp del: split_paired_All)\n apply (fastforce elim: cte_wp_at_weakenE)\n done\n\nlemma cte_at_next_slot'':\n notes split_paired_All[simp del] split_paired_Ex[simp del]\n shows \"\\valid_list s; valid_mdb s; finite_depth (cdt s)\\\n \\ next_slot p (cdt_list s) (cdt s) = Some n \\ cte_wp_at (\\c. c \\ cap.NullCap) p s\"\n apply(simp add: next_slot_def)\n apply(simp split: if_split_asm)\n apply(drule next_childD, simp)\n apply(rule_tac p=n in descendants_of_cte_at2')\n apply(simp add: child_descendant)\n apply(simp)\n apply(subgoal_tac \"next_not_child_dom (p, cdt_list s, cdt s)\")\n prefer 2\n apply(simp add: next_not_child_termination valid_mdb_def valid_list_def)\n apply(simp split: if_split_asm)\n apply(case_tac \"cdt s p\")\n apply(simp)\n apply(rule descendants_of_cte_at')\n apply(simp add: descendants_of_def cdt_parent_defs)\n apply(rule r_into_trancl, simp)\n apply(simp)\n apply(drule next_sibD)\n apply(elim exE conjE)\n apply(drule after_in_list_in_list)\n apply(rule descendants_of_cte_at')\n apply(simp add: descendants_of_def cdt_parent_defs)\n apply(rule r_into_trancl, simp)\n apply(simp)\n done\n\n\nlemma state_relation_null_filterE:\n \"\\ (s, s') \\ state_relation; t = kheap_update f (ekheap_update ef s);\n \\f' g' h'.\n t' = s'\\ksPSpace := f' (ksPSpace s'), gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\;\n null_filter (caps_of_state t) = null_filter (caps_of_state s);\n null_filter' (ctes_of t') = null_filter' (ctes_of s');\n pspace_relation (kheap t) (ksPSpace t');\n ekheap_relation (ekheap t) (ksPSpace t');\n ghost_relation (kheap t) (gsUserPages t') (gsCNodes t'); valid_list s;\n pspace_aligned' s'; pspace_distinct' s'; valid_objs s; valid_mdb s;\n pspace_aligned' t'; pspace_distinct' t';\n mdb_cte_at (swp (cte_wp_at ((\\) cap.NullCap)) s) (cdt s) \\\n \\ (t, t') \\ state_relation\"\n apply (clarsimp simp: state_relation_def)\n apply (intro conjI)\n apply (simp add: cdt_relation_def cte_wp_at_caps_of_state)\n apply (elim allEI)\n apply clarsimp\n apply (erule(1) across_null_filter_eq)\n apply simp\n apply (rule null_filter_descendants_of', simp)\n apply simp\n apply (case_tac \"cdt s (a, b)\")\n apply (subst mdb_cte_at_no_descendants, assumption)\n apply (simp add: cte_wp_at_caps_of_state swp_def)\n apply (cut_tac s=\"kheap_update f (ekheap_update ef s)\" and\n s'=\"s'\\ksPSpace := f' (ksPSpace s'),\n gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\\"\n in pspace_relation_ctes_ofI, simp_all)[1]\n apply (simp add: trans_state_update[symmetric] del: trans_state_update)\n apply (erule caps_of_state_cteD)\n apply (clarsimp simp: descendants_of'_def)\n apply (case_tac cte)\n apply (erule Null_not_subtree[rotated])\n apply simp\n apply (drule(1) mdb_cte_atD)\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply(simp add: cdt_list_relation_def cte_wp_at_caps_of_state)\n apply(elim allEI)\n apply(clarsimp)\n apply(case_tac \"next_slot (a, b) (cdt_list (s)) (cdt s)\")\n apply(simp)\n apply(subgoal_tac \"cte_wp_at (\\c. c \\ cap.NullCap) (a, b) s\")\n apply(drule_tac f=\"\\cs. cs (a, b)\" in arg_cong)\n apply(clarsimp simp: cte_wp_at_caps_of_state)\n apply(clarsimp simp: null_filter_def split: if_split_asm)\n apply(drule_tac f=\"\\ctes. ctes (cte_map (a, b))\" in arg_cong)\n apply(simp add: null_filter'_def cte_wp_at_ctes_of split: if_split_asm)\n apply(frule pspace_relation_cte_wp_at)\n apply(simp add: cte_wp_at_caps_of_state)\n apply(simp)\n apply(simp)\n apply(simp add: cte_wp_at_ctes_of)\n apply (simp add: mdb_cte_at_def)\n apply(frule finite_depth)\n apply(frule(3) cte_at_next_slot'')\n apply simp\n apply (simp add: revokable_relation_def)\n apply (elim allEI, rule impI, drule(1) mp, elim allEI)\n apply (clarsimp elim!: null_filterE)\n apply (drule(3) pspace_relation_cte_wp_at [OF _ caps_of_state_cteD])\n apply (drule_tac f=\"\\ctes. ctes (cte_map (a, b))\" in arg_cong)\n apply (clarsimp simp: null_filter'_def cte_wp_at_ctes_of\n split: if_split_asm)\n done\n\nlemma lookupAround2_pspace_no:\n \"is_aligned ptr sz \\\n (case fst (lookupAround2 (ptr + 2 ^ sz - 1) ps) of None \\ return ()\n | Some (x, y) \\ haskell_assert (x < fromPPtr ptr) [])\n = assert ({ptr..ptr + 2 ^ sz - 1} \\ dom ps = {})\"\n apply (simp add: assert_def split: option.split)\n apply safe\n apply (clarsimp simp: lookupAround2_None1)\n apply (clarsimp simp: lookupAround2_char1)\n apply (clarsimp simp: lookupAround2_char1)\n apply (drule_tac a=a in equals0D)\n apply (simp add: linorder_not_less)\n apply fastforce\n done\n\nlemma pspace_no_overlap_disjoint':\n \"\\pspace_aligned' s;pspace_no_overlap' x n s\\\n \\ {x .. (x && ~~ mask n) + 2 ^ n - 1} \\ dom (ksPSpace s) = {}\"\n unfolding pspace_no_overlap'_def\n apply (rule disjointI)\n apply (rule ccontr)\n apply clarsimp\n apply (elim allE impE notE)\n apply (simp add:field_simps)+\n apply (erule(2) order_trans[OF _ is_aligned_no_overflow,OF _ pspace_alignedD'])\n apply (erule(1) is_aligned_no_overflow[OF pspace_alignedD'])\n apply (erule order_trans)\n apply (simp add:p_assoc_help)\ndone\n\nlemma foldr_update_ko_wp_at':\n assumes pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n shows\n \"ko_wp_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if p \\ set addrs then P obj\n else ko_wp_at' P p s)\"\n (is \"ko_wp_at' P p ?s' = ?Q\")\n apply (clarsimp simp: ko_wp_at'_def projectKOs al)\n apply (intro conjI impI)\n apply safe[1]\n apply (rule pspace_distinctD' [OF _ pv'(2)])\n apply simp\n apply safe[1]\n apply (simp add: ps_clear_def dom_if_Some)\n apply blast\n apply simp\n apply (rule pspace_distinctD' [OF _ pv'(2)])\n apply simp\n done\n\nlemma foldr_update_obj_at':\n assumes pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n shows\n \"obj_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if p \\ set addrs then (\\obj'. projectKO_opt obj = Some obj' \\ P obj')\n else obj_at' P p s)\"\n apply (simp only: obj_at'_real_def)\n apply (rule foldr_update_ko_wp_at' [OF pv pv' al])\n done\n\nlemma makeObjectKO_eq:\n assumes x: \"makeObjectKO dev tp = Some v\"\n shows\n \"(v = KOCTE cte) =\n (tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ cte = makeObject)\"\n \"(v = KOTCB tcb) =\n (tp = Inr (APIObjectType ArchTypes_H.TCBObject) \\ tcb = makeObject)\"\n using x\n by (simp add: makeObjectKO_def eq_commute\n split: apiobject_type.split_asm sum.split_asm kernel_object.split_asm\n ARM_H.object_type.split_asm arch_kernel_object.split_asm)+\n\nlemma pspace_no_overlap_base':\n \"\\pspace_aligned' s;pspace_no_overlap' x n s; is_aligned x n \\ \\ ksPSpace s x = None\"\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (drule equals0D[where a=x])\n apply (rule ccontr, clarsimp)\n apply (erule is_aligned_get_word_bits)\n apply (erule impE)\n apply (frule mask_out_add_aligned[where q = 0,simplified,symmetric])\n apply (fastforce simp add: is_aligned_no_overflow)\n apply clarsimp+\n done\n\nlemma the_ctes_makeObject:\n \"fst (the (tcb_cte_cases n)) makeObject\n = (if tcb_cte_cases n = None\n then fst (the None :: (Structures_H.tcb \\ cte) \\ ((cte \\ cte) \\ Structures_H.tcb \\ Structures_H.tcb))\n (makeObject :: tcb)\n else makeObject)\"\n apply (simp add: makeObject_tcb)\n apply (clarsimp simp: tcb_cte_cases_def)\n done\n\nlemma cte_wp_at_obj_cases_mask:\n \"cte_wp_at' P p s =\n (obj_at' P p s \\\n (p && mask tcbBlockSizeBits \\ dom tcb_cte_cases\n \\ obj_at' (P \\ fst (the (tcb_cte_cases (p && mask tcbBlockSizeBits))))\n (p && ~~ mask tcbBlockSizeBits) s))\"\n apply (simp add: cte_wp_at_obj_cases')\n apply (rule arg_cong [where f=\"\\x. F \\ x\" for F])\n apply (rule iffI)\n apply (clarsimp simp: obj_at'_def projectKOs objBits_simps)\n apply (frule(1) tcb_cte_cases_aligned_helpers)\n apply fastforce\n apply (clarsimp simp: obj_at'_def projectKOs objBits_simps)\n apply (rule bexI[where x=\"p && mask tcbBlockSizeBits\"])\n apply (clarsimp simp: subtract_mask)\n apply fastforce\n done\n\nlemma ps_clearD:\n \"\\ ps_clear x n s; ksPSpace s y = Some v; x < y; y \\ x + 2 ^ n - 1 \\ \\ False\"\n apply (clarsimp simp: ps_clear_def)\n apply (drule_tac a=y in equals0D)\n apply (simp add: dom_def)\n apply fastforce\n done\n\nlemma cte_wp_at_retype':\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"cte_wp_at' P p (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\n = (if tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ p \\ set addrs\n \\ tp = Inr (APIObjectType ArchTypes_H.TCBObject)\n \\ (p && ~~ mask tcbBlockSizeBits \\ set addrs) \\ (p && mask tcbBlockSizeBits \\ dom tcb_cte_cases)\n then P (CTE NullCap nullMDBNode)\n else cte_wp_at' P p s)\"\n (is \"cte_wp_at' P p ?s' = ?Q\")\n apply (subgoal_tac \"\\p \\ set addrs. \\(P :: cte \\ bool). \\ obj_at' P p s\")\n apply (subgoal_tac \"\\p \\ set addrs. \\(P :: tcb \\ bool). \\ obj_at' P p s\")\n apply (subgoal_tac \"(\\P :: cte \\ bool. obj_at' P p ?s')\n \\ (\\ (\\P :: tcb \\ bool. obj_at' P (p && ~~ mask tcbBlockSizeBits) ?s'))\")\n apply (simp only: cte_wp_at_obj_cases_mask foldr_update_obj_at'[OF pv pv' al])\n apply (simp add: projectKOs the_ctes_makeObject\n makeObjectKO_eq [OF ko]\n makeObject_cte dom_def\n split del: if_split\n cong: if_cong)\n apply (insert al ko)\n apply (simp, safe, simp_all)\n apply fastforce\n apply fastforce\n apply (clarsimp elim!: obj_atE' simp: projectKOs objBits_simps)\n apply (drule ps_clearD[where y=p and n=tcbBlockSizeBits])\n apply simp\n apply (rule order_trans_rules(17))\n apply (clarsimp cong: if_cong)\n apply (rule word_and_le2)\n apply (rule word_neg_and_le[simplified field_simps])\n apply (clarsimp elim!: obj_atE' simp: pn)+\n done\n\nlemma ctes_of_retype:\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"map_to_ctes (\\ xa. if xa \\ set addrs then Some obj else ksPSpace s xa)\n = (\\x. if tp = Inr (APIObjectType ArchTypes_H.CapTableObject) \\ x \\ set addrs\n \\ tp = Inr (APIObjectType ArchTypes_H.TCBObject)\n \\ (x && ~~ mask tcbBlockSizeBits \\ set addrs) \\ (x && mask tcbBlockSizeBits \\ dom tcb_cte_cases)\n then Some (CTE NullCap nullMDBNode)\n else map_to_ctes (ksPSpace s) x)\"\n (is \"map_to_ctes ?ps' = ?map'\")\n using cte_wp_at_retype' [where P=\"(=) cte\" for cte, OF ko pv pv' al pn]\n arg_cong [where f=Not, OF cte_wp_at_retype' [OF ko pv pv' al pn, where P=\"\\\"]]\n apply (simp(no_asm_use) add: cte_wp_at_ctes_of cong: if_cong)\n apply (rule ext)\n apply (case_tac \"map_to_ctes ?ps' x\")\n apply (simp(no_asm_simp))\n apply (simp split: if_split_asm)\n apply simp\n done\n\nlemma None_ctes_of_cte_at:\n \"(None = ctes_of s x) = (\\ cte_at' x s)\"\n by (fastforce simp add: cte_wp_at_ctes_of)\n\nlemma null_filter_ctes_retype:\n assumes ko: \"makeObjectKO dev tp = Some obj\"\n and pv: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pv': \"pspace_aligned' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n \"pspace_distinct' (ksPSpace_update (\\x xa. if xa \\ set addrs then Some obj else ksPSpace s xa) s)\"\n and al: \"\\x \\ set addrs. is_aligned x (objBitsKO obj)\"\n and pn: \"\\x \\ set addrs. ksPSpace s x = None\"\n shows\n \"null_filter' (map_to_ctes (foldr (\\addr. data_map_insert addr obj) addrs (ksPSpace s)))\n = null_filter' (map_to_ctes (ksPSpace s))\"\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (subst ctes_of_retype[OF ko pv pv' al pn])\n apply (rule ext)\n apply (clarsimp simp: null_filter'_def None_ctes_of_cte_at)\n apply (intro conjI impI notI)\n apply (elim cte_wp_atE' disjE conjE)\n apply (simp_all add: pn)\n apply (cut_tac x=\"ptr'\" and v=\"if ptr' \\ set addrs then obj else KOTCB tcb\"\n in pspace_distinctD'[OF _ pv'(2)])[1]\n apply simp\n apply (insert ko[symmetric],\n simp add: makeObjectKO_def objBits_simps pn\n split: if_split_asm)[1]\n apply (drule(2) tcb_ctes_clear[where s=\"ksPSpace_update f s\" for f s])\n apply simp\n apply fastforce\n apply (cut_tac x=\"x && ~~ mask tcbBlockSizeBits\" in pspace_distinctD'[OF _ pv'(2)])[1]\n apply simp\n apply (elim cte_wp_atE' disjE conjE)\n apply (insert ko[symmetric], simp add: makeObjectKO_def objBits_simps)\n apply clarsimp\n apply (subst(asm) subtract_mask[symmetric],\n erule_tac v=\"if x \\ set addrs then KOTCB makeObject else KOCTE cte\"\n in tcb_space_clear)\n apply (simp add: is_aligned_mask word_bw_assocs)\n apply assumption\n apply simp\n apply simp\n apply (simp add: pn)\n apply (clarsimp simp: makeObjectKO_def)\n apply (drule(1) tcb_cte_cases_aligned_helpers)\n apply (clarsimp simp: pn)\n done\n\nlemma new_cap_addrs_aligned:\n \"\\ is_aligned ptr (objBitsKO ko) \\\n \\ \\x \\ set (new_cap_addrs n ptr ko). is_aligned x (objBitsKO ko)\"\n apply (clarsimp simp: new_cap_addrs_def)\n apply (erule aligned_add_aligned[OF _ is_aligned_shift])\n apply simp\n done\n\nlemma new_cap_addrs_distinct:\n assumes cover: \"range_cover ptr sz (objBitsKO ko) n\"\n shows \"distinct (new_cap_addrs n ptr ko)\"\n unfolding new_cap_addrs_def\n apply (simp add: distinct_map)\n apply (rule comp_inj_on[where f=of_nat, unfolded o_def])\n apply (rule subset_inj_on)\n apply (rule word_unat.Abs_inj_on)\n apply (clarsimp simp only: unats_def atLeastLessThan_iff\n dest!: less_two_pow_divD)\n apply (insert cover)\n apply (erule less_le_trans)\n apply (insert range_cover.range_cover_n_le[OF cover])\n apply (erule le_trans)\n apply (cases \"objBitsKO ko = 0\")\n apply (simp add:word_bits_def)\n apply (rule less_imp_le)\n apply (rule power_strict_increasing)\n apply (simp add:word_bits_def)\n apply simp\n apply (rule inj_onI)\n apply clarsimp\n apply (drule arg_cong[where f=\"\\x. x >> objBitsKO ko\"])\n apply (cases \"objBitsKO ko = 0\")\n apply simp\n apply (subst(asm) shiftl_shiftr_id, simp add: range_cover_def)\n apply (subst word_unat_power, rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (erule order_less_le_trans)\n apply simp\n apply (subst(asm) shiftl_shiftr_id, simp add: range_cover_def)\n apply (subst word_unat_power, rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (simp add: word_bits_def)\n apply simp\n apply (erule order_less_le_trans)\n apply simp\n apply assumption\n done\n\nlemma new_cap_addrs_subset:\n assumes range_cover:\"range_cover ptr sz (objBitsKO ko) n\"\n shows \"set (new_cap_addrs n ptr ko) \\ {ptr .. ptr_add (ptr && ~~ mask sz) (2 ^ sz - 1)}\"\n apply (clarsimp simp add: new_cap_addrs_def shiftl_t2n\n field_simps\n dest!: less_two_pow_divD)\n apply (intro conjI)\n apply (insert range_cover)\n apply (rule machine_word_plus_mono_right_split[OF range_cover.range_cover_compare])\n apply assumption\n apply simp\n apply (simp add:range_cover_def word_bits_def)\n apply (clarsimp simp:ptr_add_def)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n apply (drule(1) range_cover.range_cover_compare)\n apply (rule iffD1[OF le_m1_iff_lt,THEN iffD2])\n using range_cover\n apply (simp add: p2_gt_0 range_cover_def word_bits_def)\n apply (rule iffD2[OF word_less_nat_alt])\n apply (rule le_less_trans[OF unat_plus_gt])\n using range_cover\n apply (clarsimp simp: range_cover_def)\n apply (insert range_cover)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask,OF le_refl ])\n apply (simp add:range_cover_def)+\ndone\n\ndefinition\n obj_relation_retype :: \"Structures_A.kernel_object \\\n Structures_H.kernel_object \\ bool\"\nwhere\n \"obj_relation_retype ko ko' \\\n obj_bits ko \\ objBitsKO ko'\n \\ (\\p. fst ` obj_relation_cuts ko p\n = {p + x * 2 ^ (objBitsKO ko') | x. x < 2 ^ (obj_bits ko - objBitsKO ko')}\n \\ (\\x \\ obj_relation_cuts ko p. snd x ko ko'))\"\n\nlemma obj_relation_retype_cutsD:\n \"\\ (x, P) \\ obj_relation_cuts ko p; obj_relation_retype ko ko' \\\n \\ \\y. x = p + y * 2 ^ (objBitsKO ko') \\ y < 2 ^ (obj_bits ko - objBitsKO ko')\n \\ P ko ko'\"\n apply (clarsimp simp: obj_relation_retype_def)\n apply (drule spec[where x=p])\n apply clarsimp\n apply (drule(1) bspec)\n apply (drule arg_cong[where f=\"\\S. x \\ S\"])\n apply clarsimp\n apply (fastforce simp: image_def)\n done\n\nlemma APIType_map2_Untyped[simp]:\n \"(APIType_map2 tp = Structures_A.Untyped)\n = (tp = Inr (APIObjectType ArchTypes_H.Untyped))\"\n by (simp add: APIType_map2_def\n split: sum.split object_type.split kernel_object.split arch_kernel_object.splits\n apiobject_type.split)\n\nlemma obj_relation_retype_leD:\n \"\\ obj_relation_retype ko ko' \\\n \\ objBitsKO ko' \\ obj_bits ko\"\n by (simp add: obj_relation_retype_def)\n\nlemma obj_relation_retype_default_leD:\n \"\\ obj_relation_retype (default_object (APIType_map2 ty) dev us) ko;\n ty \\ Inr (APIObjectType ArchTypes_H.Untyped) \\\n \\ objBitsKO ko \\ obj_bits_api (APIType_map2 ty) us\"\n by (simp add: obj_relation_retype_def objBits_def obj_bits_dev_irr)\n\nlemma makeObjectKO_Untyped:\n \"makeObjectKO dev ty = Some v \\ ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (clarsimp simp: makeObjectKO_def)\n\nlemma obj_relation_cuts_trivial:\n \"ptr \\ fst ` obj_relation_cuts x ptr\"\n apply (case_tac x)\n apply (rename_tac sz cs)\n apply (clarsimp simp:image_def cte_map_def well_formed_cnode_n_def)\n apply (rule_tac x = \"replicate sz False\" in exI)\n apply clarsimp+\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj)\n apply clarsimp\n apply (simp_all add:image_def pageBits_def)\n apply (rule_tac x = 0 in exI, simp)+\n apply (rule p2_gt_0[THEN iffD2])\n apply (rename_tac vmpage_size)\n apply (case_tac vmpage_size)\n apply (clarsimp simp:pageBitsForSize_def)+\n done\n\nlemma obj_relation_retype_addrs_eq:\n assumes not_unt:\"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n assumes amp: \"m = 2^ ((obj_bits_api (APIType_map2 ty) us) - (objBitsKO ko)) * n\"\n assumes orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n shows \"\\ range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n \\ \\\n (\\x \\ set (retype_addrs ptr (APIType_map2 ty) n us).\n fst ` obj_relation_cuts (default_object (APIType_map2 ty) dev us) x)\n = set (new_cap_addrs m ptr ko)\"\n apply (rule set_eqI, rule iffI)\n apply (clarsimp simp: retype_addrs_def)\n apply (rename_tac p a b)\n apply (drule obj_relation_retype_cutsD[OF _ orr])\n apply (cut_tac obj_relation_retype_default_leD[OF orr not_unt])\n apply (clarsimp simp: new_cap_addrs_def image_def\n dest!: less_two_pow_divD)\n apply (rule_tac x=\"p * 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) + unat y\"\n in rev_bexI)\n apply (simp add: amp obj_bits_api_default_object not_unt obj_bits_dev_irr)\n apply (rule less_le_trans[OF nat_add_left_cancel_less[THEN iffD2]])\n apply (erule unat_mono)\n apply (subst unat_power_lower)\n apply (rule le_less_trans[OF diff_le_self])\n apply (clarsimp simp: range_cover_def\n split: Structures_A.apiobject_type.splits)\n apply (simp add:field_simps,subst mult_Suc[symmetric])\n apply (rule mult_le_mono1)\n apply simp\n apply (simp add: ptr_add_def shiftl_t2n field_simps\n objBits_def[symmetric] word_unat_power[symmetric])\n apply (simp add: power_add[symmetric])\n apply (clarsimp simp: new_cap_addrs_def retype_addrs_def\n dest!: less_two_pow_divD)\n apply (rename_tac p)\n apply (cut_tac obj_relation_retype_default_leD[OF orr not_unt])\n apply (cut_tac obj_relation_retype_leD[OF orr])\n apply (case_tac \"n = 0\")\n apply (simp add:amp)\n apply (case_tac \"p = 0\")\n apply simp\n apply (rule_tac x = 0 in rev_bexI)\n apply simp+\n apply (rule obj_relation_cuts_trivial)\n apply (rule_tac x=\"p div (2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko))\"\n in rev_bexI)\n apply (simp add:amp)\n apply (rule td_gal_lt[THEN iffD1])\n apply (simp add:field_simps)+\n using orr\n apply (clarsimp simp: obj_relation_retype_def ptr_add_def)\n apply (thin_tac \"\\x. P x\" for P)\n apply (rule_tac x=\"of_nat (p mod (2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko)))\" in exI)\n apply (simp only: word_unat_power Abs_fnat_homs shiftl_t2n)\n apply (rule conjI)\n apply (rule arg_cong[where f=of_nat])\n apply (subst mult_div_rearrange)\n apply simp\n apply (subst minus_mod_eq_mult_div[symmetric])\n apply (simp add:diff_mult_distrib2)\n apply (rule of_nat_mono_maybe)\n apply (rule power_strict_increasing)\n apply (rule le_less_trans[OF diff_le_self])\n apply (clarsimp simp: range_cover_def obj_bits_api_default_object obj_bits_dev_irr\n not_unt word_bits_def)+\ndone\n\nlemma objBits_le_obj_bits_api:\n \"makeObjectKO dev ty = Some ko \\\n objBitsKO ko \\ obj_bits_api (APIType_map2 ty) us\"\n apply (case_tac ty)\n apply (auto simp: default_arch_object_def pageBits_def archObjSize_def pteBits_def pdeBits_def\n makeObjectKO_def objBits_simps' APIType_map2_def obj_bits_api_def slot_bits_def\n split: Structures_H.kernel_object.splits arch_kernel_object.splits object_type.splits\n Structures_H.kernel_object.splits arch_kernel_object.splits apiobject_type.splits)\n done\n\nlemma obj_relation_retype_other_obj:\n \"\\ is_other_obj_relation_type (a_type ko); other_obj_relation ko ko' \\\n \\ obj_relation_retype ko ko'\"\n apply (simp add: obj_relation_retype_def)\n apply (subgoal_tac \"objBitsKO ko' = obj_bits ko\")\n apply (clarsimp simp: is_other_obj_relation_type)\n apply (fastforce simp: other_obj_relation_def objBits_simps' archObjSize_def\n split: Structures_A.kernel_object.split_asm\n Structures_H.kernel_object.split_asm\n Structures_H.kernel_object.split\n arch_kernel_obj.split_asm arch_kernel_object.split)\n done\n\nlemma retype_pspace_relation:\n assumes sr: \"pspace_relation (kheap s) (ksPSpace s')\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"pspace_relation (foldr (\\p ps. ps(p \\ default_object (APIType_map2 ty) dev us))\n (retype_addrs ptr (APIType_map2 ty) n us) (kheap s))\n (foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko) (ksPSpace s'))\"\n (is \"pspace_relation ?ps ?ps'\")\n unfolding pspace_relation_def\nproof\n have not_unt: \"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (rule makeObjectKO_Untyped[OF ko])\n\n have dom_not_ra:\n \"\\x \\ dom (kheap s). x \\ set (retype_addrs ptr (APIType_map2 ty) n us)\"\n apply clarsimp\n apply (erule(1) pspace_no_overlapC[OF pn _ _ cover vs(1)])\n done\n\n hence dom_Int_ra:\n \"set (retype_addrs ptr (APIType_map2 ty) n us) \\ dom (kheap s) = {}\"\n by auto\n\n note pdom = pspace_dom_upd [OF dom_Int_ra, where ko=\"default_object (APIType_map2 ty) dev us\"]\n\n have pdom': \"dom ?ps' = dom (ksPSpace s') \\ set (new_cap_addrs m ptr ko)\"\n by (clarsimp simp add: foldr_upd_app_if[folded data_map_insert_def]\n dom_if_Some Un_commute\n split del: if_split)\n\n note not_unt = makeObjectKO_Untyped [OF ko]\n\n have \"pspace_dom (kheap s) = dom (ksPSpace s')\"\n using sr by (simp add: pspace_relation_def)\n\n thus \"pspace_dom ?ps = dom ?ps'\"\n apply (simp add: pdom pdom')\n apply (rule arg_cong[where f=\"\\T. S \\ T\" for S])\n apply (rule obj_relation_retype_addrs_eq[OF not_unt num_r orr cover])\n done\n\n have dom_same:\n \"\\x v. kheap s x = Some v \\ ?ps x = Some v\"\n apply (frule bspec [OF dom_not_ra, OF domI])\n apply (simp add: foldr_upd_app_if)\n done\n have cover':\"range_cover ptr sz (objBitsKO ko) m\"\n by (rule range_cover_rel[OF cover objBits_le_obj_bits_api[OF ko] num_r])\n have dom_same':\n \"\\x v. ksPSpace s' x = Some v \\ ?ps' x = Some v\"\n apply (clarsimp simp:foldr_upd_app_if[folded data_map_insert_def])\n apply (drule domI[where m = \"ksPSpace s'\"])\n apply (drule(1) IntI)\n apply (erule_tac A = \"A \\ B\" for A B in in_emptyE[rotated])\n apply (rule disjoint_subset[OF new_cap_addrs_subset[OF cover']])\n apply (clarsimp simp:ptr_add_def field_simps)\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n done\n\n show \"\\x \\ dom ?ps. \\(y, P) \\ obj_relation_cuts (the (?ps x)) x.\n P (the (?ps x)) (the (?ps' y))\"\n using sr\n apply (clarsimp simp: pspace_relation_def)\n apply (simp add: foldr_upd_app_if split: if_split_asm)\n apply (clarsimp simp: foldr_upd_app_if[folded data_map_insert_def])\n apply (rule conjI)\n apply (drule obj_relation_retype_cutsD [OF _ orr], clarsimp)\n apply (rule impI, erule notE)\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (erule rev_bexI)\n apply (simp add: image_def)\n apply (erule rev_bexI, simp)\n apply (drule bspec, erule domI)\n apply clarsimp\n apply (drule(1) bspec, simp)\n apply (subgoal_tac \"a \\ pspace_dom (kheap s)\")\n apply clarsimp\n apply (frule dom_same', simp)\n apply (simp(no_asm) add: pspace_dom_def)\n apply (rule rev_bexI, erule domI)\n apply (simp add: image_def)\n apply (erule rev_bexI, simp)\n done\nqed\n\n\n(*Clagged from Retype_AC*)\nlemma foldr_upd_app_if': \"foldr (\\p ps. ps(p := f p)) as g = (\\x. if x \\ set as then (f x) else g x)\"\n apply (induct as)\n apply simp\n apply simp\n apply (rule ext)\n apply simp\n done\n\nlemma etcb_rel_makeObject: \"etcb_relation default_etcb makeObject\"\n apply (simp add: etcb_relation_def default_etcb_def)\n apply (simp add: makeObject_tcb default_priority_def default_domain_def)\n done\n\n\nlemma ekh_at_tcb_at: \"valid_etcbs_2 ekh kh \\ ekh x = Some y \\ \\tcb. kh x = Some (TCB tcb)\"\n apply (simp add: valid_etcbs_2_def\n st_tcb_at_kh_def obj_at_kh_def\n is_etcb_at'_def obj_at_def)\n apply force\n done\n\nlemma default_etcb_default_domain_futz [simp]:\n \"default_etcb\\tcb_domain := default_domain\\ = default_etcb\"\nunfolding default_etcb_def by simp\n\nlemma retype_ekheap_relation:\n assumes sr: \"ekheap_relation (ekheap s) (ksPSpace s')\"\n and sr': \"pspace_relation (kheap s) (ksPSpace s')\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and et: \"valid_etcbs s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"ekheap_relation (foldr (\\p ps. ps(p := default_ext (APIType_map2 ty) default_domain))\n (retype_addrs ptr (APIType_map2 ty) n us) (ekheap s))\n (foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko) (ksPSpace s'))\"\n (is \"ekheap_relation ?ps ?ps'\")\n proof -\n have not_unt: \"ty \\ Inr (APIObjectType ArchTypes_H.Untyped)\"\n by (rule makeObjectKO_Untyped[OF ko])\n show ?thesis\n apply (case_tac \"ty \\ Inr (APIObjectType apiobject_type.TCBObject)\")\n apply (insert ko)\n apply (cut_tac retype_pspace_relation[OF sr' vs vs' pn pn' ko cover orr num_r])\n apply (simp add: foldr_upd_app_if' foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (insert sr)\n apply (clarsimp simp add: ekheap_relation_def\n pspace_relation_def default_ext_def cong: if_cong\n split: if_split_asm)\n subgoal by (clarsimp simp add: makeObjectKO_def APIType_map2_def cong: if_cong\n split: sum.splits Structures_H.kernel_object.splits\n arch_kernel_object.splits ARM_H.object_type.splits apiobject_type.splits)\n\n apply (frule ekh_at_tcb_at[OF et])\n apply (intro impI conjI)\n apply clarsimp\n apply (drule_tac x=a in bspec,force)\n apply (clarsimp simp add: other_obj_relation_def split: if_split_asm)\n apply (case_tac ko,simp_all)\n apply (clarsimp simp add: makeObjectKO_def cong: if_cong split: sum.splits Structures_H.kernel_object.splits\n arch_kernel_object.splits ARM_H.object_type.splits\n apiobject_type.splits if_split_asm)\n apply (drule_tac x=xa in bspec,simp)\n subgoal by force\n subgoal by force\n apply (simp add: foldr_upd_app_if' foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: obj_relation_retype_addrs_eq[OF not_unt num_r orr cover,symmetric])\n apply (clarsimp simp add: APIType_map2_def default_ext_def ekheap_relation_def\n default_object_def makeObjectKO_def etcb_rel_makeObject\n cong: if_cong\n split: if_split_asm)\n apply force\n done\nqed\n\nlemma pspace_no_overlapD':\n \"\\ ksPSpace s x = Some ko; pspace_no_overlap' p bits s \\\n \\ {x .. x + 2 ^ objBitsKO ko - 1} \\ {p .. (p && ~~ mask bits) + 2 ^ bits - 1} = {}\"\n apply (simp add:pspace_no_overlap'_def)\n apply (intro impI)\n apply (elim allE impE)\n apply (simp add:field_simps)+\ndone\n\nlemma new_range_subset:\n assumes\n cover: \"range_cover ptr sz (objBitsKO ko) n\"\n and addr: \"x \\ set (new_cap_addrs n ptr ko)\"\n shows \"{x .. x + 2 ^ (objBitsKO ko) - 1} \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n (is \"?lhs \\ ?rhs\")\nproof -\n have base_in: \"x \\ {ptr..ptr_add (ptr && ~~ mask sz) (2 ^ sz - 1)}\"\n by (rule set_mp[OF new_cap_addrs_subset[OF cover] addr])\n have aligned: \"is_aligned x (objBitsKO ko)\"\n apply (insert cover)\n apply (clarsimp simp:range_cover_def)\n apply (drule new_cap_addrs_aligned)\n apply (erule bspec[OF _ addr])\n done\n show ?thesis using base_in aligned addr\n apply (intro range_subsetI)\n apply (clarsimp simp:ptr_add_def field_simps)+\n apply (simp add:x_power_minus_1)\n apply (clarsimp simp:new_cap_addrs_def)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n apply (simp add:mask_2pm1[symmetric])\n apply (rule iffD2[OF shiftr_mask_cmp[where c = \"objBitsKO ko\"]])\n apply (insert cover)\n apply (simp add:range_cover_def)\n apply (simp add:range_cover_def word_bits_def)\n apply (subst aligned_shift')\n apply (simp add:mask_lt_2pn range_cover_def word_bits_def )\n apply (drule is_aligned_addD1)\n apply (simp add:range_cover_def)\n apply (rule aligned_add_aligned)\n apply (rule aligned_already_mask)\n apply (fastforce simp:range_cover_def)\n apply (simp_all add: range_cover_def)[3]\n apply (subst shiftr_mask2[symmetric])\n apply (simp add:range_cover_def word_bits_def)\n apply (rule le_shiftr)\n apply (subst le_mask_iff_lt_2n[THEN iffD1])\n apply (simp add:range_cover_def word_bits_def)\n apply (clarsimp simp:word_less_nat_alt)\n apply (rule le_less_trans[OF unat_plus_gt])\n apply (frule(1) range_cover.range_cover_compare)\n apply (clarsimp simp:shiftl_t2n mult.commute range_cover_def)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask])\n apply (rule le_refl)\n apply (simp add:range_cover_def)\n done\nqed\n\nlemma retype_aligned_distinct':\n assumes vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and cover: \"range_cover ptr sz (objBitsKO ko) n \"\n shows\n \"pspace_distinct' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n \"pspace_aligned' (s' \\ksPSpace := foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs n ptr ko) (ksPSpace s')\\)\"\n (is \"pspace_aligned' (s'\\ksPSpace := ?ps\\)\")\nproof -\n have al: \"is_aligned ptr (objBitsKO ko)\"\n using cover\n by (simp add:cover range_cover_def)\n let ?s' = \"s'\\ksPSpace := ?ps\\\"\n note nc_al = bspec [OF new_cap_addrs_aligned [OF al]]\n note nc_al' = nc_al[unfolded objBits_def]\n\n show pa': \"pspace_aligned' ?s'\" using vs'(1)\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (clarsimp simp add: pspace_aligned'_def nc_al'\n split: if_split_asm)\n apply (drule bspec, erule domI, simp)\n done\n\n have okov: \"objBitsKO ko < word_bits\"\n by (simp add: objBits_def)\n\n have new_range_disjoint:\n \"\\x. x \\ set (new_cap_addrs n ptr ko) \\\n ({x .. x + 2 ^ (objBitsKO ko) - 1} - {x}) \\ set (new_cap_addrs n ptr ko) = {}\"\n apply safe\n apply (rule ccontr)\n apply (frule(2) aligned_neq_into_no_overlap [OF _ nc_al nc_al])\n apply (drule_tac a=xa in equals0D)\n apply (clarsimp simp: field_simps is_aligned_no_overflow [OF nc_al])\n done\n note new_range_sub = new_range_subset [OF cover]\n\n show pd': \"pspace_distinct' ?s'\" using vs'(2)\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (simp add: pspace_distinct'_def dom_if_Some ball_Un)\n apply (intro conjI ballI impI)\n apply (simp add: ps_clear_def dom_if_Some Int_Un_distrib\n objBits_def[symmetric])\n apply (rule conjI)\n apply (erule new_range_disjoint)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (erule disjoint_subset[OF new_range_sub])\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (clarsimp simp add: ps_clear_def dom_if_Some Int_Un_distrib)\n apply (rule conjI)\n apply (erule new_range_disjoint)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (erule disjoint_subset[OF new_range_sub])\n apply (rule pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (clarsimp simp add: ps_clear_def dom_if_Some Int_Un_distrib)\n apply (subst Int_commute)\n apply (rule disjoint_subset[OF new_cap_addrs_subset,OF cover])\n apply (subst Int_commute)\n apply (simp add:ptr_add_def field_simps)\n apply (rule disjoint_subset[OF Diff_subset])\n apply (erule pspace_no_overlapD' [OF _ pn'])\n done\nqed\n\ndefinition\n update_gs :: \"Structures_A.apiobject_type \\ nat \\ word32 set\n \\ 'a kernel_state_scheme \\ 'a kernel_state_scheme\"\nwhere\n \"update_gs ty us ptrs \\\n case ty of\n Structures_A.CapTableObject \\ gsCNodes_update\n (\\cns x. if x \\ ptrs then Some us else cns x)\n | ArchObject (SmallPageObj) \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some ARMSmallPage else ups x)\n | ArchObject (LargePageObj) \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some ARMLargePage else ups x)\n | ArchObject (SectionObj) \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some ARMSection else ups x)\n | ArchObject (SuperSectionObj) \\ gsUserPages_update\n (\\ups x. if x \\ ptrs then Some ARMSuperSection else ups x)\n | _ \\ id\"\n\nlemma ksPSpace_update_gs_eq[simp]:\n \"ksPSpace (update_gs ty us ptrs s) = ksPSpace s\"\n by (simp add: update_gs_def\n split: Structures_A.apiobject_type.splits aobject_type.splits)\n\nend\n\nglobal_interpretation update_gs: PSpace_update_eq \"update_gs ty us ptrs\"\n by (simp add: PSpace_update_eq_def)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\nlemma update_gs_id:\n \"tp \\ no_gs_types \\ update_gs tp us addrs = id\"\n by (simp add: no_gs_types_def update_gs_def\n split: Structures_A.apiobject_type.splits aobject_type.splits)\n\nlemma update_gs_simps[simp]:\n \"update_gs Structures_A.apiobject_type.CapTableObject us ptrs =\n gsCNodes_update (\\cns x. if x \\ ptrs then Some us else cns x)\"\n \"update_gs (ArchObject SmallPageObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some ARMSmallPage else ups x)\"\n \"update_gs (ArchObject LargePageObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some ARMLargePage else ups x)\"\n \"update_gs (ArchObject SectionObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some ARMSection else ups x)\"\n \"update_gs (ArchObject SuperSectionObj) us ptrs =\n gsUserPages_update (\\ups x. if x \\ ptrs then Some ARMSuperSection\n else ups x)\"\n by (simp_all add: update_gs_def)\n\nlemma retype_state_relation:\n notes data_map_insert_def[simp del]\n assumes sr: \"(s, s') \\ state_relation\"\n and vs: \"valid_pspace s\" \"valid_mdb s\"\n and et: \"valid_etcbs s\" \"valid_list s\"\n and vs': \"pspace_aligned' s'\" \"pspace_distinct' s'\"\n and pn: \"pspace_no_overlap_range_cover ptr sz s\"\n and pn': \"pspace_no_overlap' ptr sz s'\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and api: \"obj_bits_api (APIType_map2 ty) us \\ sz\"\n and orr: \"obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and num_r: \"m = 2 ^ (obj_bits_api (APIType_map2 ty) us - objBitsKO ko) * n\"\n shows\n \"(ekheap_update\n (\\_. foldr (\\p ekh a. if a = p then default_ext (APIType_map2 ty) default_domain else ekh a)\n (retype_addrs ptr (APIType_map2 ty) n us) (ekheap s))\n s\n \\kheap :=\n foldr (\\p. data_map_insert p (default_object (APIType_map2 ty) dev us))\n (retype_addrs ptr (APIType_map2 ty) n us) (kheap s)\\,\n update_gs (APIType_map2 ty) us (set (retype_addrs ptr (APIType_map2 ty) n us))\n (s'\\ksPSpace :=\n foldr (\\addr. data_map_insert addr ko) (new_cap_addrs m ptr ko)\n (ksPSpace s')\\))\n \\ state_relation\"\n (is \"(ekheap_update (\\_. ?eps) s\\kheap := ?ps\\, update_gs _ _ _ (s'\\ksPSpace := ?ps'\\))\n \\ state_relation\")\n proof (rule state_relation_null_filterE[OF sr refl _ _ _ _ _ _ _ vs'], simp_all add: trans_state_update[symmetric] del: trans_state_update)\n\n have cover':\"range_cover ptr sz (objBitsKO ko) m\"\n by (rule range_cover_rel[OF cover objBits_le_obj_bits_api[OF ko] num_r])\n have al':\"is_aligned ptr (objBitsKO ko)\"\n using cover'\n by (simp add:range_cover_def)\n have sz:\"sz < word_bits\"\n using cover'\n by (simp add:range_cover_def word_bits_def)\n let ?t = \"s\\kheap := ?ps\\\"\n let ?tp = \"APIType_map2 ty\"\n let ?al = \"retype_addrs ptr ?tp n us\"\n let ?t' = \"update_gs ?tp us (set ?al) (s'\\ksPSpace := ?ps'\\)\"\n\n note pad' = retype_aligned_distinct' [OF vs' pn' cover']\n thus pa': \"pspace_aligned' (s'\\ksPSpace := ?ps'\\)\"\n and pd': \"pspace_distinct' (s'\\ksPSpace := ?ps'\\)\"\n by simp_all\n\n note pa'' = pa'[simplified foldr_upd_app_if[folded data_map_insert_def]]\n note pd'' = pd'[simplified foldr_upd_app_if[folded data_map_insert_def]]\n\n note not_unt = makeObjectKO_Untyped [OF ko]\n show \"null_filter (caps_of_state ?t) = null_filter (caps_of_state s)\"\n apply (rule null_filter_caps_of_state_foldr[folded data_map_insert_def])\n apply (simp add: not_unt)\n apply (rule ballI)\n apply (erule pspace_no_overlapD2 [OF pn _ cover vs(1)])\n done\n\n have nc_dis: \"distinct (new_cap_addrs m ptr ko)\"\n by (rule new_cap_addrs_distinct [OF cover'])\n\n note nc_al = bspec [OF new_cap_addrs_aligned [OF al']]\n note nc_al' = nc_al[unfolded objBits_def]\n show \"null_filter' (map_to_ctes ?ps') = null_filter' (ctes_of s')\"\n apply (rule null_filter_ctes_retype [OF ko vs' pa'' pd''])\n apply (simp add: nc_al)\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover']])\n apply (insert pspace_no_overlap_disjoint'[OF vs'(1) pn'])\n apply (drule orthD1)\n apply (simp add:ptr_add_def field_simps)\n apply clarsimp\n done\n\n show \"valid_objs s\" using vs\n by (clarsimp simp: valid_pspace_def)\n\n show \"valid_mdb s\" using vs\n by (clarsimp)\n\n show \"valid_list s\" using et\n by (clarsimp)\n\n show \"mdb_cte_at (swp (cte_wp_at ((\\) cap.NullCap)) s) (cdt s)\" using vs\n by (clarsimp simp: valid_mdb_def)\n\n have pspr: \"pspace_relation (kheap s) (ksPSpace s')\"\n using sr by (simp add: state_relation_def)\n\n thus \"pspace_relation ?ps ?ps'\"\n by (rule retype_pspace_relation [OF _ vs vs' pn pn' ko cover orr num_r,\n folded data_map_insert_def])\n\n have \"ekheap_relation (ekheap (s)) (ksPSpace s')\"\n using sr by (simp add: state_relation_def)\n\n thus \"ekheap_relation ?eps ?ps'\"\n by (fold fun_upd_apply) (rule retype_ekheap_relation[OF _ pspr vs et(1) vs' pn pn' ko cover orr num_r])\n\n have pn2: \"\\a\\set ?al. kheap s a = None\"\n by (rule ccontr) (clarsimp simp: pspace_no_overlapD1[OF pn _ cover vs(1)])\n\n from sr have gr: \"ghost_relation (kheap s) (gsUserPages s') (gsCNodes s')\"\n by (rule state_relationE)\n\n show \"ghost_relation ?ps (gsUserPages ?t') (gsCNodes ?t')\"\n proof (cases ?tp)\n case Untyped thus ?thesis by (simp add: not_unt)\n next\n note data_map_insert_def[simp]\n\n case TCBObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: ups_of_heap_def default_object_def TCBObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: cns_of_heap_def default_object_def TCBObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap, simp add: TCBObject update_gs_def)\n next\n case EndpointObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: ups_of_heap_def default_object_def data_map_insert_def EndpointObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al),\n simp_all add: cns_of_heap_def default_object_def data_map_insert_def EndpointObject)\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: EndpointObject update_gs_def)\n next\n note data_map_insert_def[simp]\n case NotificationObject\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: ups_of_heap_def\n default_object_def NotificationObject)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: cns_of_heap_def\n default_object_def NotificationObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: NotificationObject update_gs_def)\n next\n case CapTableObject\n note data_map_insert_def[simp]\n from pn2\n have [simp]: \"ups_of_heap ?ps = ups_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: ups_of_heap_def\n default_object_def CapTableObject)\n have [simp]: \"cns_of_heap ?ps = (\\x. if x \\ set ?al then Some us\n else cns_of_heap (kheap s) x)\"\n by (rule ext, induct (?al),\n simp_all add: cns_of_heap_def wf_empty_bits wf_unique default_object_def CapTableObject)\n note data_map_insert_def[simp del]\n from gr show ?thesis\n by (simp add: ghost_relation_of_heap,\n simp add: CapTableObject update_gs_def ext)\n next\n case (ArchObject ao)\n from pn2\n have [simp]: \"cns_of_heap ?ps = cns_of_heap (kheap s)\"\n by - (rule ext, induct (?al), simp_all add: cns_of_heap_def data_map_insert_def\n default_object_def ArchObject)\n from pn2 gr show ?thesis\n apply (clarsimp simp add: ghost_relation_of_heap)\n apply (rule conjI[rotated])\n apply (simp add: ArchObject update_gs_def split: aobject_type.splits)\n apply (thin_tac \"cns_of_heap h = g\" for h g)\n apply (drule sym)\n apply (rule ext)\n apply (induct (?al))\n apply (simp add: update_gs_def ArchObject split: aobject_type.splits)\n apply (simp add: update_gs_def ArchObject default_object_def\n default_arch_object_def ups_of_heap_def\n data_map_insert_def\n split: aobject_type.splits)\n done\n qed\n\n show \"\\f' g' h'. ?t' =\n s'\\ksPSpace := f' (ksPSpace s'), gsUserPages := g' (gsUserPages s'),\n gsCNodes := h' (gsCNodes s')\\\"\n apply (clarsimp simp: update_gs_def\n split: Structures_A.apiobject_type.splits)\n apply (intro conjI impI)\n apply (subst ex_comm, rule_tac x=id in exI,\n subst ex_comm, rule_tac x=id in exI, fastforce)+\n apply (subst ex_comm, rule_tac x=id in exI)\n apply (subst ex_comm)\n apply (rule_tac x=\"\\cns x. if x\\set ?al then Some us else cns x\" in exI,\n simp)\n apply (rule_tac x=\"\\x. foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs m ptr ko) x\" in exI, simp)\n apply clarsimp\n apply (rule_tac x=\"\\x. foldr (\\addr. data_map_insert addr ko)\n (new_cap_addrs m ptr ko) x\" in exI)\n apply (subst ex_comm, rule_tac x=id in exI)\n apply (simp split: aobject_type.splits)\n apply (intro conjI impI)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some ARMSmallPage\n else cns x\" in exI, simp)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some ARMLargePage\n else cns x\" in exI, simp)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some ARMSection\n else cns x\" in exI, simp)\n apply (rule_tac x=\"\\cns x. if x \\ set ?al then Some ARMSuperSection\n else cns x\" in exI, simp)\n apply (rule_tac x=id in exI, simp)+\n done\nqed\n\nlemma new_cap_addrs_fold':\n \"1 \\ n \\\n map (\\n. ptr + (n << objBitsKO ko)) [0.e.n - 1] =\n new_cap_addrs (unat n) ptr ko\"\n by (clarsimp simp:new_cap_addrs_def ptr_add_def upto_enum_red'\n shiftl_t2n power_add field_simps)\n\nlemma objBitsKO_gt_0: \"0 < objBitsKO ko\"\n apply (case_tac ko)\n apply (simp_all add: objBits_simps' pageBits_def)\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object)\n apply (simp_all add:archObjSize_def pageBits_def pteBits_def pdeBits_def)\n done\n\nlemma kheap_ekheap_double_gets:\n \"(\\rv erv rv'. \\pspace_relation rv rv'; ekheap_relation erv rv'\\\n \\ corres r (R rv erv) (R' rv') (b rv erv) (d rv')) \\\n corres r (\\s. R (kheap s) (ekheap s) s) (\\s. R' (ksPSpace s) s)\n (do x \\ gets kheap; xa \\ gets ekheap; b x xa od) (gets ksPSpace >>= d)\"\n apply (rule corres_symb_exec_l)\n apply (rule corres_guard_imp)\n apply (rule_tac r'= \"\\erv rv'. ekheap_relation erv rv' \\ pspace_relation x rv'\"\n in corres_split)\n apply (subst corres_gets[where P=\"\\s. x = kheap s\" and P'=\\])\n apply clarsimp\n apply (simp add: state_relation_def)\n apply clarsimp\n apply assumption\n apply (wp gets_exs_valid | simp)+\n done\n\n(*\n\nSplit out the extended operation that sets the etcb domains.\n\nThis allows the existing corres proofs in this file to more-or-less go\nthrough as they stand.\n\nA more principled fix would be to change the abstract spec and\ngeneralise init_arch_objects to initialise other object types.\n\n*)\n\ndefinition retype_region2_ext :: \"obj_ref list \\ Structures_A.apiobject_type \\ unit det_ext_monad\" where\n \"retype_region2_ext ptrs type \\ modify (\\s. ekheap_update (foldr (\\p ekh. (ekh(p := default_ext type default_domain))) ptrs) s)\"\n\ncrunch all_but_exst[wp]: retype_region2_ext \"all_but_exst P\"\ncrunch (empty_fail) empty_fail[wp]: retype_region2_ext\n\nend\n\ninterpretation retype_region2_ext_extended: is_extended \"retype_region2_ext ptrs type\"\n by (unfold_locales; wp)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n \"retype_region2_extra_ext ptrs type \\\n when (type = Structures_A.TCBObject) (do\n cdom \\ gets cur_domain;\n mapM_x (ethread_set (\\tcb. tcb\\tcb_domain := cdom\\)) ptrs\n od)\"\n\ncrunch all_but_exst[wp]: retype_region2_extra_ext \"all_but_exst P\" (wp: mapM_x_wp)\ncrunch (empty_fail) empty_fail[wp]: retype_region2_extra_ext (wp: mapM_x_wp)\n\nend\n\ninterpretation retype_region2_extra_ext_extended: is_extended \"retype_region2_extra_ext ptrs type\"\n by (unfold_locales; wp)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n retype_region2 :: \"obj_ref \\ nat \\ nat \\ Structures_A.apiobject_type \\ bool \\ (obj_ref list,'z::state_ext) s_monad\"\nwhere\n \"retype_region2 ptr numObjects o_bits type dev \\ do\n obj_size \\ return $ 2 ^ obj_bits_api type o_bits;\n ptrs \\ return $ map (\\p. ptr_add ptr (p * obj_size)) [0..< numObjects];\n when (type \\ Structures_A.Untyped) (do\n kh \\ gets kheap;\n kh' \\ return $ foldr (\\p kh. kh(p \\ default_object type dev o_bits)) ptrs kh;\n do_extended_op (retype_region2_ext ptrs type);\n modify $ kheap_update (K kh')\n od);\n return $ ptrs\n od\"\n\nlemma retype_region_ext_modify_kheap_futz:\n \"(retype_region2_extra_ext ptrs type :: (unit, det_ext) s_monad) >>= (\\_. modify (kheap_update f))\n = (modify (kheap_update f) >>= (\\_. retype_region2_extra_ext ptrs type))\"\n apply (clarsimp simp: retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def when_def bind_assoc)\n apply (subst oblivious_modify_swap)\n defer\n apply (simp add: bind_assoc)\n apply (rule oblivious_bind)\n apply simp\n apply (rule oblivious_mapM_x)\n apply (clarsimp simp: ethread_set_def set_eobject_def)\n apply (rule oblivious_bind)\n apply (simp add: gets_the_def)\n apply (rule oblivious_bind)\n apply (clarsimp simp: get_etcb_def)\n apply simp\n apply (simp add: modify_def[symmetric])\ndone\n\nlemmas retype_region_ext_modify_kheap_futz' =\n fun_cong[OF arg_cong[where f=NonDetMonad.bind,\n OF retype_region_ext_modify_kheap_futz[symmetric]], simplified bind_assoc]\n\nlemma foldr_upd_app_if_eta_futz:\n \"foldr (\\p ps. ps(p \\ f p)) as = (\\g x. if x \\ set as then Some (f x) else g x)\"\napply (rule ext)\napply (rule foldr_upd_app_if)\ndone\n\nlemma modify_ekheap_update_comp_futz:\n \"modify (ekheap_update (f \\ g)) = modify (ekheap_update g) >>= (K (modify (ekheap_update f)))\"\nby (simp add: o_def modify_def bind_def gets_def get_def put_def)\n\nlemma mapM_x_modify_futz:\n assumes \"\\ptr\\set ptrs. ekheap s ptr \\ None\"\n shows \"mapM_x (ethread_set F) (rev ptrs) s\n = modify (ekheap_update (foldr (\\p ekh. ekh(p := Some (F (the (ekh p))))) ptrs)) s\" (is \"?lhs ptrs s = ?rhs ptrs s\")\nusing assms\nproof(induct ptrs arbitrary: s)\n case Nil thus ?case by (simp add: mapM_x_Nil return_def simpler_modify_def)\nnext\n case (Cons ptr ptrs s)\n have \"?rhs (ptr # ptrs) s\n = (do modify (ekheap_update (foldr (\\p ekh. ekh(p \\ F (the (ekh p)))) ptrs));\n modify (ekheap_update (\\ekh. ekh(ptr \\ F (the (ekh ptr)))))\n od) s\"\n by (simp only: foldr_Cons modify_ekheap_update_comp_futz) simp\n also have \"... = (do ?lhs ptrs;\n modify (ekheap_update (\\ekh. ekh(ptr \\ F (the (ekh ptr)))))\n od) s\"\n apply (rule monad_eq_split_tail)\n apply simp\n apply (rule Cons.hyps[symmetric])\n using Cons.prems\n apply force\n done\n also have \"... = ?lhs (ptr # ptrs) s\"\n apply (simp add: mapM_x_append mapM_x_singleton)\n apply (rule monad_eq_split2[OF refl, where\n P=\"\\s. \\ptr\\set (ptr # ptrs). ekheap s ptr \\ None\"\n and Q=\"\\_ s. ekheap s ptr \\ None\"])\n apply (simp add: ethread_set_def\n assert_opt_def get_etcb_def gets_the_def gets_def get_def modify_def put_def set_eobject_def\n bind_def fail_def return_def split_def\n split: option.splits)\n apply ((wp mapM_x_wp[OF _ subset_refl] | simp add: ethread_set_def set_eobject_def)+)[1]\n using Cons.prems\n apply force\n done\n finally show ?case by (rule sym)\nqed\n\nlemma awkward_fold_futz:\n \"fold (\\p ekh. ekh(p \\ the (ekh p)\\tcb_domain := cur_domain s\\)) ptrs ekh\n = (\\x. if x \\ set ptrs then Some ((the (ekh x))\\tcb_domain := cur_domain s\\) else ekh x)\"\nby (induct ptrs arbitrary: ekh) (simp_all add: fun_eq_iff)\n\nlemma retype_region2_ext_retype_region_ext_futz:\n \"retype_region2_ext ptrs type >>= (\\_. retype_region2_extra_ext ptrs type)\n = retype_region_ext ptrs type\"\nproof(cases type)\n case TCBObject\n have complete_futz:\n \"\\F x. modify (ekheap_update (\\_. F (cur_domain x) (ekheap x))) x = modify (ekheap_update (\\ekh. F (cur_domain x) ekh)) x\"\n by (simp add: modify_def get_def get_etcb_def put_def bind_def return_def)\n have second_futz:\n \"\\f G.\n do modify (ekheap_update f);\n cdom \\ gets (\\s. cur_domain s);\n G cdom\n od =\n do cdom \\ gets (\\s. cur_domain s);\n modify (ekheap_update f);\n G cdom\n od\"\n by (simp add: bind_def gets_def get_def return_def simpler_modify_def)\n from TCBObject show ?thesis\n apply (clarsimp simp: retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def when_def bind_assoc)\n apply (clarsimp simp: exec_gets fun_eq_iff)\n apply (subst complete_futz)\n apply (simp add: second_futz[simplified] exec_gets)\n apply (simp add: default_ext_def exec_modify)\n apply (subst mapM_x_modify_futz[where ptrs=\"rev ptrs\", simplified])\n apply (simp add: foldr_upd_app_if_eta_futz)\n apply (simp add: modify_def exec_get put_def o_def)\n apply (simp add: foldr_upd_app_if_eta_futz foldr_conv_fold awkward_fold_futz)\n apply (simp cong: if_cong)\n done\nqed (auto simp: fun_eq_iff retype_region_ext_def retype_region2_ext_def retype_region2_extra_ext_def\n put_def gets_def get_def bind_def return_def mk_ef_def modify_def foldr_upd_app_if' when_def default_ext_def)\n\nlemma retype_region2_ext_retype_region:\n \"(retype_region ptr numObjects o_bits type dev :: (obj_ref list, det_ext) s_monad)\n = (do ptrs \\ retype_region2 ptr numObjects o_bits type dev;\n retype_region2_extra_ext ptrs type;\n return ptrs\n od)\"\napply (clarsimp simp: retype_region_def retype_region2_def when_def bind_assoc)\n apply safe\n defer\n apply (simp add: retype_region2_extra_ext_def)\napply (subst retype_region_ext_modify_kheap_futz'[simplified bind_assoc])\napply (subst retype_region2_ext_retype_region_ext_futz[symmetric])\napply (simp add: bind_assoc)\ndone\n\nlemma getObject_tcb_gets:\n \"getObject addr >>= (\\x::tcb. gets proj >>= (\\y. G x y))\n = gets proj >>= (\\y. getObject addr >>= (\\x. G x y))\"\nby (auto simp: exec_gets fun_eq_iff intro: bind_apply_cong dest!: in_inv_by_hoareD[OF getObject_inv_tcb])\n\nlemma setObject_tcb_gets_ksCurDomain:\n \"setObject addr (tcb::tcb) >>= (\\_. gets ksCurDomain >>= G)\n = gets ksCurDomain >>= (\\x. setObject addr tcb >>= (\\_. G x))\"\napply (clarsimp simp: exec_gets fun_eq_iff)\napply (rule bind_apply_cong)\n apply simp\napply (drule_tac P1=\"\\cdom. cdom = ksCurDomain x\" in use_valid[OF _ setObject_cd_inv])\napply (simp_all add: exec_gets)\ndone\n\nlemma curDomain_mapM_x_futz:\n \"curDomain >>= (\\cdom. mapM_x (threadSet (F cdom)) addrs)\n = mapM_x (\\addr. curDomain >>= (\\cdom. threadSet (F cdom) addr)) addrs\"\nproof(induct addrs)\n case Nil thus ?case\n by (simp add: curDomain_def mapM_x_def sequence_x_def bind_def gets_def get_def return_def)\nnext\n case (Cons addr addrs)\n have H: \"\\G. do cdom \\ curDomain;\n _ \\ threadSet (F cdom) addr;\n G cdom\n od\n = do cdom \\ curDomain;\n threadSet (F cdom) addr;\n cdom \\ curDomain;\n G cdom\n od\"\n by (simp add: bind_assoc curDomain_def threadSet_def setObject_tcb_gets_ksCurDomain\n getObject_tcb_gets double_gets_drop_regets)\n from Cons.hyps show ?case\n apply (simp add: mapM_x_def sequence_x_def)\n apply (simp add: bind_assoc foldr_map o_def)\n apply (subst H)\n apply (simp add: mapM_x_def sequence_x_def)\n done\nqed\n\n(*\n\nThe existing proof continues below.\n\n*)\n\nlemma modify_ekheap_update_ekheap:\n \"modify (\\s. ekheap_update f s) = do s \\ gets ekheap; modify (\\s'. s'\\ekheap := f s\\) od\"\nby (simp add: modify_def gets_def get_def put_def bind_def return_def split_def fun_eq_iff)\n\nlemma corres_retype':\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us =\n objBitsKO ko + gbits\"\n and check: \"(sz < obj_bits_api (APIType_map2 ty) us)\n = (sz < objBitsKO ko + gbits)\"\n and usv: \"APIType_map2 ty = Structures_A.CapTableObject \\ 0 < us\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype\n (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n shows \"corres (\\rv rv'. rv' = g rv)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s)\n (retype_region2 ptr n us (APIType_map2 ty) dev)\n (do addrs \\ createObjects ptr n ko gbits;\n _ \\ modify (update_gs (APIType_map2 ty) us (set addrs));\n return (g addrs) od)\"\n (is \"corres ?r ?P ?P' ?C ?A\")\nproof -\n note data_map_insert_def[simp del]\n have not_zero':\"((of_nat n)::word32) \\ 0\"\n by (rule range_cover_not_zero[OF not_zero cover])\n have shiftr_not_zero:\" ((of_nat n)::word32) << gbits \\ 0\"\n apply (rule range_cover_not_zero_shift[OF not_zero cover])\n apply (simp add:obj_bits_api)\n done\n have unat_of_nat_shift:\"unat (((of_nat n)::word32) << gbits) =\n (n * 2^ gbits)\"\n apply (rule range_cover.unat_of_nat_n_shift[OF cover])\n using obj_bits_api\n apply simp\n done\n have unat_of_nat_shift':\n \"unat (((of_nat n)::word32) * 2^(gbits + objBitsKO ko)) =\n n * 2^(gbits + objBitsKO ko)\"\n apply (subst mult.commute)\n apply (simp add:shiftl_t2n[symmetric])\n apply (rule range_cover.unat_of_nat_n_shift[OF cover])\n using obj_bits_api\n apply simp\n done\n have unat_of_nat_n':\n \"unat (((of_nat n)::word32) * 2 ^ (gbits + objBitsKO ko)) \\ 0\"\n by (simp add:unat_of_nat_shift' not_zero)\n have bound:\"obj_bits_api (APIType_map2 ty) us \\ sz\"\n using cover\n by (simp add:range_cover_def)\n have n_estimate: \"n < 2 ^ (word_bits - (objBitsKO ko + gbits))\"\n apply (rule le_less_trans)\n apply (rule range_cover.range_cover_n_le(2)[OF cover])\n apply (rule power_strict_increasing)\n apply (simp add:obj_bits_api ko)\n apply (rule diff_less_mono)\n using cover obj_bits_api\n apply (simp_all add:range_cover_def ko word_bits_def)\n done\n\n have set_retype_addrs_fold:\n \"image (\\n. ptr + 2 ^ obj_bits_api (APIType_map2 ty) us * n)\n {x. x \\ of_nat n - 1} =\n set (retype_addrs ptr (APIType_map2 ty) n us)\"\n apply (clarsimp simp: retype_addrs_def image_def Bex_def ptr_add_def\n Collect_eq)\n apply (rule iffI)\n apply (clarsimp simp: field_simps word_le_nat_alt)\n apply (rule_tac x=\"unat x\" in exI)\n apply (simp add: unat_sub_if_size range_cover.unat_of_nat_n[OF cover]\n not_le not_zero\n split: if_split_asm)\n apply (clarsimp simp: field_simps word_le_nat_alt)\n apply (rule_tac x=\"of_nat x\" in exI)\n apply (simp add: unat_sub_if_size range_cover.unat_of_nat_n[OF cover])\n apply (rule nat_le_Suc_less_imp)\n apply (metis le_unat_uoi nat_less_le not_le_imp_less)\n done\n\n have new_caps_adds_fold:\n \"map (\\n. ptr + 2 ^ objBitsKO ko * n) [0.e.2 ^ gbits * of_nat n - 1] =\n new_cap_addrs (2 ^ gbits * n) ptr ko\"\n apply (simp add: new_cap_addrs_def shiftl_t2n)\n apply (subgoal_tac \"1 \\ (2::word32) ^ gbits * of_nat n\")\n apply (simp add: upto_enum_red' o_def)\n apply (rule arg_cong2[where f=map, OF refl])\n apply (rule arg_cong2[where f=upt, OF refl])\n apply (metis mult.commute shiftl_t2n unat_of_nat_shift)\n using shiftr_not_zero\n apply (simp add: shiftl_t2n)\n apply (metis word_less_1 word_not_le)\n done\n\n from aligned\n have al': \"is_aligned ptr (obj_bits_api (APIType_map2 ty) us)\"\n by (simp add: obj_bits_api ko)\n show ?thesis\n apply (simp add: when_def retype_region2_def createObjects'_def\n createObjects_def aligned obj_bits_api[symmetric]\n ko[symmetric] al' shiftl_t2n data_map_insert_def[symmetric]\n is_aligned_mask[symmetric] split_def unless_def\n lookupAround2_pspace_no check\n split del: if_split)\n apply (subst retype_addrs_fold)+\n apply (subst if_P)\n using ko\n apply (clarsimp simp: makeObjectKO_def)\n apply (simp add: bind_assoc retype_region2_ext_def)\n apply (rule corres_guard_imp)\n apply (subst modify_ekheap_update_ekheap)\n apply (simp only: bind_assoc)\n apply (rule kheap_ekheap_double_gets)\n apply (rule corres_symb_exec_r)\n apply (simp add: not_less modify_modify bind_assoc[symmetric]\n obj_bits_api[symmetric] shiftl_t2n upto_enum_red'\n range_cover.unat_of_nat_n[OF cover])\n apply (rule corres_split_nor[OF _ corres_trivial])\n apply (rename_tac x eps ps)\n apply (rule_tac P=\"\\s. x = kheap s \\ eps = ekheap (s) \\ ?P s\" and\n P'=\"\\s. ps = ksPSpace s \\ ?P' s\" in corres_modify)\n apply (simp add: set_retype_addrs_fold new_caps_adds_fold)\n apply (erule retype_state_relation[OF _ _ _ _ _ _ _ _ _ cover _ _ orr],\n simp_all add: ko not_zero obj_bits_api\n bound[simplified obj_bits_api ko])[1]\n apply (clarsimp simp: retype_addrs_fold[symmetric] ptr_add_def upto_enum_red' not_zero'\n range_cover.unat_of_nat_n[OF cover] word_le_sub1\n simp del: word_of_nat_eq_0_iff)\n apply (rule_tac f=g in arg_cong)\n apply clarsimp\n apply wp+\n apply (clarsimp split: option.splits)\n apply (intro conjI impI)\n apply (clarsimp|wp)+\n apply (clarsimp split: option.splits)\n apply wpsimp\n apply (clarsimp split: option.splits)\n apply (intro conjI impI)\n apply wp\n apply (clarsimp simp:lookupAround2_char1)\n apply wp\n apply (clarsimp simp: obj_bits_api ko)\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (rule_tac x1 = a in ccontr[OF in_empty_interE])\n apply simp\n apply (clarsimp simp: not_less shiftL_nat)\n apply (erule order_trans)\n apply (subst p_assoc_help)\n apply (subst word_plus_and_or_coroll2[symmetric,where w = \"mask sz\"])\n apply (subst add.commute)\n apply (subst add.assoc)\n apply (rule word_plus_mono_right)\n using cover\n apply -\n apply (rule iffD2[OF word_le_nat_alt])\n apply (subst word_of_nat_minus)\n using not_zero\n apply simp\n apply (rule le_trans[OF unat_plus_gt])\n apply simp\n apply (subst unat_minus_one)\n apply (subst mult.commute)\n apply (rule word_power_nonzero_32)\n apply (rule of_nat_less_pow_32[OF n_estimate])\n apply (simp add:word_bits_def objBitsKO_gt_0 ko)\n apply (simp add:range_cover_def obj_bits_api ko word_bits_def)\n apply (cut_tac not_zero',clarsimp simp:ko)\n apply(clarsimp simp:field_simps ko)\n apply (subst unat_sub[OF word_1_le_power])\n apply (simp add:range_cover_def)\n apply (subst diff_add_assoc[symmetric])\n apply (cut_tac unat_of_nat_n',simp add:ko)\n apply (clarsimp simp: obj_bits_api ko)\n apply (rule diff_le_mono)\n apply (frule range_cover.range_cover_compare_bound)\n apply (cut_tac obj_bits_api unat_of_nat_shift')\n apply (clarsimp simp:add.commute range_cover_def ko)\n apply (rule is_aligned_no_wrap'[OF is_aligned_neg_mask,OF le_refl ])\n apply (simp add:range_cover_def domI)+\n done\nqed\n\nlemma createObjects_corres':\n \"\\corres r P P' f (createObjects a b ko d); ko = injectKO val\\\n \\ corres dc P P' f (createObjects' a b ko d)\"\n apply (clarsimp simp:corres_underlying_def createObjects_def return_def)\n apply (rule conjI)\n apply (clarsimp simp:bind_def split_def)\n apply (drule(1) bspec)\n apply (clarsimp simp:image_def)\n apply (drule(1) bspec)\n apply clarsimp\n apply (erule bexI[rotated])\n apply simp\n apply (clarsimp simp:bind_def split_def image_def)\n apply (drule(1) bspec|clarsimp)+\n done\n\nlemmas retype_aligned_distinct'' = retype_aligned_distinct'\n [unfolded foldr_upd_app_if[folded data_map_insert_def]]\n\nlemma retype_ko_wp_at':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"ko_wp_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (if p \\ set (new_cap_addrs n ptr obj) then P obj\n else ko_wp_at' P p s)\"\n apply (subst foldr_upd_app_if[folded data_map_insert_def])\n apply (rule foldr_update_ko_wp_at' [OF vs])\n apply (simp add: retype_aligned_distinct'' [OF vs pn cover])+\n apply (rule new_cap_addrs_aligned)\n using cover\n apply (simp add:range_cover_def cover)\n done\n\nlemma retype_obj_at':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"obj_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (if p \\ set (new_cap_addrs n ptr obj) then (\\ko. projectKO_opt obj = Some ko \\ P ko)\n else obj_at' P p s)\"\n unfolding obj_at'_real_def\n apply (rule retype_ko_wp_at'[OF vs pn cover])\ndone\n\nlemma retype_obj_at_disj':\n assumes vs: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pn: \"pspace_no_overlap' ptr sz s\"\n and cover: \"range_cover ptr sz (objBitsKO obj) n\"\n shows\n \"obj_at' P p (s \\ksPSpace := foldr (\\addr. data_map_insert addr obj)\n (new_cap_addrs n ptr obj) (ksPSpace s)\\)\n = (obj_at' P p s \\ p \\ set (new_cap_addrs n ptr obj)\n \\ (\\ko. projectKO_opt obj = Some ko \\ P ko))\"\n apply (simp add: retype_obj_at' [OF vs pn cover])\n apply (safe, simp_all)\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover]])\n apply (insert pspace_no_overlap_disjoint' [OF vs(1) pn ])\n apply (clarsimp simp: obj_at'_def)\n apply (rule_tac x1 = p in ccontr[OF in_empty_interE])\n apply (simp add:ptr_add_def p_assoc_help domI)+\n done\n\ndeclare word_unat_power[symmetric,simp]\n\nlemma createObjects_ko_at_strg:\n fixes ptr :: word32\n assumes cover: \"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n assumes not_0: \"n\\ 0\"\n assumes pi: \"projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n ko gbits\n \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits. ko_at' val (x + (offs << objBitsKO ko)) s\\\"\nproof -\n have shiftr_not_zero:\" 1 \\ ((of_nat n)::word32) << gbits\"\n using range_cover_not_zero_shift[OF not_0 cover,where gbits = gbits]\n apply -\n apply (simp add:word_le_sub1)\n done\n note unat_of_nat_shiftl = range_cover.unat_of_nat_n_shift[OF cover,where gbits = gbits,simplified]\n note word_of_nat_eq_0_iff[simp del]\n have in_new:\"\\idx offs. \\idx \\ of_nat n - 1;offs<2 ^ gbits\\\n \\ ptr + (idx << objBitsKO ko + gbits) + (offs << objBitsKO ko)\n \\ set (new_cap_addrs (n * 2 ^ gbits) ptr ko)\"\n apply (insert range_cover_not_zero[OF not_0 cover] not_0)\n apply (clarsimp simp:new_cap_addrs_def image_def)\n apply (rule_tac x =\"unat (2 ^ gbits * idx + offs)\" in bexI)\n apply (subst add.commute)\n apply (simp add:shiftl_shiftl[symmetric])\n apply (simp add:shiftl_t2n distrib_left[symmetric])\n apply simp\n apply (rule unat_less_helper)\n apply (rule less_le_trans)\n apply (erule word_plus_strict_mono_right)\n apply (subst distrib_left[where c = \"1 :: 32 word\",symmetric,simplified])\n apply (subst mult.commute[where a = \"2^gbits\"])+\n apply (insert cover)\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (simp add:p2_gt_0)\n apply (clarsimp simp:range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (rule range_cover.range_cover_le_n_less)\n apply simp\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper)\n apply (erule order_trans[OF _ word_sub_1_le])\n apply (simp add:range_cover_not_zero[OF not_0 cover])\n apply (simp add:word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (erule less_le_trans[OF range_cover.range_cover_le_n_less(1)])\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper[OF inc_le])\n apply (simp add:word_leq_minus_one_le)\n apply (simp add:word_bits_def)\n apply (rule no_plus_overflow_neg)\n apply (rule less_le_trans[where y = \"of_nat n\"])\n apply unat_arith\n using range_cover.range_cover_n_less[OF cover]\n apply (simp add:word_bits_def)\n apply (subst distrib_left[where c = \"1 :: 32 word\",symmetric,simplified])\n apply (subst mult.commute)\n apply simp\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (simp add:p2_gt_0)\n apply (simp add:range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (rule range_cover.range_cover_le_n_less)\n apply simp\n apply (subst unat_power_lower)\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (simp add:field_simps)\n apply (rule unat_le_helper)\n apply unat_arith\n apply (simp add:word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"objBitsKO ko \"])\n apply simp\n apply simp\n apply (rule less_le_trans)\n apply (erule range_cover.range_cover_le_n_less)\n apply (simp add:range_cover.unat_of_nat_n[OF cover])\n apply (simp add: unat_le_helper)\n apply (simp add:word_bits_def)\n apply unat_arith\n done\n show ?thesis\n apply (simp add: split_def createObjects_def lookupAround2_pspace_no\n alignError_def unless_def createObjects'_def)\n apply (rule hoare_pre)\n apply (wp|simp add:data_map_insert_def[symmetric]\n cong: if_cong del: fun_upd_apply data_map_insert_def)+\n apply (wpc|wp|clarsimp simp del:fun_upd_apply)+\n apply (subst new_cap_addrs_fold'[OF shiftr_not_zero])+\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_obj_at_disj')\n apply (simp add:valid_pspace'_def unat_of_nat_shiftl)+\n apply (rule range_cover_rel[OF cover])\n apply simp+\n apply (subst retype_obj_at_disj')\n apply (simp add:valid_pspace'_def unat_of_nat_shiftl)+\n apply (rule range_cover_rel[OF cover])\n apply simp+\n using range_cover.unat_of_nat_n_shift[OF cover,where gbits = gbits,simplified] pi\n apply (simp add: in_new)\n done\nqed\n\nlemma createObjects_ko_at:\n fixes ptr :: word32\n assumes cover: \"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n assumes not_0: \"n\\ 0\"\n assumes pi: \"projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n ko gbits\n \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits. ko_at' val (x + (offs << objBitsKO ko)) s\\\"\n by (wp createObjects_ko_at_strg[OF cover not_0 pi],fastforce)\n\nlemma createObjects_obj_at:\n fixes ptr :: word32 and val :: \"'a :: pspace_storable\"\n assumes cover:\"range_cover ptr sz ((objBitsKO ko) + gbits) n\"\n and not_0:\"n \\ 0\"\n and pi: \"\\(val::'a). projectKO_opt ko = Some val\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n ko gbits \\\\r s. \\x \\ set r. \\offs < 2 ^ gbits.\n obj_at' (\\(x::'a). True) (x + (offs << objBitsKO ko)) s\\\"\n apply (rule exE[OF pi])\n apply (erule_tac val1 = x in\n hoare_post_imp [OF _ createObjects_ko_at [OF cover not_0 ],rotated])\n apply (intro allI ballI impI)\n apply (drule(1) bspec)\n apply (drule spec, drule(1) mp)\n apply (clarsimp elim!: obj_at'_weakenE)\n done\n\n(* until we figure out what we really need of page\n mappings it's just alignment, which, fortunately,\n is trivial *)\nlemma createObjects_aligned:\n assumes al: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and bound :\"n < 2 ^ word_bits\" \"n\\0\"\n and bound':\"objBitsKO ko + gbits < word_bits\"\n shows \"\\\\\\ createObjects ptr n ko gbits\n \\\\rv s. \\x \\ set rv. is_aligned x (objBitsKO ko + gbits)\\\"\n apply (rule hoare_strengthen_post)\n apply (rule createObjects_ret[OF bound])\n apply (clarsimp dest!: less_two_pow_divD)\n apply (rule is_aligned_ptr_add_helper[OF al])\n apply (simp_all add:bound')\n done\n\nlemma createObjects_aligned2:\n \"\\\\s. is_aligned ptr (objBitsKO ko + gbits) \\ n < 2 ^ word_bits \\ n \\ 0\n \\ aln < word_bits\n \\ aln = objBitsKO ko + gbits\\\n createObjects ptr n ko gbits\n \\\\rv s. \\x \\ set rv. is_aligned x aln\\\"\n apply (rule hoare_name_pre_state)\n apply simp\n apply (rule hoare_pre, wp createObjects_aligned, simp_all)\n done\n\nlemma range_cover_n_wb:\n \"range_cover (ptr :: obj_ref) sz us n \\ n < 2 ^ word_bits\"\n apply (rule order_le_less_trans, erule range_cover.range_cover_n_le(2))\n apply (clarsimp simp: range_cover_def)\n apply (simp add: word_bits_def)\n done\n\nlemma createObjects_nonzero:\n assumes not_0: \"n \\ 0\"\n assumes cover:\"range_cover ptr sz ((objBitsKO ko) + bits) n\"\n shows \"\\\\s. ptr \\ 0\\\n createObjects ptr n ko bits\n \\\\rv s. \\p \\ set rv. p \\ 0\\\"\n apply (insert not_0)\n apply (rule hoare_pre)\n apply (rule hoare_gen_asm [where P = \"ptr \\ 0\"])\n using cover\n apply (clarsimp simp:range_cover_def)\n apply (erule is_aligned_get_word_bits,simp_all)\n apply (rule hoare_post_imp [OF _ createObjects_ret])\n apply (simp add: ptr_add_def)\n apply (intro allI impI ballI)\n apply (simp add:power_add[symmetric] mult.assoc)\n apply (drule(1) range_cover_no_0[OF _ cover])\n apply (simp add: objBits_def)\n apply (simp add: range_cover_n_wb[OF cover])\n apply simp\n done\n\nlemma objBits_if_dev:\n \"objBitsKO (if dev then KOUserDataDevice else KOUserData) = pageBits\"\n by (simp add: objBitsKO_def)\n\nlemma cwo_ret:\n assumes cover:\"range_cover ptr sz v n\"\n assumes not_0:\"n\\ 0\"\n shows result: \"\\pspace_no_overlap' ptr sz and valid_pspace' and K (v = 12 + bs)\\\n createObjects ptr n (if dev then KOUserDataDevice else KOUserData) bs\n \\\\rv s. \\x\\set rv. \\p<2 ^ (v - pageBits).\n typ_at' (if dev then UserDataDeviceT else UserDataT) (x + p * 2 ^ pageBits) s\\\"\nproof -\n note create_objs_device = hoare_post_imp [OF _ hoare_conj [OF createObjects_ret\n createObjects_ko_at[where val = UserDataDevice,simplified]]]\n\n note create_objs_normal = hoare_post_imp [OF _ hoare_conj [OF createObjects_ret\n createObjects_ko_at[where val = UserData,simplified]]]\n\nshow ?thesis\n apply (cases dev)\n apply (rule hoare_gen_asm)\n apply (rule hoare_pre)\n apply (rule create_objs_device)\n apply (clarsimp simp add: pageBits_def)\n apply (drule bspec, simp, drule spec, drule(1) mp)\n apply (simp add: typ_at'_def obj_at'_real_def objBits_simps pageBits_def shiftl_t2n field_simps)\n apply (erule ko_wp_at'_weakenE)\n apply (clarsimp simp add: projectKO_opts_defs split: kernel_object.splits)\n apply (rule le_less_trans[OF _ power_strict_increasing])\n apply (rule range_cover.range_cover_n_le(1)[OF cover])\n apply (simp add: word_bits_def pageBits_def not_0)+\n apply (rule range_cover_rel[OF cover])\n apply (simp add: objBitsKO_def pageBits_def not_0)+\n using not_0 apply simp_all\n apply (clarsimp simp add: projectKO_def return_def\n projectKO_opts_defs split: kernel_object.splits)\n apply (rule hoare_gen_asm[unfolded K_def])\n apply (rule hoare_pre)\n apply (rule create_objs_normal)\n apply (clarsimp simp add: pageBits_def)\n apply (drule bspec, simp, drule spec, drule(1) mp)\n apply (simp add: typ_at'_def obj_at'_real_def objBits_simps pageBits_def shiftl_t2n field_simps)\n apply (erule ko_wp_at'_weakenE)\n apply (clarsimp simp add: projectKO_opts_defs split: kernel_object.splits)\n apply (rule le_less_trans[OF _ power_strict_increasing])\n apply (rule range_cover.range_cover_n_le(1)[OF cover])\n apply (simp add: word_bits_def pageBits_def not_0)+\n apply (rule range_cover_rel[OF cover])\n apply (simp add: objBitsKO_def pageBits_def not_0)+\n using not_0 apply simp_all\n apply (clarsimp simp add: projectKO_def return_def\n projectKO_opts_defs split: kernel_object.splits)\n done\nqed\nlemmas capFreeIndex_update_valid_untyped' =\n capFreeIndex_update_valid_cap'[unfolded valid_cap'_def,simplified,THEN conjunct2,THEN conjunct1]\n\nlemma createNewCaps_valid_cap:\n fixes ptr :: word32\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n \"\n assumes not_0: \"n \\ 0\"\n assumes ct: \"ty = APIObjectType ArchTypes_H.CapTableObject \\ 0 < us\"\n \"ty = APIObjectType apiobject_type.Untyped \\ minUntypedSizeBits \\ us \\ us \\ maxUntypedSizeBits\"\n assumes ptr: \" ptr \\ 0\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createNewCaps ty ptr n us dev\n \\\\r s. (\\cap \\ set r. s \\' cap)\\\"\nproof -\n note blah[simp del] = untyped_range.simps usable_untyped_range.simps atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff split_paired_Ex\n note if_split_def[split del] = if_splits\n\n show ?thesis\n proof(cases \"Types_H.toAPIType ty\")\n case None thus ?thesis\n using not_0\n apply (clarsimp simp: createNewCaps_def Arch_createNewCaps_def)\n using cover\n apply (simp add: range_cover_def)\n using cover\n apply (clarsimp simp: ARM_H.toAPIType_def APIType_capBits_def\n split: ARM_H.object_type.splits)\n\n \\ \\SmallPageObject\\\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits\n ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero[OF not_0 ,simplified]\n cwo_ret[OF _ not_0]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n \\ \\LargePageObject\\\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits\n ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero[OF not_0 ,simplified]\n cwo_ret[OF _ not_0]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n\n \\ \\SectionObject\\\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits\n ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero[OF not_0 ,simplified]\n cwo_ret[OF _ not_0]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n\n \\ \\SuperSectionObject\\\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits\n ball_conj_distrib)\n apply (wp createObjects_aligned2 createObjects_nonzero[OF not_0 ,simplified]\n cwo_ret[OF _ not_0]\n | simp add: objBits_if_dev pageBits_def ptr range_cover_n_wb)+\n apply (simp add:pageBits_def ptr word_bits_def)\n\n \\ \\PageTableObject\\\n apply wp\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits)\n apply (simp only: imp_conv_disj page_table_at'_def\n typ_at_to_obj_at_arches)\n apply (rule hoare_strengthen_post)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_aligned [OF _ range_cover.range_cover_n_less(1)\n [where 'a=32, unfolded word_bits_len_of, OF cover] not_0])\n apply (simp add:objBits_simps archObjSize_def ptBits_def pageBits_def\n pdeBits_def pteBits_def)+\n apply (simp add:range_cover_def word_bits_def)\n apply (rule createObjects_obj_at[where 'a =pte, OF _ not_0])\n apply (simp add:objBits_simps archObjSize_def ptBits_def pageBits_def\n pdeBits_def pteBits_def)+\n apply (simp add: projectKOs projectKO_opt_pte)\n apply simp\n apply (clarsimp simp: objBits_simps archObjSize_def ptBits_def pageBits_def\n pdeBits_def pteBits_def)\n apply clarsimp\n \\ \\PageDirectoryObject\\\n apply (wp hoare_vcg_const_Ball_lift)\n apply (wp mapM_x_wp' )\n apply (simp add: valid_cap'_def capAligned_def n_less_word_bits)\n apply (simp only: imp_conv_disj page_directory_at'_def\n typ_at_to_obj_at_arches)\n apply (rule hoare_strengthen_post)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_aligned [OF _ range_cover.range_cover_n_less(1)\n [where 'a=32, unfolded word_bits_len_of, OF cover] not_0])\n apply (simp add:objBits_simps archObjSize_def ptBits_def pageBits_def pdBits_def\n pdeBits_def pteBits_def)+\n apply (simp add:range_cover_def word_bits_def)\n apply (rule createObjects_obj_at [where 'a=pde, OF _ not_0])\n apply (simp add:objBits_simps archObjSize_def ptBits_def pageBits_def pdBits_def\n pdeBits_def pteBits_def)\n apply (simp add: projectKOs projectKO_opt_pde)\n apply simp\n apply (clarsimp simp: objBits_simps archObjSize_def pdBits_def pageBits_def\n pdeBits_def pteBits_def)\n apply clarsimp\n done\n next\n case (Some a) thus ?thesis\n proof(cases a)\n case Untyped with Some cover ct show ?thesis\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: ARM_H.toAPIType_def fromIntegral_def\n toInteger_nat fromInteger_nat APIType_capBits_def\n split: ARM_H.object_type.splits)\n apply wp\n apply (intro ballI)\n apply (clarsimp simp: image_def upto_enum_red' valid_cap'_def capAligned_def\n split: capability.splits)\n apply (drule word_leq_minus_one_le[rotated])\n apply (rule range_cover_not_zero[OF not_0 cover])\n apply (intro conjI)\n apply (rule is_aligned_add_multI[OF _ le_refl refl])\n apply (fastforce simp:range_cover_def word_bits_def)+\n apply (clarsimp simp:valid_untyped'_def ko_wp_at'_def obj_range'_def)\n apply (drule(1) pspace_no_overlapD'[rotated])\n apply (frule(1) range_cover_cell_subset)\n apply (erule disjE)\n apply (drule psubset_imp_subset)\n apply (drule(1) disjoint_subset2[rotated])\n apply (drule(1) disjoint_subset)\n apply (drule(1) range_cover_subset_not_empty)\n apply clarsimp+\n apply blast\n apply (drule(1) range_cover_no_0[OF ptr _ unat_less_helper])\n apply simp\n done\n next\n case TCBObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: ARM_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def curDomain_def\n split: ARM_H.object_type.splits)\n apply (wp mapM_x_wp' hoare_vcg_const_Ball_lift)+\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a = \"tcb\",OF _ not_0])\n using cover\n apply (clarsimp simp: ARM_H.toAPIType_def APIType_capBits_def objBits_simps\n split: ARM_H.object_type.splits)\n apply (simp add: projectKOs)\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_tcbI)\n done\n next\n case EndpointObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: ARM_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: ARM_H.object_type.splits)\n apply wp\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a=endpoint, OF _ not_0])\n using cover\n apply (clarsimp simp: ARM_H.toAPIType_def APIType_capBits_def objBits_simps\n split: ARM_H.object_type.splits)\n apply (simp add: projectKOs)\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_epI)\n done\n next\n case NotificationObject with Some cover ct show ?thesis\n including no_pre\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: ARM_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: ARM_H.object_type.splits)\n apply wp\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule createObjects_obj_at [where 'a=\"notification\", OF _ not_0])\n using cover\n apply (clarsimp simp: ARM_H.toAPIType_def APIType_capBits_def objBits_simps\n split: ARM_H.object_type.splits)\n apply (simp add: projectKOs)\n apply (clarsimp simp: valid_cap'_def objBits_simps)\n apply (fastforce intro: capAligned_ntfnI)\n done\n next\n case CapTableObject with Some cover ct show ?thesis\n apply (clarsimp simp: Arch_createNewCaps_def createNewCaps_def)\n apply (simp_all add: ARM_H.toAPIType_def\n fromIntegral_def toInteger_nat fromInteger_nat APIType_capBits_def\n split: ARM_H.object_type.splits)\n apply wp\n apply (clarsimp simp: ARM_H.toAPIType_def APIType_capBits_def objBits_simps\n split: ARM_H.object_type.split object_type.splits)\n apply (rule hoare_strengthen_post)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_aligned [OF _ _ not_0 ])\n apply ((clarsimp simp:objBits_simps range_cover_def range_cover.range_cover_n_less[where 'a=32, unfolded word_bits_len_of, OF cover])+)[3]\n apply (simp add: word_bits_def)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_ret [OF range_cover.range_cover_n_less(1)[where 'a=32, unfolded word_bits_len_of, OF cover] not_0])\n apply (rule createObjects_obj_at [where 'a=cte, OF _ not_0])\n apply (simp add: objBits_simps APIType_capBits_def)\n apply (simp add: projectKOs)\n apply simp\n apply (clarsimp simp: valid_cap'_def capAligned_def objBits_simps\n dest!: less_two_pow_divD)\n apply (thin_tac \"\\x\\S. is_aligned (p x) n\" for S p n)\n apply (intro conjI)\n apply ((simp add:range_cover_def word_bits_def)+)[2]\n apply (clarsimp simp: power_sub)\n apply (drule bspec, simp)\n apply (drule_tac x = \"addr && mask us\" in spec)\n apply (drule mp)\n apply simp\n apply (rule and_mask_less')\n apply (simp add: range_cover_def word_bits_def)\n apply (clarsimp simp add: shiftl_t2n)\n apply simp\n done\n qed\n qed\nqed\n\nlemma other_objs_default_relation:\n \"\\ case ty of Structures_A.EndpointObject \\ ko = injectKO (makeObject :: endpoint)\n | Structures_A.NotificationObject \\ ko = injectKO (makeObject :: Structures_H.notification)\n | Structures_A.TCBObject \\ ko = injectKO (makeObject :: tcb)\n | _ \\ False \\ \\\n obj_relation_retype (default_object ty dev n) ko\"\n apply (rule obj_relation_retype_other_obj)\n apply (clarsimp simp: default_object_def\n is_other_obj_relation_type_def\n split: Structures_A.apiobject_type.split_asm)\n apply (clarsimp simp: other_obj_relation_def default_object_def\n ep_relation_def ntfn_relation_def\n tcb_relation_def default_tcb_def makeObject_tcb\n makeObject_cte new_context_def newContext_def\n default_ep_def makeObject_endpoint default_notification_def\n makeObject_notification default_ntfn_def\n fault_rel_optionation_def\n initContext_def\n arch_tcb_context_get_def atcbContextGet_def\n default_arch_tcb_def newArchTCB_def\n arch_tcb_relation_def\n split: Structures_A.apiobject_type.split_asm)\n done\n\nlemma captable_relation_retype:\n \"n < word_bits \\\n obj_relation_retype (default_object Structures_A.CapTableObject dev n) (KOCTE makeObject)\"\n apply (clarsimp simp: obj_relation_retype_def default_object_def\n wf_empty_bits objBits_simps'\n dom_empty_cnode ex_with_length cte_level_bits_def)\n apply (rule conjI)\n defer\n apply (clarsimp simp: cte_relation_def empty_cnode_def makeObject_cte)\n apply (rule set_eqI, rule iffI)\n apply (clarsimp simp: cte_map_def')\n apply (rule_tac x=\"of_bl y\" in exI)\n apply (simp add: of_bl_length[where 'a=32, folded word_bits_def])\n apply (clarsimp simp: image_def cte_map_def')\n apply (rule_tac x=\"drop (word_bits - n) (to_bl xa)\" in exI)\n apply (simp add: of_drop_to_bl word_bits_def word_size)\n apply (simp add: less_mask_eq)\n done\n\nlemma pagetable_relation_retype:\n \"obj_relation_retype (default_object (ArchObject PageTableObj) dev n)\n (KOArch (KOPTE makeObject))\"\n apply (simp add: default_object_def default_arch_object_def\n makeObject_pte obj_relation_retype_def\n objBits_simps archObjSize_def\n pte_relation_def)\n apply (clarsimp simp: range_composition[symmetric]\n shiftl_t2n field_simps)\n apply (subst image_comp [symmetric, where g=ucast, unfolded o_def])\n apply (simp add: ucast_range_less pteBits_def)\n apply (fastforce simp:pte_relation_aligned_def)\n done\n\nlemma pagedirectory_relation_retype:\n \"obj_relation_retype (default_object (ArchObject PageDirectoryObj) dev n)\n (KOArch (KOPDE makeObject))\"\n apply (simp add: default_object_def default_arch_object_def\n makeObject_pde obj_relation_retype_def\n objBits_simps archObjSize_def\n pde_relation_def)\n apply (clarsimp simp: range_composition[symmetric]\n shiftl_t2n field_simps)\n apply (subst image_comp [symmetric, where g=ucast, unfolded o_def])\n apply (simp add: ucast_range_less pdeBits_def)\n apply (fastforce simp:pde_relation_aligned_def)\n done\n\nlemmas makeObjectKO_simps = makeObjectKO_def[split_simps ARM_H.object_type.split\n apiobject_type.split sum.split kernel_object.split ]\n\nlemma corres_retype:\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us = objBitsKO ko + gbits\"\n and tp: \"APIType_map2 ty \\ no_gs_types\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n shows \"corres (=)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s\n \\ (\\val. ko = injectKO val))\n (retype_region2 ptr n us (APIType_map2 ty) dev) (createObjects ptr n ko gbits)\"\n apply (rule corres_guard_imp)\n apply (rule_tac F = \"(\\val. ko = injectKO val)\" in corres_gen_asm2)\n apply (erule exE)\n apply (rule corres_rel_imp)\n apply (rule corres_retype'[where g=id and ty=ty and sz = sz,OF not_zero aligned _ _ _ ko\n ,simplified update_gs_id[OF tp] modify_id_return,simplified])\n using assms\n apply (simp_all add: objBits_def no_gs_types_def)\n apply auto\n done\n\nlemma init_arch_objects_APIType_map2:\n \"init_arch_objects (APIType_map2 (Inr ty)) ptr bits sz refs =\n (case ty of APIObjectType _ \\ return ()\n | _ \\ init_arch_objects (APIType_map2 (Inr ty)) ptr bits sz refs)\"\n apply (clarsimp split: ARM_H.object_type.split)\n apply (simp add: init_arch_objects_def APIType_map2_def\n split: apiobject_type.split)\n done\n\nlemma pde_relation_aligned_eq:\n \"\\is_aligned (pd::word32) 6; is_aligned pd' 6\\\n \\ pde_relation_aligned (pd + x >> 2) xa ya =\n pde_relation_aligned (pd' + x >> 2) xa ya\"\n apply (clarsimp simp: pde_relation_aligned_def is_aligned_mask mask_def\n split: ARM_H.pde.splits)\n apply word_bitwise\n apply auto\n done\n\nlemma copyGlobalMappings_corres:\n \"corres dc (valid_arch_state and valid_etcbs and pspace_aligned and page_directory_at pd)\n (valid_arch_state' and page_directory_at' pd)\n (copy_global_mappings pd)\n (copyGlobalMappings pd)\"\n apply (simp add: copy_global_mappings_def\n copyGlobalMappings_def\n objBits_simps archObjSize_def\n pd_bits_def pdBits_def mapM_x_mapM)\n apply (rule corres_guard_imp)\n apply (rule corres_split_eqr)\n apply (rule corres_trivial, clarsimp simp: state_relation_def arch_state_relation_def)\n apply (rule_tac F =\"is_aligned pd 6 \\ is_aligned global_pd 6\" in corres_gen_asm)\n apply (simp add: liftM_def[symmetric])\n apply (rule_tac S=\"(=)\" and r'=dc\n and Q=\"\\xs s. \\x \\ set xs. pde_at (global_pd + (x << 2)) s\n \\ pde_at (pd + (x << 2)) s \\ pspace_aligned s \\\n valid_etcbs s\"\n and Q'=\"\\xs s. \\x \\ set xs. pde_at' (global_pd + (x << 2)) s\n \\ pde_at' (pd + (x << 2)) s\"\n in corres_mapM_list_all2, (simp add: pdeBits_def)+)\n apply (rule corres_guard_imp, rule corres_split)\n apply (rule_tac getObject_PDE_corres[OF refl])\n apply (rule storePDE_corres[OF _ refl])\n apply clarsimp\n apply (drule(1) pde_relation_aligned_eq)\n apply fastforce\n apply (wp hoare_vcg_const_Ball_lift | simp)+\n apply (simp add: kernel_base_def ARM.pptrBase_def pptrBase_def list_all2_refl pageBits_def)\n apply wp+\n apply (clarsimp simp: valid_arch_state_def)\n apply (auto elim: page_directory_pde_atI is_aligned_weaken[OF pd_aligned])[1]\n apply (clarsimp simp: valid_arch_state'_def)\n apply (auto simp: le_less_trans elim!: page_directory_pde_atI'[simplified pageBits_def, simplified])\n done\n\n(* FIXME: move *)\nlemma copyGlobalMappings_cte_wp_at[wp]:\n \"\\\\s. P (cte_wp_at' P' p s)\\\n copyGlobalMappings pd\n \\\\rv s. P (cte_wp_at' P' p s)\\\"\n apply (simp add: copyGlobalMappings_def)\n apply (wp mapM_x_wp')\n done\n\ncrunch ct[wp]: copyGlobalMappings \"\\s. P (ksCurThread s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\ncrunch ksCurDomain[wp]: copyGlobalMappings \"\\s. P (ksCurDomain s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\nlemmas copyGlobalMappings_ctes_of[wp]\n = ctes_of_from_cte_wp_at[where Q=\"\\\", simplified,\n OF copyGlobalMappings_cte_wp_at]\n\nlemmas object_splits =\n apiobject_type.split_asm\n ARM_H.object_type.split_asm\n sum.split_asm kernel_object.split_asm\n arch_kernel_object.split_asm\n\ndeclare hoare_in_monad_post[wp del]\ndeclare univ_get_wp[wp del]\ndeclare result_in_set_wp[wp del]\n\ncrunch valid_arch_state'[wp]: copyGlobalMappings \"valid_arch_state'\"\n (wp: crunch_wps)\n\nlemma nullPointer_0_simp[simp]:\n \"(nullPointer = 0) = True\"\n by (simp add: nullPointer_def)\n\nlemma descendants_of_retype':\n assumes P: \"\\p. P p \\ m p = None\"\n shows \"descendants_of' p (\\p. if P p then Some makeObject else m p) =\n descendants_of' p m\"\n apply (rule set_eqI)\n apply (simp add: descendants_of'_def)\n apply (rule iffI)\n apply (erule subtree.induct)\n apply (rule direct_parent)\n apply (clarsimp simp: mdb_next_unfold makeObject_cte split: if_split_asm)\n apply assumption\n apply (clarsimp simp: parentOf_def makeObject_cte split: if_split_asm)\n apply (erule trans_parent)\n apply (clarsimp simp: mdb_next_unfold makeObject_cte split: if_split_asm)\n apply assumption\n apply (clarsimp simp: parentOf_def makeObject_cte split: if_split_asm)\n apply (erule subtree.induct)\n apply (rule direct_parent)\n apply (clarsimp simp: mdb_next_unfold dest!: P)\n apply assumption\n apply (fastforce simp: parentOf_def dest!: P)\n apply (erule trans_parent)\n apply (clarsimp simp: mdb_next_unfold dest!: P)\n apply assumption\n apply (fastforce simp: parentOf_def dest!: P)\n done\n\nlemma capRange_Null [simp]: \"capRange NullCap = {}\"\n by (simp add: capRange_def)\n\nend\n\nlocale retype_mdb = vmdb +\n fixes P n\n assumes P: \"\\p. P p \\ m p = None\"\n assumes 0: \"\\P 0\"\n defines \"n \\ \\p. if P p then Some makeObject else m p\"\nbegin\ninterpretation Arch . (*FIXME: arch_split*)\n\nlemma no_0_n: \"no_0 n\"\n using no_0 by (simp add: no_0_def n_def 0)\n\nlemma n_next:\n \"n \\ c \\ c' = (if P c then c' = 0 else m \\ c \\ c')\"\n by (simp add: mdb_next_unfold n_def makeObject_cte nullPointer_def)\n\nlemma n_prev:\n \"n \\ c \\ c' = (if P c' then c = 0 else m \\ c \\ c')\"\n by (simp add: mdb_prev_def n_def makeObject_cte nullPointer_def)\n\nlemma dlist_n: \"valid_dlist n\"\n using dlist no_0 no_0_n\n apply (simp add: valid_dlist_def2)\n apply (clarsimp simp: n_prev n_next)\n apply (rule conjI)\n apply clarsimp\n apply (erule allE, erule (1) impE)\n apply (erule_tac x=c' in allE)\n apply simp\n apply (drule P)\n apply (simp add: mdb_next_unfold)\n apply clarsimp\n apply (erule allE, erule (1) impE)\n apply (erule_tac x=c' in allE)\n apply simp\n apply (drule P)\n apply (simp add: mdb_prev_def)\n done\n\nlemma n_next_trancl:\n \"n \\ c \\\\<^sup>+ c' \\ (if P c then c' = 0 else m \\ c \\\\<^sup>+ c')\"\n apply (insert no_0_n chain)\n apply (erule trancl_induct)\n apply (fastforce simp: n_next)\n apply (simp split: if_split_asm)\n apply (clarsimp simp: mdb_next_unfold)\n apply (simp add: n_next split: if_split_asm)\n apply (simp add: mdb_chain_0_def)\n apply (drule_tac x=c in bspec)\n apply (drule tranclD)\n apply (clarsimp simp: mdb_next_unfold)\n apply assumption\n done\n\nlemma next_not_P:\n \"m \\ c \\ c' \\ \\P c\"\n by (clarsimp simp: mdb_next_unfold dest!: P)\n\nlemma m_next_trancl:\n \"m \\ c \\\\<^sup>+ c' \\ n \\ c \\\\<^sup>+ c'\"\n apply (erule trancl_induct)\n apply (rule r_into_trancl)\n apply (clarsimp simp: n_next)\n apply (drule next_not_P)\n apply simp\n apply (erule trancl_trans)\n apply (rule r_into_trancl)\n apply (clarsimp simp: n_next)\n apply (drule next_not_P)\n apply simp\n done\n\nlemma P_to_0:\n \"P c \\ n \\ c \\\\<^sup>+ 0\"\n by (rule r_into_trancl) (simp add: n_next)\n\nlemma n_trancl_eq:\n \"n \\ c \\\\<^sup>+ c' = (if P c then c' = 0 else m \\ c \\\\<^sup>+ c')\"\n by (auto dest: m_next_trancl n_next_trancl P_to_0)\n\nlemma n_rtrancl_eq:\n \"n \\ c \\\\<^sup>* c' = (if P c then c' = 0 \\ c = c' else m \\ c \\\\<^sup>* c')\"\n by (auto simp: n_trancl_eq rtrancl_eq_or_trancl)\n\nlemma dom_n:\n \"dom n = dom m \\ Collect P\"\n by (auto simp add: n_def)\n\nlemma mdb_chain_0_n: \"mdb_chain_0 n\"\n using chain\n by (auto simp: mdb_chain_0_def dom_n n_trancl_eq)\n\nlemma n_Some_eq:\n \"(n p = Some (CTE cap node)) =\n (if P p then cap = NullCap \\ node = nullMDBNode\n else m p = Some (CTE cap node))\"\n by (auto simp: n_def makeObject_cte)\n\nlemma valid_badges_n: \"valid_badges n\"\nproof -\n from valid\n have \"valid_badges m\" ..\n thus ?thesis\n apply (clarsimp simp: valid_badges_def)\n apply (simp add: n_Some_eq n_next split: if_split_asm)\n apply fastforce\n done\nqed\n\nlemma caps_contained_n: \"caps_contained' n\"\nproof -\n from valid\n have \"caps_contained' m\" ..\n thus ?thesis\n apply (clarsimp simp: caps_contained'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply fastforce\n done\nqed\n\nlemma mdb_chunked_n: \"mdb_chunked n\"\nproof -\n from valid\n have \"mdb_chunked m\" ..\n thus ?thesis\n apply (clarsimp simp: mdb_chunked_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply (simp add: n_Some_eq n_trancl_eq n_rtrancl_eq is_chunk_def)\n apply fastforce\n done\nqed\n\nlemma descendants [simp]:\n \"descendants_of' p n = descendants_of' p m\"\n apply (unfold n_def)\n apply (subst descendants_of_retype')\n apply (erule P)\n apply (rule refl)\n done\n\nlemma untyped_mdb_n: \"untyped_mdb' n\"\nproof -\n from valid\n have \"untyped_mdb' m\" ..\n thus ?thesis\n apply (clarsimp simp: untyped_mdb'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma untyped_inc_n: \"untyped_inc' n\"\nproof -\n from valid\n have \"untyped_inc' m\" ..\n thus ?thesis\n apply (clarsimp simp: untyped_inc'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply blast\n done\nqed\n\nlemma valid_nullcaps_n: \"valid_nullcaps n\"\nproof -\n from valid\n have \"valid_nullcaps m\" ..\n thus ?thesis\n apply (clarsimp simp: valid_nullcaps_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma ut_rev_n: \"ut_revocable' n\"\nproof -\n from valid\n have \"ut_revocable' m\" ..\n thus ?thesis\n apply (clarsimp simp: ut_revocable'_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n done\nqed\n\nlemma class_links_m:\n \"class_links m\"\n using valid by (simp add: valid_mdb_ctes_def)\n\nlemma next_not_P2:\n \"\\ m \\ p \\ p'; p' \\ nullPointer \\ \\ \\ P p'\"\n using dlist\n apply (clarsimp simp: mdb_next_unfold)\n apply (erule(1) valid_dlistE)\n apply clarsimp\n apply (clarsimp dest!: P)\n done\n\nlemma class_links_n:\n \"class_links n\"\n using class_links_m\n apply (simp add: class_links_def)\n apply (elim allEI)\n apply clarsimp\n apply (subgoal_tac \"p' \\ nullPointer\")\n apply (simp add: n_next split: if_split_asm)\n apply (case_tac cte, case_tac cte')\n apply (clarsimp simp add: n_Some_eq split: if_split_asm)\n apply (drule(1) next_not_P2)\n apply simp\n apply (clarsimp simp: no_0_n nullPointer_def)\n done\n\nlemma irq_control_n:\n \"irq_control n\"\n apply (clarsimp simp add: irq_control_def)\n apply (simp add: n_Some_eq split: if_split_asm)\n apply (frule irq_revocable, rule irq_control)\n apply clarsimp\n apply (erule (1) irq_controlD, rule irq_control)\n done\n\nlemma dist_z_m: \"distinct_zombies m\"\n using valid by auto\n\nlemma dist_z_n: \"distinct_zombies n\"\n using dist_z_m\n apply (simp add: n_def distinct_zombies_def\n distinct_zombie_caps_def\n split del: if_split)\n apply (erule allEI, erule allEI)\n apply (clarsimp split del: if_split)\n apply (clarsimp split: if_split_asm simp: makeObject_cte)\n apply (clarsimp simp: isCap_simps)\n done\n\nlemma reply_masters_rvk_fb_m: \"reply_masters_rvk_fb m\"\n using valid by auto\n\nlemma reply_masters_rvk_fb_n: \"reply_masters_rvk_fb n\"\n using reply_masters_rvk_fb_m\n by (simp add: n_def reply_masters_rvk_fb_def\n ball_ran_eq makeObject_cte isCap_simps)\n\nlemma valid_n:\n \"valid_mdb_ctes n\"\n by (simp add: valid_mdb_ctes_def dlist_n no_0_n mdb_chain_0_n\n valid_badges_n caps_contained_n untyped_mdb_n\n untyped_inc_n mdb_chunked_n valid_nullcaps_n ut_rev_n\n class_links_n irq_control_n dist_z_n\n reply_masters_rvk_fb_n)\n\nend\n\ndefinition\n caps_no_overlap'' :: \"word32 \\ nat \\ kernel_state \\ bool\"\nwhere\n \"caps_no_overlap'' ptr sz s \\ \\cte \\ ran (ctes_of s).\n untypedRange (cteCap cte) \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ {}\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ untypedRange (cteCap cte)\"\n\nlemma obj_range'_subset:\n \"\\range_cover ptr sz (objBitsKO val) n; ptr' \\ set (new_cap_addrs n ptr val)\\\n \\ obj_range' ptr' val \\ {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1}\"\n unfolding obj_range'_def\n by (rule new_range_subset, auto)\n\nlemma obj_range'_subset_strong:\n assumes \"range_cover ptr sz (objBitsKO val) n\"\n and \"ptr' \\ set (new_cap_addrs n ptr val)\"\n shows \"obj_range' ptr' val \\ {ptr..ptr + (of_nat n * 2 ^ objBitsKO val) - 1}\"\nproof -\n {\n assume cover: \"range_cover ptr sz (objBitsKO val) n\"\n and mem_p: \"ptr' \\ set (new_cap_addrs n ptr val)\"\n and not_0: \"n\\ 0\"\n note n_less = range_cover.range_cover_n_less[OF cover]\n have unat_of_nat_m1: \"unat (of_nat n - (1::machine_word)) < n\"\n using not_0 n_less by (simp add:unat_of_nat_minus_1)\n have decomp:\n \"of_nat n * 2 ^ objBitsKO val =\n of_nat (n - 1) * 2 ^ objBitsKO val + (2 :: machine_word) ^ objBitsKO val\"\n apply (simp add:distrib_right[where b = \"1 :: machine_word\",simplified,symmetric])\n using not_0 n_less\n apply simp\n done\n have \"ptr' + 2 ^ objBitsKO val - 1 \\ ptr + of_nat n * 2 ^ objBitsKO val - 1\"\n using cover\n apply (subst decomp)\n apply (simp add:add.assoc[symmetric])\n apply (simp add:p_assoc_help)\n apply (rule order_trans[OF word_plus_mono_left word_plus_mono_right])\n using mem_p not_0\n apply (clarsimp simp:new_cap_addrs_def shiftl_t2n)\n apply (rule word_plus_mono_right)\n apply (subst mult.commute)\n apply (rule word_mult_le_mono1[OF word_of_nat_le])\n using n_less not_0\n apply (simp add:unat_of_nat_minus_1)\n apply (rule p2_gt_0[THEN iffD2])\n apply (simp add:word_bits_def range_cover_def)\n apply (simp only: word_bits_def[symmetric])\n apply (clarsimp simp: unat_of_nat_minus_1[OF n_less(1) not_0])\n apply (rule nat_less_power_trans2\n [OF range_cover.range_cover_le_n_less(2),OF cover, folded word_bits_def])\n apply (simp add:unat_of_nat_m1 less_imp_le)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule machine_word_plus_mono_right_split[where sz = sz])\n using range_cover.range_cover_compare[OF cover,where p = \"unat (of_nat n - (1::machine_word))\"]\n apply (clarsimp simp:unat_of_nat_m1)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule olen_add_eqv[THEN iffD2])\n apply (subst add.commute[where a = \"2^objBitsKO val - 1\"])\n apply (subst p_assoc_help[symmetric])\n apply (rule is_aligned_no_overflow)\n apply (clarsimp simp:range_cover_def word_bits_def)\n apply (erule aligned_add_aligned[OF _ is_aligned_mult_triv2]; simp)\n apply simp\n by (meson assms(1) is_aligned_add is_aligned_mult_triv2 is_aligned_no_overflow' range_cover_def)\n }\n with assms show ?thesis\n unfolding obj_range'_def\n apply -\n apply (frule(1) obj_range'_subset)\n apply (simp add: obj_range'_def)\n apply (cases \"n = 0\"; clarsimp simp:new_cap_addrs_def)\n done\nqed\n\nlemma caps_no_overlapD'':\n \"\\cte_wp_at' (\\cap. cteCap cap = c) q s;caps_no_overlap'' ptr sz s\\\n \\ untypedRange c \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ {} \\\n {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ untypedRange c\"\n apply (clarsimp simp: cte_wp_at_ctes_of isCap_simps caps_no_overlap''_def\n simp del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule_tac x = cte in bspec)\n apply fastforce\n apply (erule(1) impE)\n apply blast\ndone\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\nlemma valid_untyped'_helper:\n assumes valid : \"valid_cap' c s\"\n and cte_at : \"cte_wp_at' (\\cap. cteCap cap = c) q s\"\n and cover : \"range_cover ptr sz (objBitsKO val) n\"\n and range : \"caps_no_overlap'' ptr sz s\"\n and pres : \"isUntypedCap c \\ usableUntypedRange c \\ {ptr..ptr + of_nat n * 2 ^ objBitsKO val - 1} = {}\"\n shows \"\\pspace_aligned' s; pspace_distinct' s; pspace_no_overlap' ptr sz s\\\n \\ valid_cap' c (s\\ksPSpace := foldr (\\addr. data_map_insert addr val) (new_cap_addrs n ptr val) (ksPSpace s)\\)\"\n proof -\n note blah[simp del] = atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff\n assume pn : \"pspace_aligned' s\" \"pspace_distinct' s\"\n and no_overlap: \"pspace_no_overlap' ptr sz s\"\n show ?thesis\n using pn pres no_overlap valid cover cte_wp_at_ctes_of[THEN iffD1,OF cte_at]\n caps_no_overlapD''[OF cte_at range]\n apply (clarsimp simp:valid_cap'_def retype_ko_wp_at')\n apply (case_tac \"cteCap cte\"; simp add: valid_cap'_def cte_wp_at_obj_cases'\n valid_pspace'_def retype_obj_at_disj'\n split: zombie_type.split_asm)\n apply (rename_tac arch_capability)\n apply (case_tac arch_capability;\n simp add: retype_obj_at_disj' typ_at_to_obj_at_arches\n page_table_at'_def page_directory_at'_def split del: if_splits)\n apply (fastforce simp: typ_at_to_obj_at_arches retype_obj_at_disj')\n unfolding valid_untyped'_def\n apply (intro allI)\n apply (rule ccontr)\n apply clarify\n using cover[unfolded range_cover_def]\n apply (clarsimp simp:isCap_simps retype_ko_wp_at' split:if_split_asm)\n apply (thin_tac \"\\x. Q x\" for Q)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (elim disjE)\n apply (frule(1) obj_range'_subset)\n apply (erule impE)\n apply (drule(1) psubset_subset_trans)\n apply (drule Int_absorb1[OF psubset_imp_subset])\n apply (drule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (simp add:Int_ac)\n apply (drule(1) subset_trans)\n apply blast\n apply (frule(1) obj_range'_subset_strong)\n apply (drule(1) non_disjoing_subset)\n apply blast\n apply (thin_tac \"\\x. Q x\" for Q)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (frule(1) obj_range'_subset)\n apply (drule(1) subset_trans)\n apply (erule impE)\n apply clarsimp\n apply blast\n apply blast\n done\nqed\n\ndefinition caps_overlap_reserved' :: \"word32 set \\ kernel_state \\ bool\"\nwhere\n \"caps_overlap_reserved' S s \\ \\cte \\ ran (ctes_of s).\n (isUntypedCap (cteCap cte) \\ usableUntypedRange (cteCap cte) \\ S = {})\"\n\nlemma createObjects_valid_pspace':\n assumes mko: \"makeObjectKO dev ty = Some val\"\n and not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat (n * 2^gbits * 2 ^ objBitsKO val ) - 1} s\n \\ ptr \\ 0\\\n createObjects' ptr n val gbits \\\\r. valid_pspace'\\\"\n apply (cut_tac not_0)\n apply (simp add: split_def createObjects'_def\n lookupAround2_pspace_no\n alignError_def unless_def)\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def del:fun_upd_apply)+\n apply (wpc|wp)+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift[OF _ cover])\n apply simp+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift[OF _ cover])\n apply simp+\n apply (subst data_map_insert_def[symmetric])+\n apply (rule impI)\n apply (clarsimp simp: new_cap_addrs_fold'\n valid_pspace'_def linorder_not_less\n objBits_def[symmetric])\n apply (simp only: imp_disjL[symmetric] imp_conjL[symmetric] imp_ex[symmetric]\n range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified])\nproof (intro conjI impI)\n\n fix s\n\n assume pn: \"pspace_no_overlap' ptr sz s\"\n and vo: \"valid_objs' s\"\n and ad: \"pspace_aligned' s\" \"pspace_distinct' s\"\n and pc: \"caps_no_overlap'' ptr sz s\"\n and mdb: \"valid_mdb' s\"\n and p_0: \"ptr \\ 0\"\n and reserved : \"caps_overlap_reserved' {ptr..ptr + of_nat n *2 ^ gbits * 2 ^ objBitsKO val - 1} s\"\n and no_0_obj': \"no_0_obj' s\"\n have obj': \"objBitsKO val \\ sz\"\n using cover\n by (simp add:range_cover_def)\n\n let ?s' = \"s\\ksPSpace := foldr (\\addr. data_map_insert addr val) (new_cap_addrs (n * 2 ^ gbits) ptr val) (ksPSpace s)\\\"\n\n note cover' = range_cover_rel[where sbit' = \"objBitsKO val\",OF cover _ refl,simplified]\n\n note ad' = retype_aligned_distinct'[OF ad pn cover']\n\n note shift = range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified]\n\n have al: \"is_aligned ptr (objBitsKO val)\"\n using cover'\n by (simp add:range_cover_def)\n\n show pspace_aligned: \"pspace_aligned' ?s'\"\n using ad' range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified]\n by (simp add:field_simps)\n\n show \"pspace_distinct' ?s'\"\n using ad' shift\n by (simp add:field_simps)\n\n note obj_at_disj = retype_obj_at_disj' [OF ad pn cover']\n\n note obj_at_disj' = obj_at_disj [unfolded foldr_upd_app_if[folded data_map_insert_def]]\n\n have obj_atC: \"\\P x. x \\ set (new_cap_addrs (2 ^ gbits * n) ptr val) \\ \\ obj_at' P x s\"\n apply (clarsimp simp: obj_at'_def)\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover' ]])\n apply (insert pspace_no_overlap_disjoint' [OF ad(1) pn])\n apply (drule domI[where m = \"ksPSpace s\"])\n apply (drule(1) orthD2)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n done\n\n have valid_cap: \"\\cap q. \\ s \\' cap; cte_wp_at' (\\cte. cteCap cte = cap) q s \\\n \\ ?s' \\' cap\"\n apply (rule valid_untyped'_helper[OF _ _ _ pc _ ad pn ])\n apply simp+\n apply (subst mult.commute)\n apply (rule cover')\n using reserved\n apply (clarsimp simp:caps_overlap_reserved'_def cte_wp_at_ctes_of)\n apply (drule_tac x = cte in bspec)\n apply fastforce\n apply simp\n done\n\n show valid_objs: \"valid_objs' ?s'\" using vo\n apply (clarsimp simp: valid_objs'_def\n foldr_upd_app_if[folded data_map_insert_def]\n elim!: ranE\n split: if_split_asm)\n apply (insert sym[OF mko])[1]\n apply (clarsimp simp: makeObjectKO_def\n split: bool.split_asm sum.split_asm\n ARM_H.object_type.split_asm\n apiobject_type.split_asm\n kernel_object.split_asm\n arch_kernel_object.split_asm)\n apply (drule bspec, erule ranI)\n apply (subst mult.commute)\n apply (case_tac obj; simp add: valid_obj'_def)\n apply (rename_tac endpoint)\n apply (case_tac endpoint; simp add: valid_ep'_def obj_at_disj')\n apply (rename_tac notification)\n apply (case_tac notification; simp add: valid_ntfn'_def valid_bound_tcb'_def obj_at_disj')\n apply (rename_tac ntfn xa)\n apply (case_tac ntfn, simp_all, (clarsimp simp: obj_at_disj' split:option.splits)+)\n apply (rename_tac tcb)\n apply (case_tac tcb, clarsimp simp add: valid_tcb'_def)\n apply (frule pspace_alignedD' [OF _ ad(1)])\n apply (frule pspace_distinctD' [OF _ ad(2)])\n apply (simp add: objBits_simps)\n apply (subst mult.commute)\n apply (intro conjI ballI)\n apply (clarsimp elim!: ranE)\n apply (rule valid_cap[unfolded foldr_upd_app_if[folded data_map_insert_def]])\n apply (fastforce)\n apply (rule_tac ptr=\"x + xa\" in cte_wp_at_tcbI', assumption+)\n apply fastforce\n apply simp\n apply (rename_tac thread_state mcp priority bool option nat cptr vptr bound user_context)\n apply (case_tac thread_state, simp_all add: valid_tcb_state'_def\n valid_bound_ntfn'_def obj_at_disj'\n split: option.splits)[2]\n apply (simp add: valid_cte'_def)\n apply (frule pspace_alignedD' [OF _ ad(1)])\n apply (frule pspace_distinctD' [OF _ ad(2)])\n apply (simp add: objBits_simps')\n apply (subst mult.commute)\n apply (erule valid_cap[unfolded foldr_upd_app_if[folded data_map_insert_def]])\n apply (erule(2) cte_wp_at_cteI'[unfolded cte_level_bits_def])\n apply simp\n apply (rename_tac arch_kernel_object)\n apply (case_tac arch_kernel_object; simp)\n apply (rename_tac asidpool)\n apply (case_tac asidpool, clarsimp simp: page_directory_at'_def\n typ_at_to_obj_at_arches\n obj_at_disj')\n apply (rename_tac pte)\n apply (case_tac pte; simp add: valid_mapping'_def)\n apply (rename_tac pde)\n apply (case_tac pde; simp add: valid_mapping'_def page_table_at'_def\n typ_at_to_obj_at_arches obj_at_disj')\n done\n have not_0: \"0 \\ set (new_cap_addrs (2 ^ gbits * n) ptr val)\"\n using p_0\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset [OF cover'],rotated])\n apply (clarsimp simp:ptr_add_def)\n done\n show \"valid_mdb' ?s'\"\n apply (simp add: valid_mdb'_def foldr_upd_app_if[folded data_map_insert_def])\n apply (subst mult.commute)\n apply (subst ctes_of_retype [OF mko ad])\n apply (rule ad'[unfolded foldr_upd_app_if[folded data_map_insert_def]])+\n apply (simp add: objBits_def[symmetric] new_cap_addrs_aligned [OF al])\n apply (rule ballI, drule subsetD [OF new_cap_addrs_subset [OF cover']])\n apply (insert pspace_no_overlap_disjoint' [OF ad(1) pn])\n apply (drule_tac x = x in orthD1)\n apply (simp add:ptr_add_def p_assoc_help)\n apply fastforce\n apply (fold makeObject_cte)\n apply (rule retype_mdb.valid_n)\n apply unfold_locales\n apply (rule mdb[unfolded valid_mdb'_def])\n apply (rule iffD2 [OF None_ctes_of_cte_at[unfolded cte_wp_at_obj_cases'], THEN sym])\n apply (rule notI)\n apply (elim disjE conjE, simp_all add: obj_atC)[1]\n apply (thin_tac \"S \\ T = {}\" for S T)\n apply (clarsimp simp: obj_at'_def projectKOs objBits_simps)\n apply (drule pspace_no_overlapD' [OF _ pn])\n apply (drule subsetD [OF new_cap_addrs_subset[OF cover']])\n apply (frule_tac ptr'=p in mask_in_range)\n apply (drule(1) tcb_cte_cases_aligned_helpers)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:objBits_simps)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (frule new_range_subset[OF cover'])\n apply (drule bspec [OF new_cap_addrs_aligned[OF al]])\n apply (drule(1) disjoint_subset[rotated])\n apply (drule_tac a=p in equals0D)\n apply (frule_tac ptr'=p in mask_in_range)\n apply (insert sym [OF mko],\n clarsimp simp: objBits_simps makeObjectKO_def obj_at'_def)[1]\n apply (insert sym[OF mko] cover',\n clarsimp simp: obj_at'_def objBits_simps\n makeObjectKO_def projectKOs)[1]\n apply (drule(1) tcb_cte_cases_aligned_helpers(2))\n apply clarsimp\n apply (drule subsetD [OF new_cap_addrs_subset,rotated])\n apply (simp add:objBits_simps)\n apply (drule orthD1)\n apply (fastforce simp:p_assoc_help ptr_add_def)\n apply fastforce\n apply (simp add: not_0)\n done\n\n have data_map_ext: \"\\x y. data_map_insert x y = (\\m. m (x \\ y))\"\n by (rule ext) simp\n show no_0_obj: \"no_0_obj' ?s'\"\n using not_0 no_0_obj'\n by (simp add: no_0_obj'_def data_map_ext field_simps foldr_upd_app_other)\n\nqed\n\nabbreviation\n \"injectKOS \\ (injectKO :: ('a :: pspace_storable) \\ kernel_object)\"\n\nlemma createObjects_valid_pspace_untyped':\n assumes mko: \"makeObjectKO dev ty = Some val\"\n and not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0\n \\ caps_overlap_reserved' {ptr .. ptr + of_nat (n * 2^gbits * 2 ^ objBitsKO val ) - 1} s \\\n createObjects' ptr n val gbits \\\\r. valid_pspace'\\\"\n apply (wp createObjects_valid_pspace' [OF mko not_0 cover])\n apply simp\n done\n\nlemma getObject_valid_pde'[wp]:\n \"\\valid_objs'\\ getObject x \\valid_pde'\\\"\n apply (rule hoare_chain)\n apply (rule hoare_vcg_conj_lift)\n apply (rule getObject_ko_at, simp)\n apply (simp add: objBits_simps archObjSize_def pdeBits_def)\n apply (rule getObject_inv[where P=valid_objs'])\n apply (simp add: loadObject_default_inv)\n apply simp\n apply (clarsimp simp: projectKOs valid_obj'_def dest!: obj_at_valid_objs')\n done\n\ncrunch valid_objs'[wp]: copyGlobalMappings \"valid_objs'\"\n (ignore: storePDE wp: crunch_wps)\ncrunch pspace_aligned'[wp]: copyGlobalMappings \"pspace_aligned'\"\n (wp: crunch_wps)\ncrunch pspace_distinct'[wp]: copyGlobalMappings \"pspace_distinct'\"\n (wp: crunch_wps)\n\nlemmas storePDE_valid_mdb[wp]\n = storePDE_ctes[where P=valid_mdb_ctes, folded valid_mdb'_def]\ncrunch valid_mdb[wp]: copyGlobalMappings \"valid_mdb'\"\n (wp: crunch_wps)\n\ncrunch no_0_obj' [wp]: copyGlobalMappings no_0_obj'\n (wp: crunch_wps)\n\nlemma copyGlobalMappings_valid_pspace[wp]:\n \"\\valid_pspace'\\ copyGlobalMappings pd \\\\rv. valid_pspace'\\\"\n by (simp add: valid_pspace'_def | wp)+\n\ndeclare bleeding_obvious [simp]\n\nlemma range_cover_new_cap_addrs_compare:\n assumes not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and ptr_in: \"p \\ set (new_cap_addrs (unat (((of_nat n)::word32) << gbits)) ptr val)\"\n shows \"p \\ ptr + of_nat (shiftL n (objBitsKO val + gbits) - Suc 0)\"\nproof -\n note unat_of_nat_shift = range_cover.unat_of_nat_n_shift[OF cover,where gbits=gbits,simplified]\n have cover' :\"range_cover ptr sz (objBitsKO val) (n*2^gbits)\"\n by (rule range_cover_rel[OF cover],simp+)\n have upbound:\" unat ((((of_nat n)::word32) * 2 ^ gbits)) * unat ((2::word32) ^ objBitsKO val) < 2 ^ word_bits\"\n using range_cover.range_cover_le_n_less[OF cover' le_refl] cover'\n apply -\n apply (drule nat_less_power_trans)\n apply (simp add:range_cover_def)\n apply (fold word_bits_def)\n using unat_of_nat_shift not_0\n apply (simp add:field_simps shiftl_t2n)\n done\n have not_0': \"(2::word32) ^ (objBitsKO val + gbits) * of_nat n \\ 0\"\n apply (rule range_cover_not_zero_shift[OF not_0,unfolded shiftl_t2n,OF _ le_refl])\n apply (rule range_cover_rel[OF cover]; simp)\n done\n have \"gbits < word_bits\"\n using cover\n by (simp add:range_cover_def word_bits_def)\n thus ?thesis\n apply -\n apply (insert not_0 cover ptr_in)\n apply (frule range_cover.range_cover_le_n_less[OF _ le_refl])\n apply (fold word_bits_def)\n apply (simp add:shiftL_nat )\n apply (simp add:range_cover.unat_of_nat_n_shift)\n apply (clarsimp simp:new_cap_addrs_def shiftl_t2n)\n apply (rename_tac pa)\n apply (rule word_plus_mono_right)\n apply (rule order_trans)\n apply (subst mult.commute)\n apply (rule word_mult_le_iff[THEN iffD2])\n apply (clarsimp simp:p2_gt_0 range_cover_def word_bits_def)\n apply (drule range_cover_rel[where sbit' = \"0\"])\n apply (simp+)[2]\n apply (erule less_le_trans[OF range_cover.range_cover_le_n_less(2)])\n apply (clarsimp simp:field_simps power_add)\n apply (rule unat_le_helper)\n apply (rule of_nat_mono_maybe_le[THEN iffD1])\n using range_cover.range_cover_le_n_less[OF cover' le_refl]\n apply (simp_all only:word_bits_def[symmetric])\n apply simp\n apply (drule nat_less_power_trans)\n apply (simp add:range_cover_def word_bits_def)\n apply (rule less_le_trans[OF mult_less_mono1])\n apply (rule unat_mono)\n apply (rule_tac y1= \"pa\" in of_nat_mono_maybe'[THEN iffD1,rotated -1])\n apply (assumption)\n apply (simp add:word_bits_def)\n apply (simp add:word_bits_def)\n apply simp\n using unat_of_nat_shift\n apply (simp add:field_simps shiftl_t2n)\n apply simp\n apply (rule word_less_sub_1)\n apply (simp add:power_add field_simps)\n apply (subst mult.assoc[symmetric])\n apply (rule word_mult_less_mono1)\n apply (rule word_of_nat_less)\n using unat_of_nat_shift\n apply (simp add:shiftl_t2n field_simps)\n apply (meson less_exp objBitsKO_bounded2 of_nat_less_pow_32 word_gt_a_gt_0)\n using upbound\n apply (simp add:word_bits_def)\n apply (rule machine_word_plus_mono_right_split[where sz = sz])\n apply (rule less_le_trans[rotated -1])\n apply (rule range_cover.range_cover_compare_bound[OF cover'])\n apply (simp add: unat_minus_one[OF not_0'])\n using range_cover.unat_of_nat_n_shift[OF cover le_refl]\n apply (simp add:shiftl_t2n power_add field_simps)\n apply (simp add:range_cover_def word_bits_def)\n done\nqed\n\nlemma createObjects_orig_ko_wp_at2':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (ko_wp_at' P' p s)\n \\ (P' val \\ P True)\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (ko_wp_at' P' p s)\\\"\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def del:fun_upd_apply)\n apply (rule hoare_grab_asm)+\n apply (subst new_cap_addrs_fold')\n apply (drule range_cover_not_zero_shift[rotated])\n apply (rule le_add2)\n apply (simp add:word_le_sub1 del:fun_upd_apply)+\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp)+\n apply (clarsimp simp:valid_pspace'_def linorder_not_less simp del:fun_upd_apply)\n apply (subgoal_tac \" range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_ko_wp_at',simp+)+\n apply clarsimp\n apply (cases \"P' val\")\n apply simp\n apply clarsimp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add:lookupAround2_None1)\n apply (intro conjI impI allI)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply (fastforce simp: ko_wp_at'_def)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (simp add:dom_def)\n apply (fastforce simp:ko_wp_at'_def)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\n\nlemma createObjects_orig_obj_at2':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (obj_at' P' p s)\n \\ \\ (case_option False P' (projectKO_opt val))\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (obj_at' P' p s)\\\"\n unfolding obj_at'_real_def\n by (wp createObjects_orig_ko_wp_at2') auto\n\nlemma createObjects_orig_cte_wp_at2':\n \"\\\\s. P (cte_wp_at' P' p s)\n \\ n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ \\ (case_option False P' (projectKO_opt val))\n \\ (\\(getF, setF) \\ ran tcb_cte_cases.\n \\ (case_option False (P' \\ getF) (projectKO_opt val)))\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. P (cte_wp_at' P' p s)\\\"\n apply (simp add: cte_wp_at'_obj_at')\n apply (rule handy_prop_divs)\n apply (wp createObjects_orig_obj_at2'[where sz = sz], simp)\n apply (simp add: tcb_cte_cases_def)\n including no_pre\n apply (wp handy_prop_divs createObjects_orig_obj_at2'[where sz = sz]\n | simp add: o_def cong: option.case_cong)+\n done\n\nlemma threadSet_cte_wp_at2'T:\n assumes \"\\tcb. \\(getF, setF) \\ ran tcb_cte_cases. getF (F tcb) = getF tcb\"\n shows \"\\\\s. P (cte_wp_at' P' p s)\\ threadSet F t \\\\rv s. P (cte_wp_at' P' p s)\\\"\n using assms by (rule threadSet_cte_wp_at'T)\n\nlemmas threadSet_cte_wp_at2' =\n threadSet_cte_wp_at2'T [OF all_tcbI, OF ball_tcb_cte_casesI]\n\nlemma createNewCaps_cte_wp_at2:\n \"\\\\s. P (cte_wp_at' P' p s) \\ \\ P' makeObject\n \\ n \\ 0\n \\ range_cover ptr sz (APIType_capBits ty objsz) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n objsz dev\n \\\\rv s. P (cte_wp_at' P' p s)\\\"\n including no_pre\n apply (simp add: createNewCaps_def createObjects_def ARM_H.toAPIType_def\n split del: if_split)\n apply (case_tac ty; simp add: createNewCaps_def createObjects_def Arch_createNewCaps_def\n split del: if_split cong: if_cong)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp add:createObjects_def)\n apply ((wp createObjects_orig_cte_wp_at2'[where sz = sz]\n mapM_x_wp' threadSet_cte_wp_at2')+\n | assumption\n | clarsimp simp: APIType_capBits_def\n projectKOs projectKO_opts_defs\n makeObject_tcb tcb_cte_cases_def\n pageBits_def archObjSize_def ptBits_def\n pdBits_def createObjects_def curDomain_def\n Let_def objBits_if_dev\n split del: if_split\n | simp add: objBits_simps pteBits_def pdeBits_def)+\n done\n\nlemma createObjects_orig_obj_at':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ obj_at' P p s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r. obj_at' P p\\\"\n apply (rule hoare_grab_asm)+\n apply (clarsimp simp: createObjects'_def)\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp+\n apply (wp|simp add:split_def cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp|simp del: fun_upd_apply data_map_insert_def)+\n apply (simp only: alignError_def, wp)\n apply (subst data_map_insert_def[symmetric])+\n apply clarsimp\n apply (subgoal_tac \"range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst retype_obj_at',simp+)+\n apply (intro conjI impI allI)\n apply (clarsimp simp:obj_at'_real_def ko_wp_at'_def)\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add:lookupAround2_None1)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply simp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp:ptr_add_def p_assoc_help)\n apply (simp add:dom_def obj_at'_real_def ko_wp_at'_def)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\ncrunch ko_wp_at'[wp]: doMachineOp \"\\s. P (ko_wp_at' P' p s)\"\n\nlemma createObjects_orig_cte_wp_at':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ cte_wp_at' P p s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. cte_wp_at' P p s\\\"\n apply (simp add: cte_wp_at'_obj_at' tcb_cte_cases_def)\n apply (rule hoare_pre, wp hoare_vcg_disj_lift createObjects_orig_obj_at'[where sz = sz])\n apply clarsimp\n done\n\nlemma createNewCaps_cte_wp_at':\n \"\\\\s. cte_wp_at' P p s\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us dev\n \\\\rv. cte_wp_at' P p\\\"\n apply (simp add: createNewCaps_def ARM_H.toAPIType_def\n split del: if_split)\n apply (case_tac ty; simp add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp)\n apply (wp createObjects_orig_cte_wp_at'[where sz = sz] mapM_x_wp'\n threadSet_cte_wp_at'T\n | clarsimp simp: objBits_simps APIType_capBits_def createObjects_def curDomain_def\n pageBits_def ptBits_def pdBits_def archObjSize_def pteBits_def pdeBits_def\n | intro conjI impI\n | force simp: tcb_cte_cases_def)+\n done\n\nlemma createObjects_obj_at_other:\n assumes cover: \"range_cover ptr sz (objBitsKO val + gbits) n\"\n and not_0: \"n\\ 0\"\n shows \"\\\\s. obj_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\_. obj_at' P p\\\"\n apply (simp add: createObjects_def)\n apply (wp createObjects_orig_obj_at'[where sz = sz])\n using cover not_0\n apply (clarsimp simp: cover not_0 valid_pspace'_def pspace_no_overlap'_def)\n done\n\nlemma valid_cap'_range_no_overlap:\n \"\\untypedRange c \\ {ptr..(ptr && ~~ mask sz) + 2 ^ sz - 1} = {}; s \\' c;\n valid_pspace' s; pspace_no_overlap' ptr sz s;\n range_cover ptr sz (objBitsKO val) n\\\n \\ s\\ksPSpace := foldr (\\addr. data_map_insert addr val)\n (new_cap_addrs n ptr val) (ksPSpace s)\\ \\' c\"\n apply (cases c; simp add: valid_cap'_def cte_wp_at_obj_cases' valid_pspace'_def retype_obj_at_disj'\n split: zombie_type.split_asm\n del: Int_atLeastAtMost)[1]\n apply (rename_tac arch_capability)\n apply (case_tac arch_capability;\n simp add: retype_obj_at_disj' typ_at_to_obj_at_arches\n page_table_at'_def page_directory_at'_def)\n apply (fastforce simp: typ_at_to_obj_at_arches retype_obj_at_disj')\n apply (rename_tac word nat1 nat2)\n apply (clarsimp simp:valid_untyped'_def retype_ko_wp_at'\n simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (frule aligned_untypedRange_non_empty)\n apply (simp add:isCap_simps)\n apply (intro conjI impI)\n apply (intro allI)\n apply (drule_tac x = ptr' in spec)\n apply (rule ccontr)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (erule disjE)\n apply (drule(2) disjoint_subset2 [OF obj_range'_subset])\n apply (drule(1) disjoint_subset2[OF psubset_imp_subset])\n apply (simp add: Int_absorb ptr_add_def p_assoc_help\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule(1) obj_range'_subset)\n apply (drule_tac A'=\" {word + of_nat nat2..word + 2 ^ nat1 - 1}\" in disjoint_subset[rotated])\n apply clarsimp\n apply (rule is_aligned_no_wrap')\n apply (fastforce simp:capAligned_def)\n apply (erule of_nat_less_pow_32)\n apply (simp add:capAligned_def)\n apply (drule(1) disjoint_subset2)\n apply blast\n apply (intro allI)\n apply (drule_tac x = ptr' in spec)\n apply (rule ccontr)\n apply (clarsimp simp del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n apply (drule(2) disjoint_subset2 [OF obj_range'_subset])\n apply (drule(1) disjoint_subset2)\n apply (simp add: Int_absorb ptr_add_def p_assoc_help\n del: atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff)\n done\n\nlemma createObjects_cte_wp_at':\n \"\\range_cover ptr sz (objBitsKO val + gbits) n; n \\ 0\\\n \\\\\\s. cte_wp_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\_. cte_wp_at' P p\\\"\n apply (clarsimp simp: valid_def cte_wp_at_obj_cases')\n apply (erule disjE)\n apply (erule use_valid[OF _ ])\n apply (rule createObjects_orig_obj_at')\n apply fastforce\n apply clarsimp\n apply (drule_tac x = na in bspec)\n apply clarsimp\n apply clarsimp\n apply (drule use_valid[OF _ createObjects_orig_obj_at'])\n apply fastforce\n apply simp\n done\n\nlemma createNewCaps_cte_wp_at:\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0 : \"n \\ 0\"\n shows \"\\\\s. cte_wp_at' P p s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us dev\n \\\\_. cte_wp_at' P p\\\"\n apply (wp createNewCaps_cte_wp_at')\n apply (auto simp: cover not_0)\n done\n\nlemma createObjects_ret2:\n \"\\(\\s. P (map (\\p. ptr_add y (p * 2 ^ (objBitsKO ko + gbits)))\n [0.. n \\ 0)\\\n createObjects y n ko gbits \\\\rv s. P rv\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_chain)\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_ret)\n apply simp+\n apply (rule hoare_vcg_prop)\n defer\n apply (clarsimp simp: power_add mult.commute mult.left_commute | assumption)+\n done\n\nlemma state_refs_ko_wp_at_eq:\n \"state_refs_of' s = (\\x. {r. ko_wp_at' (\\ko. r \\ refs_of' ko) x s})\"\n apply (rule ext)\n apply (simp add: state_refs_of'_def ko_wp_at'_def\n split: option.split)\n done\n\nlemma createObjects_state_refs_of'':\n \"\\\\s. n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ P (state_refs_of' s) \\ refs_of' val = {}\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\rv s. P (state_refs_of' s)\\\"\n apply (clarsimp simp:valid_def lookupAround2_pspace_no state_refs_ko_wp_at_eq)\n apply (erule ssubst[where P = P,rotated])\n apply (rule ext)\n apply (rule set_eqI)\n apply clarsimp\n apply (intro iffI,rule ccontr)\n apply (drule_tac P1=\"\\x. \\ x\" in use_valid[OF _ createObjects_orig_ko_wp_at2'[where sz = sz]])\n apply simp\n apply (intro conjI)\n apply simp+\n apply (drule_tac P1=\"\\x. x\" in use_valid[OF _ createObjects_orig_ko_wp_at2'[where sz = sz]])\n apply simp+\n done\n\ncrunch state_refs_of'[wp]: copyGlobalMappings \"\\s. P (state_refs_of' s)\"\n (wp: crunch_wps)\n\nlemma createNewCaps_state_refs_of':\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0: \"n \\ 0\"\n shows\n \"\\\\s. valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ P (state_refs_of' s)\\\n createNewCaps ty ptr n us dev\n \\\\rv s. P (state_refs_of' s)\\\"\n unfolding createNewCaps_def\n apply (clarsimp simp: ARM_H.toAPIType_def\n split del: if_split)\n apply (cases ty; simp add: createNewCaps_def Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type; simp split del: if_split)\n apply (rule hoare_pre, wp, simp)\n apply (insert cover not_0)\n apply (wp mapM_x_wp' createObjects_state_refs_of'' threadSet_state_refs_of'\n | simp add: not_0 pspace_no_overlap'_def objBitsKO_def APIType_capBits_def\n valid_pspace'_def makeObject_tcb makeObject_endpoint objBits_def\n makeObject_notification pageBits_def ptBits_def pdBits_def\n archObjSize_def createObjects_def curDomain_def\n pdeBits_def pteBits_def\n | intro conjI impI)+\n done\n\nlemma createObjects_iflive':\n \"\\\\s. if_live_then_nonz_cap' s \\ \\ live' val\n \\ n \\ 0\n \\ range_cover ptr sz (objBitsKO val + gbits) n\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\rv s. if_live_then_nonz_cap' s\\\"\n apply (rule hoare_pre)\n apply (simp only: if_live_then_nonz_cap'_def\n ex_nonz_cap_to'_def imp_conv_disj)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n hoare_vcg_ex_lift createObjects_orig_ko_wp_at2'\n createObjects_orig_cte_wp_at')\n apply clarsimp\n apply (intro conjI allI impI)\n apply simp_all\n apply (rule ccontr)\n apply clarsimp\n apply (drule(1) if_live_then_nonz_capE')\n apply (fastforce simp: ex_nonz_cap_to'_def)\n done\n\ncrunch ksReadyQueues[wp]: copyGlobalMappings \"\\s. P (ksReadyQueues s)\"\n (wp: updateObject_default_inv crunch_wps)\ncrunch ksReadyQueuesL1[wp]: copyGlobalMappings \"\\s. P (ksReadyQueuesL1Bitmap s)\"\n (wp: updateObject_default_inv crunch_wps)\ncrunch ksReadyQueuesL2[wp]: copyGlobalMappings \"\\s. P (ksReadyQueuesL2Bitmap s)\"\n (wp: updateObject_default_inv crunch_wps)\n\ncrunch valid_idle'[wp]: copyGlobalMappings \"valid_idle'\"\n (simp: objBits_simps archObjSize_def\n wp: updateObject_default_inv crunch_wps setObject_idle' refl)\n\ncrunch iflive'[wp]: copyGlobalMappings \"if_live_then_nonz_cap'\"\n (wp: crunch_wps)\n\nlemma createNewCaps_iflive'[wp]:\n assumes cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n and not_0: \"n \\ 0\"\n shows\n \"\\\\s. valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ if_live_then_nonz_cap' s\\\n createNewCaps ty ptr n us dev\n \\\\rv s. if_live_then_nonz_cap' s\\\"\n unfolding createNewCaps_def\n apply (insert cover)\n apply (clarsimp simp: toAPIType_def ARM_H.toAPIType_def)\n apply (cases ty, simp_all add: createNewCaps_def Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (rule hoare_pre, wp, simp)\n apply (wp mapM_x_wp' createObjects_iflive' threadSet_iflive'\n | simp add: not_0 pspace_no_overlap'_def createObjects_def\n valid_pspace'_def makeObject_tcb makeObject_endpoint\n makeObject_notification objBitsKO_def\n APIType_capBits_def objBits_def pageBits_def\n archObjSize_def ptBits_def pdBits_def\n pteBits_def pdeBits_def\n curDomain_def split del:if_split\n | simp split: if_split\n | fastforce)+\n done\n\nlemma createObjects_pspace_only:\n \"\\ \\f s. P (ksPSpace_update f s) = P s \\\n \\ \\P\\ createObjects' ptr n val gbits \\\\rv. P\\\"\n apply (simp add: createObjects_def createObjects'_def unless_def alignError_def\n split_def lookupAround2_pspace_no)\n apply wpsimp\n done\n\nlemma createObjects'_qs[wp]:\n \"\\\\s. P (ksReadyQueues s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueues s)\\\"\n by (rule createObjects_pspace_only, simp)\n\nlemma createObjects'_qsL1[wp]:\n \"\\\\s. P (ksReadyQueuesL1Bitmap s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueuesL1Bitmap s)\\\"\n by (rule createObjects_pspace_only, simp)\n\nlemma createObjects'_qsL2[wp]:\n \"\\\\s. P (ksReadyQueuesL2Bitmap s)\\ createObjects' ptr n val gbits \\\\rv s. P (ksReadyQueuesL2Bitmap s)\\\"\n by (rule createObjects_pspace_only, simp)\n\n(* FIXME move these 2 to TcbAcc_R *)\nlemma threadSet_qsL1[wp]:\n \"\\\\s. P (ksReadyQueuesL1Bitmap s)\\ threadSet f t \\\\rv s. P (ksReadyQueuesL1Bitmap s)\\\"\n by (simp add: threadSet_def | wp updateObject_default_inv)+\n\nlemma threadSet_qsL2[wp]:\n \"\\\\s. P (ksReadyQueuesL2Bitmap s)\\ threadSet f t \\\\rv s. P (ksReadyQueuesL2Bitmap s)\\\"\n by (simp add: threadSet_def | wp updateObject_default_inv)+\n\ncrunches createObjects, createNewCaps\n for qs[wp]: \"\\s. P (ksReadyQueues s)\"\n and qsL1[wp]: \"\\s. P (ksReadyQueuesL1Bitmap s)\"\n and qsL2[wp]: \"\\s. P (ksReadyQueuesL2Bitmap s)\"\n (simp: crunch_simps wp: crunch_wps)\n\nlemma sch_act_wf_lift_asm:\n assumes tcb: \"\\P t. \\st_tcb_at' P t and Q \\ f \\\\rv. st_tcb_at' P t\\\"\n assumes tcbDomain: \"\\P t. \\obj_at' (\\tcb. P (tcbDomain tcb)) t and Q\\ f \\\\rv. obj_at' (\\tcb. P (tcbDomain tcb)) t\\\"\n assumes kCT: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes kCD: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes ksA: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n shows\n \"\\\\s. sch_act_wf (ksSchedulerAction s) s \\ Q s\\\n f\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (clarsimp simp: valid_def)\n apply (frule use_valid [OF _ ksA])\n prefer 2\n apply assumption\n apply (frule_tac P1=\"(=) (ksCurThread s)\" in use_valid [OF _ kCT])\n apply (rule refl)\n apply (frule_tac P1=\"(=) (ksCurDomain s)\" in use_valid [OF _ kCD])\n apply (rule refl)\n apply (case_tac \"ksSchedulerAction s\")\n apply (simp add: ct_in_state'_def)\n apply (drule use_valid [OF _ tcb])\n apply simp\n apply simp\n apply simp\n apply (clarsimp simp: tcb_in_cur_domain'_def)\n apply (frule use_valid [OF _ tcb], fastforce)\n apply (frule use_valid [OF _ tcbDomain], fastforce)\n apply auto\n done\n\nlemma valid_queues_lift_asm':\n assumes tat: \"\\d p t. \\\\s. \\ obj_at' (inQ d p) t s \\ Q d p s\\ f \\\\_ s. \\ obj_at' (inQ d p) t s\\\"\n and prq: \"\\P. \\\\s. P (ksReadyQueues s)\\ f \\\\_ s. P (ksReadyQueues s)\\\"\n shows \"\\\\s. valid_queues' s \\ (\\d p. Q d p s)\\ f \\\\_. valid_queues'\\\"\n apply (simp only: valid_queues'_def imp_conv_disj)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n tat prq)\n apply simp\n done\n\nlemma createObjects'_ct[wp]:\n \"\\\\s. P (ksCurThread s)\\ createObjects' p n v us \\\\rv s. P (ksCurThread s)\\\"\n by (rule createObjects_pspace_only, simp)\n\ncrunches createObjects, doMachineOp, createNewCaps\n for ct[wp]: \"\\s. P (ksCurThread s)\"\n and ksCurDomain[wp]: \"\\s. P (ksCurDomain s)\"\n (wp: crunch_wps simp: crunch_simps)\n\nlemma copyGlobalMappings_ko_wp_at:\n \"\\(\\s. P (ko_wp_at' P' p s)) and K (\\pde_x :: pde. P' (injectKO pde_x) = v)\\\n copyGlobalMappings pd\n \\\\rv s. P (ko_wp_at' P' p s)\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: copyGlobalMappings_def storePDE_def)\n apply (wp mapM_x_wp' setObject_ko_wp_at)\n apply simp\n apply (simp add: objBits_simps archObjSize_def)\n apply (simp add: pdeBits_def)\n apply (simp cong: if_cong split del: if_split)\n apply (wp getObject_inv loadObject_default_inv | simp split del: if_split)+\n apply (clarsimp simp: obj_at'_def ko_wp_at'_def projectKOs)\n apply (wp | simp)+\n done\n\nlemma threadSet_ko_wp_at2':\n \"\\\\s. P (ko_wp_at' P' p s) \\ (\\tcb_x :: tcb. P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n threadSet F ptr\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\napply (simp add: threadSet_def split del: if_split)\napply (wp setObject_ko_wp_at getObject_tcb_wp | simp add: objBits_simps')+\napply (auto simp: ko_wp_at'_def obj_at'_def projectKOs)\ndone\n\nlemma threadSet_ko_wp_at2'_futz:\n \"\\\\s. P (ko_wp_at' P' p s) \\ obj_at' Q ptr s\n \\ (\\tcb_x :: tcb. Q tcb_x \\ P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n threadSet F ptr\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\napply (simp add: threadSet_def split del: if_split)\napply (wp setObject_ko_wp_at getObject_tcb_wp | simp add: objBits_simps')+\napply (auto simp: ko_wp_at'_def obj_at'_def projectKOs)\ndone\n\nlemma mapM_x_threadSet_createNewCaps_futz:\n \"\\\\s. P (ko_wp_at' P' p s) \\ (\\addr\\set addrs. obj_at' (\\tcb. \\tcbQueued tcb \\ tcbState tcb = Inactive) addr s)\n \\ (\\tcb_x :: tcb. tcbQueued (F tcb_x) = tcbQueued tcb_x \\ tcbState (F tcb_x) = tcbState tcb_x)\n \\ (\\tcb_x :: tcb. \\ tcbQueued tcb_x \\ tcbState tcb_x = Inactive \\ P' (injectKO (F tcb_x)) = P' (injectKO tcb_x))\\\n mapM_x (threadSet F) addrs\n \\\\_ s. P (ko_wp_at' P' p s)\\\" (is \"\\?PRE\\ _ \\\\_. ?POST\\\")\n apply (rule mapM_x_inv_wp[where P=\"?PRE\"])\n apply simp\n apply (rule hoare_pre)\n apply (wp hoare_vcg_ball_lift threadSet_ko_wp_at2'[where P=\"id\", simplified]\n | wp (once) threadSet_ko_wp_at2'_futz[where Q=\"\\tcb. \\tcbQueued tcb \\ tcbState tcb = Inactive\"]\n | simp)+\n done\n\nlemma createObjects_makeObject_not_tcbQueued:\n assumes \"range_cover ptr sz (objBitsKO tcb) n\"\n assumes \"n \\ 0\" \"tcb = injectKO (makeObject::tcb)\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n tcb 0\n \\\\rv s. \\addr\\set rv. obj_at' (\\tcb. \\ tcbQueued tcb \\ tcbState tcb = Structures_H.thread_state.Inactive) addr s\\\"\n apply (rule hoare_strengthen_post[OF createObjects_ko_at_strg[where 'a=tcb]])\n using assms\n apply (auto simp: obj_at'_def projectKO_opt_tcb objBitsKO_def\n objBits_def makeObject_tcb)\n done\n\nlemma createObjects_ko_wp_at2:\n \"\\\\s. range_cover ptr sz (objBitsKO ko + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ P (ko_wp_at' P' p s)\n \\ (P' ko \\ P True)\n \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n ko gbits\n \\\\_ s. P (ko_wp_at' P' p s)\\\"\napply (simp add: createObjects_def)\napply (wp createObjects_orig_ko_wp_at2')\napply auto\ndone\n\nlemma createNewCaps_ko_wp_atQ':\n \"\\(\\s. P (ko_wp_at' P' p s)\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s)\n and K (\\pde_x :: pde. P' (injectKO pde_x)\n \\ (\\pde_y :: pde. P' (injectKO pde_y)))\n and K (\\d (tcb_x :: tcb). \\tcbQueued tcb_x \\ tcbState tcb_x = Inactive\n \\ P' (injectKO (tcb_x \\ tcbDomain := d \\)) = P' (injectKO tcb_x))\n and K (\\v. makeObjectKO d (Inr ty) = Some v\n \\ P' v \\ P True)\\\n createNewCaps ty ptr n us d\n \\\\rv s. P (ko_wp_at' P' p s)\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: createNewCaps_def ARM_H.toAPIType_def\n split del: if_split)\n apply (cases ty, simp_all add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (rule hoare_pre, wp, simp)\n apply ((wp mapM_x_threadSet_createNewCaps_futz\n mapM_x_wp'\n createObjects_obj_at\n createObjects_ko_wp_at2 createObjects_makeObject_not_tcbQueued\n copyGlobalMappings_ko_wp_at[where v=\"\\pde :: pde. P' (injectKO pde)\"]\n | simp add: makeObjectKO_def objBitsKO_def archObjSize_def APIType_capBits_def\n objBits_def pageBits_def pdBits_def ptBits_def curDomain_def\n pteBits_def pdeBits_def\n split del: if_split\n | split if_split_asm[where Q=d]\n | intro conjI impI | fastforce)+)\n done\n\n\nlemmas createNewCaps_ko_wp_at'\n = createNewCaps_ko_wp_atQ'[simplified, unfolded fold_K]\n\nlemmas createNewCaps_obj_at2 =\n createNewCaps_ko_wp_at'\n [where P'=\"\\ko. \\obj :: ('a :: pspace_storable).\n projectKO_opt ko = Some obj \\ P' obj\" for P',\n folded obj_at'_real_def,\n unfolded pred_conj_def, simplified]\n\nlemma createNewCaps_obj_at'':\n \"\\\\s. obj_at' (P :: ('a :: pspace_storable) \\ bool) p s\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ (koType(TYPE('a)) = koType(TYPE(pde))\n \\ (\\x. P x)\n \\ (\\pde :: pde. \\x :: 'a. injectKO x = injectKO pde))\n \\ (\\tcb d. \\tcbQueued tcb \\ tcbState tcb = Inactive \\ ((\\obj :: 'a. injectKOS obj = KOTCB (tcb\\tcbDomain := d\\) \\ P obj) \\ (\\obj :: 'a. injectKOS obj = KOTCB tcb \\ P obj)))\\\n createNewCaps ty ptr n us d\n \\\\rv s. obj_at' P p s\\\"\n apply (simp add: obj_at'_real_def)\n apply (wp createNewCaps_ko_wp_at')\n apply clarsimp\n apply (intro conjI impI)\n apply simp+\n apply clarsimp\n apply (clarsimp simp: projectKOs dest!: iffD1 [OF project_koType, OF exI])\n apply (clarsimp simp:project_inject)+\ndone\n\nlemma createNewCaps_obj_at':\n \"\\\\s. obj_at' (P :: ('a :: pspace_storable) \\ bool) p s\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ koType(TYPE('a)) \\ koType(TYPE(pde))\n \\ (\\tcb d. \\tcbQueued tcb \\ tcbState tcb = Inactive \\ ((\\obj :: 'a. injectKOS obj = KOTCB (tcb\\tcbDomain := d\\) \\ P obj) \\ (\\obj :: 'a. injectKOS obj = KOTCB tcb \\ P obj)))\\\n createNewCaps ty ptr n us d\n \\\\rv s. obj_at' P p s\\\"\n by (wp createNewCaps_obj_at'', auto)\n\nlemmas createNewCaps_pred_tcb_at'\n = createNewCaps_obj_at'[where P=\"\\ko. (Q :: 'a :: type \\ bool) (proj (tcb_to_itcb' ko))\" for Q proj,\n folded pred_tcb_at'_def, simplified]\n\nlemma createNewCaps_cur:\n \"\\range_cover ptr sz (APIType_capBits ty us) n ; n \\ 0\\ \\\n \\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n cur_tcb' s\\\n createNewCaps ty ptr n us d\n \\\\rv. cur_tcb'\\\"\n apply (rule hoare_post_imp [where Q=\"\\rv s. \\t. ksCurThread s = t \\ tcb_at' t s\"])\n apply (simp add: cur_tcb'_def)\n apply (wp hoare_vcg_ex_lift createNewCaps_obj_at')\n apply (clarsimp simp: pspace_no_overlap'_def cur_tcb'_def valid_pspace'_def)\n apply auto\n done\n\ncrunch ksInterrupt[wp]: createNewCaps \"\\s. P (ksInterruptState s)\"\n (simp: crunch_simps unless_def\n wp: setObject_ksInterrupt updateObject_default_inv crunch_wps)\n\nlemma createNewCaps_ifunsafe':\n \"\\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0 \\\n if_unsafe_then_cap' s\\\n createNewCaps ty ptr n us d\n \\\\rv s. if_unsafe_then_cap' s\\\"\n apply (simp only: if_unsafe_then_cap'_def ex_cte_cap_to'_def\n imp_conv_disj)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF createNewCaps_ksInterrupt])\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createNewCaps_cte_wp_at2 hoare_vcg_ex_lift)\n apply (simp add: makeObject_cte pspace_no_overlap'_def\n valid_pspace'_def)\n apply auto\n done\n\nlemma createObjects_nosch'[wp]:\n \"\\\\s. P (ksSchedulerAction s)\\\n createObjects' ptr n val gbits\n \\\\rv s. P (ksSchedulerAction s)\\\"\n by (rule createObjects_pspace_only, simp)\n\ncrunches copyGlobalMappings, createObjects, createNewCaps\n for nosch[wp]: \"\\s. P (ksSchedulerAction s)\"\n and it[wp]: \"\\s. P (ksIdleThread s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\nlemma createObjects_idle':\n \"\\valid_idle' and valid_pspace' and pspace_no_overlap' ptr sz\n and (\\s. \\ case_option False (\\cte. ksIdleThread s \\ capRange (cteCap cte))\n (projectKO_opt val)\n \\ (\\(getF, setF) \\ ran tcb_cte_cases.\n \\ case_option False (\\tcb. ksIdleThread s \\ capRange (cteCap (getF tcb)))\n (projectKO_opt val)))\n and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\\\n createObjects' ptr n val gbits\n \\\\rv. valid_idle'\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_pre)\n apply (clarsimp simp add: valid_idle'_def pred_tcb_at'_def)\n apply (rule hoare_vcg_conj_lift)\n apply (rule hoare_as_subst [OF createObjects'_it])\n apply (wp createObjects_orig_obj_at'\n createObjects_orig_cte_wp_at2'\n hoare_vcg_all_lift | simp)+\n apply (clarsimp simp: valid_idle'_def projectKOs o_def\n pred_tcb_at'_def valid_pspace'_def\n cong: option.case_cong)\n apply auto\n done\n\nlemma createNewCaps_idle'[wp]:\n \"\\valid_idle' and valid_pspace' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_idle'\\\"\n apply (rule hoare_gen_asm)\n apply (clarsimp simp: createNewCaps_def ARM_H.toAPIType_def\n split del: if_split)\n apply (cases ty, simp_all add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)[1]\n apply (wp, simp)\n including no_pre\n apply (wp mapM_x_wp'\n createObjects_idle'\n threadSet_idle'\n | simp add: projectKO_opt_tcb projectKO_opt_cte\n makeObject_cte makeObject_tcb archObjSize_def\n tcb_cte_cases_def objBitsKO_def APIType_capBits_def\n ptBits_def pdBits_def pageBits_def objBits_def\n createObjects_def pteBits_def pdeBits_def\n | intro conjI impI\n | fastforce simp: curDomain_def)+\n done\n\ncrunch ksArch[wp]: createNewCaps \"\\s. P (ksArchState s)\"\n (simp: crunch_simps unless_def wp: crunch_wps)\ncrunch it[wp]: createNewCaps \"\\s. P (ksIdleThread s)\"\n (simp: crunch_simps unless_def wp: crunch_wps updateObject_default_inv)\ncrunch gsMaxObjectSize[wp]: createNewCaps \"\\s. P (gsMaxObjectSize s)\"\n (simp: crunch_simps unless_def wp: crunch_wps updateObject_default_inv)\n\nlemma createNewCaps_global_refs':\n \"\\\\s. range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s \\ valid_global_refs' s\n \\ 0 < gsMaxObjectSize s\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_global_refs'\\\"\n apply (simp add: valid_global_refs'_def valid_cap_sizes'_def valid_refs'_def)\n apply (rule_tac Q=\"\\rv s. \\ptr. \\ cte_wp_at' (\\cte. (kernel_data_refs \\ capRange (cteCap cte) \\ {}\n \\ 2 ^ capBits (cteCap cte) > gsMaxObjectSize s)) ptr s \\ global_refs' s \\ kernel_data_refs\"\n in hoare_post_imp)\n apply (auto simp: cte_wp_at_ctes_of linorder_not_less elim!: ranE)[1]\n apply (rule hoare_pre)\n apply (simp add: global_refs'_def)\n apply (rule hoare_use_eq [where f=ksArchState, OF createNewCaps_ksArch])\n apply (rule hoare_use_eq [where f=ksIdleThread, OF createNewCaps_it])\n apply (rule hoare_use_eq [where f=irq_node', OF createNewCaps_ksInterrupt])\n apply (rule hoare_use_eq [where f=gsMaxObjectSize], wp)\n apply (wp hoare_vcg_all_lift createNewCaps_cte_wp_at2[where sz=sz])\n apply (clarsimp simp: cte_wp_at_ctes_of global_refs'_def\n makeObject_cte)\n apply (auto simp: linorder_not_less ball_ran_eq)\n done\n\nlemma koTypeOf_eq_UserDataT:\n \"(koTypeOf ko = UserDataT)\n = (ko = KOUserData)\"\n by (cases ko, simp_all)\n\nlemma createNewCaps_valid_arch_state:\n \"\\(\\s. valid_arch_state' s \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s\n \\ (tp = APIObjectType ArchTypes_H.CapTableObject \\ us > 0))\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_arch_state'\\\"\n apply (simp add: valid_arch_state'_def\n valid_asid_table'_def\n valid_global_pts'_def\n page_table_at'_def\n page_directory_at'_def\n typ_at_to_obj_at_arches)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=ksArchState, OF createNewCaps_ksArch])\n apply (wp hoare_vcg_const_Ball_lift\n hoare_vcg_prop\n createNewCaps_obj_at''\n createNewCaps_ko_wp_at'\n hoare_vcg_all_lift\n hoare_vcg_const_imp_lift)\n apply (clarsimp simp: valid_pspace'_def o_def)\n apply (intro conjI)\n apply auto\n done\n\nlemma valid_irq_node_lift_asm:\n assumes x: \"\\P. \\\\s. P (irq_node' s)\\ f \\\\rv s. P (irq_node' s)\\\"\n assumes y: \"\\p. \\real_cte_at' p and Q\\ f \\\\rv. real_cte_at' p\\\"\n shows \"\\\\s. valid_irq_node' (irq_node' s) s \\ Q s\\ f \\\\rv s. valid_irq_node' (irq_node' s) s\\\"\n apply (simp add: valid_irq_node'_def)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF x])\n apply (wp hoare_vcg_all_lift y)\n apply simp\n done\n\nlemma valid_irq_handlers_cte_wp_at_form':\n \"valid_irq_handlers' = (\\s. \\irq. irq_issued' irq s \\\n (\\p. \\ cte_wp_at' (\\cte. cteCap cte = IRQHandlerCap irq) p s))\"\n by (auto simp: valid_irq_handlers'_def cteCaps_of_def cte_wp_at_ctes_of\n fun_eq_iff ran_def)\n\nlemma createNewCaps_irq_handlers':\n \"\\valid_irq_handlers' and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_irq_handlers'\\\"\n apply (simp add: valid_irq_handlers_cte_wp_at_form' irq_issued'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createNewCaps_cte_wp_at2)\n apply (clarsimp simp: makeObject_cte)\n apply auto\n done\n\nlemma valid_pde_mappings'_def3:\n \"valid_pde_mappings' =\n (\\s. \\x. \\ obj_at' (Not \\ valid_pde_mapping' (x && mask pdBits)) x s)\"\n apply (simp add: valid_pde_mappings'_def)\n apply (rule ext, rule iff_allI)\n apply (auto simp: obj_at'_def projectKOs)\n done\n\nlemma createObjects'_pde_mappings'[wp]:\n \"\\\\s. valid_pde_mappings' s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ (\\pde. projectKO_opt val = Some pde \\ pde = InvalidPDE)\\\n createObjects' ptr n val gbits\n \\\\_. valid_pde_mappings'\\\"\n apply (simp only: valid_pde_mappings'_def3 all_simps(1)[symmetric])\n apply (rule hoare_vcg_all_lift)\n apply (wp createObjects_orig_obj_at2')\n apply (clarsimp simp: projectKO_opt_pde o_def\n split: Structures_H.kernel_object.split_asm\n arch_kernel_object.split_asm)\n apply auto\n done\n\nlemma createObjects_pde_mappings'[wp]:\n \"\\\\s. valid_pde_mappings' s \\ range_cover ptr sz (objBitsKO ko + gbits) n \\ n \\ 0\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\n \\ (\\pde. projectKO_opt ko = Some pde \\ pde = InvalidPDE)\\\n createObjects ptr n ko gbits\n \\\\_. valid_pde_mappings'\\\"\n by (simp add: createObjects_def objBits_def | intro conjI | wp | clarsimp)+\n\nlemma getObject_valid_pde_mapping':\n \"\\valid_pde_mappings' and K (p && mask pdBits = p')\\ getObject p \\\\pde s. valid_pde_mapping' p' pde\\\"\n apply (wp getPDE_wp)\n apply (clarsimp simp: valid_pde_mappings'_def)\n done\n\nlemma copyGlobalMappings_pde_mappings':\n \"\\valid_pde_mappings' and (\\s. is_aligned (armKSGlobalPD (ksArchState s)) pdBits)\n and K (is_aligned pd pdBits)\\ copyGlobalMappings pd \\\\rv. valid_pde_mappings'\\\"\n apply (simp add: copyGlobalMappings_def objBits_simps archObjSize_def)\n apply wp\n apply (rule_tac P=\"is_aligned globalPD pdBits \\ is_aligned pd pdBits\"\n in hoare_gen_asm)\n apply (rule mapM_x_wp[where S=\"{x. x < 2 ^ (pdBits - 2)}\"])\n apply (wp getObject_valid_pde_mapping' | simp)+\n apply clarsimp\n apply (drule(1) is_aligned_add_helper[OF _ shiftl_less_t2n])\n apply (simp add: pdBits_def pageBits_def pdeBits_def)\n apply (drule(1) is_aligned_add_helper[OF _ shiftl_less_t2n])\n apply (simp add: pdBits_def pageBits_def pdeBits_def)\n apply (simp add: pdeBits_def)\n apply simp\n apply (clarsimp simp: pdBits_def pdeBits_def le_less_trans)\n apply wp\n apply clarsimp\n done\n\nlemma mapM_x_copyGlobalMappings_pde_mappings':\n \"\\valid_pde_mappings' and (\\s. is_aligned (armKSGlobalPD (ksArchState s)) pdBits)\n and K (\\x \\ set xs. is_aligned x pdBits)\\\n mapM_x copyGlobalMappings xs \\\\rv. valid_pde_mappings'\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp [OF _ subset_refl])\n apply (wp copyGlobalMappings_pde_mappings' | simp)+\n done\n\nlemma createNewCaps_pde_mappings'[wp]:\n \"\\\\s. valid_pde_mappings' s \\ range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0\n \\ valid_arch_state' s\n \\ pspace_aligned' s \\ pspace_distinct' s\n \\ pspace_no_overlap' ptr sz s\\\n createNewCaps ty ptr n us d\n \\\\_. valid_pde_mappings'\\\"\n apply (simp add: createNewCaps_def Arch_createNewCaps_def Let_def\n split del: if_split cong: option.case_cong\n object_type.case_cong)\n apply (rule hoare_pre)\n apply (wp mapM_x_copyGlobalMappings_pde_mappings' | wpc\n | simp split del: if_split)+\n apply (rule_tac P=\"range_cover ptr sz (APIType_capBits ty us) n \\ n\\ 0\" in hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule createObjects_aligned, simp+)\n apply (simp add: objBits_simps pdBits_def pageBits_def archObjSize_def APIType_capBits_def\n range_cover_def pdeBits_def)\n apply (rule range_cover.range_cover_n_less[where 'a=32, folded word_bits_def],fastforce+)\n apply (simp add: objBits_simps pdBits_def pageBits_def archObjSize_def APIType_capBits_def range_cover_def word_bits_def\n pteBits_def pdeBits_def)+\n apply (wp mapM_x_wp[OF _ subset_refl] | wpc | simp add: curDomain_def)+\n apply (clarsimp simp: projectKOs)\n apply (simp add: objBits_simps pdBits_def pageBits_def archObjSize_def APIType_capBits_def)\n apply (case_tac ty; simp)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type)\n apply (auto simp: ARM_H.toAPIType_def objBits_simps ptBits_def pageBits_def pteBits_def pdeBits_def\n makeObject_pde valid_arch_state'_def pdBits_def page_directory_at'_def)\n done\n\nlemma createObjects'_irq_states' [wp]:\n \"\\valid_irq_states'\\ createObjects' a b c d \\\\_. valid_irq_states'\\\"\n apply (simp add: createObjects'_def split_def)\n apply (wp unless_wp|wpc|simp add: alignError_def)+\n apply fastforce\n done\n\ncrunch irq_states' [wp]: createNewCaps valid_irq_states'\n (wp: crunch_wps no_irq no_irq_clearMemory simp: crunch_simps unless_def)\n\ncrunch ksMachine[wp]: createObjects \"\\s. P (ksMachineState s)\"\n (simp: crunch_simps unless_def)\ncrunch cur_domain[wp]: createObjects \"\\s. P (ksCurDomain s)\"\n (simp: unless_def)\n\nlemma createNewCaps_valid_queues':\n \"\\valid_queues' and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_queues'\\\"\n apply (wp valid_queues_lift_asm' [OF createNewCaps_obj_at2])\n apply (clarsimp simp: projectKOs)\n apply (simp add: makeObjectKO_def\n split: object_type.split_asm\n apiobject_type.split_asm)\n apply (clarsimp simp: inQ_def)\n apply (auto simp: makeObject_tcb\n split: object_type.splits apiobject_type.splits)\n done\n\nlemma createNewCaps_valid_queues:\n \"\\valid_queues and pspace_no_overlap' ptr sz\n and pspace_aligned' and pspace_distinct'\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us d\n \\\\rv. valid_queues\\\"\napply (rule hoare_gen_asm)\napply (wp valid_queues_lift_asm createNewCaps_obj_at2[where sz=sz])\napply (clarsimp simp: projectKO_opts_defs)\napply (simp add: inQ_def)\napply (wp createNewCaps_pred_tcb_at'[where sz=sz] | simp)+\ndone\n\nlemma mapM_x_threadSet_valid_pspace:\n \"\\valid_pspace' and K (curdom \\ maxDomain)\\\n mapM_x (threadSet (tcbDomain_update (\\_. curdom))) addrs \\\\y. valid_pspace'\\\"\n apply (rule hoare_gen_asm)\n apply (wp mapM_x_wp' threadSet_valid_pspace')\n apply simp_all\n done\n\nlemma createNewCaps_valid_pspace:\n assumes not_0: \"n \\ 0\"\n and cover: \"range_cover ptr sz (APIType_capBits ty us) n\"\n shows \"\\\\s. pspace_no_overlap' ptr sz s \\ valid_pspace' s\n \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0 \\ caps_overlap_reserved' {ptr..ptr + of_nat n * 2^(APIType_capBits ty us) - 1} s \\ ksCurDomain s \\ maxDomain\\\n createNewCaps ty ptr n us dev \\\\r. valid_pspace'\\\"\n unfolding createNewCaps_def Arch_createNewCaps_def\n using valid_obj_makeObject_rules\n apply (clarsimp simp: ARM_H.toAPIType_def\n split del: if_split cong: option.case_cong)\n apply (cases ty, simp_all split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n apply (rule hoare_pre, wp, clarsimp)\n apply (insert cover)\n apply (wp createObjects_valid_pspace_untyped' [OF _ not_0 , where ty=\"Inr ty\" and sz = sz]\n mapM_x_threadSet_valid_pspace mapM_x_wp'\n | simp add: makeObjectKO_def archObjSize_def APIType_capBits_def\n objBits_simps pageBits_def pdBits_def ptBits_def not_0\n createObjects_def curDomain_def\n pteBits_def pdeBits_def\n | intro conjI impI\n | simp add: power_add field_simps)+\ndone\n\nlemma copyGlobalMappings_inv[wp]:\n \"\\\\s. P (ksMachineState s)\\\n copyGlobalMappings newPD\n \\\\_ s. P (ksMachineState s)\\\"\n by (simp add: copyGlobalMappings_def storePDE_def split_def\n | wp mapM_x_wp_inv setObject_ksMachine updateObject_default_inv)+\n\nlemma doMachineOp_return_foo:\n \"doMachineOp (do x\\a;return () od) = (do (doMachineOp a); return () od)\"\n apply (clarsimp simp: doMachineOp_def bind_def gets_def\n get_def return_def select_f_def split_def simpler_modify_def)\n apply (rule ext)+\n apply simp\n apply (rule set_eqI)\n apply clarsimp\n done\n\nlemma doMachineOp_mapM_x_wp:\n assumes empty_fail:\"\\x. empty_fail (f x)\"\n assumes valid: \"\\z. \\P\\ doMachineOp (f z) \\\\y. P\\\"\n shows \"\\P\\ doMachineOp (mapM_x f xs) \\\\y. P\\\"\n apply (clarsimp simp: mapM_x_mapM doMachineOp_return_foo)\n apply (subst doMachineOp_mapM)\n apply (wp valid empty_fail mapM_wp' | simp)+\n done\n\n\nlemma createNewCaps_vms:\n \"\\pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and\n K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n) and\n valid_machine_state'\\\n createNewCaps ty ptr n us dev\n \\\\archCaps. valid_machine_state'\\\"\n apply (clarsimp simp: valid_machine_state'_def pointerInDeviceData_def\n Arch_createNewCaps_def createNewCaps_def pointerInUserData_def\n typ_at'_def createObjects_def doMachineOp_return_foo\n split del: if_split)\n apply (rule hoare_pre)\n apply (wpc\n | wp hoare_vcg_const_Ball_lift hoare_vcg_disj_lift\n hoare_vcg_all_lift\n doMachineOp_ko_wp_at' createObjects_orig_ko_wp_at2'[where sz = sz]\n hoare_vcg_all_lift\n doMachineOp_mapM_x_wp dmo_lift' mapM_x_wp' copyGlobalMappings_ko_wp_at threadSet_ko_wp_at2'\n | clarsimp simp: createObjects_def Arch_createNewCaps_def curDomain_def Let_def\n pteBits_def pdeBits_def\n split del: if_split\n | assumption)+\n apply (case_tac ty)\n apply (auto simp: APIType_capBits_def archObjSize_def objBits_simps pageBits_def ptBits_def\n pdBits_def ARM_H.toAPIType_def object_type.splits pteBits_def pdeBits_def)\n done\n\nlemma createObjects_pspace_domain_valid':\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ pspace_domain_valid s\\\n createObjects' ptr n val gbits\n \\\\_. pspace_domain_valid\\\"\n apply (simp add: createObjects'_def split_def unless_def)\n apply (rule hoare_pre)\n apply (wp | wpc | simp only: alignError_def haskell_assert_def)+\n apply (clarsimp simp: new_cap_addrs_fold' unat_1_0 unat_gt_0\n range_cover_not_zero_shift\n caps_overlap_reserved'_def)\n apply (simp add: pspace_domain_valid_def foldr_upd_app_if\n fun_upd_def[symmetric])\n apply (subgoal_tac \" \\x \\ set (new_cap_addrs (unat (of_nat n << gbits)) ptr\n val). {x..x + 2 ^ objBitsKO val - 1}\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\")\n apply blast\n\n apply (rule ballI)\n apply (rule new_range_subset)\n apply (erule range_cover_rel, simp+)\n apply (simp add: range_cover.unat_of_nat_n_shift field_simps)\n done\n\nlemma createObjects_pspace_domain_valid:\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ pspace_domain_valid s\\\n createObjects ptr n val gbits\n \\\\_. pspace_domain_valid\\\"\n apply (simp add: createObjects_def)\n apply (wp createObjects_pspace_domain_valid'[where sz=sz])\n apply (simp add: objBits_def)\n done\n\ncrunch pspace_domain_valid[wp]: copyGlobalMappings \"pspace_domain_valid\"\n (wp: crunch_wps)\n\nlemma createNewCaps_pspace_domain_valid[wp]:\n \"\\pspace_domain_valid and K ({ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1}\n \\ kernel_data_refs = {}\n \\ range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\\\n createNewCaps ty ptr n us dev\n \\\\rv. pspace_domain_valid\\\"\n apply (simp add: createNewCaps_def)\n apply (rule hoare_pre)\n apply (wp createObjects_pspace_domain_valid[where sz=sz]\n mapM_x_wp'\n | wpc | simp add: Arch_createNewCaps_def curDomain_def Let_def\n split del: if_split)+\n apply (simp add: ARM_H.toAPIType_def\n split: object_type.splits)\n apply (auto simp: objBits_simps APIType_capBits_def pageBits_def\n pteBits_def pdeBits_def\n archObjSize_def ptBits_def pdBits_def)\n done\n\ncrunch cur_domain[wp]: createNewCaps \"\\s. P (ksCurDomain s)\"\n (wp: crunch_wps)\n\n(* FIXME: move *)\nlemma ct_idle_or_in_cur_domain'_lift_futz:\n assumes a: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes b: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n assumes c: \"\\P. \\\\s. P (ksIdleThread s)\\ f \\\\_ s. P (ksIdleThread s)\\\"\n assumes d: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes e: \"\\d t. \\\\s. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t s \\ Q s\\\n f\n \\\\_. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t\\\"\n shows \"\\ct_idle_or_in_cur_domain' and ct_active' and Q\\ f \\\\_. ct_idle_or_in_cur_domain'\\\"\nproof -\n from e have e':\n \"\\d t. \\\\s. obj_at' (\\tcb. tcbState tcb \\ Inactive \\ d = tcbDomain tcb) t s \\ Q s\\\n f\n \\\\_. obj_at' (\\tcb. d = tcbDomain tcb) t\\\"\n apply (rule hoare_strengthen_post)\n apply (auto simp: obj_at'_def)\n done\n show ?thesis\n apply (simp add: ct_idle_or_in_cur_domain'_def tcb_in_cur_domain'_def)\n apply (rule hoare_pre)\n apply (wps a b c d)\n apply (wp static_imp_wp e' hoare_vcg_disj_lift)\n apply (auto simp: obj_at'_def ct_in_state'_def projectKOs st_tcb_at'_def)\n done\nqed\n\nlemma createNewCaps_ct_idle_or_in_cur_domain':\n \"\\ct_idle_or_in_cur_domain' and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and ct_active' and K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n) \\\n createNewCaps ty ptr n us dev\n \\\\rv. ct_idle_or_in_cur_domain'\\\"\napply (wp ct_idle_or_in_cur_domain'_lift_futz createNewCaps_obj_at'[where sz=sz] | simp)+\ndone\n\nlemma sch_act_wf_lift_asm_futz:\n assumes tcb: \"\\P t. \\st_tcb_at' P t and Q \\ f \\\\rv. st_tcb_at' P t\\\"\n assumes tcbDomain: \"\\P t. \\obj_at' (\\tcb. runnable' (tcbState tcb) \\ P (tcbDomain tcb)) t and Q\\ f \\\\rv. obj_at' (\\tcb. runnable' (tcbState tcb) \\ P (tcbDomain tcb)) t\\\"\n assumes kCT: \"\\P. \\\\s. P (ksCurThread s)\\ f \\\\_ s. P (ksCurThread s)\\\"\n assumes kCD: \"\\P. \\\\s. P (ksCurDomain s)\\ f \\\\_ s. P (ksCurDomain s)\\\"\n assumes ksA: \"\\P. \\\\s. P (ksSchedulerAction s)\\ f \\\\_ s. P (ksSchedulerAction s)\\\"\n shows\n \"\\\\s. sch_act_wf (ksSchedulerAction s) s \\ Q s\\\n f\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (clarsimp simp: valid_def)\n apply (frule use_valid [OF _ ksA])\n prefer 2\n apply assumption\n apply (frule_tac P1=\"(=) (ksCurThread s)\" in use_valid [OF _ kCT])\n apply (rule refl)\n apply (frule_tac P1=\"(=) (ksCurDomain s)\" in use_valid [OF _ kCD])\n apply (rule refl)\n apply (case_tac \"ksSchedulerAction s\")\n apply (simp add: ct_in_state'_def)\n apply (drule use_valid [OF _ tcb])\n apply simp\n apply simp\n apply simp\n apply (clarsimp simp: tcb_in_cur_domain'_def)\n apply (frule use_valid [OF _ tcb], fastforce)\n apply simp\n apply (rename_tac word)\n apply (subgoal_tac \"(obj_at' (\\tcb. runnable' (tcbState tcb) \\ ksCurDomain b = tcbDomain tcb) word and Q) s\")\n apply (drule use_valid [OF _ tcbDomain], fastforce)\n apply (auto simp: st_tcb_at'_def o_def obj_at'_def ko_wp_at'_def)\n done\n\nlemma createNewCaps_sch_act_wf:\n \"\\(\\s. sch_act_wf (ksSchedulerAction s) s) and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz and K (range_cover ptr sz (APIType_capBits ty us) n \\ 0 < n)\\\n createNewCaps ty ptr n us dev\n \\\\_ s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (wp sch_act_wf_lift_asm_futz\n createNewCaps_pred_tcb_at'[where sz=sz]\n createNewCaps_obj_at'[where sz=sz]\n | simp)+\n done\n\nlemma createObjects'_ksDomSchedule[wp]:\n \"\\\\s. P (ksDomSchedule s)\\ createObjects' ptr numObjects val gSize \\\\_ s. P (ksDomSchedule s)\\\"\n apply (simp add: createObjects'_def unless_def alignError_def)\n apply (wp | wpc)+\n apply simp\n done\n\nlemma createObjects'_ksDomScheduleIdx[wp]:\n \"\\\\s. P (ksDomScheduleIdx s)\\ createObjects' ptr numObjects val gSize \\\\_ s. P (ksDomScheduleIdx s)\\\"\n apply (simp add: createObjects'_def unless_def alignError_def)\n apply (wp | wpc)+\n apply simp\n done\n\ncrunch ksDomSchedule[wp]: copyGlobalMappings \"\\s. P (ksDomSchedule s)\"\n (wp: setObject_ksPSpace_only updateObject_default_inv mapM_x_wp')\n\ncrunch ksDomSchedule[wp]: createNewCaps \"\\s. P (ksDomSchedule s)\"\n (wp: mapM_x_wp' simp: crunch_simps)\n\ncrunch ksDomScheduleIdx[wp]: createNewCaps \"\\s. P (ksDomScheduleIdx s)\"\n (wp: mapM_x_wp' simp: crunch_simps)\n\nlemma createObjects_null_filter':\n \"\\\\s. P (null_filter' (ctes_of s)) \\ makeObjectKO dev ty = Some val \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits\n \\\\addrs a. P (null_filter' (ctes_of a))\\\"\n apply (clarsimp simp: createObjects'_def split_def)\n apply (wp unless_wp|wpc\n | clarsimp simp:haskell_assert_def alignError_def\n split del: if_splits simp del:fun_upd_apply)+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply fastforce+\n apply (subst new_cap_addrs_fold')\n apply (simp add:unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp\n apply assumption\n apply simp\n apply (subst data_map_insert_def[symmetric])+\n apply (frule(2) retype_aligned_distinct'[where ko = val])\n apply (erule range_cover_rel)\n apply simp+\n apply (frule(2) retype_aligned_distinct'(2)[where ko = val])\n apply (erule range_cover_rel)\n apply simp+\n apply (frule null_filter_ctes_retype\n [where addrs = \"(new_cap_addrs (unat (((of_nat n)::word32) << gbits)) ptr val)\"])\n apply assumption+\n apply (clarsimp simp:field_simps foldr_upd_app_if[folded data_map_insert_def] shiftl_t2n range_cover.unat_of_nat_shift)+\n apply (rule new_cap_addrs_aligned[THEN bspec])\n apply (erule range_cover.aligned[OF range_cover_rel])\n apply simp+\n apply (clarsimp simp:shiftl_t2n field_simps range_cover.unat_of_nat_shift)\n apply (drule subsetD[OF new_cap_addrs_subset,rotated])\n apply (erule range_cover_rel)\n apply simp\n apply simp\n apply (rule ccontr)\n apply clarify\n apply (frule(1) pspace_no_overlapD')\n apply (erule_tac B = \"{x..x+2^objBitsKO y - 1}\" in in_empty_interE[rotated])\n apply (drule(1) pspace_alignedD')\n apply (clarsimp)\n apply (erule is_aligned_no_overflow)\n apply (simp del:atLeastAtMost_iff atLeastatMost_subset_iff atLeastLessThan_iff\n Int_atLeastAtMost atLeastatMost_empty_iff add:Int_ac ptr_add_def p_assoc_help)\n apply (simp add:field_simps foldr_upd_app_if[folded data_map_insert_def] shiftl_t2n)\n apply auto\n done\n\nlemma createNewCaps_null_filter':\n \"\\(\\s. P (null_filter' (ctes_of s)))\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0) \\\n createNewCaps ty ptr n us dev\n \\\\_ s. P (null_filter' (ctes_of s))\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: createNewCaps_def toAPIType_def\n Arch_createNewCaps_def\n split del: if_split cong: option.case_cong)\n apply (cases ty, simp_all split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n apply (rule hoare_pre, wp,simp)\n apply (simp add: createObjects_def makeObjectKO_def\n APIType_capBits_def objBits_def pageBits_def\n archObjSize_def ptBits_def pdBits_def curDomain_def\n objBits_if_dev\n split del: if_split\n | wp createObjects_null_filter'[where ty = \"Inr ty\" and sz = sz and dev=dev]\n copyGlobalMappings_ctes_of threadSet_ctes_of mapM_x_wp'\n | simp add: objBits_simps pteBits_def pdeBits_def\n | fastforce)+\n done\n\ncrunch gsUntypedZeroRanges[wp]: createNewCaps \"\\s. P (gsUntypedZeroRanges s)\"\n (wp: crunch_wps simp: crunch_simps unless_def)\n\nlemma untyped_ranges_zero_inv_null_filter:\n \"untyped_ranges_zero_inv (option_map cteCap o null_filter' ctes)\n = untyped_ranges_zero_inv (option_map cteCap o ctes)\"\n apply (simp add: untyped_ranges_zero_inv_def fun_eq_iff null_filter'_def)\n apply clarsimp\n apply (rule_tac f=\"\\caps. x = ran caps\" for caps in arg_cong)\n apply (clarsimp simp: fun_eq_iff map_comp_def untypedZeroRange_def)\n done\n\nlemma untyped_ranges_zero_inv_null_filter_cteCaps_of:\n \"untyped_ranges_zero_inv (cteCaps_of s)\n = untyped_ranges_zero_inv (option_map cteCap o null_filter' (ctes_of s))\"\n by (simp add: untyped_ranges_zero_inv_null_filter cteCaps_of_def)\n\nlemma createNewCaps_urz:\n \"\\untyped_ranges_zero'\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0) \\\n createNewCaps ty ptr n us dev\n \\\\archCaps. untyped_ranges_zero'\\\"\n apply (simp add: untyped_ranges_zero_inv_null_filter_cteCaps_of)\n apply (rule hoare_pre)\n apply (rule untyped_ranges_zero_lift)\n apply (wp createNewCaps_null_filter')+\n apply (auto simp: o_def)\n done\n\nlemma createNewCaps_invs':\n \"\\(\\s. invs' s \\ ct_active' s \\ pspace_no_overlap' ptr sz s\n \\ caps_no_overlap'' ptr sz s \\ ptr \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ caps_overlap_reserved' {ptr..ptr + of_nat n * 2^(APIType_capBits ty us) - 1} s\n \\ (ty = APIObjectType ArchTypes_H.CapTableObject \\ us > 0)\n \\ gsMaxObjectSize s > 0)\n and K (range_cover ptr sz (APIType_capBits ty us) n \\ n \\ 0)\\\n createNewCaps ty ptr n us dev\n \\\\rv. invs'\\\"\n (is \"\\?P and K ?Q\\ ?f \\\\rv. invs'\\\")\nproof (rule hoare_gen_asm, erule conjE)\n assume cover: \"range_cover ptr sz (APIType_capBits ty us) n\" and not_0: \"n \\ 0\"\n have cnc_ct_not_inQ:\n \"\\ct_not_inQ and valid_pspace' and pspace_no_overlap' ptr sz\\\n createNewCaps ty ptr n us dev \\\\_. ct_not_inQ\\\"\n unfolding ct_not_inQ_def\n apply (rule_tac Q=\"\\s. ksSchedulerAction s = ResumeCurrentThread\n \\ (obj_at' (Not \\ tcbQueued) (ksCurThread s) s\n \\ valid_pspace' s \\ pspace_no_overlap' ptr sz s)\"\n in hoare_pre_imp, clarsimp)\n apply (rule hoare_convert_imp [OF createNewCaps_nosch])\n apply (rule hoare_weaken_pre)\n apply (wps createNewCaps_ct)\n apply (wp createNewCaps_obj_at')\n using cover not_0\n apply (fastforce simp: valid_pspace'_def)\n done\n show \"\\?P\\\n createNewCaps ty ptr n us dev\n \\\\rv. invs'\\\"\n apply (simp add: invs'_def valid_state'_def\n pointerInUserData_def typ_at'_def)\n apply (rule hoare_pre)\n apply (wp createNewCaps_valid_pspace [OF not_0 cover]\n createNewCaps_state_refs_of' [OF cover not_0 ]\n createNewCaps_iflive' [OF cover not_0 ]\n irqs_masked_lift\n createNewCaps_ifunsafe'\n createNewCaps_cur [OF cover not_0]\n createNewCaps_global_refs'\n createNewCaps_valid_arch_state\n valid_irq_node_lift_asm [unfolded pred_conj_def, OF _ createNewCaps_obj_at']\n createNewCaps_irq_handlers' createNewCaps_vms\n createNewCaps_valid_queues\n createNewCaps_valid_queues'\n createNewCaps_pred_tcb_at' cnc_ct_not_inQ\n createNewCaps_ct_idle_or_in_cur_domain'\n createNewCaps_sch_act_wf\n createNewCaps_urz[where sz=sz]\n | simp)+\n using not_0\n apply (clarsimp simp: valid_pspace'_def)\n using cover\n apply (intro conjI)\n apply simp_all\n done\nqed\n\nlemma createObjects_pred_tcb_at':\n \"\\pred_tcb_at' proj P t and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\n and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\\\n createObjects ptr n val gbits \\\\rv. pred_tcb_at' proj P t\\\"\n apply (simp add: pred_tcb_at'_def createObjects_def)\n apply (wp createObjects_orig_obj_at')\n apply auto\n done\n\nlemma createObjects_ex_cte_cap_to [wp]:\n \"\\\\s. range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\ pspace_aligned' s \\\n pspace_distinct' s \\ ex_cte_cap_to' p s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\r. ex_cte_cap_to' p\\\"\n apply (simp add: ex_cte_cap_to'_def createObjects_def)\n apply (rule hoare_lift_Pf2 [where f=\"irq_node'\"])\n apply (wp hoare_vcg_ex_lift createObjects_orig_cte_wp_at'[where sz = sz])\n apply simp\n apply wp\n done\n\nlemma createObjects_orig_obj_at3:\n \"\\\\s. obj_at' P p s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n pspace_aligned' s \\\n pspace_distinct' s \\ pspace_no_overlap' ptr sz s\\\n createObjects ptr n val gbits \\\\r. obj_at' P p\\\"\n by (wp createObjects_orig_obj_at'[where sz = sz] | simp add: createObjects_def)+\n\nlemma createObjects_sch:\n \"\\(\\s. sch_act_wf (ksSchedulerAction s) s) and pspace_aligned' and pspace_distinct' and pspace_no_overlap' ptr sz\n and K (range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0)\\\n createObjects ptr n val gbits\n \\\\rv s. sch_act_wf (ksSchedulerAction s) s\\\"\n apply (rule hoare_gen_asm)\n apply (wp sch_act_wf_lift_asm createObjects_pred_tcb_at' createObjects_orig_obj_at3 | force)+\n done\n\nlemma createObjects_queues:\n \"\\\\s. valid_queues s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\\\n createObjects ptr n val gbits\n \\\\rv. valid_queues\\\"\n apply (wp valid_queues_lift_asm [unfolded pred_conj_def, OF createObjects_orig_obj_at3]\n createObjects_pred_tcb_at' [unfolded pred_conj_def])\n apply fastforce\n apply wp+\n apply fastforce\n done\n\nlemma createObjects_queues':\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. valid_queues' s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0\\\n createObjects ptr n val gbits\n \\\\rv. valid_queues'\\\"\n apply (simp add: createObjects_def)\n apply (wp valid_queues_lift_asm')\n apply (wp createObjects_orig_obj_at2')\n apply clarsimp\n apply assumption\n apply wp\n apply (clarsimp simp: no_tcb split: option.splits)\n apply fastforce\n done\n\nlemma createObjects_no_cte_ifunsafe':\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. valid_pspace' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n if_unsafe_then_cap' s\\\n createObjects ptr n val gbits\n \\\\rv s. if_unsafe_then_cap' s\\\"\n apply (simp only: if_unsafe_then_cap'_def ex_cte_cap_to'_def\n imp_conv_disj)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq_irq_node' [OF createObjects_ksInterrupt])\n apply (simp add: createObjects_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift hoare_vcg_imp_lift\n createObjects_orig_cte_wp_at2' hoare_vcg_ex_lift)\n apply (simp add: valid_pspace'_def disj_imp)\n apply (simp add: split_def no_cte no_tcb split: option.splits)\n apply auto\n done\n\nlemma createObjects_no_cte_valid_global:\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_global_refs' s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_global_refs' s\\\"\n apply (simp add: valid_global_refs'_def valid_cap_sizes'_def valid_refs'_def)\n apply (rule_tac Q=\"\\rv s. \\ptr. \\ cte_wp_at' (\\cte. (kernel_data_refs \\ capRange (cteCap cte) \\ {}\n \\ 2 ^ capBits (cteCap cte) > gsMaxObjectSize s)) ptr s \\ global_refs' s \\ kernel_data_refs\"\n in hoare_post_imp)\n apply (auto simp: cte_wp_at_ctes_of linorder_not_less elim!: ranE)[1]\n apply (rule hoare_pre)\n apply (simp add: global_refs'_def)\n apply (rule hoare_use_eq [where f=ksArchState, OF createObjects_ksArch])\n apply (rule hoare_use_eq [where f=ksIdleThread, OF createObjects_it])\n apply (rule hoare_use_eq [where f=irq_node', OF createObjects_ksInterrupt])\n apply (rule hoare_use_eq [where f=gsMaxObjectSize], wp)\n apply (simp add: createObjects_def)\n apply (wp hoare_vcg_all_lift createObjects_orig_cte_wp_at2')\n apply (simp add: no_cte no_tcb split_def cte_wp_at_ctes_of split: option.splits)\n apply (clarsimp simp: global_refs'_def)\n apply (auto simp: ball_ran_eq linorder_not_less[symmetric])\n done\n\nlemma createObjects'_typ_at:\n \"\\\\s. n \\ 0 \\\n range_cover ptr sz (objBitsKO val + gbits) n \\\n typ_at' T p s \\\n pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s\\\n createObjects' ptr n val gbits \\\\r s. typ_at' T p s\\\"\n apply (rule hoare_grab_asm)+\n apply (simp add: createObjects'_def lookupAround2_pspace_no\n alignError_def unless_def split_def typ_at'_def)\n apply (subst new_cap_addrs_fold')\n apply (simp add: unat_1_0 unat_gt_0)\n apply (rule range_cover_not_zero_shift)\n apply simp+\n apply (rule hoare_pre)\n apply (wp|simp cong: if_cong del: data_map_insert_def fun_upd_apply)+\n apply (wpc|wp)+\n apply (subst data_map_insert_def[symmetric])\n apply clarsimp\n apply (subgoal_tac \"range_cover ptr sz (objBitsKO val) (unat (of_nat n << gbits))\")\n apply (subst data_map_insert_def[symmetric])+\n apply (subst retype_ko_wp_at',simp+)+\n apply clarsimp\n apply (frule(1) subsetD [OF new_cap_addrs_subset])\n apply (drule(1) pspace_no_overlap_disjoint')\n apply (simp add: lookupAround2_None1)\n apply (intro conjI impI allI)\n apply (drule_tac x = p in spec)\n apply (erule impE)\n apply (erule(1) range_cover_new_cap_addrs_compare[rotated])\n apply simp\n apply (fastforce simp: ko_wp_at'_def)\n apply (drule_tac x = p in orthD1)\n apply (clarsimp simp: ptr_add_def p_assoc_help)\n apply (simp add: dom_def)\n apply (fastforce simp: ko_wp_at'_def)\n apply (rule range_cover_rel)\n apply (simp)+\n apply (subst mult.commute)\n apply (erule range_cover.unat_of_nat_n_shift)\n apply simp\n done\n\nlemma createObjects_valid_arch:\n \"\\\\s. valid_arch_state' s \\ pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n createObjects ptr n val gbits\n \\\\rv s. valid_arch_state' s\\\"\n apply (simp add: valid_arch_state'_def valid_asid_table'_def\n page_directory_at'_def valid_global_pts'_def\n page_table_at'_def)\n apply (rule hoare_pre)\n apply (rule hoare_use_eq [where f=ksArchState, OF createObjects_ksArch])\n apply (simp add: createObjects_def)\n apply (wp createObjects'_typ_at hoare_vcg_all_lift hoare_vcg_const_imp_lift\n hoare_vcg_const_Ball_lift)\n apply (simp add: o_def)\n apply auto\n done\n\nlemma createObjects_irq_state:\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_irq_node' (irq_node' s) s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_irq_node' (irq_node' s) s\\\"\n apply (wp valid_irq_node_lift_asm [unfolded pred_conj_def, OF _ createObjects_orig_obj_at3])\n apply auto\n done\n\nlemma createObjects_no_cte_irq_handlers:\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\\n range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n valid_irq_handlers' s\\\n createObjects ptr n val gbits\n \\\\rv s. valid_irq_handlers' s\\\"\n apply (simp add: valid_irq_handlers_cte_wp_at_form' createObjects_def irq_issued'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift\n createObjects_orig_cte_wp_at2')\n apply (clarsimp simp: no_cte no_tcb split_def split: option.splits)\n apply auto\n done\n\nlemma createObjects_cur':\n \"\\\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s \\ range_cover ptr sz (objBitsKO val + gbits) n \\ n \\ 0 \\\n cur_tcb' s\\\n createObjects ptr n val gbits\n \\\\rv s. cur_tcb' s\\\"\n apply (rule hoare_post_imp [where Q=\"\\rv s. \\t. ksCurThread s = t \\ tcb_at' t s\"])\n apply (simp add: cur_tcb'_def)\n apply (wp hoare_vcg_ex_lift createObjects_orig_obj_at3)\n apply (clarsimp simp: cur_tcb'_def)\n apply auto\n done\n\nlemma createObjects_vms'[wp]:\n \"\\(\\_. (range_cover ptr sz (objBitsKO val + gbits) n \\ 0 < n)) and pspace_aligned' and\n pspace_distinct' and pspace_no_overlap' ptr sz and valid_machine_state'\\\n createObjects ptr n val gbits\n \\\\rv. valid_machine_state'\\\"\n apply (simp add: valid_machine_state'_def pointerInUserData_def pointerInDeviceData_def\n typ_at'_def)\n apply (wp hoare_vcg_all_lift hoare_vcg_disj_lift createObjects_orig_ko_wp_at2'\n | simp add: createObjects_def)+\n apply auto\n done\n\nlemma createObjects_ct_idle_or_in_cur_domain':\n \"\\ct_active' and valid_pspace' and pspace_no_overlap' ptr sz\n and ct_idle_or_in_cur_domain'\n and K (range_cover ptr sz (objBitsKO val + gSize) n \\ n \\ 0)\\\n createObjects ptr n val gSize\n \\\\_. ct_idle_or_in_cur_domain'\\\"\napply (rule hoare_gen_asm)\napply (wp ct_idle_or_in_cur_domain'_lift_futz createObjects_obj_at_other[where sz=sz])\napply simp_all\ndone\n\nlemma untyped_zero_ranges_cte_def:\n \"untyped_ranges_zero_inv (cteCaps_of s) rs\n = (\\r. (\\p. cte_wp_at' (\\cte. untypedZeroRange (cteCap cte) = Some r) p s)\n = (r \\ rs))\"\n apply (clarsimp simp: untyped_ranges_zero_inv_def cte_wp_at_ctes_of\n cteCaps_of_def set_eq_iff ran_def map_comp_Some_iff)\n apply (safe, metis+)\n done\n\ncrunch gsUntypedZeroRanges[wp]: createObjects \"\\s. P (gsUntypedZeroRanges s)\"\n (simp: unless_def)\n\nlemma createObjects_untyped_ranges_zero':\n assumes moKO: \"makeObjectKO dev ty = Some val\"\n shows\n \"\\ct_active' and valid_pspace' and pspace_no_overlap' ptr sz\n and untyped_ranges_zero'\n and K (range_cover ptr sz (objBitsKO val + gSize) n \\ n \\ 0)\\\n createObjects ptr n val gSize\n \\\\_. untyped_ranges_zero'\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: untyped_zero_ranges_cte_def iff_conv_conj_imp\n createObjects_def)\n apply (simp only: imp_conv_disj not_all not_ex)\n apply (rule hoare_pre)\n apply (wp hoare_vcg_all_lift hoare_vcg_ex_lift hoare_vcg_conj_lift\n hoare_vcg_disj_lift createObjects_orig_cte_wp_at2'[where sz=sz])\n apply (clarsimp simp: valid_pspace'_def)\n apply (cut_tac moKO[symmetric])\n apply (simp add: makeObjectKO_def projectKO_opt_tcb projectKO_opt_cte\n split: sum.split_asm kernel_object.split_asm\n arch_kernel_object.split_asm\n object_type.split_asm apiobject_type.split_asm)\n apply (simp add: makeObject_tcb tcb_cte_cases_def makeObject_cte\n untypedZeroRange_def)\n apply (simp add: makeObject_cte untypedZeroRange_def)\n done\n\nlemma createObjects_no_cte_invs:\n assumes moKO: \"makeObjectKO dev ty = Some val\"\n assumes no_cte: \"\\c. projectKO_opt val \\ Some (c::cte)\"\n assumes no_tcb: \"\\t. projectKO_opt val \\ Some (t::tcb)\"\n shows\n \"\\\\s. range_cover ptr sz ((objBitsKO val) + gbits) n \\ n \\ 0 \\ invs' s \\ ct_active' s\n \\ pspace_no_overlap' ptr sz s \\ ptr \\ 0\n \\ {ptr .. (ptr && ~~ mask sz) + 2 ^ sz - 1} \\ kernel_data_refs = {}\n \\ caps_overlap_reserved' {ptr..ptr + of_nat (n * 2 ^ gbits * 2 ^ objBitsKO val) - 1} s\n \\ caps_no_overlap'' ptr sz s \\\n refs_of' val = {} \\ \\ live' val\n \\ (\\pde. projectKO_opt val = Some pde \\ pde = InvalidPDE)\\\n createObjects ptr n val gbits\n \\\\rv. invs'\\\"\nproof -\n have co_ct_not_inQ:\n \"\\range_cover ptr sz ((objBitsKO val) + gbits) n; n \\ 0\\ \\\n \\\\s. ct_not_inQ s \\ pspace_no_overlap' ptr sz s \\ valid_pspace' s\\\n createObjects ptr n val gbits \\\\_. ct_not_inQ\\\"\n (is \"\\ _; _ \\ \\ \\\\s. ct_not_inQ s \\ ?REST s\\ _ \\_\\\")\n apply (simp add: ct_not_inQ_def)\n apply (rule_tac Q=\"\\s. (ksSchedulerAction s = ResumeCurrentThread) \\\n (obj_at' (Not \\ tcbQueued) (ksCurThread s) s \\ ?REST s)\"\n in hoare_pre_imp, clarsimp)\n apply (rule hoare_convert_imp [OF createObjects_nosch])\n apply (rule hoare_weaken_pre)\n apply (wps createObjects_ct)\n apply (wp createObjects_obj_at_other)\n apply (simp)+\n done\n show ?thesis\n apply (rule hoare_grab_asm)+\n apply (clarsimp simp: invs'_def valid_state'_def)\n apply wp\n apply (rule hoare_pre)\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def,wp createObjects_valid_pspace_untyped')\n apply (wp assms | simp add: objBits_def)+\n apply (wp createObjects_sch createObjects_queues)\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_state_refs_of'')\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_iflive')\n apply (wp createObjects_no_cte_ifunsafe' irqs_masked_lift\n createObjects_idle' createObjects_no_cte_valid_global\n createObjects_valid_arch createObjects_irq_state\n createObjects_no_cte_irq_handlers createObjects_cur'\n createObjects_queues' [OF no_tcb]\n assms | simp add: objBits_def )+\n apply (rule hoare_vcg_conj_lift)\n apply (simp add: createObjects_def)\n apply (wp createObjects_idle')\n apply (wp createObjects_no_cte_ifunsafe' irqs_masked_lift\n createObjects_idle' createObjects_no_cte_valid_global\n createObjects_valid_arch createObjects_irq_state\n createObjects_no_cte_irq_handlers createObjects_cur'\n createObjects_queues' [OF no_tcb] assms\n createObjects_pspace_domain_valid co_ct_not_inQ\n createObjects_ct_idle_or_in_cur_domain'\n createObjects_untyped_ranges_zero'[OF moKO]\n | simp)+\n apply clarsimp\n apply ((intro conjI; assumption?); simp add: valid_pspace'_def objBits_def)\n apply (fastforce simp add: no_cte no_tcb split_def split: option.splits)\n apply (clarsimp simp: invs'_def no_tcb valid_state'_def no_cte split: option.splits)\n done\nqed\n\nlemma corres_retype_update_gsI:\n assumes not_zero: \"n \\ 0\"\n and aligned: \"is_aligned ptr (objBitsKO ko + gbits)\"\n and obj_bits_api: \"obj_bits_api (APIType_map2 ty) us =\n objBitsKO ko + gbits\"\n and check: \"sz < obj_bits_api (APIType_map2 ty) us \\\n sz < objBitsKO ko + gbits\"\n and usv: \"APIType_map2 ty = Structures_A.CapTableObject \\ 0 < us\"\n and ko: \"makeObjectKO dev ty = Some ko\"\n and orr: \"obj_bits_api (APIType_map2 ty) us \\ sz \\\n obj_relation_retype\n (default_object (APIType_map2 ty) dev us) ko\"\n and cover: \"range_cover ptr sz (obj_bits_api (APIType_map2 ty) us) n\"\n and f: \"f = update_gs (APIType_map2 ty) us\"\n shows \"corres (\\rv rv'. rv' = g rv)\n (\\s. valid_pspace s \\ pspace_no_overlap_range_cover ptr sz s\n \\ valid_mdb s \\ valid_etcbs s \\ valid_list s)\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\\n pspace_no_overlap' ptr sz s)\n (retype_region2 ptr n us (APIType_map2 ty) dev)\n (do addrs \\ createObjects ptr n ko gbits;\n _ \\ modify (f (set addrs));\n return (g addrs)\n od)\"\n using corres_retype' [OF not_zero aligned obj_bits_api check usv ko orr cover]\n by (simp add: f)\n\nlemma gcd_corres: \"corres (=) \\ \\ (gets cur_domain) curDomain\"\n by (simp add: curDomain_def state_relation_def)\n\nlemma retype_region2_extra_ext_mapM_x_corres:\n shows \"corres dc\n (valid_etcbs and (\\s. \\addr\\set addrs. tcb_at addr s))\n (\\s. \\addr\\set addrs. tcb_at' addr s)\n (retype_region2_extra_ext addrs Structures_A.apiobject_type.TCBObject)\n (mapM_x (\\addr. do cdom \\ curDomain;\n threadSet (tcbDomain_update (\\_. cdom)) addr\n od)\n addrs)\"\n apply (rule corres_guard_imp)\n apply (simp add: retype_region2_extra_ext_def curDomain_mapM_x_futz[symmetric] when_def)\n apply (rule corres_split_eqr[OF gcd_corres])\n apply (rule_tac S=\"Id \\ {(x, y). x \\ set addrs}\"\n and P=\"\\s. (\\t \\ set addrs. tcb_at t s) \\ valid_etcbs s\"\n and P'=\"\\s. \\t \\ set addrs. tcb_at' t s\"\n in corres_mapM_x)\n apply simp\n apply (rule corres_guard_imp)\n apply (rule ethread_set_corres, simp_all add: etcb_relation_def non_exst_same_def)[1]\n apply (case_tac tcb')\n apply simp\n apply fastforce\n apply fastforce\n apply (wp hoare_vcg_ball_lift | simp)+\n apply auto[1]\n apply (wp | simp add: curDomain_def)+\n done\n\nlemma retype_region2_extra_ext_trivial:\n \"ty \\ APIType_map2 (Inr (APIObjectType apiobject_type.TCBObject))\n \\ retype_region2_extra_ext ptrs ty = return ()\"\nby (simp add: retype_region2_extra_ext_def when_def APIType_map2_def)\n\nlemma retype_region2_ext_retype_region_ArchObject_PageDirectoryObj:\n \"retype_region ptr n us (APIType_map2 (Inr PageDirectoryObject)) dev =\n (retype_region2 ptr n us (APIType_map2 (Inr PageDirectoryObject)) dev :: obj_ref list det_ext_monad)\"\nby (simp add: retype_region2_ext_retype_region retype_region2_extra_ext_def when_def APIType_map2_def)\n\nlemma retype_region2_valid_etcbs[wp]:\"\\valid_etcbs\\ retype_region2 a b c d dev \\\\_. valid_etcbs\\\"\n apply (simp add: retype_region2_def)\n apply (simp add: retype_region2_ext_def bind_assoc)\n apply wp\n apply (clarsimp simp del: fun_upd_apply)\n apply (blast intro: valid_etcb_fold_update)\n done\n\nlemma retype_region2_obj_at:\n assumes tytcb: \"ty = Structures_A.apiobject_type.TCBObject\"\n shows \"\\\\\\ retype_region2 ptr n us ty dev \\\\rv s. \\x \\ set rv. tcb_at x s\\\"\n using tytcb unfolding retype_region2_def\n apply (simp only: return_bind bind_return foldr_upd_app_if fun_app_def K_bind_def)\n apply (wp dxo_wp_weak | simp)+\n apply (auto simp: obj_at_def default_object_def is_tcb_def)\n done\n\nlemma createObjects_tcb_at':\n \"\\range_cover ptr sz (objBitsKO (injectKOS (makeObject::tcb))) n; n \\ 0\\ \\\n \\\\s. pspace_no_overlap' ptr sz s \\ pspace_aligned' s \\ pspace_distinct' s\\\n createObjects ptr n (KOTCB makeObject) 0 \\\\ptrs s. \\addr\\set ptrs. tcb_at' addr s\\\"\n apply (rule hoare_strengthen_post[OF createObjects_ko_at_strg[where val = \"(makeObject :: tcb)\"]])\n apply (auto simp: obj_at'_def projectKOs project_inject objBitsKO_def objBits_def makeObject_tcb)\n done\n\nlemma init_arch_objects_APIType_map2_noop:\n \"tp \\ Inr PageDirectoryObject\n \\ init_arch_objects (APIType_map2 tp) ptr n m addrs\n = return ()\"\n apply (simp add: init_arch_objects_def APIType_map2_def)\n apply (cases tp, simp_all split: kernel_object.split arch_kernel_object.split\n object_type.split apiobject_type.split)\n done\n\nlemma data_page_relation_retype:\n \"obj_relation_retype (ArchObj (DataPage False pgsz)) KOUserData\"\n \"obj_relation_retype (ArchObj (DataPage True pgsz)) KOUserDataDevice\"\n apply (simp_all add: obj_relation_retype_def\n objBits_simps archObjSize_def\n pbfs_atleast_pageBits)\n apply (clarsimp simp: image_def)+\n done\n\nlemma corres_retype_region_createNewCaps:\n \"corres ((\\r r'. length r = length r' \\ list_all2 cap_relation r r')\n \\ map (\\ref. default_cap (APIType_map2 (Inr ty)) ref us dev))\n (\\s. valid_pspace s \\ valid_mdb s \\ valid_etcbs s \\ valid_list s \\ valid_arch_state s\n \\ caps_no_overlap y sz s \\ pspace_no_overlap_range_cover y sz s\n \\ caps_overlap_reserved {y..y + of_nat n * 2 ^ (obj_bits_api (APIType_map2 (Inr ty)) us) - 1} s\n \\ (\\slot. cte_wp_at (\\c. up_aligned_area y sz \\ cap_range c \\ cap_is_device c = dev) slot s)\n \\ (APIType_map2 (Inr ty) = Structures_A.CapTableObject \\ 0 < us))\n (\\s. pspace_aligned' s \\ pspace_distinct' s \\ pspace_no_overlap' y sz s\n \\ valid_pspace' s \\ valid_arch_state' s\n \\ range_cover y sz (obj_bits_api (APIType_map2 (Inr ty)) us) n \\ n\\ 0)\n (do x \\ retype_region y n us (APIType_map2 (Inr ty)) dev :: obj_ref list det_ext_monad;\n init_arch_objects (APIType_map2 (Inr ty)) y n us x;\n return x od)\n (createNewCaps ty y n us dev)\"\n apply (rule_tac F=\"range_cover y sz\n (obj_bits_api (APIType_map2 (Inr ty)) us) n \\\n n \\ 0 \\\n (APIType_map2 (Inr ty) = Structures_A.CapTableObject\n \\ 0 < us)\"\n in corres_req, simp)\n apply (clarsimp simp add: createNewCaps_def toAPIType_def\n split del: if_split cong: if_cong)\n apply (subst init_arch_objects_APIType_map2)\n apply (cases ty, simp_all add: Arch_createNewCaps_def\n split del: if_split)\n apply (rename_tac apiobject_type)\n apply (case_tac apiobject_type, simp_all split del: if_split)\n \\ \\Untyped\\\n apply (simp add: retype_region_def obj_bits_api_def\n APIType_map2_def\n split del: if_split\n cong: if_cong)\n apply (subst upto_enum_red')\n apply (drule range_cover_not_zero[rotated])\n apply simp\n apply unat_arith\n apply (clarsimp simp: list_all2_same enum_word_def range_cover.unat_of_nat_n\n list_all2_map1 list_all2_map2\n ptr_add_def fromIntegral_def toInteger_nat fromInteger_nat)\n apply (subst unat_of_nat_minus_1)\n apply (rule le_less_trans[OF range_cover.range_cover_n_le(2) power_strict_increasing])\n apply simp\n apply (clarsimp simp: range_cover_def)\n apply (arith+)[4]\n \\ \\TCB, EP, NTFN\\\n apply (simp_all add: retype_region2_ext_retype_region bind_cong[OF curDomain_mapM_x_futz refl, unfolded bind_assoc]\n split del: if_split)[9] (* not PageDirectoryObject *)\n apply (rule corres_guard_imp)\n apply (rule corres_split_eqr)\n apply (rule corres_retype[where 'a = tcb],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def\n APIType_map2_def makeObjectKO_def\n other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply (rule corres_split_nor)\n apply (simp add: APIType_map2_def)\n apply (rule retype_region2_extra_ext_mapM_x_corres)\n apply (rule corres_trivial, simp)\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2\n objBits_simps APIType_map2_def)\n apply wp\n apply wp\n apply ((wp retype_region2_obj_at | simp add: APIType_map2_def)+)[1]\n apply ((wp createObjects_tcb_at'[where sz=sz] | simp add: APIType_map2_def objBits_simps' obj_bits_api_def)+)[1]\n apply simp\n apply simp\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: liftM_def[symmetric] split del: if_split)\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype[where 'a = endpoint],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def\n APIType_map2_def makeObjectKO_def\n other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2\n objBits_simps APIType_map2_def)\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: liftM_def[symmetric] split del: if_split)\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype[where 'a = notification],\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def\n APIType_map2_def makeObjectKO_def\n other_objs_default_relation)[1]\n apply (fastforce simp: range_cover_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2\n objBits_simps APIType_map2_def)\n \\ \\CapTable\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (subst bind_assoc_return_reverse[of \"createObjects y n (KOCTE makeObject) us\"])\n apply (subst liftM_def\n [of \"map (\\addr. capability.CNodeCap addr us 0 0)\", symmetric])\n apply simp\n apply (rule corres_rel_imp)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: obj_bits_api_def objBits_simps' pageBits_def\n APIType_map2_def makeObjectKO_def slot_bits_def\n field_simps ext)[1]\n apply (simp add: range_cover_def)\n apply (rule captable_relation_retype,simp add: range_cover_def word_bits_def)\n apply simp\n apply simp\n apply (clarsimp simp: list_all2_same list_all2_map1 list_all2_map2\n objBits_simps allRights_def APIType_map2_def\n split del: if_split)\n \\ \\SmallPageObject\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: APIType_map2_def makeObjectKO_def\n arch_default_cap_def obj_bits_api_def3\n default_object_def default_arch_object_def pageBits_def\n ext objBits_simps range_cover.aligned,\n simp_all add: data_page_relation_retype)[1]\n apply simp+\n apply (simp add: APIType_map2_def arch_default_cap_def vmrights_map_def\n vm_read_write_def list_all2_map1 list_all2_map2 list_all2_same)\n \\ \\LargePageObject\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: APIType_map2_def makeObjectKO_def\n arch_default_cap_def obj_bits_api_def3\n default_object_def default_arch_object_def pageBits_def\n ext objBits_simps range_cover.aligned,\n simp_all add: data_page_relation_retype)[1]\n apply simp+\n apply (simp add: APIType_map2_def arch_default_cap_def vmrights_map_def\n vm_read_write_def list_all2_map1 list_all2_map2 list_all2_same)\n \\ \\SectionObject\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: APIType_map2_def makeObjectKO_def\n arch_default_cap_def obj_bits_api_def3\n default_object_def default_arch_object_def pageBits_def\n ext objBits_simps range_cover.aligned,\n simp_all add: data_page_relation_retype)[1]\n apply simp+\n apply (simp add: APIType_map2_def arch_default_cap_def vmrights_map_def\n vm_read_write_def list_all2_map1 list_all2_map2 list_all2_same)\n \\ \\SuperSectionObject\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp add: corres_liftM2_simp[unfolded liftM_def] split del: if_split)\n apply (rule corres_rel_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop split del: if_split)\n apply (rule corres_guard_imp)\n apply (rule corres_retype_update_gsI,\n simp_all add: APIType_map2_def makeObjectKO_def\n arch_default_cap_def obj_bits_api_def3\n default_object_def default_arch_object_def pageBits_def\n ext objBits_simps range_cover.aligned,\n simp_all add: data_page_relation_retype)[1]\n apply simp+\n apply (simp add: APIType_map2_def arch_default_cap_def vmrights_map_def\n vm_read_write_def list_all2_map1 list_all2_map2 list_all2_same)\n \\ \\PageTable\\\n apply (subst retype_region2_extra_ext_trivial)\n apply (simp add: APIType_map2_def)\n apply (simp_all add: corres_liftM2_simp[unfolded liftM_def])\n apply (rule corres_guard_imp)\n apply (simp add: init_arch_objects_APIType_map2_noop)\n apply (rule corres_rel_imp)\n apply (rule corres_retype[where 'a =pte],\n simp_all add: APIType_map2_def obj_bits_api_def\n default_arch_object_def objBits_simps\n archObjSize_def ptBits_def pageBits_def\n pteBits_def pdeBits_def\n makeObjectKO_def range_cover.aligned)[1]\n apply (rule pagetable_relation_retype)\n apply (wp | simp)+\n apply (clarsimp simp: list_all2_map1 list_all2_map2 list_all2_same\n APIType_map2_def arch_default_cap_def)\n apply simp+\n \\ \\PageDirectory\\\n apply (rule corres_guard_imp)\n apply (rule corres_split_eqr)\n apply (rule corres_retype[where ty = \"Inr PageDirectoryObject\" and 'a = pde\n , simplified, folded retype_region2_ext_retype_region_ArchObject_PageDirectoryObj],\n simp_all add: APIType_map2_def obj_bits_api_def\n default_arch_object_def objBits_simps\n archObjSize_def pdBits_def pageBits_def\n pteBits_def pdeBits_def\n makeObjectKO_def)[1]\n apply (simp add: range_cover_def)+\n apply (rule pagedirectory_relation_retype)\n apply (simp add: init_arch_objects_def APIType_map2_def\n bind_assoc)\n apply (rule corres_split_nor)\n apply (simp add: mapM_x_mapM)\n apply (rule corres_underlying_split[where r' = dc])\n apply (rule_tac Q=\"\\xs s. (\\x \\ set xs. page_directory_at x s)\n \\ valid_arch_state s \\ pspace_aligned s \\ valid_etcbs s\"\n and Q'=\"\\xs s. (\\x \\ set xs. page_directory_at' x s) \\ valid_arch_state' s\"\n in corres_mapM_list_all2[where r'=dc and S=\"(=)\"])\n apply simp+\n apply (rule corres_guard_imp, rule copyGlobalMappings_corres)\n apply simp+\n apply (wp hoare_vcg_const_Ball_lift | simp)+\n apply (simp add: list_all2_same)\n apply (rule corres_return[where P =\\ and P'=\\,THEN iffD2])\n apply simp\n apply wp+\n apply (simp add: liftM_def[symmetric] o_def list_all2_map1\n list_all2_map2 list_all2_same\n arch_default_cap_def mapM_x_mapM)\n apply (simp add: dc_def[symmetric])\n apply (rule corres_machine_op)\n apply (rule corres_Id)\n apply (simp add: shiftl_t2n shiftL_nat\n pdBits_def ptBits_def pageBits_def pt_bits_def)\n defer\n apply simp\n apply (simp add: mapM_discarded[where g = \"return ()\",simplified,symmetric])\n apply (rule no_fail_pre)\n apply (wp no_fail_mapM|clarsimp)+\n apply (rule hoare_vcg_conj_lift)\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule hoare_vcg_conj_lift)\n apply (rule retype_region_obj_at)\n apply (simp add: APIType_map2_def)\n apply (subst APIType_map2_def, simp)\n apply (rule retype_region_ret)\n apply (clarsimp simp: retype_addrs_def obj_bits_api_def APIType_map2_def\n default_arch_object_def default_object_def)\n apply (clarsimp simp: obj_at_def a_type_def)\n apply (wp retype_region_valid_arch retype_region_aligned|simp)+\n apply (clarsimp simp: objBits_simps retype_addrs_def obj_bits_api_def\n APIType_map2_def default_arch_object_def default_object_def)\n apply (rule hoare_vcg_conj_lift)\n apply (rule hoare_post_imp)\n prefer 2\n apply (rule hoare_vcg_conj_lift)\n apply (rule createObjects_ko_at[where sz = sz and 'a = pde])\n apply (simp add: objBits_simps archObjSize_def pdBits_def\n pteBits_def pdeBits_def\n pageBits_def page_directory_at'_def)+\n apply (simp add: projectKOs)\n apply (rule createObjects_aligned)\n apply (simp add: objBits_simps archObjSize_def pdBits_def\n pageBits_def page_directory_at'_def)+\n apply (simp add: range_cover_def pteBits_def pdeBits_def)\n apply (rule le_less_trans[OF range_cover.range_cover_n_le(2) power_strict_increasing])\n apply simp\n apply (clarsimp simp: range_cover_def word_bits_def)\n apply arith+\n apply (simp add: objBits_simps archObjSize_def pdBits_def\n pageBits_def page_directory_at'_def)+\n apply (simp add: range_cover_def word_bits_def pteBits_def pdeBits_def)\n apply clarsimp\n apply (drule (1) bspec)+\n apply (simp add: objBits_simps retype_addrs_def obj_bits_api_def pdBits_def pageBits_def\n ptBits_def APIType_map2_def default_arch_object_def default_object_def\n archObjSize_def)\n apply (clarsimp simp: objBits_simps archObjSize_def pdBits_def\n pageBits_def page_directory_at'_def\n pteBits_def pdeBits_def)\n apply (drule_tac x = ya in spec)\n apply (clarsimp simp:typ_at'_def obj_at'_real_def)\n apply (erule ko_wp_at'_weakenE)\n apply (clarsimp simp: projectKOs)\n apply (wp createObjects_valid_arch)\n apply (auto simp: objBits_simps retype_addrs_def obj_bits_api_def pdBits_def pageBits_def ptBits_def\n APIType_map2_def default_arch_object_def default_object_def archObjSize_def\n pteBits_def pdeBits_def\n pd_bits_def fromIntegral_def toInteger_nat fromInteger_nat)\n done\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/refine/ARM/Retype_R.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5273165233795671, "lm_q2_score": 0.2450850021044189, "lm_q1q2_score": 0.12923737124217607}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchUserOp_IF\nimports UserOp_IF\nbegin\n\ncontext Arch begin global_naming RISCV64\n\ndefinition ptable_lift_s where\n \"ptable_lift_s s \\ ptable_lift (cur_thread s) s\"\n\ndefinition ptable_rights_s where\n \"ptable_rights_s s \\ ptable_rights (cur_thread s) s\"\n\n(* FIXME: move to ADT_AI.thy *)\ndefinition ptable_attrs :: \"obj_ref \\ 's :: state_ext state \\ obj_ref \\ vm_attributes\" where\n \"ptable_attrs tcb s \\\n \\addr. case_option {} (fst o snd o snd)\n (get_page_info (aobjs_of s) (get_vspace_of_thread (kheap s) (arch_state s) tcb) addr)\"\n\ndefinition ptable_attrs_s :: \"'s :: state_ext state \\ obj_ref \\ vm_attributes\" where\n \"ptable_attrs_s s \\ ptable_attrs (cur_thread s) s\"\n\ndefinition ptable_xn_s where\n \"ptable_xn_s s \\ \\addr. Execute \\ ptable_attrs_s s addr\"\n\n\ntype_synonym user_state_if = \"user_context \\ user_mem \\ device_state\"\n\ntext \\\n A user transition gives back a possible event that is the next\n event the user wants to perform\n\\\ntype_synonym user_transition_if =\n \"obj_ref \\ vm_mapping \\ mem_rights \\ (obj_ref \\ bool) \\\n user_state_if \\ (event option \\ user_state_if) set\"\n\n\ndefinition do_user_op_if ::\n \"user_transition_if \\ user_context \\ (event option \\ user_context,'z::state_ext) s_monad\" where\n \"do_user_op_if uop tc =\n do\n \\ \\Get the page rights of each address (ReadOnly, ReadWrite, None, etc).\\\n pr \\ gets ptable_rights_s;\n\n \\ \\Fetch the execute bits of the current thread's page mappings.\\\n pxn \\ gets (\\s x. pr x \\ {} \\ ptable_xn_s s x);\n\n \\ \\Get the mapping from virtual to physical addresses.\\\n pl \\ gets (\\s. restrict_map (ptable_lift_s s) {x. pr x \\ {}});\n\n allow_read \\ return {y. EX x. pl x = Some y \\ AllowRead \\ pr x};\n allow_write \\ return {y. EX x. pl x = Some y \\ AllowWrite \\ pr x};\n\n \\ \\Get the current thread.\\\n t \\ gets cur_thread;\n\n \\ \\Generate user memory by throwing away anything from global\n memory that the user doesn't have access to. (The user must\n have both (1) a mapping to the page; (2) that mapping has the\n AllowRead right.\\\n um \\ gets (\\s. (user_mem s) \\ ptrFromPAddr);\n dm \\ gets (\\s. (device_mem s) \\ ptrFromPAddr);\n ds \\ gets (device_state \\ machine_state);\n\n \\ \\Non-deterministically execute one of the user's operations.\\\n u \\ return (uop t pl pr pxn (tc, um|`allow_read, (ds \\ ptrFromPAddr)|` allow_read));\n assert (u \\ {});\n (e,(tc',um',ds')) \\ select u;\n\n \\ \\Update the changes the user made to memory into our model.\n We ignore changes that took place where they didn't have\n write permissions. (uop shouldn't be doing that --- if it is,\n uop isn't correctly modelling real hardware.)\\\n do_machine_op (user_memory_update (((um' |` allow_write) \\ addrFromPPtr) |` (-(dom ds))));\n\n do_machine_op (device_memory_update (((ds' |` allow_write) \\ addrFromPPtr) |` (dom ds)));\n\n return (e,tc')\n od\"\n\n\nnamed_theorems UserOp_IF_assms\n\nlemma arch_globals_equiv_underlying_memory_update[UserOp_IF_assms, simp]:\n \"arch_globals_equiv ct it kh kh' as as' (underlying_memory_update f ms) ms' =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n \"arch_globals_equiv ct it kh kh' as as' ms (underlying_memory_update f ms') =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n by auto\n\nlemma arch_globals_equiv_device_state_update[UserOp_IF_assms, simp]:\n \"arch_globals_equiv ct it kh kh' as as' (device_state_update f ms) ms' =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n \"arch_globals_equiv ct it kh kh' as as' ms (device_state_update f ms') =\n arch_globals_equiv ct it kh kh' as as' ms ms'\"\n by auto\n\nend\n\n\nrequalify_types RISCV64.user_transition_if\n\nglobal_interpretation UserOp_IF_1?: UserOp_IF_1\nproof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact UserOp_IF_assms)?)\nqed\n\n\ncontext Arch begin global_naming RISCV64\n\nlemma requiv_get_pt_of_thread_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; is_subject aag (cur_thread s);\n pt_ref \\ riscv_global_pt (arch_state s); pt_ref' \\ riscv_global_pt (arch_state s');\n get_vspace_of_thread (kheap s) (arch_state s) (cur_thread s) = pt_ref;\n get_vspace_of_thread (kheap s') (arch_state s') (cur_thread s') = pt_ref' \\\n \\ pt_ref = pt_ref'\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (subgoal_tac \"aag_can_read aag (cur_thread s)\")\n apply (clarsimp simp: get_vspace_of_thread_eq)\n apply simp\n done\n\nlemma requiv_get_pt_entry_eq:\n \"\\ reads_equiv aag s t; invs s; pas_refined aag s; is_subject aag pt; vref \\ user_region;\n \\asid vref. vs_lookup_table max_pt_level asid vref s = Some (max_pt_level, pt) \\\n \\ pt_lookup_slot pt vref (ptes_of s) = pt_lookup_slot pt vref (ptes_of t)\"\n apply (clarsimp simp: pt_lookup_slot_def)\n apply (clarsimp simp: pt_lookup_slot_from_level_def)\n apply (frule_tac pt=pt and vptr=vref in pt_walk_reads_equiv[where bot_level=0])\n apply clarsimp+\n apply (fastforce simp: reads_equiv_f_def)\n apply (fastforce elim: vs_lookup_table_vref_independent)\n apply (clarsimp simp: obind_def split: option.splits)\n done\n\nlemma requiv_get_page_info_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; invs s; is_subject aag pt; x \\ kernel_mappings;\n \\asid. vs_lookup_table max_pt_level asid x s = Some (max_pt_level, pt) \\\n \\ get_page_info (aobjs_of s) pt x = get_page_info (aobjs_of s') pt x\"\n apply (clarsimp simp: get_page_info_def obind_def)\n apply (subgoal_tac \"pt_lookup_slot pt x (ptes_of s) = pt_lookup_slot pt x (ptes_of s')\")\n apply (clarsimp split: option.splits)\n apply (case_tac \"pt_lookup_slot pt x (ptes_of s') = Some (a, b)\"; clarsimp)\n apply (frule_tac ptr=b in ptes_of_reads_equiv[rotated])\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def)\n apply (prop_tac \"ba = bb\", clarsimp simp: pt_slot_offset_def)\n apply (frule pt_walk_is_aligned)\n apply (erule vs_lookup_table_is_aligned; clarsimp simp: canonical_not_kernel_is_user)\n apply (erule pt_walk_is_subject, (fastforce simp: canonical_not_kernel_is_user)+)\n apply (rule requiv_get_pt_entry_eq; fastforce simp: canonical_not_kernel_is_user)\n done\n\nlemma requiv_vspace_of_thread_global_pt:\n \"\\ reads_equiv aag s s'; is_subject aag (cur_thread s); invs s; pas_refined aag s;\n get_vspace_of_thread (kheap s) (arch_state s) (cur_thread s) = global_pt s \\\n \\ get_vspace_of_thread (kheap s') (arch_state s') (cur_thread s') = global_pt s'\"\n apply (erule reads_equivE)\n apply (erule equiv_forE)\n apply (prop_tac \"aag_can_read aag (cur_thread s)\", simp)\n apply (clarsimp simp: get_vspace_of_thread_def\n split: option.split kernel_object.splits cap.splits arch_cap.splits)\n apply (rename_tac tcb word word' word'')\n apply (subgoal_tac \"aag_can_read_asid aag word'\")\n apply (subgoal_tac \"s \\ ArchObjectCap (PageTableCap word (Some (word',word'')))\")\n apply (clarsimp simp: equiv_asids_def equiv_asid_def valid_cap_def obind_def\n vspace_for_asid_def vspace_for_pool_def pool_for_asid_def)\n apply (clarsimp simp: word_gt_0 typ_at_eq_kheap_obj)\n apply (drule_tac x=word' in spec)\n apply (case_tac \"word' = 0\"; clarsimp)\n apply (clarsimp simp: asid_pools_of_ko_at obj_at_def asid_low_bits_of_def opt_map_def\n split: option.splits)\n apply (frule valid_global_arch_objs_global_ptD[OF invs_valid_global_arch_objs])\n apply (drule invs_valid_global_refs)\n apply (drule_tac ptr=\"((cur_thread s), tcb_cnode_index 1)\" in valid_global_refsD2[rotated])\n apply (subst caps_of_state_tcb_cap_cases)\n apply (simp add: get_tcb_def)\n apply (simp add: dom_tcb_cap_cases[simplified])\n apply simp\n apply (simp add: cap_range_def global_refs_def)\n apply (cut_tac s=s and t=\"cur_thread s\" and tcb=tcb in objs_valid_tcb_vtable)\n apply (fastforce simp: invs_valid_objs get_tcb_def)+\n apply (subgoal_tac \"(pasObjectAbs aag (cur_thread s), Control, pasASIDAbs aag word')\n \\ state_asids_to_policy aag s\")\n apply (frule pas_refined_Control_into_is_subject_asid)\n apply (fastforce simp: pas_refined_def)\n apply simp\n apply (cut_tac aag=aag and ptr=\"(cur_thread s, tcb_cnode_index 1)\" in sata_asid)\n prefer 3\n apply (simp add: caps_of_state_tcb_cap_cases get_tcb_def dom_tcb_cap_cases[simplified])+\n done\n\nlemma vspace_for_asid_get_vspace_of_thread:\n \"get_vspace_of_thread (kheap s) (arch_state s) ct \\ global_pt s\n \\ \\asid. vspace_for_asid asid s = Some (get_vspace_of_thread (kheap s) (arch_state s) ct)\"\n by (fastforce simp: get_vspace_of_thread_def\n split: option.splits kernel_object.splits cap.splits arch_cap.splits)\n\nlemma pt_of_thread_same_agent:\n \"\\ pas_refined aag s; is_subject aag tcb_ptr;\n get_vspace_of_thread (kheap s) (arch_state s) tcb_ptr = pt; pt \\ global_pt s \\\n \\ pasObjectAbs aag tcb_ptr = pasObjectAbs aag pt\"\n apply (rule_tac aag=\"pasPolicy aag\" in aag_wellformed_Control[rotated])\n apply (fastforce simp: pas_refined_def)\n apply (rule pas_refined_mem[rotated], simp)\n apply (clarsimp simp: get_vspace_of_thread_eq)\n apply (cut_tac ptr=\"(tcb_ptr, tcb_cnode_index 1)\" in sbta_caps)\n prefer 4\n apply (simp add: state_objs_to_policy_def)\n apply (subst caps_of_state_tcb_cap_cases)\n apply (simp add: get_tcb_def)\n apply (simp add: dom_tcb_cap_cases[simplified])\n apply simp\n apply (simp add: obj_refs_def)\n apply (simp add: cap_auth_conferred_def arch_cap_auth_conferred_def)\n done\n\nlemma requiv_ptable_rights_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s' \\\n \\ ptable_rights_s s = ptable_rights_s s'\"\n apply (simp add: ptable_rights_s_def)\n apply (rule ext)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_rights_def split: option.splits)\n apply (rule conjI; clarsimp)\n apply (frule some_get_page_info_kmapsD;\n fastforce dest: invs_arch_state vspace_for_asid_get_vspace_of_thread\n simp: valid_arch_state_def kernel_mappings_canonical)\n apply (frule some_get_page_info_kmapsD)\n apply (auto dest: invs_arch_state vspace_for_asid_get_vspace_of_thread\n simp: valid_arch_state_def kernel_mappings_canonical)[12]\n apply (frule_tac r=b in some_get_page_info_kmapsD)\n apply (auto dest: invs_arch_state vspace_for_asid_get_vspace_of_thread\n simp: valid_arch_state_def kernel_mappings_canonical)[12]\n apply (case_tac \"get_vspace_of_thread (kheap s) (arch_state s) (cur_thread s) =\n riscv_global_pt (arch_state s)\")\n apply (frule requiv_vspace_of_thread_global_pt)\n apply (auto)[4]\n apply (fastforce dest: get_page_info_gpd_kmaps[rotated, rotated]\n simp: ptable_rights_def invs_valid_global_objs invs_arch_state\n split: option.splits)+\n apply (case_tac \"get_vspace_of_thread (kheap s') (arch_state s') (cur_thread s') =\n riscv_global_pt (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_vspace_of_thread_global_pt; fastforce simp: reads_equiv_def)\n apply (simp add: ptable_rights_def)\n apply (frule requiv_get_pt_of_thread_eq)\n apply (auto)[6]\n apply (frule pt_of_thread_same_agent, simp+)\n apply (subst requiv_get_page_info_eq, simp+)\n apply (drule sym[where s=\"get_vspace_of_thread _ _ _\"], clarsimp)\n apply (fastforce dest: get_vspace_of_thread_reachable elim: vs_lookup_table_vref_independent)+\n done\n\nlemma requiv_ptable_attrs_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s'; ptable_rights_s s x \\ {} \\\n \\ ptable_attrs_s s x = ptable_attrs_s s' x\"\n apply (simp add: ptable_attrs_s_def ptable_rights_s_def)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_attrs_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply (auto simp: vspace_for_asid_get_vspace_of_thread ptable_rights_def)[12]\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply (auto dest: invs_arch_state vspace_for_asid_get_vspace_of_thread\n simp: valid_arch_state_def kernel_mappings_canonical ptable_rights_def)[12]\n apply (case_tac \"get_vspace_of_thread (kheap s) (arch_state s) (cur_thread s) =\n riscv_global_pt (arch_state s)\")\n apply (frule requiv_vspace_of_thread_global_pt)\n apply (fastforce+)[4]\n apply (clarsimp simp: ptable_attrs_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (rule conjI)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply (case_tac \"get_vspace_of_thread (kheap s') (arch_state s') (cur_thread s') =\n riscv_global_pt (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_vspace_of_thread_global_pt)\n apply ((fastforce simp: reads_equiv_def)+)[5]\n apply (simp add: ptable_attrs_def)\n apply (frule requiv_get_pt_of_thread_eq, simp+)[1]\n apply (frule pt_of_thread_same_agent, simp+)[1]\n apply (subst requiv_get_page_info_eq, simp+)\n apply (drule sym[where s=\"get_vspace_of_thread _ _ _\"], clarsimp)\n apply (fastforce dest: get_vspace_of_thread_reachable elim: vs_lookup_table_vref_independent)+\n done\n\nlemma requiv_ptable_lift_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s'; invs s;\n invs s'; is_subject aag (cur_thread s); ptable_rights_s s x \\ {} \\\n \\ ptable_lift_s s x = ptable_lift_s s' x\"\n apply (simp add: ptable_lift_s_def ptable_rights_s_def)\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply (auto simp: vspace_for_asid_get_vspace_of_thread ptable_rights_def)[12]\n apply clarsimp\n apply (frule some_get_page_info_kmapsD)\n apply (auto dest: invs_arch_state vspace_for_asid_get_vspace_of_thread\n simp: valid_arch_state_def kernel_mappings_canonical ptable_rights_def)[12]\n apply (case_tac \"get_vspace_of_thread (kheap s) (arch_state s) (cur_thread s) =\n riscv_global_pt (arch_state s)\")\n apply (frule requiv_vspace_of_thread_global_pt)\n apply (fastforce+)[4]\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (rule conjI)\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (rule conjI)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply clarsimp\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply ((fastforce simp: invs_valid_global_objs invs_arch_state)+)[3]\n apply (case_tac \"get_vspace_of_thread (kheap s') (arch_state s') (cur_thread s') =\n riscv_global_pt (arch_state s')\")\n apply (drule reads_equiv_sym)\n apply (frule requiv_vspace_of_thread_global_pt)\n apply ((fastforce simp: reads_equiv_def)+)[5]\n apply (simp add: ptable_lift_def)\n apply (frule requiv_get_pt_of_thread_eq, simp+)[1]\n apply (frule pt_of_thread_same_agent, simp+)[1]\n apply (subst requiv_get_page_info_eq, simp+)\n apply (drule sym[where s=\"get_vspace_of_thread _ _ _\"], clarsimp)\n apply (fastforce dest: get_vspace_of_thread_reachable elim: vs_lookup_table_vref_independent)+\n done\n\nlemma requiv_ptable_xn_eq:\n \"\\ reads_equiv aag s s'; pas_refined aag s; pas_refined aag s';\n is_subject aag (cur_thread s); invs s; invs s'; ptable_rights_s s x \\ {} \\\n \\ ptable_xn_s s x = ptable_xn_s s' x\"\n by (simp add: ptable_xn_s_def requiv_ptable_attrs_eq)\n\nlemma data_at_obj_range:\n \"\\ data_at sz ptr s; pspace_aligned s; valid_objs s \\\n \\ ptr + (offset && mask (pageBitsForSize sz)) \\ obj_range ptr (ArchObj (DataPage dev sz))\"\n apply (clarsimp simp: data_at_def)\n apply (elim disjE)\n apply (clarsimp simp: obj_at_def)\n apply (drule (2) ptr_in_obj_range)\n apply (clarsimp simp: obj_bits_def obj_range_def)\n apply fastforce\n apply (clarsimp simp: obj_at_def)\n apply (drule (2) ptr_in_obj_range)\n apply (clarsimp simp: obj_bits_def obj_range_def)\n apply fastforce\n done\n\nlemma obj_range_data_for_cong:\n \"obj_range ptr (ArchObj (DataPage dev sz')) = obj_range ptr (ArchObj (DataPage False sz'))\"\n by (simp add: obj_range_def)\n\nlemma pspace_distinct_def':\n \"pspace_distinct \\\n \\s. \\x y ko ko'. kheap s x = Some ko \\ kheap s y = Some ko' \\ x \\ y\n \\ obj_range x ko \\ obj_range y ko' = {}\"\n by (auto simp: pspace_distinct_def obj_range_def field_simps)\n\nlemma data_at_disjoint_equiv:\n \"\\ ptr' \\ ptr;data_at sz' ptr' s; data_at sz ptr s; valid_objs s; pspace_aligned s;\n pspace_distinct s; ptr' \\ obj_range ptr (ArchObj (DataPage dev sz)) \\\n \\ False\"\n apply (frule (2) data_at_obj_range[where offset = 0,simplified])\n apply (clarsimp simp: data_at_def obj_at_def)\n apply (elim disjE)\n by (clarsimp dest!: spec simp: obj_at_def pspace_distinct_def'\n , erule impE, erule conjI2[OF conjI2], (fastforce+)[2]\n , fastforce cong: obj_range_data_for_cong)+\n\nlemma is_aligned_pptrBaseOffset:\n \"is_aligned pptrBaseOffset (pageBitsForSize sz)\"\n by (case_tac sz, simp_all add: pptrBaseOffset_def paddrBase_def pageBits_def canonical_bit_def\n ptTranslationBits_def pptrBase_def is_aligned_def)\n\nlemma ptrFromPAddr_mask_simp:\n \"ptrFromPAddr z && ~~ mask (pageBitsForSize l) =\n ptrFromPAddr (z && ~~ mask (pageBitsForSize l))\"\n apply (simp add: ptrFromPAddr_def field_simps)\n apply (subst mask_out_add_aligned[OF is_aligned_pptrBaseOffset])\n apply simp\n done\n\nlemma pageBitsForSize_le_canonical_bit:\n \"pageBitsForSize sz \\ canonical_bit\"\n by (cases sz, simp_all add: pageBits_def ptTranslationBits_def canonical_bit_def)\n\nlemma data_at_same_size:\n assumes dat_sz':\n \"data_at sz' (ptrFromPAddr base) s\"\n and dat_sz:\n \"data_at sz\n (ptrFromPAddr (base + (x && mask (pageBitsForSize sz'))) && ~~ mask (pageBitsForSize sz)) s\"\n and vs:\n \"pspace_distinct s\" \"pspace_aligned s\" \"valid_objs s\"\n shows \"sz' = sz\"\nproof -\n from dat_sz' and dat_sz\n have trivial:\n \"sz' \\ sz\n \\ ptrFromPAddr (base + (x && mask (pageBitsForSize sz'))) && ~~ mask (pageBitsForSize sz) \\\n ptrFromPAddr base\"\n by (auto simp: data_at_def obj_at_def)\n have sz_equiv: \"(pageBitsForSize sz = pageBitsForSize sz') = (sz' = sz)\"\n by (clarsimp simp: pageBitsForSize_def ptTranslationBits_def split: vmpage_size.splits)\n show ?thesis\n apply (rule sz_equiv[THEN iffD1])\n apply (rule ccontr)\n apply (drule neq_iff[THEN iffD1])\n using dat_sz' dat_sz vs\n apply (cut_tac trivial) prefer 2\n apply (fastforce simp: sz_equiv)\n apply (frule(1) data_at_aligned)\n apply (elim disjE)\n apply (erule(5) data_at_disjoint_equiv)\n apply (unfold obj_range_def)\n apply (rule mask_in_range[THEN iffD1])\n apply (simp add: obj_bits_def)+\n apply (simp add: mask_lower_twice ptrFromPAddr_mask_simp)\n apply (rule arg_cong[where f = ptrFromPAddr])\n apply (subst (asm) is_aligned_ptrFromPAddr_n_eq[OF pageBitsForSize_le_canonical_bit])\n apply (subst neg_mask_add_aligned[OF _ and_mask_less'])\n apply simp\n apply (fastforce simp: pbfs_less_wb'[unfolded word_bits_def,simplified])\n apply (simp add: is_aligned_neg_mask_eq)\n apply (drule not_sym)\n apply (erule(5) data_at_disjoint_equiv)\n apply (unfold obj_range_def)\n apply (rule mask_in_range[THEN iffD1])\n apply (simp add: obj_bits_def is_aligned_neg_mask)+\n apply (simp add: mask_lower_twice ptrFromPAddr_mask_simp)\n apply (rule arg_cong[where f = ptrFromPAddr])\n apply (subst (asm) is_aligned_ptrFromPAddr_n_eq[OF pageBitsForSize_le_canonical_bit])\n apply (rule sym)\n apply (subst mask_lower_twice[symmetric])\n apply (erule less_imp_le_nat)\n apply (rule arg_cong[where f = \"\\x. x && ~~ mask z\" for z])\n apply (subst neg_mask_add_aligned[OF _ and_mask_less'])\n apply simp\n apply (fastforce simp: pbfs_less_wb'[unfolded word_bits_def,simplified])\n apply simp\n done\nqed\n\nlemma level_le_2_cases:\n \"(level :: vm_level) \\ 2 \\ level = 0 \\ level = 1 \\ level = 2\"\n apply clarsimp\n apply (erule_tac P=\"level=2\" in swap)\n apply (subst (asm) order.order_iff_strict)\n apply (erule disjE_R)\n apply (clarsimp simp: order.strict_implies_not_eq)\n apply (induct level; clarsimp)\n apply (drule meta_mp)\n apply (erule order.strict_implies_not_eq)\n apply (drule meta_mp)\n apply (rule bit0.minus_one_leq_less)\n apply (erule order.strict_implies_order)\n apply (erule bit0.zero_least)\n apply clarsimp\n apply clarsimp\n done\n\nlemma ptable_lift_data_consistant:\n assumes vs: \"valid_state s\"\n and pt_lift: \"ptable_lift t s x = Some ptr\"\n and dat: \"data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s\"\n and misc: \"get_vspace_of_thread (kheap s) (arch_state s) t \\ riscv_global_pt (arch_state s)\"\n \"x \\ kernel_mappings\"\n shows \"ptable_lift t s (x && ~~ mask (pageBitsForSize sz)) =\n Some (ptr && ~~ mask (pageBitsForSize sz))\"\nproof -\n have vs': \"valid_objs s \\ valid_arch_state s \\ valid_vspace_objs s\n \\ pspace_distinct s \\ pspace_aligned s\"\n using vs by (simp add: valid_state_def valid_pspace_def)\n thus ?thesis\n using pt_lift dat vs'\n apply (clarsimp simp: ptable_lift_def split: option.splits)\n apply (clarsimp simp: get_page_info_def simp: obind_def split: option.splits)\n apply (rule exE[OF vspace_for_asid_get_vspace_of_thread[OF misc(1)]])\n apply (rename_tac level pt pde asid)\n apply (case_tac pde; clarsimp simp: pte_info_def)\n apply (frule pt_lookup_slot_max_pt_level)\n apply (frule vspace_for_asid_vs_lookup)\n apply (frule canonical_not_kernel_is_user[OF misc(2)])\n apply (frule_tac level=level in valid_vspace_objs_pte)\n apply clarsimp\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def)\n apply (fastforce simp: table_base_pt_slot_offset[OF vs_lookup_table_is_aligned]\n dest: valid_arch_state_asid_table dest!: pt_lookup_vs_lookupI\n intro: vs_lookup_level)\n apply (erule disjE[OF _ _ FalseE])\n prefer 2\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad pt_walk.simps)\n apply (clarsimp split: if_splits)\n apply (fastforce dest: pt_walk_max_level simp: max_pt_level_def2)\n apply (subst (asm) table_index_max_level_slots; clarsimp?)\n apply (fastforce dest: vs_lookup_table_is_aligned valid_arch_state_asid_table)\n apply (clarsimp simp: valid_pte_def)\n apply (frule data_at_same_size; simp?)\n apply (prop_tac \"pt_lookup_slot (get_vspace_of_thread (kheap s) (arch_state s) t)\n (vref_for_level x level) (ptes_of s) = Some (level, pt)\")\n apply (case_tac \"level = max_pt_level\"; clarsimp)\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad)\n apply (subst (asm) pt_lookup_vs_lookup_eq)\n apply clarsimp\n apply (clarsimp simp: vspace_for_asid_def)\n apply (clarsimp simp: pt_walk.simps)\n apply (fastforce dest: pt_walk_max_level simp: max_pt_level_def2 in_omonad)\n apply (fold vref_for_level_def)\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad)\n apply (rule exI)\n apply (subst pt_walk_vref_for_level_eq[where vref'=x])\n apply (fastforce dest: level_le_2_cases le_neq_trans simp: max_pt_level_def2 max_def)\n apply clarsimp\n apply fastforce\n apply (fastforce simp: vref_for_level_def is_aligned_mask_out_add_eq mask_AND_NOT_mask\n pt_bits_left_le_canonical is_aligned_ptrFromPAddr_n_eq\n elim: canonical_vref_for_levelI[unfolded vref_for_level_def]\n dest: data_at_aligned)\n done\nqed\n\nlemma ptable_rights_data_consistant:\n assumes vs: \"valid_state s\"\n and pt_lift: \"ptable_lift t s x = Some ptr\"\n and dat: \"data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s\"\n and misc: \"get_vspace_of_thread (kheap s) (arch_state s) t \\\n riscv_global_pt (arch_state s)\" \"x \\ kernel_mappings\"\n shows \"ptable_rights t s (x && ~~ mask (pageBitsForSize sz)) = ptable_rights t s x\"\nproof -\n have vs': \"valid_objs s \\ valid_arch_state s \\ valid_vspace_objs s\n \\ pspace_distinct s \\ pspace_aligned s\"\n using vs by (simp add: valid_state_def valid_pspace_def)\n thus ?thesis\n using pt_lift dat vs'\n apply (clarsimp simp: ptable_rights_def ptable_lift_def split: option.splits)\n apply (clarsimp simp: get_page_info_def simp: obind_def split: option.splits)\n apply (rule exE[OF vspace_for_asid_get_vspace_of_thread[OF misc(1)]])\n apply (rename_tac level pt pde asid)\n apply (case_tac pde; clarsimp simp: pte_info_def)\n apply (frule pt_lookup_slot_max_pt_level)\n apply (frule vspace_for_asid_vs_lookup)\n apply (frule canonical_not_kernel_is_user[OF misc(2)])\n apply (frule_tac level=level in valid_vspace_objs_pte)\n apply clarsimp\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def)\n apply (fastforce simp: table_base_pt_slot_offset[OF vs_lookup_table_is_aligned]\n dest: valid_arch_state_asid_table dest!: pt_lookup_vs_lookupI\n intro: vs_lookup_level)\n apply (erule disjE[OF _ _ FalseE])\n prefer 2\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad pt_walk.simps)\n apply (clarsimp split: if_splits)\n apply (fastforce dest: pt_walk_max_level simp: max_pt_level_def2)\n apply (subst (asm) table_index_max_level_slots; clarsimp?)\n apply (fastforce dest: vs_lookup_table_is_aligned valid_arch_state_asid_table)\n apply (clarsimp simp: valid_pte_def)\n apply (frule data_at_same_size; simp?)\n apply (prop_tac \"pt_lookup_slot (get_vspace_of_thread (kheap s) (arch_state s) t)\n (vref_for_level x level) (ptes_of s) = Some (level, pt)\")\n apply (case_tac \"level = max_pt_level\"; clarsimp)\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad)\n apply (subst (asm) pt_lookup_vs_lookup_eq)\n apply clarsimp\n apply (clarsimp simp: vspace_for_asid_def)\n apply (clarsimp simp: pt_walk.simps)\n apply (fastforce dest: pt_walk_max_level simp: max_pt_level_def2 in_omonad)\n apply (fold vref_for_level_def)\n apply (clarsimp simp: pt_lookup_slot_def pt_lookup_slot_from_level_def in_omonad)\n apply (rule exI)\n apply (subst pt_walk_vref_for_level_eq[where vref'=x])\n apply (fastforce dest: level_le_2_cases le_neq_trans simp: max_pt_level_def2 max_def)\n apply clarsimp\n apply fastforce\n apply (clarsimp simp: vref_for_level_def)\n apply (fastforce dest: canonical_vref_for_levelI[unfolded vref_for_level_def]\n simp: pt_bits_left_le_canonical )\n done\nqed\n\n\nlemma user_op_access_data_at:\n \"\\ invs s; pas_refined aag s; is_subject aag tcb; ptable_lift tcb s x = Some ptr;\n data_at sz ((ptrFromPAddr ptr) && ~~ mask (pageBitsForSize sz)) s;\n auth \\ vspace_cap_rights_to_auth (ptable_rights tcb s x) \\\n \\ (pasObjectAbs aag tcb, auth,\n pasObjectAbs aag (ptrFromPAddr (ptr && ~~ mask (pageBitsForSize sz)))) \\ pasPolicy aag\"\n apply (case_tac \"x \\ kernel_mappings\")\n apply (clarsimp simp: ptable_lift_def ptable_rights_def split: option.splits)\n apply (frule some_get_page_info_kmapsD)\n apply (fastforce dest: invs_arch_state invs_equal_kernel_mappings\n simp: valid_arch_state_def vspace_for_asid_get_vspace_of_thread\n kernel_mappings_canonical vspace_cap_rights_to_auth_def)+\n apply (case_tac \"get_vspace_of_thread (kheap s) (arch_state s) tcb = riscv_global_pt (arch_state s)\")\n apply (clarsimp simp: ptable_lift_def ptable_rights_def split: option.splits)\n apply (frule get_page_info_gpd_kmaps[rotated, rotated])\n apply (fastforce simp: invs_valid_global_objs invs_arch_state)+\n apply (frule (2) ptable_lift_data_consistant[rotated 2])\n apply fastforce\n apply fastforce\n apply (frule (2) ptable_rights_data_consistant[rotated 2])\n apply fastforce\n apply fastforce\n apply (erule (3) user_op_access)\n apply simp\n done\n\nlemma user_frame_at_equiv:\n \"\\ typ_at (AArch (AUserData sz)) p s; equiv_for P kheap s s'; P p \\\n \\ typ_at (AArch (AUserData sz)) p s'\"\n by (clarsimp simp: equiv_for_def obj_at_def)\n\nlemma device_frame_at_equiv:\n \"\\ typ_at (AArch (ADeviceData sz)) p s; equiv_for P kheap s s'; P p \\\n \\ typ_at (AArch (ADeviceData sz)) p s'\"\n by (clarsimp simp: equiv_for_def obj_at_def)\n\nlemma typ_at_user_data_at:\n \"typ_at (AArch (AUserData sz)) p s \\ data_at sz p s\"\n by (simp add: data_at_def)\n\nlemma typ_at_device_data_at:\n \"typ_at (AArch (ADeviceData sz)) p s \\ data_at sz p s\"\n by (simp add: data_at_def)\n\nlemma requiv_device_mem_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s';\n is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ device_mem s (ptrFromPAddr y) = device_mem s' (ptrFromPAddr y)\"\n apply (simp add: device_mem_def)\n apply (rule conjI)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_device_frame_def)\n apply (rule exI)\n apply (rule device_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_device_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n apply clarsimp\n apply (frule requiv_ptable_rights_eq, fastforce+)\n apply (frule requiv_ptable_lift_eq, fastforce+)\n apply (clarsimp simp: globals_equiv_def)\n apply (erule notE)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_device_frame_def)\n apply (rule exI)\n apply (rule device_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (erule equiv_symmetric[THEN iffD1])\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s'])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_device_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n done\n\nlemma requiv_user_mem_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s';\n is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ user_mem s (ptrFromPAddr y) = user_mem s' (ptrFromPAddr y)\"\n apply (simp add: user_mem_def)\n apply (rule conjI)\n apply clarsimp\n apply (rule context_conjI')\n apply (erule reads_equivE)\n apply (clarsimp simp: in_user_frame_def)\n apply (rule exI)\n apply (rule user_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (frule_tac auth=Read in user_op_access_data_at[where s = s])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n apply clarsimp\n apply (subgoal_tac \"aag_can_read aag (ptrFromPAddr y)\")\n apply (erule reads_equivE)\n apply clarsimp\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply simp\n apply (frule_tac auth=Read in user_op_access)\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def)+\n apply (rule reads_read)\n apply simp\n apply (frule requiv_ptable_rights_eq, fastforce+)\n apply (frule requiv_ptable_lift_eq, fastforce+)\n apply (clarsimp simp: globals_equiv_def)\n apply (erule notE)\n apply (erule reads_equivE)\n apply (clarsimp simp: in_user_frame_def)\n apply (rule exI)\n apply (rule user_frame_at_equiv)\n apply assumption+\n apply (erule_tac f=\"underlying_memory\" in equiv_forE)\n apply (erule equiv_symmetric[THEN iffD1])\n apply (frule_tac auth=Read in user_op_access_data_at[where s=s'])\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+\n apply (rule reads_read)\n apply (fastforce simp: ptrFromPAddr_mask_simp)\n done\n\nlemma ptable_rights_imp_frameD:\n \"\\ ptable_lift t s x = Some y;valid_state s;ptable_rights t s x \\ {} \\\n \\ \\sz. data_at sz (ptrFromPAddr y && ~~ mask (pageBitsForSize sz)) s\"\n apply (subst (asm) addrFromPPtr_ptrFromPAddr_id[symmetric])\n apply (drule ptable_rights_imp_frame)\n apply simp+\n apply (rule addrFromPPtr_ptrFromPAddr_id[symmetric])\n apply (auto simp: in_user_frame_def in_device_frame_def\n dest!: spec typ_at_user_data_at typ_at_device_data_at)\n done\n\nlemma requiv_user_device_eq:\n \"\\ reads_equiv aag s s'; globals_equiv s s'; invs s; invs s';\n is_subject aag (cur_thread s); AllowRead \\ ptable_rights_s s x;\n ptable_lift_s s x = Some y; pas_refined aag s; pas_refined aag s' \\\n \\ device_state (machine_state s) (ptrFromPAddr y) =\n device_state (machine_state s') (ptrFromPAddr y)\"\n apply (simp add: ptable_lift_s_def)\n apply (frule ptable_rights_imp_frameD)\n apply fastforce\n apply (fastforce simp: ptable_rights_s_def)\n apply (erule reads_equivE)\n apply clarsimp\n apply (erule_tac f=\"device_state\" in equiv_forD)\n apply (frule_tac auth=Read in user_op_access_data_at[where s = s])\n apply ((fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def\n | intro typ_at_user_data_at)+)[6]\n apply (rule reads_read)\n apply (frule_tac auth=Read in user_op_access)\n apply (fastforce simp: ptable_lift_s_def ptable_rights_s_def vspace_cap_rights_to_auth_def)+\n done\n\n\ndefinition context_matches_state where\n \"context_matches_state pl pr pxn ms s \\ case ms of (um, ds) \\\n pl = ptable_lift_s s |` {x. pr x \\ {}} \\\n pr = ptable_rights_s s \\\n pxn = (\\x. pr x \\ {} \\ ptable_xn_s s x) \\\n um = (user_mem s \\ ptrFromPAddr) |` {y. \\x. pl x = Some y \\ AllowRead \\ pr x} \\\n ds = (device_state (machine_state s) \\ ptrFromPAddr) |`\n {y. \\x. pl x = Some y \\ AllowRead \\ pr x}\"\n\n\nlemma do_user_op_reads_respects_g:\n notes split_paired_All[simp del]\n shows\n \"(\\pl pr pxn tc ms s. P tc s \\ context_matches_state pl pr pxn ms s\n \\ (\\x. uop (cur_thread s) pl pr pxn (tc, ms) = {x}))\n \\ reads_respects_g aag l (pas_refined aag and invs and is_subject aag \\ cur_thread\n and (\\s. cur_thread s \\ idle_thread s) and P tc)\n (do_user_op_if uop tc)\"\n apply (simp add: do_user_op_if_def)\n apply (rule use_spec_ev)\n apply (rule spec_equiv_valid_add_asm)\n apply (rule spec_equiv_valid_add_rel[OF _ reads_equiv_g_refl])\n apply (rule spec_equiv_valid_add_rel'[OF _ affects_equiv_refl])\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_ptable_rights_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (rule ext)\n apply (clarsimp simp: reads_equiv_g_def)\n apply (case_tac \"ptable_rights_s st x = {}\", simp)\n apply simp\n apply (rule requiv_ptable_xn_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (subst expand_restrict_map_eq,clarsimp)\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_ptable_lift_eq,simp+)[1]\n apply (rule spec_equiv_valid_inv_gets[where proj=id,simplified])\n apply (clarsimp simp: reads_equiv_g_def)\n apply (rule requiv_cur_thread_eq,fastforce)\n apply (rule spec_equiv_valid_inv_gets_more[where proj=\"\\m. dom m \\ cw\"\n and projsnd=\"\\m. m |` cr\" for cr and cw])\n apply (rule context_conjI')\n apply (subst expand_restrict_map_eq)\n apply (clarsimp simp: reads_equiv_g_def restrict_map_def)\n apply (rule requiv_user_mem_eq)\n apply simp+\n apply fastforce\n apply (rule spec_equiv_valid_inv_gets[where proj = \"\\x. ()\", simplified])\n apply (rule spec_equiv_valid_inv_gets_more[where proj = \"\\m. (m \\ ptrFromPAddr) |` cr\" for cr])\n apply (rule conjI)\n apply (subst expand_restrict_map_eq)\n apply (clarsimp simp: restrict_map_def reads_equiv_g_def)\n apply (rule requiv_user_device_eq)\n apply simp+\n apply (clarsimp simp: globals_equiv_def reads_equiv_g_def)\n apply (rule spec_equiv_valid_guard_imp)\n apply (wpsimp wp: dmo_user_memory_update_reads_respects_g dmo_device_state_update_reads_respects_g\n dmo_device_state_update_reads_respects_g select_ev select_wp dmo_wp)\n apply clarsimp\n apply (rule conjI)\n apply clarsimp\n apply (drule spec)+\n apply (erule impE)\n prefer 2\n apply assumption\n apply (clarsimp simp: context_matches_state_def comp_def reads_equiv_g_def globals_equiv_def)\n apply (clarsimp simp: reads_equiv_g_def globals_equiv_def)\n done\n\ndefinition valid_vspace_objs_if where\n \"valid_vspace_objs_if \\ \\\"\n\ndeclare valid_vspace_objs_if_def[simp]\n\nend\n\nrequalify_consts\n RISCV64.do_user_op_if\n RISCV64.valid_vspace_objs_if\n RISCV64.context_matches_state\n\nrequalify_facts\n RISCV64.do_user_op_reads_respects_g\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/infoflow/RISCV64/ArchUserOp_IF.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.23934934732271165, "lm_q1q2_score": 0.12247903535013602}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory Proof_SI\nimports\n CreateObjects_SI\n CreateIRQCaps_SI\n DuplicateCaps_SI\n InitVSpace_SI\n InitTCB_SI\n InitCSpace_SI\n InitIRQ_SI\n StartThreads_SI\nbegin\n\nlemma parse_bootinfo_sep:\n \"\\\\((\\* (cptr, cap) \\ set (zip [ustart .e. uend - 1] untyped_caps). (si_cnode_id, unat cptr) \\c cap) \\*\n (\\* cptr \\ set [fstart .e. fend - 1]. (si_cnode_id, unat cptr) \\c NullCap) \\*\n (\\* obj_id\\(\\cap\\set untyped_caps. cap_free_ids cap). obj_id \\o Untyped) \\* R)\n and K (bi_untypes bootinfo = (ustart, uend) \\\n bi_free_slots bootinfo = (fstart, fend) \\\n unat ustart < 2 ^ si_cnode_size \\\n unat (uend - 1) < 2 ^ si_cnode_size \\\n unat fstart < 2 ^ si_cnode_size \\\n unat (fend - 1) < 2 ^ si_cnode_size \\\n uend \\ 0 \\\n fend \\ 0 \\\n list_all is_full_untyped_cap untyped_caps \\\n length untyped_caps = unat uend - unat ustart) \\\\\n parse_bootinfo bootinfo\n \\\\rv.\n \\((\\* (cptr, cap) \\ set (zip (fst rv) untyped_caps). (si_cnode_id, unat cptr) \\c cap) \\*\n (\\* cptr \\ set (snd rv). (si_cnode_id, unat cptr) \\c NullCap) \\*\n (\\* obj_id\\(\\cap\\set untyped_caps. cap_free_ids cap). obj_id \\o Untyped) \\* R) and\n K (rv = ([fst (bi_untypes bootinfo) .e. snd (bi_untypes bootinfo) - 1],\n [fst (bi_free_slots bootinfo) .e. snd (bi_free_slots bootinfo) - 1]))\\ \\\"\n apply (clarsimp simp: parse_bootinfo_def)\n apply (cases bootinfo, clarsimp)\n apply wp\n apply (clarsimp simp: zip_map1 comp_def split_beta')\n done\n\n(* This isn't actually all the combinations, but enough of them for what I needed. *)\nlemma object_types_distinct:\n \"tcb_at x s \\ \\ cnode_at x s\"\n \"table_at x s \\ \\ cnode_at x s\"\n \"table_at x s \\ \\ tcb_at x s\"\n \"capless_at x s \\ \\ cnode_at x s\"\n \"capless_at x s \\ \\ tcb_at x s\"\n \"capless_at x s \\ \\ table_at x s\"\n \"capless_at x s \\ \\ pt_at x s\"\n \"capless_at x s \\ \\ pd_at x s\"\n \"capless_at x s \\ \\ asidpool_at x s\"\n by (clarsimp simp: object_at_def is_tcb_def is_cnode_def is_pd_def is_pt_def\n is_ep_def is_ntfn_def is_asidpool_def is_frame_def\n is_untyped_def | rule conjI |\n clarsimp split: cdl_object.splits)+\n\nlemma real_objects_some_type:\n \"well_formed spec \\\n {obj_id. real_object_at obj_id spec \\\n \\ cnode_at obj_id spec \\\n \\ tcb_at obj_id spec \\\n \\ pt_at obj_id spec \\\n \\ pd_at obj_id spec \\\n \\ untyped_at obj_id spec \\\n \\ ep_at obj_id spec \\\n \\ ntfn_at obj_id spec \\\n \\ frame_at obj_id spec} = {}\"\n apply (clarsimp simp: object_at_def is_tcb_def is_cnode_def is_pd_def is_pt_def\n is_ep_def is_ntfn_def is_asidpool_def is_frame_def is_untyped_def)\n apply (clarsimp split: cdl_object.splits)\n apply (drule_tac obj_id=x in well_formed_asidpool_at)\n apply (clarsimp simp: real_object_at_def object_at_def is_asidpool_def irq_nodes_def is_irq_node_def\n split: cdl_object.splits)\n by metis\n\nlemma capdl_objects_by_parts:\n \"well_formed spec \\\n (sep_map_set_conj P {obj_id. real_object_at obj_id spec}) =\n (sep_map_set_conj P {obj_id. cnode_at obj_id spec} \\*\n sep_map_set_conj P {obj_id. tcb_at obj_id spec} \\*\n sep_map_set_conj P {obj_id. table_at obj_id spec} \\*\n sep_map_set_conj P {obj_id. capless_at obj_id spec})\"\n apply (rule sym)\n apply (subst (5) sep_map_set_conj_restrict [where t = \"(\\obj. cnode_at obj spec)\"], simp)\n apply (subst (6) sep_map_set_conj_restrict [where t = \"(\\obj. tcb_at obj spec)\"], simp)\n apply (subst (7) sep_map_set_conj_restrict [where t = \"(\\obj. table_at obj spec)\"], simp)\n apply (subst (8) sep_map_set_conj_restrict [where t = \"(\\obj. capless_at obj spec)\"], simp)\n apply (clarsimp simp: object_types_distinct real_object_not_irq_node real_objects_some_type\n cong: rev_conj_cong)\n done\n\nlemma objects_empty_by_parts:\n \"well_formed spec \\\n (objects_empty spec t {obj_id. real_object_at obj_id spec}) =\n (objects_empty spec t {obj_id. cnode_at obj_id spec} \\*\n objects_empty spec t {obj_id. tcb_at obj_id spec} \\*\n objects_empty spec t {obj_id. table_at obj_id spec} \\*\n objects_empty spec t {obj_id. capless_at obj_id spec})\"\n by (clarsimp simp: objects_empty_def capdl_objects_by_parts)\n\nlemma objects_initialised_by_parts:\n \"well_formed spec \\\n (objects_initialised spec t {obj_id. real_object_at obj_id spec}) =\n (objects_initialised spec t {obj_id. cnode_at obj_id spec} \\*\n objects_initialised spec t {obj_id. tcb_at obj_id spec} \\*\n objects_initialised spec t {obj_id. table_at obj_id spec} \\*\n objects_initialised spec t {obj_id. capless_at obj_id spec})\"\n by (clarsimp simp: objects_initialised_def capdl_objects_by_parts)\n\nlemma object_empty_object_initialised_capless:\n \"capless_at obj_id spec \\\n object_empty spec t obj_id = object_initialised spec t obj_id\"\n apply (rule ext)\n apply (clarsimp simp: object_empty_def object_initialised_def)\n apply (clarsimp simp: object_initialised_general_def object_default_state_def2)\n apply (fastforce simp: object_at_def update_slots_def\n object_default_state_def2 spec2s_def\n is_ep_def is_ntfn_def is_asidpool_def\n is_frame_def is_untyped_def cdl_frame.splits\n split: cdl_object.splits)\n done\n\nlemma objects_empty_objects_initialised_capless:\n \"objects_empty spec t {obj_id. capless_at obj_id spec} =\n objects_initialised spec t {obj_id. capless_at obj_id spec}\"\n apply (clarsimp simp: objects_empty_def objects_initialised_def)\n apply (rule sep.prod.cong, simp)\n apply (clarsimp simp: object_empty_object_initialised_capless)\n done\n\nlemma valid_case_prod':\n \"(\\x y. \\P x y\\ f x y \\Q\\) \\ \\P (fst v) (snd v)\\ case v of (x, y) \\ f x y \\Q\\\"\n by (clarsimp split: prod.splits)\n\nlemma le_list_all:\n \"\\unat start < 2 ^ si_cnode_size; unat (end - 1) < 2 ^ si_cnode_size\\\n \\ list_all (\\n. (n::32 word) < 2 ^ si_cnode_size) [start .e. end - 1]\"\n apply (clarsimp simp: list_all_iff)\n apply (subst word_arith_power_alt)\n apply simp\n by (metis (no_types) dual_order.strict_trans2 unat_less_2_si_cnode_size)\n\nlemma list_all_drop:\n \"list_all P xs \\ list_all P (drop n xs)\"\n by (fastforce simp: list_all_iff dest: in_set_dropD)\n\nlemma dom_map_of_zip':\n \"length xs \\ length ys \\ dom (map_of (zip xs ys)) = set xs\"\n apply (subst zip_take_length [symmetric])\n apply (subst dom_map_of_zip, simp+)\n done\n\n(* FIXME: MOVE (Lib) *)\nlemma in_zip_map: \"p \\ set xs \\ length xs \\ length ys \\ map_of (zip xs ys) p \\ None\"\n using dom_map_of_zip' by blast\n\nlemma map_of_list_allE:\n \"map_of (zip ys xs) p = Some v \\ distinct ys \\ list_all P xs \\ P v\"\n apply (induct ys arbitrary: xs; clarsimp)\n by (meson in_set_zipE list_all_spec map_of_SomeD)\n\nlemma card_eq_lengthI:\n \"set xs = ys \\ distinct xs \\ length xs = card ys\"\n by (induct xs arbitrary: ys; fastforce)\n\nlemma length_filter_card:\n \"\\s_list = sorted_list_of_set s; finite s\\\n \\ length (filter P s_list) = card {x \\ s. P x}\"\n by (fastforce intro: card_eq_lengthI)\n\n\nlemma sys_init_explicit:\n \"\\well_formed spec;\n set obj_ids = dom (cdl_objects spec); distinct obj_ids;\n real_ids = [obj_id \\ obj_ids. real_object_at obj_id spec];\n length obj_ids + length [obj\\obj_ids. cnode_or_tcb_at obj spec] +\n card (\\(set ` get_frame_caps spec ` {obj. pd_at obj spec})) \\ unat fend - unat fstart;\n length untyped_caps = unat uend - unat ustart;\n distinct_sets (map cap_free_ids untyped_caps);\n list_all is_full_untyped_cap untyped_caps;\n list_all well_formed_untyped_cap untyped_caps;\n list_all (\\c. \\ is_device_cap c) untyped_caps;\n bi_untypes bootinfo = (ustart, uend);\n bi_free_slots bootinfo = (fstart, fend);\n unat ustart < 2 ^ si_cnode_size;\n unat (uend - 1) < 2 ^ si_cnode_size;\n unat fstart < 2 ^ si_cnode_size;\n unat (fend - 1) < 2 ^ si_cnode_size;\n uend \\ 0; fend \\ 0;\n [ustart .e. uend - 1] = untyped_cptrs;\n [fstart .e. fend - 1] = free_cptrs;\n (map_of (zip [obj\\obj_ids . cnode_or_tcb_at obj spec] (drop (length obj_ids) [fstart .e. fend - 1]))) = dup_caps\n \\ \\\n \\\\(\\* (cptr, cap) \\ set (zip untyped_cptrs untyped_caps). (si_cnode_id, unat cptr) \\c cap) \\*\n (\\* cptr \\ set free_cptrs. (si_cnode_id, unat cptr) \\c NullCap) \\*\n (\\* obj_id\\(\\cap\\set untyped_caps. cap_free_ids cap). obj_id \\o Untyped) \\*\n si_objects \\*\n si_irq_nodes spec \\*\n (SETSEPCONJ pd_id | pd_at pd_id spec.\n frame_duplicates_empty (make_frame_cap_map obj_ids (drop (length obj_ids) free_cptrs) spec)\n pd_id spec) \\*\n R\\\\\n init_system spec bootinfo obj_ids\n \\\\_ s. \\t.\n \\objects_initialised spec t {obj_id. real_object_at obj_id spec} \\*\n irqs_initialised spec t (used_irqs spec) \\*\n (\\* cptr\\set (take (card (dom (cdl_objects spec))) free_cptrs). (si_cnode_id, unat cptr) \\c NullCap) \\*\n si_caps_at t dup_caps spec False {obj_id. cnode_or_tcb_at obj_id spec} \\*\n si_objects \\*\n si_objects_extra_caps (dom (cdl_objects spec))\n (free_cptrs :: 32 word list)\n (untyped_cptrs :: 32 word list) spec \\*\n (SETSEPCONJ pd_id | pd_at pd_id spec.\n frame_duplicates_copied (make_frame_cap_map obj_ids (drop (length obj_ids) free_cptrs) spec)\n pd_id spec t) \\*\n R\\ s \\\n inj_on t (dom (cdl_objects spec)) \\ dom t = set obj_ids\\\"\n supply [[unify_search_bound = 1000]]\n apply clarsimp\n apply (frule (1) le_list_all [where start = ustart])\n apply (frule (1) le_list_all [where start = fstart])\n apply (frule well_formed_objects_card)\n apply (insert distinct_card [symmetric, where xs =\"[obj\\obj_ids . cnode_or_tcb_at obj spec]\"], simp)\n apply (frule distinct_card [symmetric])\n apply (clarsimp simp: init_system_def, wp valid_case_prod')\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t in start_threads_sep [sep_wandise], simp)\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t and\n free_cptrs=\"[fstart .e. fend - 1]\" in init_cspace_sep [sep_wandise])\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t in init_tcbs_sep [sep_wandise])\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t in init_vspace_sep [sep_wandise])\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t in init_pd_asids_sep [sep_wandise])\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t and dev=False in init_irqs_sep [sep_wandise])\n apply (rule hoare_vcg_ex_lift, rename_tac t, rule_tac t=t and dev=False and\n untyped_cptrs = \"[ustart .e. uend - 1]\" and\n free_cptrs_orig = \"[fstart .e. fend - 1]\" in duplicate_caps_sep [sep_wandise])\n apply (rule create_irq_caps_sep [where dev = False,sep_wandise,\n where free_cptrs_orig = \"[fstart .e. fend - 1]\"\n and untyped_cptrs = \"[ustart .e. uend - 1]\"\n and orig_caps = \"map_of (zip [obj\\obj_ids. real_object_at obj spec]\n [fstart .e. fend - 1])\"\n and spec = spec])\n apply (wp sep_wp: create_objects_sep [where untyped_caps = untyped_caps and dev = False])\n apply (wp sep_wp: parse_bootinfo_sep [where fstart = fstart\n and fend = fend\n and ustart = ustart\n and uend = uend\n and untyped_caps = untyped_caps])\n apply (subst objects_initialised_by_parts, assumption)\n apply (subst objects_empty_by_parts, assumption)+\n apply (subst objects_empty_objects_initialised_capless)+\n apply (clarsimp simp: linorder_not_le)\n apply (intro conjI allI impI pred_conjI | sep_cancel+)+\n apply fastforce\n apply (clarsimp simp: less_diff_conv)\n apply (rule list_all_drop, erule (1) le_list_all)\n apply clarsimp\n apply (subgoal_tac \"map_of (zip (filter (\\obj. real_object_at obj spec) obj_ids) free_cptrs)\n p \\ None\")\n apply clarsimp\n apply (erule map_of_list_allE)\n apply (fastforce intro!: List.distinct_filter)\n apply (fastforce intro!: le_list_all)\n apply (rule in_zip_map)\n apply clarsimp\n apply (fastforce dest!: real_object_not_irq_node(3))\n apply (insert length_filter_le[where xs = obj_ids and P=\"\\obj. real_object_at obj spec\"],\n fastforce)[1]\n apply (erule (1) le_list_all)\n apply (rule list_all_drop, erule (1) le_list_all)\n apply simp\n apply (subst dom_map_of_zip')\n apply (insert length_filter_le [where xs = obj_ids and P=\"\\obj. real_object_at obj spec\"],\n fastforce)[1]\n apply simp\n apply (erule (1) le_list_all)\n done\n\n(**************************************************\n * The top level lemma for system initialisation. *\n **************************************************)\n(* FIXME, make the acquiring of the object_ids part of sys_init, not a parameter. *)\n\nlemma sys_init:\n \"\\well_formed spec; obj_ids = sorted_list_of_set (dom (cdl_objects spec))\\ \\\n \\\\valid_boot_info bootinfo spec \\* R\\\\\n init_system spec bootinfo obj_ids\n \\\\_ s. \\t.\n \\objects_initialised spec t {obj_id. real_object_at obj_id spec} \\*\n irqs_initialised spec t (used_irqs spec) \\*\n si_final_objects spec t \\*\n (EXS map. (SETSEPCONJ pd_id | pd_at pd_id spec. frame_duplicates_copied map pd_id spec t)) \\*\n R\\ s \\\n inj_on t (set obj_ids) \\ dom t = set obj_ids\\\"\n apply (insert distinct_card [where xs = \"[obj\\obj_ids . cnode_or_tcb_at obj spec]\"], simp)\n apply (clarsimp simp: valid_boot_info_def si_final_objects_def\n sep_conj_exists sep_conj_assoc)\n apply (subst ex_conj_increase)+\n apply (rule hoare_ex_pre)+\n apply (rule hoare_grab_asm)+\n apply (rule hoare_chain)\n apply (rule sys_init_explicit[where obj_ids=\"sorted_list_of_set (dom (cdl_objects spec))\" and R=R],\n (assumption|simp add: unat_less_2_si_cnode_size' length_filter_card)+)\n apply sep_solve\n apply clarsimp\n apply (rule_tac x=t in exI)\n apply (clarsimp)\n apply (clarsimp simp: si_objects_extra_caps_def si_caps_at_def\n sep_conj_exists sep_conj_assoc)\n apply (rule_tac x=\"(map_of (zip [obj \\ obj_ids. cnode_or_tcb_at obj spec]\n (drop (length obj_ids) [fstart .e. fend - 1])))\" in exI)\n apply (rule_tac x=\"[x .e. xa - 1]\" in exI)\n apply (rule_tac x=\"[fstart .e. fend - 1]\" in exI)\n apply (rule_tac x=untyped_capsa in exI)\n apply (rule_tac x=all_available_ids in exI)\n apply (rule_tac x=\"make_frame_cap_map obj_ids (drop (card (dom (cdl_objects spec)))\n [fstart .e. fend - 1]) spec\" in exI)\n apply (clarsimp simp: sep_conj_ac)\n done\n\ndefinition injective :: \"('a \\ 'b option) \\ bool\"\nwhere \"injective f \\ inj_on f (dom f)\"\n\nlemma sys_init_paper:\n \"\\well_formed spec; obj_ids = sorted_list_of_set (dom (cdl_objects spec))\\ \\\n \\\\valid_boot_info bootinfo spec \\* R\\\\\n init_system spec bootinfo obj_ids\n \\\\_ s. \\\\.\n \\objects_initialised spec \\ {obj_id. real_object_at obj_id spec} \\*\n irqs_initialised spec \\ (used_irqs spec) \\*\n si_final_objects spec \\ \\*\n (EXS map. (SETSEPCONJ pd_id | pd_at pd_id spec. frame_duplicates_copied map pd_id spec \\)) \\*\n R\\ s \\\n injective \\ \\ dom \\ = set obj_ids\\\"\n apply (rule hoare_strengthen_post)\n apply (fact sys_init)\n apply (fastforce simp: injective_def)\n done\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/sys-init/Proof_SI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5467381519846138, "lm_q2_score": 0.2200070997458932, "lm_q1q2_score": 0.12028627513856426}} {"text": "(*<*)\ntheory Cheatsheet\n imports Main \"HOL-Library.LaTeXsugar\" \n(* \"HOL-Library.OptionalSugar\" *)\nbegin \n(*>*)\n\nchapter \\Isabelle documentation cheatsheet \\label{sec:cheatsheet}\\\n\ntext \\\nIsabelle allows you to mix computer verified proofs with human readable text. It has quite extensive\ncapabilities to modify the exported documentation, and this Theory/Module can be used as a \ncheatsheet to guide a developer write maintanable documentation. It is recommended to read this\nboth in the JEdit editor and in the generated pdf to understand how different commands affects \nthe output.\n\\\n\nsection \\Text basics\\\n\nsubsection \"Text, comments and commands\"\n\ntext \"This is normal text between quotes.\"\n\ntext \n\"\nEach text command creates a paragraph.\nAnd it can be multiline.\n\nAn empty line does not create a new paragraph, it just creates a newline.\n\"\n\n\\ \\This is a comment, it doesn't appear in the final document\\\n\n(* This is another way to express a comment *)\n\ntext\n\"\nText blocks are commands to Isabelle, just like defining a datatype \n\"\n\ndatatype 'a tree\n = Tip \n | Node \"'a tree\" 'a \"'a tree\" \n\ntext \n\"\nBy default all commands appear in the generated documentation, unless you enclose them \nbetween (*<*) a particular comment block(*>*).\n\"\n\n(*<*)\ndatatype 'a perhaps\n = Nope\n | Yeap 'a\n \n(*>*)\n\n\n\nsubsection \"Unicode characters\"\n\ntext \n\\\nIsabelle uses a lot of Unicode characters, for example the one used to define this \"text block\" is\ncalled a cartouche, and it is used in several places to delimit a string.\n\\\n\ntext \n\\\nInside the JEdit editor you can use the \"Symbols\" panel to insert a character, or you can use the \nautocomplete feature. To insert a cartouche start by typing a double quote \", and when the modal\nappears, select cartouche template. Most unicode characters can be fuzzy searched starting with a \nbackslash and with the name of the character. Searching for @{verbatim \\\\forall\\} will yield the \n\"\\forall\" character. If you are reading this from JEdit, you will note that the actual unicode \ncharacter is not display here, in order to see it, it needs to be inside a proposition or an \nantiquote that expects it (E.g: @{prop \"\\ x. x\"}).\n\\\n\nsubsection \"Antiquotations\"\n\ntext \n\\\nAntiquotations are a way to export constructs to the document. The basic syntax is to write the \nat symbol (@) followed by the antiquotation body inside curly braces (\\{\\}). \n\\\n\ntext \n\\\nFor example we can use the verbatim antiquote to escape text that would otherwise be interpreted\nby Isabelle: @{verbatim \\@verbatim{\"The outer verbatim escapes the inner one. So meta\"}\\}\n\\\n\ntext \n\\\nThe basic syntax for an antiquote is @{verbatim \\@{ antiquotation_body }\\}.\nThe full syntax and a list of commands is available in chapter 4.2 \nof the isar\\_ref pdf available at this link \n@{url \"https://isabelle.in.tum.de/doc/isar-ref.pdf#page=84\"}. Note the use of the \n@{verbatim \"@{url}\"} antiquote.\n\\\n\ntext\n\\\nNot all antiquotes are listed in the chapter 4.2, for example the @{verbatim \"datatype\"} and \n@{verbatim \"code_stmts\"} antiquotes are missing. To see a list of all the antiquotes available in a\ncontext and the options you can click on the following command and inspect the output pane: \n\\\n\nprint_antiquotations\n\ntext \n\\\nYou can read the \\<^emph>\\ML\\ code to see what arguments can be passed by entering the definition\nwith @{verbatim \"CMD+click\"} on the antiquote.\n\\\n\ntext\n\\\nSidenote:\n\\<^item> To avoid adding a url in the body of the text, you can use a footnote using the\n@{verbatim \\\\footnote\\} unicode char \\<^footnote>\\Url by antiquote: @{url \"www.google.com\"}\\.\n\\<^item> Instead of the @{verbatim \"@{url}\"} antiquote, you can also use the unicode char @{verbatim \\\\url\\}\n \\<^footnote>\\Url by unicode char: \\<^url>\\http://www.google.com\\ \\.\n\\<^item> Instead of the @{verbatim \"@{verbatim}\"} antiquote you can use the \\<^verbatim>\\\\verbatim\\ char.\n\\\n \nsubsection \\Formatting text\\\n\ntext \n\n\\\nYou can use the @{verbatim \\\\emph\\} char to \\<^emph>\\emphasize text\\, or the \n@{verbatim \\\\bold\\} to \\<^bold>\\bold it\\.\n \n\\begin{center}\nYou can also write centered text.\n\\end{center}\n\nUse the @{verbatim \\\\item\\} char \n\\<^item> to\n\\<^item> create \n\\<^item> bullets\n\n\\\ntext\n\\\nOr the @{verbatim \\\\enum\\} char \n\\<^enum> to\n\\<^enum> create\n\\<^enum> numbered bullets\n\n\\\n\nsubsection \\References\\\n\ntext \n\\\nInside \\<^emph>\\root.tex\\ there is a command definition for \\<^verbatim>\\\\secref{sec:cheatsheet}\\, which allow us to reference \nsections labeled using \\<^verbatim>\\\\label{sec:cheatsheet}\\ (E.g: \\secref{sec:cheatsheet}).\n\\\n\ntext \n\\\nTo produce hyperlinks like in HTML we can use the \\<^verbatim>\\\\hyperref[sec:cheatsheet]{some link}\\ command.\n(E.g: \\hyperref[sec:cheatsheet]{link to cheatsheet})\n\\\nsection \\Definitions \\label{sec:definitions}\\ \nsubsection \\Terms, types and values\\\n\ntext \\\nYou can print terms, types and values. Note that in some cases we need to specify the type \nof a number using \\<^verbatim>\\::\\ as addition is polymorphic.\n\n\\<^item> Term: @{term \"2 + 2\"}\n\\<^item> Type of a polymorphic term: @{typeof \"2 + 2\"}\n\\<^item> Type of a concrete term: @{typeof \"2 + 2 :: nat\"}\n\\<^item> The evaluation of a term @{value \"2 + 2 :: nat\"}\n\\<^item> The evaluation of a term with its type @{value [show_types] \"2 + 2 :: nat\"}\n\\\n\nsubsection \\Data types \\label{sec:definitions-datatypes}\\\n\n\ntext \\To print a datatype we can use the @{verbatim \"@{datatype }\"} antiquote.\\\n\ntext \\@{datatype tree}\\\n\n(*\ntext \\\nIsabelle will try to print it as a one-liner, but if its too big, you can use the \n @{verbatim \"[display]\"} option to span in multiple lines.\\\n\ntext \\@{datatype[display] tree}\\\n\ntext \\\nBy default, if the name collides Isabelle will use the full specified name. We can \nuse @{verbatim \"[names_short]\"} option to solve that.\\\n\ntext \\@{datatype[display,names_short] tree}\\\n*)\n\ntext \\We can also use the @{verbatim \"code_stmts\"} antiquote to print a datatype in Haskell\\\n\ntext \\@{code_stmts tree.case_tree type_constructor: tree (Haskell)}\\\n\ntext \\By default @{verbatim \"code_stmts\"} will print all the code needed to export the constants. We\ncan control what gets printed with the\n @{verbatim \"type_constructor, constant, type_class and class_instance\"} modifiers.\\\n\n\nsubsection \\Functions \\label{sec:definitions-functions}\\\n\ntext \\The following is the syntax for defining a function:\\\n\nfun isNope :: \"'a perhaps \\ bool\" where \n \"isNope Nope = True\" |\n \"isNope (Yeap _) = False\"\n\nfun isYeap :: \"'a perhaps \\ bool\" where \n isYeap_Nope: \"isYeap Nope = False\" |\n isYeap_Yeap: \"isYeap (Yeap _) = True\"\n\ntext \\Note that the second\ndefinition gives a label to each pattern match. This enable us to reference a case using the \n\\<^verbatim>\\@{thm isYeap_Nope}\\ and \\<^verbatim>\\@{thm isYeap_Yeap}\\ antiquotes. \n\\\n\ntext \\\n\\begin{center}\n@{thm isYeap_Nope} \\\\\n@{thm isYeap_Yeap }\n\\end{center}\n\\\n\ntext \n\\\nIf the function cases doesn't have a label we can still reference them using the \n\\<^verbatim>\\@{thm isNope.simps(n)}\\ constant.\nWhenever we define a datatype, function or theorem, different constants are created. Use the \\<^emph>\\Query\\\npanel to inspect them.\n\\\n\n\ntext\n\\\n\\begin{center}\n@{thm isNope.simps(1)} \\\\\n@{thm isNope.simps(2)} \n\\end{center}\n\\\n\ntext \n\\\nUsing the \\<^verbatim>\\[display]\\ option we can print all terms at once (with a slightly smaller font, and for \nsome reason the center does not work).\n \\<^verbatim>\\@{thm [display]isNope.simps}\\\n\\\n\ntext \n\\\n\\begin{center}\n@{thm [display]isNope.simps} \n\\end{center}\n\\\n\ntext \\\nWe can print the type of a function using the \\<^verbatim>\\@{typeof ...}\\ antiquote, or a term with it's \ntype using \\<^verbatim>\\@{term_type ...}\\.\n\n\\<^item> Tyepof a function isNope :: @{typeof isNope}\n\\<^item> Term and its type: @{term_type isNope}\n\\\n\ntext \\ \nIn the section \\<^emph>\\Latex Sugar\\ \\secref{sec:latex-sugar} there are links to a pdf that shows how to \nalign equations.\n\\\n\ntext \n\\\n\\begin{center}\n\\begin{tabular}{l@ {~~@{text \"=\"}~~}l}\n@{thm (lhs) isYeap_Nope} & @{thm (rhs) isYeap_Nope}\\\\\n@{thm (lhs) isYeap_Yeap} & @{thm (rhs) isYeap_Yeap}\n\\end{tabular}\n\\end{center}\n\\\n\n\ntext \\And how to rename \\<^verbatim>\\DUMMY\\ variables\\\n\ntext \n\\\n\\begin{center}\n\\begin{tabular}{l@ {~~@{text \"=\"}~~}l}\n@{thm (lhs) isYeap_Nope} & @{thm (rhs) isYeap_Nope}\\\\\n@{thm (dummy_pats,lhs) isYeap_Yeap} & @{thm (rhs) isYeap_Yeap}\n\\end{tabular}\n\\end{center}\n\n\\\n\n\ntext \n\\\nSimilar to the Datatype definition \\secref{sec:definitions-datatypes}, we can use the \\<^verbatim>\\@code_stmts{...}\\ \nantiquote to print the Haskell version of a function.\n\\\n\ntext \\@{code_stmts isNope constant: isNope (Haskell)}\\\n\n\nsection \\Proofs\\\n\ntext\n\\\nFor a proposition that has been already proven, and that is available in the current context, we \ncan use the \\<^verbatim>\\@{thm map_append}\\ antiquote to print it.\n\\\n\ntext \\@{thm map_append}\\\n\ntext \n\\\nWhen we need to prove a proposition, Isabelle provide us two different ways: an imperative and a \ndeclarative way. When the proof is trivial, it is recommended to use the imperative way\n\\\n\n(*<*)\nfun listsum :: \"nat list \\ nat\" where \n \"listsum [] = 0\" |\n \"listsum (x#xs) = x + listsum xs\" \n\n(*>*)\n\nlemma listsum_app: \"listsum (xs @ ys) = listsum xs + listsum ys\" \n apply (induction xs)\n apply (simp_all)\n done\n\ntext \"or even shorter\" \n\nlemma listsum_app2: \"listsum (xs @ ys) = listsum xs + listsum ys\" \n by (induction xs) simp_all\n\ntext \n\\\nWhen the theorem is more complex, the authors of Isabelle recommend to write them as structured proofs\nwith Isar \\<^footnote>\\\\<^url>\\http://concrete-semantics.org/concrete-semantics.pdf#page=63\\\\. Those type of test\nare easier to read and to maintain. \n\\\n\ntext \"For example, given the definition for a reverse function that can be optimized with TCO\" \n\nfun itrev :: \"'a list \\ 'a list \\ 'a list\" where \n \"itrev [] ys = ys\" |\n \"itrev (x # xs) ys = itrev xs (x # ys)\"\n\ntext \\We would like to prove that @{prop \"itrev xs ys = rev xs @ ys\" }. The lemma is easy\nenough to write it in an imperative way\\\n\nlemma itrev_app: \"itrev xs ys = rev xs @ ys\"\n by (induction xs arbitrary: ys) simp_all\n\n\ntext \"But we can use this as an example to showcase Isar. If you write the \\<^verbatim>\\proof\\ command and give\na method like induction, Isabelle will suggest you the pattern match to divide the proof by its case.\nIn the simplest example we could write the proof like this:\" \n\nlemma itrev_app2: \"itrev xs ys = rev xs @ ys\"\nproof (induction xs arbitrary: ys)\n case Nil\n then show ?case by simp \nnext\n case (Cons a xs)\n then show ?case by simp\nqed\n\ntext \"The \\<^verbatim>\\?case\\ keyword is the current goal for each case. We can also use other constructs\nto refine the goal and to make the proof more explicit\"\n\nlemma itrev_app3: \"itrev xs ys = rev xs @ ys\"\nproof (induction xs arbitrary: ys)\n case Nil\n hence \"itrev [] ys = ys\" by simp\n hence \"... = [] @ ys\" by (simp only: append_Nil)\n hence \"... = rev [] @ ys\" by (simp only: rev.simps) \n thus \"itrev [] ys = rev [] @ ys\" by simp\nnext\n case (Cons x xs) \n hence 0: \"itrev (x # xs) ys = itrev xs (x # ys) \" by (simp only: itrev.simps)\n hence 1: \"... = rev xs @ (x # ys)\" using Cons.IH by (simp only: Cons.IH)\n hence 2: \"... = rev xs @ [x] @ ys\" by simp \n hence 3: \"... = rev xs @ rev [x] @ ys\" by simp\n hence 4: \"... = rev ([x] @ xs) @ ys\" by (simp flip: rev_append)\n from 1 4 show \"itrev (x # xs) ys = rev (x # xs) @ ys\" by simp\nqed\n\n\ntext \"We can also play with \\<^verbatim>\\(*<*) ... (*>*)\\ and antiquotes to focus on the english version of \nthe proof.\"\n\ntext_raw \\\\fbox{\\parbox{\\textwidth}{\\ \n(*<*)\nlemma itrev_app4 [simp]: \"itrev xs ys = rev xs @ ys\"\n(*>*)\n text \\\n \\<^bold>\\Lemma\\ @{term ?thesis}. \\\\ \\\\\n We can use induction on @{verbatim \"xs\"} for an arbitrary @{verbatim \"ys\"}\n\\\n\n(*<*)\nproof (induction xs arbitrary: ys)\n case Nil\n(*>*)\n text_raw \n \\\\begin{enumerate}\n \\item For the Base case: \\\\\n \\begin{tabular}{l@ {~~@{text \"=\"}~~}l l}\n \\\n (*<*)hence \"itrev [] ys = ys\" by simp(*>*)\n text_raw \\@{thm (lhs) this} & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of \\<^verbatim>\\itrev\\\\\\\\\n\n (*<*)hence \"... = [] @ ys\" by (simp only: append_Nil) (*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of \\<^verbatim>\\append\\\\\\\\ \n\n (*<*)hence \"... = rev [] @ ys\" by (simp only: rev.simps) (*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of \\<^verbatim>\\rev\\\\\\\\\n\n text_raw\n \\\\end{tabular} \\\\\\\n (*<*)thus \"itrev [] ys = rev [] @ ys\" by simp (*>*)\n\n(*<*)\nnext\n case (Cons x xs)\n(*>*)\n text_raw \n \\\\item For the Inductive case: \\\\ \n We assume the \\<^emph>\\I.H.\\ as: \\forall ys. @{thm Cons.IH}, then \\\\ \n \\begin{tabular}{l@ {~~@{text \"=\"}~~}l l}\n \\\n \n (*<*)hence 0: \"itrev (x # xs) ys = itrev xs (x # ys) \" by (simp only: itrev.simps)(*>*)\n text_raw \\@{thm (lhs) this} & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of \\<^verbatim>\\itrev\\\\\\\\\n\n (*<*)hence 1: \"... = rev xs @ (x # ys)\" using Cons.IH by (simp only: Cons.IH)(*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the induction hypotesis \\\\\\\n\n (*<*)hence 2: \"... = rev xs @ [x] @ ys\" by simp (*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of \\<^verbatim>\\append\\\\\\\\ \n\n (*<*)hence 3: \"... = rev xs @ rev [x] @ ys\" by simp (*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the singleton\\_rev lemma \\\\\\\n\n (*<*)hence 4: \"... = rev ([x] @ xs) @ ys\" by (simp flip: rev_append)(*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the rev\\_append lemma \\\\\\\n\n (*<*)from 1 4 show \"itrev (x # xs) ys = rev (x # xs) @ ys\" by simp(*>*)\n text_raw \\ & @{thm (rhs) this} & \\<^bold>\\by\\ the definition of append \\\\\\\n \n text_raw \\\n \\end{tabular}\n \\end{enumerate}\n }}\n \\\n(*<*)qed(*>*)\n\n\nsubsection \"Parenthesis problem\" \n\ntext \\Isabelle has some translation rule that gets rid of \"unnecesary parenthesis\". \nThis makes some theorems a little bit awkward \\<^verbatim>\\@{thm append_assoc}\\:\\\n\ntext \\@{thm append_assoc}\\\n\ntext \\\nThis happens even if we write it manually. \n\n\\\ntext \\\\<^prop>\\(a @ b) @ c = a @ (b @ c)\\\\\n\ntext \"So far I wasn't able to solve this problem\"\n\nsection \\Latex sugar \\label{sec:latex-sugar}\\\ntext \n\\\nThe Latex sugar pdf \\<^footnote>\\Latex sugar: \\<^url>\\https://isabelle.in.tum.de/doc/sugar.pdf\\ \\ explains some \nadvanced commands, like printing Inference Rules.\n\n\\begin{center}\n @{thm[mode=Rule] conjI} {\\sc conjI}\n\\end{center}\n\nFor this to work, @{verbatim \\\"HOL-Library.LaTeXsugar\"\\} needs to be imported and the \n@{verbatim \\\\usepackage{mathpartir}\\} used in \\<^emph>\\root.tex\\\n\\\n\ntext\n\\In the \\<^verbatim>\\\"HOL-Library.OptionalSugar\\ package there are some translation rules that we can copy,\npaste and modify into a \"formmating\" package to modify the notation of some constructs. For example,\nwith the following code, list notation looks more closely to Haskell notation\\\n\n\nnotation (latex)\n Cons (\"_ :/ _\" [66,65] 65)\n\nsyntax (latex output)\n \"_appendL\" :: \"'a list \\ 'a list \\ 'a list\" (infixl \"\\<^latex>\\++\\\" 65)\n\ntranslations\n \"_appendL xs ys\" <= \"xs @ ys\" \n \"_appendL (_appendL xs ys) zs\" <= \"_appendL xs (_appendL ys zs)\"\n\ntext \n\\\n@{thm [display]rev.simps}\n\\\n\n\n(*<*)\nend\n(*>*)\n", "meta": {"author": "input-output-hk", "repo": "marlowe", "sha": "d2f7b3108894b7c3169c71214f1a2772716544bf", "save_path": "github-repos/isabelle/input-output-hk-marlowe", "path": "github-repos/isabelle/input-output-hk-marlowe/marlowe-d2f7b3108894b7c3169c71214f1a2772716544bf/isabelle/Doc/Cheatsheet/Cheatsheet.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. NO\n2. NO\n\n", "lm_q1_score": 0.44552954976388504, "lm_q2_score": 0.2689414330889797, "lm_q1q2_score": 0.11982135559698714}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchAccess\nimports Types\nbegin\n\ncontext Arch begin global_naming RISCV64\n\nsubsection \\Arch-specific transformation of caps into authorities\\\n\ndefinition vspace_cap_rights_to_auth :: \"cap_rights \\ auth set\" where\n \"vspace_cap_rights_to_auth r \\\n (if AllowWrite \\ r then {Write} else {})\n \\ (if AllowRead \\ r then {Read} else {})\"\n\ndefinition arch_cap_auth_conferred where\n \"arch_cap_auth_conferred arch_cap \\\n (if is_FrameCap arch_cap then vspace_cap_rights_to_auth (acap_rights arch_cap) else {Control})\"\n\nsubsection \\Generating a policy from the current ASID distribution\\\n\ndefinition pte_ref2 where\n \"pte_ref2 level pte \\ case pte of\n PagePTE ppn atts rights\n \\ Some (ptrFromPAddr (addr_from_ppn ppn),\n pageBitsForSize (vmpage_size_of_level level),\n vspace_cap_rights_to_auth rights)\n | PageTablePTE ppn atts\n \\ Some (ptrFromPAddr (addr_from_ppn ppn), 0, {Control})\n | _ \\ None\"\n\ndefinition vs_refs_aux :: \"vm_level \\ arch_kernel_obj \\ (obj_ref \\ obj_ref \\ aa_type \\ auth) set\"\n where\n \"vs_refs_aux level \\ \\ko. case ko of\n ASIDPool pool \\ (\\(r,p). (p, ucast r, AASIDPool, Control)) ` graph_of pool\n | PageTable pt \\\n \\(r,(p, sz, auth)) \\ graph_of (pte_ref2 level o pt) - {(x,y). x \\ kernel_mapping_slots \\ level = max_pt_level}.\n (\\(p, a). (p, ucast r, APageTable, a)) ` (ptr_range p sz \\ auth)\n | _ \\ {}\"\n\ndefinition state_vrefs where\n \"state_vrefs s \\ \\p.\n \\{vs_refs_aux lvl ao | lvl ao bot asid vref. vs_lookup_table bot asid vref s = Some (lvl, p)\n \\ aobjs_of s p = Some ao \\ vref \\ user_region}\"\n\nlemma state_vrefsD:\n \"\\ vs_lookup_table level asid vref s = Some (lvl, p);\n aobjs_of s p = Some ao; vref \\ user_region; x \\ vs_refs_aux lvl ao \\\n \\ x \\ state_vrefs s p\"\n unfolding state_vrefs_def by fastforce\n\nend\n\ncontext Arch_p_arch_update_eq begin global_naming RISCV64\n\ninterpretation Arch .\n\nlemma state_vrefs[iff]: \"state_vrefs (f s) = state_vrefs s\"\n by (simp add: state_vrefs_def pspace)\n\nend\n\ncontext Arch begin global_naming RISCV64\n\nlemmas state_vrefs_upd =\n cur_thread_update.state_vrefs\n cdt_update.state_vrefs\n irq_node_update_arch.state_vrefs\n interrupt_update.state_vrefs\n revokable_update.state_vrefs\n machine_state_update.state_vrefs\n more_update.state_vrefs\n\nend\n\ncontext Arch begin\n\nprimrec aobj_ref' where\n \"aobj_ref' (ASIDPoolCap p as) = {p}\"\n| \"aobj_ref' ASIDControlCap = {}\"\n| \"aobj_ref' (FrameCap ref cR sz dev as) = ptr_range ref (pageBitsForSize sz)\"\n| \"aobj_ref' (PageTableCap x as3) = {x}\"\n\nfun acap_asid' :: \"arch_cap \\ asid set\" where\n \"acap_asid' (FrameCap _ _ _ _ mapping) = fst ` set_option mapping\"\n| \"acap_asid' (PageTableCap _ mapping) = fst ` set_option mapping\"\n| \"acap_asid' (ASIDPoolCap _ asid)\n = {x. asid_high_bits_of x = asid_high_bits_of asid \\ x \\ 0}\"\n| \"acap_asid' ASIDControlCap = UNIV\"\n\ninductive_set state_asids_to_policy_aux for aag caps asid_tab vrefs where\n sata_asid:\n \"\\ caps ptr = Some (ArchObjectCap acap); asid \\ acap_asid' acap \\\n \\ (pasObjectAbs aag (fst ptr), Control, pasASIDAbs aag asid)\n \\ state_asids_to_policy_aux aag caps asid_tab vrefs\"\n| sata_asid_lookup:\n \"\\ asid_tab (asid_high_bits_of asid) = Some poolptr;\n (pdptr, ucast (asid && mask asid_low_bits), AASIDPool, a) \\ vrefs poolptr \\\n \\ (pasASIDAbs aag asid, a, pasObjectAbs aag pdptr)\n \\ state_asids_to_policy_aux aag caps asid_tab vrefs\"\n| sata_asidpool:\n \"\\ asid_tab (asid_high_bits_of asid) = Some poolptr; asid \\ 0 \\\n \\ (pasObjectAbs aag poolptr, AAuth ASIDPoolMapsASID, pasASIDAbs aag asid)\n \\ state_asids_to_policy_aux aag caps asid_tab vrefs\"\n\ndefinition\n \"state_asids_to_policy_arch aag caps astate vrefs \\\n state_asids_to_policy_aux aag caps (riscv_asid_table astate)\n (vrefs :: 64 word \\ (64 word \\ 64 word \\ aa_type \\ auth) set)\"\ndeclare state_asids_to_policy_arch_def[simp]\n\nsection \\Arch-specific integrity definition\\\n\nsubsection \\How ASIDs can change\\\n\nabbreviation integrity_asids_aux :: \"'a PAS \\ 'a set \\ obj_ref \\ asid \\\n (asid_high_index \\ obj_ref) \\ (asid_high_index \\ obj_ref) \\\n (obj_ref \\ asid_pool) \\ (obj_ref \\ asid_pool) \\ bool\" where\n \"integrity_asids_aux aag subjects x asid atab atab' pools pools' \\\n (atab (asid_high_bits_of asid) \\ atab' (asid_high_bits_of asid)\n \\ (\\x. atab' (asid_high_bits_of asid) = Some x \\ pasObjectAbs aag x \\ subjects) \\\n (\\asid'. asid' \\ 0 \\ asid_high_bits_of asid' = asid_high_bits_of asid\n \\ pasASIDAbs aag asid' \\ subjects)) \\\n (pasObjectAbs aag x \\ subjects\n \\ (\\pool. pools x = Some pool\n \\ pools' x \\ None \\\n (\\pool'. pools' x = Some pool' \\\n (pool \\ pool' \\ (\\asid. atab (asid_high_bits_of asid) = Some x)))))\"\n\ndefinition integrity_asids ::\n \"'a PAS \\ 'a set \\ obj_ref \\ asid \\ 'y::state_ext state \\ 'z::state_ext state \\ bool\" where\n \"integrity_asids aag subjects x asid s s' \\\n integrity_asids_aux aag subjects x asid (asid_table s) (asid_table s')\n (asid_pools_of s) (asid_pools_of s')\"\n\nsublocale kheap_update: Arch_arch_update_eq \"kheap_update f\"\n by unfold_locales simp\n\nlemma (in Arch_p_arch_update_eq) integrity_asids_update[simp]:\n \"integrity_asids aag subjects x a (f st) s = integrity_asids aag subjects x a st s\"\n \"integrity_asids aag subjects x a st (f s) = integrity_asids aag subjects x a st s\"\n by (auto simp: integrity_asids_def arch pspace)\n\nlemmas integrity_asids_updates =\n cdt_update.integrity_asids_update\n more_update.integrity_asids_update\n revokable_update.integrity_asids_update\n interrupt_update.integrity_asids_update\n cur_thread_update.integrity_asids_update\n machine_state_update.integrity_asids_update\n\nlemma integrity_asids_cnode_update':\n \"\\ kheap st p = Some (CNode sz cs); integrity_asids aag subjects x a st (s\\kheap := rest\\) \\\n \\ integrity_asids aag subjects x a st (s\\kheap := \\x. if x = p then v else rest x\\)\"\n by (auto simp: integrity_asids_def opt_map_def split: option.splits)\n\nlemma integrity_asids_tcb_update':\n \"\\ kheap st p = Some (TCB tcb); integrity_asids aag subjects x a st (s\\kheap := rest\\) \\\n \\ integrity_asids aag subjects x a st (s\\kheap := \\x. if x = p then v else rest x\\)\"\n by (auto simp: integrity_asids_def opt_map_def split: option.splits)\n\nlemma integrity_asids_ep_update':\n \"\\ kheap st p = Some (Endpoint ep); integrity_asids aag subjects x a st (s\\kheap := rest\\) \\\n \\ integrity_asids aag subjects x a st (s\\kheap := \\x. if x = p then v else rest x\\)\"\n by (auto simp: integrity_asids_def opt_map_def split: option.splits)\n\nlemma integrity_asids_ntfn_update':\n \"\\ kheap st p = Some (Notification ntfn); integrity_asids aag subjects x a st (s\\kheap := rest\\) \\\n \\ integrity_asids aag subjects x a st (s\\kheap := \\x. if x = p then v else rest x\\)\"\n by (auto simp: integrity_asids_def opt_map_def split: option.splits)\n\nlemmas integrity_asids_kh_upds'' =\n integrity_asids_cnode_update'\n integrity_asids_tcb_update'\n integrity_asids_ep_update'\n integrity_asids_ntfn_update'\n\nlemmas integrity_asids_kh_upds =\n integrity_asids_kh_upds''\n integrity_asids_kh_upds''[where rest=\"kheap s\" and s=s for s, folded fun_upd_def, simplified]\n\ndeclare integrity_asids_def[simp]\n\nlemma integrity_asids_kh_upds':\n \"integrity_asids aag subjects x a (s\\kheap := kheap s(p \\ CNode sz cs)\\) s\"\n \"integrity_asids aag subjects x a (s\\kheap := kheap s(p \\ TCB tcb)\\) s\"\n \"integrity_asids aag subjects x a (s\\kheap := kheap s(p \\ Endpoint ep)\\) s\"\n \"integrity_asids aag subjects x a (s\\kheap := kheap s(p \\ Notification ntfn)\\) s\"\n by (auto simp: opt_map_def split: option.splits)\n\nlemma integrity_asids_kh_update:\n \"integrity_asids aag subject x a (s\\kheap := kh\\) (s\\kheap := kh'\\)\n \\ integrity_asids aag subject x a (s\\kheap := kh(p := v)\\) (s\\kheap := kh'(p := v)\\)\"\n by (clarsimp simp: opt_map_def)\n\n\nsubsection \\Misc definitions\\\n\nfun ctxt_IP_update where\n \"ctxt_IP_update (UserContext ctxt) = UserContext (ctxt(NextIP := ctxt FaultIP))\"\n\nlemma ctxt_IP_update_def:\n \"ctxt_IP_update ctxt =\n (case ctxt of (UserContext ctxt') \\ UserContext (ctxt'(NextIP := ctxt' FaultIP)))\"\n by (cases ctxt; clarsimp)\n\nabbreviation arch_IP_update where\n \"arch_IP_update arch \\ arch_tcb_context_set (ctxt_IP_update (arch_tcb_context_get arch)) arch\"\n\ndefinition asid_pool_integrity ::\n \"'a set \\ 'a PAS \\ (asid_low_index \\ obj_ref) \\ (asid_low_index \\ obj_ref) \\ bool\" where\n \"asid_pool_integrity subjects aag pool pool' \\\n \\x. pool' x \\ pool x\n \\ pool' x = None \\ aag_subjects_have_auth_to subjects aag Control (the (pool x))\"\n\ninductive arch_integrity_obj_atomic ::\n \"'a PAS \\ 'a set \\ 'a \\ arch_kernel_obj \\ arch_kernel_obj \\ bool\"\n for aag subjects l ao ao' where\n arch_troa_asidpool_clear:\n \"\\ ao = ASIDPool pool; ao' = ASIDPool pool';\n asid_pool_integrity subjects aag pool pool' \\\n \\ arch_integrity_obj_atomic aag subjects l ao ao'\"\n\ninductive arch_integrity_obj_alt ::\n \"'a PAS \\ 'a set \\ 'a \\ arch_kernel_obj \\ arch_kernel_obj \\ bool\"\n for aag subjects l' ao ao' where\n arch_tro_alt_asidpool_clear:\n \"\\ ao = ASIDPool pool; ao' = ASIDPool pool';\n asid_pool_integrity subjects aag pool pool'\\\n \\ arch_integrity_obj_alt aag subjects l' ao ao'\"\n\ndefinition auth_ipc_buffers :: \"'z::state_ext state \\ obj_ref \\ obj_ref set\" where\n \"auth_ipc_buffers s \\ \\p. case (get_tcb p s) of\n None \\ {}\n | Some tcb \\\n (case tcb_ipcframe tcb of\n ArchObjectCap (FrameCap p' R vms False _) \\\n if AllowWrite \\ R\n then (ptr_range (p' + (tcb_ipc_buffer tcb && mask (pageBitsForSize vms))) msg_align_bits)\n else {}\n | _ \\ {})\"\n\nend\n\n\ncontext begin interpretation Arch .\n\nrequalify_consts\n vspace_cap_rights_to_auth\n aobj_ref'\n acap_asid'\n state_vrefs\n state_asids_to_policy_arch\n integrity_asids\n ctxt_IP_update\n arch_IP_update\n arch_cap_auth_conferred\n arch_integrity_obj_atomic\n arch_integrity_obj_alt\n auth_ipc_buffers\n\nrequalify_facts\n integrity_asids_updates\n state_vrefs_upd\n integrity_asids_kh_upds\n integrity_asids_kh_upds'\n integrity_asids_kh_update\n\nend\n\ndeclare state_vrefs_upd[simp]\ndeclare integrity_asids_updates[simp]\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/access-control/RISCV64/ArchAccess.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.2254166158350767, "lm_q1q2_score": 0.11534942529902864}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\n(*\nCSpace invariants\n*)\n\ntheory ArchCSpaceInvPre_AI\nimports CSpaceInvPre_AI\nbegin\n\n\ncontext Arch begin global_naming RISCV64\n\nlemma aobj_ref_acap_rights_update[simp]:\n \"aobj_ref (acap_rights_update f x) = aobj_ref x\"\n by (cases x; simp add: acap_rights_update_def)\n\nlemma arch_obj_size_acap_rights_update[simp]:\n \"arch_obj_size (acap_rights_update f x) = arch_obj_size x\"\n by (cases x; simp add: acap_rights_update_def)\n\nlemma valid_arch_cap_acap_rights_update[intro]:\n \"valid_arch_cap x s \\ valid_arch_cap (acap_rights_update f x) s\"\n by (cases x; simp add: acap_rights_update_def valid_arch_cap_def)\n\ndefinition cap_master_arch_cap :: \"arch_cap \\ arch_cap\" where\n \"cap_master_arch_cap acap \\\n (case acap of\n ASIDPoolCap pool asid \\ ASIDPoolCap pool 0\n | FrameCap ptr R sz dev _ \\ FrameCap ptr UNIV sz dev None\n | PageTableCap ptr _ \\ PageTableCap ptr None\n | _ \\ acap)\"\n\nlemma cap_master_arch_cap_eqDs1:\n \"cap_master_arch_cap cap = ASIDPoolCap pool asid\n \\ asid = 0 \\ (\\asid. cap = ASIDPoolCap pool asid)\"\n \"cap_master_arch_cap cap = ASIDControlCap \\ cap = ASIDControlCap\"\n \"cap_master_arch_cap cap = FrameCap ptr R sz dev map_data\n \\ R = UNIV \\ map_data = None\n \\ (\\R map_data. cap = FrameCap ptr R sz dev map_data)\"\n \"cap_master_arch_cap cap = PageTableCap ptr data\n \\ data = None \\ (\\data. cap = PageTableCap ptr data)\"\n by (clarsimp simp: cap_master_arch_cap_def split: arch_cap.split_asm)+\n\nlemma cap_master_arch_inv[simp]:\n \"cap_master_arch_cap (cap_master_arch_cap ac) = cap_master_arch_cap ac\"\n by (cases ac; simp add: cap_master_arch_cap_def)\n\ndefinition\n \"reachable_target \\ \\(asid, vref) p s.\n \\level. vs_lookup_target level asid vref s = Some (level, p) \\\n pool_for_asid asid s = Some p\"\n\ndefinition\n \"reachable_frame_cap cap \\ \\s.\n is_frame_cap cap \\ (\\ref. vs_cap_ref cap = Some ref \\ reachable_target ref (obj_ref_of cap) s)\"\n\n(* The conditions under which it is legal to immediately replace an arch_cap\n cap with newcap at slot sl, assuming cap is final. *)\ndefinition\n replaceable_final_arch_cap :: \"'z::state_ext state \\ cslot_ptr \\ cap \\ cap \\ bool\"\nwhere\n \"replaceable_final_arch_cap s sl newcap \\ \\cap.\n \\ \\Don't leave dangling vspace references. That is, if cap points to a mapped vspace object,\\\n (\\ref. vs_cap_ref cap = Some ref\n \\ \\ then either newcap maintains the same vs_refs \\\n \\ (vs_cap_ref newcap = Some ref \\ obj_refs newcap = obj_refs cap)\n \\ \\ or the object pointed to by cap is not currently mapped. \\\n \\ (\\oref \\ obj_refs cap. \\ reachable_target ref oref s))\n \\ \\ Don't introduce duplicate caps to vspace table objects with different vs_refs. \\\n \\ no_cap_to_obj_with_diff_ref newcap {sl} s\n \\ \\ Don't introduce non-empty unmapped table objects. \\\n \\ (is_pt_cap newcap\n \\ cap_asid newcap = None\n \\ (\\r \\ obj_refs newcap. pts_of s r = Some empty_pt))\n \\ \\ If newcap is vspace table cap such that either:\n - newcap and cap have different types or different obj_refs, or\n - newcap is unmapped while cap is mapped, \\\n \\ (is_pt_cap newcap\n \\ (is_pt_cap cap\n \\ (cap_asid newcap = None \\ cap_asid cap = None)\n \\ obj_refs cap \\ obj_refs newcap)\n \\ \\then, aside from sl, there is no other slot with a cap that\n - has the same obj_refs and type as newcap, and\n - is unmapped if newcap is mapped. \\\n \\ (\\sl'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs newcap\n \\ is_pt_cap cap'\n \\ (cap_asid newcap = None \\ cap_asid cap' = None)) sl' s \\ sl' = sl))\n \\ \\Don't replace with an ASID pool. \\\n \\ \\is_ap_cap newcap\"\n\ndefinition\n replaceable_non_final_arch_cap :: \"'z::state_ext state \\ cslot_ptr \\ cap \\ cap \\ bool\"\nwhere\n \"replaceable_non_final_arch_cap s sl newcap \\ \\cap. \\ reachable_frame_cap cap s\"\n\ndeclare\n replaceable_final_arch_cap_def[simp]\n replaceable_non_final_arch_cap_def[simp]\n\nlemma unique_table_refsD:\n \"\\ unique_table_refs_2 cps; cps p = Some cap; cps p' = Some cap';\n obj_refs cap = obj_refs cap'\\\n \\ table_cap_ref cap = table_cap_ref cap'\"\n unfolding unique_table_refs_def\n by blast\n\nlemma table_cap_ref_vs_cap_ref_Some:\n \"table_cap_ref x = Some y \\ vs_cap_ref x = Some y\"\n by (clarsimp simp: table_cap_ref_def vs_cap_ref_def table_cap_ref_arch_def vs_cap_ref_arch_def\n simp del: arch_cap_fun_lift_Some\n split: cap.splits arch_cap.splits)\n\nlemma set_cap_aobjs_of[wp]:\n \"set_cap cap ptr \\\\s. P (aobjs_of s)\\\"\n unfolding set_cap_def\n apply (wpsimp wp: set_object_wp get_object_wp)\n apply (auto simp: opt_map_def obj_at_def split: option.splits elim!: rsubst[where P=P])\n done\n\nlemma set_cap_pool_for_asid[wp]:\n \"set_cap cap ptr \\\\s. P (pool_for_asid asid s)\\\"\n unfolding pool_for_asid_def by wpsimp\n\nlemma set_cap_valid_vs_lookup:\n \"\\\\s. valid_vs_lookup s\n \\ (\\vref cap'. caps_of_state s ptr = Some cap'\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref. oref \\ obj_refs cap' \\ \\ reachable_target vref oref s))\n \\ unique_table_refs s\\\n set_cap cap ptr\n \\\\rv. valid_vs_lookup\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n apply (wpsimp wp: hoare_vcg_all_lift hoare_convert_imp vs_lookup_target_lift hoare_vcg_disj_lift\n simp: valid_vs_lookup_def)\n apply (drule vs_lookup_target_level)\n apply (rename_tac level' level asid vref p)\n apply (erule allE, erule allE, erule allE, erule allE, erule allE, erule (1) impE)\n apply (erule (1) impE)\n apply (elim exE conjE)\n apply (case_tac \"p' = ptr\")\n apply clarsimp\n apply (elim disjE impCE)\n apply fastforce\n apply clarsimp\n apply (drule (1) not_final_another_caps)\n apply (rule obj_ref_is_gen_obj_ref)\n apply simp\n apply (simp, elim exEI, clarsimp simp: gen_obj_refs_eq)\n apply (drule_tac cap=cap' and cap'=cap in unique_table_refsD; simp?)\n apply (clarsimp simp: reachable_frame_cap_def)\n apply (case_tac cap, simp_all)[1]\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap, simp_all)[1]\n apply (clarsimp dest!: table_cap_ref_vs_cap_ref_Some)\n apply (clarsimp simp: reachable_target_def)\n apply (erule_tac x=level in allE)\n apply (clarsimp)\n apply (clarsimp dest!: table_cap_ref_vs_cap_ref_Some)\n apply (clarsimp simp: reachable_target_def)\n apply (erule_tac x=level in allE)\n apply (clarsimp)\n apply fastforce\n done\n\nlemma set_cap_valid_table_caps:\n \"\\\\s. valid_table_caps s \\\n (is_pt_cap cap \\ cap_asid cap = None \\ (\\r \\ obj_refs cap. pts_of s r = Some empty_pt))\\\n set_cap cap ptr\n \\\\rv. valid_table_caps\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n apply (simp add: valid_table_caps_def)\n apply (wp hoare_vcg_all_lift\n hoare_vcg_disj_lift hoare_convert_imp[OF set_cap_caps_of_state]\n hoare_use_eq[OF set_cap_arch set_cap_obj_at_impossible])\n apply (fastforce simp: cap_asid_def split: if_split_asm)\n done\n\nlemma cap_asid_vs_cap_ref_None:\n \"is_pt_cap cap \\ (cap_asid cap = None) = (vs_cap_ref cap = None)\"\n by (clarsimp simp: is_pt_cap_def is_PageTableCap_def cap_asid_def split: option.splits)\n\nlemma cap_asid_vs_cap_ref_Some:\n \"is_pt_cap cap \\ (cap_asid cap = Some asid) = (\\vref. vs_cap_ref cap = Some (asid, vref))\"\n by (clarsimp simp: is_pt_cap_def is_PageTableCap_def cap_asid_def split: option.splits)\n\nlemma set_cap_unique_table_caps:\n \"\\\\s. unique_table_caps s\n \\ (is_pt_cap cap\n \\ (\\oldcap. caps_of_state s ptr = Some oldcap\n \\ is_pt_cap oldcap\n \\ (cap_asid cap = None \\ cap_asid oldcap = None)\n \\ obj_refs oldcap \\ obj_refs cap)\n \\ (\\ptr'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs cap\n \\ is_pt_cap cap'\n \\ (cap_asid cap = None \\ cap_asid cap' = None)) ptr' s \\ ptr' = ptr))\\\n set_cap cap ptr\n \\\\_. unique_table_caps\\\"\n supply split_paired_All[simp del] split_paired_Ex[simp del]\n supply cap_asid_vs_cap_ref_None[simp] cap_asid_vs_cap_ref_Some[simp]\n apply wp\n apply (simp only: unique_table_caps_def cte_wp_at_caps_of_state)\n apply (elim conjE)\n apply (erule impCE, clarsimp)\n apply (erule impCE)\n prefer 2\n apply (simp del: imp_disjL)\n apply (thin_tac \"\\a b. P a b\" for P)\n subgoal by fastforce\n apply (clarsimp simp del: imp_disjL del: allI)\n apply (case_tac \"cap_asid cap \\ None\")\n apply (clarsimp del: allI)\n apply (elim allEI | rule impI)+\n subgoal by auto\n apply (elim allEI)\n apply (intro conjI impI)\n apply (elim allEI)\n subgoal by auto\n apply auto\n done\n\nlemma set_cap_unique_table_refs[wp]:\n \"\\ unique_table_refs and no_cap_to_obj_with_diff_ref cap {ptr} \\\n set_cap cap ptr\n \\\\rv. unique_table_refs\\\"\n apply wp\n apply clarsimp\n apply (simp add: unique_table_refs_def\n split del: if_split del: split_paired_All)\n apply (erule allEI, erule allEI)\n apply (clarsimp split del: if_split)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state\n split: if_split_asm)\n done\n\nlemma table_cap_ref_vs_ref_or_frame:\n \"\\ table_cap_ref cap = table_cap_ref cap'; vs_cap_ref cap = Some x \\\n \\ vs_cap_ref cap' = Some x \\ is_frame_cap cap\"\n by (simp add: vs_cap_ref_def table_cap_ref_def arch_cap_fun_lift_def vs_cap_ref_arch_def\n table_cap_ref_arch_def\n split: cap.splits arch_cap.splits)\n\nlemma obj_refs_obj_ref_of:\n \"obj_refs cap = {p} \\ obj_ref_of cap = p\"\n by (cases cap; simp) (rename_tac acap, case_tac acap; simp)\n\nlemma set_cap_valid_asid_pool_caps[wp]:\n \"\\\\s. valid_asid_pool_caps s\n \\ (\\vref cap'. caps_of_state s ptr = Some cap'\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref. oref \\ obj_refs cap' \\ \\ reachable_target vref oref s))\n \\ unique_table_refs s\\\n set_cap cap ptr\n \\\\_. valid_asid_pool_caps\\\"\n apply (wp_pre, wps, wp)\n supply split_paired_Ex[simp del] split_paired_All[simp del]\n apply (clarsimp simp: valid_asid_pool_caps_def simp del: fun_upd_apply)\n apply (erule allE, erule allE, erule (1) impE)\n apply (elim exE conjE)\n apply (case_tac \"ptr \\ cptr\", fastforce)\n apply simp\n apply (erule disjE, rule_tac x=cptr in exI, fastforce)\n apply (erule disjE)\n apply (erule conjE)\n apply (drule (1) not_final_another_caps)\n apply (rule obj_ref_is_gen_obj_ref, simp)\n apply (simp add: gen_obj_refs_eq)\n apply (elim exE conjE)\n apply (rule_tac x=p' in exI)\n apply simp\n apply (drule_tac cap=cap and cap'=cap' in unique_table_refsD; simp?)\n apply (drule (1) table_cap_ref_vs_ref_or_frame)\n apply (erule disjE, simp)\n apply (simp add: reachable_frame_cap_def)\n apply (clarsimp simp: reachable_target_def pool_for_asid_def obj_refs_obj_ref_of)\n apply (rule_tac x=cptr in exI)\n apply (clarsimp simp: reachable_target_def pool_for_asid_def)\n done\n\nlemma set_cap_valid_arch_caps:\n \"\\\\s. valid_arch_caps s\n \\ (\\vref cap'. cte_wp_at ((=) cap') ptr s\n \\ vs_cap_ref cap' = Some vref\n \\ (vs_cap_ref cap = Some vref \\ obj_refs cap = obj_refs cap')\n \\ (\\ is_final_cap' cap' s \\ \\ reachable_frame_cap cap' s)\n \\ (\\oref \\ obj_refs cap'. \\ reachable_target vref oref s))\n \\ no_cap_to_obj_with_diff_ref cap {ptr} s\n \\ (is_pt_cap cap \\ cap_asid cap = None\n \\ (\\r \\ obj_refs cap. pts_of s r = Some empty_pt))\n \\ (is_pt_cap cap\n \\ (\\oldcap. caps_of_state s ptr = Some oldcap \\\n is_pt_cap oldcap\n \\ (cap_asid cap = None \\ cap_asid oldcap = None)\n \\ obj_refs oldcap \\ obj_refs cap)\n \\ (\\ptr'. cte_wp_at (\\cap'. obj_refs cap' = obj_refs cap\n \\ is_pt_cap cap'\n \\ (cap_asid cap = None \\ cap_asid cap' = None)) ptr' s \\ ptr' = ptr))\\\n set_cap cap ptr\n \\\\rv. valid_arch_caps\\\"\n unfolding valid_arch_caps_def\n by (wpsimp wp: set_cap_valid_vs_lookup set_cap_valid_table_caps set_cap_unique_table_caps\n simp: cte_wp_at_caps_of_state)\n\nlemma valid_table_capsD:\n \"\\ cte_wp_at ((=) cap) ptr s; valid_table_caps s; is_pt_cap cap; cap_asid cap = None \\\n \\ \\r \\ obj_refs cap. pts_of s r = Some empty_pt\"\n apply (clarsimp simp: cte_wp_at_caps_of_state valid_table_caps_def is_pt_cap_def\n is_PageTableCap_def cap_asid_def\n split: option.splits)\n apply (cases ptr, fastforce)+\n done\n\nlemma pt_caps_asid_vsref:\n \"is_pt_cap cap \\ (cap_asid cap = None) = (vs_cap_ref cap = None)\"\n apply (cases cap; simp)\n apply (rename_tac acap, case_tac acap; simp add: cap_asid_def split: option.splits)\n done\n\nlemma unique_table_capsD:\n \"\\ unique_table_caps_2 cps; cps ptr = Some cap; cps ptr' = Some cap';\n obj_refs cap = obj_refs cap'; vs_cap_ref cap = None \\ vs_cap_ref cap' = None;\n is_pt_cap cap; is_pt_cap cap' \\\n \\ ptr = ptr'\"\n unfolding unique_table_caps_def\n by blast\n\nlemma valid_refs_def2:\n \"valid_refs R s = (\\p c. caps_of_state s p = Some c \\ cap_range c \\ R = {})\"\n by (auto simp: valid_refs_def cte_wp_at_caps_of_state)\n\nlemma set_cap_cap_refs_in_kernel_window[wp]:\n \"\\cap_refs_in_kernel_window and (\\s. \\ref \\ cap_range cap. ref \\ kernel_window s)\\\n set_cap cap p\n \\\\rv. cap_refs_in_kernel_window\\\"\n apply (simp add: cap_refs_in_kernel_window_def valid_refs_def2 pred_conj_def)\n apply (wp_pre, wps, wp)\n apply (clarsimp simp: not_kernel_window_def)\n apply fastforce\n done\n\nlemma cap_refs_in_kernel_windowD:\n \"\\ caps_of_state s ptr = Some cap; cap_refs_in_kernel_window s \\\n \\ \\ref \\ cap_range cap. ref \\ kernel_window s\"\n apply (clarsimp simp: cap_refs_in_kernel_window_def valid_refs_def cte_wp_at_caps_of_state\n not_kernel_window_def)\n apply (cases ptr, fastforce)\n done\n\nlemma valid_cap_imp_valid_vm_rights:\n \"valid_cap (ArchObjectCap (FrameCap p rs sz dev m)) s \\ rs \\ valid_vm_rights\"\n by (simp add: valid_cap_def valid_vm_rights_def)\n\nlemma acap_rights_update_idem [simp]:\n \"acap_rights_update R (acap_rights_update R' cap) = acap_rights_update R cap\"\n by (simp add: acap_rights_update_def split: arch_cap.splits)\n\nlemma cap_master_arch_cap_rights [simp]:\n \"cap_master_arch_cap (acap_rights_update R cap) = cap_master_arch_cap cap\"\n by (simp add: cap_master_arch_cap_def acap_rights_update_def\n split: arch_cap.splits)\n\nlemma acap_rights_update_id [intro!, simp]:\n \"valid_arch_cap ac s \\ acap_rights_update (acap_rights ac) ac = ac\"\n unfolding acap_rights_update_def acap_rights_def valid_arch_cap_def\n by (cases ac; simp)\n\nlemma obj_ref_none_no_asid:\n \"{} = obj_refs new_cap \\ None = table_cap_ref new_cap\"\n \"obj_refs new_cap = {} \\ table_cap_ref new_cap = None\"\n by (simp add: table_cap_ref_def table_cap_ref_arch_def arch_cap_fun_lift_def\n split: cap.split arch_cap.split)+\n\nlemma set_cap_hyp_refs_of [wp]:\n \"\\\\s. P (state_hyp_refs_of s)\\\n set_cap cp p\n \\\\rv s. P (state_hyp_refs_of s)\\\"\n apply (simp add: set_cap_def set_object_def split_def)\n apply (wp get_object_wp | wpc)+\n by (force elim!: rsubst[where P=P]\n simp: state_hyp_refs_of_def obj_at_def\n split: if_split_asm)\n\nlemmas state_hyp_refs_of_revokable = state_hyp_refs_update\n\nlemma is_valid_vtable_root_is_arch_cap:\n \"is_valid_vtable_root cap \\ is_arch_cap cap\"\n by (clarsimp simp: is_valid_vtable_root_def is_arch_cap_def split: cap.splits)\n\nlemma unique_table_refs_no_cap_asidE:\n \"\\caps_of_state s p = Some cap; unique_table_refs s\\\n \\ no_cap_to_obj_with_diff_ref cap S s\"\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (unfold unique_table_refs_def)\n apply (drule_tac x=p in spec, drule_tac x=\"(a,b)\" in spec)\n apply (drule spec)+\n apply (erule impE, assumption)+\n apply (clarsimp simp: is_cap_simps)\n done\n\nlemmas unique_table_refs_no_cap_asidD\n = unique_table_refs_no_cap_asidE[where S=\"{}\"]\n\nend\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/RISCV64/ArchCSpaceInvPre_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5117166047041654, "lm_q2_score": 0.22270014398423355, "lm_q1q2_score": 0.11395936154674075}} {"text": "(*\n * Copyright 2014, General Dynamics C4 Systems\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory ArchUntyped_AI\nimports Untyped_AI\nbegin\n\ncontext Arch begin global_naming X64\n\nnamed_theorems Untyped_AI_assms\n\nlemma of_bl_nat_to_cref[Untyped_AI_assms]:\n \"\\ x < 2 ^ bits; bits < word_bits \\\n \\ (of_bl (nat_to_cref bits x) :: word64) = of_nat x\"\n apply (clarsimp intro!: less_mask_eq\n simp: nat_to_cref_def of_drop_to_bl\n word_size word_less_nat_alt word_bits_def)\n by (metis add_lessD1 le_unat_uoi nat_le_iff_add nat_le_linear)\n\n\nlemma cnode_cap_ex_cte[Untyped_AI_assms]:\n \"\\ is_cnode_cap cap; cte_wp_at (\\c. \\m. cap = mask_cap m c) p s;\n (s::'state_ext::state_ext state) \\ cap; valid_objs s; pspace_aligned s \\ \\\n ex_cte_cap_wp_to is_cnode_cap (obj_ref_of cap, nat_to_cref (bits_of cap) x) s\"\n apply (simp only: ex_cte_cap_wp_to_def)\n apply (rule exI, erule cte_wp_at_weakenE)\n apply (clarsimp simp: is_cap_simps bits_of_def)\n apply (case_tac c, simp_all add: mask_cap_def cap_rights_update_def split:bool.splits)\n apply (clarsimp simp: nat_to_cref_def word_bits_def)\n apply (erule(2) valid_CNodeCapE)\n apply (simp add: word_bits_def cte_level_bits_def)\n done\n\n\n\nlemma inj_on_nat_to_cref[Untyped_AI_assms]:\n \"bits < word_bits \\ inj_on (nat_to_cref bits) {..< 2 ^ bits}\"\n apply (rule inj_onI)\n apply (drule arg_cong[where f=\"\\x. replicate (64 - bits) False @ x\"])\n apply (subst(asm) word_bl.Abs_inject[where 'a=64, symmetric])\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: nat_to_cref_def word_bits_def)\n apply (simp add: of_bl_rep_False of_bl_nat_to_cref)\n apply (erule word_unat.Abs_eqD)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, (simp add: word_bits_def) +)\n apply (simp only: unats_def mem_simps)\n apply (erule order_less_le_trans)\n apply (rule power_increasing, simp+)\n done\n\n\nlemma data_to_obj_type_sp[Untyped_AI_assms]:\n \"\\P\\ data_to_obj_type x \\\\ts (s::'state_ext::state_ext state). ts \\ ArchObject ASIDPoolObj \\ P s\\, -\"\n unfolding data_to_obj_type_def\n apply (rule hoare_pre)\n apply (wp|wpc)+\n apply clarsimp\n apply (simp add: arch_data_to_obj_type_def split: if_split_asm)\n done\n\nlemma dui_inv_wf[wp, Untyped_AI_assms]:\n \"\\invs and cte_wp_at ((=) (cap.UntypedCap dev w sz idx)) slot\n and (\\s. \\cap \\ set cs. is_cnode_cap cap\n \\ (\\r\\cte_refs cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s))\n and (\\s. \\x \\ set cs. s \\ x)\\\n decode_untyped_invocation label args slot (cap.UntypedCap dev w sz idx) cs\n \\valid_untyped_inv\\,-\"\nproof -\n have inj: \"\\node_cap s. \\is_cnode_cap node_cap;\n unat (args ! 5) \\ 2 ^ bits_of node_cap - unat (args ! 4);valid_cap node_cap s\\ \\\n inj_on (Pair (obj_ref_of node_cap) \\ nat_to_cref (bits_of node_cap))\n {unat (args ! 4)..S a f s. (\\x\\S. cte_wp_at ((=) cap.NullCap) (a, f x) s)\n \\ cte_wp_at (\\c. c \\ cap.NullCap) slot s\n \\ slot \\ (Pair a \\ f) ` S\"\n by (auto simp:cte_wp_at_caps_of_state)\n show ?thesis\n apply (simp add: decode_untyped_invocation_def unlessE_def[symmetric] unlessE_whenE\n split del: if_split)\n apply (rule validE_R_sp[OF whenE_throwError_sp]\n validE_R_sp[OF data_to_obj_type_sp]\n validE_R_sp[OF dui_sp_helper] validE_R_sp[OF map_ensure_empty])+\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp whenE_throwError_wp[THEN validE_validE_R] check_children_wp\n map_ensure_empty_wp)\n apply (clarsimp simp: distinct_map cases_imp_eq)\n apply (subgoal_tac \"s \\ node_cap\")\n prefer 2\n apply (erule disjE)\n apply (drule bspec [where x = \"cs ! 0\"],clarsimp)+\n apply fastforce\n apply clarsimp\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) caps_of_state_valid[rotated])+\n apply assumption\n apply (subgoal_tac \"\\r\\cte_refs node_cap (interrupt_irq_node s). ex_cte_cap_wp_to is_cnode_cap r s\")\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (frule(1) caps_of_state_valid[rotated])\n apply (clarsimp simp: not_less)\n apply (frule(2) inj)\n apply (clarsimp simp: comp_def)\n apply (frule(1) caps_of_state_valid)\n apply (simp add: nasty_strengthen[unfolded o_def] cte_wp_at_caps_of_state)\n apply (intro conjI)\n apply (intro impI)\n apply (frule range_cover_stuff[where w=w and rv = 0 and sz = sz], simp_all)[1]\n apply (clarsimp simp: valid_cap_simps cap_aligned_def)+\n apply (frule alignUp_idem[OF is_aligned_weaken,where a = w])\n apply (erule range_cover.sz)\n apply (simp add: range_cover_def)\n apply (clarsimp simp: get_free_ref_def empty_descendants_range_in)\n apply (rule conjI[rotated], blast, clarsimp)\n apply (drule_tac x = \"(obj_ref_of node_cap, nat_to_cref (bits_of node_cap) slota)\" in bspec)\n apply (clarsimp simp: is_cap_simps nat_to_cref_def word_bits_def\n bits_of_def valid_cap_simps cap_aligned_def)+\n apply (simp add: free_index_of_def)\n apply (frule(1) range_cover_stuff[where sz = sz])\n apply (clarsimp dest!: valid_cap_aligned simp:cap_aligned_def word_bits_def)+\n apply simp+\n apply (clarsimp simp: get_free_ref_def)\n apply (erule disjE)\n apply (drule_tac x= \"cs!0\" in bspec, clarsimp)\n apply simp\n apply (clarsimp simp: cte_wp_at_caps_of_state ex_cte_cap_wp_to_def)\n apply (rule_tac x=aa in exI, rule exI, rule exI)\n apply (rule conjI, assumption)\n apply (rule conjI, assumption)\n apply (clarsimp simp: is_cap_simps mask_cap_def cap_rights_update_def)\n done\nqed\n\nlemma asid_bits_ge_0:\n \"(0::word32) < 2 ^ asid_bits\" by (simp add: asid_bits_def)\n\nlemma retype_ret_valid_caps_captable[Untyped_AI_assms]:\n \"\\pspace_no_overlap_range_cover ptr sz (s::'state_ext::state_ext state) \\ 0 < us\n \\ range_cover ptr sz (obj_bits_api CapTableObject us) n \\ ptr \\ 0\n \\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object CapTableObject dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api CapTableObject us)) [0.. \\ CNodeCap (ptr_add ptr (y * 2 ^ obj_bits_api CapTableObject us)) us []\"\nby ((clarsimp simp:valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def | rule conjI | intro conjI obj_at_foldr_intro imageI\n | rule is_aligned_add_multI[OF _ le_refl],\n (simp add:range_cover_def word_bits_def obj_bits_api_def slot_bits_def)+)+)[1]\n\nlemma retype_ret_valid_caps_aobj[Untyped_AI_assms]:\n \"\\ptr sz (s::'state_ext::state_ext state) x6 us n.\n \\pspace_no_overlap_range_cover ptr sz s \\ x6 \\ ASIDPoolObj \\\n range_cover ptr sz (obj_bits_api (ArchObject x6) us) n \\ ptr \\ 0\\\n \\ \\y\\{0..kheap := foldr (\\p kh. kh(p \\ default_object (ArchObject x6) dev us)) (map (\\p. ptr_add ptr (p * 2 ^ obj_bits_api (ArchObject x6) us)) [0.. \\ ArchObjectCap (arch_default_cap x6 (ptr_add ptr (y * 2 ^ obj_bits_api (ArchObject x6) us)) us dev)\"\n apply (rename_tac aobject_type us n)\n apply (case_tac aobject_type)\n by (clarsimp simp: valid_cap_def default_object_def cap_aligned_def\n cte_level_bits_def is_obj_defs well_formed_cnode_n_def empty_cnode_def\n dom_def arch_default_cap_def ptr_add_def\n | intro conjI obj_at_foldr_intro\n imageI valid_vm_rights_def\n | rule is_aligned_add_multI[OF _ le_refl]\n | fastforce simp:range_cover_def obj_bits_api_def\n default_arch_object_def valid_vm_rights_def word_bits_def a_type_def)+\n\n\n\nlemma copy_global_mappings_hoare_lift:(*FIXME: arch_split \\ these do not seem to be used globally *)\n assumes wp: \"\\ptr val. \\Q\\ store_pml4e ptr val \\\\rv. Q\\\"\n shows \"\\Q\\ copy_global_mappings pd \\\\rv. Q\\\"\n apply (simp add: copy_global_mappings_def)\n apply (wp mapM_x_wp' wp)\n done\n\nlemma init_arch_objects_hoare_lift:\n assumes wp: \"\\ptr val. \\P\\ store_pml4e ptr val \\\\rv. P\\\"\n shows \"\\P\\ init_arch_objects tp ptr sz us adds \\\\rv. P\\\"\nproof -\n have pres: \"\\P\\ return () \\\\rv. P\\\"\n by (wp wp | simp)+\n show ?thesis\n apply (simp add: init_arch_objects_def\n pres reserve_region_def unless_def when_def\n split: Structures_A.apiobject_type.split\n aobject_type.split)\n apply clarsimp\n apply (rule hoare_pre)\n apply (wp mapM_x_wp' copy_global_mappings_hoare_lift wp)\n apply simp\n done\nqed\n\nlemma cap_refs_in_kernel_windowD2:\n \"\\ cte_wp_at P p (s::'state_ext::state_ext state); cap_refs_in_kernel_window s \\\n \\ \\cap. P cap \\ region_in_kernel_window (cap_range cap) s\"\n apply (clarsimp simp: cte_wp_at_caps_of_state region_in_kernel_window_def)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply fastforce\n done\n\nlemma init_arch_objects_descendants_range[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). descendants_range x cref s \\ init_arch_objects ty ptr n us y\n \\\\rv s. descendants_range x cref s\\\"\n apply (simp add:descendants_range_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply (simp add: store_pml4e_def set_arch_obj_simps)\n apply (wp hoare_vcg_ball_lift | wps)+\n apply simp\n apply fastforce\n done\n\n\n\nlemma init_arch_objects_caps_overlap_reserved[wp,Untyped_AI_assms]:\n \"\\\\(s::'state_ext::state_ext state). caps_overlap_reserved S s\\\n init_arch_objects ty ptr n us y\n \\\\rv s. caps_overlap_reserved S s\\\"\n apply (simp add:caps_overlap_reserved_def)\n apply (rule hoare_pre)\n apply (wp retype_region_mdb init_arch_objects_hoare_lift)\n apply fastforce\n done\n\n(* FIXME ioportcontrol: move *)\nlemma cap_ioports_not_ioport_cap[simp]:\n \"\\is_ioport_cap cap \\ cap_ioports cap = {}\"\n by (clarsimp simp: is_cap_simps cap_ioports_def split: arch_cap.splits cap.splits)\n\nlemma default_cap_not_ioport:\n \"\\ is_ioport_cap (default_cap tp oref sz dev)\"\n apply (case_tac tp; clarsimp simp: is_cap_simps)\n by (case_tac x6; clarsimp simp: arch_default_cap_def)\n\nlemma safe_ioport_insert_not_ioport[simp]:\n \"\\is_ioport_cap newcap \\ safe_ioport_insert newcap oldcap s\"\n by (clarsimp simp: safe_ioport_insert_def)\n\nlemma set_untyped_cap_invs_simple[Untyped_AI_assms]:\n \"\\\\s. descendants_range_in {ptr .. ptr+2^sz - 1} cref s \\ pspace_no_overlap_range_cover ptr sz s \\ invs s\n \\ cte_wp_at (\\c. is_untyped_cap c \\ cap_bits c = sz \\ obj_ref_of c = ptr \\ cap_is_device c = dev) cref s \\ idx \\ 2^ sz\\\n set_cap (cap.UntypedCap dev ptr sz idx) cref\n \\\\rv s. invs s\\\"\n apply (rule hoare_name_pre_state)\n apply (clarsimp simp: cte_wp_at_caps_of_state invs_def valid_state_def)\n apply (rule hoare_pre)\n apply (wp set_free_index_valid_pspace_simple set_cap_valid_mdb_simple\n set_cap_idle update_cap_ifunsafe)\n apply (simp add:valid_irq_node_def)\n apply wps\n apply (wp hoare_vcg_all_lift set_cap_irq_handlers set_cap_valid_arch_caps\n set_cap_irq_handlers cap_table_at_lift_valid set_cap_typ_at\n set_untyped_cap_refs_respects_device_simple set_cap_ioports_no_new_ioports)\n apply (clarsimp simp:cte_wp_at_caps_of_state is_cap_simps)\n apply (intro conjI,clarsimp)\n apply (rule ext,clarsimp simp:is_cap_simps)\n apply (clarsimp split:cap.splits simp:is_cap_simps appropriate_cte_cap_def)\n apply (drule(1) if_unsafe_then_capD[OF caps_of_state_cteD])\n apply clarsimp\n apply (clarsimp simp:is_cap_simps ex_cte_cap_wp_to_def appropriate_cte_cap_def cte_wp_at_caps_of_state)\n apply (clarsimp dest!:valid_global_refsD2 simp:cap_range_def)\n apply (simp add:valid_irq_node_def)\n apply (clarsimp simp:valid_irq_node_def)\n apply (clarsimp simp:no_cap_to_obj_with_diff_ref_def cte_wp_at_caps_of_state vs_cap_ref_def)\n apply (case_tac cap)\n apply (simp_all add:vs_cap_ref_def table_cap_ref_def)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap)\n apply simp_all\n apply (clarsimp simp:cap_refs_in_kernel_window_def\n valid_refs_def simp del:split_paired_All)\n apply (drule_tac x = cref in spec)\n apply (clarsimp simp:cte_wp_at_caps_of_state)\n apply fastforce\n done\n\n\nlemma pbfs_atleast_pageBits':\n \"pageBits \\ pageBitsForSize sz\"by (cases sz, simp_all add: pageBits_def)\n\n\nlemma pbfs_less_wb':\n \"pageBitsForSize sz < word_bits\"by (cases sz, simp_all add: word_bits_conv pageBits_def bit_simps)\n\nlemma delete_objects_rewrite[Untyped_AI_assms]:\n \"\\ word_size_bits \\ sz; sz\\ word_bits;ptr && ~~ mask sz = ptr\\ \\ delete_objects ptr sz =\n do y \\ modify (clear_um {ptr + of_nat k |k. k < 2 ^ sz});\n modify (detype {ptr && ~~ mask sz..ptr + 2 ^ sz - 1})\n od\"\n apply (clarsimp simp:delete_objects_def freeMemory_def word_size_def word_size_bits_def)\n apply (subgoal_tac \"is_aligned (ptr &&~~ mask sz) sz\")\n apply (subst mapM_storeWord_clear_um[simplified word_size_def word_size_bits_def])\n apply (simp)\n apply simp\n apply (simp add:range_cover_def)\n apply clarsimp\n apply (rule is_aligned_neg_mask)\n apply simp\n done\n\ndeclare store_pde_pred_tcb_at [wp]\n\n(* nonempty_table *)\ndefinition\n nonempty_table :: \"machine_word set \\ Structures_A.kernel_object \\ bool\"\nwhere\n \"nonempty_table S ko \\\n (a_type ko \\ AArch ` { APageTable, APageDirectory, APDPointerTable, APageMapL4 })\n \\ \\ empty_table S ko\"\n\nlemma reachable_pg_cap_exst_update[simp]:\n \"reachable_pg_cap x (trans_state f (s::'state_ext::state_ext state)) = reachable_pg_cap x s\"\n by (simp add: reachable_pg_cap_def vs_lookup_pages_def\n vs_lookup_pages1_def obj_at_def)\n\nlemma default_PDPT_capD:\n \"default_cap tp oref sz dev = ArchObjectCap (PDPointerTableCap p None)\n \\oref = p \\ tp = ArchObject PDPTObj\"\n apply (case_tac tp, simp_all)\n apply (case_tac x6, simp_all add: arch_default_cap_def)\n done\n\nlemma create_cap_valid_arch_caps[wp, Untyped_AI_assms]:\n \"\\valid_arch_caps\n and valid_cap (default_cap tp oref sz dev)\n and (\\(s::'state_ext::state_ext state). \\r\\obj_refs (default_cap tp oref sz dev).\n (\\p'. \\ cte_wp_at (\\cap. r \\ obj_refs cap) p' s)\n \\ \\ obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n and cte_wp_at ((=) cap.NullCap) cref\n and K (tp \\ ArchObject ASIDPoolObj)\\\n create_cap tp sz p dev (cref, oref) \\\\rv. valid_arch_caps\\\"\n apply (simp add: create_cap_def set_cdt_def)\n apply (wp set_cap_valid_arch_caps)\n apply (simp add: trans_state_update[symmetric] del: trans_state_update)\n apply (wp hoare_vcg_disj_lift hoare_vcg_conj_lift hoare_vcg_all_lift hoare_vcg_imp_lift | simp)+\n\n apply (clarsimp simp del: split_paired_All split_paired_Ex\n imp_disjL\n simp: cte_wp_at_caps_of_state)\n apply (rule conjI)\n apply (clarsimp simp: no_cap_to_obj_with_diff_ref_def\n cte_wp_at_caps_of_state)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply (case_tac cref, fastforce)\n apply (simp add: obj_ref_none_no_asid)\n apply (rule conjI)\n apply (auto simp: is_cap_simps valid_cap_def second_level_tables_def\n obj_at_def nonempty_table_def a_type_simps)[1]\n apply (clarsimp simp del: imp_disjL)\n apply (case_tac \"\\x. x \\ obj_refs cap\")\n apply (clarsimp dest!: obj_ref_elemD)\n apply fastforce\n apply (auto simp: is_cap_simps)[1]\n done\n\n\nlemma create_cap_cap_refs_in_kernel_window[wp, Untyped_AI_assms]:\n \"\\cap_refs_in_kernel_window and cte_wp_at (\\c. cap_range (default_cap tp oref sz dev) \\ cap_range c) p\\\n create_cap tp sz p dev (cref, oref) \\\\rv. cap_refs_in_kernel_window\\\"\n apply (simp add: create_cap_def)\n apply (wp | simp)+\n apply (clarsimp simp: cte_wp_at_caps_of_state)\n apply (drule(1) cap_refs_in_kernel_windowD)\n apply blast\n done\n\nlemma create_cap_ioports[wp, Untyped_AI_assms]:\n \"\\valid_ioports and cte_wp_at (\\_. True) cref\\ create_cap tp sz p dev (cref,oref) \\\\rv. valid_ioports\\\"\n by (wpsimp wp: set_cap_ioports' set_cdt_cte_wp_at\n simp: safe_ioport_insert_not_ioport[OF default_cap_not_ioport] create_cap_def)\n\n(* FIXME: move *)\nlemma simpler_store_pml4e_def:\n \"store_pml4e p pde s =\n (case kheap s (p && ~~ mask pml4_bits) of\n Some (ArchObj (PageMapL4 pml4)) =>\n ({((), s\\kheap := (kheap s((p && ~~ mask pml4_bits) \\\n (ArchObj (PageMapL4 (pml4(ucast (p && mask pml4_bits >> word_size_bits) := pde))))))\\)}, False)\n | _ => ({}, True))\"\n apply (auto simp: store_pml4e_def set_object_def get_object_def simpler_gets_def assert_def a_type_simps\n return_def fail_def set_object_def get_def put_def bind_def get_pml4_def aa_type_simps\n set_arch_obj_simps\n split: Structures_A.kernel_object.splits option.splits arch_kernel_obj.splits if_split_asm)\n done\n\nlemma neg_mask_pml4_bits_3_aligned[simp]:\n \"is_aligned (p && ~~ mask pml4_bits) 3\"\n apply (rule_tac x = 3 in is_aligned_weaken[OF is_aligned_neg_mask])\n apply (simp add: bit_simps)+\n done\n\nlemma store_pml4e_weaken:\n \"\\\\s. pml4e_at (p && ~~ mask pml4_bits) s \\ P s\\ store_pml4e p e \\Q\\ =\n \\P\\ store_pml4e p e \\Q\\\"\n apply (rule iffI)\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (simp add: valid_def)\n apply (erule allEI)\n apply clarsimp\n apply (rule use_valid, assumption)\n apply (simp add: store_pml4e_def set_arch_obj_simps set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: pml4e_at_def obj_at_def a_type_simps)\n apply (drule bspec, assumption)\n apply (simp add: simpler_store_pml4e_def obj_at_def fun_upd_def\n split: Structures_A.kernel_object.splits arch_kernel_obj.splits)\n done\n\nlemma store_pml4e_nonempty_table:\n \"\\\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ (\\rf. pml4e_ref pml4e = Some rf \\\n rf \\ set (second_level_tables (arch_state s)))\n \\ ucast (pml4e_ptr && mask pml4_bits >> 3) \\ kernel_mapping_slots\\\n store_pml4e pml4e_ptr pml4e\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (simp add: store_pml4e_def set_arch_obj_simps set_object_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def nonempty_table_def a_type_def word_size_bits_def empty_table_def)\n done\n\nlemma store_pml4e_global_global_objs:\n \"\\\\s. valid_global_objs s \\ valid_arch_state s\n \\ (\\rf. pml4e_ref pml4e = Some rf \\\n rf \\ set (second_level_tables (arch_state s)))\n \\ ucast (pml4e_ptr && mask pml4_bits >> 3) \\ kernel_mapping_slots\n \\\n store_pml4e pml4e_ptr pml4e\n \\\\rv s. valid_global_objs s\\\"\n apply (simp add: store_pml4e_def set_arch_obj_simps set_pd_def)\n apply (wp get_object_wp)\n apply (clarsimp simp: obj_at_def fun_upd_def[symmetric] bit_simps\n valid_global_objs_upd_def empty_table_def valid_global_objs_def)\n done\n\nlemma valid_arch_state_global_pml4:\n \"\\ valid_arch_state s; pspace_aligned s \\\n \\ obj_at (\\ko. \\pd. ko = ArchObj (PageMapL4 pd)) (x64_global_pml4 (arch_state s)) s\n \\ is_aligned (x64_global_pml4 (arch_state s)) pml4_bits\"\n apply (clarsimp simp: valid_arch_state_def obj_at_def\n pd_bits_def pageBits_def\n elim!: obj_at_weakenE)\n apply (clarsimp dest!: pspace_alignedD simp: pml4_bits_def)\n done\n\nlemmas pml4_shifting' = pml4_shifting(2)\n\nlemma pml4_bits_ptTranslationBits_diff:\n \"pml4_bits - word_size_bits = ptTranslationBits\"\n by (simp add: bit_simps)\n\nlemma copy_global_mappings_nonempty_table:\n \"is_aligned pm pml4_bits \\\n \\\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s) \\\n valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s\\\n copy_global_mappings pm\n \\\\rv s. \\ (obj_at (nonempty_table\n (set (second_level_tables (arch_state s)))) r s) \\\n valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s\\\"\n apply (simp add: copy_global_mappings_def)\n apply (rule hoare_seq_ext [OF _ gets_sp])\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp[where S=\"{x. get_pml4_index pptr_base \\ x\n \\ x < 2 ^ (pml4_bits - word_size_bits)}\"])\n apply (wp get_pml4e_wp hoare_vcg_ball_lift\n store_pml4e_weaken[THEN iffD2,OF store_pml4e_nonempty_table]\n store_pml4e_weaken[THEN iffD2,OF store_pml4e_global_global_objs]\n | simp)+\n apply clarsimp\n apply (subst (asm) is_aligned_add_helper[THEN conjunct2])\n apply (clarsimp simp: valid_arch_state_def pspace_aligned_def dom_def\n obj_at_def)\n apply (drule_tac x=\"x64_global_pml4 (arch_state s)\" in spec, erule impE,\n fastforce)\n apply (simp add: pml4_bits_def pageBits_def)\n apply (erule shiftl_less_t2n)\n apply (simp add: bit_simps)\n apply (clarsimp simp: valid_arch_state_def valid_global_objs_def obj_at_def\n empty_table_def imp_conjR)\n apply (clarsimp simp: is_aligned_neg_mask_eq mask_add_aligned)\n apply (fold word_size_bits_def)\n apply (strengthen in_kernel_mapping_slotsI[mk_strg] shiftl_shiftr_id[mk_strg]\n shiftr_less_t2n3[mk_strg])+\n apply (clarsimp simp: pml4_bits_ptTranslationBits_diff pml4_translation_bits)\n apply (simp add: is_aligned_shiftr_shiftl[OF aligned_after_mask,OF is_aligned_shiftl])\n apply (cut_tac x = \"x << word_size_bits\" and n = pml4_bits in less_mask_eq)\n apply (rule shiftl_less_t2n)\n apply (simp add: pml4_bits_ptTranslationBits_diff)\n apply (simp add: bit_simps)\n apply (simp add: word_size_bits_def)\n apply (subst shiftl_shiftr_id)\n apply simp\n apply (erule less_le_trans, simp add: bit_simps)\n apply simp\n apply (rule shiftl_less_t2n, simp add: bit_simps)\n apply (simp add: bit_simps)\n apply (clarsimp simp: bit_simps le_less_trans)\n apply simp\n done\n\n\nlemma mapM_copy_global_mappings_nonempty_table[wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\pd\\set pds. is_aligned pd pml4_bits)\\\n mapM_x copy_global_mappings pds\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (rule hoare_strengthen_post)\n apply (rule mapM_x_wp', rule copy_global_mappings_nonempty_table)\n apply simp_all\n done\n\nlemma init_arch_objects_nonempty_table[Untyped_AI_assms, wp]:\n \"\\(\\s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\n \\ valid_global_objs s \\ valid_arch_state s \\ pspace_aligned s) and\n K (\\ref\\set refs. is_aligned ref (obj_bits_api tp us))\\\n init_arch_objects tp ptr bits us refs\n \\\\rv s. \\ (obj_at (nonempty_table (set (second_level_tables (arch_state s)))) r s)\\\"\n apply (rule hoare_gen_asm)\n apply (simp add: init_arch_objects_def split del: if_split)\n apply (rule hoare_pre)\n apply (wp unless_wp | wpc | simp add: reserve_region_def second_level_tables_def)+\n apply (clarsimp simp: obj_bits_api_def default_arch_object_def pml4_bits_def pageBits_def)\n done\n\nlemma nonempty_table_caps_of[Untyped_AI_assms]:\n \"nonempty_table S ko \\ caps_of ko = {}\"\n by (auto simp: caps_of_def cap_of_def nonempty_table_def a_type_def\n split: Structures_A.kernel_object.split if_split_asm)\n\n\nlemma nonempty_default[simp, Untyped_AI_assms]:\n \"tp \\ Untyped \\ \\ nonempty_table S (default_object tp dev us)\"\n apply (case_tac tp, simp_all add: default_object_def nonempty_table_def\n a_type_def)\n apply (rename_tac aobject_type)\n apply (case_tac aobject_type, simp_all add: default_arch_object_def)\n apply (simp_all add: empty_table_def pde_ref_def)\n done\n\nlemma set_pml4e_cte_wp_at_iin[wp]:\n \"\\\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\n store_pml4e q pml4\n \\\\_ s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\\\"\n apply (clarsimp simp: store_pml4e_def set_arch_obj_simps)\n apply (rule hoare_pre)\n apply (wp set_aobject_cte_wp_at | wps | simp)+\n done\n\ncrunch cte_wp_at_iin[wp]: init_arch_objects\n \"\\s. P (cte_wp_at (P' (interrupt_irq_node s)) p s)\"\n (ignore: clearMemory store_pml4e wp: crunch_wps unless_wp)\n\nlemmas init_arch_objects_ex_cte_cap_wp_to\n = init_arch_objects_excap\n\nlemma obj_is_device_vui_eq[Untyped_AI_assms]:\n \"valid_untyped_inv ui s\n \\ case ui of Retype slot reset ptr_base ptr tp us slots dev\n \\ obj_is_device tp dev = dev\"\n apply (cases ui, clarsimp)\n apply (clarsimp simp: obj_is_device_def\n split: apiobject_type.split)\n apply (intro impI conjI allI, simp_all add: is_frame_type_def default_object_def)\n apply (simp add: default_arch_object_def split: aobject_type.split)\n apply (auto simp: arch_is_frame_type_def)\n done\n\nend\n\nglobal_interpretation Untyped_AI? : Untyped_AI\n where nonempty_table = X64.nonempty_table\n proof goal_cases\n interpret Arch .\n case 1 show ?case\n by (unfold_locales; (fact Untyped_AI_assms)?)\n qed\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/invariant-abstract/X64/ArchUntyped_AI.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5350984286266115, "lm_q2_score": 0.20946968133032523, "lm_q1q2_score": 0.11208689732477409}} {"text": "(* Title: JinjaThreads/BV/BCVExec.thy\n Author: Andreas Lochbihler\n*)\n\nsection \\Code generation for the byte code verifier\\\n\ntheory BCVExec\nimports\n BVNoTypeError\n BVExec\nbegin\n\nlemmas [code_unfold] = exec_lub_def\n\nlemmas [code] = JVM_le_unfold[THEN meta_eq_to_obj_eq]\n\nlemma err_code [code]:\n \"Err.err A = Collect (case_err True (\\x. x \\ A))\"\nby(auto simp add: err_def split: err.split)\n\nlemma list_code [code]:\n \"list n A = {xs. size xs = n \\ list_all (\\x. x \\ A) xs}\"\nunfolding list_def\nby(auto intro!: ext simp add: list_all_iff)\n\nlemma opt_code [code]:\n \"opt A = Collect (case_option True (\\x. x \\ A))\"\nby(auto simp add: opt_def split: option.split)\n\nlemma Times_code [code_unfold]:\n \"Sigma A (%_. B) = {(a, b). a \\ A \\ b \\ B}\"\nby auto\n\nlemma upto_esl_code [code]:\n \"upto_esl m (A, r, f) = (Union ((\\n. list n A) ` {..m}), Listn.le r, Listn.sup f)\"\nby(auto simp add: upto_esl_def)\n\nlemmas [code] = lesub_def plussub_def\n\nlemma JVM_sup_unfold [code]:\n \"JVM_SemiType.sup S m n = \n lift2 (Opt.sup (Product.sup (Listn.sup (SemiType.sup S)) (\\x y. OK (map2 (lift2 (SemiType.sup S)) x y))))\"\nunfolding JVM_SemiType.sup_def JVM_SemiType.sl_def Opt.esl_def Err.sl_def\n stk_esl_def loc_sl_def Product.esl_def Listn.sl_def upto_esl_def \n SemiType.esl_def Err.esl_def \nby simp\n\n(* FIXME: why is @{thm sup_fun_def} declared [code del] in Lattices.thy? *)\ndeclare sup_fun_def [code] \n\n\n\nlemma check_types_code [code]:\n \"check_types P mxs mxl \\s = (list_all (\\x. x \\ (states P mxs mxl)) \\s)\"\nunfolding check_types_def by(auto simp add: list_all_iff)\n\nlemma wf_jvm_prog_code [code_unfold]:\n \"wf_jvm_prog = wf_jvm_prog\\<^sub>k\"\nby(simp add: fun_eq_iff jvm_kildall_correct)\n\ndefinition \"wf_jvm_prog' = wf_jvm_prog\"\n\n(* Formal code generation test *)\nML_val \\@{code wf_jvm_prog'}\\\n\nend\n", "meta": {"author": "data61", "repo": "PSL", "sha": "2a71eac0db39ad490fe4921a5ce1e4344dc43b12", "save_path": "github-repos/isabelle/data61-PSL", "path": "github-repos/isabelle/data61-PSL/PSL-2a71eac0db39ad490fe4921a5ce1e4344dc43b12/SeLFiE/Example/afp-2020-05-16/thys/JinjaThreads/BV/BCVExec.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5078118642792044, "lm_q2_score": 0.22000710997428735, "lm_q1q2_score": 0.11172222067072281}} {"text": "(* Title: HOL/Auth/n_flash_lemma_inv__140_on_rules.thy\n Author: Yongjian Li and Kaiqiang Duan, State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n Copyright 2016 State Key Lab of Computer Science, Institute of Software, Chinese Academy of Sciences\n*)\n\nheader{*The n_flash Protocol Case Study*} \n\ntheory n_flash_lemma_inv__140_on_rules imports n_flash_lemma_on_inv__140\nbegin\nsection{*All lemmas on causal relation between inv__140*}\nlemma lemma_inv__140_on_rules:\n assumes b1: \"r \\ rules N\" and b2: \"(\\ p__Inv3 p__Inv4. p__Inv3\\N\\p__Inv4\\N\\p__Inv3~=p__Inv4\\f=inv__140 p__Inv3 p__Inv4)\"\n shows \"invHoldForRule s f r (invariants N)\"\n proof -\n have c1: \"(\\ src data. src\\N\\data\\N\\r=n_Store src data)\\\n (\\ data. data\\N\\r=n_Store_Home data)\\\n (\\ src. src\\N\\r=n_PI_Remote_Get src)\\\n (\\ src. src\\N\\r=n_PI_Remote_GetX src)\\\n (\\ dst. dst\\N\\r=n_PI_Remote_PutX dst)\\\n (\\ src. src\\N\\r=n_PI_Remote_Replace src)\\\n (\\ dst. dst\\N\\r=n_NI_Nak dst)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__0 src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__1 src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__2 src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Get__part__0 src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Get__part__1 src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Put_Head N src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Put src)\\\n (\\ src. src\\N\\r=n_NI_Local_Get_Put_Dirty src)\\\n (\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Nak src dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_Get_Nak_Home dst)\\\n (\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Put src dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_Get_Put_Home dst)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__0 src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__1 src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__2 src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__0 src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__1 src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_1 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_2 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_3 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_4 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_5 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_6 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__0 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__1 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__0 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__1 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home_NODE_Get N src)\\\n (\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8 N src pp)\\\n (\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8_NODE_Get N src pp)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__0 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__1 N src)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_10_Home N src)\\\n (\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_10 N src pp)\\\n (\\ src. src\\N\\r=n_NI_Local_GetX_PutX_11 N src)\\\n (\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_Nak src dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_GetX_Nak_Home dst)\\\n (\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_PutX src dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_GetX_PutX_Home dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_Put dst)\\\n (\\ dst. dst\\N\\r=n_NI_Remote_PutX dst)\\\n (\\ dst. dst\\N\\r=n_NI_Inv dst)\\\n (\\ src. src\\N\\r=n_NI_InvAck_exists_Home src)\\\n (\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_InvAck_exists src pp)\\\n (\\ src. src\\N\\r=n_NI_InvAck_1 N src)\\\n (\\ src. src\\N\\r=n_NI_InvAck_2 N src)\\\n (\\ src. src\\N\\r=n_NI_InvAck_3 N src)\\\n (\\ src. src\\N\\r=n_NI_Replace src)\\\n (r=n_PI_Local_Get_Get )\\\n (r=n_PI_Local_Get_Put )\\\n (r=n_PI_Local_GetX_GetX__part__0 )\\\n (r=n_PI_Local_GetX_GetX__part__1 )\\\n (r=n_PI_Local_GetX_PutX_HeadVld__part__0 N )\\\n (r=n_PI_Local_GetX_PutX_HeadVld__part__1 N )\\\n (r=n_PI_Local_GetX_PutX__part__0 )\\\n (r=n_PI_Local_GetX_PutX__part__1 )\\\n (r=n_PI_Local_PutX )\\\n (r=n_PI_Local_Replace )\\\n (r=n_NI_Nak_Home )\\\n (r=n_NI_Nak_Clear )\\\n (r=n_NI_Local_Put )\\\n (r=n_NI_Local_PutXAcksDone )\\\n (r=n_NI_Wb )\\\n (r=n_NI_FAck )\\\n (r=n_NI_ShWb N )\\\n (r=n_NI_Replace_Home )\"\n apply (cut_tac b1, auto) done\n moreover {\n assume d1: \"(\\ src data. src\\N\\data\\N\\r=n_Store src data)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_StoreVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ data. data\\N\\r=n_Store_Home data)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_Store_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_PI_Remote_Get src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Remote_GetVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_PI_Remote_GetX src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Remote_GetXVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_PI_Remote_PutX dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Remote_PutXVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_PI_Remote_Replace src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Remote_ReplaceVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Nak dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_NakVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__0 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Nak__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__1 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Nak__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Nak__part__2 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Nak__part__2Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Get__part__0 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Get__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Get__part__1 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Get__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Put_Head N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Put_HeadVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Put src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_PutVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_Get_Put_Dirty src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_Get_Put_DirtyVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Nak src dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_Get_NakVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_Get_Nak_Home dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_Get_Nak_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_Get_Put src dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_Get_PutVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_Get_Put_Home dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_Get_Put_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__0 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_Nak__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__1 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_Nak__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_Nak__part__2 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_Nak__part__2Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__0 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_GetX__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_GetX__part__1 src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_GetX__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_1 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_2 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_2Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_3 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_3Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_4 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_4Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_5 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_5Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_6 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_6Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__0 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_7__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7__part__1 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_7__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__0 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_7_NODE_Get__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_7_NODE_Get__part__1 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_7_NODE_Get__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_8_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_8_Home_NODE_Get N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_8_Home_NODE_GetVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8 N src pp)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_8Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_8_NODE_Get N src pp)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_8_NODE_GetVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__0 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_9__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_9__part__1 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_9__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_10_Home N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_10_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_Local_GetX_PutX_10 N src pp)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_10Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Local_GetX_PutX_11 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_GetX_PutX_11Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_Nak src dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_GetX_NakVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_GetX_Nak_Home dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_GetX_Nak_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src dst. src\\N\\dst\\N\\src~=dst\\r=n_NI_Remote_GetX_PutX src dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_GetX_PutXVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_GetX_PutX_Home dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_GetX_PutX_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_Put dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_PutVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Remote_PutX dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Remote_PutXVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ dst. dst\\N\\r=n_NI_Inv dst)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_InvAck_exists_Home src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvAck_exists_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src pp. src\\N\\pp\\N\\src~=pp\\r=n_NI_InvAck_exists src pp)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvAck_existsVsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_InvAck_1 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvAck_1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_InvAck_2 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvAck_2Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_InvAck_3 N src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_InvAck_3Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(\\ src. src\\N\\r=n_NI_Replace src)\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_ReplaceVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_Get_Get )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_Get_GetVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_Get_Put )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_Get_PutVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_GetX__part__0 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_GetX__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_GetX__part__1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_GetX__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_PutX_HeadVld__part__0 N )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_PutX_HeadVld__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_PutX_HeadVld__part__1 N )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_PutX_HeadVld__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_PutX__part__0 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_PutX__part__0Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_GetX_PutX__part__1 )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_GetX_PutX__part__1Vsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_PutX )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_PutXVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_PI_Local_Replace )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_PI_Local_ReplaceVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Nak_Home )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Nak_HomeVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Nak_Clear )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Nak_ClearVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Local_Put )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_PutVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Local_PutXAcksDone )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Local_PutXAcksDoneVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Wb )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_WbVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_FAck )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_FAckVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_ShWb N )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_ShWbVsinv__140) done\n }\n\n moreover {\n assume d1: \"(r=n_NI_Replace_Home )\"\n have \"invHoldForRule s f r (invariants N)\"\n apply (cut_tac b2 d1, metis n_NI_Replace_HomeVsinv__140) done\n }\n\n ultimately show \"invHoldForRule s f r (invariants N)\"\n by satx\nqed\n\nend\n", "meta": {"author": "paraVerifier", "repo": "paraVerifier", "sha": "5de62b433a160bf8d714e0a5085a38b9dd8899f0", "save_path": "github-repos/isabelle/paraVerifier-paraVerifier", "path": "github-repos/isabelle/paraVerifier-paraVerifier/paraVerifier-5de62b433a160bf8d714e0a5085a38b9dd8899f0/proof_scripts/flash/n_flash_lemma_inv__140_on_rules.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO\n\n", "lm_q1_score": 0.5156199157230157, "lm_q2_score": 0.20946968626535545, "lm_q1q2_score": 0.10800674197866911}} {"text": "(*\n * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)\n *\n * SPDX-License-Identifier: GPL-2.0-only\n *)\n\ntheory Dpolicy\nimports\n \"Access.ArchAccess_AC\"\n \"DRefine.Refine_D\"\n \"DBaseRefine.Include_D\"\nbegin\n\n(*\nThis file proves that the authority granted by any abstract state that\nsatisfies the extended invariants agrees with the authority granted by the\ncorresponding capDL state. This result is given by the final lemma in the file,\npas_refined_transform.\n\nMore details of this result and how it is used can be found in Section 6.1 of\n\"Comprehensive Formal Verification of an OS Microkernel\", which can be\ndownloaded from\nhttps://trustworthy.systems/publications/nictaabstracts/Klein_AEMSKH_14.abstract\n*)\n\ncontext begin interpretation Arch . (*FIXME: arch_split*)\n\ndefinition\n cdl_cap_auth_conferred :: \"cdl_cap \\ auth set\"\nwhere\n \"cdl_cap_auth_conferred cap \\\n case cap of\n cdl_cap.NullCap \\ {}\n | cdl_cap.UntypedCap dev refs frange \\ {Control}\n | cdl_cap.EndpointCap oref badge r \\\n cap_rights_to_auth r True\n | cdl_cap.NotificationCap oref badge r \\\n cap_rights_to_auth (r - {AllowGrant, AllowGrantReply}) False\n | cdl_cap.ReplyCap oref r \\ reply_cap_rights_to_auth False r\n | cdl_cap.MasterReplyCap oref \\ UNIV\n | cdl_cap.CNodeCap oref bits guard sz \\ {Control}\n | cdl_cap.TcbCap obj_ref \\ {Control}\n | cdl_cap.DomainCap \\ {Control}\n | cdl_cap.PendingSyncSendCap oref badge call grant grant_reply fault \\\n {SyncSend} \\ (if grant then {Types.Grant, Call} else {})\n \\ (if grant_reply then {Call} else {})\n | cdl_cap.PendingSyncRecvCap oref fault grant \\\n (if fault then {} else {Receive}) \\ (if grant then {Types.Grant} else {})\n | cdl_cap.PendingNtfnRecvCap oref \\ {Receive}\n | cdl_cap.RestartCap \\ {}\n | cdl_cap.IrqControlCap \\ {Control}\n | cdl_cap.IrqHandlerCap irq \\ {Control}\n | cdl_cap.FrameCap dev oref r sz is_real asid \\ vspace_cap_rights_to_auth r\n | cdl_cap.PageTableCap oref is_real asid\\ {Control}\n | cdl_cap.PageDirectoryCap oref is_real asid \\ {Control}\n | cdl_cap.AsidControlCap \\ {Control}\n | cdl_cap.AsidPoolCap oref asid \\ {Control}\n | cdl_cap.ZombieCap ptr \\ {Control}\n | cdl_cap.BoundNotificationCap word \\ {Receive, Reset}\n | _ \\ {}\"\n\nfun\n cdl_obj_refs :: \"cdl_cap \\ obj_ref set\"\nwhere\n \"cdl_obj_refs cdl_cap.NullCap = {}\"\n| \"cdl_obj_refs (cdl_cap.UntypedCap dev rs frange) = rs\"\n| \"cdl_obj_refs (cdl_cap.EndpointCap r b cr) = {r}\"\n| \"cdl_obj_refs (cdl_cap.NotificationCap r b cr) = {r}\"\n| \"cdl_obj_refs (cdl_cap.ReplyCap r cr) = {r}\"\n| \"cdl_obj_refs (cdl_cap.MasterReplyCap r) = {r}\"\n| \"cdl_obj_refs (cdl_cap.CNodeCap r guard bits sz) = {r}\"\n| \"cdl_obj_refs (cdl_cap.TcbCap r) = {r}\"\n| \"cdl_obj_refs (cdl_cap.DomainCap) = UNIV\"\n| \"cdl_obj_refs (cdl_cap.PendingSyncSendCap r badge call grant grant_reply fault) = {r}\"\n| \"cdl_obj_refs (cdl_cap.PendingSyncRecvCap r grant fault) = {r}\"\n| \"cdl_obj_refs (cdl_cap.PendingNtfnRecvCap r) = {r}\"\n| \"cdl_obj_refs cdl_cap.RestartCap = {}\"\n| \"cdl_obj_refs cdl_cap.IrqControlCap = {}\"\n| \"cdl_obj_refs (cdl_cap.IrqHandlerCap irq) = {}\"\n| \"cdl_obj_refs (cdl_cap.FrameCap dev x rs sz is_real asid) = ptr_range x sz\"\n| \"cdl_obj_refs (cdl_cap.PageDirectoryCap x is_real asid) = {x}\"\n| \"cdl_obj_refs (cdl_cap.PageTableCap x is_real asid) = {x}\"\n| \"cdl_obj_refs (cdl_cap.AsidPoolCap p asid) = {p}\"\n| \"cdl_obj_refs cdl_cap.AsidControlCap = {}\"\n| \"cdl_obj_refs (cdl_cap.ZombieCap ptr) = {ptr}\"\n| \"cdl_obj_refs (cdl_cap.BoundNotificationCap word) = {word}\"\n| \"cdl_obj_refs _ = {}\"\n\ninductive cdl_cap_is_transferable for opt_cap\nwhere\n cdl_it_None: \"opt_cap = None \\ cdl_cap_is_transferable opt_cap\" |\n cdl_it_Null: \"opt_cap = Some cdl_cap.NullCap \\ cdl_cap_is_transferable opt_cap\" |\n cdl_it_Reply: \"opt_cap = Some (cdl_cap.ReplyCap t R) \\ cdl_cap_is_transferable opt_cap\"\n\ninductive_set\n cdl_state_bits_to_policy for caps cdt\nwhere\n csbta_caps: \"\\ caps ptr = Some cap; oref \\ cdl_obj_refs cap;\n auth \\ cdl_cap_auth_conferred cap \\\n \\ (fst ptr, auth, oref) \\ cdl_state_bits_to_policy caps cdt\"\n| csbta_cdt: \"\\ cdt slot' = Some slot; \\cdl_cap_is_transferable (caps slot') \\\n \\ (fst slot, Control, fst slot') \\ cdl_state_bits_to_policy caps cdt\"\n| csbta_cdt_transferable: \"\\ cdt slot' = Some slot \\\n \\ (fst slot, DeleteDerived, fst slot') \\ cdl_state_bits_to_policy caps cdt\"\n\ndefinition\n \"cdl_state_objs_to_policy s = cdl_state_bits_to_policy (\\ref. opt_cap ref s)\n (cdl_cdt s)\"\n\nfun\n cdl_cap_irqs_controlled :: \"cdl_cap \\ cdl_irq set\"\nwhere\n \"cdl_cap_irqs_controlled cdl_cap.IrqControlCap = UNIV\"\n | \"cdl_cap_irqs_controlled (cdl_cap.IrqHandlerCap irq) = {irq}\"\n | \"cdl_cap_irqs_controlled _ = {}\"\n\ninductive_set\n cdl_state_irqs_to_policy_aux for aag caps\nwhere\n csita_controlled: \"\\ caps ref = Some cap; irq \\ cdl_cap_irqs_controlled cap \\\n \\ (pasObjectAbs aag (fst ref), Control, pasIRQAbs aag irq) \\\n cdl_state_irqs_to_policy_aux aag caps\"\n\nabbreviation\n \"cdl_state_irqs_to_policy aag s \\ cdl_state_irqs_to_policy_aux aag\n (\\ref. opt_cap ref s)\"\n\ndefinition\n transform_asid_rev :: \"cdl_asid \\ asid\"\nwhere\n \"transform_asid_rev asid = (of_nat (fst asid) << asid_low_bits) + of_nat (snd asid)\"\n\nfun\n cdl_cap_asid' :: \"cdl_cap \\ asid set\"\nwhere\n \"cdl_cap_asid' (Types_D.FrameCap _ _ _ _ _ asid) = (transform_asid_rev o fst) ` set_option asid\"\n | \"cdl_cap_asid' (Types_D.PageTableCap _ _ asid) = (transform_asid_rev o fst) ` set_option asid\"\n | \"cdl_cap_asid' (Types_D.PageDirectoryCap _ _ asid) = transform_asid_rev ` set_option asid\"\n | \"cdl_cap_asid' (Types_D.AsidPoolCap _ asid) =\n {x. fst (transform_asid x) = asid \\ x \\ 0}\"\n | \"cdl_cap_asid' (Types_D.AsidControlCap) = UNIV\"\n | \"cdl_cap_asid' _ = {}\"\n\ndefinition\n is_null_cap :: \"cdl_cap \\ bool\"\nwhere\n \"is_null_cap cap \\ case cap of\n cdl_cap.NullCap \\ True\n | _ \\ False\"\n\ninductive_set\n cdl_state_asids_to_policy_aux for aag caps asid_tab\nwhere\n csata_asid: \"\\ caps ptr = Some cap; asid \\ cdl_cap_asid' cap \\ \\\n (pasObjectAbs aag (fst ptr), Control, pasASIDAbs aag asid) \\\n cdl_state_asids_to_policy_aux aag caps asid_tab\"\n | csata_asid_lookup: \"\\ asid_tab (fst (transform_asid asid)) = Some poolcap;\n \\ is_null_cap poolcap; \\ is_null_cap pdcap; pdptr = cap_object pdcap;\n caps (cap_object poolcap, snd (transform_asid asid)) = Some pdcap \\ \\\n (pasASIDAbs aag asid, Control, pasObjectAbs aag pdptr) \\\n cdl_state_asids_to_policy_aux aag caps asid_tab\"\n | csata_asidpool: \"\\ asid_tab (fst (transform_asid asid)) = Some poolcap;\n \\ is_null_cap poolcap; asid \\ 0 \\ \\\n (pasObjectAbs aag (cap_object poolcap), AAuth ASIDPoolMapsASID, pasASIDAbs aag asid) \\\n cdl_state_asids_to_policy_aux aag caps asid_tab\"\n\nabbreviation\n \"cdl_state_asids_to_policy aag s \\ cdl_state_asids_to_policy_aux aag\n (\\ref. opt_cap ref s) (cdl_asid_table s)\"\n\ndefinition\n \"cdl_irq_map_wellformed_aux aag irqs \\\n \\irq. pasObjectAbs aag (irqs irq) = pasIRQAbs aag irq\"\n\nabbreviation\n \"cdl_irq_map_wellformed aag s \\ cdl_irq_map_wellformed_aux aag (cdl_irq_node s)\"\n\ninductive_set\n cdl_domains_of_state_aux for cdl_heap\nwhere\n domtcbs: \"\\ cdl_heap ptr = Some (Tcb cdl_tcb);\n d = cdl_tcb_domain cdl_tcb\\\n \\ (ptr, d) \\ cdl_domains_of_state_aux cdl_heap\" |\n domidle: \"(idle_thread_ptr, default_domain) \\ cdl_domains_of_state_aux cdl_heap\"\n\nabbreviation\n \"cdl_domains_of_state s \\ cdl_domains_of_state_aux (cdl_objects s)\"\n\ndefinition\n \"cdl_tcb_domain_map_wellformed_aux aag tcbs_doms \\\n \\(ptr, d) \\ tcbs_doms. pasObjectAbs aag ptr \\ pasDomainAbs aag d\"\n\nabbreviation\n \"cdl_tcb_domain_map_wellformed aag s \\\n cdl_tcb_domain_map_wellformed_aux aag (cdl_domains_of_state s)\"\n\ndefinition\n pcs_refined :: \"'a PAS \\ cdl_state \\ bool\"\nwhere\n \"pcs_refined aag s \\\n pas_wellformed aag\n \\ cdl_irq_map_wellformed aag s\n \\ cdl_tcb_domain_map_wellformed aag s\n \\ auth_graph_map (pasObjectAbs aag) (cdl_state_objs_to_policy s) \\ (pasPolicy aag)\n \\ cdl_state_asids_to_policy aag s \\ pasPolicy aag\n \\ cdl_state_irqs_to_policy aag s \\ pasPolicy aag\"\n\nlemmas cdl_state_objs_to_policy_mem = eqset_imp_iff[OF cdl_state_objs_to_policy_def]\n\nlemmas cdl_state_objs_to_policy_intros\n = cdl_state_bits_to_policy.intros[THEN cdl_state_objs_to_policy_mem[THEN iffD2]]\n\nlemmas csta_caps = cdl_state_objs_to_policy_intros(1)\n and csta_cdt = cdl_state_objs_to_policy_intros(2)\n\nlemmas cdl_state_objs_to_policy_cases\n = cdl_state_bits_to_policy.cases[OF cdl_state_objs_to_policy_mem[THEN iffD1]]\n\nlemma transform_asid_rev [simp]:\n \"asid \\ 2 ^ ARM_A.asid_bits - 1 \\ transform_asid_rev (transform_asid asid) = asid\"\n apply (clarsimp simp:transform_asid_def transform_asid_rev_def\n asid_high_bits_of_def ARM_A.asid_low_bits_def)\n apply (subgoal_tac \"asid >> 10 < 2 ^ asid_high_bits\")\n apply (simp add:ARM_A.asid_high_bits_def ARM_A.asid_bits_def)\n apply (subst ucast_ucast_len)\n apply simp\n apply (subst shiftr_shiftl1)\n apply simp\n apply (subst ucast_ucast_mask)\n apply (simp add:mask_out_sub_mask)\n apply (simp add:ARM_A.asid_high_bits_def)\n apply (rule shiftr_less_t2n[where m=7, simplified])\n apply (simp add:ARM_A.asid_bits_def)\n done\n\nabbreviation\n \"valid_asid_mapping mapping \\ (case mapping of\n None \\ True\n | Some (asid, ref) \\ asid \\ 2 ^ ARM_A.asid_bits - 1)\"\n\nlemma transform_asid_rev_transform_mapping [simp]:\n \"valid_asid_mapping mapping \\\n (transform_asid_rev o fst) ` set_option (transform_mapping mapping) = fst ` set_option mapping\"\n apply (simp add:transform_mapping_def map_option_case)\n apply (case_tac mapping)\n apply clarsimp+\n done\n\nlemma fst_transform_cslot_ptr:\n \"fst ptr = fst (transform_cslot_ptr ptr)\"\n apply (case_tac ptr)\n apply (clarsimp simp:transform_cslot_ptr_def)\n done\n\ndefinition\n transform_cslot_ptr_rev :: \"cdl_cap_ref \\ cslot_ptr\"\nwhere\n \"transform_cslot_ptr_rev \\ \\(a, b). (a, the (nat_to_bl word_bits b))\"\n\nlemma transform_cslot_pre_onto:\n \"snd ptr < 2 ^ word_bits \\ \\ptr'. ptr = transform_cslot_ptr ptr'\"\n apply (rule_tac x=\"transform_cslot_ptr_rev ptr\" in exI)\n apply (case_tac ptr)\n apply (clarsimp simp: transform_cslot_ptr_def transform_cslot_ptr_rev_def)\n apply (clarsimp simp: nat_to_bl_def bin_bl_bin' bintrunc_mod2p)\n done\n\ndefinition\n is_thread_state_cap :: \"cdl_cap \\ bool\"\nwhere\n \"is_thread_state_cap cap \\ case cap of\n cdl_cap.PendingSyncSendCap _ _ _ _ _ _ \\ True\n | cdl_cap.PendingSyncRecvCap _ _ _ \\ True\n | cdl_cap.PendingNtfnRecvCap _ \\ True\n | cdl_cap.RestartCap \\ True\n | cdl_cap.RunningCap \\ True\n | _ \\ False\"\n\ndefinition\n is_bound_ntfn_cap :: \"cdl_cap \\ bool\"\nwhere\n \"is_bound_ntfn_cap cap \\ case cap of\n BoundNotificationCap a \\ True\n | _ \\ False\"\n\ndefinition\n is_real_cap :: \"cdl_cap \\ bool\"\nwhere\n \"is_real_cap cap \\ case cap of\n cdl_cap.FrameCap _ _ _ _ Fake _ \\ False\n | cdl_cap.PageTableCap _ Fake _ \\ False\n | cdl_cap.PageDirectoryCap _ Fake _ \\ False\n | _ \\ True\"\n\nlemma is_real_cap_transform:\n \"cap = transform_cap cap' \\ is_real_cap cap\"\n by (auto simp:transform_cap_def is_real_cap_def split:cap.splits arch_cap.splits)\n\nlemma is_real_cap_infer_tcb_pending_op:\n \"is_real_cap (infer_tcb_pending_op a tcb)\"\n by (auto simp:infer_tcb_pending_op_def is_real_cap_def split:Structures_A.thread_state.splits)\n\nlemma is_real_cap_infer_tcb_bound_notification:\n \"is_real_cap (infer_tcb_bound_notification a)\"\n by (auto simp: infer_tcb_bound_notification_def is_real_cap_def split: cdl_cap.splits option.splits)\n\ndefinition\n is_untyped_cap :: \"cdl_cap \\ bool\"\nwhere\n \"is_untyped_cap cap \\ case cap of\n cdl_cap.UntypedCap _ _ _ \\ True\n | _ \\ False\"\n\nlemma valid_sched_etcbs[elim]:\n \"valid_sched s \\ valid_etcbs s\"\n by (simp add: valid_sched_def)\n\nlemma caps_of_state_transform_opt_cap_rev:\n \"\\ einvs s; opt_cap ptr (transform s) = Some cap;\n is_real_cap cap; \\ is_thread_state_cap cap; \\ is_null_cap cap; \\ is_bound_ntfn_cap cap \\ \\\n \\cap' ptr'. cap = transform_cap cap' \\ ptr = transform_cslot_ptr ptr' \\\n caps_of_state s ptr' = Some cap'\"\n apply clarify\n apply (drule invs_valid_objs)\n apply (case_tac ptr)\n apply (clarsimp simp:opt_cap_def transform_def transform_objects_def\n transform_cslot_ptr_def slots_of_def)\n apply (rule_tac P=\"a=idle_thread s\" in case_split)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s a\")\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (clarsimp simp:valid_objs_def dom_def)\n apply (drule_tac x=a in spec, clarsimp)\n apply (case_tac aa, simp_all add: object_slots_def caps_of_state_def2 nat_split_conv_to_if\n split: if_split_asm)\n apply (clarsimp simp:valid_obj_def valid_cs_def valid_cs_size_def)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (rule_tac x=z in exI, simp)\n apply (rule_tac x=\"the (nat_to_bl 0 b)\" in exI)\n apply (clarsimp simp:option_map_join_def split:option.splits)\n apply (rule nat_to_bl_to_bin, simp+)\n apply (clarsimp simp:valid_obj_def valid_cs_def valid_cs_size_def)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (rule_tac x=z in exI, simp)\n apply (rename_tac n list cap')\n apply (rule_tac x=\"the (nat_to_bl n b)\" in exI)\n apply (clarsimp simp:option_map_join_def split:option.splits)\n apply (rule nat_to_bl_to_bin, simp+)\n apply (drule valid_etcbs_tcb_etcb [rotated], fastforce)\n apply clarsimp\n apply (clarsimp simp:transform_tcb_def tcb_slot_defs split:if_split_asm)\n apply (clarsimp simp: is_null_cap_def is_bound_ntfn_cap_def infer_tcb_bound_notification_def\n split: option.splits)\n apply (simp add:is_thread_state_cap_def infer_tcb_pending_op_def is_null_cap_def is_real_cap_def\n split:Structures_A.thread_state.splits option.splits)\n apply (rule exI, rule conjI, simp, rule exI, rule conjI,\n (rule bl_to_bin_tcb_cnode_index | rule bl_to_bin_tcb_cnode_index[symmetric]),\n simp, simp add:tcb_cap_cases_def)+\n apply (rule exI, rule conjI, simp)\n apply (rule_tac x=\"tcb_cnode_index 0\" in exI)\n apply (subst bl_to_bin_tcb_cnode_index_le0; simp)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp)\n apply (clarsimp simp:transform_asid_pool_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:is_real_cap_def is_null_cap_def transform_asid_pool_entry_def\n split:option.splits)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:is_real_cap_def is_null_cap_def transform_pte_def\n split:ARM_A.pte.splits)\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:is_real_cap_def is_null_cap_def transform_pde_def\n split:ARM_A.pde.splits)\n done\n\nabbreviation\n \"get_size cap \\ case cap of\n cdl_cap.FrameCap _ _ _ sz _ _ \\ sz\n | cdl_cap.PageTableCap _ _ _ \\ 0\"\n\nlemma opt_cap_None_word_bits:\n \"\\ einvs s; snd ptr \\ 2 ^ word_bits \\ \\ opt_cap ptr (transform s) = None\"\n apply (case_tac ptr)\n apply (clarsimp simp:opt_cap_def transform_def transform_objects_def slots_of_def)\n apply (rule_tac P=\"a=idle_thread s\" in case_split)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s a\")\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (drule invs_valid_objs)\n apply (simp add:object_slots_def valid_objs_def)\n apply (case_tac aa, simp_all add: nat_split_conv_to_if\n split: if_split_asm)\n apply (clarsimp simp:transform_cnode_contents_def object_slots_def)\n apply (drule_tac x=a in bspec)\n apply (simp add:dom_def)+\n apply (clarsimp simp:valid_obj_def valid_cs_def valid_cs_size_def)\n apply (rule conjI)\n apply (clarsimp simp:option_map_join_def nat_to_bl_def)\n apply (metis gr0I le_antisym less_eq_Suc_le less_eq_nat.simps(1)\n lt_word_bits_lt_pow zero_less_Suc)\n apply (clarsimp simp:option_map_join_def nat_to_bl_def)\n apply (drule not_le_imp_less)\n apply (subgoal_tac \"b < 2 ^ word_bits\")\n apply simp\n apply (rule less_trans)\n apply simp\n apply (rule power_strict_increasing, simp+)\n apply (frule valid_etcbs_tcb_etcb[rotated], fastforce)\n apply (clarsimp simp:transform_tcb_def tcb_slot_defs word_bits_def)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp)\n apply (simp add:transform_asid_pool_contents_def transform_page_table_contents_def\n transform_page_directory_contents_def unat_map_def word_bits_def)+\n done\n\nlemma opt_cap_Some_rev:\n \"\\ einvs s; opt_cap ptr (transform s) = Some cap \\ \\ \\ptr'. ptr = transform_cslot_ptr ptr'\"\n apply (rule transform_cslot_pre_onto)\n apply (subst not_le[symmetric])\n apply (rule notI)\n apply (drule_tac ptr=ptr in opt_cap_None_word_bits; simp)\n done\n\nlemma obj_refs_transform:\n \"\\ (\\x sz i dev. cap = cap.UntypedCap dev x sz i) \\ obj_refs_ac cap = cdl_obj_refs (transform_cap cap)\"\n apply (case_tac cap; clarsimp)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; clarsimp)\n done\n\nlemma untyped_range_transform:\n \"(\\x sz i dev. cap = cap.UntypedCap dev x sz i) \\ untyped_range cap = cdl_obj_refs (transform_cap cap)\"\n by auto\n\nlemma cap_auth_conferred_transform:\n \"cap_auth_conferred cap = cdl_cap_auth_conferred (transform_cap cap)\"\n apply (case_tac cap;\n clarsimp simp: cap_auth_conferred_def arch_cap_auth_conferred_def\n cdl_cap_auth_conferred_def reply_cap_rights_to_auth_def)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; clarsimp simp: is_page_cap_def)\n done\n\nlemma thread_st_auth_transform:\n \"\\ einvs s; (oref', auth) \\ thread_st_auth s oref \\ \\\n (oref, auth, oref') \\ cdl_state_objs_to_policy (transform s)\"\n apply clarify\n apply (simp add:thread_st_auth_def tcb_states_of_state_def)\n apply (cases \"get_tcb oref s\")\n apply simp+\n apply (frule valid_etcbs_get_tcb_get_etcb[rotated], fastforce)\n apply clarsimp\n apply (rule_tac cap=\"infer_tcb_pending_op oref (tcb_state a)\" in csta_caps[where ptr=\"(oref, 5)\"\n and auth=auth and oref=oref' and s=\"transform s\", simplified])\n apply (rule opt_cap_tcb[where sl=5, unfolded tcb_slot_defs, simplified])\n apply simp\n apply simp\n apply (rule notI, drule invs_valid_idle, simp add:valid_idle_def pred_tcb_def2)\n apply (simp add:infer_tcb_pending_op_def, case_tac \"tcb_state a\";\n fastforce split:if_splits)\n apply (simp add:infer_tcb_pending_op_def cdl_cap_auth_conferred_def, case_tac \"tcb_state a\";\n fastforce split:if_splits)\n done\n\nlemma thread_bound_ntfns_transform:\n \"\\ einvs s; thread_bound_ntfns s oref = Some oref'; auth \\ {Receive, Reset} \\ \\\n (oref, auth, oref') \\ cdl_state_objs_to_policy (transform s)\"\n apply clarify\n apply (simp add: thread_bound_ntfns_def )\n apply (cases \"get_tcb oref s\")\n apply simp+\n apply (frule valid_etcbs_get_tcb_get_etcb[rotated], fastforce)\n apply clarsimp\n apply (rule_tac cap=\"infer_tcb_bound_notification (tcb_bound_notification a)\" in csta_caps[where ptr=\"(oref, tcb_boundntfn_slot)\"\n and auth=auth and oref=oref' and s=\"transform s\", simplified])\n apply (unfold tcb_boundntfn_slot_def)\n apply (rule opt_cap_tcb[where sl=6, unfolded tcb_boundntfn_slot_def tcb_pending_op_slot_def tcb_slot_defs, simplified])\n apply simp\n apply simp\n apply (rule notI, drule invs_valid_idle, simp add:valid_idle_def pred_tcb_def2)\n apply (clarsimp simp: infer_tcb_bound_notification_def cdl_cap_auth_conferred_def)+\n done\n\nlemma thread_state_cap_transform_tcb:\n \"\\ opt_cap ptr (transform s) = Some cap; is_thread_state_cap cap \\ \\\n \\tcb. get_tcb (fst ptr) s = Some tcb\"\n apply (case_tac ptr)\n apply (simp add:opt_cap_def slots_of_def transform_def transform_objects_def)\n apply (rule_tac P=\"a = idle_thread s\" in case_split)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s (fst ptr)\")\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (simp add:get_tcb_def object_slots_def)\n apply (case_tac aa, simp_all add: nat_split_conv_to_if\n split: if_split_asm)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (case_tac z, simp_all add:is_thread_state_cap_def split:if_split_asm)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; simp)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (case_tac z, simp_all add:is_thread_state_cap_def split:if_split_asm)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; simp)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp)\n apply (clarsimp simp:transform_asid_pool_contents_def unat_map_def transform_asid_pool_entry_def\n split:if_split_asm option.splits)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def transform_pte_def\n split:if_split_asm ARM_A.pte.splits)\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def transform_pde_def\n split:if_split_asm ARM_A.pde.splits)\n done\n\n\nlemma not_is_bound_ntfn_cap_transform_cap[simp]: \"\\is_bound_ntfn_cap (transform_cap cn)\"\n apply (case_tac cn; simp add: is_bound_ntfn_cap_def)\n apply (rename_tac foo)\n apply (case_tac foo; simp)\ndone\n\nlemma thread_bound_ntfn_cap_transform_tcb:\n \"\\ opt_cap ptr (transform s) = Some cap; is_bound_ntfn_cap cap \\ \\\n \\tcb. get_tcb (fst ptr) s = Some tcb\"\n apply (case_tac ptr)\n apply (simp add:opt_cap_def slots_of_def transform_def transform_objects_def)\n apply (rule_tac P=\"a = idle_thread s\" in case_split)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s (fst ptr)\")\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (simp add:get_tcb_def object_slots_def)\n apply (case_tac aa, simp_all)\n apply (case_tac x11; simp)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (clarsimp simp:transform_cnode_contents_def)\n apply (rename_tac arch_obj)\n apply (case_tac arch_obj;clarsimp simp:transform_asid_pool_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:transform_asid_pool_entry_def is_bound_ntfn_cap_def split:option.splits)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def transform_pte_def is_bound_ntfn_cap_def\n split:if_split_asm ARM_A.pte.splits)\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def transform_pde_def is_bound_ntfn_cap_def\n split:if_split_asm ARM_A.pde.splits)\n done\n\n\nlemma thread_st_auth_transform_rev:\n \"\\ einvs s; opt_cap ptr (transform s) = Some cap; is_thread_state_cap cap;\n oref \\ cdl_obj_refs cap; auth \\ cdl_cap_auth_conferred cap; (fst ptr) \\ idle_thread s \\ \\\n (oref, auth) \\ thread_st_auth s (fst ptr)\"\n apply (frule thread_state_cap_transform_tcb, simp)\n apply (case_tac ptr)\n apply (clarsimp simp:thread_st_auth_def tcb_states_of_state_def)\n apply (frule valid_etcbs_get_tcb_get_etcb[rotated], fastforce)\n apply (frule_tac sl=b in opt_cap_tcb, assumption, simp)\n apply (clarsimp split:if_split_asm)\n apply (case_tac \"aa tcb\"; simp add:is_thread_state_cap_def split:if_split_asm)\n apply (rename_tac arch_cap)\n apply (case_tac \"arch_cap\"; simp split:if_split_asm)\n apply (case_tac \"tcb_state tcb\";\n fastforce simp:cdl_cap_auth_conferred_def split:option.splits if_splits)\n apply (fastforce simp:is_thread_state_cap_def infer_tcb_pending_op_def\n infer_tcb_bound_notification_def\n split:option.splits if_splits)\n done\n\nlemma thread_bound_ntfns_transform_rev:\n \"\\ einvs s; opt_cap ptr (transform s) = Some cap; is_bound_ntfn_cap cap;\n oref \\ cdl_obj_refs cap; auth \\ cdl_cap_auth_conferred cap; (fst ptr) \\ idle_thread s \\ \\\n thread_bound_ntfns s (fst ptr) = Some oref\"\n apply (frule thread_bound_ntfn_cap_transform_tcb, simp)\n apply (case_tac ptr)\n apply (clarsimp simp:thread_bound_ntfns_def)\n apply (frule valid_etcbs_get_tcb_get_etcb[rotated], fastforce)\n apply (frule_tac sl=b in opt_cap_tcb, assumption, simp)\n apply (clarsimp split:if_split_asm)\n apply (case_tac \"tcb\"; simp add:is_thread_state_cap_def is_bound_ntfn_cap_def split:if_split_asm)\n apply (rename_tac arch_cap)\n apply (case_tac \"arch_cap\", simp_all split:if_split_asm)\n apply (clarsimp simp: infer_tcb_pending_op_def split: Structures_A.thread_state.splits)\n apply (case_tac \"tcb_bound_notification tcb\",\n auto simp: infer_tcb_pending_op_def cdl_cap_auth_conferred_def\n infer_tcb_bound_notification_def\n split: option.splits)\n done\n\nlemma idle_thread_null_cap:\n \"\\ invs s; caps_of_state s ptr = Some cap; fst ptr = idle_thread s \\ \\ cap = cap.NullCap\"\n apply (rule_tac s=s and v=\"snd ptr\" in valid_idle_has_null_cap,\n (simp add:invs_def valid_state_def)+)\n apply (drule_tac s=\"fst x\" for x in sym, simp)\n done\n\nlemma idle_thread_no_authority:\n \"\\ invs s; caps_of_state s ptr = Some cap; auth \\ cap_auth_conferred cap \\ \\\n fst ptr \\ idle_thread s\"\n apply (rule notI)\n apply (drule idle_thread_null_cap, simp+)\n apply (simp add:cap_auth_conferred_def)\n done\n\nlemma idle_thread_no_untyped_range:\n \"\\ invs s; caps_of_state s ptr = Some cap; auth \\ untyped_range cap \\ \\ fst ptr \\ idle_thread s\"\n apply (rule notI)\n apply (drule idle_thread_null_cap, simp+)\n done\n\nlemma fst':\n \"(a :: cdl_object_id) = fst (a, b)\"\n apply simp\n done\n\nlemma opt_cap_pt_Some':\n \"\\ valid_idle s; kheap s a = Some (ArchObj (arch_kernel_obj.PageTable fun)) \\\n \\ (opt_cap (a, unat slot) (transform s)) = Some (transform_pte (fun slot))\"\n apply (clarsimp simp:opt_cap_def transform_def slots_of_def object_slots_def\n transform_objects_def map_add_def restrict_map_def not_idle_thread_def)\n apply (frule arch_obj_not_idle,simp)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def not_idle_thread_def)\n apply (rule unat_lt2p[where 'a=8, simplified])\n done\n\nlemma pte_cdl_obj_refs:\n \"\\ pte_ref pte = Some (a, b, c); ptr \\ ptr_range a b \\ \\\n ptr \\ cdl_obj_refs (transform_pte pte)\"\n apply (case_tac pte; simp add: pte_ref_def transform_pte_def)\n done\n\nlemma pte_cdl_cap_auth_conferred:\n \"\\ pte_ref pte = Some (a, b, c); auth \\ c \\ \\\n auth \\ cdl_cap_auth_conferred (transform_pte pte)\"\n apply (case_tac pte; simp add: pte_ref_def transform_pte_def cdl_cap_auth_conferred_def)\n done\n\nlemma opt_cap_pd_Some':\n \"\\ valid_idle s; kheap s a = Some (ArchObj (arch_kernel_obj.PageDirectory fun));\n slot < ucast (kernel_base >> 20) \\ \\\n (opt_cap (a, unat slot) (transform s)) = Some (transform_pde (fun slot))\"\n apply (clarsimp simp:opt_cap_def transform_def slots_of_def object_slots_def\n transform_objects_def restrict_map_def map_add_def not_idle_thread_def)\n apply (frule arch_obj_not_idle,simp)\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def not_idle_thread_def\n kernel_pde_mask_def word_not_le[symmetric])\n apply (rule unat_lt2p[where 'a=\"12\", simplified])\n done\n\nlemma pde_cdl_obj_refs:\n \"\\ pde_ref2 pde = Some (a, b, c); ptr \\ ptr_range a b \\ \\\n ptr \\ cdl_obj_refs (transform_pde pde)\"\n apply (case_tac pde; simp add: pde_ref2_def transform_pde_def ptr_range_def)\n done\n\nlemma pde_cdl_cap_auth_conferred:\n \"\\ pde_ref2 pde = Some (a, b, c); auth \\ c \\ \\\n auth \\ cdl_cap_auth_conferred (transform_pde pde)\"\n apply (case_tac pde; simp add: pde_ref2_def transform_pde_def cdl_cap_auth_conferred_def)\n done\n\nlemma state_vrefs_transform:\n \"\\ invs s; ptr \\ idle_thread s; (ptr', ref, aat, auth) \\ state_vrefs s ptr \\ \\\n (ptr, auth, ptr') \\ cdl_state_objs_to_policy (transform s)\"\n apply (simp add:state_vrefs_def, case_tac \"kheap s ptr\", simp+)\n apply (case_tac a, simp_all add:vs_refs_no_global_pts_def)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp add: vs_refs_no_global_pts_def)\n apply (clarsimp simp:graph_of_def)\n apply (subst fst')\n apply (rule csta_caps)\n apply (drule_tac asid=\"ucast aa\" in opt_cap_asid_pool_Some[rotated])\n apply (simp add:invs_valid_idle)\n apply (simp add:ucast_up_ucast_id is_up_def source_size_def target_size_def word_size)\n apply (simp add:transform_asid_pool_entry_def)\n apply (simp add:transform_asid_pool_entry_def cdl_cap_auth_conferred_def)\n apply (clarsimp simp:graph_of_def)\n apply (subst fst')\n apply (rule csta_caps)\n apply (drule_tac slot=aa in opt_cap_pt_Some'[rotated])\n apply (simp add:invs_valid_idle)\n apply simp\n apply (rule_tac a=ab and b=ac and c=b in pte_cdl_obj_refs, simp+)\n apply (rule_tac a=ab and b=ac and c=b in pte_cdl_cap_auth_conferred, simp+)\n apply (erule bexE)\n apply (clarsimp simp:graph_of_def)\n apply (subst fst')\n apply (rule csta_caps)\n apply (drule_tac slot=aa in opt_cap_pd_Some'[rotated])\n apply (simp add:word_not_le[symmetric])\n apply (simp add:invs_valid_idle)\n apply simp\n apply (rule_tac a=ab and b=ac and c=b in pde_cdl_obj_refs, simp+)\n apply (rule_tac a=ab and b=ac and c=b in pde_cdl_cap_auth_conferred, simp+)\n done\n\nlemma pte_ref_transform_rev:\n \"ptr' \\ cdl_obj_refs (transform_pte pte) \\\n pte_ref pte = Some (cap_object (transform_pte pte), get_size (transform_pte pte),\n cdl_cap_auth_conferred (transform_pte pte)) \\\n ptr' \\ ptr_range (cap_object (transform_pte pte)) (get_size (transform_pte pte))\"\n apply (case_tac pte)\n apply (simp_all add:pte_ref_def transform_pte_def\n vspace_cap_rights_to_auth_def cdl_cap_auth_conferred_def)\n done\n\nlemma pde_ref_transform_rev:\n \"ptr' \\ cdl_obj_refs (transform_pde pde) \\\n pde_ref2 pde = Some (cap_object (transform_pde pde), get_size (transform_pde pde),\n cdl_cap_auth_conferred (transform_pde pde)) \\\n ptr' \\ ptr_range (cap_object (transform_pde pde)) (get_size (transform_pde pde))\"\n apply (case_tac pde)\n apply (simp_all add:pde_ref2_def transform_pde_def ptr_range_def\n vspace_cap_rights_to_auth_def cdl_cap_auth_conferred_def)\n done\n\nlemma state_vrefs_transform_rev:\n \"\\ einvs s; opt_cap ptr (transform s) = Some cap; ptr' \\ cdl_obj_refs cap;\n auth \\ cdl_cap_auth_conferred cap; \\ is_real_cap cap \\ \\\n \\ref aat. (ptr', ref, aat, auth) \\ state_vrefs s (fst ptr)\"\n apply (case_tac ptr, clarsimp)\n apply (subgoal_tac \"a \\ idle_thread s\")\n prefer 2\n apply (clarsimp simp:state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s a\")\n apply (clarsimp simp: state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (clarsimp simp:state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (case_tac aa, simp_all add: transform_object_def object_slots_def nat_split_conv_to_if\n split: if_split_asm)\n apply (clarsimp simp:transform_cnode_contents_def is_real_cap_transform)\n apply (clarsimp simp:transform_cnode_contents_def is_real_cap_transform)\n apply (frule valid_etcbs_tcb_etcb [rotated], fastforce)\n apply (clarsimp simp: transform_tcb_def is_real_cap_transform is_real_cap_infer_tcb_pending_op\n is_real_cap_infer_tcb_bound_notification\n split:if_split_asm)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj, simp_all add:vs_refs_no_global_pts_def graph_of_def)\n apply (clarsimp simp:transform_asid_pool_contents_def unat_map_def split:if_split_asm)\n apply (rule exI)\n apply (rename_tac \"fun\")\n apply (case_tac \"fun (of_nat b)\")\n apply (clarsimp simp:transform_asid_pool_entry_def)\n apply (fastforce simp:transform_asid_pool_entry_def cdl_cap_auth_conferred_def)\n apply (clarsimp simp:transform_asid_pool_entry_def)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def split:if_split_asm)\n apply (rule exI)+\n apply (drule pte_ref_transform_rev)\n apply safe[1]\n apply simp\n apply (rule_tac x=\"(ptr', auth)\" in image_eqI)\n apply simp\n apply simp\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def split:if_split_asm)\n apply (subgoal_tac \"(of_nat b :: 12 word) < ucast (kernel_base >> 20)\")\n prefer 2\n apply (subst word_not_le[symmetric])\n apply (rule notI)\n apply (clarsimp simp:kernel_pde_mask_def transform_pde_def)\n apply (simp add:kernel_pde_mask_def not_less[symmetric])\n apply (rule exI)\n apply (drule pde_ref_transform_rev, clarsimp)\n apply fastforce\n done\n\nlemma cdl_cdt_transform_rev:\n \"\\ invs s; cdl_cdt (transform s) slot' = Some slot \\ \\\n \\ptr' ptr. slot' = transform_cslot_ptr ptr' \\ slot = transform_cslot_ptr ptr \\\n cdt s ptr' = Some ptr\"\n apply (clarsimp simp:cdt_transform map_lift_over_def split:if_split_asm)\n apply (rule_tac x=a in exI, rule_tac x=b in exI)\n apply (subst (asm) inv_into_f_f)\n apply (rule subset_inj_on)\n apply (simp add:dom_def)+\n done\n\n(* Prove that transform preserves transferable caps. *)\nlemma cdl_transform_null_cap:\n \"\\ einvs s; caps_of_state s (ptr, slot) = Some cap;\n opt_cap (transform_cslot_ptr (ptr, slot)) (transform s) = Some cdl_cap.NullCap \\ \\\n cap = cap.NullCap\"\n apply (case_tac \"ptr = idle_thread s\")\n apply (clarsimp simp: opt_cap_def slots_of_def\n transform_def transform_cslot_ptr_def transform_objects_def\n map_add_def)\n apply (subst (asm) caps_of_state_transform_opt_cap, assumption)\n apply fastforce\n apply fastforce\n apply (clarsimp simp: transform_cap_def split: cap.splits arch_cap.splits if_splits)\n done\n\nlemma cdl_transform_reply_cap:\n \"\\ einvs s; caps_of_state s (ptr, slot) = Some cap;\n opt_cap (transform_cslot_ptr (ptr, slot)) (transform s) = Some (cdl_cap.ReplyCap t R) \\ \\\n cap = cap.ReplyCap t False R\"\n apply (case_tac \"ptr = idle_thread s\")\n apply (clarsimp simp: opt_cap_def slots_of_def\n transform_def transform_cslot_ptr_def transform_objects_def\n map_add_def)\n apply (subst (asm) caps_of_state_transform_opt_cap, assumption)\n apply fastforce\n apply fastforce\n apply (clarsimp simp: transform_cap_def split: cap.splits arch_cap.splits if_splits)\n done\n\nlemma cdl_transferable_implies_transferable:\n \"\\ einvs s; cdt s (ptr, slot) = Some (pptr, pslot);\n cdl_cap_is_transferable (opt_cap (transform_cslot_ptr (ptr, slot)) (transform s)) \\\n \\ is_transferable_in (ptr, slot) s\"\n apply clarsimp\n apply (frule invs_mdb_cte, drule mdb_cte_at_rewrite, clarsimp simp: mdb_cte_at_def)\n apply ((drule spec)+, erule(1) impE, clarsimp)\n apply (erule cdl_cap_is_transferable.cases)\n apply (erule contrapos_pp[where Q=\"opt_cap _ _ = _\"], clarsimp)\n apply (rule exI)\n apply (rule caps_of_state_transform_opt_cap)\n apply assumption\n apply fastforce\n apply (blast dest: idle_thread_null_cap)\n apply (fastforce dest: cdl_transform_null_cap[rotated])\n apply (fastforce simp: is_transferable.simps dest: cdl_transform_reply_cap[rotated])\n done\n\nlemma state_objs_transform:\n \"\\ einvs s; (x, a, y) \\ state_objs_to_policy s \\ \\\n (x, a, y) \\ cdl_state_objs_to_policy (transform s)\"\n apply (erule state_objs_to_policy_cases)\n apply (simp add:fst_transform_cslot_ptr)\n apply (rule_tac ptr=\"transform_cslot_ptr ptr\" and auth=auth and oref=oref and\n cap=\"transform_cap cap\" and s=\"transform s\" in csta_caps)\n apply (rule caps_of_state_transform_opt_cap)\n apply simp\n apply fastforce\n apply (simp add:idle_thread_no_authority)\n apply (case_tac cap; simp)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; simp)\n apply (simp add:cap_auth_conferred_transform)\n apply (simp add:fst_transform_cslot_ptr)\n apply (rule_tac ptr=\"transform_cslot_ptr ptr\" and auth=Control and oref=oref and\n cap=\"transform_cap cap\" and s=\"transform s\" in csta_caps)\n apply (rule caps_of_state_transform_opt_cap)\n apply simp\n apply fastforce\n apply (simp add:idle_thread_no_untyped_range)\n apply (case_tac cap, (simp add:untyped_range_transform del:untyped_range.simps(1))+)\n apply (case_tac cap, (simp add:cdl_cap_auth_conferred_def)+)\n apply (rule thread_st_auth_transform, simp+)\n apply (rule thread_bound_ntfns_transform, simp+)\n\n apply (simp add:fst_transform_cslot_ptr)\n apply (rule_tac slot=\"transform_cslot_ptr slot\" and slot'=\"transform_cslot_ptr slot'\"\n and s=\"transform s\" in csta_cdt)\n apply (simp add:transform_def)\n apply (rule transform_cdt_some)\n apply (simp add:invs_mdb_cte)\n apply simp\n apply (fastforce intro: cdl_transferable_implies_transferable)\n\n apply (clarsimp split: prod.splits)\n subgoal for slot pslot\n apply (rule cdl_state_objs_to_policy_intros(3)\n [where slot'=\"(y, nat (bl_to_bin slot))\" and slot=\"(x, nat (bl_to_bin pslot))\",\n simplified])\n apply (frule transform_cdt_slot_inj_on_mdb_cte_at[OF invs_mdb_cte])\n apply (clarsimp simp: cdt_transform map_lift_over_def transform_cslot_ptr_def)\n apply safe\n apply (rule_tac x=pslot in exI)\n apply (subst inv_into_f_eq[where x=\"(y, slot)\"])\n apply (fastforce simp: inj_on_def)\n apply blast\n apply simp\n apply blast\n apply blast\n done\n\n apply (subgoal_tac \"ptr \\ idle_thread s\")\n apply (simp add:state_vrefs_transform)\n apply (clarsimp simp:state_vrefs_def vs_refs_no_global_pts_def invs_def valid_state_def\n valid_idle_def pred_tcb_at_def obj_at_def)\n done\n\nlemma state_objs_transform_rev:\n \"\\ einvs s; (x, a, y) \\ cdl_state_objs_to_policy (transform s) \\ \\\n (x, a, y) \\ state_objs_to_policy s\"\n apply (rule cdl_state_objs_to_policy_cases, simp)\n apply (rule_tac P=\"is_thread_state_cap cap\" in case_split)\n apply simp\n apply (rule sta_ts)\n apply (rule thread_st_auth_transform_rev, simp+)\n apply (clarsimp simp:opt_cap_def transform_def transform_objects_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (rule_tac P=\"is_real_cap cap\" in case_split[rotated])\n apply (drule state_vrefs_transform_rev, simp+)\n apply clarsimp\n apply (rule sta_vref)\n apply simp\n apply (subgoal_tac \"\\ is_null_cap cap\")\n prefer 2\n apply (clarsimp simp:is_null_cap_def split:cdl_cap.splits)\n apply (rule_tac P=\"is_bound_ntfn_cap cap\" in case_split)\n apply simp\n apply (rule sta_bas)\n apply (rule thread_bound_ntfns_transform_rev, simp+)\n apply (clarsimp simp: opt_cap_def transform_def transform_objects_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (clarsimp simp: cdl_cap_auth_conferred_def is_bound_ntfn_cap_def split: cdl_cap.splits)\n apply (frule caps_of_state_transform_opt_cap_rev, simp+)\n apply (rule_tac P=\"is_untyped_cap cap\" in case_split)\n apply (subgoal_tac \"a = Control\")\n apply clarsimp\n apply (subst fst_transform_cslot_ptr[symmetric])\n apply (rule_tac cap=cap' in sta_untyped)\n apply simp\n apply (subst (asm) untyped_range_transform[symmetric])\n apply (simp add:is_untyped_cap_def transform_cap_def\n split:cap.splits arch_cap.splits if_split_asm)\n apply simp\n apply (simp add:cdl_cap_auth_conferred_def is_untyped_cap_def split:cdl_cap.splits)\n apply clarsimp\n apply (subst fst_transform_cslot_ptr[symmetric])\n apply (rule_tac cap=cap' in sta_caps)\n apply simp\n apply (subst (asm) obj_refs_transform[symmetric])\n apply (simp add:is_untyped_cap_def transform_cap_def\n split:cap.splits arch_cap.splits if_split_asm)\n apply simp\n apply (simp add:cap_auth_conferred_transform)\n\n apply (drule cdl_cdt_transform_rev [rotated], simp+)\n apply clarsimp\n apply (subst fst_transform_cslot_ptr[symmetric])+\n apply (rule sta_cdt)\n apply simp\n apply (erule contrapos_nn)\n apply (frule invs_mdb_cte, drule mdb_cte_at_rewrite, clarsimp simp: mdb_cte_at_def)\n apply (erule is_transferable.cases)\n apply fastforce\n apply fastforce\n apply ((drule spec)+, erule(1) impE, clarsimp)\n apply (subst caps_of_state_transform_opt_cap)\n apply assumption\n apply fastforce\n apply (blast dest: idle_thread_null_cap)\n apply (clarsimp simp: transform_cap_def)\n apply (blast intro: cdl_cap_is_transferable.intros)\n\n apply clarsimp\n apply (frule(1) cdl_cdt_transform_rev)\n apply (clarsimp simp: transform_cslot_ptr_def)\n apply (erule sta_cdt_transferable\n [where slot=\"(x, slot)\" and slot'=\"(y, slot')\" for slot slot', simplified])\n done\n\nlemma state_vrefs_asidpool_control:\n \"(pdptr, asid, AASIDPool, auth) \\ state_vrefs s poolptr \\ auth = Control\"\n apply (clarsimp simp:state_vrefs_def )\n apply (cases \"kheap s poolptr\")\n apply clarsimp\n apply (simp add: vs_refs_no_global_pts_def, case_tac a; clarsimp)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; clarsimp)\n done\n\nlemma idle_thread_no_asid:\n \"\\ invs s; caps_of_state s ptr = Some cap;\n asid \\ cap_asid' cap \\ \\ fst ptr \\ idle_thread s\"\n apply (rule notI)\n apply (drule idle_thread_null_cap, simp+)\n done\n\nlemma asid_table_entry_transform:\n \"arm_asid_table (arch_state s) (asid_high_bits_of asid) = poolptr \\\n cdl_asid_table (transform s) (fst (transform_asid asid)) =\n Some (transform_asid_table_entry poolptr)\"\n apply (clarsimp simp:transform_def transform_asid_table_def unat_map_def\n transform_asid_table_entry_def transform_asid_def)\n apply (simp add:transform_asid_def asid_high_bits_of_def asid_low_bits_def)\n apply (rule unat_lt2p[where 'a=7, simplified])\n done\n\nlemma transform_asid_high_bits_of:\n \"of_nat (fst (transform_asid asid)) = asid_high_bits_of asid\"\n apply (clarsimp simp:transform_asid_def asid_high_bits_of_def)\n done\n\nlemma transform_asid_high_bits_of':\n \"fst (transform_asid asid) = unat (asid_high_bits_of asid)\"\n apply (clarsimp simp:transform_asid_def asid_high_bits_of_def)\n done\n\nlemma transform_asid_low_bits_of:\n \"of_nat (snd (transform_asid asid)) = (ucast asid :: 10 word)\"\n apply (clarsimp simp:transform_asid_def)\n done\n\nlemma cap_asid'_transform:\n \"\\ invs s; caps_of_state s ptr = Some cap \\ \\ cap_asid' cap = cdl_cap_asid' (transform_cap cap)\"\n supply image_cong_simp [cong del]\n apply (case_tac cap; simp)\n apply (drule caps_of_state_valid, simp)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; simp)\n apply (clarsimp simp:transform_asid_high_bits_of' valid_cap_def split:option.splits)+\n done\n\nlemma state_asids_transform:\n \"\\ einvs s; (x, a, y) \\ state_asids_to_policy aag s \\ \\\n (x, a, y) \\ cdl_state_asids_to_policy aag (transform s)\"\n apply (unfold state_asids_to_policy_arch_def)\n apply (drule state_asids_to_policy_aux.induct)\n prefer 4\n apply simp\n apply (simp add: fst_transform_cslot_ptr)\n apply (rule_tac cap=\"transform_cap (ArchObjectCap acap)\" in csata_asid)\n apply (rule caps_of_state_transform_opt_cap)\n apply simp\n apply fastforce\n apply (clarsimp simp: idle_thread_no_asid)\n apply (fastforce dest: cap_asid'_transform)\n apply (frule state_vrefs_asidpool_control, simp)\n apply (simp add: state_vrefs_def, case_tac \"kheap s poolptr\", simp_all)\n apply (case_tac aa, simp_all add:vs_refs_no_global_pts_def)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj, simp_all add:graph_of_def, safe)\n apply (rule_tac pdcap=\"cdl_cap.PageDirectoryCap b Fake None\" in csata_asid_lookup)\n apply (simp add: asid_table_entry_transform)\n apply (simp add: is_null_cap_def transform_asid_table_entry_def)\n apply (simp add: is_null_cap_def transform_asid_table_entry_def)\n apply (simp add: ucast_up_ucast_id is_up_def source_size_def target_size_def word_size)\n apply (simp add: transform_asid_table_entry_def)\n apply (drule_tac asid=\"asid\" in opt_cap_asid_pool_Some[rotated])\n apply (simp add: invs_valid_idle)\n apply (subst (asm) mask_asid_low_bits_ucast_ucast)\n apply (subst (asm) up_ucast_inj_eq)\n apply simp\n apply (simp add: transform_asid_pool_entry_def)\n apply (cut_tac aag=aag and asid=asid and asid_tab=\"cdl_asid_table (transform s)\" in csata_asidpool)\n apply (clarsimp simp: transform_def transform_asid_table_def unat_map_def)\n apply safe[1]\n apply (simp add: transform_asid_table_entry_def transform_asid_high_bits_of)\n apply (simp add: transform_asid_def unat_lt2p[where 'a=7, simplified])\n apply (simp add: is_null_cap_def)\n apply simp\n apply simp\n done\n\nlemma opt_cap_Some_asid_real:\n \"\\ opt_cap ref (transform s) = Some cap; asid \\ cdl_cap_asid' cap; einvs s \\ \\ is_real_cap cap\"\n apply (case_tac ref)\n apply (clarsimp simp:opt_cap_def transform_def transform_objects_def slots_of_def)\n apply (rule_tac P=\"a=idle_thread s\" in case_split)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s a\")\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac aa, simp_all add:object_slots_def valid_objs_def nat_split_conv_to_if\n split: if_split_asm)\n apply (clarsimp simp:transform_cnode_contents_def is_real_cap_transform)\n apply (clarsimp simp:transform_cnode_contents_def is_real_cap_transform)\n apply (frule valid_etcbs_tcb_etcb[rotated], fastforce)\n apply (clarsimp simp: transform_tcb_def tcb_slot_defs is_real_cap_infer_tcb_bound_notification\n is_real_cap_transform is_real_cap_infer_tcb_pending_op\n split: if_split_asm)\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp)\n apply (clarsimp simp:transform_asid_pool_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:transform_asid_pool_entry_def split:option.splits)\n apply (clarsimp simp:transform_page_table_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:transform_pte_def split:ARM_A.pte.splits)\n apply (clarsimp simp:transform_page_directory_contents_def unat_map_def split:if_split_asm)\n apply (clarsimp simp:transform_pde_def split:ARM_A.pde.splits)\n done\n\nlemma state_vrefs_asid_pool_transform_rev:\n \"\\ einvs s; cdl_asid_table (transform s) (fst (transform_asid asid)) = Some poolcap;\n \\ is_null_cap poolcap; \\ is_null_cap pdcap; pdptr = cap_object pdcap;\n opt_cap (cap_object poolcap, snd (transform_asid asid)) (transform s) = Some pdcap \\ \\\n (pdptr, asid && mask ARM_A.asid_low_bits, AASIDPool, Control)\n \\ state_vrefs s (cap_object poolcap)\"\n apply (subgoal_tac \"cap_object poolcap \\ idle_thread s\")\n prefer 2\n apply (clarsimp simp:state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (case_tac \"kheap s (cap_object poolcap)\")\n apply (clarsimp simp:state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (clarsimp simp: map_add_def object_slots_def)\n apply (clarsimp simp:transform_asid_high_bits_of')\n apply (simp add:asid_table_transform transform_asid_table_entry_def is_null_cap_def\n split:option.splits)\n apply (clarsimp simp:state_vrefs_def transform_def transform_objects_def\n opt_cap_def slots_of_def)\n apply (drule invs_valid_asid_table)\n apply (clarsimp simp:valid_asid_table_def)\n apply (drule bspec)\n apply fastforce\n apply (case_tac a, simp_all add:transform_object_def object_slots_def)\n apply (clarsimp simp:obj_at_def a_type_def split:if_split_asm)+\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp add:vs_refs_no_global_pts_def graph_of_def)\n apply (simp add:transform_asid_pool_contents_def unat_map_def transform_asid_low_bits_of\n split:if_split_asm)\n apply (rule_tac x=\"(ucast asid, cap_object pdcap)\" in image_eqI)\n apply (simp add:mask_asid_low_bits_ucast_ucast)\n apply (clarsimp simp:transform_asid_pool_entry_def split:option.splits)\n done\n\nlemma state_asids_transform_rev:\n \"\\ einvs s; (x, a, y) \\ cdl_state_asids_to_policy aag (transform s) \\ \\\n (x, a, y) \\ state_asids_to_policy aag s\"\n apply (erule cdl_state_asids_to_policy_aux.induct)\n apply (rule_tac P=\"is_thread_state_cap cap\" in case_split)\n apply (clarsimp simp:is_thread_state_cap_def split:cdl_cap.splits)\n apply (rule_tac P=\"is_bound_ntfn_cap cap\" in case_split)\n apply (clarsimp simp: is_bound_ntfn_cap_def split: cdl_cap.splits)\n apply (rule_tac P=\"\\ is_real_cap cap\" in case_split)\n apply (clarsimp simp:opt_cap_Some_asid_real)\n apply (rule_tac P=\"is_null_cap cap\" in case_split)\n apply (clarsimp simp:is_null_cap_def split:cdl_cap.splits)\n apply (frule caps_of_state_transform_opt_cap_rev, simp+)\n apply clarsimp\n apply (subst fst_transform_cslot_ptr[symmetric])\n apply (drule (1) cap_asid'_transform[symmetric])\n apply (simp only: cap_asid'_member)\n apply (erule exE)\n apply (rule sata_asid; fastforce)\n apply simp\n apply (rule_tac poolptr=\"cap_object poolcap\" in sata_asid_lookup)\n apply (clarsimp simp:transform_asid_high_bits_of')\n apply (simp add:asid_table_transform transform_asid_table_entry_def is_null_cap_def\n split:option.splits)\n apply (drule_tac t=poolcap in sym)\n apply simp\n apply (rule state_vrefs_asid_pool_transform_rev, simp_all)\n apply (rule sata_asidpool)\n apply (clarsimp simp:transform_asid_high_bits_of')\n apply (simp add:asid_table_transform transform_asid_table_entry_def is_null_cap_def\n split:option.splits)\n apply simp\n done\n\nlemma idle_thread_no_irqs:\n \"\\ invs s; caps_of_state s ptr = Some cap;\n irq \\ cap_irqs_controlled cap \\ \\ fst ptr \\ idle_thread s\"\n apply (rule notI)\n apply (drule idle_thread_null_cap, simp+)\n done\n\nlemma cap_irqs_controlled_transform:\n \"cap_irqs_controlled cap = cdl_cap_irqs_controlled (transform_cap cap)\"\n apply (case_tac cap; simp)\n apply (rename_tac arch_cap)\n apply (case_tac arch_cap; simp)\n done\n\nlemma state_irqs_transform:\n \"\\ einvs s; (x, a, y) \\ state_irqs_to_policy aag s \\ \\\n (x, a, y) \\ cdl_state_irqs_to_policy aag (transform s)\"\n apply (erule state_irqs_to_policy_aux.induct)\n apply (simp add: fst_transform_cslot_ptr)\n apply (rule_tac cap=\"transform_cap cap\" in csita_controlled)\n apply (rule caps_of_state_transform_opt_cap)\n apply simp\n apply fastforce\n apply (clarsimp simp:idle_thread_no_irqs)\n apply (simp add: cap_irqs_controlled_transform)\n done\n\nlemma state_irqs_transform_rev:\n \"\\ einvs s; (x, a, y) \\ cdl_state_irqs_to_policy aag (transform s) \\ \\\n (x, a, y) \\ state_irqs_to_policy aag s\"\n apply (erule cdl_state_irqs_to_policy_aux.induct)\n apply (rule_tac P=\"is_thread_state_cap cap\" in case_split)\n apply (clarsimp simp:is_thread_state_cap_def split:cdl_cap.splits)\n apply (rule_tac P=\"is_bound_ntfn_cap cap\" in case_split)\n apply (clarsimp simp:is_bound_ntfn_cap_def split:cdl_cap.splits)\n apply (rule_tac P=\"\\ is_real_cap cap\" in case_split)\n apply (clarsimp simp:is_real_cap_def split:cdl_cap.splits)\n apply (rule_tac P=\"is_null_cap cap\" in case_split)\n apply (clarsimp simp:is_null_cap_def split:cdl_cap.splits)\n apply (frule caps_of_state_transform_opt_cap_rev, simp+)\n apply clarsimp\n apply (subst fst_transform_cslot_ptr[symmetric])\n apply (rule_tac cap=cap' in sita_controlled)\n apply simp\n apply (simp add:cap_irqs_controlled_transform)\n done\n\nlemma irq_map_wellformed_transform:\n \"irq_map_wellformed aag s = cdl_irq_map_wellformed aag (transform s)\"\n apply (clarsimp simp:irq_map_wellformed_aux_def cdl_irq_map_wellformed_aux_def\n transform_def)\n done\n\nlemma einvs_idle:\n \"einvs s \\ idle_thread s = idle_thread_ptr\"\n by (simp add: invs_def valid_state_def valid_idle_def)\n\nlemma einvs_idle_domain:\n \"einvs s \\ \\etcb. ekheap s idle_thread_ptr = Some etcb \\ tcb_domain etcb = default_domain\"\n apply (clarsimp simp: valid_sched_def valid_idle_etcb_def etcb_at_def\n valid_etcbs_def invs_def valid_state_def valid_idle_def pred_tcb_at_def obj_at_def is_etcb_at_def\n split: option.splits)\n apply (erule_tac x=\"idle_thread s\" in allE)\n apply simp\n done\n\nlemma cdl_domains_of_state_transform:\n assumes e: \"einvs s\"\n shows \"cdl_domains_of_state (transform s) = domains_of_state s\"\nproof -\n { fix ptr d\n assume \"(ptr, d) \\ cdl_domains_of_state (transform s)\"\n hence \"(ptr, d) \\ domains_of_state s\"\n apply (cases)\n using e\n apply (clarsimp simp: transform_def transform_objects_def restrict_map_def\n split: if_split_asm Structures_A.kernel_object.splits)\n apply (case_tac z, simp_all add: nat_split_conv_to_if\n split: if_split_asm)\n prefer 2\n apply (rename_tac arch_kernel_obj)\n apply (case_tac arch_kernel_obj; simp)\n apply (drule valid_etcbs_tcb_etcb [rotated], fastforce)\n apply clarsimp\n apply (rule domains_of_state_aux.intros, assumption)\n apply (clarsimp simp: transform_tcb_def transform_full_intent_def Let_def)\n apply (insert einvs_idle [OF e])\n apply (insert einvs_idle_domain [OF e])\n apply clarsimp\n apply (erule domains_of_state_aux.domtcbs)\n apply simp\n done\n }\n note a = this\n {\n fix ptr d\n assume \"(ptr, d) \\ domains_of_state s\"\n hence \"(ptr, d) \\ cdl_domains_of_state (transform s)\"\n apply cases\n apply (case_tac \"ptr = idle_thread_ptr\")\n apply (insert einvs_idle [OF e])[1]\n apply (insert einvs_idle_domain [OF e])[1]\n apply simp\n apply (rule domidle)\n apply (frule ekheap_kheap_dom)\n using e apply fastforce\n apply clarsimp\n apply (drule (1) cdl_objects_tcb)\n apply (insert einvs_idle [OF e])[1]\n apply simp\n apply (erule domtcbs)\n apply (clarsimp simp: transform_full_intent_def Let_def)\n done\n }\n note b = this\n show ?thesis\n apply (rule set_eqI)\n apply clarify\n apply (blast intro!: a b)\n done\nqed\n\nlemma tcb_domain_map_wellformed_transform:\n \"einvs s \\\n tcb_domain_map_wellformed aag s = cdl_tcb_domain_map_wellformed aag (transform s)\"\n by (clarsimp simp: tcb_domain_map_wellformed_aux_def cdl_tcb_domain_map_wellformed_aux_def\n cdl_domains_of_state_transform)\n\nlemma pas_refined_transform:\n \"einvs s \\ pas_refined aag s = pcs_refined aag (transform s)\"\n apply (clarsimp simp:pcs_refined_def pas_refined_def irq_map_wellformed_transform tcb_domain_map_wellformed_transform)\n apply safe\n apply (rule subsetD, simp)\n apply (clarsimp simp:auth_graph_map_mem)\n apply (rule_tac x=\"x'\" in exI, clarsimp, rule_tac x=\"y'\" in exI, clarsimp)\n apply (clarsimp simp:state_objs_transform_rev)\n apply (rule_tac A=\"state_asids_to_policy aag s\" in subsetD, simp)\n apply (clarsimp simp:state_asids_transform_rev[simplified])\n apply (rule_tac A=\"state_irqs_to_policy aag s\" in subsetD, simp)\n apply (clarsimp simp:state_irqs_transform_rev)\n apply (rule subsetD, simp)\n apply (clarsimp simp:auth_graph_map_mem)\n apply (rule_tac x=\"x'\" in exI, clarsimp, rule_tac x=\"y'\" in exI, clarsimp)\n apply (clarsimp simp:state_objs_transform)\n apply (rule_tac A=\"cdl_state_asids_to_policy aag (transform s)\" in subsetD, simp)\n apply (clarsimp simp:state_asids_transform)\n apply (rule_tac A=\"cdl_state_irqs_to_policy aag (transform s)\" in subsetD, simp)\n apply (clarsimp simp:state_irqs_transform)\n done\n\nend\n\nend\n", "meta": {"author": "seL4", "repo": "l4v", "sha": "9ba34e269008732d4f89fb7a7e32337ffdd09ff9", "save_path": "github-repos/isabelle/seL4-l4v", "path": "github-repos/isabelle/seL4-l4v/l4v-9ba34e269008732d4f89fb7a7e32337ffdd09ff9/proof/dpolicy/Dpolicy.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. YES\n2. NO", "lm_q1_score": 0.5039061705290806, "lm_q2_score": 0.21206881431678096, "lm_q1q2_score": 0.10686278411101176}} {"text": "theory Inductive_Predicate\nimports Setup\nbegin\n\n(*<*)\nhide_const %invisible append\n\ninductive %invisible append where\n \"append [] ys ys\"\n| \"append xs ys zs \\ append (x # xs) ys (x # zs)\"\n\nlemma %invisible append: \"append xs ys zs = (xs @ ys = zs)\"\n by (induct xs arbitrary: ys zs) (auto elim: append.cases intro: append.intros)\n\nlemmas lexordp_def = \n lexordp_def [unfolded lexord_def mem_Collect_eq split]\n(*>*)\n\nsection \\Inductive Predicates \\label{sec:inductive}\\\n\ntext \\\n The @{text \"predicate compiler\"} is an extension of the code generator\n which turns inductive specifications into equational ones, from\n which in turn executable code can be generated. The mechanisms of\n this compiler are described in detail in\n @{cite \"Berghofer-Bulwahn-Haftmann:2009:TPHOL\"}.\n\n Consider the simple predicate @{const append} given by these two\n introduction rules:\n\\\n\ntext %quote \\\n @{thm append.intros(1)[of ys]} \\\\\n @{thm append.intros(2)[of xs ys zs x]}\n\\\n\ntext \\\n \\noindent To invoke the compiler, simply use @{command_def \"code_pred\"}:\n\\\n\ncode_pred %quote append .\n\ntext \\\n \\noindent The @{command \"code_pred\"} command takes the name of the\n inductive predicate and then you put a period to discharge a trivial\n correctness proof. The compiler infers possible modes for the\n predicate and produces the derived code equations. Modes annotate\n which (parts of the) arguments are to be taken as input, and which\n output. Modes are similar to types, but use the notation @{text \"i\"}\n for input and @{text \"o\"} for output.\n \n For @{term \"append\"}, the compiler can infer the following modes:\n \\begin{itemize}\n \\item @{text \"i \\ i \\ i \\ bool\"}\n \\item @{text \"i \\ i \\ o \\ bool\"}\n \\item @{text \"o \\ o \\ i \\ bool\"}\n \\end{itemize}\n You can compute sets of predicates using @{command_def \"values\"}:\n\\\n\nvalues %quote \"{zs. append [(1::nat),2,3] [4,5] zs}\"\n\ntext \\\\noindent outputs @{text \"{[1, 2, 3, 4, 5]}\"}, and\\\n\nvalues %quote \"{(xs, ys). append xs ys [(2::nat),3]}\"\n\ntext \\\\noindent outputs @{text \"{([], [2, 3]), ([2], [3]), ([2, 3], [])}\"}.\\\n\ntext \\\n \\noindent If you are only interested in the first elements of the\n set comprehension (with respect to a depth-first search on the\n introduction rules), you can pass an argument to @{command \"values\"}\n to specify the number of elements you want:\n\\\n\nvalues %quote 1 \"{(xs, ys). append xs ys [(1::nat), 2, 3, 4]}\"\nvalues %quote 3 \"{(xs, ys). append xs ys [(1::nat), 2, 3, 4]}\"\n\ntext \\\n \\noindent The @{command \"values\"} command can only compute set\n comprehensions for which a mode has been inferred.\n\n The code equations for a predicate are made available as theorems with\n the suffix @{text \"equation\"}, and can be inspected with:\n\\\n\nthm %quote append.equation\n\ntext \\\n \\noindent More advanced options are described in the following subsections.\n\\\n\nsubsection \\Alternative names for functions\\\n\ntext \\\n By default, the functions generated from a predicate are named after\n the predicate with the mode mangled into the name (e.g., @{text\n \"append_i_i_o\"}). You can specify your own names as follows:\n\\\n\ncode_pred %quote (modes: i \\ i \\ o \\ bool as concat,\n o \\ o \\ i \\ bool as split,\n i \\ o \\ i \\ bool as suffix) append .\n\nsubsection \\Alternative introduction rules\\\n\ntext \\\n Sometimes the introduction rules of an predicate are not executable\n because they contain non-executable constants or specific modes\n could not be inferred. It is also possible that the introduction\n rules yield a function that loops forever due to the execution in a\n depth-first search manner. Therefore, you can declare alternative\n introduction rules for predicates with the attribute @{attribute\n \"code_pred_intro\"}. For example, the transitive closure is defined\n by:\n\\\n\ntext %quote \\\n @{lemma [source] \"r a b \\ tranclp r a b\" by (fact tranclp.intros(1))}\\\\\n @{lemma [source] \"tranclp r a b \\ r b c \\ tranclp r a c\" by (fact tranclp.intros(2))}\n\\\n\ntext \\\n \\noindent These rules do not suit well for executing the transitive\n closure with the mode @{text \"(i \\ o \\ bool) \\ i \\ o \\ bool\"}, as\n the second rule will cause an infinite loop in the recursive call.\n This can be avoided using the following alternative rules which are\n declared to the predicate compiler by the attribute @{attribute\n \"code_pred_intro\"}:\n\\\n\nlemma %quote [code_pred_intro]:\n \"r a b \\ tranclp r a b\"\n \"r a b \\ tranclp r b c \\ tranclp r a c\"\nby auto\n\ntext \\\n \\noindent After declaring all alternative rules for the transitive\n closure, you invoke @{command \"code_pred\"} as usual. As you have\n declared alternative rules for the predicate, you are urged to prove\n that these introduction rules are complete, i.e., that you can\n derive an elimination rule for the alternative rules:\n\\\n\ncode_pred %quote tranclp\nproof -\n case tranclp\n from this converse_tranclpE [OF tranclp.prems] show thesis by metis\nqed\n\ntext \\\n \\noindent Alternative rules can also be used for constants that have\n not been defined inductively. For example, the lexicographic order\n which is defined as:\n\\\n\ntext %quote \\\n @{thm [display] lexordp_def [of r]}\n\\\n\ntext \\\n \\noindent To make it executable, you can derive the following two\n rules and prove the elimination rule:\n\\\n\nlemma %quote [code_pred_intro]:\n \"append xs (a # v) ys \\ lexordp r xs ys\"\n(*<*)unfolding lexordp_def by (auto simp add: append)(*>*)\n\nlemma %quote [code_pred_intro]:\n \"append u (a # v) xs \\ append u (b # w) ys \\ r a b\n \\ lexordp r xs ys\"\n(*<*)unfolding lexordp_def append apply simp\napply (rule disjI2) by auto(*>*)\n\ncode_pred %quote lexordp\n(*<*)proof -\n fix r xs ys\n assume lexord: \"lexordp r xs ys\"\n assume 1: \"\\r' xs' ys' a v. r = r' \\ xs = xs' \\ ys = ys'\n \\ append xs' (a # v) ys' \\ thesis\"\n assume 2: \"\\r' xs' ys' u a v b w. r = r' \\ xs = xs' \\ ys = ys'\n \\ append u (a # v) xs' \\ append u (b # w) ys' \\ r' a b \\ thesis\"\n {\n assume \"\\a v. ys = xs @ a # v\"\n from this 1 have thesis\n by (fastforce simp add: append)\n } moreover\n {\n assume \"\\u a b v w. r a b \\ xs = u @ a # v \\ ys = u @ b # w\"\n from this 2 have thesis by (fastforce simp add: append)\n } moreover\n note lexord\n ultimately show thesis\n unfolding lexordp_def\n by fastforce\nqed(*>*)\n\n\nsubsection \\Options for values\\\n\ntext \\\n In the presence of higher-order predicates, multiple modes for some\n predicate could be inferred that are not disambiguated by the\n pattern of the set comprehension. To disambiguate the modes for the\n arguments of a predicate, you can state the modes explicitly in the\n @{command \"values\"} command. Consider the simple predicate @{term\n \"succ\"}:\n\\\n\ninductive %quote succ :: \"nat \\ nat \\ bool\" where\n \"succ 0 (Suc 0)\"\n| \"succ x y \\ succ (Suc x) (Suc y)\"\n\ncode_pred %quote succ .\n\ntext \\\n \\noindent For this, the predicate compiler can infer modes @{text \"o\n \\ o \\ bool\"}, @{text \"i \\ o \\ bool\"}, @{text \"o \\ i \\ bool\"} and\n @{text \"i \\ i \\ bool\"}. The invocation of @{command \"values\"}\n @{text \"{n. tranclp succ 10 n}\"} loops, as multiple modes for the\n predicate @{text \"succ\"} are possible and here the first mode @{text\n \"o \\ o \\ bool\"} is chosen. To choose another mode for the argument,\n you can declare the mode for the argument between the @{command\n \"values\"} and the number of elements.\n\\\n\nvalues %quote [mode: i \\ o \\ bool] 1 \"{n. tranclp succ 10 n}\" (*FIXME does not terminate for n\\1*)\nvalues %quote [mode: o \\ i \\ bool] 1 \"{n. tranclp succ n 10}\"\n\n\nsubsection \\Embedding into functional code within Isabelle/HOL\\\n\ntext \\\n To embed the computation of an inductive predicate into functions\n that are defined in Isabelle/HOL, you have a number of options:\n\n \\begin{itemize}\n\n \\item You want to use the first-order predicate with the mode\n where all arguments are input. Then you can use the predicate directly, e.g.\n\n @{text [display]\n\\valid_suffix ys zs =\n (if append [Suc 0, 2] ys zs then Some ys else None)\\}\n\n \\item If you know that the execution returns only one value (it is\n deterministic), then you can use the combinator @{term\n \"Predicate.the\"}, e.g., a functional concatenation of lists is\n defined with\n\n @{term [display] \"functional_concat xs ys = Predicate.the (append_i_i_o xs ys)\"}\n\n Note that if the evaluation does not return a unique value, it\n raises a run-time error @{term \"not_unique\"}.\n\n \\end{itemize}\n\\\n\n\nsubsection \\Further Examples\\\n\ntext \\\n Further examples for compiling inductive predicates can be found in\n \\<^file>\\~~/src/HOL/Predicate_Compile_Examples/Examples.thy\\. There are\n also some examples in the Archive of Formal Proofs, notably in the\n @{text \"POPLmark-deBruijn\"} and the @{text \"FeatherweightJava\"}\n sessions.\n\\\n\nend\n\n", "meta": {"author": "SEL4PROJ", "repo": "jormungand", "sha": "bad97f9817b4034cd705cd295a1f86af880a7631", "save_path": "github-repos/isabelle/SEL4PROJ-jormungand", "path": "github-repos/isabelle/SEL4PROJ-jormungand/jormungand-bad97f9817b4034cd705cd295a1f86af880a7631/case_study/isabelle/src/Doc/Codegen/Inductive_Predicate.thy", "lm_name": "Qwen/Qwen-72B", "lm_label": "1. NO\n2. NO\n\n", "lm_q1_score": 0.4843800842769843, "lm_q2_score": 0.2068940439256578, "lm_q1q2_score": 0.10021535443311622}}