Limitations & Failure Modes
Scientific credibility requires candidly stating where an architecture does not perform well. Below are the verified technical limitations, boundary conditions, and hardware constraints of Q-TensorFormer.
1. Unfused CPU Contraction Overhead
While Tensor-Train decomposition achieves extraordinary parameter compression (up to 56.96x parameter reduction at rank 1), contracting multi-core tensors sequentially via PyTorch einsum incurs wall-clock latency overhead on CPUs:
- On an x86 CPU where a dense
512 → 2048matrix already fits in L3 cache, optimized MKL/BLAS dense GEMM takes 0.20 ms per token. - In contrast, contracting four Tensor-Train cores sequentially takes 0.91 ms to 1.51 ms per token.
Conclusion: If your model weights comfortably fit in fast SRAM/VRAM and your system is purely compute-bound, dense matrix multiplication is faster in wall-clock time than unfused TT contraction. TT compression wins when models exceed memory capacity or when fused GPU kernels (Triton) eliminate intermediate memory round-trips.
2. x86 CPU float16 Emulation Penalty
Serializing checkpoints in float16 cuts disk storage by 49.3% (from 22.35 MB to 11.19 MB). However, standard x86 CPU architectures lack native FP16 matrix execution instructions, forcing PyTorch to emulate FP16 math in software:
- FP32 Time-To-First-Token (TTFT) at L=16: 25.82 ms.
- FP16 Time-To-First-Token (TTFT) at L=16: 335.66 ms (13x slower on CPU due to software emulation).
For CPU execution, we strongly advise using FP32 or INT8 quantization rather than FP16.
3. Legacy Checkpoint Incompatibility (qtensorformer_small.pt)
The historical file qtensorformer_small.pt was produced by an external TensorLy container and has 0/113 key overlap with repository model classes.
In accordance with project guardrails, we refuse to load it with strict=False or alter its provenance. Instead, users must load the verified canonical checkpoint (checkpoints/qtensorformer_canonical_trained.pt).
4. Quantum Pathway Status & CPU Latency Overhead
Q-TensorFormer contains an experimental quantum pathway utilizing a classical Lie group surrogate (ClassicalSurrogateUnitary):
- No physical quantum advantage: Zero physical QPU hardware was executed.
- CPU Latency Penalty: Forcing quantum kernel attention on introduces a +6.75% CPU latency overhead.
- For edge deployment, presets
QTF_EDGEandQTF_CLASSICAL_ONLYdisable quantum execution by default.
5. Energy Measurement Disclosure
Because the benchmark host is a CPU-only workstation without physical inline power sensors or privileged RAPL wattmeter access, Level 4 direct sensor energy is explicitly unverified. All energy figures reported in src/hardware_cost_model.py are theoretical analytical estimates.
6. Training Corpus Scale
The canonical trained checkpoint was trained on a compact educational corpus (data/qtensorformer_corpus.txt, 2,905 tokens), reducing perplexity from 352.35 to 45.09. It is designed to demonstrate verifiable convergence and systems integration, not open-domain world knowledge.