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edit//Qwen3-TTS-test//.venv//Lib//site-packages//torch//include//ATen//native//cuda//vol2col.cuh ADDED
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+ #pragma once
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+
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+ #include <ATen/cuda/CUDAContext.h>
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+ #include <ATen/cuda/detail/KernelUtils.h>
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+ #include <ATen/cuda/detail/IndexUtils.cuh>
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+ #include <ATen/cuda/detail/TensorInfo.cuh>
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+
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+ #include <c10/macros/Macros.h>
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+
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+ namespace at::native {
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+
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+ using namespace at::cuda::detail;
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+
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+ // Kernel for fast unfold+copy on volumes
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+ template <typename T>
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+ C10_LAUNCH_BOUNDS_1(1024)
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+ __global__ void vol2col_kernel(
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+ const int64_t n,
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+ const T* data_vol,
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+ const int depth,
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+ const int height,
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+ const int width,
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+ const int ksize_t,
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+ const int ksize_h,
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+ const int ksize_w,
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+ const int pad_t,
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+ const int pad_h,
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+ const int pad_w,
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+ const int stride_t,
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+ const int stride_h,
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+ const int stride_w,
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+ const int dilation_t,
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+ const int dilation_h,
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+ const int dilation_w,
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+ const int depth_col,
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+ const int height_col,
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+ const int width_col,
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+ T* data_col) {
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+ CUDA_KERNEL_LOOP_TYPE(index, n, int64_t) {
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+ auto w_out = index % width_col;
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+ index /= width_col;
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+ auto h_out = index % height_col;
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+ index /= height_col;
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+ auto t_out = index % depth_col;
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+ auto channel_in = index / depth_col;
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+ auto channel_out = channel_in * ksize_t * ksize_h * ksize_w;
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+ auto t_in = t_out * stride_t - pad_t;
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+ auto h_in = h_out * stride_h - pad_h;
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+ auto w_in = w_out * stride_w - pad_w;
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+ data_col +=
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+ ((channel_out * depth_col + t_out) * height_col + h_out) * width_col +
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+ w_out;
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+ data_vol += ((channel_in * depth + t_in) * height + h_in) * width + w_in;
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+ for (int i = 0; i < ksize_t; ++i) {
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+ for (int j = 0; j < ksize_h; ++j) {
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+ for (int k = 0; k < ksize_w; ++k) {
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+ auto t = t_in + i * dilation_t;
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+ auto h = h_in + j * dilation_h;
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+ auto w = w_in + k * dilation_w;
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+ *data_col = (t >= 0 && h >= 0 && w >= 0 && t < depth && h < height &&
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+ w < width)
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+ ? data_vol
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+ [i * dilation_t * height * width + j * dilation_h * width +
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+ k * dilation_w]
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+ : static_cast<T>(0);
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+ data_col += depth_col * height_col * width_col;
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+ }
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+ }
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+ }
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+ }
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+ }
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+
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+ template <typename T>
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+ void vol2col(
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+ cudaStream_t stream,
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+ const T* data_vol,
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+ const int channels,
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+ const int depth,
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+ const int height,
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+ const int width,
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+ const int depth_col,
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+ const int height_col,
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+ const int width_col,
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+ const int ksize_t,
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+ const int ksize_h,
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+ const int ksize_w,
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+ const int pad_t,
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+ const int pad_h,
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+ const int pad_w,
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+ const int stride_t,
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+ const int stride_h,
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+ const int stride_w,
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+ const int dilation_t,
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+ const int dilation_h,
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+ const int dilation_w,
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+ T* data_col) {
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+ // We are going to launch channels * depth_col * height_col * width_col
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+ // kernels, each kernel responsible for copying a single-channel grid.
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+ // We cast an operand to int64 so that the product will not overflow
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+ const auto num_kernels = static_cast<int64_t>(channels) * depth_col * height_col * width_col;
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+ // Launch
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+ vol2col_kernel<<<GET_BLOCKS(num_kernels), CUDA_NUM_THREADS, 0, stream>>>(
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+ num_kernels,
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+ data_vol,
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+ depth,
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+ height,
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+ width,
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+ ksize_t,
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+ ksize_h,
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+ ksize_w,
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+ pad_t,
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+ pad_h,
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+ pad_w,
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+ stride_t,
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+ stride_h,
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+ stride_w,
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+ dilation_t,
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+ dilation_h,
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+ dilation_w,
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+ depth_col,
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+ height_col,
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+ width_col,
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+ data_col);
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+ C10_CUDA_KERNEL_LAUNCH_CHECK();
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+ }
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+
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+ template <typename T, typename accT>
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+ __global__ void vol2im_kernel(
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+ const int64_t n,
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+ const T* data_col,
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+ const unsigned depth,
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+ const unsigned height,
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+ const unsigned width,
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+ const unsigned channels,
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+ const unsigned kernel_t,
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+ const unsigned kernel_h,
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+ const unsigned kernel_w,
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+ const unsigned pad_t,
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+ const unsigned pad_h,
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+ const unsigned pad_w,
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+ const unsigned stride_t,
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+ const unsigned stride_h,
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+ const unsigned stride_w,
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+ const unsigned dilation_t,
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+ const unsigned dilation_h,
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+ const unsigned dilation_w,
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+ const unsigned depth_col,
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+ const unsigned height_col,
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+ const unsigned width_col,
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+ T* data_vol) {
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+ CUDA_KERNEL_LOOP(index, n) {
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+ accT val = static_cast<accT>(0);
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+ const auto w_im = index % width + pad_w;
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+ const auto h_im = (index / width) % height + pad_h;
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+ const auto t_im = (index / width / height) % depth + pad_t;
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+ const auto c_im = index / (width * height * depth);
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+ auto kernel_extent_w = (kernel_w - 1) * dilation_w + 1;
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+ auto kernel_extent_h = (kernel_h - 1) * dilation_h + 1;
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+ auto kernel_extent_t = (kernel_t - 1) * dilation_t + 1;
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+ // compute the start and end of the output
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+ const auto w_col_start =
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+ (w_im < kernel_extent_w) ? 0 : (w_im - kernel_extent_w) / stride_w + 1;
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+ const auto w_col_end = std::min(w_im / stride_w + 1, width_col);
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+ const auto h_col_start =
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+ (h_im < kernel_extent_h) ? 0 : (h_im - kernel_extent_h) / stride_h + 1;
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+ const auto h_col_end = std::min(h_im / stride_h + 1, height_col);
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+ const auto t_col_start =
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+ (t_im < kernel_extent_t) ? 0 : (t_im - kernel_extent_t) / stride_t + 1;
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+ const auto t_col_end = std::min(t_im / stride_t + 1, depth_col);
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+ // TODO: use LCM of stride and dilation to avoid unnecessary loops
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+ for (unsigned t_col = t_col_start; t_col < t_col_end; t_col += 1) {
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+ for (unsigned h_col = h_col_start; h_col < h_col_end; h_col += 1) {
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+ for (unsigned w_col = w_col_start; w_col < w_col_end; w_col += 1) {
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+ uint64_t t_k = (t_im - t_col * stride_t);
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+ uint64_t h_k = (h_im - h_col * stride_h);
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+ uint64_t w_k = (w_im - w_col * stride_w);
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+ if (t_k % dilation_t == 0 && h_k % dilation_h == 0 &&
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+ w_k % dilation_w == 0) {
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+ t_k /= dilation_t;
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+ h_k /= dilation_h;
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+ w_k /= dilation_w;
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+ const int64_t idx_k =
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+ ((c_im * kernel_t + t_k) * kernel_h + h_k) * kernel_w + w_k;
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+ const int64_t data_col_index =
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+ ((idx_k * depth_col + t_col) *
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+ height_col + h_col) *
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+ width_col + w_col;
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+ val += data_col[data_col_index];
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+ }
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+ }
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+ }
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+ }
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+ data_vol[index] = static_cast<T>(val);
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+ }
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+ }
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+
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+ template <typename T, typename accT>
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+ void col2vol(
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+ cudaStream_t stream,
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+ const T* data_col,
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+ const int64_t channels,
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+ const int64_t depth,
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+ const int64_t height,
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+ const int64_t width,
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+ const int64_t output_depth,
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+ const int64_t output_height,
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+ const int64_t output_width,
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+ const int64_t patch_t,
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+ const int64_t patch_h,
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+ const int64_t patch_w,
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+ const int64_t pad_t,
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+ const int64_t pad_h,
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+ const int64_t pad_w,
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+ const int64_t stride_t,
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+ const int64_t stride_h,
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+ const int64_t stride_w,
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+ const int64_t dilation_t,
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+ const int64_t dilation_h,
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+ const int64_t dilation_w,
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+ T* data_vol) {
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+ const auto num_kernels = channels * depth * height * width;
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+
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+ auto check_fits_in_unsigned =
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+ [](int64_t val, const char * name) {
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+ constexpr auto umax = std::numeric_limits<unsigned>::max();
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+ TORCH_CHECK(val >= 0 && val <= umax,
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+ name, " must fit in a 32-bit unsigned value");
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+ };
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+ check_fits_in_unsigned(num_kernels, "input size");
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+ check_fits_in_unsigned(
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+ channels * patch_t * patch_h * patch_w, "channels x kernel size");
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+
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+ // To avoid involving atomic operations, we will launch one kernel per
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+ // bottom dimension, and then in the kernel add up the top dimensions.
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+ vol2im_kernel<T, accT>
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+ <<<GET_BLOCKS(num_kernels), CUDA_NUM_THREADS, 0, stream>>>(
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+ num_kernels,
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+ data_col,
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+ depth,
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+ height,
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+ width,
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+ channels,
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+ patch_t,
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+ patch_h,
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+ patch_w,
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+ pad_t,
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+ pad_h,
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+ pad_w,
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+ stride_t,
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+ stride_h,
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+ stride_w,
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+ dilation_t,
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+ dilation_h,
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+ dilation_w,
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+ output_depth,
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+ output_height,
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+ output_width,
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+ data_vol);
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+ C10_CUDA_KERNEL_LAUNCH_CHECK();
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+ }
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+
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+ } // namespace at::native