Update steps

int8/benchmarks/x5h_mwmx_npu.yaml

@@ -40,3 +40,39 @@ memory:
 
 power:
   avg_w: null             # not yet characterized
+
+# Same config (1 instance, 12 cores, 850 MHz) as x5h_mwmx_npu_apm80_12core.yaml
+# — reusing its verified reproduce steps rather than re-deriving them.
+reproduce:
+  steps:
+    - title: Download the ONNX model and compile config
+      command: hf download Renesas/RetinaNet-R101-ONNX --repo-type=model --include "fp32/*" --include "compile_config/*"
+    - title: Configure the network for the 12-core build
+      command: |
+        cat >> ${WORKDIR}/nnac_config/config.yaml << 'EOF'
+        network_configuration:
+          retinanet_9:
+            optimization_options:
+              - -segmentation_json ./compile_config/RetinaNet_l2seg.json
+              - -enable_dma_fusion
+              - -enable_stu_multi_channel
+              - -stu_multi_channel_config 0x15212420
+              - -stu_weight
+              - -distributed_coef_stu
+        EOF
+        # If config.yaml already has a network_configuration: key (e.g. from a
+        # previous model), merge this block into it instead of appending a duplicate key.
+    - title: Compile with the NNAC toolchain (INT8 auto-cast from the FP32 graph)
+      command: |
+        python3 nnac_frontend/legalize.py -d binary/nnx ./fp32/retinanet-9.onnx
+    - title: Set up the R-Car X5H board
+      command: Configure the board per the AI Compiler (NNAC) "Getting Started" guide, section 3.4 (host TFTP/NFS setup, bootloader flashing, U-Boot, Linux boot, login) -- exact steps depend on your board/network setup.
+      kind: note
+    - title: Copy the compiled artifact to the board
+      command: Copy ${WORKDIR}/binary/nnx to the board -- method may vary (NFS mount, scp, USB, etc.).
+      kind: note
+    - title: Run on R-Car X5H (single NPU cluster, 12 AI cores)
+      command: |
+        cd binary
+        ./host_app ./arc_prog_npus ./nnx/retinanet-9
+      expected: hash[n] = 0x...(OK) means the run's output matches the reference hash in hash.txt; latency is the NPX execution time reported in cycles and ms.

int8/benchmarks/x5h_mwmx_npu_apm80_12core.yaml

@@ -70,12 +70,12 @@ reproduce:
         python3 nnac_frontend/legalize.py -d binary/nnx ./fp32/retinanet-9.onnx
     - title: Set up the R-Car X5H board
       command: Configure the board per the AI Compiler (NNAC) "Getting Started" guide, section 3.4 (host TFTP/NFS setup, bootloader flashing, U-Boot, Linux boot, login) -- exact steps depend on your board/network setup.
+      kind: note
     - title: Copy the compiled artifact to the board
       command: Copy ${WORKDIR}/binary/nnx to the board -- method may vary (NFS mount, scp, USB, etc.).
+      kind: note
     - title: Run on R-Car X5H (single NPU cluster, 12 AI cores)
       command: |
         cd binary
         ./host_app ./arc_prog_npus ./nnx/retinanet-9
-  notes: >-
-    hash[n] = 0x...(OK) means the run's output matches the reference hash in
-    hash.txt; latency is the NPX execution time reported in cycles and ms.
+      expected: hash[n] = 0x...(OK) means the run's output matches the reference hash in hash.txt; latency is the NPX execution time reported in cycles and ms.