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-- PAX PipelineDAG β€” 3-stage async cp.async pipeline as event DAG (Layer 1.3)
-- Ahmad Ali Parr Β· PAX Architecture Β· sm_86

namespace PAX.PipelineDAG

abbrev EventId := β„•

/-- Happens-before as a strict partial order over EventIds -/
inductive HappensBefore : EventId β†’ EventId β†’ Prop
  | base  : βˆ€ a b, a < b β†’ HappensBefore a b
  | trans : βˆ€ a b c, HappensBefore a b β†’ HappensBefore b c β†’ HappensBefore a c

/-- 3-stage async pipeline DAG -/
structure PipelineDAG where
  stages       : β„•
  copyEvents   : List EventId   -- cp.async issued
  computeEvents: List EventId   -- mma.sync issued
  hbEdges      : List (EventId Γ— EventId)

/-- Pipeline overlap invariant:
    for each stage s, HB(copy[s], compute[s]) and HB(compute[s], copy[s+1]) -/
def hasOverlapInvariant (dag : PipelineDAG) : Prop :=
  βˆ€ i : β„•, i < dag.stages β†’
    let copyEv    := dag.copyEvents.get?    i
    let computeEv := dag.computeEvents.get? i
    let nextCopy  := dag.copyEvents.get?    (i + 1)
    (copyEv.isSome ∧ computeEv.isSome) β†’
      dag.hbEdges.contains (copyEv.get!, computeEv.get!) ∧
      (nextCopy.isSome β†’ dag.hbEdges.contains (computeEv.get!, nextCopy.get!))

/-- Throughput lower bound:
    A 3-stage async pipeline achieves β‰₯ (1 - 1/stages) Γ— min(compute_bw, memory_bw) -/
theorem pipeline_throughput_bound
    (stages : β„•) (hs : stages β‰₯ 2)
    (compute_bw memory_bw : β„š) (hpos : compute_bw > 0 ∧ memory_bw > 0) :
    let ideal := min compute_bw memory_bw
    let achieved := (1 - 1 / stages) * ideal
    achieved β‰₯ (1 / 2) * ideal := by
  simp only []
  have h2 : (stages : β„š) β‰₯ 2 := by exact_mod_cast hs
  have hstages_pos : (stages : β„š) > 0 := by linarith
  have h_frac : 1 / (stages : β„š) ≀ 1 / 2 := by
    apply div_le_div_of_nonneg_left _ (by norm_num) hstages_pos h2
    norm_num
  nlinarith [min_nonneg compute_bw memory_bw]

end PAX.PipelineDAG