Ternarycore/ternarycore-sst2-student
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Multiplier-free balanced ternary ({−1, 0, +1}) arithmetic for BitNet b1.58 inference on commodity FPGAs. We build the open hardware (CERN-OHL-S v2) and distil the ternary-weight students that run on it — silicon-validated on a low-cost Artix-7, with whole-board energy measured rather than estimated.