hamer-p150 / code /hamer /kernels /mcbench /dram_rd.cpp
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Optimized build (2026-10-03): model call 3.49 ms, device 3.36 ms
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// SPDX-FileCopyrightText: © 2026 Tenstorrent Inc.
// SPDX-License-Identifier: Apache-2.0
// DRAM read bandwidth micro-benchmark (plain reads + one plain barrier at the end).
// runtime: active, bank0, nbanks_rot, addr, chunk, reps, stride
// read r: bank (bank0 + r) % nbanks_rot ... if nbanks_rot == 0, always bank0; offset (r / max(1,nrot)) * stride
// data lands in a scratch CB (overwritten, contents irrelevant)
#include <stdint.h>
#include "api/dataflow/dataflow_api.h"
void kernel_main() {
if (!get_arg_val<uint32_t>(0)) {
return;
}
const uint32_t bank0 = get_arg_val<uint32_t>(1), nrot = get_arg_val<uint32_t>(2);
const uint32_t addr = get_arg_val<uint32_t>(3), chunk = get_arg_val<uint32_t>(4), reps = get_arg_val<uint32_t>(5);
const uint32_t stride = get_arg_val<uint32_t>(6), lsize = get_arg_val<uint32_t>(7);
const uint32_t buf = get_write_ptr(0);
uint32_t l = 0;
for (uint32_t r = 0; r < reps; ++r) {
const uint32_t bank = nrot ? (bank0 + r) % nrot : bank0;
const uint32_t off = (nrot ? r / nrot : r) * stride;
#ifdef L1_SRC // round 10: bank0 = (x << 8 | y) of a worker core, addr = an L1 address there (nrot must be 0)
noc_async_read(get_noc_addr(bank0 >> 8, bank0 & 0xff, addr + off), buf + l, chunk);
#else
noc_async_read(get_noc_addr_from_bank_id<true>(bank, addr + off), buf + l, chunk);
#endif
l += chunk;
if (l + chunk > lsize) {
l = 0;
}
}
noc_async_read_barrier();
}