repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
intel-xpu-backend-for-triton | github_2023 | cpp | 39 | intel | chengjunlu | @@ -948,6 +948,33 @@ struct ExpOpSPIRVConversionApprox
}
};
+struct AbsFOpConversion
+ : ElementwiseOpSPIRVConversionBase<mlir::math::AbsFOp, AbsFOpConversion> {
+ using Base =
+ ElementwiseOpSPIRVConversionBase<mlir::math::AbsFOp, AbsFOpConversion>;
+ using Base::Base;
+ using Adaptor = typename Base:... | Check how cuda support this.
|
intel-xpu-backend-for-triton | github_2023 | cpp | 43 | intel | chengjunlu | @@ -209,8 +209,16 @@ struct ConvertLayoutOpSPIRVConversion
if (vec == 1) {
if (stNotRd) {
auto currVal = vals[elemId + linearCTAId * accumSizePerThread];
- if (isInt1)
- currVal = zext(llvmElemTy, currVal);
+ if (isInt1) {
+ // If it is i1... | Directly use `select(currVal, int_val(8, 1), int_val(8, 0))` |
intel-xpu-backend-for-triton | github_2023 | cpp | 43 | intel | chengjunlu | @@ -209,8 +209,16 @@ struct ConvertLayoutOpSPIRVConversion
if (vec == 1) {
if (stNotRd) {
auto currVal = vals[elemId + linearCTAId * accumSizePerThread];
- if (isInt1)
- currVal = zext(llvmElemTy, currVal);
+ if (isInt1) {
+ // If it is i1... | // spriv::UConvert doesn't support i1 |
intel-xpu-backend-for-triton | github_2023 | cpp | 43 | intel | chengjunlu | @@ -279,7 +295,10 @@ struct ConvertLayoutOpSPIRVConversion
auto llvmElemTy = getTypeConverter()->convertType(dstTy.getElementType());
Value smemBase = getSharedMemoryBase(loc, rewriter, op.getOperation());
auto elemPtrTy = ptr_ty(llvmElemTy, spirv::StorageClass::Workgroup);
- smemBase = bitcast(smemBa... | Make change closely. move it to load the smemBase. |
intel-xpu-backend-for-triton | github_2023 | others | 35 | intel | chengjunlu | @@ -0,0 +1,10 @@
+# lit Tests
+
+TODO: We are on an active stage for adding lit tests, will add later. | Remove todo |
intel-xpu-backend-for-triton | github_2023 | others | 35 | intel | chengjunlu | @@ -0,0 +1,3 @@
+TODO: | Remove TODO |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,111 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest | Seems we need replace this `ubuntu-test` as a another `self-hosted` runner. |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,111 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix... | Remove the space in the last line (keep last line in EOF). |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,111 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix... | Can we also artifact those test logs? |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,111 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix... | Please use different name for different log file with different platforms |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,197 @@
+name: Nightly Tests
+
+on:
+ workflow_dispatch:
+ schedule:
+ - cron: "0 8,11 * * *"
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix
+ ... | Use different log file name |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,197 @@
+name: Nightly Tests
+
+on:
+ workflow_dispatch:
+ schedule:
+ - cron: "0 8,11 * * *"
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix
+ ... | For the UT results summary, do we need to do it separately by platform? |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,197 @@
+name: Nightly Tests
+
+on:
+ workflow_dispatch:
+ schedule:
+ - cron: "0 8,11 * * *"
+
+jobs:
+
+ Runner-Preparation:
+ runs-on: ubuntu-latest
+ outputs:
+ matrix: ${{ steps.set-matrix.outputs.matrix }}
+ steps:
+ - name: Prepare runner matrix
+ id: set-matrix
+ ... | Can we also artifact the openai/triton commit id which we used in nightly test if the nightly passed? Also other components info if needed, we can save them together. |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,185 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Integration-Tests:
+
+ runs-on: [self-hosted, PVC]
+
+ steps:
+
+ - name: Create conda environment
+ run: |
+ source ${HOME}/env_triton.sh
+ source ${H... | Could you please help to explain what's the `Failed Log`, `Failed Success Skip Log`, `Total Pass Rate Log(no matmul/dot)`, `Float32 Ralated Pass Rate Log(no matmul/dot)`, `Pass Rate Summary Log(no matmul/dot)` ? Can we use `Failed UT Cases`, ..., `UT Summary(no matmul/dot)` to instead of them? It can help others unders... |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,185 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Integration-Tests:
+
+ runs-on: [self-hosted, PVC]
+
+ steps:
+
+ - name: Create conda environment
+ run: |
+ source ${HOME}/env_triton.sh
+ source ${H... | Can we use `:` instead of `;`? And seems we don't need `"` for `num_matmul`, use `echo "num_matmul: $num_matmul"` directly. Same for others. |
intel-xpu-backend-for-triton | github_2023 | others | 13 | intel | chuanqi129 | @@ -0,0 +1,185 @@
+name: Integration Tests
+
+on:
+ workflow_dispatch:
+ pull_request:
+ branches:
+ - main
+
+jobs:
+
+ Integration-Tests:
+
+ runs-on: [self-hosted, PVC]
+
+ steps:
+
+ - name: Create conda environment
+ run: |
+ source ${HOME}/env_triton.sh
+ source ${H... | why we don't use `cat pass_rate_summary.log` directly? (you may need change the summary log file name as `ut_summary.log`) |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -317,20 +314,43 @@ struct FpToFpOpSPIRVConversion
static Value convertFp32ToBf16(Location loc,
ConversionPatternRewriter &rewriter,
const Value &v) {
- // TODO: add device capability check on this.
- if (false) {
+ if (isSupported(comput... | Make a trunc macro as others. |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -411,9 +431,16 @@ struct FpToFpOpSPIRVConversion
rewriter.replaceOp(op, result);
return success();
}
-
+ static std::map<std::string, int> computeCapability; | Not to copy capability to this class. |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -945,13 +972,16 @@ struct ExpOpSPIRVConversionApprox
}
};
+std::map<std::string, int> FpToFpOpSPIRVConversion::computeCapability; | Why another copy of the compute capability? |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | EikanWang | @@ -294,17 +294,14 @@ struct FpToFpOpSPIRVConversion
static Value convertBf16ToFp32(Location loc,
ConversionPatternRewriter &rewriter,
const Value &v) {
- // TODO: add device capability check on this.
- if (false) {
+ if (isSupported(comput... | Have you also tried intel math library? |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -950,6 +950,13 @@ class ConvertTritonGPUOpToSPIRVPattern
PatternBenefit benefit = 1)
: OpConversionPattern<SourceOp>(typeConverter, context, benefit),
ConvertTritonGPUOpToSPIRVPatternBase(typeConverter) {}
+
+ // explicit ConvertTritonGPUOpToSPI... | Remove used code |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -186,6 +198,9 @@ Value createConstantF32(Location loc, PatternRewriter &rewriter, float v);
/// Create a 64-bit float constant.
Value createConstantF64(Location loc, PatternRewriter &rewriter, float v);
+// /// Create a 16-bit bfloat16 constant.
+// Value createConstantBF16(Location loc, PatternRewriter &rewrite... | Remove unused code |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -316,21 +314,47 @@ struct FpToFpOpSPIRVConversion
static Value convertFp32ToBf16(Location loc,
ConversionPatternRewriter &rewriter,
- const Value &v) {
- // TODO: add device capability check on this.
- if (false) {
+ ... | special op is confusing. Just name it by its purpose. Like "intelConvertBF16Op" |
intel-xpu-backend-for-triton | github_2023 | cpp | 26 | intel | chengjunlu | @@ -12,6 +12,6 @@ void populateElementwiseOpToSPIRVPatterns(TritonGPUToSPIRVTypeConverter &typeCon
int numWarps,
ModuleAxisInfoAnalysis &axisInfoAnalysis,
ModuleAllocation *allocation,
- ... | Pass the reference instead of value.
|
intel-xpu-backend-for-triton | github_2023 | others | 30 | intel | chuanqi129 | @@ -19,16 +19,32 @@ jobs:
source ${HOME}/env_triton.sh
source ${HOME}/miniconda3/bin/activate triton-preci
conda install -y astunparse numpy ninja pyyaml setuptools cmake cffi typing_extensions future six requests dataclasses mkl mkl-include
-
+ conda install -y -c conda-... | Whether it can just run for the files changed by PR in the CI workflow? |
intel-xpu-backend-for-triton | github_2023 | cpp | 10 | intel | EikanWang | @@ -139,17 +181,17 @@ struct FuncOpConversion : public FuncOpConversionBase {
if (allocation.isRoot(funcOp)) {
// Set an attribute to indicate this function is a kernel entry.
+ // // Set an attribute for maxntidx, it could be used in latter LLVM codegen
+ // // for `nvvm.annotation` metad... | Since the code was commented earlier, why do we enable this line now? |
intel-xpu-backend-for-triton | github_2023 | cpp | 10 | intel | EikanWang | @@ -139,17 +181,17 @@ struct FuncOpConversion : public FuncOpConversionBase {
if (allocation.isRoot(funcOp)) {
// Set an attribute to indicate this function is a kernel entry.
+ // // Set an attribute for maxntidx, it could be used in latter LLVM codegen
+ // // for `nvvm.annotation` metad... | Do we still need these codes? |
intel-xpu-backend-for-triton | github_2023 | cpp | 11 | intel | chengjunlu | @@ -72,6 +72,12 @@ void init_triton_translation(py::module &m) {
py::bytes bytes(spvbin);
return std::move(bytes);
});
+ m.def("add_external_libs",
+ [](mlir::ModuleOp &op, const std::vector<std::string> &names,
+ const std::vector<std::string> &paths) {
+ std... | Remove std::cout |
intel-xpu-backend-for-triton | github_2023 | cpp | 11 | intel | chengjunlu | @@ -232,7 +232,9 @@ static std::map<std::string, std::string> getExternLibs(spirv::ModuleOp module)
if (!funcs.empty()) {
std::vector<std::string> lib_names = {"libsycl-fallback-imf.spv",
"libsycl-fallback-imf-fp64.spv",
- "libs... | What is this two lib for? |
intel-xpu-backend-for-triton | github_2023 | python | 9 | intel | EikanWang | @@ -249,7 +249,7 @@ def _extracted_type_pybind11(ty):
py::object &launch_exit_hook,
py::object &compiled_kernel,
{', '.join([f"{_extracted_type_pybind11(ty)} _arg{i}" for i, ty in signature.items()])}){{
- int threads_per_warp = 32;
+ int... | It requires the `compiled_kernel` must have an attribute named `threads_per_warp`. Have we supported it? |
intel-xpu-backend-for-triton | github_2023 | python | 3,719 | intel | whitneywhtsang | @@ -252,6 +252,18 @@ def make_ttgir(mod, metadata, opt, properties):
ir.source_mgr_diag(srcMgr, mod.context)
mod.context.printOpOnDiagnostic(True)
+ # Check threads_per_warp and num_threads are within limits. | Let's move the new block of code after
```
# Overwrite the threads_per_warp option with the module annotation.
opt.threads_per_warp = intel.get_threads_per_warp(mod)
```
Or else there could be error for cases that threads_per_warp will be reduced. |
intel-xpu-backend-for-triton | github_2023 | python | 3,719 | intel | etiotto | @@ -137,6 +137,15 @@ def check_type_supported(dtype, device):
pytest.xfail("float64 not supported on current xpu hardware")
+def check_threads_supported(num_warps, threads_per_warp, device):
+ device = triton.runtime.driver.active.get_current_device() | The device is passed in to this function, I think you might have the intention to use it. Here is overwritten? |
intel-xpu-backend-for-triton | github_2023 | others | 3,733 | intel | whitneywhtsang | @@ -0,0 +1,113 @@
+ | remove
```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,733 | intel | whitneywhtsang | @@ -0,0 +1,113 @@
+
+// RUN: triton-opt %s -triton-intel-remove-masks | FileCheck %s
+
+module {
+ // COM: Derived from tutorial 03-matrix-multiplication.
+ tt.func public @test_kernel(%arg0: !tt.ptr<f16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f16> {tt.divisibil... | These checks doesn't ensure masks are removed. same for the other tests. |
intel-xpu-backend-for-triton | github_2023 | others | 3,733 | intel | whitneywhtsang | @@ -0,0 +1,113 @@
+
+// RUN: triton-opt %s -triton-intel-remove-masks | FileCheck %s
+
+module {
+ // COM: Derived from tutorial 03-matrix-multiplication.
+ tt.func public @test_kernel(%arg0: !tt.ptr<f16> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f16> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f16> {tt.divisibil... | Why types are no longer `tensor<64x32x!tt.ptr<f16>>` and `tensor<32x128x!tt.ptr<f16>>`? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,778 | intel | whitneywhtsang | @@ -63,9 +63,15 @@ struct TritonIntelTensorDescToBlockPointer
moduleOp->walk<WalkOrder::PreOrder>([&](Operation *op) {
return TypeSwitch<Operation *, WalkResult>(op)
.Case<tt::DescriptorLoadOp>([&](auto loadOp) { | could do `.Case<tt::DescriptorLoadOp, tt::DescriptorStoreOp>([&](auto loadOrStoreOp) {`? |
intel-xpu-backend-for-triton | github_2023 | others | 3,789 | intel | gshimansky | @@ -0,0 +1,167 @@
+name: PyTorch inductor tests on Windows
+run-name: ${{ inputs.run_name }}
+
+on:
+ workflow_dispatch:
+ inputs:
+ pytorch_ref:
+ description: PyTorch ref, keep empty for default
+ type: string
+ default: ""
+ suite:
+ description: Space separated lists of tes... | Is Triton version used anywhere or is this just a debug step? |
intel-xpu-backend-for-triton | github_2023 | others | 3,789 | intel | gshimansky | @@ -194,6 +194,9 @@ function build_pytorch {
echo "****** Building $PYTORCH_PROJ ******"
cd "$PYTORCH_PROJ"
+ # FIXME: Compatibility with versions of CMake older than 3.5 has been removed, this brakes compilation of third_party/protobuf: | ```suggestion
# FIXME: Compatibility with versions of CMake older than 3.5 has been removed, this breaks compilation of third_party/protobuf:
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,788 | intel | whitneywhtsang | @@ -96,7 +96,8 @@ struct TritonIntelTensorDescToBlockPointer
"Unexpected 'initArgIdx' value");
return getMakeTensorDescOp(initArgs[initArgIdx]);
}
- LLVM_DEBUG(llvm::dbgs() << "TODO: unhandled defOp: " << *defOp << "\n");
+ LLVM_DEBUG(llvm::dbgs()
+ << "TODO: Un... | How about?
```suggestion
LLVM_DEBUG(llvm::dbgs()
<< "TODO: Unhandled non operation: " << base << "\n");
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,795 | intel | chengjunlu | @@ -39,6 +41,30 @@ module attributes {"ttg.num-ctas" = 1 : i32, ttg.target = "xpu", triton_intel_gp
%16 = tt.make_tensor_ptr %arg0, [%c0_i64, %c0_i64], [%c1_i64, %pitch_odd], [%c0_i32, %c0_i32] {order = array<i32: 0, 1>} : <tensor<32x64xf16, #dot_b>>
%17 = tt.load %15 {boundaryCheck = array<i32: 1>, cache = 1... | Use a non-4 bytes aligned base case. |
intel-xpu-backend-for-triton | github_2023 | others | 3,795 | intel | chengjunlu | @@ -39,6 +41,30 @@ module attributes {"ttg.num-ctas" = 1 : i32, ttg.target = "xpu", triton_intel_gp
%16 = tt.make_tensor_ptr %arg0, [%c0_i64, %c0_i64], [%c1_i64, %pitch_odd], [%c0_i32, %c0_i32] {order = array<i32: 0, 1>} : <tensor<32x64xf16, #dot_b>>
%17 = tt.load %15 {boundaryCheck = array<i32: 1>, cache = 1... | Use a non-4 bytes aligned offset case. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,795 | intel | whitneywhtsang | @@ -69,6 +69,21 @@ bool isDivisible(Value value, unsigned divisor) {
if (auto extSIOp = value.getDefiningOp<arith::ExtSIOp>())
return isDivisible(extSIOp->getOperand(0), divisor);
+ // Case 4: Value is defined by an add ptr operation. | can we generalize case 3, 4, 6 by first checking value is the expected operation, then return true if all_of the operands are `isDivisible` by `divisor`? |
intel-xpu-backend-for-triton | github_2023 | others | 3,756 | intel | mfrancepillois | @@ -0,0 +1,25 @@
+// RUN: triton-opt %s -triton-intel-tdesc-to-block-pointer | FileCheck %s | Adding a test when the `tl.descriptor_load` occurs in the body of a loop and the tensor descriptor is created before the loop could be interesting for improving test coverage. |
intel-xpu-backend-for-triton | github_2023 | others | 3,756 | intel | mfrancepillois | @@ -0,0 +1,38 @@
+// RUN: triton-opt %s -triton-intel-tdesc-to-block-pointer | FileCheck %s
+
+module {
+ tt.func public @load_in_loop(%arg0: !tt.ptr<f16>, %arg1: i32, %arg2: i32) {
+ %c0 = arith.constant 0 : index
+ %c1 = arith.constant 1 : index
+ %c10 = arith.constant 10 : index
+ %c1_i64 = arith.c... | If I remember correctly, when you improved the pointer raising pass you added a function to hoist `MakeTensorPtrOp` out of the loop body. Having something similar here would probably help with performance. |
intel-xpu-backend-for-triton | github_2023 | others | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,25 @@
+// RUN: triton-opt %s -triton-intel-tdesc-to-block-pointer | FileCheck %s
+
+module {
+ tt.func public @test1(%arg0: !tt.ptr<i16>, %arg1: i32, %arg2: i32) {
+ %c1_i64 = arith.constant 1 : i64
+ %c64_i32 = arith.constant 64 : i32
+ %c8_i32 = arith.constant 8 : i32
+ %0 = arith.extsi %arg2... | consecutive DAG would be ok too. |
intel-xpu-backend-for-triton | github_2023 | others | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,25 @@
+// RUN: triton-opt %s -triton-intel-tdesc-to-block-pointer | FileCheck %s
+
+module {
+ tt.func public @test1(%arg0: !tt.ptr<i16>, %arg1: i32, %arg2: i32) {
+ %c1_i64 = arith.constant 1 : i64
+ %c64_i32 = arith.constant 64 : i32
+ %c8_i32 = arith.constant 8 : i32
+ %0 = arith.extsi %arg2... | How about adding CHECK-NOT make_tensor_desciptor and desciptor_load? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,228 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Verifier.h"
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/TypeSwitch.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/Erro... | ```suggestion
// Case 1: the ptr has already been mapped.
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,228 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Verifier.h"
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/TypeSwitch.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/Erro... | what if the descriptor is modified in the loop? taking the initial value may be incorrect? |
intel-xpu-backend-for-triton | github_2023 | others | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,97 @@
+// RUN: triton-opt %s -triton-intel-tdesc-to-block-pointer | FileCheck %s
+
+module {
+ // COM: Loop containing a tensor descriptor load operation using a loop invariant tensor descriptor.
+ tt.func public @load_in_loop1(%arg0: !tt.ptr<f16>, %arg1: i32, %arg2: i32) {
+ %c0 = arith.constant 0 : i... | in the next PR, we could fallback to tensor of pointers tt.load when we cannot prove it is safe to translate to block pointer? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,233 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Verifier.h"
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "triton/Dialect/Triton/IR/Types.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/TypeSwitch.h"
+#include "llvm/... | Given that `findOrCreateCast` only creates `ExtSIOp`, how about adding assertion to ensure val.getType() and tgtType are integer type and val.getType() size is smaller than tgtType? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,233 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Verifier.h"
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "triton/Dialect/Triton/IR/Types.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/TypeSwitch.h"
+#include "llvm/... | Not sure I understand this comment, why the code below is related to this comment? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,756 | intel | whitneywhtsang | @@ -0,0 +1,233 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "mlir/IR/BuiltinTypes.h"
+#include "mlir/IR/Verifier.h"
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "triton/Dialect/Triton/IR/Types.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/TypeSwitch.h"
+#include "llvm/... | how about removing double negative like:
```suggestion
LLVM_DEBUG(llvm::dbgs() << blockArg << "is loop variant");
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,763 | intel | whitneywhtsang | @@ -242,18 +244,25 @@ struct LoadStoreConversionBase {
ptrElems[i] = b.gep(ptr_ty(rewriter.getContext(), 1 /*global*/),
valueElemTy, blockPtr[blockBase], offset);
- if (boundaryCheck.size() > 0) {
+ if (boundaryProtect.size() > 0) {
// Get the LLVM values for mask
... | ```suggestion
auto is_pos_idx = b.icmp_sge(index, b.i32_val(0));
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,763 | intel | etiotto | @@ -242,18 +244,25 @@ struct LoadStoreConversionBase {
ptrElems[i] = b.gep(ptr_ty(rewriter.getContext(), 1 /*global*/),
valueElemTy, blockPtr[blockBase], offset);
- if (boundaryCheck.size() > 0) {
+ if (boundaryProtect.size() > 0) {
// Get the LLVM values for mask
... | ```suggestion
}
return mask;
``` |
xFasterTransformer | github_2023 | python | 492 | intel | Duyi-Wang | @@ -52,53 +52,59 @@ def launch(self, server_name="0.0.0.0", server_port=7860, share=False):
with gr.Column(scale=1):
emptyBtn = gr.Button("Clear History")
- history = gr.State([])
submitBtn.click(
self.predict,
- [user_input... | need to check whether "metadata" exists. |
xFasterTransformer | github_2023 | cpp | 460 | intel | pujiang2018 | @@ -1571,13 +1573,26 @@ class MMHelper {
Resext,
};
- template <typename Twei>
- std::string create_key(bool transA, int M, int N, int K, int matmul_kind, const Twei *packedB) {
+ std::string create_key(bool transA, int M, int N, int K, int matmul_kind, const void *packedB = nullptr) {
... | To check if M is in power of 2: (M&(M−1))==0 |
xFasterTransformer | github_2023 | cpp | 456 | intel | changqi1 | @@ -1829,11 +1852,11 @@ class MMHelper {
stream->wait();
}
- template <typename Tin, typename Tout>
- void onednn_amx_sgemm_f32bf16f32_compute(bool transA, int M, int N, int K, float alpha, const Tin *A, int lda,
- const bfloat16_t *packedB, float beta, Tout *C, int ldc, const matmul_ki... | reanme onednn_amx_gemm_compute? |
xFasterTransformer | github_2023 | cpp | 456 | intel | changqi1 | @@ -2213,12 +2248,12 @@ class MMHelper {
stream->wait();
}
- template <typename Tin, typename Tout>
- void onednn_amx_sgemm_f32bf16f32_compute_residential(bool transA, int M, int N, int K, float alpha, const Tin *A,
- int lda, const bfloat16_t *packedB, float beta, Tout *C, int ldc, con... | reanme onednn_amx_gemm_compute_residential? |
xFasterTransformer | github_2023 | cpp | 449 | intel | pujiang2018 | @@ -450,6 +449,81 @@ void qwenApplyRotaryPosEmbeding(float16_t *query, float16_t *key, int qStride, i
maxSupportedSeqLength, qkShape, positionIds);
}
+template <typename T>
+static inline void qwenApplyRotaryPosEmbed(T *query, T *key, float *emb_cos, float *emb_sin, int qStride, int kStride,
+ in... | For next step, considering first token, should we swap the 2 loops to make each thread accessing contiguous memory? may deserve to test such implementation.
OK for current version. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -26,11 +30,18 @@ static inline bool is_thp_alloc(size_t nbytes) {
return (Env::getInstance().getTHPEnabled() && (nbytes >= g_thp_threshold));
}
-static inline void *alloc(size_t nbytes, size_t alignment = 64) {
+static inline void *alloc(size_t nbytes, size_t alignment = 64, void *device = nullptr) {
if... | The allocation may fail, need to deal with the fail case? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -294,6 +294,11 @@ class Attention {
std::iota(posIds.begin(), posIds.end(), pastSeqLen);
}
qkpo.forward(query.Data(), key.Data(), query.Stride(), key.Stride(), qkShape, posIds.data());
+#ifdef GPU
+ sycl::queue *q = static_cast<sycl::queue *>(ctx->device);
+ ... | why do we need a copy here? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -275,8 +275,7 @@ class LlamaMLP : public SingletonBase<LlamaMLP<WeiT>> {
}
}
- template <typename T1, typename T2>
- void catGateUpProj(DecoderContext *ctx, hpj::Matrix<T1> &input, hpj::Matrix<T2> &output, hpj::Matrix<T2> &siluBuf) {
+ void catGateUpProj(DecoderContext *ctx, hpj::Matrix<InT>... | changed because of compiler error/warning? suggest using OutT for output. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -349,8 +349,11 @@ class MMHelper {
// W8A8
else if constexpr (std::is_same_v<WeiT, w8a8_t>) {
using dt = dnnl::memory::data_type;
+ dnnl::engine eng(dnnl::engine::kind::cpu, 0);
+ dnnl::stream stm(eng); | why now need to create an engine and stream every time calling into the function? it may impact the performance. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -81,6 +82,20 @@ class SequenceMeta {
, promptTokens(_inputSeqLen, 0)
, step(0) {}
+ SequenceMeta(int32_t _sequenceID, std::vector<int32_t> &_promptTokens) | Suggest "const std::vector<int32_t> &_promptTokens" if not modified. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -51,6 +51,8 @@ class Attention {
//todo(marvin): clear this code after all rotary_emb refactor
if constexpr (std::is_same<QKPO_CLS, LlamaRotaryEmbedding>::value) { qkpo = LlamaRotaryEmbedding(ctx); }
+ norm = new NORM_CLS(ctx); | delete the object in destructor? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -52,11 +59,18 @@ void LayerNorm::setWeight(const std::string &gammaPath, const std::string &betaP
// input and output are in shape of (rows, normSize)
// TODO: column-wise parallel
+#ifdef GPU
+void LayerNorm::forward(const float *input, float *output, int rows, int iStride, int oStride, float epsilon) { | Here GPU version not implemented yet? Add TODO? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -38,12 +38,10 @@
// def forward(self, x):
// return self.down_proj(self.act_fn(self.gate_proj(x)) * self.up_proj(x))
// But please also be noted: we extended the MLP to include layer norm
-template <typename WeiT, typename InT = float, typename ImT = float, typename OutT = float>
-class LlamaMLP : public ... | delete added in destructor or not? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -29,21 +34,58 @@ RmsNorm::RmsNorm() {
normSize = 0;
}
+RmsNorm::RmsNorm(DecoderContext *ctx) {
+ device = ctx->device;
+ weight = nullptr;
+ normSize = 0;
+}
+
RmsNorm::~RmsNorm() {
- if (weight) { free(weight); }
+ if (weight) { xft::dealloc(weight); }
}
void RmsNorm::setWeight(const flo... | add TODO here? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -31,6 +31,7 @@ LlamaLLM<WeiT, KVCacheT>::LlamaLLM(const std::string &modelPath)
setEmbeddingWeights(modelPath);
// Final LN
+ finalLN = new RmsNorm(ctx); | Have we deleted the object? |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -86,7 +86,7 @@ static void selfAttentionRef(bfloat16_t *output, bfloat16_t *query, bfloat16_t *
int kvHeadNum, int headSize, int oStride, int qStride, int kvStride, int batchSize, const int *tokenSizes,
const float scale) {
- int rowOffsets[batchSize] = {0};
+ int rowOffsets[batchSize]; | delete the initializer will make rowOffsets[0] not initialized. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -1398,18 +1436,19 @@ class MMHelper {
Resext,
};
- std::string create_key(bool transA, int M, int N, int K, int matmul_kind) {
- std::string key = std::to_string(transA) + "_" + std::to_string(M) + "_" + std::to_string(N) + "_"
- + std::to_string(K) + "_" + std::to_string(mat... | next step we need a better version for this function, OK with current version. |
xFasterTransformer | github_2023 | cpp | 372 | intel | pujiang2018 | @@ -1420,33 +1459,273 @@ class MMHelper {
if (this->kind == dnnl::engine::kind::cpu) {
if (dt == dnnl::memory::data_type::bf16) {
return dnnl::memory::format_tag::BA16a64b2a;
+ } else if (dt == dnnl::memory::data_type::f16) {
+ return dnnl::memory::format... | deleted the object or not? |
xFasterTransformer | github_2023 | cpp | 436 | intel | changqi1 | @@ -241,6 +241,38 @@ class MMHelper {
}
}
+ // INT8 -> BF16
+ else if constexpr (std::is_same_v<OriWeiT, int8_t> && std::is_same_v<WeiT, bfloat16_t>) {
+#pragma omp parallel for
+ for (uint64_t i = 0; i < rowSize; i++) {
+ for (uint64_t j = 0; j < colSize;... | dst[0] = static_cast<bfloat16_t>(scale1 * src->get_v1() + zero1);
dst[1] = static_cast<bfloat16_t>(scale2 * src->get_v2() + zero2); |
xFasterTransformer | github_2023 | others | 431 | intel | pujiang2018 | @@ -300,14 +311,65 @@ A web demo based on [Gradio](https://www.gradio.app/) is provided in repo. Now s
- Run the script corresponding to the model. After the web server started, open the output URL in the browser to use the demo. Please specify the paths of model and tokenizer directory, and data type. `transformer`'s... | Suggestion: A fork of vLLM has been created to integrate the xFasterTransformer backend, maintaining compatibility with most of the official vLLM's features. |
xFasterTransformer | github_2023 | others | 431 | intel | pujiang2018 | @@ -297,13 +308,66 @@ while (1) {
```bash
# 推荐预加载`libiomp5.so`来获得更好的性能。
# `libiomp5.so`文件会位于编译后`3rdparty/mklml/lib`文件夹中。
-LD_PRELOAD=libiomp5.so python examples/web_demo/ChatGLM.py \
- --dtype=bf16 \
- --token_path=${TOKEN_PATH} \
- ... | Suggestion: vllm-xft项目创建了vLLM的一个分支版本，该版本集成了xFasterTransformer后端以提高性能，同时保持了与官方vLLM大多数功能的兼容性。 |
xFasterTransformer | github_2023 | cpp | 423 | intel | pujiang2018 | @@ -161,7 +161,7 @@ class Messenger {
TimeLine t("Messenger.reduceAdd");
#ifdef USE_SHM
- if (sizeof(T) * count > pshm->getSHMSize() || !localRanksFlag) {
+ if (!localRanksFlag || (pshm != nullptr && sizeof(T) * count > pshm->getSHMSize())) { | Do we also need to add a condition "pshm == nullptr" ? |
xFasterTransformer | github_2023 | cpp | 417 | intel | pujiang2018 | @@ -93,6 +93,113 @@ class MMHelper {
// transposed not_transposed
//
+// need revise in xdnn
+#define BLOCK_N 64
+ void xdnn_hgemm_f32f16f32_packb(bool transB, int N, int K, const XDNN_FP16 *B, int ldb, XDNN_FP16 *packedB) { | Do you want to put to 'kernels' directory in current version? |
xFasterTransformer | github_2023 | others | 409 | intel | Duyi-Wang | @@ -117,18 +135,16 @@ beam_width=${beam_width:-1}
iter=${iter:-10}
warmup=${warmup:-2}
-Info "You are using model ${model_name}, dtype ${dtype}, kvcache dtype ${kv_cache_dtype}, batch size ${batch_size}, input tokens ${input_tokens}, output tokens ${output_tokens}, beam width ${beam_width} and iteration ${iter} on ... | drop this change. |
xFasterTransformer | github_2023 | cpp | 408 | intel | pujiang2018 | @@ -327,6 +327,94 @@ void QwenRotaryEmbedding::forward(
}
}
+void QwenRotaryEmbedding::forward(
+ float16_t *query, float16_t *key, int qStride, int kStride, const int *qkShape, const int *positionIds) {
+ int dim = this->inv_freq_size * 2;
+ REQUIRES(dim == qkShape[3], "Incorrect shape, this dimen... | consider to use xft::load_avx512 to make the code simpler? |
xFasterTransformer | github_2023 | cpp | 408 | intel | pujiang2018 | @@ -327,6 +327,94 @@ void QwenRotaryEmbedding::forward(
}
}
+void QwenRotaryEmbedding::forward( | possible to just maintain one forward if the 2 forward functions are similar? |
xFasterTransformer | github_2023 | cpp | 228 | intel | pujiang2018 | @@ -18,10 +18,10 @@
#include "INIReader.h"
#include "chatglm2.h"
-template <typename WeiT, typename NormT>
-ChatGLM2<WeiT, NormT>::ChatGLM2(const std::string &modelPath, const std::string &modelType)
- : CommonDecoder<Attention<WeiT, ChatGLM2RotaryEmbedding, NormT, float, float, float, true>,
- ChatGL... | previous code contains 2 template parameters:
"template <typename WeiT, typename NormT>"
So, here the normalization operator will always be RmsNorm? |
xFasterTransformer | github_2023 | cpp | 398 | intel | pujiang2018 | @@ -98,6 +102,8 @@ class Model {
bool setStopWords(std::vector<std::vector<int>> stopWordsList);
+ bool freeSeqs(std::vector<int> seqIDs); | why not consider passing the parameter by reference? |
xFasterTransformer | github_2023 | cpp | 386 | intel | pujiang2018 | @@ -38,4 +38,17 @@ enum DeviceKind {
iCPU = 0,
iGPU,
};
+
+enum NormType {
+ RMS = 0,
+ Layer, | Is "LN" better than "Layer"? |
xFasterTransformer | github_2023 | cpp | 386 | intel | pujiang2018 | @@ -0,0 +1,223 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless require... | we are deprecating attention mask, so need to change this in future. |
xFasterTransformer | github_2023 | cpp | 381 | intel | pujiang2018 | @@ -53,12 +53,14 @@ class Model {
int padTokenId_ = -1, bool doSample_ = false, float temperature_ = 1.0, int topK_ = 50, float topP_ = 1.0,
float repetitionPenalty_ = 1.0, const std::vector<std::vector<int>> &stopWordsList_ = {});
+ // Only used for model.forward()
+ std::vector<int> ... | why with a dash "inputIds_"? |
xFasterTransformer | github_2023 | cpp | 381 | intel | pujiang2018 | @@ -75,6 +77,10 @@ class Model {
int getVocabSize() { return this->vocabSize; }
+ void initMaxSeqLen(); | didn't see initMaxSeqLen called? |
xFasterTransformer | github_2023 | cpp | 381 | intel | pujiang2018 | @@ -28,6 +28,7 @@ class KVCacheMgrImplBase {
virtual bool reorderCache(const std::vector<int> &seqIDs, const std::vector<int> &prevSeqIDs) = 0;
virtual bool addPrefix(int prefixId, int seqID) = 0;
virtual bool prepareCache(const std::vector<int> &seqIDs) = 0;
+ virtual bool isExist(int seqID) const = ... | is and exist are both verb. Just 'exist' may be OK. |
xFasterTransformer | github_2023 | cpp | 381 | intel | pujiang2018 | @@ -316,6 +321,53 @@ std::vector<int> Model::set_input(std::vector<std::vector<int32_t>> &inputIds_,
return seqIDs;
}
+std::vector<int> Model::set_input(std::vector<std::vector<int32_t>> &inputIds_, std::vector<int> seqIDs, int maxLen) {
+ Messenger &messenger = Messenger::getInstance();
+ SequencePool &s... | Why not put 'stepForward' to forward serial function? |
xFasterTransformer | github_2023 | others | 327 | intel | marvin-Yu | @@ -0,0 +1,53 @@
+### PyTorch LLAMA2 7B lora apalca finetuning
+
+## Description
+This document is a guide for running LLaMA2 7B lora apalca finetuning using PyTorch on CPU.
+
+## Step-by-step run guide
+# Prepare dependency
+wget https://intel-extension-for-pytorch.s3.amazonaws.com/ipex_stable/cpu/oneccl_bind_pt-2.0.0... | it would be better to display the relevant code commands using the markdown code format.
https://www.markdownguide.org/extended-syntax/#fenced-code-blocks |
xFasterTransformer | github_2023 | cpp | 383 | intel | pujiang2018 | @@ -0,0 +1,134 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless require... | currently we have imbalance tasks inside omp block, we could optimize it in next stage. |
xFasterTransformer | github_2023 | cpp | 383 | intel | pujiang2018 | @@ -0,0 +1,134 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless require... | now we can use xft::load_avx512 to make it shorter. |
xFasterTransformer | github_2023 | cpp | 383 | intel | pujiang2018 | @@ -468,22 +468,23 @@ class Attention {
// Apply post operations on query and key
TimeLine t3("QKPO");
- // TODO: call into rotary embedding
- // int qheads = this->endQHead - this->startQHead;
- // int kheads = this->endKVHead - this->startKVHead;
- // int qkShape[7] = {... | will put totInputSeqLen into parameters in next stage. |
xFasterTransformer | github_2023 | cpp | 383 | intel | pujiang2018 | @@ -160,22 +113,22 @@ void LlamaYaRNScaledRotaryEmbedding::forward(
for (int bs = 0; bs < batchSize; ++bs) {
for (int seq = 0; seq < seqLen; ++seq) {
int pos = positionIds[seq];
- float *pcos = embCos + pos * dim;
- float *psin = embSin + pos * dim;
+... | Original code is:
float *pcos = embCos + pos * dim;
are we sure need to change to current code?
float *pcos = embCos + pos * half; |
xFasterTransformer | github_2023 | cpp | 378 | intel | Duyi-Wang | @@ -0,0 +1,129 @@
+// Copyright (c) 2023 Intel Corporation | 2024 |
xFasterTransformer | github_2023 | cpp | 378 | intel | pujiang2018 | @@ -44,4 +58,11 @@ void invokeAttention(DataType dt,
const int batch_size, const int *token_lens, const void *kcache, const void *vcache, int *kvcache_shape,
int *block_tables, int *block_nums, int *context_lens, int layer_id, bool is_prefill, int *slot_mapping);
+void invokeAttentionLLaMA(DataType ... | Do we really need "int maxPositions, int maxPosEmbed, int maxSeqLength" and "int step"? |
xFasterTransformer | github_2023 | cpp | 378 | intel | pujiang2018 | @@ -0,0 +1,179 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless require... | The KV cache is managed by us, aligned with customer's needs? |
xFasterTransformer | github_2023 | cpp | 378 | intel | pujiang2018 | @@ -109,4 +109,4 @@ class DecoderRegister {
MODEL(IMPLEMENT, CLASS, NAME)
#define REGISTER_MODEL(CLASS, NAME) \
- MODEL(REGISTER, CLASS, NAME)
\ No newline at end of file
+ MODEL(REGISTER, CLASS, NAME) | Here we need a blank line to avoid compile warning. |
xFasterTransformer | github_2023 | cpp | 379 | intel | Duyi-Wang | @@ -77,7 +82,12 @@ class KVCacheMgrImpl : public KVCacheMgrImplBase {
cache = freeCaches.back();
freeCaches.pop_back();
} else {
- cache = new KVCacheTensor<T>[2 * layers];
+ cache = new KVCacheTensor<T>[2 * layers_];
+ }
+
+ auto maxLen = maxSeqLen... | Check whether maxSeqLen is larger than this->maxSeqlen |
xFasterTransformer | github_2023 | cpp | 375 | intel | Duyi-Wang | @@ -265,10 +254,6 @@ class CommonDecoder : public AbstractDecoder {
if (this->attnMask) free(this->attnMask);
delete this->predictor;
- | Free the decoderBlock here? |
xFasterTransformer | github_2023 | cpp | 375 | intel | Duyi-Wang | @@ -0,0 +1,348 @@
+// Copyright (c) 2023 Intel Corporation | 2024 |
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