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| /* SPDX-License-Identifier: Apache-2.0 | |
| * | |
| * CX3 runtime (campaign ABI 2). The compiler (compiler/cx3q2.py) emits one CX3 program for the whole network in | |
| * payload/cx3.bin, a writable placement at CX3_IMAGE_ADDR that holds the program, the weights and the activation | |
| * buffers; it is linked at CX3_LINK_BASE and the NPU adds RELOC to every DRAM address it issues. | |
| * | |
| * prepare: RELOC = image placement - link base. | |
| * query: the input stage writes the int8 input map into the image's input streams (pixel (y, x), channel c at | |
| * in_base + (y % P) * sstride + ((y / P) * W + x) * K3 + c), PROG = the program, CTRL = run; a STATUS | |
| * read is held by the NPU until it is idle (every write acknowledged); the outputs are gathered from the | |
| * layers' regions into the record (cx3_seg: one entry per layer output, NHWC, K3-byte pixels). | |
| * | |
| * The input stage is the semantics' own: one 256-entry table per channel for a uint8 sensor input (the compiler | |
| * folds the model's normalisation into them), or q = rne(x * 2^k) for an FP32 NCHW input. A transformer (mode 3) | |
| * reads tokens: token 0 is the class token's slot (the zero point), token 1 + py * W / K + px the K x K patch | |
| * (py, px) of the table-quantised image, its bytes in (channel, ky, kx) order (cx3deit_sem.tokens). | |
| */ | |
| extern int8_t cx3_record[]; | |
| /* host view of an image (link) address */ | |
| static const int8_t *in_tables; | |
| static int32_t sat32(int64_t v) { | |
| return v > INT32_MAX ? INT32_MAX : v < INT32_MIN ? INT32_MIN : (int32_t)v; | |
| } | |
| /* uint8 NHWC with 3 channels (every panel model): the tables live in the data TCM, the input is read as words and | |
| * each pixel's 3 bytes are stored as one word (the 4th byte is K3 padding, never weighted) */ | |
| static uint32_t tw3[3][256]; /* input channel k, byte v -> its table value at its output channel's byte */ | |
| /* q = round_to_nearest_even(x * 2^k), saturated to int8; x is an IEEE fp32 bit pattern (the starter's). */ | |
| static int8_t quant_fp32(uint32_t b, int32_t k) { | |
| uint32_t e = (b >> 23) & 0xffu, m = b & 0x7fffffu, mag; | |
| int32_t sh; | |
| if (e == 0xffu) { | |
| if (m) return 0; | |
| mag = 255; | |
| } else { | |
| uint32_t mant = e ? (m | 0x800000u) : m; | |
| sh = e ? (int32_t)e - 150 + k : k - 149; | |
| if (mant == 0) mag = 0; | |
| else if (sh >= 0) mag = (sh >= 8 || mant > (255u >> sh)) ? 255u : mant << sh; | |
| else { | |
| uint32_t n = (uint32_t)(-sh); | |
| if (n > 25) mag = 0; | |
| else { | |
| uint32_t q = mant >> n, rem = mant & ((1u << n) - 1u), half = 1u << (n - 1u); | |
| if (rem > half || (rem == half && (q & 1u))) ++q; | |
| mag = q; | |
| } | |
| } | |
| } | |
| int32_t v = (b >> 31) ? -(int32_t)(mag > 128u ? 128u : mag) : (int32_t)(mag > 127u ? 127u : mag); | |
| return (int8_t)v; | |
| } | |
| /* The input map into the image's slot streams (bytes past C in each K3-byte pixel are never weighted). */ | |
| static void input_stage_fast3(const uint8_t *x) { | |
| uint8_t *base = (uint8_t *)HOST(CX3_IN_BASE); | |
| const uint32_t *xw = (const uint32_t *)x; | |
| const uint32_t *t0 = tw3[0], *t1 = tw3[1], *t2 = tw3[2]; | |
| for (uint32_t y = 0; y < CX3_IN_H; ++y) { | |
| uint32_t *pix = (uint32_t *)(base + (y % CX3_P) * CX3_IN_SSTRIDE + (y / CX3_P) * CX3_IN_W * CX3_IN_K3); | |
| for (uint32_t xx = 0; xx < CX3_IN_W; xx += 4u, xw += 3) { | |
| uint32_t a = xw[0], b = xw[1], c = xw[2]; /* 4 pixels: a0 a1 a2 | a3 b0 b1 | b2 b3 c0 | c1 c2 c3 */ | |
| pix[0] = t0[a & 0xffu] | t1[(a >> 8) & 0xffu] | t2[(a >> 16) & 0xffu]; | |
| pix += CX3_IN_K3 / 4u; | |
| pix[0] = t0[a >> 24] | t1[b & 0xffu] | t2[(b >> 8) & 0xffu]; | |
| pix += CX3_IN_K3 / 4u; | |
| pix[0] = t0[(b >> 16) & 0xffu] | t1[b >> 24] | t2[c & 0xffu]; | |
| pix += CX3_IN_K3 / 4u; | |
| pix[0] = t0[(c >> 8) & 0xffu] | t1[(c >> 16) & 0xffu] | t2[c >> 24]; | |
| pix += CX3_IN_K3 / 4u; | |
| } | |
| } | |
| } | |
| static uint8_t tt[CX3_IN_C][256]; /* token channel c, input byte v -> its table value (data TCM) */ | |
| static void input_stage_tokens(const uint8_t *x) { | |
| static const uint32_t in_perm[] = {CX3_IN_PERM0, CX3_IN_PERM1, CX3_IN_PERM2}; | |
| const uint32_t k = CX3_TOK_K, wp = CX3_IN_W / CX3_TOK_K, c = CX3_IN_C; | |
| uint8_t *base = (uint8_t *)HOST(CX3_IN_BASE); | |
| for (uint32_t i = 0; i < c * k * k; ++i) base[i] = (uint8_t)CX3_TOK_ZP; /* token 0: slot 0, position 0 */ | |
| for (uint32_t y = 0; y < CX3_IN_H; ++y) { | |
| const uint8_t *src = x + y * CX3_IN_W * c; | |
| for (uint32_t px = 0; px < wp; ++px) { | |
| const uint32_t t = 1u + (y / k) * wp + px; | |
| uint8_t *tok = base + (t % CX3_P) * CX3_IN_SSTRIDE + (t / CX3_P) * CX3_IN_K3 + (y % k) * k; | |
| for (uint32_t ch = 0; ch < c; ++ch) { | |
| const uint8_t *s = src + in_perm[ch], *tab = tt[ch]; | |
| uint8_t *d = tok + ch * k * k; | |
| for (uint32_t kx = 0; kx < k; ++kx) d[kx] = tab[s[kx * c]]; | |
| } | |
| src += k * c; | |
| } | |
| } | |
| } | |
| static void input_stage(const uint8_t *x) { | |
| input_stage_tokens(x); | |
| return; | |
| if (FAST3) { input_stage_fast3(x); return; } | |
| static const uint32_t in_perm[] = {CX3_IN_PERM0, CX3_IN_PERM1, CX3_IN_PERM2}; | |
| uint8_t *base = (uint8_t *)HOST(CX3_IN_BASE); | |
| const uint32_t h = CX3_IN_H, w = CX3_IN_W, c = CX3_IN_C; | |
| for (uint32_t y = 0; y < h; ++y) { | |
| uint8_t *row = base + (y % CX3_P) * CX3_IN_SSTRIDE + (y / CX3_P) * w * CX3_IN_K3; | |
| for (uint32_t xx = 0; xx < w; ++xx) { | |
| uint8_t *pix = row + xx * CX3_IN_K3; | |
| uint32_t i = y * w + xx; | |
| for (uint32_t ch = 0; ch < c; ++ch) { | |
| int8_t q; | |
| if (CX3_IN_MODE == 2u) | |
| q = quant_fp32(((const uint32_t *)x)[ch * h * w + i], (int32_t)CX3_IN_PARAM); | |
| else if (CX3_IN_MODE == 1u) | |
| q = in_tables[ch * 256u + x[in_perm[ch] * h * w + i]]; | |
| else | |
| q = in_tables[ch * 256u + x[i * c + in_perm[ch]]]; | |
| pix[ch] = (uint8_t)q; | |
| } | |
| } | |
| } | |
| } | |
| /* YOLOX: decode the 3 x 3 prediction maps into [anchors, 5 + classes] Q16.16 int32 (cx3sem.py, op for op) */ | |
| static void yolox_decode(void) { | |
| for (uint32_t l = 0; l < CX3_N_LVL; ++l) { | |
| const uint32_t *v = cx3_lvl[l]; | |
| const int32_t *txy = cx3_tab[l][0], *twh = cx3_tab[l][1], *tob = cx3_tab[l][2], *tcl = cx3_tab[l][3]; | |
| const uint32_t h = v[9], w = v[10]; | |
| const int64_t st = (int64_t)v[11]; | |
| int32_t *o = (int32_t *)(void *)cx3_record + v[12] * (5u + CX3_N_CLS); | |
| for (uint32_t y = 0; y < h; ++y) { | |
| const volatile uint8_t *pb = (const volatile uint8_t *)HOST(v[0]) + (y % CX3_P) * v[2] + (y / CX3_P) * w * v[1]; | |
| const volatile uint8_t *po = (const volatile uint8_t *)HOST(v[3]) + (y % CX3_P) * v[5] + (y / CX3_P) * w * v[4]; | |
| const volatile uint8_t *pc = (const volatile uint8_t *)HOST(v[6]) + (y % CX3_P) * v[8] + (y / CX3_P) * w * v[7]; | |
| for (uint32_t x = 0; x < w; ++x, pb += v[1], po += v[4], pc += v[7]) { | |
| o[0] = sat32(((int64_t)txy[pb[0]] + ((int64_t)x << 16)) * st); | |
| o[1] = sat32(((int64_t)txy[pb[1]] + ((int64_t)y << 16)) * st); | |
| o[2] = twh[pb[2]]; | |
| o[3] = twh[pb[3]]; | |
| o[4] = tob[po[0]]; | |
| for (uint32_t k = 0; k < CX3_N_CLS; ++k) o[5 + k] = tcl[pc[k]]; | |
| o += 5u + CX3_N_CLS; | |
| } | |
| } | |
| } | |
| } | |
| int cf_runtime_init(void) { | |
| /* Prepare (untimed): the input tables live in weights.bin; the NPU relocates the image. */ | |
| in_tables = (const int8_t *)(uintptr_t)(CX3_HOST_DRAM_BASE + CX3_BLOB_ADDR + CX3_IN_PARAM); | |
| if (FAST3) { | |
| static const uint32_t perm[3] = {CX3_IN_PERM0, CX3_IN_PERM1, CX3_IN_PERM2}; /* output channel c reads input perm[c] */ | |
| for (uint32_t ch = 0; ch < 3u; ++ch) | |
| for (uint32_t v = 0; v < 256u; ++v) | |
| tw3[perm[ch]][v] = (uint32_t)(uint8_t)in_tables[ch * 256u + v] << (8u * ch); | |
| } | |
| for (uint32_t ch = 0; ch < CX3_IN_C; ++ch) | |
| for (uint32_t v = 0; v < 256u; ++v) tt[ch][v] = (uint8_t)in_tables[ch * 256u + v]; | |
| NPU_REG(NPU_RELOC) = CX3_RELOC; | |
| return NPU_REG(NPU_RELOC) == (CX3_RELOC & 0xfffff000u) ? 0 : -1; | |
| } | |
| int cf_runtime_begin(const void *inputs, uint32_t count, uint32_t input_bytes, uint32_t offline) { | |
| (void)inputs; | |
| (void)count; | |
| (void)offline; | |
| return input_bytes == CX3_INPUT_BYTES ? 0 : -1; | |
| } | |
| int cf_runtime_query(uint32_t query, const void *input) { | |
| (void)query; | |
| input_stage((const uint8_t *)input); | |
| NPU_REG(NPU_PROG) = CX3_PROG; | |
| NPU_REG(NPU_CTRL) = 1u; | |
| if (NPU_REG(NPU_STATUS) & 1u) /* returns once the NPU is idle and its writes are acknowledged */ | |
| return -1; | |
| /* the record: every output in order, each the NHWC bytes of one or more layers (concatenated heads) */ | |
| for (uint32_t s = 0; s < CX3_N_SEG; ++s) { | |
| const uint32_t *g = cx3_seg[s]; /* base, K3, slot stride, H, W, C, record offset, NCHW */ | |
| int8_t *dst = cx3_record + g[6]; | |
| const uint32_t hw = g[3] * g[4]; | |
| for (uint32_t y = 0; y < g[3]; ++y) { | |
| const volatile int8_t *row = (const volatile int8_t *)HOST(g[0]) + (y % CX3_P) * g[2] + (y / CX3_P) * g[4] * g[1]; | |
| for (uint32_t x = 0; x < g[4]; ++x, row += g[1]) { | |
| if (g[7]) { /* a map output: the record is NCHW */ | |
| int8_t *d = dst + y * g[4] + x; | |
| for (uint32_t c = 0; c < g[5]; ++c, d += hw) *d = row[c]; | |
| } else { | |
| for (uint32_t c = 0; c < g[5]; ++c) *dst++ = row[c]; | |
| } | |
| } | |
| } | |
| } | |
| yolox_decode(); | |
| return 0; | |
| } | |
| const void *cf_runtime_record(void) { return cx3_record; } | |