awu12 Claude Opus 5.5 commited on
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bb3c449
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1 Parent(s): 718ad54

Add missing SVE compile flag to two gatev2 q6_K solutions

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`gemm_ggml_q6_K_n128256_k4096` and `gemm_ggml_q6_K_n4096_k14336` (author `claude-code-claude-fable-5-1-gatev2`) use SVE intrinsics, but their spec has no `-march`, so they fail to compile:

`'svget_neonq_s32' needs target feature sve`

This adds `-march=armv8.6-a+sve` to `spec.compile_flags`. Nothing else changes.

**Tested** on c8g.2xlarge with the kernel source from PR #8 under its new names (`gemm_q6_K_*`) and PR #8's workloads: both pass 20/20.

**Merge note:** PR #8 renames these files to `gemm_q6_K_*.json` and still has the old flags. Check that the flag survives on the new names after both merge.

🤖 Generated with [Claude Code](https://claude.com/claude-code)

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q6_K_n128256_k4096.json CHANGED
@@ -15,6 +15,7 @@
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  "isa_features": [],
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  "compile_flags": [
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  "-O2",
 
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  "-std=c++14"
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  ],
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  "link_flags": []
 
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  "isa_features": [],
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  "compile_flags": [
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  "-O2",
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+ "-march=armv8.6-a+sve",
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  "-std=c++14"
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  ],
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  "link_flags": []
solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q6_K_n4096_k14336.json CHANGED
@@ -15,6 +15,7 @@
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  "isa_features": [],
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  "compile_flags": [
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  "-O2",
 
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  "-std=c++14"
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  ],
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  "link_flags": []
 
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  "isa_features": [],
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  "compile_flags": [
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  "-O2",
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+ "-march=armv8.6-a+sve",
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  "-std=c++14"
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  ],
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  "link_flags": []