Commit History
8 days ago
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SME2 baselines for simd-loop 101 and 128; tag definitions by sme2 kernel kind
Verified signatureAdds baseline-sme2 for loop_101 and loop_128, and a sme2-kernel:za / sme2-kernel:streaming-sve tag on the 32 simd-loop definitions that have a baseline-sme2 (tags only; nothing else in those files changes). Exact paths only. See ArtificialRay/CPU-Kernel-Baseline#107 (issue #95).144919f
9 days ago
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SME2 baselines for simd-loop 216-221/223; matrix-loop n rounded to multiples of 256
Verified signatureAdds baseline-sme2 for loops 216, 217, 218, 220, 221, 223 and rewrites the workloads of the seven matrix loops (216-221, 223) with n a multiple of 256 so Arm's SME2 kernels run unpadded on M4. Exact paths only. See ArtificialRay/CPU-Kernel-Baseline#105 (issue #95).4a24e9c -
Remove 19 Qwen3.8-27B workload files that have no definition
Verified signatureThese gemm_ggml_* workloads (Qwen3.8-27B shapes) were never given definitions, so nothing loads them. Exact paths only; see ArtificialRay/CPU-Kernel-Baseline#94 item 3.522ca6f
12 days ago
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TASKS.md: apply the 2x autovec check on Graviton3 and Graviton4
Every SIMD Loops and KleidiAI baseline was timed against the scalar starting point auto-vectorized for the machine (Graviton3 for SVE, Graviton4 for SVE2). New failures: - loop_032, baseline-sve on Graviton3: wrong results on 7 of 10 workloads - loop_121, baseline-sve on Graviton3: no result after 20 min - loop_122, baseline-sve on Graviton3: about 960x slower than autovec - loop_123, baseline-sve2 on Graviton4: about 3.9x slower than autovec None of the four is in expected_sets_sve.json. All KleidiAI baselines pass. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>652f7d1
13 days ago
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TASKS.md: loop_127's SME2 baseline fails the 2x autovec rule
On M4 the unmodified scalar starting point of loop_127 runs about 4.6x faster than baseline-sme2 (the first evaluation of both M4 runs: 4.56x and 4.57x). A baseline more than 2x slower than the auto-vectorized starting point does not represent expert performance, so the SME2 cell is now a failure, with the reason in the notes on failures. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>b13de8d -
Add TASKS.md and update the README
TASKS.md has one row per definition (124). For each tier (Graviton3 SVE, Graviton4 SVE2, Apple M4 SME2) it marks whether the expert baseline runs there and whether its code is specialized for that tier (SVE, SVE2-only instructions, SME/ZA), from the recorded runs, a direct check of the SIMD-loop and KleidiAI SVE baselines on Graviton4 and a check of each baseline's code. ? marks baselines that exist but are not confirmed yet. The README now covers all five sources (ncnn, llama.cpp, SIMD Loops, KleidiAI, e2e), the hardware tiers, the evaluation sets, the current layout and the upstream licenses, and points to TASKS.md with a note to update it with any change to the definitions or baselines. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>dcd2dac
14 days ago
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Publish subset_sve.json / subset_sme.json: the 32-definition subsets
The representative sample used for controlled studies (ablations, ISA ladder), next to expected_sets_sve.json. 10 ncnn, 9 llama.cpp, 12 simd-loop and 1 kleidiai definition each; the two files differ only in the kleidiai GEMM (gemm_fp32_n512_k512 for sve, gemm_fp32_sme2_n512_k512 for sme2). loop_010 was in the original 33-definition draw and is left out: it is not in expected_sets_sve.json. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>dfab98b
20 days ago
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Llama-3.1-8B e2e set (defs, real-activation workloads, Fable gate-v2 solutions, runs, measurements); Qwen kernel-vs-repack results; fixed baseline-sve2 loop_114/121/219
Verified signaturedef2c3e
23 days ago
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Publish expected_sets_sve.json: the definition set the SVE tables are scored against (#5)
- Publish expected_sets_sve.json: the definition set the SVE tables are scored against (02117483ea70fd008dbca9acea8e5ae226373588) Co-authored-by: Weihua Du <VanishD@users.noreply.huggingface.co>989747e -
simd-loop reference: build scalar floor as -O2 -std=c++14, matching the other datasets (#4)
- simd-loop reference: build scalar floor as -O2 -std=c++14, matching the other datasets (9dc16c8eda99a79e1c1280ad864b53528c054e58) - simd-loop reference: fix description left stale by the -O2 flag change (37dd60606e3eaeefa07f3fedfee3886bc365be7c) Co-authored-by: Weihua Du <VanishD@users.noreply.huggingface.co>947b5f6 -
baseline-sve loop solution ABI adapter update
ArtificialRayea591b6
24 days ago
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fix claude-code-claude-fable-5-1-gatev2: the 5 re-optimized kernels were previous-round sources (assembled by hand); regenerated from the agent run dirs
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gate-v2 set complete: all 5 defective kernels re-optimized by Fable under the corrected gate (geomean 3.205x vs the shortcut versions' 3.160x)
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Fable 5.1 re-optimization of 3 kernels under gate v2: 2.967x / 3.026x / 3.601x vs the shortcut versions' 3.00x / 3.03x / 3.39x
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fable-exact-bsums: the 2026-09-21 Fable kernels with the batch-shared-exponent block sums repaired (5 of 11 patched); prefill perplexity cost 12.68 -> 8.80 against stock 8.59
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- Delete all gemm kernel in ncnn as they are not using gemm but gemv, which hurts the performance of large batch size
ArtificialRay- Update kleidiai's gemm to use both GEMV and GEMM: for small batch size (less than 4 or 8) use GEMV for large batch size use GEMM650aa4b -
conv-depthwise f16 kernel change: use NEON to convert f16->f32 in parallel as conv2d f16 kernel did
ArtificialRay70a1467 -
Kleidiai kernel changes:
ArtificialRay- workload for 7 kernels change, keep only 2-3 decode record for the kernel, all other has batch size of at least 256 - baseline binding change: - baseline-kleidiai-arm/conv2d/conv2d_fp32_nhwc_kh3_kw3_s1_p1_c32_c64: add N as a var input - baseline-kleidiai-arm/gemm/gemm_bf16_n512_k512: pack A at LHS every time, remove memcmp for A - baseline-kleidiai-arm/gemm/gemm_qs4c32_n256_k512: dynamic quant A + pack A every time, remove memcmp for A - baseline-kleidiai-arm/gemm/gemm_qs4cx_sme2_n256_k512: same as baseline-kleidiai-arm/gemm/gemm_qs4c32_n256_k512 - baseline-kleidiai-arm/conv2d/conv2d_f16_nhwc_kh3_kw3_valid_c32_c64: use NEON to convert f16 to f32, do LHS pack every timed7a6eaa -
gate v2: real-activation tensors for the 11 Qwen3.5-4B packed gemm definitions, baseline-relative SQNR floors on all 30, exact-bsums control solution
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25 days ago
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Qwen3.5-4B e2e: perplexity attribution + reference-scalar splice control logs
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Qwen3.5-4B e2e: full attempt-4 results (120 samples, medians, perplexity for stock/norepack/agent/agent1t)
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Add Qwen3.5-4B e2e measurement (Fable kernels, threaded override, c8g.4xlarge, llama.cpp v0.4.1): medians over 5 reps for stock/norepack/agent/agent1t x threads 1/4/16
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Add claude-code-claude-fable-5-1-sve2 kernels for the Qwen3.5-4B e2e run (11 packed-ABI gemm solutions + raw run dirs), additive
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simd-loop workload enlarge
ArtificialRay5e93e5f -
Add Qwen3.5-4B e2e gemm definitions (packed ggml Q4_K/Q5_K/Q6_K ABI): 11 definitions + workloads + reference-scalar + baseline-llamacpp-arm (additive)
Verified signaturefd33c4a
27 days ago
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baselines: make simd-loop baseline-sme2 runnable on Apple M4; rename kleidiai baseline to baseline-kleidiai-arm
ArtificialRay +1: Claude Sonnet 5simd-loop/baseline-sme2 (23 of 24 loops): the entry point inner_loop_NNN was __arm_streaming_compatible and was called from non-streaming code, so its SVE ran outside streaming mode and SIGILLed on every loop on mac-m4.metal (previously only QEMU-verified). The entry is now __arm_locally_streaming (loop_219 also __arm_new("za")), compile flags -march=armv9-a+sve2+sme2 -> -mcpu=apple-m4, isa_features [sve2, sme2] -> [sme2]; loop_105's SVE helper becomes __arm_streaming. All 23 PASS on M4. loop_032 is unchanged: its inline asm uses an SVE gather load, which does not exist in streaming mode, so it needs a real port. kleidiai: baseline-kleidiai-sve -> baseline-kleidiai-arm (the set holds sme2 solutions too); directory plus the author/name fields inside each solution JSON. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01UMCtxUxRCeJkZShTgM2s3B0e7e89f
28 days ago
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kleidiai baselines: fix cache invalidation to be content-based, not pointer-based
ArtificialRay +1: Claude Sonnet 5The previous commit (2d4c1f4) cached each binding's packed weight/activation buffer keyed on the raw input pointer, invalidating only when that pointer changed. Testing on armbench-sme-kleidiai-test surfaced real correctness regressions from this: bench.cli evaluates many workloads against one compiled .so, and a later, genuinely different workload's input buffer can land at the exact address an earlier (now-freed) workload's buffer used. Pointer identity can't distinguish that from a real cache hit, so several kernels (conv2d_f16, gemm_bf16, gemm_f16, gemm_fp32_sme2) silently reused a stale pack against new data -- first workload correct, then an inconsistent mix of PASSED/INCORRECT_NUMERICAL for the rest. Replaced pointer-identity checks with content comparison: each cache now keeps a byte snapshot of the input it was built from and memcmp's against it every call, repacking only on an actual mismatch (or the first call). Still far cheaper than repacking every call (a ~1MB memcmp is …a25a993 -
kleidiai baselines: cache weight/activation repack instead of redoing it every call
ArtificialRay +1: Claude Sonnet 5All 10 kleidiai baseline binding.cpp files malloc'd, packed, and freed the RHS weight buffer (4 of them also the LHS) on every armbench_entry_* call, even though the timing harness calls each entry point repeatedly with the same inputs per workload. At M=1 this fixed cost was ~93% of measured time (gemm_fp32_sme2_n512_k512), making baseline numbers -- and every speedup computed against them -- reflect repack overhead more than actual kernel compute. Each binding now caches its packed buffer(s) in function-local statics, keyed on the relevant input pointer(s) (weight, or (B_q4, B_scales) for quantized RHS), and only repacks when that pointer changes -- i.e. once per workload instead of once per warmup/repeat iteration. Purely compile-time-constant scratch (zero pad/bias buffers) is now built once ever. This mirrors real deployment too: weights are packed once and reused across many inferences, not repacked per call. Fixes github.com/ArtificialRay/CPU-Kernel-Baseline/issues/80. Co-Aut…2d4c1f4 -
llamacpp gemm bf16 kernels remove -march=sve+sve2 flag
ArtificialRay518f45b
29 days ago
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update kleidiai sme2 kernels
ArtificialRayb854496 -
simd-loop: add baseline-sme2 author (24 loops, Arm HAVE_SME_INTRINSICS build, QEMU-verified; additive, no other paths touched)
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simd-loop expert baselines: baseline-sve (Graviton3, 30 loops) rebuilt + new baseline-sve2 (Graviton4, 36 loops); reference fixes for 114/126/127
Verified signaturebaseline-sve (30): Arm's plain-SVE kernels selected by the preprocessor from the upstream simd-loops sources (asm fallbacks where the ACLE branch needs SVE2), -march=armv8.2-a+sve pinned, edge-size padding in the binding for 038 109 110 112 113 114 124 219. All 30 built and evaluated on a c7g.large against the Python reference; 29 pass (032's baseline is numerically off and is kept for continuity). baseline-sve2 (36, new author): the previous baseline-sve files (validated on Graviton4, 2026-07-23) renamed with -march=native restored; 9 of them (038 102 103 104 105 109 120 123 124) regenerated because the old copies did not compile. Cross-compiled for armv9-a+sve2, not yet run on a c8g. definitions: loop_126/127 mask the uint32 reference to 32 bits (numpy 2 raised on overflow); loop_114 wraps int32/int16 like the C reference (raised at n=4096). No deletions. Generated by scripts/gen_simd_loop_harness.py on CPU-Kernel-Baseline feat/box-watchdog.bd25fbe -
kieldAI kernels with sve baseline are enabled
ArtificialRay49fa199 -
init kieldAI kernels
ArtificialRay7724b7a -
add hard-label to isa_features for every simd-loop solutions
ArtificialRay1a19158
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fix simd-loop compiling flag(march) to armv8.2-a+sve; and delete trace temporarily after agent-run experiment is completed
ArtificialRay13e56e7
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Fix weak bf16 attention baselines (mha/gqa/mla_prefill/mla_decode): cast ggml inputs to f32 so mul_mat uses NEON f32 SIMD (~3x over scalar); update baselines + traces
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Fix weak expert baselines: bf16 GEMM -> NEON BFMMLA (~20x over scalar), ncnn gemm_w8a8ch create_pipeline hoist (~1.6x); update baselines + traces (8 defs)
Verified signature2dd1bd8
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Update llamacpp kernel's baseline by split kernel initialization with calculation, now kernel init per workload (but not per-run)
ArtificialRaye09ca6e
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Update operator coverage so far
ArtificialRay1e8ab72 -
Attention kernel update:
ArtificialRay- update mla_prefill, mla_decode, gqa kernel definitions, workload, and solution - re-collect all attention kernel to now larger than M=512 and S=512 It is shown that attention kernel reference is stronger than baseline, may have change on the workload again laterad52de0
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Add simd-loop baseline-sve (Arm hand-written SVE expert baselines, 36/47 validated)
Verified signature8ca3432
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Definition+workload update for rmsnorm, and baseline, reference-scalar, and claude-sonnet-4-6 solution update
ArtificialRay- definitions+workload update for rmsnorm: reset dtype to fp32 - llama.cpp reference-scalar, baseline-llamacpp-arm solution update: change dtype to fp32 - claude-sonnet-4-6 solution for llamacpp update - claude-sonnet-4-6 solution for ncnn update: add gemm solution - add evluation trace for gemm bf16 definition and gemm_fp32_n1000_k2048 definitionf55190a
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Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
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Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
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Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
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Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
Verified signatureb37b4d0 -
Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
Verified signaturefd5c744 -
Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
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Tag q4_k_m defs correctness:sqnr + stable SiLU (moe)
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