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sglang
test/registered/unit/test_flashinfer_sparse_mla.py
.py
import sys import unittest from types import ModuleType from unittest.mock import patch import torch from sglang.kernels.ops.attention.flash_mla_sm120 import ( _validate_flashinfer_sparse_mla_backend, flashinfer_sparse_mla_forward, ) from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_...
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sglang
test/registered/unit/test_supplied_instance_exposure_ratchet.py
.py
"""The supplied-instance surface is measured on two axes, and may only shrink. A callee that takes ``server_args`` keeps the supplied-instance contract: the caller chose the object, so no global-read ratchet counts it. Step 12 changes what that object *carries* β€” the instance stays at the user's raw input β€” so a calle...
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sglang
test/registered/unit/test_runai_utils.py
.py
import unittest from pathlib import Path from sglang.srt.utils.runai_utils import ObjectStorageModel, is_runai_obj_uri from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=7, suite="base-a-test-cpu") register_cpu_ci(est_time=7, suite="base-c...
55
2,155
sglang
test/registered/unit/test_precision_baseline_store.py
.py
"""Unit tests for precision_baseline_store β€” no server, no model loading, no HF network.""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import json import os import tempfile import unittest from datetime import datetime, timezone from pathlib import Pat...
651
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sglang
test/registered/unit/test_runtime_context_config_bags.py
.py
"""Config namespace bags. publish snapshots resolved ``server_args`` into the ``get_exec()`` / ``get_memory()`` / ... namespace bags (the single source of truth for config); bags are read-only by bare assignment and fail closed until published. """ import dataclasses import unittest from unittest import mock from sg...
365
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sglang
test/registered/unit/test_server_args_mutation_ratchet.py
.py
"""Ratchet guard: server_args mutations outside the resolution pipeline may only decrease. After ``ServerArgs.__post_init__`` returns, the instance carries the resolved configuration and the resolution pipeline (``server_args.py`` and ``arg_groups/``) is the only place that computes it: resolved config changes go to t...
82
3,218
sglang
test/registered/unit/test_cuda_vmm_utils.py
.py
"""Unit tests for the VMM cross-process handle helpers in ``vmm_utils``. Round-trips export -> exchange -> import/map across ranks for both transports (POSIX, FABRIC) and both mapping shapes (single base, multi-chunk span). The only in-tree consumer, ``register_graph_inputs``, reaches this path only under ``expandable...
315
11,399
sglang
test/registered/unit/test_bench_long_context.py
.py
"""Unit test for benchmark/hicache/bench_long_context.py. Guards against the regression where ContextWorkloadGenerator.__init__ replaces WorkloadGenerator.__init__ entirely but forgets to set attributes the inherited request_sender/handle_request methods need (e.g. self.request_func). """ import json import sys impor...
129
4,427
sglang
test/registered/unit/test_runtime_context.py
.py
"""Unit tests for runtime_context: delegation, singletons, and override().""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import dataclasses import json import os import shutil import tempfile import unittest from unittest.mock import patch import sgla...
1,265
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sglang
test/registered/unit/mem_cache/test_radix_cache_unit.py
.py
""" Unit tests for the RadixCache implementation. This module tests the core functionality of RadixCache, RadixKey, and TreeNode following SGLang testing patterns. Test Coverage: - RadixKey: token ID management, slicing, iteration, representation - TreeNode: node properties, reference counting, hash values - RadixCac...
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40,764
sglang
test/registered/unit/mem_cache/test_unified_mamba_views.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
464
20,848
sglang
test/registered/unit/mem_cache/test_asymmetric_mha_pool_host_unit.py
.py
"""Unit tests for asymmetric MHA host KV pool transfer dispatch.""" import unittest from types import SimpleNamespace from unittest import mock import torch from sglang.srt.mem_cache.pool_host.mha import ( AsymmetricMHATokenToKVPoolHost, MHATokenToKVPoolHost, get_mha_host_pool_cls, ) from sglang.test.ci....
361
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sglang
test/registered/unit/mem_cache/test_pure_swa_chunk_cache.py
.py
"""Unit tests for all-SWA ChunkCache release semantics.""" import unittest from types import SimpleNamespace import torch from sglang.srt.mem_cache.chunk_cache import PureSWAChunkCache from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=3...
64
1,815
sglang
test/registered/unit/mem_cache/test_dllm_fdfo_kv_reuse.py
.py
"""Tests dLLM FDFO KV slot reuse in alloc_for_extend.""" import unittest from array import array from types import SimpleNamespace import torch from sglang.srt.dllm.mixin.scheduler import DllmManager from sglang.srt.mem_cache.allocation import alloc_for_extend from sglang.srt.mem_cache.memory_pool import ReqToTokenP...
225
8,439
sglang
test/registered/unit/mem_cache/test_dsv4_compress_write_pad.py
.py
import unittest from sglang.srt.mem_cache.deepseek_v4_memory_pool import ( get_compress_state_ring_size, get_compress_state_write_pad, ) from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=1, suite="base-a-test-cpu") class TestCom...
46
1,781
sglang
test/registered/unit/mem_cache/test_asymmetric_mha_pool.py
.py
"""Device-side tests for MHATokenToKVPool with asymmetric KV (head_dim != v_head_dim). Covers the wiring the kernel-level tests cannot see: that the pool derives ``v_row_dim`` from ``v_head_dim`` and threads it into the fused store_cache kernel. A mis-wired ``v_row_dim`` still writes the right bytes into the right K s...
203
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sglang
test/registered/unit/mem_cache/test_dsa_layer_split_broadcast.py
.py
"""Multi-GPU integration test for LayerSplitDSATokenToKVPool owner-broadcast. Spawns ``world`` processes forming a single attention-CP group, builds a tiny ``LayerSplitDSATokenToKVPool`` on each rank, writes a rank-distinct value into every owned layer, then verifies that reading ANY layer (owned or not) returns the *...
151
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sglang
test/registered/unit/mem_cache/test_layout_compat.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
356
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sglang
test/registered/unit/mem_cache/test_flashkda_strided_state_access.py
.py
"""FlashKDA prefill wrapper vs envelope-strided Mamba state pools (CPU). Derived property under test: ``FlashKDAKernel`` (the wrapper around the external, contiguous-only ``flash_kda`` CUTLASS kernel) touches the SSM state pool ONLY through torch advanced indexing β€” a gather into a contiguous local copy before the ker...
234
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sglang
test/registered/unit/mem_cache/test_umbp_host_allocator.py
.py
import builtins import ctypes import gc import importlib import sys import types import unittest from enum import Enum from unittest import mock import torch from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") # These tests stub out mori with a fake in-process...
203
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sglang
test/registered/unit/mem_cache/test_page_major_layout.py
.py
"""CPU correctness tests for the page-major layer-major envelope layout. Covers the standalone view builders (no allocator / shared pool): - ``build_page_major_mha_views``: 4-D K/V views with correct addressing at page_size 1 (token-granularity envelope) and > 1 (layer-major within a page), and no aliasing ...
164
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sglang
test/registered/unit/mem_cache/test_unified_radix_cache_unittest.py
.py
"""Unit tests for UnifiedRadixCache""" import json import shutil import sys import tempfile import time import unittest from array import array from collections import defaultdict from dataclasses import dataclass, replace from typing import Optional from unittest import mock import torch from sglang.kernels.ops.att...
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sglang
test/registered/unit/mem_cache/test_embedding_cache_controller.py
.py
"""Unit tests for EmbeddingCacheController paged host pool behavior.""" import threading import unittest from queue import Queue from unittest.mock import MagicMock import torch from sglang.srt.managers.schedule_batch import Modality from sglang.srt.mem_cache.embedding_cache_controller import ( EmbeddingCacheCon...
467
15,585
sglang
test/registered/unit/mem_cache/test_paged_free_segment.py
.py
"""free_segment / free_segments vs the torch.unique reference: stride page extraction over all segment alignments, plus boundary-page dedup and free-group deferral. See PagedTokenToKVPoolAllocator.free_segment for why unique is avoided. python -m pytest test/registered/unit/mem_cache/test_paged_free_segment.py -v ...
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sglang
test/registered/unit/mem_cache/test_registry.py
.py
"""Unit tests for the radix-cache registry, routing, and selection chain.""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import unittest from unittest.mock import MagicMock, patch from sglang.srt.mem_cache.registry import ( _RADIX_CACHE_REGISTRY, ...
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16,580
sglang
test/registered/unit/mem_cache/test_evict_policy.py
.py
"""Unit tests for evict_policy.py""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=6, suite="base-a-test-cpu") register_cpu_ci(est_time=7, suite="base-c-test-cpu") import unittest from unittest.mock import MagicMock from sglang.srt.mem_cache.evict_policy import ( FIFOStrategy, ...
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sglang
test/registered/unit/mem_cache/test_swa_alloc_extend_page_estimation.py
.py
"""Regression for SWA alloc_extend page estimation. Old gate in SWATokenToKVPoolAllocator.alloc_extend added one full page_size per request unconditionally, refusing extends that fit inside the request's last partial page. Fix replaces with get_num_new_pages-based gating. """ import unittest from types import SimpleN...
155
5,967
sglang
test/registered/unit/mem_cache/test_swa_lock_release_lifecycle.py
.py
"""Regression for SWA lock release lifecycle. Hybrid-SWA early-release protocol: once a request's decode position passes the sliding window, drop its prefill SWA lock without touching the full lock, freeing SWA pages back to LRU. Covers: - SWARadixCache.dec_swa_lock_only (leaf tombstone + free, internal protected->ev...
439
17,763
sglang
test/registered/unit/mem_cache/test_hisparse_max_token_pool_size.py
.py
"""Unit tests for HiSparse-aware max token pool sizing. Covers the HiSparse host-backed capacity fix: - `ModelRunner.max_token_pool_size` returns the allocator's `size_full` when `enable_hisparse` is set (host-backed logical pool), otherwise it delegates to `effective_max_total_num_tokens`. - `DecodePreallocQueue....
194
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sglang
test/registered/unit/mem_cache/test_tree_core_registry.py
.py
"""Unit tests for the tree-core backend registry.""" import unittest from unittest import mock from sglang.srt.environ import envs from sglang.srt.mem_cache.cache_init_params import CacheInitParams from sglang.srt.mem_cache.memory_pool import ReqToTokenPool from sglang.srt.mem_cache.unified_cache.component_type impor...
199
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sglang
test/registered/unit/mem_cache/test_unified_handout_zeroing.py
.py
from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci(est_time=4, stage="base-b", runner_config="1-gpu-small") import unittest import torch from sglang.srt.mem_cache.multi_ended_allocator import MultiEndedAllocator from sglang.srt.mem_cache.unified_memory_pool import ( MambaSubPoolSpec, M...
134
4,832
sglang
test/registered/unit/mem_cache/test_dsa_layer_shard_utils.py
.py
import unittest from types import SimpleNamespace import torch from sglang.srt.layers.cp.utils import get_layer_owner, get_layer_shard_range from sglang.srt.mem_cache.dsa_cache_layer_split import LayerSplitDSATokenToKVPool from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import Custo...
124
5,029
sglang
test/registered/unit/mem_cache/test_decode_radix_lock_ref.py
.py
""" Unit tests for lock_ref correctness in decode disagg radix cache scenarios. Verifies that inc_lock_ref / dec_lock_ref are balanced across the four transfer scenarios identified in PR #19746: 1. Incremental transfer & success (prefix match > 0) inc_lock_ref(pop_preallocated) -> dec+inc(cache_unfinished_req) -> ...
409
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sglang
test/registered/unit/mem_cache/test_mmap_allocator.py
.py
from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=10, suite="base-a-test-cpu") import sys sys.modules["libtpu"] = None import mmap import os import unittest import torch from sglang.srt.mem_cache.pool_host.common import ShmHostTensorAllocator from sglang.srt.mem_cache.storage.mmap imp...
120
3,719
sglang
test/registered/unit/mem_cache/test_hicache_nixl_storage.py
.py
"""Unit tests for the NIXL HiCache storage backend -- no server, no model loading.""" from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci(est_time=30, stage="base-b", runner_config="1-gpu-small") import os import shutil import socket import subprocess import tempfile import time import unittest ...
872
32,456
sglang
test/registered/unit/mem_cache/test_hicache_load_back_timing.py
.py
"""Unit tests for the HiCache load-back duration metric.""" import unittest from types import SimpleNamespace from unittest.mock import MagicMock, patch import torch from sglang.test.ci.ci_register import register_cuda_ci from sglang.test.test_utils import CustomTestCase register_cuda_ci(est_time=5, stage="base-b",...
125
4,337
sglang
test/registered/unit/mem_cache/test_dsa_pool_host_unit.py
.py
import inspect import unittest import torch from sglang.srt.mem_cache.memory_pool import DSATokenToKVPool from sglang.srt.mem_cache.memory_pool_host import DSAIndexerPoolHost from sglang.srt.mem_cache.pool_host.common import ( ALLOC_MEMORY_FUNCS, alloc_with_pin_memory, ) from sglang.srt.mem_cache.pool_host.ml...
168
6,366
sglang
test/registered/unit/mem_cache/test_hicache_nixl_cleaner.py
.py
"""Unit tests for the NIXL FILE L3 cleaner.""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import os import shutil import tempfile import unittest from sglang.srt.mem_cache.storage.nixl.nixl_cleaner import ( HiCacheL3Cleaner, _parse_group_key, ...
146
5,564
sglang
test/registered/unit/mem_cache/test_session_unified_radix_cache.py
.py
"""Tests for session references on UnifiedRadixCache.""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import ast import unittest from array import array from pathlib import Path from types import SimpleNamespace import torch from sglang.srt.mem_cache.a...
223
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sglang
test/registered/unit/mem_cache/test_pd_envelope_transfer_layout.py
.py
"""Derived-property tests for the PD whole-envelope transfer addressing. PD disaggregation transfers the unified memory pool as whole envelopes with ``addr = raw_ptr + physical_index * item_len`` (see ``UnifiedMLATokenToKVPool.get_contiguous_buf_infos`` / ``UnifiedMambaPool.get_contiguous_buf_infos`` and mooncake's ``...
127
5,155
sglang
test/registered/unit/mem_cache/test_umbp_store.py
.py
#!/usr/bin/env python3 """Unit tests for UMBPStore with mocked HostKVCache.""" import ctypes import importlib import sys import tempfile import unittest from dataclasses import dataclass from types import ModuleType, SimpleNamespace from typing import Optional from unittest.mock import MagicMock, patch import mori.um...
474
16,446
sglang
test/registered/unit/mem_cache/test_radix_cache_cpp_unit.py
.py
"""Unit tests for fail-closed C++ radix-cache request validation.""" import importlib import sys import types import unittest from unittest.mock import patch from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=2, suite="base-a-test-cpu") ...
39
1,411
sglang
test/registered/unit/mem_cache/test_replayssm_ring_accounting.py
.py
"""ReplaySSM ring per-slot byte accounting (BaseLinearStateParams.replayssm_ring_bytes_per_req). The memory solver charges this on top of mamba_cache_per_req so num_slots is not over-provisioned (the ring is allocated per slot but is NOT part of the state cache cost). Pins the arithmetic against hand-computed byte cou...
89
3,087
sglang
test/registered/unit/mem_cache/test_swa_unittest.py
.py
import unittest from array import array from types import SimpleNamespace import torch from sglang.srt.disaggregation.kv_events import BlockRemoved, BlockStored from sglang.srt.environ import envs from sglang.srt.mem_cache.allocator.swa import SWATokenToKVPoolAllocator from sglang.srt.mem_cache.base_prefix_cache impo...
787
31,135
sglang
test/registered/unit/mem_cache/test_unified_mla_dense_block_table.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
481
20,695
sglang
test/registered/unit/mem_cache/test_hicache_staged_write_back_dispatch.py
.py
"""Unit tests for HiCache staged write-back host-pool dispatch.""" import unittest from contextlib import contextmanager from types import SimpleNamespace from unittest import mock import torch from sglang.srt.managers import cache_controller as manager_cache_controller from sglang.srt.managers.cache_controller impo...
910
33,770
sglang
test/registered/unit/mem_cache/test_store_cache_4d.py
.py
"""Parity tests for the `store_cache_4d` Triton kernel. The kernel writes K/V into the 4-D page-major envelope view. These tests prove it produces byte-identical output to the legacy advanced-indexing path on representative fixtures: - ``page_size = 1`` (envelope-degenerate, the critical compatibility case) - ``p...
413
14,948
sglang
test/registered/unit/mem_cache/test_unified_mla_views.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
392
14,477
sglang
test/registered/unit/mem_cache/test_mooncake_tenant_config.py
.py
import json import tempfile import types import unittest from types import SimpleNamespace from unittest.mock import patch from sglang.srt.environ import envs from sglang.srt.mem_cache.storage.mooncake_store.mooncake_store import ( DEFAULT_TENANT_ID, MooncakeStoreConfig, ) from sglang.test.ci.ci_register impor...
213
6,593
sglang
test/registered/unit/mem_cache/test_mooncake_group_semantics.py
.py
import types import unittest from unittest.mock import patch import torch from sglang.srt.mem_cache.hicache_storage import ( HiCacheStorageConfig, PoolName, PoolTransfer, ) from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=1,...
477
15,061
sglang
test/registered/unit/mem_cache/test_mamba_path_state_cap.py
.py
"""CPU-only unit tests for the per-path Mamba checkpoint cap.""" from sglang.test.ci.ci_register import register_cpu_ci, register_cuda_ci register_cpu_ci(est_time=2, suite="base-a-test-cpu") register_cuda_ci(est_time=5, stage="base-b", runner_config="1-gpu-small") import argparse import unittest from collections imp...
343
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sglang
test/registered/unit/mem_cache/test_minimax_sparse_pool_host_unit.py
.py
import unittest import psutil import torch from sglang.srt.mem_cache.hicache_storage import PoolHitPolicy, PoolName from sglang.srt.mem_cache.hiradix_cache import HiRadixCache from sglang.srt.mem_cache.hybrid_cache.hybrid_cache_controller import ( HybridCacheController, ) from sglang.srt.mem_cache.memory_pool imp...
421
16,711
sglang
test/registered/unit/mem_cache/test_hicache_file_lru_unit.py
.py
""" Unit tests for HiCacheFile LRU/eviction logic (max_size cap, free-space watermark, MLA owner gating, pre-reservation under concurrency) and the CP-aware file-key suffix. The eviction logic lives in ``LRUFileEvictor`` (mem_cache/storage/file/); these tests drive it end-to-end through ``HiCacheFile`` and inspect the...
541
21,085
sglang
test/registered/unit/mem_cache/test_swa_eviction_boundary.py
.py
"""Unit tests for SWA eviction boundary fixes. Bug: when page_size > sliding_window_size, _evict_swa could advance the eviction frontier to exactly page_floor(seq_len), making all tokens being inserted into the radix tree fully evicted (case 3). _insert_helper had no handling for this, creating an incorrect non-tombst...
557
21,885
sglang
test/registered/unit/mem_cache/test_hicache_dcp_host_pool.py
.py
"""HiCache under decode context parallelism (DCP): host-pool index math. Under DCP the radix/controller layer works in a widened logical index space (page_size * dcp_size wide pages, dcp_size * physical capacity), while each rank's device and host buffers only materialize the owned 1/dcp_size token shard (owner rule: ...
211
8,343
sglang
test/registered/unit/mem_cache/test_hiradix_pp_sync_drain.py
.py
"""Unit test for HiRadixCache._drain_async_work PP-sync backpressure.""" import unittest from sglang.srt.mem_cache.hiradix_cache import HiRadixCache from sglang.srt.mem_cache.unified_radix_cache import UnifiedRadixCache from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=1, suite="base-a-...
51
1,327
sglang
test/registered/unit/mem_cache/test_mamba_unittest.py
.py
import unittest from array import array import torch from sglang.kernels.ops.attention.fla.chunk_delta_h import CHUNK_SIZE as FLA_CHUNK_SIZE from sglang.srt.configs.mamba_utils import Mamba2CacheParams, Mamba2StateShape from sglang.srt.disaggregation.kv_events import BlockRemoved, BlockStored from sglang.srt.environ ...
835
32,216
sglang
test/registered/unit/mem_cache/test_hiradix_cache_unit.py
.py
"""Unit tests for srt/mem_cache/hiradix_cache.py KV cache events.""" import os import unittest from array import array import torch from sglang.srt.disaggregation.kv_events import BlockStored, StorageMedium from sglang.srt.mem_cache.allocator import TokenToKVPoolAllocator from sglang.srt.mem_cache.base_prefix_cache ...
124
4,639
sglang
test/registered/unit/mem_cache/test_streaming_session_unit.py
.py
from types import SimpleNamespace import torch from sglang.srt.managers.schedule_batch import FINISH_ABORT from sglang.srt.mem_cache.base_prefix_cache import MatchResult from sglang.srt.session.streaming_session import SessionSlot, StreamingSession from sglang.test.ci.ci_register import register_cpu_ci register_cpu_...
270
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sglang
test/registered/unit/mem_cache/test_unified_radix_hicache_dispatch.py
.py
import unittest from unittest.mock import MagicMock, patch from sglang.srt.mem_cache.hicache_storage import PoolName, SidecarPoolSpec from sglang.srt.mem_cache.hybrid_cache import hybrid_pool_assembler from sglang.srt.mem_cache.hybrid_cache.hybrid_pool_assembler import ( _STRATEGIES, StackBuildResult, Stac...
235
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sglang
test/registered/unit/mem_cache/test_radix_force_miss.py
.py
"""Unit tests for SGLANG_RADIX_FORCE_MISS. The flag is gated at the scheduler boundary, so we test the helper directly plus an end-to-end check of `match_prefix_for_req` driving a populated RadixCache. """ from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") im...
109
3,951
sglang
test/registered/unit/mem_cache/test_mem_pool_host.py
.py
"""Unit tests for host-pool allocation and free-list bookkeeping.""" import threading import unittest import torch from sglang.srt.mem_cache.memory_pool import MHATokenToKVPool from sglang.srt.mem_cache.memory_pool_host import ( DeepSeekV4PagedHostPool, LogicalHostPool, MambaPoolHost, ) from sglang.srt.m...
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test/registered/unit/mem_cache/test_mem_cache_utils.py
.py
"""Unit tests for mem_cache/utils.py β€” no server, no model loading.""" import hashlib import sys import types import unittest from array import array from types import SimpleNamespace from unittest.mock import MagicMock, patch from sglang.srt.mem_cache.evict_policy import ( FIFOStrategy, FILOStrategy, LFU...
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test/registered/unit/mem_cache/test_unified_radix_cache_bench.py
.py
"""Large-scale benchmark + fuzz correctness tests for UnifiedRadixCache. Usage (standalone): bench: python3 test/registered/unit/mem_cache/test_unified_radix_cache_bench.py --bench --num-seqs 5000 --verify --components mamba legacy-mamba swa legacy-swa CI Test: python -m pytest test/registered/unit/mem_cache/t...
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test/registered/unit/mem_cache/test_hybrid_pool_assembler.py
.py
"""Unit tests for hybrid HiCache pool assembly.""" import unittest from types import SimpleNamespace from sglang.srt.mem_cache.hybrid_cache.hybrid_pool_assembler import ( _split_hicache_size, build_full_draft_pools, ) from sglang.srt.mem_cache.memory_pool import HybridLinearKVPool from sglang.test.ci.ci_regis...
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test/registered/unit/mem_cache/test_full_loc_fast_path.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
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test/registered/unit/mem_cache/test_mamba_donated_alloc_ratio.py
.py
"""CPU-only unit tests for the mamba pool ratio vs the prefill->decode peak. Pins the sizing invariant behind MAMBA_CACHE_SIZE_MAX_RUNNING_REQUESTS_RATIO: at the first cache_unfinished_req, a request still holds its admission-locked matched-prefix mamba (protected) plus its own COW slot, and then allocates a donated s...
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test/registered/unit/mem_cache/test_quantized_kv_pool.py
.py
# Copyright 2026 SGLang Team # Licensed under the Apache License, Version 2.0 import types import unittest import torch from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") class _FakeQuantMethod: name = "fake_quant" def __init__(self): self....
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test/registered/unit/mem_cache/test_radix_cache_slru_accuracy.py
.py
import unittest from array import array import torch from sglang.srt.mem_cache.allocator import TokenToKVPoolAllocator from sglang.srt.mem_cache.base_prefix_cache import ( EvictParams, InsertParams, MatchPrefixParams, ) from sglang.srt.mem_cache.cache_init_params import CacheInitParams from sglang.srt.mem...
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test/registered/unit/mem_cache/test_session_token_share_unit.py
.py
"""Unit tests for the streaming-session in-place token-array share protocol (`Session.create_req` / `finish_req` / `abort_req`): - token arrays are extended in place and shared across turns (no per-turn copy); - committed_* lengths recorded at finish_req trim away tokens appended by a turn that aborted before finish...
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test/registered/unit/mem_cache/test_multi_ended_allocator.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
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test/registered/unit/mem_cache/test_unified_mla_gpu_parity.py
.py
# Copyright 2023-2026 SGLang Team # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writin...
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test/registered/unit/mem_cache/test_hisparse_allocator.py
.py
import unittest from concurrent.futures import ThreadPoolExecutor from types import SimpleNamespace from unittest.mock import MagicMock import numpy as np import torch from sglang.srt.mem_cache.allocator.hisparse import ( DeepSeekV4HiSparseTokenToKVPoolAllocator, ) from sglang.srt.runtime_context import get_conte...
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test/registered/unit/mem_cache/test_kda_fused_decode_strided_state.py
.py
"""NV KDA fused-decode kernel gate + slot addressing vs envelope-strided SSM pools (CPU). Derived property under test: the fully-fused KDA decode kernel (``kda_fused_decode``) addresses the ssm/temporal state pool by the slot pitch the pool actually reports (``ssm_states.stride(0)``), NOT the dense ``HV*V*K`` pitch. U...
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test/registered/unit/mem_cache/test_minimax_sparse_pool_pd_unit.py
.py
import unittest import torch from sglang.srt.mem_cache.memory_pool import MiniMaxSparseKVPool from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") def _make_k_only_pool(start_layer: int = 0) -> MiniMaxSparseKVPool: """Mirror the released MiniMax-M3 config ...
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test/registered/unit/mem_cache/test_triton_kernel_layout.py
.py
"""Triton-kernel parity test for the page-aware decode / extend kernels. Verifies that the modified decode / extend Triton kernels produce bit-identical output when called against: (a) the legacy 3-D ``[N, head, dim]`` KV view (PAGE_SIZE=1 default), (b) the new 4-D ``[num_pages, page_size, head, dim]`` view with ...
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test/registered/unit/mem_cache/test_mooncake_standalone_dummy_mamba.py
.py
import types import unittest from unittest.mock import patch from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=1, suite="base-a-test-cpu") def _fake_mooncake_modules(fake_store_cls): mooncake = types.ModuleType("mooncake") moonc...
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test/registered/unit/disaggregation/test_nixl_backend_basic.py
.py
"""Basic CPU unit tests for NIXL disaggregation control paths.""" import struct import sys import threading import types import unittest from collections import defaultdict from types import SimpleNamespace from unittest.mock import MagicMock, patch import numpy as np from sglang.srt.disaggregation.base.conn import ...
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test/registered/unit/disaggregation/test_kimi_k3_encoder_mode.py
.py
import asyncio import pickle import sys import threading import time from array import array from concurrent.futures import ThreadPoolExecutor from types import SimpleNamespace from unittest.mock import AsyncMock, patch import pytest import torch import zmq import zmq.asyncio from fastapi import HTTPException from PIL...
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test/registered/unit/disaggregation/test_nixl_sender_failure_cleanup.py
.py
import threading import unittest from types import SimpleNamespace from sglang.srt.disaggregation.base.conn import KVPoll from sglang.srt.disaggregation.nixl.conn import NixlKVSender from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=2, suite="base-a-test-cpu") class TestNixlSenderFailu...
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test/registered/unit/disaggregation/test_register_to_bootstrap.py
.py
"""Unit tests for srt/disaggregation/common/conn β€” register_to_bootstrap retry logic.""" from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="base-a-test-cpu") import unittest from unittest.mock import MagicMock, call, patch from sglang.srt.runtime_context import get_context fr...
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test/registered/unit/disaggregation/test_kv_transfer_replica_metric.py
.py
"""Unit tests for KV-transfer replication accounting in PD disaggregation. In Prefill-CP + Decode-TP (e.g. prefill CP8, decode TP8), by default only prefill CP rank 0 transfers, replicating its KV to every decode TP rank. get_transfer_metric() must report bytes put on the wire (logical KV size x fan-out). The fan-out ...
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test/registered/unit/disaggregation/test_disaggregation_wire.py
.py
import struct import threading import unittest from types import SimpleNamespace from unittest.mock import Mock, patch import numpy as np import torch from sglang.srt.disaggregation.base.conn import KVArgs, StateType from sglang.srt.disaggregation.common.staging_handler import ( handle_staging_req, ) from sglang....
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test/registered/unit/disaggregation/test_encode_receiver.py
.py
"""Unit tests for request construction in the encode-disaggregation path.""" import unittest from array import array from types import SimpleNamespace from sglang.srt.disaggregation.encode_receiver import MMReceiverBase from sglang.srt.disaggregation.utils import DisaggregationMode from sglang.srt.sampling.sampling_p...
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test/registered/unit/disaggregation/test_encoder_scheduler.py
.py
import asyncio import sys import pytest from sglang.srt.disaggregation.encode_server import ( EncoderScheduler, PendingRequest, _resolve_encoder_batch_policy, ) from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=1, suite="base-a-test-cpu") def _pending(modality: str = "imag...
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test/registered/unit/disaggregation/test_encoder_health.py
.py
import asyncio import sys import pytest from sglang.srt.disaggregation import encode_server from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=1, suite="base-a-test-cpu") class _FakeEncoder: def __init__(self): self.audio_processor = None self.image_processor = obje...
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test/registered/unit/disaggregation/test_kv_events.py
.py
"""Unit tests for srt/disaggregation/kv_events KV-event publisher rank selection. Covers the data-parallel rank used to offset each scheduler's KV-event publisher port, across pure DP, DP-attention, and single-replica modes. The port offset must make every independent KV cache publish on a distinct port so the router ...
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test/registered/unit/disaggregation/test_decode_queue_cleanup.py
.py
import unittest from types import SimpleNamespace from unittest.mock import MagicMock, patch from sglang.srt.disaggregation.base import KVPoll from sglang.srt.disaggregation.decode import ( DecodePreallocQueue, DecodeTransferQueue, HiCacheRestoreResult, ) from sglang.srt.disaggregation.utils import Disaggr...
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test/registered/unit/disaggregation/test_unified_memory_move_gate.py
.py
"""Regression tests for the unified-memory PD compaction move gate. The gate decides when lazy compaction may relocate physical pages. A page is exposed to the peer from the moment its address is published until the transfer concludes, and for part of that lifetime the request sits in NEITHER end's queue. Both cases b...
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test/registered/unit/disaggregation/test_specv2_kvcache_offloading.py
.py
""" Unit tests for _release_finished_req in DecodeKVCacheOffloadManager. Verifies that over-allocated KV cache slots (from speculative decoding v2) are correctly freed when a request finishes, preventing GPU memory leaks. Requires: torch, sglang (run in an environment with sglang installed) """ import unittest from ...
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test/registered/unit/disaggregation/test_minimax_sparse_disagg_state_kv_args.py
.py
import unittest import torch from sglang.srt.disaggregation.base.conn import KVArgs, StateType from sglang.srt.disaggregation.utils import setup_state_kv_args from sglang.srt.mem_cache.memory_pool import MiniMaxSparseKVPool from sglang.test.ci.ci_register import register_cpu_ci register_cpu_ci(est_time=5, suite="bas...
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test/registered/unit/disaggregation/test_encode_server.py
.py
import pickle import unittest from types import SimpleNamespace import numpy as np import torch from sglang.srt.disaggregation.encode_receiver import EmbeddingData from sglang.srt.disaggregation.encode_server import MMEncoder, _get_mm_grid_dim from sglang.srt.managers.schedule_batch import Modality from sglang.srt.ut...
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sglang
test/registered/unit/tokenizer/test_tekken_tokenizer_routing.py
.py
"""Unit tests for bare-tekken checkpoint tokenizer routing β€” no server, no model loading.""" import os import shutil import tempfile import unittest from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=60, suite="base-a-test-cpu") from sgl...
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sglang
test/registered/unit/tokenizer/test_tiktoken_tokenizer.py
.py
"""Unit tests for tiktoken_tokenizer β€” no server, no model loading.""" import unittest from unittest.mock import MagicMock, patch from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_utils import CustomTestCase register_cpu_ci(est_time=7, suite="base-a-test-cpu") from sglang.srt.tokenizer.ti...
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test/registered/unit/layers/test_layer_communicator_fusion_gate.py
.py
import types import unittest from unittest.mock import patch from sglang.srt.layers import communicator as comm from sglang.srt.layers.communicator import LayerCommunicator, ScatterMode from sglang.srt.runtime_context import get_parallel from sglang.test.ci.ci_register import register_cpu_ci from sglang.test.test_util...
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sglang
test/registered/unit/layers/test_flashinfer_comm_fusion.py
.py
import contextlib import types import unittest from unittest.mock import patch import torch from sglang.srt.layers import flashinfer_comm_fusion as fusion from sglang.srt.runtime_context import get_parallel from sglang.test.ci.ci_register import register_cuda_ci from sglang.test.test_utils import CustomTestCase regi...
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test/registered/unit/layers/test_logprob_fast_input.py
.py
"""Fast input-logprob path must match the log-softmax reference. The fast path (SGLANG_ENABLE_FAST_INPUT_LOGPROBS) computes token / top-k / token-ids logprobs directly from logits with a per-row logsumexp normalizer, never materializing the full-vocab log-softmax. Same math, so results must agree with the reference pa...
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test/registered/unit/layers/test_kda_decode_mtp_slot_stride.py
.py
from sglang.test.ci.ci_register import register_cuda_ci register_cuda_ci(est_time=60, stage="base-b", runner_config="1-gpu-small") import importlib.util import unittest import torch TILE_K = 128 def _sm100(): return torch.cuda.is_available() and torch.cuda.get_device_capability()[0] == 10 def _strided_repli...
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test/registered/unit/layers/test_pooler_score_and_pool.py
.py
"""Unit tests for score_and_pool in sglang.srt.layers.pooler. All tests run on CPU β€” no GPU required. MIS delimiter positions are passed via forward_batch.multi_item_delimiter_indices (pre-computed by the caller). """ import unittest from types import SimpleNamespace import torch import torch.nn as nn from sglang....
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test/registered/unit/layers/test_mamba_state_scatter_triton.py
.py
from sglang.test.ci.ci_register import ( register_amd_ci, register_cpu_ci, register_cuda_ci, ) register_cuda_ci(est_time=7, stage="base-b", runner_config="1-gpu-small") register_amd_ci(est_time=7, suite="stage-b-test-1-gpu-small-amd-mi35x") # The dst layout-contract tests run on CPU (no kernel launch). reg...
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