Blame for docs/developer/splitzip.md

# SplitZip in DDO — VMM routes (vmm_fast primary, vmm_runtime fallback)

Lossless, bitwise-exact compression of offloaded BF16 weights using
[SplitZip](https://arxiv.org/abs/2605.01708) (NeurIPS 2026, MIT code at
[Intelligent-Microsystems-Lab/SplitZip](https://github.com/Intelligent-Microsystems-Lab/SplitZip)).

## What it does

SplitZip splits each BF16 value into a sign+mantissa byte (stored verbatim)
and an exponent byte, codes the top-16 exponents with 4-bit codes (two per
byte), and routes rare exponents to a sparse escape stream (chunk-local
positions, chunk=1024). Expected payload ≈ **0.756× raw** (ratio ~1.32×).
The paper's throughput numbers (613 GB/s encode / 2182 GB/s decode on H200)
are for LLM KV activations; treat your own measurements as authoritative.

## Files added

| File | Role |
| --- | --- |
| `splitzip_codec.py` | Payload layout, calibration, pure-torch codec, upstream Triton encoder + `GpuSplitZipDecoder` |
| `splitzip_shard_cache.py` | One-time builder + runtime lookup (content keys AND slice keys, coverage-gated ≥0.99) |
| `splitzip_fast.py` | **vmm_fast route**: wraps the native shard transport — compressed DMA + in-place GPU decode + torch Event fence |
| `splitzip_staging.py` | **vmm_runtime fallback route**: `SplitZipStagingPool(PinnedStagingPool)` + `decode_group_slots` |

## One-time vendor step

Copy the upstream MIT codec into the package:

```
src/diffusers_dynamic_offloader/_splitzip_vendor/__init__.py
src/diffusers_dynamic_offloader/_splitzip_vendor/codec_gpu.py   # from SplitZip repo
src/diffusers_dynamic_offloader/_splitzip_vendor/LICENSE
```

Windows has no Triton: the fast route is unavailable there by construction
(Python never stages per-weight bytes on it); the staging-pool route falls
back to CPU decode. Add a `splitzip = ["triton>=3.0"]` optional dependency.

## Build the cache (once per model checkpoint)

```python
from pathlib import Path
from diffusers_dynamic_offloader.splitzip_shard_cache import SplitZipShardCacheBuilder

tensors = [(name, mod.weight.data)
           for name, mod in transformer.named_modules()
           if type(mod).__name__ == "Linear" and mod.weight.dtype is torch.bfloat16]
report = SplitZipShardCacheBuilder(Path(cache_root)).build(tensors)
print(report)  # {"encoded": N, "ratio": ~0.76, "skipped_coverage": ..., ...}
```

Calibration runs on the real weights (paper protocol: offline, per-tensor).
Tensors whose Top-16 exponent coverage falls below 0.99 are left uncompressed
by construction — worst case is parity. FP8-E4M3 must NOT be encoded (paper:
expansion); the code gates to `torch.bfloat16` only.

## Route A (primary): vmm_fast with the native DLL allocator

In `_prepare_vmm_fast_runtime`, right after
`report, store = attach_model_linear_modules(...)` and while the loader CPU
tensors are still alive:

```python
from diffusers_dynamic_offloader.splitzip_shard_cache import SplitZipShardCache
from diffusers_dynamic_offloader.splitzip_fast import bind_slice_aliases, enable_splitzip_fast_transport

shard_cache = SplitZipShardCache(Path(cache_root))
bind_slice_aliases(module, shard_cache)        # content key -> (shard, offset, size) aliases
enable_splitzip_fast_transport(store, shard_cache)  # replaces store._native_shard_transport
```

How a compressed fault is served (all on the store's upload stream, no DLL
changes): blob read (comp bytes) → `native.copy_from_host_async(binding.offset,
pinned[:comp], stream)` → `GpuSplitZipDecoder` stashes the payload to GPU
scratch and decodes the full BF16 weight over the arena range → `torch.Event`
recorded after the decode is returned to `wait_for_compute`. Raw (uncached)
bindings are delegated to the inner transport unchanged.

Hardware verification points specific to this route (see checklist below):
`binding.offset` / `binding.file_slice` attribute names, the arena-view helper
(pass `arena_view_fn=` if resolution fails), whether `copy_from_host_async`
requires the host buffer to be `cuMemHostRegister`ed, and whether the adapter
prefetches via the transport for compressed bindings (harmless wasted reads).

## Route B (fallback): vmm_runtime with the pinned staging pool

Replace the pool construction in `_prepare_vmm_runtime` (around L1436) with the
SplitZip subclass, and expand slots after upload:

```python
from diffusers_dynamic_offloader.splitzip_staging import SplitZipStagingPool, decode_group_slots

self._vmm_staging_pool = SplitZipStagingPool(
    pool_size_bytes, slots=2, shard_cache=shard_cache, registered_virtual_host=...,  # existing kwargs
)
# in _schedule_vmm_execution_group, after arena.acquire(...) and before mark_upload:
decode_group_slots(sources, slot_tensors, shard_cache, stream=self._vmm_upload_stream)
```

Invariants (do not break): staging entries always advance by the RAW byte
size; only the leading `comp_bytes` of an entry hold payload; GPU decode is
enqueued after the HtoD DMA and before `mark_upload(group, stream, pool)` on
the same stream.

## Invariants common to both routes

1. **Wire format is frozen**: `pk[n_pairs] u8, sm[n] u8, chunk_id[4·n_esc] i32
   LE, local_pos[2·n_esc] u16 LE, esc_val[n_esc] u8`, 4-byte-aligned offsets.
   The Triton kernels and both decoders compile views against exactly this.
2. **Statefulness**: the codebook lives in the cache manifest; a compressed
   blob is useless without its `dec_lut` — never delete the manifest alone.
3. **Coverage gate 0.99**: below it, the paper's size model degrades; broad-
   exponent distributions can EXPAND (measured 1.17× on adversarial data).
   The gate is the protection — do not lower it without a coverage report.
4. **Losslessness**: the builder asserts bitwise round-trip per tensor before
   writing a blob; keep that assertion.

## Validation checklist (before trusting it)

- [ ] CPU suite: `pytest tests/test_splitzip_codec.py` — green, no GPU needed.
- [ ] Vendored-codec sanity on GPU: encode/decode one real weight with
      upstream `codec_gpu.py`; assert bitwise equality.
- [ ] Cross-check: `GpuSplitZipEncoder` output must decode bit-exactly with
      the pure-torch decoder (proves GPU encoder ↔ wire layout agreement).
- [ ] Fast route single fault: materialize one compressed weight through
      `SplitZipNativeShardTransport`; compare the arena range bytes against a
      raw upload of the same weight.
- [ ] Microbench: `_dec_4bit_quad64` GB/s on your GPU vs PCIe HtoD bandwidth
      — decode must fit under it, else the CPU-decode route is faster.
- [ ] End-to-end: one denoise run with SplitZip on vs off; compare wall-clock,
      host RSS, rematerialization counts, and output pixels (must be identical).
- [ ] Windows: staging-pool CPU-decode path produces bitwise-equal staged views.