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miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/device_host_transport/nvshmem_constants.h

@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEM_CONSTANTS_H_
+#define _NVSHMEM_CONSTANTS_H_
+
+#if !defined __CUDACC_RTC__
+#include <limits.h>
+#else
+#include <cuda/std/climits>
+#endif
+#include "non_abi/nvshmem_version.h"
+
+#define CHANNEL_BUF_SIZE (1 << CHANNEL_BUF_SIZE_LOG)
+#define CHANNEL_BUF_SIZE_LOG 22
+#define CHANNEL_ENTRY_BYTES 8
+
+/* This is not the NVSHMEM release version, it is the supported OpenSHMEM spec version. */
+#define NVSHMEM_MAJOR_VERSION 1
+#define NVSHMEM_MINOR_VERSION 3
+
+#define NVSHMEM_VENDOR_VERSION                                                   \
+    ((NVSHMEM_VENDOR_MAJOR_VERSION)*10000 + (NVSHMEM_VENDOR_MINOR_VERSION)*100 + \
+     (NVSHMEM_VENDOR_PATCH_VERSION))
+
+#define NVSHMEMI_SUBST_AND_STRINGIFY_HELPER(S) #S
+#define NVSHMEMI_SUBST_AND_STRINGIFY(S) NVSHMEMI_SUBST_AND_STRINGIFY_HELPER(S)
+
+#define NVSHMEM_VENDOR_STRING \
+    "NVSHMEM v"                                       \
+            NVSHMEMI_SUBST_AND_STRINGIFY(NVSHMEM_VENDOR_MAJOR_VERSION) "."      \
+            NVSHMEMI_SUBST_AND_STRINGIFY(NVSHMEM_VENDOR_MINOR_VERSION) "."      \
+            NVSHMEMI_SUBST_AND_STRINGIFY(NVSHMEM_VENDOR_PATCH_VERSION)
+
+#define NVSHMEM_MAX_NAME_LEN 256
+
+typedef enum nvshmemi_cmp_type {
+    NVSHMEM_CMP_EQ = 0,
+    NVSHMEM_CMP_NE,
+    NVSHMEM_CMP_GT,
+    NVSHMEM_CMP_LE,
+    NVSHMEM_CMP_LT,
+    NVSHMEM_CMP_GE,
+    NVSHMEM_CMP_SENTINEL = INT_MAX,
+} nvshmemx_cmp_type_t;
+
+enum nvshmemi_thread_support {
+    NVSHMEM_THREAD_SINGLE = 0,
+    NVSHMEM_THREAD_FUNNELED,
+    NVSHMEM_THREAD_SERIALIZED,
+    NVSHMEM_THREAD_MULTIPLE,
+    NVSHMEM_THREAD_TYPE_SENTINEL = INT_MAX,
+};
+
+enum {
+    PROXY_GLOBAL_EXIT_NOT_REQUESTED = 0,
+    PROXY_GLOBAL_EXIT_INIT,
+    PROXY_GLOBAL_EXIT_REQUESTED,
+    PROXY_GLOBAL_EXIT_FINISHED,
+    PROXY_GLOBAL_EXIT_MAX_STATE = INT_MAX
+};
+
+#define PROXY_DMA_REQ_BYTES 32
+#define PROXY_AMO_REQ_BYTES 40
+#define PROXY_INLINE_REQ_BYTES 24
+
+typedef enum {
+    NVSHMEM_STATUS_NOT_INITIALIZED = 0,
+    NVSHMEM_STATUS_IS_BOOTSTRAPPED,
+    NVSHMEM_STATUS_IS_INITIALIZED,
+    NVSHMEM_STATUS_LIMITED_MPG,
+    NVSHMEM_STATUS_FULL_MPG,
+    NVSHMEM_STATUS_INVALID = INT_MAX,
+} nvshmemx_init_status_t;
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/host/nvshmem_api.h

@@ -0,0 +1,489 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEM_API_H_
+#define _NVSHMEM_API_H_
+
+#include <cuda_runtime.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "device_host/nvshmem_common.cuh"
+#include "device_host_transport/nvshmem_constants.h"
+#include "host/nvshmem_macros.h"
+#include "non_abi/nvshmem_version.h"
+
+int nvshmemi_init_thread(int requested_thread_support, int *provided_thread_support,
+                         unsigned int bootstrap_flags, nvshmemx_init_attr_t *bootstrap_attr,
+                         nvshmemi_version_t);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define NVSHMEMI_UNUSED_ARG(ARG) (void)(ARG)
+
+// Library initialization
+#define NONZERO_EXIT(status, ...)                                                              \
+    do {                                                                                       \
+        if (status != 0) {                                                                     \
+            fprintf(stderr, "%s:%d: non-zero status: %d: %s, exiting... ", __FILE__, __LINE__, \
+                    status, strerror(errno));                                                  \
+            fprintf(stderr, __VA_ARGS__);                                                      \
+            exit(-1);                                                                          \
+        }                                                                                      \
+    } while (0)
+
+int nvshmemx_init_status();
+
+static inline void nvshmem_init() {
+    int status = 0, requested = NVSHMEM_THREAD_SERIALIZED, provided;
+    nvshmemi_version_t app_nvshmem_version = {
+        NVSHMEM_VENDOR_MAJOR_VERSION, NVSHMEM_VENDOR_MINOR_VERSION, NVSHMEM_VENDOR_PATCH_VERSION};
+    status = nvshmemi_init_thread(requested, &provided, 0, NULL, app_nvshmem_version);
+    NONZERO_EXIT(status, "aborting due to error in nvshmemi_init_thread \n");
+}
+
+static inline int nvshmem_init_thread(int requested, int *provided) {
+    int status = 0;
+    nvshmemi_version_t app_nvshmem_version = {
+        NVSHMEM_VENDOR_MAJOR_VERSION, NVSHMEM_VENDOR_MINOR_VERSION, NVSHMEM_VENDOR_PATCH_VERSION};
+    status = nvshmemi_init_thread(requested, provided, 0, NULL, app_nvshmem_version);
+    NONZERO_EXIT(status, "aborting due to error in nvshmemi_init_thread \n");
+    return status;
+}
+
+void nvshmem_query_thread(int *provided);
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_global_exit(int status);
+void nvshmemi_finalize();
+static inline void nvshmem_finalize() { nvshmemi_finalize(); }
+
+// PE info query
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_my_pe();
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_n_pes();
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_info_get_version(int *major, int *minor);
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_info_get_name(char *name);
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmemx_vendor_get_version_info(int *major, int *minor,
+                                                                 int *patch);
+
+// Heap management
+void *nvshmem_malloc(size_t size);
+void *nvshmem_calloc(size_t, size_t);
+void *nvshmem_align(size_t, size_t);
+
+void nvshmem_free(void *ptr);
+void *nvshmem_realloc(void *ptr, size_t size);
+NVSHMEMI_HOSTDEVICE_PREFIX void *nvshmem_ptr(const void *ptr, int pe);
+NVSHMEMI_HOSTDEVICE_PREFIX void *nvshmemx_mc_ptr(nvshmem_team_t team, const void *ptr);
+
+//////////////////// OpenSHMEM 1.3 Atomics ////////////////////
+
+#define NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(OPGRPNAME, opname)                  \
+    NVSHMEMI_DECL_TYPE_##OPGRPNAME(uint, unsigned int, opname)                    \
+        NVSHMEMI_DECL_TYPE_##OPGRPNAME(ulong, unsigned long, opname)              \
+            NVSHMEMI_DECL_TYPE_##OPGRPNAME(ulonglong, unsigned long long, opname) \
+                NVSHMEMI_DECL_TYPE_##OPGRPNAME(int32, int32_t, opname)            \
+                    NVSHMEMI_DECL_TYPE_##OPGRPNAME(uint32, uint32_t, opname)      \
+                        NVSHMEMI_DECL_TYPE_##OPGRPNAME(int64, int64_t, opname)    \
+                            NVSHMEMI_DECL_TYPE_##OPGRPNAME(uint64, uint64_t, opname)
+
+#define NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(OPGRPNAME, opname)       \
+    NVSHMEMI_DECL_TYPE_##OPGRPNAME(int, int, opname)                    \
+        NVSHMEMI_DECL_TYPE_##OPGRPNAME(long, long, opname)              \
+            NVSHMEMI_DECL_TYPE_##OPGRPNAME(longlong, long long, opname) \
+                NVSHMEMI_DECL_TYPE_##OPGRPNAME(size, size_t, opname)    \
+                    NVSHMEMI_DECL_TYPE_##OPGRPNAME(ptrdiff, ptrdiff_t, opname)
+
+#define NVSHMEMI_REPT_OPGROUP_FOR_EXTENDED_AMO(OPGRPNAME, opname) \
+    NVSHMEMI_DECL_TYPE_##OPGRPNAME(float, float, opname)          \
+        NVSHMEMI_DECL_TYPE_##OPGRPNAME(double, double, opname)
+
+/* inc */
+#define NVSHMEMI_DECL_TYPE_INC(type, TYPE, opname) \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##type##_atomic_##opname(TYPE *dest, int pe);
+
+/* finc */
+#define NVSHMEMI_DECL_TYPE_FINC(type, TYPE, opname) \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##type##_atomic_##opname(TYPE *dest, int pe);
+
+/* fetch */
+#define NVSHMEMI_DECL_TYPE_FETCH(type, TYPE, opname) \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##type##_atomic_##opname(const TYPE *dest, int pe);
+
+/* add, set */
+#define NVSHMEMI_DECL_TYPE_ADD_SET(type, TYPE, opname)                                       \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##type##_atomic_##opname(TYPE *dest, TYPE value, \
+                                                                     int pe);
+
+/* fadd, swap */
+#define NVSHMEMI_DECL_TYPE_FADD_SWAP(type, TYPE, opname)                                     \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##type##_atomic_##opname(TYPE *dest, TYPE value, \
+                                                                     int pe);
+
+/* cswap */
+#define NVSHMEMI_DECL_TYPE_CSWAP(type, TYPE, opname)                                        \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##type##_atomic_##opname(TYPE *dest, TYPE cond, \
+                                                                     TYPE value, int pe);
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(INC, inc)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(INC, inc)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FINC, fetch_inc)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(FINC, fetch_inc)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FETCH, fetch)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(FETCH, fetch)
+NVSHMEMI_REPT_OPGROUP_FOR_EXTENDED_AMO(FETCH, fetch)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(ADD_SET, add)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(ADD_SET, add)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(ADD_SET, set)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(ADD_SET, set)
+NVSHMEMI_REPT_OPGROUP_FOR_EXTENDED_AMO(ADD_SET, set)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FADD_SWAP, fetch_add)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(FADD_SWAP, fetch_add)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FADD_SWAP, swap)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(FADD_SWAP, swap)
+NVSHMEMI_REPT_OPGROUP_FOR_EXTENDED_AMO(FADD_SWAP, swap)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(CSWAP, compare_swap)
+NVSHMEMI_REPT_OPGROUP_FOR_STANDARD_AMO(CSWAP, compare_swap)
+
+#undef NVSHMEMI_DECL_TYPE_INC
+#undef NVSHMEMI_DECL_TYPE_FINC
+#undef NVSHMEMI_DECL_TYPE_FETCH
+#undef NVSHMEMI_DECL_TYPE_ADD_SET
+#undef NVSHMEMI_DECL_TYPE_FADD_SWAP
+#undef NVSHMEMI_DECL_TYPE_CSWAP
+
+//////////////////// OpenSHMEM 1.4 Atomics ////////////////////
+
+/* and, or, xor */
+#define NVSHMEMI_DECL_TYPE_AND_OR_XOR(type, TYPE, opname)                                    \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##type##_atomic_##opname(TYPE *dest, TYPE value, \
+                                                                     int pe);
+
+/* fand, for, fxor */
+#define NVSHMEMI_DECL_TYPE_FAND_FOR_FXOR(type, TYPE, opname)                                       \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##type##_atomic_fetch_##opname(TYPE *dest, TYPE value, \
+                                                                           int pe);
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(AND_OR_XOR, and)
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(AND_OR_XOR, or)
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(AND_OR_XOR, xor)
+
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FAND_FOR_FXOR, and)
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FAND_FOR_FXOR, or)
+NVSHMEMI_REPT_OPGROUP_FOR_BITWISE_AMO(FAND_FOR_FXOR, xor)
+
+#undef NVSHMEMI_DECL_TYPE_AND_OR_XOR
+#undef NVSHMEMI_DECL_TYPE_FAND_FOR_FXOR
+
+//////////////////// Put ////////////////////
+
+#define NVSHMEMI_DECL_TYPE_P(NAME, TYPE) \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_p(TYPE *dest, const TYPE value, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_P)
+#undef NVSHMEMI_DECL_TYPE_P
+
+#define NVSHMEMI_DECL_TYPE_PUT(NAME, TYPE)                                               \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_put(TYPE *dest, const TYPE *source, \
+                                                         size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_PUT)
+#undef NVSHMEMI_DECL_TYPE_PUT
+
+#define NVSHMEMI_DECL_TYPE_PUT(NAME, TYPE)                                               \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_put(TYPE *dest, const TYPE *source, \
+                                                         size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_PUT)
+#undef NVSHMEMI_DECL_TYPE_PUT
+
+#define NVSHMEMI_DECL_SIZE_PUT(NAME)                                                  \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_put##NAME(void *dest, const void *source, \
+                                                      size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_PUT)
+#undef NVSHMEMI_DECL_SIZE_PUT
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_putmem(void *dest, const void *source, size_t bytes,
+                                               int pe);
+
+#define NVSHMEMI_DECL_TYPE_IPUT(NAME, TYPE)                \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_iput( \
+        TYPE *dest, const TYPE *source, ptrdiff_t dst, ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_IPUT)
+#undef NVSHMEMI_DECL_TYPE_IPUT
+
+#define NVSHMEMI_DECL_SIZE_IPUT(NAME)                   \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_iput##NAME( \
+        void *dest, const void *source, ptrdiff_t dst, ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_IPUT)
+#undef NVSHMEMI_DECL_SIZE_IPUT
+
+#define NVSHMEMI_DECL_TYPE_PUT_NBI(NAME, TYPE)                                               \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_put_nbi(TYPE *dest, const TYPE *source, \
+                                                             size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_PUT_NBI)
+#undef NVSHMEM_DECL_TYPE_PUT_NBI
+
+#define NVSHMEMI_DECL_SIZE_PUT_NBI(NAME)                                                    \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_put##NAME##_nbi(void *dest, const void *source, \
+                                                            size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_PUT_NBI)
+#undef NVSHMEMI_DECL_SIZE_PUT_NBI
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_putmem_nbi(void *dest, const void *source, size_t bytes,
+                                                   int pe);
+
+//////////////////// Get ////////////////////
+
+#define NVSHMEMI_DECL_TYPE_G(NAME, TYPE) \
+    NVSHMEMI_HOSTDEVICE_PREFIX TYPE nvshmem_##NAME##_g(const TYPE *src, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_G)
+#undef NVSHMEMI_DECL_TYPE_G
+
+#define NVSHMEMI_DECL_TYPE_GET(NAME, TYPE)                                               \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_get(TYPE *dest, const TYPE *source, \
+                                                         size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_GET)
+#undef NVSHMEMI_DECL_TYPE_GET
+
+#define NVSHMEMI_DECL_SIZE_GET(NAME)                                                  \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_get##NAME(void *dest, const void *source, \
+                                                      size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_GET)
+#undef NVSHMEMI_DECL_SIZE_GET
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_getmem(void *dest, const void *source, size_t bytes,
+                                               int pe);
+
+#define NVSHMEMI_DECL_TYPE_IGET(NAME, TYPE)                \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_iget( \
+        TYPE *dest, const TYPE *source, ptrdiff_t dst, ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_IGET)
+#undef NVSHMEMI_DECL_TYPE_IGET
+
+#define NVSHMEMI_DECL_SIZE_IGET(NAME)                   \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_iget##NAME( \
+        void *dest, const void *source, ptrdiff_t dst, ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_IGET)
+#undef NVSHMEMI_DECL_SIZE_IGET
+
+#define NVSHMEMI_DECL_TYPE_GET_NBI(NAME, TYPE)                                               \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_##NAME##_get_nbi(TYPE *dest, const TYPE *source, \
+                                                             size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_TYPE_GET_NBI)
+#undef NVSHMEMI_DECL_TYPE_GET_NBI
+
+#define NVSHMEMI_DECL_SIZE_GET_NBI(NAME)                                                    \
+    NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_get##NAME##_nbi(void *dest, const void *source, \
+                                                            size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_GET_NBI)
+#undef NVSHMEMI_DECL_SIZE_GET_NBI
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_getmem_nbi(void *dest, const void *source, size_t bytes,
+                                                   int pe);
+
+#ifdef __CUDACC__
+/* Signal API */
+#define NVSHMEMI_DECL_PUT_SIGNAL(TYPENAME, TYPE)                                                   \
+    __device__ void nvshmem_##TYPENAME##_put_signal(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                    uint64_t *sig_addr, uint64_t signal,           \
+                                                    int sig_op, int pe);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_PUT_SIGNAL)
+#undef NVSHMEMI_DECL_PUT_SIGNAL
+
+#define NVSHMEMI_DECL_PUT_SIGNAL_NBI(TYPENAME, TYPE)                                       \
+    __device__ void nvshmem_##TYPENAME##_put_signal_nbi(TYPE *dest, const TYPE *source,    \
+                                                        size_t nelems, uint64_t *sig_addr, \
+                                                        uint64_t signal, int sig_op, int pe);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMI_DECL_PUT_SIGNAL_NBI)
+#undef NVSHMEMI_DECL_PUT_SIGNAL_NBI
+#endif
+
+#ifdef __CUDACC__
+#define NVSHMEMI_DECL_SIZE_PUT_SIGNAL(BITS)                                                     \
+    __device__ void nvshmem_put##BITS##_signal(void *dest, const void *source, size_t nelems,   \
+                                               uint64_t *sig_addr, uint64_t signal, int sig_op, \
+                                               int pe);
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_PUT_SIGNAL)
+#undef NVSHMEMI_DECL_SIZE_PUT_SIGNAL
+
+#define NVSHMEMI_DECL_SIZE_PUT_SIGNAL_NBI(BITS)                                                   \
+    __device__ void nvshmem_put##BITS##_signal_nbi(void *dest, const void *source, size_t nelems, \
+                                                   uint64_t *sig_addr, uint64_t signal,           \
+                                                   int sig_op, int pe);
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMI_DECL_SIZE_PUT_SIGNAL_NBI)
+#undef NVSHMEMI_DECL_SIZE_PUT_SIGNAL_NBI
+
+__device__ void nvshmem_putmem_signal(void *dest, const void *source, size_t bytes,
+                                      uint64_t *sig_addr, uint64_t signal, int sig_op, int pe);
+
+__device__ void nvshmem_putmem_signal_nbi(void *dest, const void *source, size_t bytes,
+                                          uint64_t *sig_addr, uint64_t signal, int sig_op, int pe);
+#endif
+
+NVSHMEMI_HOSTDEVICE_PREFIX uint64_t nvshmem_signal_fetch(uint64_t *sig_addr);
+
+//////////////////// Point-to-Point Synchronization ////////////////////
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_quiet();
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_fence();
+#ifdef __CUDACC__
+__device__ uint64_t nvshmem_signal_wait_until(uint64_t *sig_addr, int cmp, uint64_t cmp_val);
+
+#define NVSHMEMI_DECL_WAIT_UNTIL(NAME, TYPE) \
+    __device__ void nvshmem_##NAME##_wait_until(TYPE *ivar, int cmp, TYPE cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL)
+#undef NVSHMEMI_DECL_WAIT_UNTIL
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_ALL(NAME, TYPE)                                                  \
+    __device__ void nvshmem_##NAME##_wait_until_all(TYPE *ivar, size_t nelems, const int *status, \
+                                                    int cmp, TYPE cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_ALL)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_ALL
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_ANY(NAME, TYPE)                                 \
+    __device__ size_t nvshmem_##NAME##_wait_until_any(TYPE *ivar, size_t nelems, \
+                                                      const int *status, int cmp, TYPE cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_ANY)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_ANY
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_SOME(NAME, TYPE)       \
+    __device__ size_t nvshmem_##NAME##_wait_until_some( \
+        TYPE *ivar, size_t nelems, size_t *indices, const int *status, int cmp, TYPE cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_SOME)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_SOME
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_ALL_VECTOR(NAME, TYPE)     \
+    __device__ void nvshmem_##NAME##_wait_until_all_vector( \
+        TYPE *ivars, size_t nelems, const int *status, int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_ALL_VECTOR)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_ALL_VECTOR
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_ANY_VECTOR(NAME, TYPE)       \
+    __device__ size_t nvshmem_##NAME##_wait_until_any_vector( \
+        TYPE *ivars, size_t nelems, const int *status, int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_ANY_VECTOR)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_ANY_VECTOR
+
+#define NVSHMEMI_DECL_WAIT_UNTIL_SOME_VECTOR(NAME, TYPE)                                          \
+    __device__ size_t nvshmem_##NAME##_wait_until_some_vector(TYPE *ivars, size_t nelems,         \
+                                                              size_t *indices, const int *status, \
+                                                              int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_WAIT_UNTIL_SOME_VECTOR)
+#undef NVSHMEMI_DECL_WAIT_UNTIL_SOME_VECTOR
+
+#define NVSHMEMI_DECL_TEST(NAME, TYPE) \
+    __device__ int nvshmem_##NAME##_test(TYPE *ivar, int cmp, TYPE cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST)
+#undef NVSHMEMI_DECL_TEST
+
+#define NVSHMEMI_DECL_TEST_ALL(Name, Type)                                                  \
+    __device__ int nvshmem_##Name##_test_all(Type *ivars, size_t nelems, const int *status, \
+                                             int cmp, Type cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_ALL)
+#undef NVSHMEMI_DECL_TEST_ALL
+
+#define NVSHMEMI_DECL_TEST_ANY(Name, Type)                                                     \
+    __device__ size_t nvshmem_##Name##_test_any(Type *ivars, size_t nelems, const int *status, \
+                                                int cmp, Type cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_ANY)
+#undef NVSHMEMI_DECL_TEST_ANY
+
+#define NVSHMEMI_DECL_TEST_SOME(Name, Type)                                                   \
+    __device__ size_t nvshmem_##Name##_test_some(Type *ivars, size_t nelems, size_t *indices, \
+                                                 const int *status, int cmp, Type cmp_value);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_SOME)
+#undef NVSHMEMI_DECL_TEST_SOME
+
+#define NVSHMEMI_DECL_TEST_ALL_VECTOR(NAME, TYPE)                                                  \
+    __device__ int nvshmem_##NAME##_test_all_vector(TYPE *ivars, size_t nelems, const int *status, \
+                                                    int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_ALL_VECTOR)
+#undef NVSHMEMI_DECL_TEST_ALL_VECTOR
+
+#define NVSHMEMI_DECL_TEST_ANY_VECTOR(NAME, TYPE)       \
+    __device__ size_t nvshmem_##NAME##_test_any_vector( \
+        TYPE *ivars, size_t nelems, const int *status, int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_ANY_VECTOR)
+#undef NVSHMEMI_DECL_TEST_ANY_VECTOR
+
+#define NVSHMEMI_DECL_TEST_SOME_VECTOR(NAME, TYPE)                                          \
+    __device__ size_t nvshmem_##NAME##_test_some_vector(TYPE *ivars, size_t nelems,         \
+                                                        size_t *indices, const int *status, \
+                                                        int cmp, TYPE *cmp_values);
+
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMI_DECL_TEST_SOME_VECTOR)
+#undef NVSHMEMI_DECL_TEST_SOME_VECTOR
+#endif /* __CUDACC__ */
+
+//////////////////// Teams API ////////////////////
+
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_team_my_pe(nvshmem_team_t team);
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_team_n_pes(nvshmem_team_t team);
+
+void nvshmem_team_get_config(nvshmem_team_t team, nvshmem_team_config_t *config);
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_team_translate_pe(nvshmem_team_t src_team, int src_pe,
+                                                         nvshmem_team_t dest_team);
+int nvshmem_team_split_strided(nvshmem_team_t parent_team, int PE_start, int PE_stride, int PE_size,
+                               const nvshmem_team_config_t *config, long config_mask,
+                               nvshmem_team_t *new_team);
+
+int nvshmemx_team_get_uniqueid(nvshmemx_team_uniqueid_t *uniqueid);
+int nvshmemx_team_init(nvshmem_team_t *team, nvshmem_team_config_t *config, long config_mask,
+                       int npes, int pe_idx_in_team);
+int nvshmem_team_split_2d(nvshmem_team_t parent_team, int xrange,
+                          const nvshmem_team_config_t *xaxis_config, long xaxis_mask,
+                          nvshmem_team_t *xaxis_team, const nvshmem_team_config_t *yaxis_config,
+                          long yaxis_mask, nvshmem_team_t *yaxis_team);
+void nvshmem_team_destroy(nvshmem_team_t team);
+
+#ifdef __cplusplus
+}
+#endif
+
+#include "host/nvshmem_coll_api.h"
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/host/nvshmem_coll_api.h

@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEM_COLL_API_H_
+#define _NVSHMEM_COLL_API_H_
+#include "device_host/nvshmem_types.h"
+#include "device_host/nvshmem_common.cuh"
+#include "host/nvshmem_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+//===============================
+// standard nvshmem collective calls
+//===============================
+
+// alltoall(s) collectives
+#define DECL_NVSHMEM_TYPENAME_ALLTOALL(TYPENAME, TYPE)                                            \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##TYPENAME##_alltoall(nvshmem_team_t team, TYPE *dest, \
+                                                                 const TYPE *src, size_t nelems);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEM_TYPENAME_ALLTOALL)
+#undef DECL_NVSHMEM_TYPENAME_ALLTOALL
+
+#define DECL_NVSHMEM_TYPENAME_ALLTOALLS(TYPENAME, TYPE)                                            \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##TYPENAME##_alltoalls(nvshmem_team_t team, TYPE *dest, \
+                                                                  const TYPE *src, ptrdiff_t dst,  \
+                                                                  ptrdiff_t sst, size_t nelems);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEM_TYPENAME_ALLTOALLS)
+#undef DECL_NVSHMEM_TYPENAME_ALLTOALLS
+
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_alltoallmem(nvshmem_team_t team, void *dest, const void *src,
+                                                   size_t nelems);
+
+// barrier collectives
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_barrier(nvshmem_team_t team);
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_barrier_all();
+
+// sync collectives
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_team_sync(nvshmem_team_t team);
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmem_sync_all();
+#define nvshmem_sync nvshmem_team_sync
+
+// broadcast collectives
+#define DECL_NVSHMEM_TYPENAME_BROADCAST(TYPENAME, TYPE)            \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##TYPENAME##_broadcast( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nelem, int PE_root);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEM_TYPENAME_BROADCAST)
+#undef DECL_NVSHMEM_TYPENAME_BROADCAST
+
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_broadcastmem(nvshmem_team_t team, void *dest,
+                                                    const void *src, size_t nelems, int PE_root);
+
+// fcollect collective
+#define DECL_NVSHMEM_TYPENAME_FCOLLECT(TYPENAME, TYPE)                                            \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##TYPENAME##_fcollect(nvshmem_team_t team, TYPE *dest, \
+                                                                 const TYPE *src, size_t nelem);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEM_TYPENAME_FCOLLECT)
+#undef DECL_NVSHMEM_TYPENAME_FCOLLECT
+
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_fcollectmem(nvshmem_team_t team, void *dest, const void *src,
+                                                   size_t nelems);
+// reduction collectives
+#define NVSHMEMI_DECL_TEAM_REDUCE(NAME, TYPE, OP)                  \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##NAME##_##OP##_reduce( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce);
+
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, and)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, or)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, xor)
+
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, max)
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, min)
+
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, sum)
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCE, prod)
+
+#undef NVSHMEMI_DECL_TEAM_REDUCE
+
+// reducescatter collectives
+#define NVSHMEMI_DECL_TEAM_REDUCESCATTER(NAME, TYPE, OP)                  \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmem_##NAME##_##OP##_reducescatter( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce);
+
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, and)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, or)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, xor)
+
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, max)
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, min)
+
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, sum)
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_TEAM_REDUCESCATTER, prod)
+
+#undef NVSHMEMI_DECL_TEAM_REDUCESCATTER
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NVSHMEM_COLL_H */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/host/nvshmem_macros.h

@@ -0,0 +1,23 @@
+
+#ifndef _NVSHMEM_MACROS_H_
+#define _NVSHMEM_MACROS_H_
+
+#include <cuda_runtime.h>
+#include "non_abi/nvshmem_build_options.h"
+
+#ifdef __CUDA_ARCH__
+#ifdef NVSHMEMI_HOST_ONLY
+#define NVSHMEMI_HOSTDEVICE_PREFIX __host__
+#else
+#define NVSHMEMI_HOSTDEVICE_PREFIX __host__ __device__
+#endif
+#else
+#define NVSHMEMI_HOSTDEVICE_PREFIX
+#endif
+
+#if defined NVSHMEM_HOSTLIB_ONLY
+#undef NVSHMEMI_HOSTDEVICE_PREFIX
+#define NVSHMEMI_HOSTDEVICE_PREFIX __host__ __device__ __attribute__((always_inline))
+#endif
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/host/nvshmemx_api.h

@@ -0,0 +1,470 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEMX_API_H_
+#define _NVSHMEMX_API_H_
+
+#include <cuda.h>
+#include <cuda_runtime.h>
+#include <stdint.h>
+#include <stddef.h>
+#include "device_host_transport/nvshmem_constants.h"
+#include "device_host/nvshmem_common.cuh"
+#include "non_abi/nvshmem_version.h"
+#include "host/nvshmemx_coll_api.h"
+#include "host/nvshmem_macros.h"
+#include "non_abi/nvshmemx_error.h"
+#include "host/nvshmem_api.h"
+
+int nvshmemi_collective_launch(const void *func, dim3 gridDims, dim3 blockDims, void **args,
+                               size_t sharedMem, cudaStream_t stream);
+
+int nvshmemi_collective_launch_query_gridsize(const void *func, dim3 blockDims, void **args,
+                                              size_t sharedMem, int *gridsize);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum flags {
+    NVSHMEMX_INIT_THREAD_PES = 1,
+    NVSHMEMX_INIT_WITH_MPI_COMM = 1 << 1,
+    NVSHMEMX_INIT_WITH_SHMEM = 1 << 2,
+    NVSHMEMX_INIT_WITH_UNIQUEID = 1 << 3,
+    NVSHMEMX_INIT_MAX = 1 << 31
+};
+
+// Heap management extensions
+int nvshmemx_buffer_register(void *addr, size_t length);
+int nvshmemx_buffer_unregister(void *addr);
+void nvshmemx_buffer_unregister_all();
+
+// Initialization & Finalization extensions
+int nvshmemx_hostlib_init_attr(unsigned int flags, nvshmemx_init_attr_t *attr);
+void nvshmemx_hostlib_finalize();
+
+static inline int nvshmemx_init_attr(unsigned int flags, nvshmemx_init_attr_t *attributes) {
+    int status = 0, requested = NVSHMEM_THREAD_SERIALIZED, provided;
+    nvshmemi_version_t app_nvshmem_version = {
+        NVSHMEM_VENDOR_MAJOR_VERSION, NVSHMEM_VENDOR_MINOR_VERSION, NVSHMEM_VENDOR_PATCH_VERSION};
+    if (attributes != NULL) {
+        nvshmemx_init_init_attr_ver_only((*attributes));
+    }
+    status = nvshmemi_init_thread(requested, &provided, flags, attributes, app_nvshmem_version);
+    NONZERO_EXIT(status, "aborting due to error in nvshmemi_init_thread \n");
+    return status;
+}
+
+int nvshmemx_set_attr_uniqueid_args(const int myrank, const int nranks,
+                                    const nvshmemx_uniqueid_t *uniqueid,
+                                    nvshmemx_init_attr_t *attr);
+int nvshmemx_set_attr_mpi_comm_args(void *mpi_comm, nvshmemx_init_attr_t *nvshmem_attr);
+int nvshmemx_get_uniqueid(nvshmemx_uniqueid_t *uniqueid);
+
+int nvshmemx_cumodule_init(CUmodule module);
+int nvshmemx_cumodule_finalize(CUmodule module);
+
+void *nvshmemx_buffer_register_symmetric(void *buf_ptr, size_t size, int flags);
+int nvshmemx_buffer_unregister_symmetric(void *mmap_ptr, size_t size);
+#if defined(CUDA_VERSION) && CUDART_VERSION < 12000
+/**
+ * CULibrary is a CUDA 12 type
+ * This is handled "correctly" by wrappers in `cudawrap.h`
+ * But that's not #include-able from here since it's in `internal/`
+ * This type needs to match the one in `cudawrap.h`
+ */
+typedef void *CUlibrary;
+#endif
+
+int nvshmemx_culibrary_init(CUlibrary library);
+int nvshmemx_culibrary_finalize(CUlibrary library);
+
+//////////////////// Put On Stream ////////////////////
+
+#define NVSHMEMX_DECL_TYPE_P_ON_STREAM(NAME, TYPE) \
+    void nvshmemx_##NAME##_p_on_stream(TYPE *dest, const TYPE value, int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_P_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_P_ON_STREAM
+
+#define NVSHMEMX_DECL_TYPE_PUT_ON_STREAM(NAME, TYPE)                                            \
+    void nvshmemx_##NAME##_put_on_stream(TYPE *dest, const TYPE *source, size_t nelems, int pe, \
+                                         cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_PUT_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_PUT_ON_STREAM(NAME)                                                 \
+    void nvshmemx_put##NAME##_on_stream(void *dest, const void *source, size_t nelems, int pe, \
+                                        cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_PUT_ON_STREAM
+
+void nvshmemx_putmem_on_stream(void *dest, const void *source, size_t bytes, int pe,
+                               cudaStream_t cstrm);
+
+#define NVSHMEMX_DECL_TYPE_PUT_SIGNAL_ON_STREAM(NAME, TYPE)                                      \
+    void nvshmemx_##NAME##_put_signal_on_stream(TYPE *dest, const TYPE *source, size_t nelems,   \
+                                                uint64_t *sig_addr, uint64_t signal, int sig_op, \
+                                                int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_SIGNAL_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_PUT_SIGNAL_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_PUT_SIGNAL_ON_STREAM(NAME)                                           \
+    void nvshmemx_put##NAME##_signal_on_stream(void *dest, const void *source, size_t nelems,   \
+                                               uint64_t *sig_addr, uint64_t signal, int sig_op, \
+                                               int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_SIGNAL_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_PUT_SIGNAL_ON_STREAM
+
+void nvshmemx_putmem_signal_on_stream(void *dest, const void *source, size_t bytes,
+                                      uint64_t *sig_addr, uint64_t signal, int sig_op, int pe,
+                                      cudaStream_t cstrm);
+
+#define NVSHMEMX_DECL_TYPE_PUT_SIGNAL_NBI_ON_STREAM(NAME, TYPE)                                    \
+    void nvshmemx_##NAME##_put_signal_nbi_on_stream(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                    uint64_t *sig_addr, uint64_t signal,           \
+                                                    int sig_op, int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_SIGNAL_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_PUT_SIGNAL_NBI_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_PUT_SIGNAL_NBI_ON_STREAM(NAME)                                         \
+    void nvshmemx_put##NAME##_signal_nbi_on_stream(void *dest, const void *source, size_t nelems, \
+                                                   uint64_t *sig_addr, uint64_t signal,           \
+                                                   int sig_op, int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_SIGNAL_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_PUT_SIGNAL_NBI_ON_STREAM
+
+void nvshmemx_putmem_signal_nbi_on_stream(void *dest, const void *source, size_t bytes,
+                                          uint64_t *sig_addr, uint64_t signal, int sig_op, int pe,
+                                          cudaStream_t cstrm);
+
+#define NVSHMEMX_DECL_TYPE_IPUT_ON_STREAM(NAME, TYPE)                                    \
+    void nvshmemx_##NAME##_iput_on_stream(TYPE *dest, const TYPE *source, ptrdiff_t dst, \
+                                          ptrdiff_t sst, size_t nelems, int pe,          \
+                                          cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_IPUT_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_IPUT_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_IPUT_ON_STREAM(NAME)                                         \
+    void nvshmemx_iput##NAME##_on_stream(void *dest, const void *source, ptrdiff_t dst, \
+                                         ptrdiff_t sst, size_t nelems, int pe,          \
+                                         cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_IPUT_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_IPUT_ON_STREAM
+
+#define NVSHMEMX_DECL_TYPE_PUT_NBI_ON_STREAM(NAME, TYPE)                                    \
+    void nvshmemx_##NAME##_put_nbi_on_stream(TYPE *dest, const TYPE *source, size_t nelems, \
+                                             int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_PUT_NBI_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_PUT_NBI_ON_STREAM(NAME)                                                 \
+    void nvshmemx_put##NAME##_nbi_on_stream(void *dest, const void *source, size_t nelems, int pe, \
+                                            cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_PUT_NBI_ON_STREAM
+
+void nvshmemx_putmem_nbi_on_stream(void *dest, const void *source, size_t bytes, int pe,
+                                   cudaStream_t cstrm);
+
+//////////////////// Get On Stream ////////////////////
+
+#define NVSHMEMX_DECL_TYPE_G_ON_STREAM(NAME, TYPE) \
+    TYPE nvshmemx_##NAME##_g_on_stream(const TYPE *src, int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_G_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_G_ON_STREAM
+
+#define NVSHMEMX_DECL_TYPE_GET_ON_STREAM(NAME, TYPE)                                            \
+    void nvshmemx_##NAME##_get_on_stream(TYPE *dest, const TYPE *source, size_t nelems, int pe, \
+                                         cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_GET_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_GET_ON_STREAM
+
+#define NVSHMEMX_DECL_TYPE_IGET_ON_STREAM(NAME, TYPE)                                    \
+    void nvshmemx_##NAME##_iget_on_stream(TYPE *dest, const TYPE *source, ptrdiff_t dst, \
+                                          ptrdiff_t sst, size_t nelems, int pe,          \
+                                          cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_IGET_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_IGET_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_GET_ON_STREAM(NAME)                                                 \
+    void nvshmemx_get##NAME##_on_stream(void *dest, const void *source, size_t nelems, int pe, \
+                                        cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_GET_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_GET_ON_STREAM
+
+void nvshmemx_getmem_on_stream(void *dest, const void *source, size_t bytes, int pe,
+                               cudaStream_t cstrm);
+
+#define NVSHMEMX_DECL_SIZE_IGET_ON_STREAM(NAME)                                         \
+    void nvshmemx_iget##NAME##_on_stream(void *dest, const void *source, ptrdiff_t dst, \
+                                         ptrdiff_t sst, size_t nelems, int pe,          \
+                                         cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_IGET_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_IGET_ON_STREAM
+
+#define NVSHMEMX_DECL_TYPE_GET_NBI_ON_STREAM(NAME, TYPE)                                    \
+    void nvshmemx_##NAME##_get_nbi_on_stream(TYPE *dest, const TYPE *source, size_t nelems, \
+                                             int pe, cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_GET_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_TYPE_GET_NBI_ON_STREAM
+
+#define NVSHMEMX_DECL_SIZE_GET_NBI_ON_STREAM(NAME)                                                 \
+    void nvshmemx_get##NAME##_nbi_on_stream(void *dest, const void *source, size_t nelems, int pe, \
+                                            cudaStream_t cstrm);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_GET_NBI_ON_STREAM)
+#undef NVSHMEMX_DECL_SIZE_GET_NBI_ON_STREAM
+
+void nvshmemx_getmem_nbi_on_stream(void *dest, const void *source, size_t bytes, int pe,
+                                   cudaStream_t cstrm);
+
+//////////////////// Synchronization On Stream ////////////////////
+
+void nvshmemx_quiet_on_stream(cudaStream_t cstrm);
+
+void nvshmemx_signal_op_on_stream(uint64_t *sig_addr, uint64_t signal, int sig_op, int pe,
+                                  cudaStream_t cstrm);
+
+#define NVSHMEMX_DECL_WAIT_UNTIL_ON_STREAM(NAME, Type)                               \
+    void nvshmemx_##NAME##_wait_until_on_stream(Type *ivar, int cmp, Type cmp_value, \
+                                                cudaStream_t cstream);
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMX_DECL_WAIT_UNTIL_ON_STREAM)
+#undef NVSHMEMX_DECL_WAIT_UNTIL_ON_STREAM
+
+#define NVSHMEMX_DECL_WAIT_UNTIL_ALL_ON_STREAM(NAME, Type)                                         \
+    void nvshmemx_##NAME##_wait_until_all_on_stream(Type *ivars, size_t nelems, const int *status, \
+                                                    int cmp, Type cmp_value,                       \
+                                                    cudaStream_t cstream);
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMX_DECL_WAIT_UNTIL_ALL_ON_STREAM)
+#undef NVSHMEMX_DECL_WAIT_UNTIL_ALL_ON_STREAM
+
+#define NVSHMEMX_DECL_WAIT_UNTIL_ALL_VECTOR_ON_STREAM(NAME, Type)                      \
+    void nvshmemx_##NAME##_wait_until_all_vector_on_stream(Type *ivars, size_t nelems, \
+                                                           const int *status, int cmp, \
+                                                           Type *cmp_value, cudaStream_t cstream);
+NVSHMEMI_REPT_FOR_WAIT_TYPES(NVSHMEMX_DECL_WAIT_UNTIL_ALL_VECTOR_ON_STREAM)
+#undef NVSHMEMX_DECL_WAIT_UNTIL_ALL_VECTOR_ON_STREAM
+
+void nvshmemx_signal_wait_until_on_stream(uint64_t *sig_addr, int cmp, uint64_t cmp_value,
+                                          cudaStream_t cstream);
+//////////////////// Put on Thread Group ////////////////////
+
+#define NVSHMEMX_DECL_TYPE_PUT_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_put_warp(TYPE *dest, const TYPE *source, size_t nelems,  \
+                                               int pe);                                        \
+    __device__ void nvshmemx_##NAME##_put_block(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_PUT_THREADGROUP
+
+#define NVSHMEMX_DECL_SIZE_PUT_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_put##NAME##_warp(void *dest, const void *source, size_t nelems,  \
+                                              int pe);                                        \
+    __device__ void nvshmemx_put##NAME##_block(void *dest, const void *source, size_t nelems, \
+                                               int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_PUT_THREADGROUP
+
+__device__ void nvshmemx_putmem_warp(void *dest, const void *source, size_t bytes, int pe);
+__device__ void nvshmemx_putmem_block(void *dest, const void *source, size_t bytes, int pe);
+
+/* __device__ nvshmem_<typename>_put_signal_scope */
+#define NVSHMEMI_TYPENAME_PUT_SIGNAL_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX, TYPENAME, TYPE) \
+    __device__ void nvshmemx_##TYPENAME##_put_signal##SC_SUFFIX(                             \
+        TYPE *dest, const TYPE *source, size_t nelems, uint64_t *sig_addr, uint64_t signal,  \
+        int sig_op, int pe);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE2(NVSHMEMI_TYPENAME_PUT_SIGNAL_SCOPE_DECL, warp,
+                                                 _warp, x)
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE2(NVSHMEMI_TYPENAME_PUT_SIGNAL_SCOPE_DECL, block,
+                                                 _block, x)
+#undef NVSHMEMI_TYPENAME_PUT_SIGNAL_SCOPE_DECL
+
+/* __device__ nvshmem_putmem_signal_scope */
+#define NVSHMEMI_PUTMEM_SIGNAL_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX)                   \
+    __device__ void nvshmemx_putmem_signal##SC_SUFFIX(void *dest, const void *source,    \
+                                                      size_t nelems, uint64_t *sig_addr, \
+                                                      uint64_t signal, int sig_op, int pe);
+
+NVSHMEMI_PUTMEM_SIGNAL_SCOPE_DECL(warp, _warp, x)
+NVSHMEMI_PUTMEM_SIGNAL_SCOPE_DECL(block, _block, x)
+#undef NVSHMEMI_PUTMEM_SIGNAL_SCOPE_DECL
+
+/* __device__ nvshmem_putsize_signal_scope */
+#define NVSHMEMI_PUTSIZE_SIGNAL_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX, BITS)                 \
+    __device__ void nvshmemx_put##BITS##_signal##SC_SUFFIX(void *dest, const void *source,    \
+                                                           size_t nelems, uint64_t *sig_addr, \
+                                                           uint64_t signal, int sig_op, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES_WITH_SCOPE2(NVSHMEMI_PUTSIZE_SIGNAL_SCOPE_DECL, warp, _warp, x)
+NVSHMEMI_REPT_FOR_SIZES_WITH_SCOPE2(NVSHMEMI_PUTSIZE_SIGNAL_SCOPE_DECL, block, _block, x)
+#undef NVSHMEMI_REPT_PUTSIZE_SIGNAL_FOR_SCOPE
+
+/* __device__ nvshmem_<typename>_put_signal_nbi_scope */
+#define NVSHMEMI_TYPENAME_PUT_SIGNAL_NBI_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX, TYPENAME, TYPE) \
+    __device__ void nvshmemx_##TYPENAME##_put_signal_nbi##SC_SUFFIX(                             \
+        TYPE *dest, const TYPE *source, size_t nelems, uint64_t *sig_addr, uint64_t signal,      \
+        int sig_op, int pe);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE2(NVSHMEMI_TYPENAME_PUT_SIGNAL_NBI_SCOPE_DECL, warp,
+                                                 _warp, x)
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE2(NVSHMEMI_TYPENAME_PUT_SIGNAL_NBI_SCOPE_DECL, block,
+                                                 _block, x)
+#undef NVSHMEMI_TYPENAME_PUT_SIGNAL_NBI_SCOPE_DECL
+
+/* __device__ nvshmem_putmem_signal_nbi_scope */
+#define NVSHMEMI_PUTMEM_SIGNAL_NBI_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX)                   \
+    __device__ void nvshmemx_putmem_signal_nbi##SC_SUFFIX(void *dest, const void *source,    \
+                                                          size_t nelems, uint64_t *sig_addr, \
+                                                          uint64_t signal, int sig_op, int pe);
+
+NVSHMEMI_PUTMEM_SIGNAL_NBI_SCOPE_DECL(warp, _warp, x)
+NVSHMEMI_PUTMEM_SIGNAL_NBI_SCOPE_DECL(block, _block, x)
+#undef NVSHMEMI_PUTMEM_SIGNAL_NBI_SCOPE_DECL
+
+/* __device__ nvshmem_putsize_signal_nbi_scope */
+#define NVSHMEMI_PUTSIZE_SIGNAL_NBI_SCOPE_DECL(SCOPE, SC_SUFFIX, SC_PREFIX, BITS)           \
+    __device__ void nvshmemx_put##BITS##_signal_nbi##SC_SUFFIX(                             \
+        void *dest, const void *source, size_t nelems, uint64_t *sig_addr, uint64_t signal, \
+        int sig_op, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES_WITH_SCOPE2(NVSHMEMI_PUTSIZE_SIGNAL_NBI_SCOPE_DECL, warp, _warp, x)
+NVSHMEMI_REPT_FOR_SIZES_WITH_SCOPE2(NVSHMEMI_PUTSIZE_SIGNAL_NBI_SCOPE_DECL, block, _block, x)
+#undef NVSHMEMI_REPT_PUTSIZE_SIGNAL_NBI_FOR_SCOPE
+
+#define NVSHMEMX_DECL_TYPE_IPUT_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_iput_warp(TYPE *dest, const TYPE *source, ptrdiff_t dst,  \
+                                                ptrdiff_t sst, size_t nelems, int pe);          \
+    __device__ void nvshmemx_##NAME##_iput_block(TYPE *dest, const TYPE *source, ptrdiff_t dst, \
+                                                 ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_IPUT_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_IPUT_THREADGROUP
+
+#define NVSHMEMX_DECL_SIZE_IPUT_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_iput##NAME##_warp(void *dest, const void *source, ptrdiff_t dst,  \
+                                               ptrdiff_t sst, size_t nelems, int pe);          \
+    __device__ void nvshmemx_iput##NAME##_block(void *dest, const void *source, ptrdiff_t dst, \
+                                                ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_IPUT_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_IPUT_THREADGROUP
+
+#define NVSHMEMX_DECL_TYPE_PUT_NBI_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_put_nbi_warp(TYPE *dest, const TYPE *source, size_t nelems,  \
+                                                   int pe);                                        \
+    __device__ void nvshmemx_##NAME##_put_nbi_block(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                    int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_PUT_NBI_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_PUT_NBI_THREADGROUP
+
+#define NVSHMEMX_DECL_SIZE_PUT_NBI_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_put##NAME##_nbi_warp(void *dest, const void *source, size_t nelems,  \
+                                                  int pe);                                        \
+    __device__ void nvshmemx_put##NAME##_nbi_block(void *dest, const void *source, size_t nelems, \
+                                                   int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_PUT_NBI_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_PUT_NBI_THREADGROUP
+
+__device__ void nvshmemx_putmem_nbi_warp(void *dest, const void *source, size_t bytes, int pe);
+__device__ void nvshmemx_putmem_nbi_block(void *dest, const void *source, size_t bytes, int pe);
+
+//////////////////// Get on Thread Group ////////////////////
+
+#define NVSHMEMX_DECL_TYPE_GET_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_get_warp(TYPE *dest, const TYPE *source, size_t nelems,  \
+                                               int pe);                                        \
+    __device__ void nvshmemx_##NAME##_get_block(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_GET_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_GET_THREADGROUP
+
+#define NVSHMEMX_DECL_TYPE_IGET_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_iget_warp(TYPE *dest, const TYPE *source, ptrdiff_t dst,  \
+                                                ptrdiff_t sst, size_t nelems, int pe);          \
+    __device__ void nvshmemx_##NAME##_iget_block(TYPE *dest, const TYPE *source, ptrdiff_t dst, \
+                                                 ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_IGET_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_IGET_THREADGROUP
+
+#define NVSHMEMX_DECL_SIZE_GET_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_get##NAME##_warp(void *dest, const void *source, size_t nelems,  \
+                                              int pe);                                        \
+    __device__ void nvshmemx_get##NAME##_block(void *dest, const void *source, size_t nelems, \
+                                               int pe);
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_GET_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_GET_THREADGROUP
+
+__device__ void nvshmemx_getmem_warp(void *dest, const void *source, size_t bytes, int pe);
+__device__ void nvshmemx_getmem_block(void *dest, const void *source, size_t bytes, int pe);
+
+#define NVSHMEMX_DECL_SIZE_IGET_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_iget##NAME##_warp(void *dest, const void *source, ptrdiff_t dst,  \
+                                               ptrdiff_t sst, size_t nelems, int pe);          \
+    __device__ void nvshmemx_iget##NAME##_block(void *dest, const void *source, ptrdiff_t dst, \
+                                                ptrdiff_t sst, size_t nelems, int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_IGET_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_IGET_THREADGROUP
+
+#define NVSHMEMX_DECL_TYPE_GET_NBI_THREADGROUP(NAME, TYPE)                                         \
+    __device__ void nvshmemx_##NAME##_get_nbi_warp(TYPE *dest, const TYPE *source, size_t nelems,  \
+                                                   int pe);                                        \
+    __device__ void nvshmemx_##NAME##_get_nbi_block(TYPE *dest, const TYPE *source, size_t nelems, \
+                                                    int pe);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(NVSHMEMX_DECL_TYPE_GET_NBI_THREADGROUP)
+#undef NVSHMEMX_DECL_TYPE_GET_NBI_THREADGROUP
+
+#define NVSHMEMX_DECL_SIZE_GET_NBI_THREADGROUP(NAME)                                              \
+    __device__ void nvshmemx_get##NAME##_nbi_warp(void *dest, const void *source, size_t nelems,  \
+                                                  int pe);                                        \
+    __device__ void nvshmemx_get##NAME##_nbi_block(void *dest, const void *source, size_t nelems, \
+                                                   int pe);
+
+NVSHMEMI_REPT_FOR_SIZES(NVSHMEMX_DECL_SIZE_GET_NBI_THREADGROUP)
+#undef NVSHMEMX_DECL_SIZE_GET_NBI_THREADGROUP
+
+__device__ void nvshmemx_getmem_nbi_warp(void *dest, const void *source, size_t bytes, int pe);
+__device__ void nvshmemx_getmem_nbi_block(void *dest, const void *source, size_t bytes, int pe);
+
+//////////////////// Signal ////////////////////
+
+NVSHMEMI_HOSTDEVICE_PREFIX void nvshmemx_signal_op(uint64_t *sig_addr, uint64_t signal, int sig_op,
+                                                   int pe);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _NVSHMEMX_API_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/host/nvshmemx_coll_api.h

@@ -0,0 +1,214 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEMX_COLL_API_H_
+#define _NVSHMEMX_COLL_API_H_
+#include <cuda_runtime.h>
+#include "host/nvshmem_macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+//==========================================
+// nvshmem collective calls with stream param
+//==========================================
+
+// alltoall(s) collectives
+#define DECL_NVSHMEMX_TYPENAME_ALLTOALL_ON_STREAM(TYPENAME, TYPE)                                  \
+    int nvshmemx_##TYPENAME##_alltoall_on_stream(nvshmem_team_t team, TYPE *dest, const TYPE *src, \
+                                                 size_t nelem, cudaStream_t stream);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEMX_TYPENAME_ALLTOALL_ON_STREAM)
+#undef DECL_NVSHMEMX_TYPENAME_ALLTOALL_ON_STREAM
+
+int nvshmemx_alltoallmem_on_stream(nvshmem_team_t team, void *dest, const void *src, size_t nelem,
+                                   cudaStream_t stream);
+
+// barrier collectives
+int nvshmemx_barrier_on_stream(nvshmem_team_t team, cudaStream_t stream);
+void nvshmemx_barrier_all_on_stream(cudaStream_t);
+
+// sync collectives
+int nvshmemx_team_sync_on_stream(nvshmem_team_t team, cudaStream_t stream);
+void nvshmemx_sync_all_on_stream(cudaStream_t);
+
+// broadcast collectives
+#define DECL_NVSHMEMX_TYPENAME_BROADCAST_ON_STREAM(TYPENAME, TYPE)                            \
+    int nvshmemx_##TYPENAME##_broadcast_on_stream(nvshmem_team_t team, TYPE *dest,            \
+                                                  const TYPE *src, size_t nelem, int PE_root, \
+                                                  cudaStream_t stream);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEMX_TYPENAME_BROADCAST_ON_STREAM)
+#undef DECL_NVSHMEMX_TYPENAME_BROADCAST_ON_STREAM
+
+int nvshmemx_broadcastmem_on_stream(nvshmem_team_t team, void *dest, const void *src, size_t nelem,
+                                    int PE_root, cudaStream_t stream);
+
+// fcollect collectives
+#define DECL_NVSHMEMX_TYPENAME_FCOLLECT_ON_STREAM(TYPENAME, TYPE)                                  \
+    int nvshmemx_##TYPENAME##_fcollect_on_stream(nvshmem_team_t team, TYPE *dest, const TYPE *src, \
+                                                 size_t nelem, cudaStream_t stream);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES(DECL_NVSHMEMX_TYPENAME_FCOLLECT_ON_STREAM)
+#undef DECL_NVSHMEMX_TYPENAME_FCOLLECT_ON_STREAM
+
+int nvshmemx_fcollectmem_on_stream(nvshmem_team_t team, void *dest, const void *src, size_t nelem,
+                                   cudaStream_t stream);
+
+// reduction collectives
+#define NVSHMEMI_DECL_REDUCE_ONSTREAM(NAME, TYPE, OP)                         \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmemx_##NAME##_##OP##_reduce_on_stream( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce, cudaStream_t stream);
+
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, and)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, or)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, xor)
+
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, max)
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, min)
+
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, sum)
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_REDUCE_ONSTREAM, prod)
+
+#undef NVSHMEMI_DECL_REDUCE_ONSTREAM
+
+#define NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM(NAME, TYPE, OP)                         \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmemx_##NAME##_##OP##_reducescatter_on_stream( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce, cudaStream_t stream);
+
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, and)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, or)
+NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, xor)
+
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, max)
+NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, min)
+
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, sum)
+NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES(NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM, prod)
+
+#undef NVSHMEMI_DECL_REDUCESCATTER_ONSTREAM
+
+//==========================================
+// nvshmem collective calls on threadgroup
+//==========================================
+
+// alltoall(s) collectives
+#define DECL_NVSHMEMX_TYPENAME_ALLTOALL_SCOPE(SCOPE, TYPENAME, TYPE)                       \
+    __device__ int nvshmemx_##TYPENAME##_alltoall_##SCOPE(nvshmem_team_t team, TYPE *dest, \
+                                                          const TYPE *src, size_t nelem);
+
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_ALLTOALL_SCOPE, warp)
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_ALLTOALL_SCOPE, block)
+#undef DECL_NVSHMEMX_TYPENAME_ALLTOALL_SCOPE
+
+__device__ int nvshmemx_alltoallmem_warp(nvshmem_team_t team, void *dest, const void *src,
+                                         size_t nelem);
+__device__ int nvshmemx_alltoallmem_block(nvshmem_team_t team, void *dest, const void *src,
+                                          size_t nelem);
+
+// barrier collectives
+__device__ int nvshmemx_barrier_warp(nvshmem_team_t team);
+__device__ void nvshmemx_barrier_all_warp();
+__device__ int nvshmemx_barrier_warpgroup(nvshmem_team_t team);
+__device__ int nvshmemx_barrier_block(nvshmem_team_t team);
+__device__ void nvshmemx_barrier_all_block();
+
+// sync collectives
+__device__ int nvshmemx_team_sync_warp(nvshmem_team_t team);
+__device__ void nvshmemx_sync_all_warp();
+__device__ int nvshmemx_team_sync_block(nvshmem_team_t team);
+__device__ void nvshmemx_sync_all_block();
+
+// broadcast collectives
+#define DECL_NVSHMEMX_TYPENAME_BROADCAST_SCOPE(SCOPE, TYPENAME, TYPE) \
+    __device__ int nvshmemx_##TYPENAME##_broadcast_##SCOPE(           \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nelem, int PE_root);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_BROADCAST_SCOPE, warp)
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_BROADCAST_SCOPE, block)
+#undef DECL_NVSHMEMX_TYPENAME_BROADCAST_SCOPE
+
+__device__ int nvshmemx_broadcastmem_warp(nvshmem_team_t team, void *dest, const void *src,
+                                          size_t nelem);
+__device__ int nvshmemx_broadcastmem_block(nvshmem_team_t team, void *dest, const void *src,
+                                           size_t nelem);
+
+// fcollect collectives
+#define DECL_NVSHMEMX_TYPENAME_FCOLLECT_SCOPE(SCOPE, TYPENAME, TYPE)                       \
+    __device__ int nvshmemx_##TYPENAME##_fcollect_##SCOPE(nvshmem_team_t team, TYPE *dest, \
+                                                          const TYPE *src, size_t nelem);
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_FCOLLECT_SCOPE, warp)
+NVSHMEMI_REPT_FOR_STANDARD_RMA_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_FCOLLECT_SCOPE, block)
+#undef DECL_NVSHMEMX_TYPENAME_FCOLLECT_SCOPE
+
+__device__ int nvshmemx_fcollectmem_warp(nvshmem_team_t team, void *dest, const void *src,
+                                         size_t nelem);
+__device__ int nvshmemx_fcollectmem_block(nvshmem_team_t team, void *dest, const void *src,
+                                          size_t nelem);
+
+// reduction collectives
+#define DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP(SCOPE, TYPENAME, TYPE, OP) \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmemx_##TYPENAME##_##OP##_reduce_##SCOPE( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce);
+
+#define DECL_NVSHMEMX_TYPENAME_OP_REDUCE(SC)                                                      \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                                            \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, SC, and)                                    \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                                            \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, SC, or)                                     \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                                            \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, SC, xor)                                    \
+                                                                                                  \
+    NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES_WITH_SCOPE(                                           \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, SC, max)                                    \
+    NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES_WITH_SCOPE(                                           \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, SC, min)                                    \
+                                                                                                  \
+    NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, \
+                                                    SC, sum)                                      \
+    NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES_WITH_SCOPE(DECL_NVSHMEMX_TYPENAME_OP_REDUCE_THREADGROUP, \
+                                                    SC, prod)
+
+DECL_NVSHMEMX_TYPENAME_OP_REDUCE(warp);
+DECL_NVSHMEMX_TYPENAME_OP_REDUCE(block);
+
+NVSHMEMI_HOSTDEVICE_PREFIX int nvshmemx_double2_maxloc_reduce_block(nvshmem_team_t team,
+                                                                    double2 *dest,
+                                                                    const double2 *src,
+                                                                    size_t nreduce);
+
+#define DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP(SCOPE, TYPENAME, TYPE, OP) \
+    NVSHMEMI_HOSTDEVICE_PREFIX int nvshmemx_##TYPENAME##_##OP##_reducescatter_##SCOPE( \
+        nvshmem_team_t team, TYPE *dest, const TYPE *src, size_t nreduce);
+
+#define DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER(SC)                   \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, and) \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, or)  \
+    NVSHMEMI_REPT_FOR_BITWISE_REDUCE_TYPES_WITH_SCOPE(                \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, xor) \
+                                                                      \
+    NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES_WITH_SCOPE(               \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, max) \
+    NVSHMEMI_REPT_FOR_STANDARD_REDUCE_TYPES_WITH_SCOPE(               \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, min) \
+                                                                      \
+    NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES_WITH_SCOPE(                  \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, sum) \
+    NVSHMEMI_REPT_FOR_ARITH_REDUCE_TYPES_WITH_SCOPE(                  \
+        DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER_THREADGROUP, SC, prod)
+
+DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER(warp);
+DECL_NVSHMEMX_TYPENAME_OP_REDUCESCATTER(block);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* NVSHMEMX_COLL_H */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/alltoall.cuh

@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef ALLTOALL_DEVICE_CUH
+#define ALLTOALL_DEVICE_CUH
+#include <cuda_runtime.h>
+#include "non_abi/device/wait/nvshmemi_wait_until_apis.cuh"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "barrier.cuh"
+
+#ifdef __CUDA_ARCH__
+
+#define NVSHMEMI_ALLTOALL_SMALL_MSGSIZE 16
+#define NVSHMEMI_ALLTOALL_MEDIUM_MSGSIZE 16384
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_alltoall_allpush_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int PE_size = teami->size;
+    int next_rank, src_offset, dst_offset;
+    const int mype = nvshmemi_device_state_d.mype;
+    int my_idx_in_active_set = teami->my_pe;
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    uint64_t *psync = (uint64_t *)nvshmemi_team_get_psync(teami, ALLTOALL);
+    uint64_t *pwrk = &teami->alltoall_pwrk[teami->alltoall_count % 2];
+    const size_t msgsize = nelems * sizeof(T);
+    const int first_unused_warp = (PE_size + (warpSize - 1)) / warpSize;
+    const int my_warp_idx = myIdx / warpSize;
+    const int num_warps = groupSize / warpSize;
+
+    dst_offset = nelems * my_idx_in_active_set;
+
+    /* Do remote ops and local ops < 16 bytes from a single thread */
+    /* TODO: Find a more optimal transfer point than 16 bytes */
+    for (int i = myIdx; i < PE_size; i += groupSize) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + i);
+        void *peer_base_addr = (void *)__ldg(
+            (const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + next_rank);
+        src_offset = nelems * ((i + my_idx_in_active_set) % PE_size);
+        if (!peer_base_addr) {
+            /* We are breaking rank with the rest of the group here so send the RMA with thread
+             * scope. */
+            nvshmemi_transfer_put_signal<NVSHMEMI_THREADGROUP_THREAD>(
+                (void *)(dest + dst_offset), (void *)(source + src_offset), msgsize,
+                (void *)(psync + mype), 1ULL, NVSHMEMI_AMO_SIGNAL_ADD, next_rank, true);
+        } else if (msgsize <= NVSHMEMI_ALLTOALL_SMALL_MSGSIZE) {
+            nvshmemi_put_nbi_threadgroup<T, NVSHMEMI_THREADGROUP_THREAD>(
+                dest + dst_offset, source + src_offset, nelems, next_rank);
+        }
+    }
+
+    if (SCOPE == NVSHMEMI_THREADGROUP_BLOCK && PE_size < groupSize &&
+        num_warps > first_unused_warp && msgsize > NVSHMEMI_ALLTOALL_SMALL_MSGSIZE &&
+        msgsize <= NVSHMEMI_ALLTOALL_MEDIUM_MSGSIZE) {
+        if (my_warp_idx >= first_unused_warp) {
+            for (int ii = my_warp_idx - first_unused_warp; ii < PE_size;
+                 ii += (num_warps - first_unused_warp)) {
+                next_rank =
+                    nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + ii);
+                src_offset = nelems * ((my_idx_in_active_set + ii) % PE_size);
+                void *peer_base_addr = (void *)__ldg(
+                    (const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p +
+                    next_rank);
+                if (peer_base_addr) {
+                    nvshmemi_put_nbi_threadgroup<T, NVSHMEMI_THREADGROUP_WARP>(
+                        dest + dst_offset, source + src_offset, nelems, next_rank);
+                }
+            }
+        }
+    } else if (msgsize > NVSHMEMI_ALLTOALL_SMALL_MSGSIZE) {
+        for (int ii = 0; ii < PE_size; ii++) {
+            next_rank =
+                nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + ii);
+            src_offset = nelems * ((my_idx_in_active_set + ii) % PE_size);
+            void *peer_base_addr = (void *)__ldg(
+                (const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + next_rank);
+            if (peer_base_addr) {
+                nvshmemi_put_nbi_threadgroup<T, SCOPE>(dest + dst_offset, source + src_offset,
+                                                       nelems, next_rank);
+            }
+        }
+    }
+
+    nvshmemi_threadgroup_sync<SCOPE>();
+    /* A fence and signal is required - note that we can skip any size check here because it's
+     * inherent in the boolean. */
+    if (myIdx == 0) {
+        atomicAdd((unsigned long long *)pwrk, 1ULL);
+        __threadfence_system();
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    for (int i = myIdx; i < PE_size; i += groupSize) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + i);
+        void *peer_base_addr = (void *)__ldg(
+            (const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + next_rank);
+        if (peer_base_addr) {
+            nvshmemi_signal_op((psync + mype), 1ULL, NVSHMEMI_AMO_SIGNAL_ADD, next_rank);
+        }
+    }
+
+    nvshmemi_threadgroup_sync<SCOPE>();
+    for (int i = myIdx; i < PE_size; i += groupSize) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + i);
+        nvshmemi_wait_until_greater_than_equals<uint64_t>((psync + next_rank), *pwrk,
+                                                          NVSHMEMI_CALL_SITE_SIGNAL_WAIT_UNTIL_GE);
+    }
+    if (SCOPE == NVSHMEMI_THREADGROUP_BLOCK && PE_size < groupSize) {
+        if (my_warp_idx == first_unused_warp)
+            nvshmemi_transfer_quiet<NVSHMEMI_THREADGROUP_WARP>(false);
+    } else
+        nvshmemi_transfer_quiet<SCOPE>(false);
+    nvshmemi_threadgroup_sync<SCOPE>();
+    if (myIdx == 0) teami->alltoall_count++;
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_alltoall_p2p_allpush_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int PE_size = teami->size;
+    int next_rank;
+    int src_offset;
+    int dst_offset;
+    int my_idx_in_active_set = teami->my_pe;
+    T *dst_ptr;
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+
+    for (int ii = 0; ii < PE_size; ii++) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, my_idx_in_active_set + ii);
+        src_offset = nelems * ((my_idx_in_active_set + ii) % PE_size);
+        dst_offset = nelems * teami->my_pe;
+        dst_ptr = (T *)nvshmemi_ptr((void *)(dest + dst_offset), next_rank);
+        nvshmemi_memcpy_threadgroup<SCOPE>(dst_ptr, source + src_offset, nelems * sizeof(T));
+    }
+
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_alltoall_threadgroup(nvshmem_team_t team,
+                                                                            T *dest,
+                                                                            const T *source,
+                                                                            size_t nelems) {
+    if (nvshmemi_device_state_d.job_connectivity <= NVSHMEMI_JOB_GPU_LDST_REMOTE_ATOMICS)
+        nvshmemi_alltoall_p2p_allpush_threadgroup<T, SCOPE>(team, dest, source, nelems);
+    else
+        nvshmemi_alltoall_allpush_threadgroup<T, SCOPE>(team, dest, source, nelems);
+}
+
+#endif /* __CUDA_ARCH__ */
+#endif /* ALLTOALL_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/barrier.cuh

@@ -0,0 +1,281 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+#ifndef BARRIER_DEVICE_CUH
+#define BARRIER_DEVICE_CUH
+#include <cuda_runtime.h>
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+#include "non_abi/nvshmem_build_options.h"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/wait/nvshmemi_wait_until_apis.cuh"
+#include "device_host/nvshmem_tensor.h"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "utils.cuh"
+
+#ifdef __CUDA_ARCH__
+
+template <int k, int logk, threadgroup_t SCOPE>
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE void sync_dissem_pow2_threadgroup(
+    nvshmem_team_t team) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int size = teami->size;
+    volatile long *pSync = (volatile long *)nvshmemi_team_get_psync(teami, SYNC);
+    volatile long *sync_counter = (volatile long *)nvshmemi_team_get_sync_counter(teami);
+    volatile long *sync_arr = NULL;
+    int shift;
+    int to_nbr_idx, to_nbr;
+    int from_nbr_idx, from_nbr;
+    int temp = size - 1; /* used to calculate number of phases */
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    sync_arr = (volatile long *)pSync;
+    int pow_k = 1;
+    int phase_num = 0;
+    volatile long *counter = sync_counter;
+    while (temp) {
+        /* notify neighbors */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j << phase_num;
+            if (shift >= size) break;
+
+            to_nbr_idx = teami->my_pe + shift;
+            to_nbr = nvshmemi_team_translate_pe_to_team_world_wrap(teami, to_nbr_idx);
+            nvshmemi_signal_for_barrier<long>(((long *)sync_arr + nvshmemi_device_state_d.mype),
+                                              counter[0], to_nbr);
+        }
+
+        /* wait for neighbors notification */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j << phase_num;
+            if (shift >= size) break;
+
+            from_nbr_idx = teami->my_pe - shift;
+            if (from_nbr_idx < 0) from_nbr_idx = size + from_nbr_idx;
+            from_nbr = nvshmemi_team_translate_pe_to_team_world_wrap(teami, from_nbr_idx);
+            nvshmemi_wait_until_greater_than_equals<volatile long>(sync_arr + from_nbr, counter[0],
+                                                                   NVSHMEMI_CALL_SITE_BARRIER_WARP);
+        }
+        pow_k <<= logk;
+        temp >>= logk;
+        phase_num++;
+        nvshmemi_threadgroup_sync<SCOPE>();
+    }
+    if (!myIdx) sync_counter[0] += 1;
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE void sync_dissem_threadgroup_non_strided(
+    nvshmem_team_t team) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+
+    volatile long *pSync = (volatile long *)nvshmemi_team_get_psync(teami, SYNC);
+    volatile long *sync_counter = (volatile long *)nvshmemi_team_get_sync_counter(teami);
+    int num_phases = 0;
+
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    int my_idx_in_active_set = teami->my_pe;
+    int shift, to_nbr_idx, to_nbr, from_nbr_idx, from_nbr;
+    int size = teami->size;
+    int temp = size - 1; /* used to calculate number of phases */
+    /* radix for the dissemination algorithm */
+    int k = min(nvshmemi_device_state_d.gpu_coll_env_params_var.barrier_tg_dissem_kval, size);
+    int pow_k = 1;
+    while (temp) {
+        num_phases++;
+        temp /= k;
+    }
+
+    volatile long *counter = sync_counter;
+    for (int i = 0; i < num_phases; i++) {
+        /* notify neighbors */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j * pow_k;
+            if (shift >= size) break;
+            to_nbr_idx = (my_idx_in_active_set + shift) % size;
+            to_nbr = teami->pe_mapping[to_nbr_idx];
+            nvshmemi_signal_for_barrier<long>(((long *)pSync + nvshmemi_device_state_d.mype),
+                                              counter[0], to_nbr);
+        }
+
+        /* wait for neighbors notification */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j * pow_k;
+            if (shift >= size) break;
+
+            from_nbr_idx = my_idx_in_active_set - shift;
+            if (from_nbr_idx < 0) from_nbr_idx = size + from_nbr_idx;
+            from_nbr = teami->pe_mapping[from_nbr_idx];
+            nvshmemi_wait_until_greater_than_equals<volatile long>(pSync + from_nbr, counter[0],
+                                                                   NVSHMEMI_CALL_SITE_BARRIER_WARP);
+        }
+        pow_k *= k;
+        nvshmemi_threadgroup_sync<SCOPE>();
+    }
+    if (!myIdx) sync_counter[0] += 1;
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE void sync_dissem_threadgroup_2(
+    int start, int stride, int size, volatile long *pSync, volatile long *sync_counter) {
+    int num_phases = 0;
+    int k =
+        min(nvshmemi_device_state_d.gpu_coll_env_params_var.barrier_tg_dissem_kval, size); /* radix
+                                                for the dissemination algorithm */
+    int my_idx_in_active_set = (nvshmemi_device_state_d.mype - start) / stride;
+    volatile long *sync_arr = NULL;
+    int shift;
+    int to_nbr_idx, to_nbr;
+    int from_nbr_idx, from_nbr;
+    int temp = size - 1; /* used to calculate number of phases */
+    while (temp) {
+        num_phases++;
+        temp /= k;
+    }
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    sync_arr = (volatile long *)pSync;
+    int pow_k = 1;
+    volatile long *counter = sync_counter;
+    for (int i = 0; i < num_phases; i++) {
+        /* notify neighbors */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j * pow_k;
+            if (shift >= size) break;
+            to_nbr_idx = (my_idx_in_active_set + shift) % size;
+            to_nbr = start + to_nbr_idx * stride;
+            nvshmemi_signal_for_barrier<long>(((long *)sync_arr + nvshmemi_device_state_d.mype),
+                                              counter[0], to_nbr);
+        }
+
+        /* wait for neighbors notification */
+        for (int j = myIdx + 1; j <= k - 1; j += groupSize) {
+            shift = j * pow_k;
+            if (shift >= size) break;
+
+            from_nbr_idx = my_idx_in_active_set - shift;
+            if (from_nbr_idx < 0) from_nbr_idx = size + from_nbr_idx;
+            from_nbr = start + from_nbr_idx * stride;
+            nvshmemi_wait_until_greater_than_equals<volatile long>(sync_arr + from_nbr, counter[0],
+                                                                   NVSHMEMI_CALL_SITE_BARRIER_WARP);
+        }
+        pow_k *= k;
+        nvshmemi_threadgroup_sync<SCOPE>();
+    }
+    if (!myIdx) sync_counter[0] += 1;
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE void sync_dissem_threadgroup(
+    nvshmem_team_t team) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int start = teami->start;
+    int stride = teami->stride;
+    int size = teami->size;
+    volatile long *pSync = (volatile long *)nvshmemi_team_get_psync(teami, SYNC);
+    volatile long *sync_counter = (volatile long *)nvshmemi_team_get_sync_counter(teami);
+
+    if (stride > 0) {
+        sync_dissem_threadgroup_2<SCOPE>(start, stride, size, pSync, sync_counter);
+    } else {
+        sync_dissem_threadgroup_non_strided<SCOPE>(team);
+    }
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_sync_algo_threadgroup(
+    nvshmem_team_t team) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int size = teami->size;
+    int k = min(nvshmemi_device_state_d.gpu_coll_env_params_var.barrier_tg_dissem_kval, size);
+    k = max(k, 2);
+    /* only p2p connected team for BLOCK scoped collectives should use larger radix of dissem
+     * algorithm */
+    if (teami->are_gpus_p2p_connected && SCOPE == NVSHMEMI_THREADGROUP_BLOCK) k = teami->size;
+    switch (k) {
+        case 2:
+            sync_dissem_pow2_threadgroup<2, 1, SCOPE>(team);
+            break;
+        case 4:
+            sync_dissem_pow2_threadgroup<4, 2, SCOPE>(team);
+            break;
+        case 8:
+            sync_dissem_pow2_threadgroup<8, 3, SCOPE>(team);
+            break;
+        case 16:
+            sync_dissem_pow2_threadgroup<16, 4, SCOPE>(team);
+            break;
+        case 32:
+            sync_dissem_pow2_threadgroup<32, 5, SCOPE>(team);
+            break;
+        default:
+            sync_dissem_threadgroup<SCOPE>(team);
+            break;
+    }
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_sync_threadgroup(nvshmem_team_t team) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    nvshmemi_sync_algo_threadgroup<SCOPE>(team);
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_barrier_threadgroup(nvshmem_team_t team) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    nvshmemi_threadgroup_sync<SCOPE>();
+    if ((nvshmemi_device_state_d.job_connectivity > NVSHMEMI_JOB_GPU_LDST)) {
+        nvshmemi_transfer_quiet<SCOPE>(true);
+    } else if (!myIdx) {
+        __threadfence_system();
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+
+    nvshmemi_sync_algo_threadgroup<SCOPE>(team);
+
+    if (!myIdx) {
+        if (nvshmemi_device_state_d.job_connectivity > NVSHMEMI_JOB_GPU_PROXY)
+            nvshmemi_transfer_enforce_consistency_at_target(false);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+/******** tile APIs **************/
+template <nvshmemx::tile_coll_algo_t algo, threadgroup_t scope>
+__device__ inline int nvshmemi_tile_collective_wait(nvshmem_team_t team, uint64_t flag) {
+    static_assert((algo == nvshmemx::tile_coll_algo_t::NVLS_ONE_SHOT_PULL_NBI) ||
+                      (algo == nvshmemx::tile_coll_algo_t::NVLS_ONE_SHOT_PUSH_NBI) ||
+                      (algo == nvshmemx::tile_coll_algo_t::NVLS_TWO_SHOT_PUSH_NBI),
+                  "Unsupported tile algorithm");
+
+    assert(!flag && "Currently non-zero flag value is unsupported");
+
+    if constexpr ((algo == nvshmemx::tile_coll_algo_t::NVLS_TWO_SHOT_PUSH_NBI) ||
+                  (algo == nvshmemx::tile_coll_algo_t::NVLS_ONE_SHOT_PUSH_NBI)) {
+        nvshmemi_threadgroup_sync<scope>();
+        if (!nvshmemi_thread_id_in_threadgroup<scope>()) {
+            __threadfence_system();
+        }
+        nvshmemi_sync_algo_threadgroup<scope>(team);
+        return 0;
+    } else {
+        // PULL variants store only to local HBM mem
+        __threadfence();  // ensure stores are visible in local GPU mem
+        nvshmemi_threadgroup_sync<scope>();
+        return 0;
+    }
+}
+
+#endif /* __CUDA_ARCH__ */
+
+#endif /* BARRIER_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/broadcast.cuh

@@ -0,0 +1,412 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef BROADCAST_DEVICE_CUH
+#define BROADCAST_DEVICE_CUH
+
+#include <cuda_runtime.h>
+#include "device_host_transport/nvshmem_common_transport.h"  // for NVSHMEMI_OP_PUT
+#include "non_abi/nvshmem_build_options.h"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/wait/nvshmemi_wait_until_apis.cuh"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+
+#ifdef __CUDA_ARCH__
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_intranode_tree_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root, int k) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    if (!myIdx) { /* Only one thread should increment */
+        teami->ll_flag++;
+        teami->bcast_count++;
+        if (teami->bcast_sync_offset + nelems * sizeof(T) * 2 >
+            sizeof(long) * NVSHMEMI_BCAST_SYNC_SIZE) {
+            nvshmemi_barrier_threadgroup<NVSHMEMI_THREADGROUP_THREAD>(team);
+            teami->bcast_sync_offset = 0;
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    const uint32_t ll_flag = teami->ll_flag;
+    char *pWrk = (char *)nvshmemi_team_get_psync(teami, BCAST);
+    size_t recv_offset = teami->bcast_sync_offset;
+    const int my_pe_in_team = nvshmemi_team_my_pe(team);
+
+    if (PE_root != my_pe_in_team) {
+        nvshmemi_recvLL<T, SCOPE>(dest, (uint64_t *)(pWrk + recv_offset), nelems, ll_flag);
+    } else {
+        nvshmemi_packLL_naive<T, SCOPE>((uint64_t *)(pWrk + recv_offset), source, nelems, ll_flag);
+    }
+
+    /*if (SCOPE == NVSHMEMI_THREADGROUP_BLOCK) {
+        nvshmemi_threadgroup_sync<SCOPE>(); // wait for block scoped recvLL/packLL to complete
+        int warp_id = myIdx / 32;
+        int num_warps = (groupSize + 31) / 32;
+        size_t size_per_peer = nelems * sizeof(T) * 2;
+        int num_peers = k;
+        size_t total_size = size_per_peer * num_peers;
+        int size_per_warp = min (nelems * sizeof(T) * 2, 512l);
+        for (size_t start = warp_id * size_per_warp; start < total_size; start += num_warps *
+    size_per_warp) { int peer_id = start / size_per_peer; size_t offset = start % size_per_peer; int
+    child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + peer_id + 1; if
+    (child_in_team >= teami->size) break; child_in_team = (child_in_team + PE_root) % teami->size;
+            int child =
+                nvshmemi_team_translate_pe(teami, child_in_team,
+    nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_WORLD_INDEX]);
+            //printf("sending data %d to %d at offset %llu, peer_id: %d, size_per_peer: %llu,
+    nelems: %llu\n", size_per_warp, child, offset, peer_id, size_per_peer, nelems);
+            //printf("myIdx: %d, start: %lld, num_warps: %d\n", myIdx, start, num_warps);
+            nvshmemi_put_nbi_threadgroup<char, NVSHMEMI_THREADGROUP_WARP>(pWrk + recv_offset +
+    offset, pWrk + recv_offset + offset, size_per_warp, child);
+        }
+    } else  */
+    {
+        nvshmemi_threadgroup_sync<SCOPE>();
+        for (int i = 0; i < k; i++) {
+            int child_in_team =
+                ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+            if (child_in_team >= teami->size) break;
+            child_in_team = (child_in_team + PE_root) % teami->size;
+            int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+
+            nvshmemii_put_nbi_threadgroup<uint64_t, SCOPE>(
+                (uint64_t *)(pWrk + recv_offset), (uint64_t *)(pWrk + recv_offset),
+                nelems * sizeof(T) / sizeof(uint32_t), child);
+        }
+    }
+    if (PE_root == my_pe_in_team && dest != source)
+        nvshmemi_memcpy_threadgroup<SCOPE>(dest, source, nelems * sizeof(T));
+    if (!myIdx) { /* Only one thread should increment */
+        teami->bcast_sync_offset += sizeof(T) * nelems * 2;
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_internode_tree_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root, int k) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    if (!myIdx) { /* Only one thread should increment */
+        teami->ll_flag++;
+        teami->bcast_count++;
+        if ((teami->bcast_sync_offset + nelems * sizeof(T) * 2) >
+            (sizeof(long) * NVSHMEMI_BCAST_SYNC_SIZE)) {
+            nvshmemi_barrier_threadgroup<NVSHMEMI_THREADGROUP_THREAD>(team);
+            teami->bcast_sync_offset = 0;
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    const uint32_t ll_flag = teami->ll_flag;
+    char *pWrk = (char *)nvshmemi_team_get_psync(teami, BCAST);
+    size_t recv_offset = teami->bcast_sync_offset;
+    const int my_pe_in_team = nvshmemi_team_my_pe(team);
+
+    if (PE_root != my_pe_in_team) {
+        nvshmemi_recvLL<T, SCOPE>(dest, (uint64_t *)(pWrk + recv_offset), nelems, ll_flag);
+    } else {
+        nvshmemi_packLL_naive<T, SCOPE>((uint64_t *)(pWrk + recv_offset), source, nelems, ll_flag);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    for (int i = myIdx; i < k; i += groupSize) {
+        int child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+        if (child_in_team >= teami->size) break;
+        child_in_team = (child_in_team + PE_root) % teami->size;
+        int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+
+        nvshmemi_put_nbi_threadgroup<uint64_t, NVSHMEMI_THREADGROUP_THREAD>(
+            (uint64_t *)(pWrk + recv_offset), (uint64_t *)(pWrk + recv_offset),
+            nelems * sizeof(T) / sizeof(uint32_t), child);
+    }
+    if (PE_root == my_pe_in_team && dest != source)
+        nvshmemi_memcpy_threadgroup<SCOPE>(dest, source, nelems * sizeof(T));
+    if (!myIdx) { /* Only one thread should increment */
+        teami->bcast_sync_offset += sizeof(T) * nelems * 2;
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_tree_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root, int k) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    if (!myIdx) { /* Only one thread should increment */
+        teami->ll_flag++;
+        teami->bcast_count++;
+        if ((teami->bcast_sync_offset + nelems * sizeof(T) * 2) >
+            (sizeof(long) * NVSHMEMI_BCAST_SYNC_SIZE)) {
+            nvshmemi_barrier_threadgroup<NVSHMEMI_THREADGROUP_THREAD>(team);
+            teami->bcast_sync_offset = 0;
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    const uint32_t ll_flag = teami->ll_flag;
+    char *pWrk = (char *)nvshmemi_team_get_psync(teami, BCAST);
+    size_t recv_offset = teami->bcast_sync_offset;
+    const int my_pe_in_team = nvshmemi_team_my_pe(team);
+
+    if (PE_root != my_pe_in_team) {
+        nvshmemi_recvLL<T, SCOPE>(dest, (uint64_t *)(pWrk + recv_offset), nelems, ll_flag);
+    } else {
+        nvshmemi_packLL_naive<T, SCOPE>((uint64_t *)(pWrk + recv_offset), source, nelems, ll_flag);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    /* Do remote transfers first */
+    for (int i = myIdx; i < k; i += groupSize) {
+        int child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+        if (child_in_team >= teami->size) break;
+        child_in_team = (child_in_team + PE_root) % teami->size;
+        int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+        bool is_remote = (nvshmemi_ptr(pWrk, child) == NULL) ? true : false;
+        if (is_remote)
+            nvshmemi_put_nbi_threadgroup<uint64_t, NVSHMEMI_THREADGROUP_THREAD>(
+                (uint64_t *)(pWrk + recv_offset), (uint64_t *)(pWrk + recv_offset),
+                nelems * sizeof(T) / sizeof(uint32_t), child);
+    }
+
+    /* Do P2P transfers */
+    for (int i = 0; i < k; i++) {
+        int child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+        if (child_in_team >= teami->size) break;
+        child_in_team = (child_in_team + PE_root) % teami->size;
+        int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+
+        bool is_remote = (nvshmemi_ptr(pWrk, child) == NULL) ? true : false;
+        if (!is_remote)
+            nvshmemii_put_nbi_threadgroup<uint64_t, SCOPE>(
+                (uint64_t *)(pWrk + recv_offset), (uint64_t *)(pWrk + recv_offset),
+                nelems * sizeof(T) / sizeof(uint32_t), child);
+    }
+
+    if (PE_root == my_pe_in_team && dest != source)
+        nvshmemi_memcpy_threadgroup<SCOPE>(dest, source, nelems * sizeof(T));
+    if (!myIdx) { /* Only one thread should increment */
+        teami->bcast_sync_offset += sizeof(T) * nelems * 2;
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_nonLL_tree_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root, int k) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    if (!myIdx) { /* Only one thread should increment */
+        teami->ll_flag++;
+        teami->bcast_count++;
+        if ((teami->bcast_sync_offset + sizeof(uint64_t)) >
+            (sizeof(long) * NVSHMEMI_BCAST_SYNC_SIZE)) {
+            nvshmemi_barrier_threadgroup<NVSHMEMI_THREADGROUP_THREAD>(team);
+            teami->bcast_sync_offset = 0;
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    const uint32_t ll_flag = teami->ll_flag;
+    char *pWrk = (char *)nvshmemi_team_get_psync(teami, BCAST);
+    size_t recv_offset = teami->bcast_sync_offset;
+    const int my_pe_in_team = nvshmemi_team_my_pe(team);
+
+    if (PE_root != my_pe_in_team) {
+        nvshmemi_wait_until<uint64_t>((uint64_t *)(pWrk + recv_offset), NVSHMEM_CMP_EQ, ll_flag);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+    /* Do remote transfers first */
+    for (int i = myIdx; i < k; i += groupSize) {
+        int child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+        if (child_in_team >= teami->size) break;
+        child_in_team = (child_in_team + PE_root) % teami->size;
+        int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+        bool is_remote = (nvshmemi_ptr(pWrk, child) == NULL) ? true : false;
+        if (is_remote)
+            nvshmemi_put_signal_threadgroup<T, NVSHMEMI_THREADGROUP_THREAD>(
+                dest, (PE_root == my_pe_in_team) ? source : dest, nelems,
+                (uint64_t *)(pWrk + recv_offset), ll_flag, NVSHMEMI_AMO_SIGNAL_SET, child, 1);
+    }
+
+    /* Do P2P transfers */
+    for (int i = 0; i < k; i++) {
+        int child_in_team = ((my_pe_in_team + (teami->size - PE_root)) % teami->size) * k + i + 1;
+        if (child_in_team >= teami->size) break;
+        child_in_team = (child_in_team + PE_root) % teami->size;
+        int child = nvshmemi_team_translate_pe(team, child_in_team, NVSHMEM_TEAM_WORLD_INDEX);
+
+        bool is_remote = (nvshmemi_ptr(pWrk, child) == NULL) ? true : false;
+        if (!is_remote)
+            nvshmemii_put_signal_threadgroup<T, SCOPE>(
+                dest, (PE_root == my_pe_in_team) ? source : dest, nelems,
+                (uint64_t *)(pWrk + recv_offset), ll_flag, NVSHMEMI_AMO_SIGNAL_SET, child, 1);
+    }
+
+    if (PE_root == my_pe_in_team && dest != source)
+        nvshmemi_memcpy_threadgroup<SCOPE>(dest, source, nelems * sizeof(T));
+    if (!myIdx) { /* Only one thread should increment */
+        nvshmemi_quiet<NVSHMEMI_THREADGROUP_THREAD>();
+        teami->bcast_sync_offset +=
+            2 * sizeof(uint64_t); /* incrementing minimally by 16 bytes because this buffer is used
+                                     by packLL and packLL does 16byte writes */
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_put2all_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int i;
+    int root = nvshmemi_team_translate_pe(team, PE_root, NVSHMEM_TEAM_WORLD_INDEX);
+    if (root == nvshmemi_device_state_d.mype) {
+        for (i = 0; i < teami->size; i++) {
+            int pe = nvshmemi_team_translate_pe_to_team_world_wrap(teami, i);
+            nvshmemi_put_nbi_threadgroup<T, SCOPE>(dest, source, nelems, pe);
+        }
+    }
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_put2all_direct_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int i;
+    int root = nvshmemi_team_translate_pe(team, PE_root, NVSHMEM_TEAM_WORLD_INDEX);
+    T *dst_ptr;
+    if (root == nvshmemi_device_state_d.mype) {
+        for (i = 0; i < teami->size; i++) {
+            int pe = nvshmemi_team_translate_pe_to_team_world_wrap(teami, i);
+            dst_ptr = (T *)nvshmemi_ptr(dest, pe);
+            nvshmemi_memcpy_threadgroup<SCOPE>(dst_ptr, source, nelems * sizeof(T));
+        }
+    }
+
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_bcast_hierarchical_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    if (teami->is_team_same_mype_node) {
+        nvshmemi_bcast_internode_tree_threadgroup<T, SCOPE>(
+            team, dest, source, nelems, PE_root,
+            nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_tree_kval);
+    } else if (teami->is_team_node) {
+        nvshmemi_bcast_intranode_tree_threadgroup<T, SCOPE>(
+            team, dest, source, nelems, PE_root,
+            nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_tree_kval);
+    } else {
+        int team_npes_node = nvshmemi_team_n_pes(teami->team_node);
+        int PE_root_idx_in_team_node = PE_root % team_npes_node;
+        int my_idx_in_team_node = nvshmemi_team_my_pe(team) % team_npes_node;
+        if (PE_root_idx_in_team_node == my_idx_in_team_node) {
+            nvshmemi_bcast_internode_tree_threadgroup<T, SCOPE>(
+                teami->team_same_mype_node, dest, source, nelems, PE_root / team_npes_node,
+                nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_tree_kval);
+        }
+        nvshmemi_bcast_intranode_tree_threadgroup<T, SCOPE>(
+            teami->team_node, dest, dest, nelems, PE_root_idx_in_team_node,
+            nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_tree_kval);
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_broadcast_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems, int PE_root) {
+    int bcast_algo = nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_algo;
+    switch (bcast_algo) {
+        case 0:
+            if (NVSHMEMI_BCAST_SYNC_SIZE * sizeof(long) >= (nelems * sizeof(T) * 2) &&
+                sizeof(T) >= sizeof(uint32_t) && nelems % 2 == 0 &&
+                nelems * sizeof(T) <= 16384) { /* LL algos */
+                if (nvshmemi_team_n_pes(team) > 32 &&
+                    nvshmemi_device_state_d.pe_dist ==
+                        NVSHMEMI_PE_DIST_BLOCK) { /* hierarchical topo-aware */
+                    bcast_algo = 2;
+                } else
+                    bcast_algo = 3;
+            } else /* non-LL algorithm */
+                bcast_algo = 4;
+            break;
+        case 1: /* Brutefoce algorithm: send one to all followed by barrier */
+            break;
+        case 2: /* Topology aware - two level hierarchical algorithm with LL approach */
+            if (NVSHMEMI_BCAST_SYNC_SIZE * sizeof(long) >= (nelems * sizeof(T) * 2) &&
+                sizeof(T) >= sizeof(uint32_t) && nelems % 2 == 0 &&
+                nvshmemi_device_state_d.pe_dist == NVSHMEMI_PE_DIST_BLOCK) {
+            } else {
+                /*printf("User selected algo: %d, but it is not supported with currect config, \
+                        using default algo selection strategy..\n", \
+                        nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_algo);*/
+                bcast_algo = 1;
+            }
+            break;
+        case 3: /* Topology unaware tree algrithm with LL approach*/
+            if (NVSHMEMI_BCAST_SYNC_SIZE * sizeof(long) >= (nelems * sizeof(T) * 2) &&
+                sizeof(T) >= sizeof(uint32_t) && nelems % 2 == 0) {
+            } else {
+                /*printf("User selected algo: %d, but it is not supported with currect config, \
+                        using default algo selection strategy..\n",
+                        nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_algo);*/
+                bcast_algo = 1;
+            }
+            break;
+        case 4: /* Topology unaware flat tree algrithm with LL approach*/
+            if (NVSHMEMI_BCAST_SYNC_SIZE * sizeof(long) >= (nelems * sizeof(T) * 2) &&
+                sizeof(T) >= sizeof(uint32_t) && nelems % 2 == 0) {
+            } else {
+                /* printf("User selected algo: %d, but it is not supported with currect config, \
+                        using default algo selection strategy..\n",
+                        nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_algo);*/
+                bcast_algo = 1;
+            }
+            break;
+        default:
+            printf("Specified bcast algo:%d not supported, aborting...\n", bcast_algo);
+            assert(0);
+            break;
+    }
+
+    switch (bcast_algo) {
+        case 1: /* Brutefoce algorithm: send one to all followed by barrier */
+            if (nvshmemi_device_state_d.job_connectivity <= NVSHMEMI_JOB_GPU_LDST_REMOTE_ATOMICS) {
+                nvshmemi_bcast_put2all_direct_threadgroup<T, SCOPE>(team, dest, source, nelems,
+                                                                    PE_root);
+            } else {
+                nvshmemi_bcast_put2all_threadgroup<T, SCOPE>(team, dest, source, nelems, PE_root);
+            }
+            break;
+        case 2: /* Topology aware - two level hierarchical algorithm with LL approach */
+            nvshmemi_bcast_hierarchical_threadgroup<T, SCOPE>(team, dest, source, nelems, PE_root);
+            break;
+        case 3: /* Topology unaware tree algrithm with LL approach*/
+            nvshmemi_bcast_tree_threadgroup<T, SCOPE>(
+                team, dest, source, nelems, PE_root,
+                nvshmemi_device_state_d.gpu_coll_env_params_var.bcast_tree_kval);
+            break;
+        case 4: /* Topology unaware flat tree algrithm with LL approach*/
+            nvshmemi_bcast_nonLL_tree_threadgroup<T, SCOPE>(team, dest, source, nelems, PE_root,
+                                                            nvshmemi_team_n_pes(team) - 1);
+            break;
+        default:
+            assert(0);
+            break;
+    }
+}
+
+#endif /* __CUDA_ARCH__ */
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/defines.cuh

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEMI_DEVICE_COLL_DEFINES_H_
+#define _NVSHMEMI_DEVICE_COLL_DEFINES_H_
+
+#include "alltoall.cuh"
+#include "barrier.cuh"
+#include "broadcast.cuh"
+#include "fcollect.cuh"
+#include "reduce.cuh"
+#include "reducescatter.cuh"
+#include "broadcast.cuh"
+#include "fcollect.cuh"
+
+#endif /* NVSHMEMI_DEVICE_COLL_DEFINES_H */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/fcollect.cuh

@@ -0,0 +1,1080 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+#ifndef FCOLLECT_DEVICE_CUH
+#define FCOLLECT_DEVICE_CUH
+
+#if !defined __CUDACC_RTC__
+#include <stdint.h>
+#include <limits.h>
+#else
+#include "cuda/std/cstdint"
+#include <cuda/std/climits>
+#endif
+
+#include <cuda_runtime.h>
+#include "device_host/nvshmem_common.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "non_abi/device/common/nvshmemi_tile_utils.cuh"
+#include "non_abi/nvshmem_build_options.h"
+#include "device_host/nvshmem_tensor.h"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+
+#define _FCOLLECT_LL8_PSYNC_SCALE_FACTOR 2
+
+#define _FCOLLECT_MAX(x, y) ((x) > (y) ? (x) : (y))
+#define _FCOLLECT_MIN(x, y) ((x) < (y) ? (x) : (y))
+
+typedef enum { LL8 = 0, LL128 } ll_version_t;
+
+#ifdef __CUDA_ARCH__
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE void nvshmemi_fcollect_nvls_ll_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems) {
+#if defined __clang_llvm_bitcode_lib__
+    if (__nvvm_reflect("__CUDA_ARCH") >= 900) {
+        nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+        const size_t fcollect_ll_threshold =
+            nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold;
+        const size_t fcollect_count = teami->fcollect_count;
+        const uint32_t ll_flag = teami->fcollect_count;
+        char *pWrk = (char *)nvshmemi_team_get_psync(teami, FCOLLECT) +
+                     (2 * teami->size * fcollect_ll_threshold *
+                      (fcollect_count % 2)); /* same for NVLS in terms of size */
+        const size_t pack_offset = (nvshmemi_team_my_pe(team) * nelems * sizeof(T)) /
+                                   sizeof(uint32_t); /* offset in pSync space */
+        /* Find the multicast ptr for pWrk + pack_offset and do a store to remote pSync */
+        void *mcast_pWrk = nvshmemi_mc_ptr(teami, (void *)((uint64_t *)pWrk + pack_offset));
+        nvshmemi_mcast_packLL<T, SCOPE>((uint64_t *)mcast_pWrk, source, nelems, ll_flag);
+        for (int ii = 0; ii < teami->size; ii += 1) {
+            size_t prev_offset = (nelems * ii * sizeof(T)) / sizeof(uint32_t);
+            nvshmemi_mcast_recvLL<T, SCOPE>(dest + (ii * nelems), (uint64_t *)pWrk + prev_offset,
+                                            nelems, ll_flag);
+        }
+
+        nvshmemi_threadgroup_sync<SCOPE>();
+    } else {
+        assert(0 && "NVLink SHARP is not supported on this platform");
+    }
+#else
+#if __CUDA_ARCH__ >= 900 && CUDART_VERSION >= 12010
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    const size_t fcollect_ll_threshold =
+        nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold;
+    const size_t fcollect_count = teami->fcollect_count;
+    const uint32_t ll_flag = teami->fcollect_count;
+    char *pWrk = (char *)nvshmemi_team_get_psync(teami, FCOLLECT) +
+                 (2 * teami->size * fcollect_ll_threshold *
+                  (fcollect_count % 2)); /* same for NVLS in terms of size */
+    const size_t pack_offset = (nvshmemi_team_my_pe(team) * nelems * sizeof(T)) /
+                               sizeof(uint32_t); /* offset in pSync space */
+    /* Find the multicast ptr for pWrk + pack_offset and do a store to remote pSync */
+    void *mcast_pWrk = nvshmemi_mc_ptr(teami, (void *)((uint64_t *)pWrk + pack_offset));
+    nvshmemi_mcast_packLL<T, SCOPE>((uint64_t *)mcast_pWrk, source, nelems, ll_flag);
+    for (int ii = 0; ii < teami->size; ii += 1) {
+        size_t prev_offset = (nelems * ii * sizeof(T)) / sizeof(uint32_t);
+        nvshmemi_mcast_recvLL<T, SCOPE>(dest + (ii * nelems), (uint64_t *)pWrk + prev_offset,
+                                        nelems, ll_flag);
+    }
+
+    nvshmemi_threadgroup_sync<SCOPE>();
+#else
+    assert(0 && "NVLink SHARP is not supported on this platform");
+#endif
+#endif
+}
+
+/* This function must not ever call a block-scoped synchronization API.
+ * See call-site in nvshmemi_fcollect_threadgroup
+ */
+template <typename T, threadgroup_t SCOPE, ll_version_t LL_VERSION, bool NODE_SAFE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE void nvshmemi_fcollect_allpush_ll_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, size_t nelems) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    nvshmemi_team_t *teami_node = NULL;
+    const size_t fcollect_count = teami->fcollect_count;
+    const uint32_t ll_flag = teami->fcollect_count;
+    const int my_pe_in_team = teami->my_pe;
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    const int myWarpIdx = nvshmemi_thread_id_in_threadgroup<NVSHMEMI_THREADGROUP_WARP>();
+    size_t data_element_offset;
+    size_t psync_element_offset;
+    size_t psync_remote_write_elements;
+    T *peer_addr;
+
+    T *pWrk;
+    size_t pack_offset;
+    size_t max_data_elems_per_warp;
+    size_t max_psync_elems_per_warp;
+    int next_pe, start_pe;
+    int num_pes_per_group, remaining_pes;
+    int num_warp_groups, num_warps_per_group;
+    int warp_id, warp_count, warp_group_id;
+
+    if (NODE_SAFE) {
+        /*
+         * Really we mean team shared here, but that is not a team that exists today.
+         * TODO: Replace team_node with team_shared.
+         */
+        if (teami->are_gpus_p2p_connected) {
+            teami_node = teami;
+        } else if (teami->team_node != NVSHMEM_TEAM_INVALID &&
+                   nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_SHARED]->is_team_node) {
+            teami_node = nvshmemi_device_state_d.team_pool[teami->team_node];
+        }
+    }
+
+    warp_count = nvshmemi_threadgroup_size<SCOPE>() / 32;
+    warp_id = myIdx / 32;
+
+    if (LL_VERSION == LL8) {
+        const size_t fcollect_ll_threshold =
+            nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold / sizeof(T);
+        pWrk = (T *)nvshmemi_team_get_psync(teami, FCOLLECT) +
+               (_FCOLLECT_LL8_PSYNC_SCALE_FACTOR * teami->size * fcollect_ll_threshold *
+                (fcollect_count % 2));
+        /* round up to 16 bytes*/
+        psync_remote_write_elements =
+            NVSHMEMI_TEAM_ROUND_UP((nelems * _FCOLLECT_LL8_PSYNC_SCALE_FACTOR), 16 / sizeof(T));
+        pack_offset = my_pe_in_team * psync_remote_write_elements;
+        if (!NODE_SAFE || !teami->is_team_node) {
+            nvshmemi_packLL<T, SCOPE, 1>((T *)(pWrk + pack_offset), source, nelems, ll_flag, teami,
+                                         1, my_pe_in_team);
+        }
+    } else {
+        const size_t fcollect_ll_threshold =
+            nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll128_threshold / sizeof(T);
+        pWrk = (T *)nvshmemi_team_get_psync(teami, FCOLLECT_128) +
+               (teami->size * NVSHMEMI_FCOLLECT_LL128_CALC_PSYNC_SIZE(fcollect_ll_threshold, T) *
+                (fcollect_count % 2));
+        psync_remote_write_elements = NVSHMEMI_FCOLLECT_LL128_CALC_PSYNC_SIZE(nelems, T);
+        pack_offset = my_pe_in_team * psync_remote_write_elements;
+        if (!NODE_SAFE || !teami->is_team_node) {
+            nvshmemi_packLL128<T, SCOPE, 1>(pWrk + pack_offset, source, nelems, ll_flag, teami, 1,
+                                            my_pe_in_team, 0);
+        }
+    }
+
+    /* send out non blocking puts for all remote PEs */
+    if (teami_node != teami) {
+        for (uint32_t ii = myIdx + 1 + my_pe_in_team; ii < teami->size + my_pe_in_team;
+             ii += groupSize) {
+            next_pe = nvshmemi_team_translate_pe_to_team_world_wrap(teami, ii);
+            if (NODE_SAFE) {
+                if (nvshmemi_ptr(pWrk, next_pe) == NULL) {
+                    nvshmemi_put_nbi_threadgroup<T, NVSHMEMI_THREADGROUP_THREAD>(
+                        pWrk + pack_offset, pWrk + pack_offset, psync_remote_write_elements,
+                        next_pe);
+                }
+            } else {
+                nvshmemi_put_nbi_threadgroup<T, NVSHMEMI_THREADGROUP_THREAD>(
+                    pWrk + pack_offset, pWrk + pack_offset, psync_remote_write_elements, next_pe);
+            }
+        }
+        nvshmemi_threadgroup_sync<NVSHMEMI_THREADGROUP_WARP>();
+    }
+
+    if (LL_VERSION == LL8) {
+        max_data_elems_per_warp = _LL_8_DATA_BYTES_PER_WARP * _LL_MAX_UNROLL / sizeof(T);
+        max_psync_elems_per_warp = _LL_8_PSYNC_BYTES_PER_WARP * _LL_MAX_UNROLL / sizeof(T);
+        if (nelems < max_data_elems_per_warp) {
+            if (teami_node) {
+                for (uint32_t ii = warp_id + my_pe_in_team; ii < teami_node->size + my_pe_in_team;
+                     ii += warp_count) {
+                    next_pe = nvshmemi_team_translate_pe_to_team_world_wrap(teami_node, ii);
+                    peer_addr = (T *)nvshmemi_ptr(pWrk, next_pe) + pack_offset;
+                    nvshmemi_packLL_naive<T, NVSHMEMI_THREADGROUP_WARP>((uint64_t *)peer_addr,
+                                                                        source, nelems, ll_flag);
+                }
+            }
+
+            for (uint32_t ii = warp_id; ii < teami->size; ii += warp_count) {
+                next_pe = ii;
+                pack_offset =
+                    next_pe * NVSHMEMI_TEAM_ROUND_UP((nelems * _FCOLLECT_LL8_PSYNC_SCALE_FACTOR),
+                                                     16 / sizeof(T));
+                nvshmemi_recvLL<T, NVSHMEMI_THREADGROUP_WARP>(
+                    dest + (next_pe * nelems), (uint64_t *)(pWrk + pack_offset), nelems, ll_flag);
+            }
+            return;
+        }
+    } else {
+        max_data_elems_per_warp = _LL_128_DATA_BYTES_PER_WARP * _LL_MAX_UNROLL / sizeof(T);
+        max_psync_elems_per_warp = _LL_128_PSYNC_BYTES_PER_WARP * _LL_MAX_UNROLL / sizeof(T);
+    }
+
+    num_warp_groups =
+        _FCOLLECT_MAX(1, warp_count / _FCOLLECT_MAX(1, nelems / max_data_elems_per_warp));
+    num_warps_per_group = warp_count / num_warp_groups;
+    warp_group_id = warp_id / num_warps_per_group;
+
+    if (teami_node != NULL) {
+        /* first n ggroups take on an extra PE in the case of remainder */
+        num_pes_per_group = teami_node->size / num_warp_groups;
+        remaining_pes = teami_node->size % num_warp_groups;
+        num_pes_per_group += warp_group_id < remaining_pes ? 1 : 0;
+
+        start_pe = num_pes_per_group * warp_group_id;
+        start_pe += warp_group_id >= remaining_pes ? remaining_pes : 0;
+
+        data_element_offset = warp_id % num_warps_per_group * max_data_elems_per_warp;
+        psync_element_offset = warp_id % num_warps_per_group * max_psync_elems_per_warp;
+        /* All warps except final one per-pe should be full. */
+        for (; data_element_offset + max_data_elems_per_warp < nelems;
+             data_element_offset += num_warps_per_group * max_data_elems_per_warp,
+             psync_element_offset += num_warps_per_group * max_psync_elems_per_warp) {
+            if (LL_VERSION == LL8) {
+                nvshmemi_packLL<T, NVSHMEMI_THREADGROUP_WARP, _LL_MAX_UNROLL>(
+                    pWrk + pack_offset + psync_element_offset, source + data_element_offset,
+                    max_data_elems_per_warp, ll_flag, teami_node, num_pes_per_group, start_pe);
+            } else {
+                nvshmemi_packLL128<T, NVSHMEMI_THREADGROUP_WARP, _LL_MAX_UNROLL>(
+                    pWrk + pack_offset + psync_element_offset, source + data_element_offset,
+                    max_data_elems_per_warp, ll_flag, teami_node, num_pes_per_group, start_pe,
+                    warp_id % num_warps_per_group);
+            }
+        }
+
+        if (nelems > data_element_offset) {
+            if (LL_VERSION == LL8) {
+                nvshmemi_packLL<T, NVSHMEMI_THREADGROUP_WARP, 1>(
+                    pWrk + pack_offset + psync_element_offset, source + data_element_offset,
+                    nelems - data_element_offset, ll_flag, teami_node, num_pes_per_group, start_pe);
+            } else {
+                nvshmemi_packLL128<T, NVSHMEMI_THREADGROUP_WARP, 1>(
+                    pWrk + pack_offset + psync_element_offset, source + data_element_offset,
+                    nelems - data_element_offset, ll_flag, teami_node, num_pes_per_group, start_pe,
+                    warp_id % num_warps_per_group);
+                ;
+            }
+        }
+    }
+
+    /* todo: also try unrolling in recvLL */
+    num_pes_per_group = teami->size / num_warp_groups;
+    remaining_pes = teami->size % num_warp_groups;
+    /* first n ggroups take on an extra PE in the case of remainder */
+    num_pes_per_group += warp_group_id < remaining_pes ? 1 : 0;
+
+    start_pe = num_pes_per_group * warp_group_id;
+    start_pe += warp_group_id >= remaining_pes ? remaining_pes : 0;
+    data_element_offset = warp_id % num_warps_per_group * max_data_elems_per_warp;
+    psync_element_offset = warp_id % num_warps_per_group * max_psync_elems_per_warp;
+    for (; data_element_offset + max_data_elems_per_warp < nelems;
+         data_element_offset += num_warps_per_group * max_data_elems_per_warp,
+         psync_element_offset += num_warps_per_group * max_psync_elems_per_warp) {
+        for (next_pe = start_pe; next_pe < start_pe + num_pes_per_group; next_pe++) {
+            if (LL_VERSION == LL8) {
+                pack_offset =
+                    next_pe * NVSHMEMI_TEAM_ROUND_UP((nelems * _FCOLLECT_LL8_PSYNC_SCALE_FACTOR),
+                                                     16 / sizeof(T)) +
+                    psync_element_offset;
+                nvshmemi_recvLL<T, NVSHMEMI_THREADGROUP_WARP>(
+                    dest + (next_pe * nelems) + data_element_offset,
+                    (uint64_t *)(pWrk + pack_offset), max_data_elems_per_warp, ll_flag);
+            } else {
+                pack_offset = next_pe * NVSHMEMI_FCOLLECT_LL128_CALC_PSYNC_SIZE(nelems, T) +
+                              psync_element_offset;
+                nvshmemi_recvLL128<T, _LL_MAX_UNROLL>(
+                    dest + (next_pe * nelems) + data_element_offset, pWrk + pack_offset,
+                    max_data_elems_per_warp, ll_flag);
+            }
+        }
+    }
+
+    if (nelems > data_element_offset) {
+        for (next_pe = start_pe; next_pe < start_pe + num_pes_per_group; next_pe++) {
+            if (LL_VERSION == LL8) {
+                pack_offset =
+                    next_pe * NVSHMEMI_TEAM_ROUND_UP((nelems * _FCOLLECT_LL8_PSYNC_SCALE_FACTOR),
+                                                     16 / sizeof(T)) +
+                    psync_element_offset;
+                nvshmemi_recvLL<T, NVSHMEMI_THREADGROUP_WARP>(
+                    dest + (next_pe * nelems) + data_element_offset,
+                    (uint64_t *)(pWrk + pack_offset), nelems - data_element_offset, ll_flag);
+            } else {
+                pack_offset = next_pe * NVSHMEMI_FCOLLECT_LL128_CALC_PSYNC_SIZE(nelems, T) +
+                              psync_element_offset;
+                nvshmemi_recvLL128<T, 1>(dest + (next_pe * nelems) + data_element_offset,
+                                         pWrk + pack_offset, nelems - data_element_offset, ll_flag);
+            }
+        }
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_fcollect_allpush_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, int dest_offset, size_t nelems) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int next_rank;
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+
+    // nvshmemi_threadgroup_sync<SCOPE>();
+    for (int ii = teami->my_pe; ii < teami->size + teami->my_pe; ii++) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, ii);
+        nvshmemi_put_nbi_threadgroup<T, SCOPE>(dest + dest_offset, source, nelems, next_rank);
+    }
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_fcollect_p2p_allpush_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, int dest_offset, size_t nelems) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    int next_rank;
+    T *dst_ptr;
+    nvshmemi_threadgroup_sync<SCOPE>();
+    for (int ii = teami->my_pe; ii < teami->size + teami->my_pe; ii++) {
+        next_rank = nvshmemi_team_translate_pe_to_team_world_wrap(teami, ii);
+        dst_ptr = (T *)nvshmemi_ptr((void *)(dest + dest_offset), next_rank);
+        nvshmemi_memcpy_threadgroup<SCOPE>(dst_ptr, source, nelems * sizeof(T));
+    }
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_fcollect_nvls_allpush_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, int dest_offset, size_t nelems) {
+#if defined __clang_llvm_bitcode_lib__
+    if (__nvvm_reflect("__CUDA_ARCH") >= 900) {
+        nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+        nvshmemi_threadgroup_sync<SCOPE>();
+        T *dst_ptr = (T *)nvshmemi_mc_ptr(teami, (void *)(dest + dest_offset));
+        nvshmemi_mcast_memcpy_threadgroup<T, SCOPE>(dst_ptr, source, nelems * sizeof(T));
+        nvshmemi_barrier_threadgroup<SCOPE>(team);
+    } else {
+        assert(0 && "NVLS is not supported on this platform");
+    }
+#else
+#if __CUDA_ARCH__ >= 900 && CUDART_VERSION >= 12010
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    nvshmemi_threadgroup_sync<SCOPE>();
+    T *dst_ptr = (T *)nvshmemi_mc_ptr(teami, (void *)(dest + dest_offset));
+    nvshmemi_mcast_memcpy_threadgroup<T, SCOPE>(dst_ptr, source, nelems * sizeof(T));
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+#else
+    assert(0 && "NVLS is not supported on this platform");
+#endif
+#endif
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE void nvshmemi_fcollect_threadgroup(
+    nvshmem_team_t team, T *dest, const T *source, int dest_offset, size_t nelems) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int nthreads = nvshmemi_threadgroup_size<SCOPE>();
+    if (!myIdx) /* Only one thread should increment fcollect_count */
+        nvshmemi_device_state_d.team_pool[team]->fcollect_count += 1;
+    nvshmemi_threadgroup_sync<SCOPE>();
+    constexpr bool is_half_prec =
+        is_half<T>::value || is_bfloat<T>::value || is_uint16<T>::value || is_int16<T>::value;
+    int fcollect_algo = nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_algo;
+    int p2p_direct =
+        (nvshmemi_device_state_d.job_connectivity <= NVSHMEMI_JOB_GPU_LDST_REMOTE_ATOMICS);
+    const size_t fcollect_ll_threshold =
+        nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold;
+    const size_t fcollect_ll128_threshold =
+        nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll128_threshold;
+    /* NVLS LL performs better with block scoped than thread/warp scoped operations
+       due to better efficiency of distributing cvt/pack/unpack ops across threads across GPUs */
+    const uint8_t prefer_nvls_ll = (SCOPE == NVSHMEMI_THREADGROUP_BLOCK);
+    bool valid_ll_configuration = (SCOPE != NVSHMEMI_THREADGROUP_THREAD &&
+                                   ((sizeof(T) >= sizeof(uint32_t) && (nelems % 2 == 0)) ||
+                                    (is_half_prec && (nelems % 4 == 0) &&
+                                     (nvshmemi_device_state_d.team_pool[team]->size % 2 == 0))));
+    /* DISABLE non NVLS LL for hybrid MNNVL configurations. */
+    valid_ll_configuration &=
+        (nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_WORLD_INDEX]->are_gpus_p2p_connected ||
+         nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_SHARED]->is_team_node ||
+         !nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_NODE_INDEX]->are_gpus_p2p_connected);
+    /* This 2-level selection logic is implemented to reduce code duplication of calling leaf
+     * functions on the device code */
+    switch (fcollect_algo) {
+        case 0: /* default selection */ {
+            if (valid_ll_configuration && fcollect_ll_threshold >= (nelems * sizeof(T))) {
+                fcollect_algo = FCOLLECT_LL8; /* LL algorithm */
+            } else if (valid_ll_configuration && (nelems * sizeof(T)) < fcollect_ll128_threshold) {
+                fcollect_algo = FCOLLECT_LL128;
+            } else if (sizeof(T) >= sizeof(uint32_t) && (nelems % 2 == 0) &&
+                       nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold >=
+                           (nelems * sizeof(T)) &&
+                       nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL &&
+                       prefer_nvls_ll) {
+                fcollect_algo = FCOLLECT_NVLS_LL; /* NVLS LL algorithm */
+            } else if (nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL &&
+                       (nelems * sizeof(T)) % 4 == 0) {
+                fcollect_algo = FCOLLECT_NVLS; /* NVLS One shot algorithm */
+            } else {
+                fcollect_algo = FCOLLECT_ONESHOT; /* P2P One shot algorithm */
+            }
+        } break;
+        case FCOLLECT_LL8: /* LL algorithm */
+            if (!valid_ll_configuration) {
+                fcollect_algo = FCOLLECT_ONESHOT;
+            }
+            break;
+        case FCOLLECT_ONESHOT: /* One shot */
+            break;
+        case FCOLLECT_NVLS:
+            if (nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL &&
+                (nelems * sizeof(T)) % 4 == 0) {
+                /* NVLS simple */
+                break;
+            } else {
+                fcollect_algo = FCOLLECT_ONESHOT; /* One shot */
+                break;
+            }
+        case FCOLLECT_NVLS_LL:
+            if (sizeof(T) >= sizeof(uint32_t) && (nelems % 2 == 0) &&
+                nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold >=
+                    (nelems * sizeof(T)) &&
+                nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL) {
+                fcollect_algo = FCOLLECT_NVLS_LL; /* Use NVLS LL */
+            } else if (nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL &&
+                       (nelems * sizeof(T)) % 4 == 0) {
+                fcollect_algo = FCOLLECT_NVLS; /* Switch to NVLS simple */
+            } else {
+                fcollect_algo = FCOLLECT_ONESHOT; /* One shot */
+            }
+            break;
+        case FCOLLECT_LL128: /* LL 128 */
+            if (!valid_ll_configuration) {
+                fcollect_algo = FCOLLECT_ONESHOT;
+            }
+            break;
+        default:
+            assert(0 && "Unsupported fcollect algo");
+            break;
+    }
+
+    switch (fcollect_algo) {
+        case FCOLLECT_LL8:
+            if (myIdx < nthreads / 32 * 32) {
+                if (nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_NODE_INDEX]
+                        ->are_gpus_p2p_connected) {
+                    nvshmemi_fcollect_allpush_ll_threadgroup<T, SCOPE, LL8, true>(team, dest,
+                                                                                  source, nelems);
+                } else {
+                    nvshmemi_fcollect_allpush_ll_threadgroup<T, SCOPE, LL8, false>(team, dest,
+                                                                                   source, nelems);
+                }
+            }
+            nvshmemi_threadgroup_sync<SCOPE>();
+            break;
+        case FCOLLECT_ONESHOT:
+            if (p2p_direct)
+                nvshmemi_fcollect_p2p_allpush_threadgroup<T, SCOPE>(team, dest, source, dest_offset,
+                                                                    nelems);
+            else
+                nvshmemi_fcollect_allpush_threadgroup<T, SCOPE>(team, dest, source, dest_offset,
+                                                                nelems);
+            break;
+        case FCOLLECT_NVLS:
+            nvshmemi_fcollect_nvls_allpush_threadgroup<T, SCOPE>(team, dest, source, dest_offset,
+                                                                 nelems);
+            break;
+        case FCOLLECT_LL128:
+            if (myIdx < nthreads / 32 * 32) {
+                if (nvshmemi_device_state_d.team_pool[NVSHMEM_TEAM_NODE_INDEX]
+                        ->are_gpus_p2p_connected) {
+                    nvshmemi_fcollect_allpush_ll_threadgroup<T, SCOPE, LL128, true>(team, dest,
+                                                                                    source, nelems);
+                } else {
+                    nvshmemi_fcollect_allpush_ll_threadgroup<T, SCOPE, LL128, false>(
+                        team, dest, source, nelems);
+                }
+            }
+            nvshmemi_threadgroup_sync<SCOPE>();
+            break;
+        case FCOLLECT_NVLS_LL:
+            nvshmemi_fcollect_nvls_ll_threadgroup<T, SCOPE>(team, dest, source, nelems);
+            break;
+        default:
+            assert(0);
+            break;
+    }
+}
+
+// ************** Tile allgather **************/
+
+template <typename elemType, threadgroup_t SCOPE, typename tuple_t, int major_dim, int minor_dim>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_tile_allgather_mcast_threadgroup_v4(
+    int4 *dest, const int4 *source, const int nelem_major_dim, const int nelem_minor_dim,
+    const int src_stride_minor_dim, const int dst_stride_minor_dim, const int src_stride_major_dim,
+    const int dst_stride_major_dim, tuple_t start_coord, tuple_t boundary) {
+    /*src_stride_major_dim == 0 && dst_stride_major_dim == 0 for vectorized implementation*/
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    int nelems = nelem_major_dim * nelem_minor_dim; /* # vec elems*/
+    if constexpr (std::is_empty<tuple_t>::value) {
+        /* If no predicate, we vectorize the operation */
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            uint32_t u4[4];
+            asm("ld.global.v4.b32 {%0, %1, %2, %3}, [%4];"
+                : "=r"(u4[0]), "=r"(u4[1]), "=r"(u4[2]), "=r"(u4[3])
+                : "l"(source + ((j) % nelem_major_dim) +
+                      ((j) / nelem_major_dim) * src_stride_minor_dim));
+
+            asm("multimem.st.global.v4.f32 [%0], {%1, %2, %3, %4};" ::"l"(
+                    dest + ((j) % nelem_major_dim) +
+                    (((j) / nelem_major_dim) * dst_stride_minor_dim)),
+                "r"(u4[0]), "r"(u4[1]), "r"(u4[2]), "r"(u4[3])
+                : "memory");
+        }
+    } else {
+        using vtype = int4;
+        using cxx_type = uint32_t;
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            uint32_t u4[4];
+            /* nelem_major_dim is in vector units*/
+            uint32_t elem_coord_major = (j % nelem_major_dim) * (sizeof(vtype) / sizeof(elemType));
+            uint32_t elem_coord_minor = (j / nelem_major_dim);
+
+            /* start_coord, boundary are in elemType units */
+            /* Check if entire vector is within boundary */
+            /* start_coord_major_dim + elem_coord_major_dim + vector len (in elements) <=
+             * boundary_major_dim */
+            if (is_less_than<tuple_t, major_dim>(
+                    start_coord, create_coord_tuple<major_dim>(elem_coord_major, elem_coord_minor),
+                    boundary, (sizeof(vtype) / sizeof(elemType)))) {
+                asm("ld.global.v4.b32 {%0, %1, %2, %3}, [%4];"
+                    : "=r"(u4[0]), "=r"(u4[1]), "=r"(u4[2]), "=r"(u4[3])
+                    : "l"(source + ((j) % nelem_major_dim) +
+                          ((j) / nelem_major_dim) * src_stride_minor_dim));
+
+                asm("multimem.st.global.v4.f32 [%0], {%1, %2, %3, %4};" ::"l"(
+                        dest + ((j) % nelem_major_dim) +
+                        (((j) / nelem_major_dim) * dst_stride_minor_dim)),
+                    "r"(u4[0]), "r"(u4[1]), "r"(u4[2]), "r"(u4[3])
+                    : "memory");
+
+            } else { /* not all pred elems in vector are 1 */
+                     /* perform operations one elem at a time */
+                     /* if elem type is < 4B (e.g., f16, bf16), we check at granularity of 4B */
+
+                /* convert elem_coord_major from elemType to cxx_type units */
+                /* no change to elem_coord_minor */
+                elem_coord_major = (elem_coord_major * sizeof(elemType)) / sizeof(cxx_type);
+
+                /* vector is partially within boundary, check each element */
+                cxx_type val;
+                for (int u = 0; u < sizeof(vtype) / sizeof(cxx_type); ++u) {
+                    /* check if elem is within boundary, use u & elem_coord_major in elemType units
+                     */
+                    if (is_less_than<tuple_t, major_dim>(
+                            start_coord,
+                            create_coord_tuple<major_dim>(
+                                ((elem_coord_major + u) * sizeof(cxx_type) / sizeof(elemType)),
+                                elem_coord_minor),
+                            boundary)) {
+                        /* convert strides from vector to cxx_type units */
+                        asm("ld.global.b32 %0, [%1];"
+                            : "=r"(val)
+                            : "l"(reinterpret_cast<const cxx_type *>(source) +
+                                  (elem_coord_major + u) +
+                                  (elem_coord_minor * src_stride_minor_dim *
+                                   (sizeof(vtype) / sizeof(cxx_type)))));
+
+                        asm("multimem.st.global.u32 [%0], %1;" ::"l"(
+                                reinterpret_cast<cxx_type *>(dest) + (elem_coord_major + u) +
+                                (elem_coord_minor * dst_stride_minor_dim *
+                                 (sizeof(vtype) / sizeof(cxx_type)))),
+                            "r"(val)
+                            : "memory");
+                    }
+                }
+            }
+        }
+    } /*end of if else*/
+}
+
+template <typename elemType, threadgroup_t SCOPE, typename tuple_t, int major_dim, int minor_dim>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_tile_allgather_mcast_threadgroup_v2(
+    uint64_t *dest, const uint64_t *source, const int nelem_major_dim, const int nelem_minor_dim,
+    const int src_stride_minor_dim, const int dst_stride_minor_dim, const int src_stride_major_dim,
+    const int dst_stride_major_dim, tuple_t start_coord, tuple_t boundary) {
+    /* src_stride_major_dim == 0 && dst_stride_major_dim == 0 for vectorized implementation */
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    int nelems = nelem_major_dim * nelem_minor_dim; /* # vec elems*/
+
+    if constexpr (std::is_empty<tuple_t>::value) {
+        /* If no predicate, we vectorize the operation */
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            uint64_t val1;
+            asm("ld.global.b64 %0, [%1];"
+                : "=l"(val1)
+                : "l"(source + ((j) % nelem_major_dim) +
+                      ((j) / nelem_major_dim) * src_stride_minor_dim));
+
+            asm("multimem.st.global.u64 [%0], %1;" ::"l"(
+                    dest + ((j) % nelem_major_dim) +
+                    (((j) / nelem_major_dim) * dst_stride_minor_dim)),
+                "l"(val1)
+                : "memory");
+        }
+    } else {
+        using vtype = uint64_t;
+        using cxx_type = uint32_t;
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            uint64_t val1;
+            /* nelem_major_dim is in vector units*/
+            /* compute elem_coord_major in elemType units*/
+            uint32_t elem_coord_major = (j % nelem_major_dim) * (sizeof(vtype) / sizeof(elemType));
+            uint32_t elem_coord_minor = (j / nelem_major_dim);
+
+            /* start_coord, boundary are in elemType units */
+            /* Check if entire vector is within boundary */
+            /* start_coord_major_dim + elem_coord_major_dim + vector len (in elements) <=
+             * boundary_major_dim */
+            if (is_less_than<tuple_t, major_dim>(
+                    start_coord, create_coord_tuple<major_dim>(elem_coord_major, elem_coord_minor),
+                    boundary, (sizeof(vtype) / sizeof(elemType)))) {
+                asm("ld.global.b64 %0, [%1];"
+                    : "=l"(val1)
+                    : "l"(source + ((j) % nelem_major_dim) +
+                          ((j) / nelem_major_dim) * src_stride_minor_dim));
+
+                asm("multimem.st.global.u64 [%0], %1;" ::"l"(
+                        dest + ((j) % nelem_major_dim) +
+                        (((j) / nelem_major_dim) * dst_stride_minor_dim)),
+                    "l"(val1)
+                    : "memory");
+
+            } else { /* not all pred elems in vector are 1 */
+                     /* perform operations one elem at a time */
+                     /* if elem type is < 4B (e.g., f16, bf16), we check at granularity of 4B */
+
+                /* convert elem_coord_major from elemType to cxx_type units */
+                /* no change to elem_coord_minor */
+                elem_coord_major = (elem_coord_major * sizeof(elemType)) / sizeof(cxx_type);
+
+                /* vector is partially within boundary, check each element */
+                cxx_type val;
+                for (int u = 0; u < sizeof(vtype) / sizeof(cxx_type); ++u) {
+                    /* check if elem is within boundary, use u and elem_coord_major in elemType
+                     * units */
+                    if (is_less_than<tuple_t, major_dim>(
+                            start_coord,
+                            create_coord_tuple<major_dim>(
+                                ((elem_coord_major + u) * sizeof(cxx_type) / sizeof(elemType)),
+                                elem_coord_minor),
+                            boundary)) {
+                        /* convert strides from vector to cxx_type units */
+                        asm("ld.global.b32 %0, [%1];"
+                            : "=r"(val)
+                            : "l"(reinterpret_cast<const cxx_type *>(source) +
+                                  (elem_coord_major + u) +
+                                  (elem_coord_minor * src_stride_minor_dim *
+                                   (sizeof(vtype) / sizeof(cxx_type)))));
+
+                        asm("multimem.st.global.u32 [%0], %1;" ::"l"(
+                                reinterpret_cast<cxx_type *>(dest) + (elem_coord_major + u) +
+                                (elem_coord_minor * dst_stride_minor_dim *
+                                 (sizeof(vtype) / sizeof(cxx_type)))),
+                            "r"(val)
+                            : "memory");
+                    }
+                }
+            }
+        }
+    } /*end of if else*/
+}
+
+template <typename elemType, threadgroup_t SCOPE, typename tuple_t, int major_dim, int minor_dim>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_tile_allgather_mcast_threadgroup_v1(
+    uint32_t *dest, const uint32_t *source, const int nelem_major_dim, const int nelem_minor_dim,
+    const int src_stride_minor_dim, const int dst_stride_minor_dim, const int src_stride_major_dim,
+    const int dst_stride_major_dim, tuple_t start_coord, tuple_t boundary) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    int nelems = nelem_major_dim * nelem_minor_dim; /* # vec elems*/
+    using vtype = uint32_t;
+    using cxx_type = uint32_t;
+    if constexpr (std::is_empty<tuple_t>::value) {
+        cxx_type val;
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            asm("ld.global.b32 %0, [%1];"
+                : "=r"(val)
+                : "l"(source + ((j % nelem_major_dim) * src_stride_major_dim) +
+                      ((j / nelem_major_dim) * src_stride_minor_dim)));
+
+            asm("multimem.st.global.u32 [%0], %1;" ::"l"(
+                    dest + ((j % nelem_major_dim) * dst_stride_major_dim) +
+                    ((j / nelem_major_dim) * dst_stride_minor_dim)),
+                "r"(val)
+                : "memory");
+        }
+    } else {
+        for (size_t j = myIdx; j < nelems; j += groupSize) {
+            /* nelem_major_dim is in vector units*/
+            /* compute elem_coord_major in elemType units*/
+            uint32_t elem_coord_major = (j % nelem_major_dim) * (sizeof(vtype) / sizeof(elemType));
+            uint32_t elem_coord_minor = (j / nelem_major_dim);
+            cxx_type val;
+
+            /* convert elem_coord_major from elemType to cxx_type units */
+            /* no change to elem_coord_minor */
+            elem_coord_major = (elem_coord_major * sizeof(elemType)) / sizeof(cxx_type);
+
+            for (int u = 0; u < sizeof(vtype) / sizeof(cxx_type); ++u) {
+                /* check if elem is within boundary, use u and elem_coord_major in elemType units */
+                if (is_less_than<tuple_t, major_dim>(
+                        start_coord,
+                        create_coord_tuple<major_dim>(
+                            ((elem_coord_major + u) * sizeof(cxx_type) / sizeof(elemType)),
+                            elem_coord_minor),
+                        boundary)) {
+                    /* convert strides from vector to cxx_type units */
+                    asm("ld.global.b32 %0, [%1];"
+                        : "=r"(val)
+                        : "l"(reinterpret_cast<const cxx_type *>(source) + (elem_coord_major + u) +
+                              (elem_coord_minor * src_stride_minor_dim *
+                               (sizeof(vtype) / sizeof(cxx_type)))));
+
+                    asm("multimem.st.global.u32 [%0], %1;" ::"l"(
+                            reinterpret_cast<cxx_type *>(dest) + (elem_coord_major + u) +
+                            (elem_coord_minor * dst_stride_minor_dim *
+                             (sizeof(vtype) / sizeof(cxx_type)))),
+                        "r"(val)
+                        : "memory");
+                }
+            }
+        }
+    } /*end of if else*/
+}
+
+// Select implementation based on the operation, datatype
+template <typename vtype, typename T, threadgroup_t scope, typename tuple_t, int major_dim,
+          int minor_dim>
+__device__ inline void nvshmemi_tile_allgather_nvls_threadgroup_vec(
+    nvshmem_team_t team, T *src, T *dst,
+    const int size_major_dim,        // size along the major dimension in elements
+    const int size_minor_dim,        // size along the minor dimension in elements
+    const int src_stride_minor_dim,  // src stride along minor dimension in elements
+    const int dst_stride_minor_dim,  // dst stride along minor dimension in elements
+    const int src_stride_major_dim,  // src stride along major dimension in elements
+    const int dst_stride_major_dim,  // dst stride along major dimension in elements
+    tuple_t start_coord, tuple_t boundary) {
+    // src is local, dst is multicast address
+    vtype *src_v = reinterpret_cast<vtype *>(src);
+    vtype *dst_v = reinterpret_cast<vtype *>(nvshmemx_mc_ptr(team, dst));
+    assert((dst_v != nullptr) && "Failed to get multicast ptr for destination");
+
+    int src_stride_minor_dim_v = src_stride_minor_dim;
+    if (src_stride_minor_dim > 1) {
+        src_stride_minor_dim_v = (src_stride_minor_dim * sizeof(T)) / sizeof(vtype);
+    }
+    int dst_stride_minor_dim_v = dst_stride_minor_dim;
+    if (dst_stride_minor_dim > 1) {
+        dst_stride_minor_dim_v = (dst_stride_minor_dim * sizeof(T)) / sizeof(vtype);
+    }
+    int src_stride_major_dim_v = src_stride_major_dim;  // keep stride as is if ==1
+    if (src_stride_major_dim > 1) {
+        src_stride_major_dim_v = (src_stride_major_dim * sizeof(T)) / sizeof(vtype);
+    }
+    int dst_stride_major_dim_v = dst_stride_major_dim;
+    if (dst_stride_major_dim > 1) {
+        dst_stride_major_dim_v = (dst_stride_major_dim * sizeof(T)) / sizeof(vtype);
+    }
+
+    int nelem_major_dim = (size_major_dim * sizeof(T)) / sizeof(vtype);
+    int nelem_minor_dim = size_minor_dim;
+
+    if constexpr (std::is_same<vtype, int4>::value) {
+        nvshmemi_tile_allgather_mcast_threadgroup_v4<T, scope, tuple_t, major_dim, minor_dim>(
+            dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+            dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+            boundary);
+
+    } else if constexpr (std::is_same<vtype, uint64_t>::value) {
+        nvshmemi_tile_allgather_mcast_threadgroup_v2<T, scope, tuple_t, major_dim, minor_dim>(
+            dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+            dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+            boundary);
+
+    } else if constexpr (std::is_same<vtype, uint32_t>::value) {
+        nvshmemi_tile_allgather_mcast_threadgroup_v1<T, scope, tuple_t, major_dim, minor_dim>(
+            dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+            dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+            boundary);
+
+    } else {
+        if (std::is_same<vtype, int4>::value) {
+            nvshmemi_tile_allgather_mcast_threadgroup_v4<T, scope, tuple_t, major_dim, minor_dim>(
+                dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+                dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+                boundary);
+
+        } else if (std::is_same<vtype, uint64_t>::value) {
+            nvshmemi_tile_allgather_mcast_threadgroup_v2<T, scope, tuple_t, major_dim, minor_dim>(
+                dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+                dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+                boundary);
+
+        } else if (std::is_same<vtype, uint32_t>::value) {
+            nvshmemi_tile_allgather_mcast_threadgroup_v1<T, scope, tuple_t, major_dim, minor_dim>(
+                dst_v, src_v, nelem_major_dim, nelem_minor_dim, src_stride_minor_dim_v,
+                dst_stride_minor_dim_v, src_stride_major_dim_v, dst_stride_major_dim_v, start_coord,
+                boundary);
+        } else {
+            assert(0 && "unsupported vector type");
+        }
+    }
+}
+
+template <typename src_tensor_t, typename dst_tensor_t, typename tuple_t, threadgroup_t scope,
+          int major_dim, int minor_dim>
+__device__ inline void nvshmemi_tile_allgather_nvls_dim(nvshmem_team_t team,
+                                                        src_tensor_t src_tensor,
+                                                        dst_tensor_t dst_tensor,
+                                                        tuple_t start_coord, tuple_t boundary) {
+    using T = typename src_tensor_t::value_type;
+    int mype = nvshmem_team_my_pe(team);
+
+    /* The destination tensor is npes * src_tensor size
+     *  Assume 4 PEs, with src_tensor as shown below
+     *    __    __    __    __
+     *   |__|  |__|  |__|  |__|   // src_tensor of 4 PEs
+     *
+     *  dest_tensor is 4 x src_tensor
+     *   __ __
+     *  |__|__|   // dest_tensor of a PE (4xsrc_tensor)
+     *  |__|__|
+     *
+     *   Other shapes are possible for dst_tensor
+     *   __ __ __ __      __
+     *  |__|__|__|__|    |__|
+     *                   |__|
+     *                   |__|
+     *                   |__|
+     *
+     *  For every src_tensor from a given PE, we need to find the starting offset within
+     *  dest_tensor.
+     */
+
+    // Compute the offset within dst tile specific for the PE
+    T *dst =
+        (dst_tensor.data() +
+         (((mype * get_shape_element<major_dim>(src_tensor)) %
+           get_shape_element<major_dim>(dst_tensor)) *
+          get_stride_element<major_dim>(dst_tensor)) +
+         (((mype * get_shape_element<major_dim>(src_tensor)) /
+           get_shape_element<major_dim>(dst_tensor)) *
+          (get_shape_element<minor_dim>(src_tensor) * get_stride_element<minor_dim>(dst_tensor))));
+
+    // Since it is PUSH based implementation, number of elements being copied is same as
+    // src_tensor so, elements in each dimension is based on src_tensor but stride is based on
+    // dst_tensor
+
+    // check for vector len == 4
+    // Conditions: ptr must be aligned to int4, shape must be a multiple of 16, stride must be a
+    // multiple of 16
+    if (((size_t)src_tensor.data() % sizeof(int4) == 0) &&
+        ((size_t)dst_tensor.data() % sizeof(int4) == 0) &&
+        (((get_tuple_val<major_dim>(src_tensor.shape()) * sizeof(T)) % sizeof(int4)) == 0) &&
+        (((get_stride_element<minor_dim>(src_tensor) * sizeof(T)) % sizeof(int4)) == 0) &&
+        (((get_stride_element<minor_dim>(dst_tensor) * sizeof(T)) % sizeof(int4)) == 0)) {
+        nvshmemi_tile_allgather_nvls_threadgroup_vec<int4, T, scope, tuple_t, major_dim, minor_dim>(
+            team, src_tensor.data(), dst,
+            get_shape_element<major_dim>(src_tensor),   // contiguous size
+            get_shape_element<minor_dim>(src_tensor),   // strided size
+            get_stride_element<minor_dim>(src_tensor),  // src stride minor_dim
+            get_stride_element<minor_dim>(dst_tensor),  // dst stride minor_dim
+            get_stride_element<major_dim>(src_tensor),  // src stride major_dim; equal to 1
+            get_stride_element<major_dim>(dst_tensor),  // dst stride major_dim; equal to 1
+            start_coord, boundary);
+
+    } else if (((size_t)src_tensor.data() % sizeof(uint64_t) == 0) &&
+               ((size_t)dst_tensor.data() % sizeof(uint64_t) == 0) &&
+               (((get_tuple_val<major_dim>(src_tensor.shape()) * sizeof(T)) % sizeof(uint64_t)) ==
+                0) &&
+               (((get_stride_element<minor_dim>(src_tensor) * sizeof(T)) % sizeof(uint64_t)) ==
+                0) &&
+               (((get_stride_element<minor_dim>(dst_tensor) * sizeof(T)) % sizeof(uint64_t)) ==
+                0)) {
+        nvshmemi_tile_allgather_nvls_threadgroup_vec<uint64_t, T, scope, tuple_t, major_dim,
+                                                     minor_dim>(
+            team, src_tensor.data(), dst,
+            get_shape_element<major_dim>(src_tensor),   // contiguous size
+            get_shape_element<minor_dim>(src_tensor),   // strided size
+            get_stride_element<minor_dim>(src_tensor),  // src stride minor_dim
+            get_stride_element<minor_dim>(dst_tensor),  // dst stride minor_dim
+            get_stride_element<major_dim>(src_tensor),  // src stride major_dim; equal to 1
+            get_stride_element<major_dim>(dst_tensor),  // dst stride major_dim; equal to 1
+            start_coord, boundary);
+
+    } else {  // vector len 1
+        nvshmemi_tile_allgather_nvls_threadgroup_vec<uint32_t, T, scope, tuple_t, major_dim,
+                                                     minor_dim>(
+            team, src_tensor.data(), dst,
+            get_shape_element<major_dim>(src_tensor),   // contiguous size
+            get_shape_element<minor_dim>(src_tensor),   // strided size
+            get_stride_element<minor_dim>(src_tensor),  // src stride minor_dim
+            get_stride_element<minor_dim>(dst_tensor),  // dst stride minor_dim
+            get_stride_element<major_dim>(src_tensor),  // src stride major_dim; equal to 1
+            get_stride_element<major_dim>(dst_tensor),  // dst stride major_dim; equal to 1
+            start_coord, boundary);
+    }
+}
+// specialize for the vectorization
+template <typename src_tensor_t, typename dst_tensor_t, typename tuple_t, threadgroup_t scope>
+__device__ inline void nvshmemi_tile_allgather_nvls_threadgroup(nvshmem_team_t team,
+                                                                src_tensor_t src_tensor,
+                                                                dst_tensor_t dst_tensor,
+                                                                tuple_t start_coord,
+                                                                tuple_t boundary) {
+    using T = typename src_tensor_t::value_type;
+    if constexpr ((get_constant(safe_get<0>(decltype(src_tensor.stride()){})) == 1) &&
+                  (get_constant(safe_get<0>(decltype(dst_tensor.stride()){})) == 1)) {
+        // dim 0 major
+        constexpr int major_dim = 0;
+        constexpr int minor_dim = 1;
+
+        if constexpr (sizeof(T) < 4) {
+            // Shape along major dimension should be divisible by 2, because we operate at fp16x2
+            assert(((get_shape_element<major_dim>(src_tensor) % 2) == 0) &&
+                   ((get_shape_element<major_dim>(dst_tensor) % 2) == 0) &&
+                   "Currently for 16B datatypes, we only support tensors which are 32b aligned "
+                   "along their continuous dimension");
+        }
+
+        nvshmemi_tile_allgather_nvls_dim<src_tensor_t, dst_tensor_t, tuple_t, scope, major_dim,
+                                         minor_dim>(team, src_tensor, dst_tensor, start_coord,
+                                                    boundary);
+    } else if constexpr ((get_constant(safe_get<1>(decltype(src_tensor.stride()){})) == 1) &&
+                         (get_constant(safe_get<1>(decltype(dst_tensor.stride()){})) == 1)) {
+        // dim 1 major
+        constexpr int major_dim = 1;
+        constexpr int minor_dim = 0;
+
+        if constexpr (sizeof(T) < 4) {
+            // Shape along major dimension should be divisible by 2, because we operate at fp16x2
+            assert(((get_shape_element<major_dim>(src_tensor) % 2) == 0) &&
+                   ((get_shape_element<major_dim>(dst_tensor) % 2) == 0) &&
+                   "Currently for 16B datatypes, we only support tensors which are 32b aligned "
+                   "along their continuous dimension");
+        }
+
+        nvshmemi_tile_allgather_nvls_dim<src_tensor_t, dst_tensor_t, tuple_t, scope, major_dim,
+                                         minor_dim>(team, src_tensor, dst_tensor, start_coord,
+                                                    boundary);
+    } else {
+        // No contiguous dimension found at compile time
+        // TODO support when major dimension for src and tensor are different
+        if ((get_stride_element<1>(src_tensor) == 1) && (get_stride_element<1>(dst_tensor) == 1)) {
+            constexpr int major_dim = 1;
+            constexpr int minor_dim = 0;
+
+            if constexpr (sizeof(T) < 4) {
+                // Shape along major dimension should be divisible by 2, because we operate at
+                // fp16x2
+                assert(((get_shape_element<major_dim>(src_tensor) % 2) == 0) &&
+                       ((get_shape_element<major_dim>(dst_tensor) % 2) == 0) &&
+                       "Currently for 16B datatypes, we only support tensors which are 32b aligned "
+                       "along their continuous dimension");
+            }
+
+            nvshmemi_tile_allgather_nvls_dim<src_tensor_t, dst_tensor_t, tuple_t, scope, major_dim,
+                                             minor_dim>(team, src_tensor, dst_tensor, start_coord,
+                                                        boundary);
+        } else {
+            // setting major_dim to 0, minor_dim to 1
+            constexpr int major_dim = 0;
+            constexpr int minor_dim = 1;
+
+            if constexpr (sizeof(T) < 4) {
+                // Shape along major dimension should be divisible by 2, because we operate at
+                // fp16x2
+                assert(((get_shape_element<major_dim>(src_tensor) % 2) == 0) &&
+                       ((get_shape_element<major_dim>(dst_tensor) % 2) == 0) &&
+                       "Currently for 16B datatypes, we only support tensors which are 32b aligned "
+                       "along their continuous dimension");
+            }
+            nvshmemi_tile_allgather_nvls_dim<src_tensor_t, dst_tensor_t, tuple_t, scope, major_dim,
+                                             minor_dim>(team, src_tensor, dst_tensor, start_coord,
+                                                        boundary);
+        }
+    }
+}
+
+// Tile allgather entrypoint
+// Call underlying function based on scope and algo
+template <nvshmemx::tile_coll_algo_t algo, typename src_tensor_t, typename dst_tensor_t,
+          typename tuple_t, threadgroup_t scope>
+__device__ inline int nvshmemi_tile_allgather(nvshmem_team_t team, src_tensor_t src_tensor,
+                                              dst_tensor_t dst_tensor, tuple_t start_coord,
+                                              tuple_t boundary, uint64_t flag) {
+#if defined(__cplusplus) && __cplusplus < 201703L
+    assert(0 && "Tile-granular APIs need C++ 17");
+#endif
+    using T = typename src_tensor_t::value_type;
+
+    static_assert(
+        std::is_same<typename src_tensor_t::value_type, typename dst_tensor_t::value_type>::value,
+        "Source and destination tensors must have the same type");
+
+    static_assert((algo == nvshmemx::tile_coll_algo_t::NVLS_ONE_SHOT_PUSH_NBI),
+                  "Unsupported tile AllGather algorithm. "
+                  "Currently NVLS_ONE_SHOT_PUSH_NBI is supported for tile allgather");
+
+    static_assert((scope == NVSHMEMI_THREADGROUP_THREAD) || (scope == NVSHMEMI_THREADGROUP_WARP) ||
+                      (scope == NVSHMEMI_THREADGROUP_WARPGROUP) ||
+                      (scope == NVSHMEMI_THREADGROUP_BLOCK),
+                  "Unsupported scope");
+
+    assert((src_tensor.data() != nullptr) && (dst_tensor.data() != nullptr) &&
+           "Null pointers passed");
+
+    // check shape
+    assert((get_shape_element<0>(src_tensor) * get_shape_element<1>(src_tensor) *
+            nvshmem_team_n_pes(team)) &&
+           (get_shape_element<0>(dst_tensor) * get_shape_element<1>(dst_tensor)));
+
+    // TODO add other data types
+    static_assert(((is_half<T>::value) || (is_bfloat<T>::value) || (is_float<T>::value)),
+                  "Unsupported datatype");
+
+    // check if both src and dst have same continuous dimension
+    // TODO relax this constraint
+    assert(
+        (((get_stride_element<0>(src_tensor) == 1) && (get_stride_element<0>(dst_tensor) == 1)) ||
+         ((get_stride_element<1>(src_tensor) == 1) && (get_stride_element<1>(dst_tensor) == 1))) &&
+        "Currently we only support cases where source and destination tile are continuous "
+        "along one dimension");
+
+    assert(!flag && "Currently non-zero flag value is unsupported");
+
+    // NVLS Gather only has one-shot push support currently
+    if constexpr (algo == nvshmemx::tile_coll_algo_t::NVLS_ONE_SHOT_PUSH_NBI) {
+        // check for NVLS support in hardware
+#if __CUDA_ARCH__ >= 900 && CUDART_VERSION >= 12010
+
+        // NVLS ONE_SHOT AllGather is PUSH based algo, so we can directly start communicating
+        // User should ensure src data is ready
+
+        nvshmemi_tile_allgather_nvls_threadgroup<src_tensor_t, dst_tensor_t, tuple_t, scope>(
+            team, src_tensor, dst_tensor, start_coord, boundary);
+#else
+        assert(__CUDA_ARCH__ >= 900 && CUDART_VERSION >= 12010 &&
+               "Unsupported NVLS on this platform");
+#endif
+        return 0;
+    } else {
+        // Extend as other algorithms are added
+        return 0;
+    }
+}
+#endif /* __CUDA_ARCH__ */
+#endif /* FCOLLECT_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/reducescatter.cuh

@@ -0,0 +1,203 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef REDUCESCATTER_DEVICE_CUH
+#define REDUCESCATTER_DEVICE_CUH
+
+#include <cuda_runtime.h>
+#include "non_abi/device/pt-to-pt/proxy_device.cuh"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "non_abi/device/common/nvshmemi_common_device.cuh"
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+#include "non_abi/nvshmem_build_options.h"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/wait/nvshmemi_wait_until_apis.cuh"
+#include "utils.cuh"
+#include "fcollect.cuh"
+#include "broadcast.cuh"
+#include "reduce.cuh"
+
+#ifdef __CUDACC__
+#include <cooperative_groups.h>
+#include <cooperative_groups/reduce.h>
+namespace cg = cooperative_groups;
+#endif
+
+#ifdef __CUDA_ARCH__
+
+template <typename TYPE, rdxn_ops_t OP, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_reducescatter_allpush_threadgroup(
+    nvshmem_team_t team, TYPE *dest, const TYPE *source, size_t nreduce) {
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    TYPE *pWrk = (TYPE *)nvshmemi_team_get_psync(teami, REDUCE);
+
+    if (teami->size == 1) {
+        nvshmemi_memcpy_threadgroup<SCOPE>((char *)dest, (char *)source, sizeof(TYPE) * nreduce);
+        nvshmemi_threadgroup_sync<SCOPE>();
+        return;
+    }
+
+    if (nreduce * sizeof(TYPE) * teami->size >
+        nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size * 0.5) {
+        assert(0 &&
+               "Not enough space to perform reducescatter. Increase value of "
+               "NVSHMEM_REDUCE_SCRATCH_SIZE");
+    }
+
+    /* pWrk: pe0 data array, pe1 data array, pe2 data array, .... */
+    for (int i = 1; i < teami->size; i++) {  // don't send to self
+        int peer_pe_idx = (teami->my_pe + i) % teami->size;
+        int peer_pe = nvshmemi_team_translate_pe(team, peer_pe_idx, NVSHMEM_TEAM_WORLD);
+        nvshmemii_put_nbi_threadgroup<TYPE, SCOPE>(
+            (TYPE *)((char *)pWrk + teami->my_pe * nreduce * sizeof(TYPE)),
+            source + peer_pe_idx * nreduce, nreduce, peer_pe);
+    }
+    nvshmemi_barrier_threadgroup<SCOPE>(team);
+
+    TYPE *op1, *op2;
+    TYPE *op3;
+    for (int pe = 1; pe < teami->size; pe++) {  // Need to perform npes - 1 reductions
+        op3 = dest;
+        if (pe == 1) {  // this is the first reduction
+            if (nvshmemi_team_my_pe(team) == 0) {
+                op1 = (TYPE *)source;
+                op2 = (TYPE *)((char *)pWrk + nreduce * sizeof(TYPE));
+            } else if (nvshmemi_team_my_pe(team) == 1) {
+                op1 = (TYPE *)(char *)pWrk;
+                op2 = (TYPE *)source + nreduce;
+            } else {
+                op1 = (TYPE *)(char *)pWrk;
+                op2 = (TYPE *)((char *)pWrk + nreduce * sizeof(TYPE));
+            }
+        } else {
+            op1 = dest;
+            if (pe == nvshmemi_team_my_pe(team))
+                op2 = (TYPE *)source + pe * nreduce;
+            else
+                op2 = (TYPE *)((char *)pWrk + pe * nreduce * sizeof(TYPE));
+        }
+        gpu_linear_reduce_threadgroup<TYPE, OP, SCOPE>(op1, op2, op3, nreduce);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename TYPE, rdxn_ops_t OP, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_reducescatter_nvls_allpush_threadgroup(
+    nvshmem_team_t team, TYPE *dest, const TYPE *source, int source_offset, size_t nreduce) {
+#if defined __clang_llvm_bitcode_lib__
+    if (__nvvm_reflect("__CUDA_ARCH") >= 900) {
+        nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+        TYPE *src_ptr = (TYPE *)nvshmemi_mc_ptr(teami, (void *)(source + source_offset));
+        nvshmemi_threadgroup_sync<SCOPE>();
+        nvshmemi_local_reduce_mcast_threadgroup<TYPE, OP, SCOPE>(dest, src_ptr, nreduce);
+        /* Since ld.red is done atomically on the NVSwitch, the value obtained into local dest
+         * ref for a given PE would be ready, right away. We can still have a case that after
+         * returning from this kernel, source buffer can be mutated on one PE, while another PE is
+         * still performing ld.red, causing data correctness issue. We don't however need to add
+         * threadfence_system for ordering since the subsequent load to source buffer will be
+         * ordered already to prior ld.reduce (RAR) by HW.
+         */
+        nvshmemi_sync_threadgroup<SCOPE>(team);
+    } else {
+        assert(0 && "Unsupported NVLS algo on this platform");
+    }
+#else
+#if __CUDA_ARCH__ >= 900 && CUDART_VERSION >= 12010
+    nvshmemi_team_t *teami = nvshmemi_device_state_d.team_pool[team];
+    TYPE *src_ptr = (TYPE *)nvshmemi_mc_ptr(teami, (void *)(source + source_offset));
+    nvshmemi_threadgroup_sync<SCOPE>();
+    nvshmemi_local_reduce_mcast_threadgroup<TYPE, OP, SCOPE>(dest, src_ptr, nreduce);
+    /* Since ld.red is done atomically on the NVSwitch, the value obtained into local dest
+     * ref for a given PE would be ready, right away. We can still have a case that after returning
+     * from this kernel, source buffer can be mutated on one PE, while another PE is still
+     * performing ld.red, causing data correctness issue. We don't however need to add
+     * threadfence_system for ordering since the subsequent load to source buffer will be ordered
+     * already to prior ld.reduce (RAR) by HW.
+     */
+    nvshmemi_sync_threadgroup<SCOPE>(team);
+#else
+    assert(0 && "Unsupported NVLS algo on this platform");
+#endif
+#endif
+}
+
+template <typename TYPE, rdxn_ops_t OP, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_reducescatter_threadgroup(
+    nvshmem_team_t team, TYPE *dest, const TYPE *source, int source_offset, size_t nreduce) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+
+    if (!myIdx) /* Only one thread should increment rdxn_count */
+        nvshmemi_device_state_d.team_pool[team]->rdxn_count += 1;
+    nvshmemi_threadgroup_sync<SCOPE>();
+
+    constexpr bool is_float_v = is_float<TYPE>::value;
+    constexpr bool is_double_v = is_double<TYPE>::value;
+    constexpr bool is_half_prec = is_half<TYPE>::value || is_bfloat<TYPE>::value;
+    /* For SUM/AND/XOR/OR, support is untyped */
+    /* For MIN/MAX, support is type specific */
+    constexpr bool is_mcast_red_op =
+        NVSHMEMI_MCAST_RDXN_OP_IS_CAP_UNTYPED(OP) ||
+        ((OP == RDXN_OPS_MIN || OP == RDXN_OPS_MAX) && (!is_float_v && !is_double_v));
+    constexpr bool is_mcast_canoncial_type = (sizeof(TYPE) >= sizeof(uint32_t));
+    bool is_half_precondition =
+        is_half_prec && nreduce >= 2 && (nvshmemi_device_state_d.team_pool[team]->size % 2 == 0);
+    bool is_nvls_algo_supported =
+        ((is_mcast_red_op && is_mcast_canoncial_type) ||
+         (OP == RDXN_OPS_SUM && is_half_precondition)) &&
+        (nvshmemi_device_state_d.team_pool[team]->nvls_rsc_base_ptr != NULL) &&
+        ((nreduce * sizeof(TYPE)) % 4 == 0);
+
+    int reducescatter_algo = nvshmemi_device_state_d.gpu_coll_env_params_var.reducescatter_algo;
+    /* This 2-level selection logic is implemented to reduce code duplication of calling leaf
+     * functions on the device code */
+    switch (reducescatter_algo) {
+        case 0: /* default selection */
+            if (is_nvls_algo_supported) {
+                reducescatter_algo = 3; /* NVLS One Shot */
+            } else {
+                reducescatter_algo = 2; /* P2P One Shot */
+            }
+            break;
+        case 2: /* One Shot */
+            break;
+        case 3:
+            if (is_nvls_algo_supported) {
+                /* NVLS one shot */
+                break;
+            } else {
+                reducescatter_algo = 2; /* One shot */
+                break;
+            }
+        default:
+            assert(0 && "Specified reducescatter algo not supported, aborting...\n");
+            break;
+    }
+
+    switch (reducescatter_algo) {
+        case 2:
+            nvshmemi_reducescatter_allpush_threadgroup<TYPE, OP, SCOPE>(team, dest, source,
+                                                                        nreduce);
+            break;
+        case 3:
+            nvshmemi_reducescatter_nvls_allpush_threadgroup<TYPE, OP, SCOPE>(
+                team, dest, source, source_offset, nreduce);
+            break;
+        default:
+            assert(0);
+            break;
+    }
+
+    /* since both allpush and nvls one-shot algos don't store data remotely at the end of the
+     * collective, threadfence_system when cuda_graph is enabled is not required */
+}
+
+#endif /* __CUDA_ARCH__ */
+#endif /* REDUCESCATTER_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/coll/utils.cuh

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2017-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEMI_DEVICE_COLL_UTILS_H_
+#define _NVSHMEMI_DEVICE_COLL_UTILS_H_
+
+#include <cuda_runtime.h>
+#if !defined __CUDACC_RTC__
+#include <type_traits>
+#else
+#include <cuda/std/type_traits>
+#endif
+#include "non_abi/nvshmem_build_options.h"
+#include "device/nvshmem_device_macros.h"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+
+/* This is signaling function used in barrier algorithm.
+nvshmem_<type>_signal function cannot be used in barrier because it uses a
+combination of P2P path and IB path depending on how the peer GPU is
+connected. In contrast to that, this fuction uses either P2P path (when all GPUs
+are NVLink connected) or IB path (when any of the GPU is not NVLink connected).
+
+Using this function in barrier is necessary to ensure any previous RMA
+operations are visible. When combination of P2P and IB path are used
+as in nvshmem_<type>_signal function, it can lead to race conditions.
+For example NVLink writes (of data and signal) can overtake IB writes.
+And hence the data may not be visible after the barrier operation.
+*/
+#ifdef __CUDA_ARCH__
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_signal_for_barrier(T *dest, const T value,
+                                                                          int pe) {
+    const void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (nvshmemi_device_state_d.job_connectivity <= NVSHMEMI_JOB_GPU_LDST) {
+        volatile T *dest_actual =
+            (volatile T *)((char *)(peer_base_addr) +
+                           ((char *)dest - (char *)(nvshmemi_device_state_d.heap_base)));
+        *dest_actual = value;
+    } else {
+        nvshmemi_transfer_amo_nonfetch<T>((void *)dest, value, pe, NVSHMEMI_AMO_SIGNAL);
+    }
+}
+#endif /* __CUDA_ARCH__ */
+
+#endif /* NVSHMEMI_DEVICE_COLL_UTILS_H */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/common/nvshmemi_common_device.cuh

@@ -0,0 +1,1037 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+#ifndef _NVSHMEM_COMMON_DEVICE_CUH_
+#define _NVSHMEM_COMMON_DEVICE_CUH_
+
+#include <cuda_runtime.h>
+#if !defined __CUDACC_RTC__
+#include <stdint.h>
+#include <stddef.h>
+#include <type_traits>
+#else
+#include <cuda/std/cstdint>
+#include <cuda/std/cstddef>
+#include <cuda/std/type_traits>
+#endif
+#include "non_abi/nvshmem_build_options.h"
+#include "device_host/nvshmem_common.cuh"
+#include "device_host_transport/nvshmem_common_transport.h"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#if defined(NVSHMEM_ENABLE_ALL_DEVICE_INLINING) || defined(__NVSHMEM_NUMBA_SUPPORT__)
+#include "non_abi/device/pt-to-pt/transfer_device.cuh"
+#else
+#include "non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh"
+#endif
+#include "non_abi/device/pt-to-pt/proxy_device.cuh"
+#include "non_abi/device/team/nvshmemi_team_defines.cuh"
+
+#define _LL_MAX_UNROLL 4
+
+#define _LL_128_FLAG_THREAD 8
+#define _LL_128_FLAG_SIZE 8
+#define _LL_128_STORE_SIZE 16
+#define _LL_128_PACKETS_PER_WARP 4
+#define _LL_128_PACKET_DATA_SIZE 120
+#define _LL_128_PACKET_PSYNC_SIZE 128
+#define _LL_128_NUM_DATA_ELEMS_PER_PACKET(T) (_LL_128_PACKET_DATA_SIZE / sizeof(T))
+#define _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(T) (_LL_128_PACKET_PSYNC_SIZE / sizeof(T))
+#define _LL_128_NUM_ELEMS_PER_STORE(T) (_LL_128_STORE_SIZE / sizeof(T))
+#define _LL_128_NUM_ELEMS_PER_FLAG(T) (_LL_128_FLAG_SIZE / sizeof(T))
+#define _LL_128_NUM_DATA_ELEMS_PER_WARP(UNROLL, T) \
+    (UNROLL * _LL_128_PACKETS_PER_WARP * _LL_128_NUM_DATA_ELEMS_PER_PACKET(T))
+#define _LL_128_NUM_PSYNC_ELEMS_PER_WARP(UNROLL, T) \
+    (UNROLL * _LL_128_PACKETS_PER_WARP * _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(T))
+
+#define _LL_8_DATA_BYTES_PER_WARP 256
+#define _LL_8_PSYNC_BYTES_PER_WARP 512
+#define _LL_128_DATA_BYTES_PER_WARP 480
+#define _LL_128_PSYNC_BYTES_PER_WARP 512
+
+typedef enum { _LL_PSYNC_NON_VOLATILE = 0, _LL_PSYNC_VOLATILE } nvshmemi_psync_volatile_t;
+
+#ifdef __CUDA_ARCH__
+
+/* This is used to create custom floating type traits such fp16, fp8, and native float types etc
+ */
+#if !defined __CUDACC_RTC__
+template <typename T>
+struct is_float : std::false_type {};
+template <>
+struct is_float<float> : std::true_type {};
+
+template <typename T>
+struct is_half : std::false_type {};
+template <>
+struct is_half<half> : std::true_type {};
+
+template <typename T>
+struct is_bfloat : std::false_type {};
+template <>
+struct is_bfloat<__nv_bfloat16> : std::true_type {};
+
+template <typename T>
+struct is_double : std::false_type {};
+template <>
+struct is_double<double> : std::true_type {};
+
+template <typename T>
+struct is_uint16 : std::false_type {};
+template <>
+struct is_uint16<uint16_t> : std::true_type {};
+
+template <typename T>
+struct is_int16 : std::false_type {};
+template <>
+struct is_int16<int16_t> : std::true_type {};
+
+#else
+
+template <typename T>
+struct is_float : cuda::std::false_type {};
+template <>
+struct is_float<float> : cuda::std::true_type {};
+
+template <typename T>
+struct is_double : cuda::std::false_type {};
+template <>
+struct is_double<double> : cuda::std::true_type {};
+
+template <typename T>
+struct is_half : cuda::std::false_type {};
+template <>
+struct is_half<half> : cuda::std::true_type {};
+
+template <typename T>
+struct is_bfloat : cuda::std::false_type {};
+template <>
+struct is_bfloat<__nv_bfloat16> : cuda::std::true_type {};
+
+template <typename T>
+struct is_uint16 : cuda::std::false_type {};
+template <>
+struct is_uint16<uint16_t> : cuda::std::true_type {};
+
+template <typename T>
+struct is_int16 : cuda::std::false_type {};
+template <>
+struct is_int16<int16_t> : cuda::std::true_type {};
+
+#endif
+
+__device__ int nvshmemi_team_translate_pe(nvshmemi_team_t *src_team, int src_pe,
+                                          nvshmemi_team_t *dest_team);
+__device__ long *nvshmemi_team_get_psync(nvshmemi_team_t *team, nvshmemi_team_op_t op);
+__device__ long *nvshmemi_team_get_sync_counter(nvshmemi_team_t *team);
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_quiet() {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    if ((nvshmemi_device_state_d.job_connectivity > NVSHMEMI_JOB_GPU_LDST)) {
+        nvshmemi_transfer_quiet<SCOPE>(true);
+    } else {
+        if (!myIdx)
+            __threadfence_system(); /* Use __threadfence_system instead of __threadfence
+                                     for data visibility in case of intra-node GPU transfers */
+        nvshmemi_threadgroup_sync<SCOPE>();
+    }
+}
+
+template __device__ void nvshmemi_quiet<NVSHMEMI_THREADGROUP_THREAD>();
+template __device__ void nvshmemi_quiet<NVSHMEMI_THREADGROUP_WARP>();
+template __device__ void nvshmemi_quiet<NVSHMEMI_THREADGROUP_BLOCK>();
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_fence() {
+    if (nvshmemi_device_state_d.job_connectivity > NVSHMEMI_JOB_GPU_LDST) {
+        nvshmemi_transfer_fence<NVSHMEMI_THREADGROUP_THREAD>();
+    }
+    __threadfence_system(); /* Use __threadfence_system instead of __threadfence
+                               for data visibility in case of intra-node GPU transfers */
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE int nvshmemi_test(volatile T *ivar, int cmp, T cmp_value) {
+    int return_value = 0;
+    if (NVSHMEM_CMP_GE == cmp) {
+        if (*ivar >= cmp_value) return_value = 1;
+    } else if (NVSHMEM_CMP_EQ == cmp) {
+        if (*ivar == cmp_value) return_value = 1;
+    } else if (NVSHMEM_CMP_NE == cmp) {
+        if (*ivar != cmp_value) return_value = 1;
+    } else if (NVSHMEM_CMP_GT == cmp) {
+        if (*ivar > cmp_value) return_value = 1;
+    } else if (NVSHMEM_CMP_LT == cmp) {
+        if (*ivar < cmp_value) return_value = 1;
+    } else if (NVSHMEM_CMP_LE == cmp) {
+        if (*ivar <= cmp_value) return_value = 1;
+    }
+    return return_value;
+}
+
+#if !defined __CUDACC_RTC__
+#define TYPE_IS_FLOAT(T) std::is_floating_point<T>::value
+#else
+#define TYPE_IS_FLOAT(T) cuda::std::is_floating_point<T>::value
+#endif
+
+// mcast store of 16B
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_mcast16_store_threadgroup(int4 *dest,
+                                                                                 const int4 *source,
+                                                                                 size_t len) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    for (size_t j = myIdx * 4; j < (len / sizeof(uint32_t)); j += groupSize * 4) {
+        uint32_t u4[4];
+        asm("ld.global.v4.b32 {%0, %1, %2, %3}, [%4]; "
+            : "=r"(u4[0]), "=r"(u4[1]), "=r"(u4[2]), "=r"(u4[3])
+            : "l"(source + j / 4));
+        asm("multimem.st.global.v4.f32 [%0], {%1, %2, %3, %4};" ::"l"(dest + j / 4), "r"(u4[0]),
+            "r"(u4[1]), "r"(u4[2]), "r"(u4[3])
+            : "memory");
+    }
+}
+
+// mcast store of 8B
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_mcast8_store_threadgroup(
+    uint64_t *dest, const uint64_t *source, size_t len) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    for (size_t j = myIdx; j < (len / sizeof(uint64_t)); j += groupSize) {
+        uint64_t val1;
+        asm("ld.global.b64 %0, [%1];" : "=l"(val1) : "l"(source + j));
+        asm("multimem.st.global.u64 [%0], %1;" ::"l"(dest + j), "l"(val1) : "memory");
+    }
+}
+
+// mcast store of 4B
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_mcast4_store_threadgroup(
+    uint32_t *dest, const uint32_t *source, size_t len) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    for (size_t j = myIdx; j < (len / sizeof(uint32_t)); j += groupSize) {
+        uint32_t val1;
+        asm("ld.global.b32 %0, [%1];" : "=r"(val1) : "l"(source + j));
+        asm("multimem.st.global.u32 [%0], %1;" ::"l"(dest + j), "r"(val1) : "memory");
+    }
+}
+
+/**
+ * This function returns non-zero unaligned bytes that require a unicast store
+ */
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE size_t
+nvshmemi_mcast_memcpy_threadgroup(T *__restrict__ dst, const T *__restrict__ src, size_t len) {
+    /*
+     * If src and dst are 16B aligned copy as much as possible using 16B chunks
+     */
+    if ((uintptr_t)dst % 16 == 0 && (uintptr_t)src % 16 == 0 && len >= 16) {
+        int4 *__restrict__ dst_p = (int4 *)dst;
+        const int4 *__restrict__ src_p = (const int4 *)src;
+        const size_t nelems = len / 16;
+        nvshmemi_mcast16_store_threadgroup<T, SCOPE>(dst_p, src_p, len);
+        len -= nelems * 16;
+
+        if (0 == len) return 0;
+        dst = (T *)(dst_p + nelems);
+        src = (T *)(src_p + nelems);
+    }
+
+    /*
+     * If src and dst are 8B aligned copy as much as possible using 8B chunks
+     */
+    if ((uintptr_t)dst % 8 == 0 && (uintptr_t)src % 8 == 0 && len >= 8) {
+        const size_t nelems = len / 8;
+        uint64_t *__restrict__ dst_p = (uint64_t *)dst;
+        const uint64_t *__restrict__ src_p = (const uint64_t *)src;
+        nvshmemi_mcast8_store_threadgroup<T, SCOPE>(dst_p, src_p, len);
+        len -= nelems * 8;
+
+        if (0 == len) return 0;
+        dst = (T *)(dst_p + nelems);
+        src = (T *)(src_p + nelems);
+    }
+
+    /*
+     * If src and dst are 4B aligned copy as much as possible using 4B chunks
+     */
+    if ((uintptr_t)dst % 4 == 0 && (uintptr_t)src % 4 == 0 && len >= 4) {
+        const size_t nelems = len / 4;
+        uint32_t *__restrict__ dst_p = (uint32_t *)dst;
+        const uint32_t *__restrict__ src_p = (const uint32_t *)src;
+        nvshmemi_mcast4_store_threadgroup<T, SCOPE>(dst_p, src_p, len);
+        len -= nelems * 4;
+
+        if (0 == len) return 0;
+        dst = (T *)(dst_p + nelems);
+        src = (T *)(src_p + nelems);
+    }
+
+    /* if len is non-zero, caller will retry with unicast stores */
+    return (len);
+}
+
+template <threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_memcpy_threadgroup(
+    void *__restrict__ dst, const void *__restrict__ src, size_t len) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    /*
+     * If src and dst are 16B aligned copy as much as possible using 16B chunks
+     */
+    if ((uintptr_t)dst % 16 == 0 && (uintptr_t)src % 16 == 0) {
+        const size_t nelems = len / 16;
+
+#ifdef __clang_llvm_bitcode_lib__
+        uint32_t *__restrict__ dst_p = (uint32_t *)dst;
+        const uint32_t *__restrict__ src_p = (const uint32_t *)src;
+        for (size_t i = myIdx * 4; i < nelems * 4; i += groupSize * 4) {
+            asm volatile("st.volatile.global.v4.u32 [%0], {%1,%2,%3,%4};" ::"l"((dst_p + i)),
+                         "r"(*(src_p + i)), "r"(*(src_p + i + 1)), "r"(*(src_p + i + 2)),
+                         "r"(*(src_p + i + 3)));
+        }
+#else
+        int4 *__restrict__ dst_p = (int4 *)dst;
+        const int4 *__restrict__ src_p = (const int4 *)src;
+        for (size_t i = myIdx; i < nelems; i += groupSize) dst_p[i] = src_p[i];
+#endif
+        len -= nelems * 16;
+
+        if (0 == len) return;
+
+#ifdef __clang_llvm_bitcode_lib__
+        dst = (void *)(dst_p + nelems * 4);
+        src = (void *)(src_p + nelems * 4);
+#else
+        dst = (void *)(dst_p + nelems);
+        src = (void *)(src_p + nelems);
+#endif
+    }
+
+    /*
+     * If src and dst are 8B aligned copy as much as possible using 8B chunks
+     */
+    if ((uintptr_t)dst % 8 == 0 && (uintptr_t)src % 8 == 0) {
+        uint64_t *__restrict__ dst_p = (uint64_t *)dst;
+        const uint64_t *__restrict__ src_p = (const uint64_t *)src;
+        const size_t nelems = len / 8;
+
+        for (size_t i = myIdx; i < nelems; i += groupSize) dst_p[i] = src_p[i];
+
+        len -= nelems * 8;
+
+        if (0 == len) return;
+
+        dst = (void *)(dst_p + nelems);
+        src = (void *)(src_p + nelems);
+    }
+
+    /*
+     * If src and dst are 4B aligned copy as much as possible using 4B chunks
+     */
+    if ((uintptr_t)dst % 4 == 0 && (uintptr_t)src % 4 == 0) {
+        uint32_t *__restrict__ dst_p = (uint32_t *)dst;
+        const uint32_t *__restrict__ src_p = (const uint32_t *)src;
+        const size_t nelems = len / 4;
+
+        for (size_t i = myIdx; i < nelems; i += groupSize) dst_p[i] = src_p[i];
+
+        len -= nelems * 4;
+
+        if (0 == len) return;
+
+        dst = (void *)(dst_p + nelems);
+        src = (void *)(src_p + nelems);
+    }
+
+    /*
+     * If src and dst are 2B aligned copy as much as possible using 2B chunks
+     */
+    if ((uintptr_t)dst % 2 == 0 && (uintptr_t)src % 2 == 0) {
+        uint16_t *__restrict__ dst_p = (uint16_t *)dst;
+        const uint16_t *__restrict__ src_p = (const uint16_t *)src;
+        const size_t nelems = len / 2;
+
+        for (size_t i = myIdx; i < nelems; i += groupSize) dst_p[i] = src_p[i];
+
+        len -= nelems * 2;
+
+        if (0 == len) return;
+
+        dst = (void *)(dst_p + nelems);
+        src = (void *)(src_p + nelems);
+    }
+
+    unsigned char *__restrict__ dst_c = (unsigned char *)dst;
+    const unsigned char *__restrict__ src_c = (const unsigned char *)src;
+
+    for (size_t i = myIdx; i < len; i += groupSize) dst_c[i] = src_c[i];
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_p(T *dest, const T value, int pe) {
+    const void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        T *dest_actual = (T *)((char *)(peer_base_addr) +
+                               ((char *)dest - (char *)(nvshmemi_device_state_d.heap_base)));
+        *dest_actual = value;
+    } else {
+        nvshmemi_transfer_rma_p<T>((void *)dest, value, pe);
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE T nvshmemi_g(const T *source, int pe) {
+    const void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        T *source_actual = (T *)((char *)(peer_base_addr) +
+                                 ((char *)source - (char *)(nvshmemi_device_state_d.heap_base)));
+        return *source_actual;
+    } else {
+        return nvshmemi_transfer_rma_g<T>((void *)source, pe);
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_put_threadgroup(T *dest, const T *source,
+                                                                       size_t nelems, int pe) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        char *dest_actual =
+            (char *)(peer_base_addr) + ((char *)dest - (char *)(nvshmemi_device_state_d.heap_base));
+        nvshmemi_memcpy_threadgroup<SCOPE>((void *)dest_actual, (const void *)source,
+                                           nelems * sizeof(T));
+    } else {
+        nvshmemi_transfer_rma<SCOPE, NVSHMEMI_OP_PUT>((void *)dest, (void *)source,
+                                                      nelems * sizeof(T), pe);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_signal_op(uint64_t *sig_addr,
+                                                                 uint64_t signal, int sig_op,
+                                                                 int pe) {
+    const void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (sig_op == NVSHMEMI_AMO_SIGNAL_SET && peer_base_addr != NULL) {
+        volatile uint64_t *dest_actual =
+            (volatile uint64_t *)((char *)(peer_base_addr) +
+                                  ((char *)sig_addr - (char *)(nvshmemi_device_state_d.heap_base)));
+        *dest_actual = signal;
+    } else if (nvshmemi_device_state_d.job_connectivity <= NVSHMEMI_JOB_GPU_LDST) {
+        volatile uint64_t *dest_actual =
+            (volatile uint64_t *)((char *)(peer_base_addr) +
+                                  ((char *)sig_addr - (char *)(nvshmemi_device_state_d.heap_base)));
+        /* sig_op == NVSHMEM_SIGNAL_ADD */
+        atomicAdd_system((unsigned long long *)dest_actual, signal);
+    } else {
+        nvshmemi_transfer_amo_nonfetch<uint64_t>((void *)sig_addr, signal, pe,
+                                                 (nvshmemi_amo_t)sig_op);
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemii_put_signal_threadgroup(
+    T *dest, const T *source, size_t nelems, uint64_t *sig_addr, uint64_t signal, int sig_op,
+    int pe, bool is_nbi) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        char *dest_actual =
+            (char *)(peer_base_addr) + ((char *)dest - (char *)(nvshmemi_device_state_d.heap_base));
+        nvshmemi_memcpy_threadgroup<SCOPE>((void *)dest_actual, (const void *)source,
+                                           nelems * sizeof(T));
+        nvshmemi_threadgroup_sync<SCOPE>();
+        if (!myIdx) {
+            __threadfence_system();
+            nvshmemi_signal_op(sig_addr, signal, sig_op, pe);
+        }
+    } else {
+        nvshmemi_transfer_put_signal<SCOPE>((void *)dest, (void *)source, nelems * sizeof(T),
+                                            (void *)sig_addr, signal, (nvshmemi_amo_t)sig_op, pe,
+                                            is_nbi);
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_put_signal_threadgroup(
+    T *dest, const T *source, size_t nelems, uint64_t *sig_addr, uint64_t signal, int sig_op,
+    int pe, bool is_nbi) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    nvshmemii_put_signal_threadgroup<T, SCOPE>(dest, source, nelems, sig_addr, signal, sig_op, pe,
+                                               is_nbi);
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_get_threadgroup(T *dest, const T *source,
+                                                                       size_t nelems, int pe) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        char *source_actual = (char *)(peer_base_addr) +
+                              ((char *)source - (char *)(nvshmemi_device_state_d.heap_base));
+        nvshmemi_memcpy_threadgroup<SCOPE>((void *)dest, (const void *)source_actual,
+                                           nelems * sizeof(T));
+    } else {
+        nvshmemi_transfer_rma<SCOPE, NVSHMEMI_OP_GET>((void *)source, (void *)dest,
+                                                      nelems * sizeof(T), pe);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemii_put_nbi_threadgroup(T *dest,
+                                                                            const T *source,
+                                                                            size_t nelems, int pe) {
+    void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        char *dest_actual =
+            (char *)(peer_base_addr) + ((char *)dest - (char *)(nvshmemi_device_state_d.heap_base));
+        nvshmemi_memcpy_threadgroup<SCOPE>((void *)dest_actual, (const void *)source,
+                                           nelems * sizeof(T));
+    } else {
+        nvshmemi_transfer_rma_nbi<SCOPE, NVSHMEMI_OP_PUT>((void *)dest, (void *)source,
+                                                          nelems * sizeof(T), pe);
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_put_nbi_threadgroup(T *dest, const T *source,
+                                                                           size_t nelems, int pe) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    nvshmemii_put_nbi_threadgroup<T, SCOPE>(dest, source, nelems, pe);
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_get_nbi_threadgroup(T *dest, const T *source,
+                                                                           size_t nelems, int pe) {
+    nvshmemi_threadgroup_sync<SCOPE>();
+    void *peer_base_addr =
+        (void *)__ldg((const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+    if (peer_base_addr) {
+        char *source_actual = (char *)(peer_base_addr) +
+                              ((char *)source - (char *)(nvshmemi_device_state_d.heap_base));
+        nvshmemi_memcpy_threadgroup<SCOPE>((void *)dest, (const void *)source_actual,
+                                           nelems * sizeof(T));
+    } else {
+        nvshmemi_transfer_rma_nbi<SCOPE, NVSHMEMI_OP_GET>((void *)source, (void *)dest,
+                                                          nelems * sizeof(T), pe);
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void *nvshmemi_mc_ptr(nvshmemi_team_t *team,
+                                                               const void *ptr) {
+    ptrdiff_t offset = (char *)ptr - (char *)nvshmemi_device_state_d.heap_base;
+    if (ptr >= nvshmemi_device_state_d.heap_base && offset < nvshmemi_device_state_d.heap_size &&
+        team->nvls_rsc_base_ptr != NULL) {
+        void *mc_addr = (void *)__ldg((const long long unsigned *)team->nvls_rsc_base_ptr);
+        if (mc_addr != NULL) mc_addr = (void *)((char *)mc_addr + offset);
+        return mc_addr;
+    } else
+        return NULL;
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void *nvshmemi_ptr(const void *ptr, int pe) {
+    ptrdiff_t offset = (char *)ptr - (char *)nvshmemi_device_state_d.heap_base;
+
+    if (ptr >= nvshmemi_device_state_d.heap_base && offset < nvshmemi_device_state_d.heap_size) {
+        void *peer_addr = (void *)__ldg(
+            (const long long unsigned *)nvshmemi_device_state_d.peer_heap_base_p2p + pe);
+        if (peer_addr != NULL) peer_addr = (void *)((char *)peer_addr + offset);
+        return peer_addr;
+    } else
+        return NULL;
+}
+
+template <typename T, int UNROLL>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_store_128b_register(
+    uint64_t dest_regs[2 * UNROLL], uint64_t ll_flag, uint64_t ll_flag_mask, T *src,
+    uint8_t unroll_stride) {
+    union {
+        uint64_t regs8[2];
+        uint32_t regs4[4];
+    };
+    int myIdx = nvshmemi_thread_id_in_threadgroup<NVSHMEMI_THREADGROUP_WARP>();
+
+    /* in both 16 and 8 byte cases, the flag thread needs to write two 8 byte chunks. */
+
+#pragma unroll
+    for (int unroll = 0; unroll < UNROLL; unroll++) {
+        if (sizeof(T) >= 8) {
+            uint64_t *src8 = (uint64_t *)(src + unroll * unroll_stride);
+            asm("ld.b64 %0, [%1];" : "=l"(regs8[0]) : "l"(src8));
+            asm("ld.b64 %0, [%1];" : "=l"(regs8[1]) : "l"(src8 + 1));
+        } else if (sizeof(T) == 4) {
+            uint32_t *src4 = (uint32_t *)(src + unroll * unroll_stride);
+            asm("ld.b32 %0, [%1];" : "=r"(regs4[0]) : "l"(src4));
+            asm("ld.b32 %0, [%1];" : "=r"(regs4[1]) : "l"(src4 + 1));
+            asm("ld.b32 %0, [%1];" : "=r"(regs4[2]) : "l"(src4 + 2));
+            asm("ld.b32 %0, [%1];" : "=r"(regs4[3]) : "l"(src4 + 3));
+        } else {
+            uint32_t lower, upper;
+            /* funnelshift_r will use shift to select the
+             * proper four bytes depending on the alignment.
+             * 0x10 = 2, 0x11 = 3, 0x01 = 1
+             */
+            uint8_t shift = (uintptr_t)src % 4;
+            /* We need to align the buffer to the nearest 4 bytes
+             * Shift down 2 bytes in the case of 2B alignment down
+             * 1B in the case of 1B alignment. Shifting down is always
+             * appropriate due to 256 B alignment of cudaMalloc().
+             */
+            uint32_t *src4 =
+                (uint32_t *)((uintptr_t)(src + unroll * unroll_stride) & -(uintptr_t)4);
+            /* 2 Byte aligned - 2B in lower, 2B in upper */
+            /* 1 Byte aligned (0x01) - 1B in upper, 3B in lower */
+            /* 1 Byte aligned (0x11) - 3B in upper, 1B in lower */
+            asm("ld.b32 %0, [%1];" : "=r"(lower) : "l"(src4));
+            asm("ld.b32 %0, [%1];" : "=r"(upper) : "l"(src4 + 1));
+            regs4[0] = __funnelshift_r(lower, upper, 8 * shift);
+            asm("ld.b32 %0, [%1];" : "=r"(lower) : "l"(src4 + 1));
+            asm("ld.b32 %0, [%1];" : "=r"(upper) : "l"(src4 + 2));
+            regs4[1] = __funnelshift_r(lower, upper, 8 * shift);
+            asm("ld.b32 %0, [%1];" : "=r"(lower) : "l"(src4 + 2));
+            asm("ld.b32 %0, [%1];" : "=r"(upper) : "l"(src4 + 3));
+            regs4[2] = __funnelshift_r(lower, upper, 8 * shift);
+            asm("ld.b32 %0, [%1];" : "=r"(lower) : "l"(src4 + 4));
+            asm("ld.b32 %0, [%1];" : "=r"(upper) : "l"(src4 + 5));
+            regs4[3] = __funnelshift_r(lower, upper, 8 * shift);
+        }
+        dest_regs[unroll * 2] = regs8[0];
+        dest_regs[unroll * 2 + 1] = (regs8[1] & ll_flag) | ll_flag_mask;
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_store_varlen_register(
+    uint64_t dest_regs[2], uint64_t ll_flag, uint64_t ll_flag_mask, void *src, uint8_t nelems) {
+    uint8_t i;
+    union {
+        uint64_t regs8[2];
+        uint32_t regs4[4];
+    };
+
+    /* in both 16 and 8 byte cases, the flag thread needs to write two 8 byte chunks. */
+    if (sizeof(T) >= 8) {
+        uint64_t *src8 = (uint64_t *)src;
+        for (i = 0; i < nelems; i++) {
+            asm("ld.b64 %0, [%1];" : "=l"(regs8[i]) : "l"(src8 + i));
+        }
+    } else if (sizeof(T) == 4) {
+        uint32_t *src4 = (uint32_t *)src;
+        for (i = 0; i < nelems; i++) {
+            asm("ld.b32 %0, [%1];" : "=r"(regs4[i]) : "l"(src4 + i));
+        }
+    } else {
+        uint32_t lower, upper;
+        /* funnelshift_r will use shift to select the
+         * proper four bytes depending on the alignment.
+         * 0x10 = 2, 0x11 = 3, 0x01 = 1
+         */
+        uint8_t shift = (uintptr_t)src % 4;
+        /* We need to align the buffer to the nearest 4 bytes
+         * Shift down 2 bytes in the case of 2B alignment down
+         * 1B in the case of 1B alignment. Shifting down is always
+         * appropriate due to 256 B alignment of cudaMalloc().
+         */
+        uint32_t *src4 = (uint32_t *)((uintptr_t)src & -(uintptr_t)4);
+        /* 2 Byte aligned - 2B in lower, 2B in upper */
+        /* 1 Byte aligned (0x01) - 1B in upper, 3B in lower */
+        /* 1 Byte aligned (0x11) - 3B in upper, 1B in lower */
+        for (i = 0; i < nelems; i++) {
+            asm("ld.b32 %0, [%1];" : "=r"(lower) : "l"(src4 + i));
+            asm("ld.b32 %0, [%1];" : "=r"(upper) : "l"(src4 + i + 1));
+            regs4[i] = __funnelshift_r(lower, upper, 8 * shift);
+        }
+    }
+
+    dest_regs[0] = regs8[0];
+    dest_regs[1] = (regs8[1] & ll_flag) | ll_flag_mask;
+}
+
+template <typename T, threadgroup_t SCOPE, int UNROLL>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_packLL128(T *psync, const T *source,
+                                                                 size_t nelems, uint64_t ll_flag,
+                                                                 nvshmemi_team_t *teami,
+                                                                 int pe_count, int team_offset,
+                                                                 int pe_group_offset) {
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const uint32_t warp_mask = 0x000000FF << (8 * (myIdx / 8));
+    const int num_warps = nvshmemi_threadgroup_size<SCOPE>() / NVSHMEMI_WARP_SIZE;
+    /* max 127 */
+    const uint8_t remain = nelems % _LL_128_NUM_DATA_ELEMS_PER_PACKET(T);
+    /* max ~ 2048 * 16 * 4*/
+    const uint32_t source_offset =
+        (myIdx / _LL_128_FLAG_THREAD) * UNROLL * _LL_128_NUM_DATA_ELEMS_PER_PACKET(T) +
+        myIdx % _LL_128_FLAG_THREAD * _LL_128_NUM_ELEMS_PER_STORE(T);
+    const uint32_t psync_offset =
+        (myIdx / _LL_128_FLAG_THREAD) * UNROLL * _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(T) +
+        myIdx % _LL_128_FLAG_THREAD * _LL_128_NUM_ELEMS_PER_STORE(T);
+    const uint32_t source_stride = num_warps * _LL_128_NUM_DATA_ELEMS_PER_WARP(UNROLL, T);
+    const uint32_t psync_stride = num_warps * _LL_128_NUM_PSYNC_ELEMS_PER_WARP(UNROLL, T);
+    int current_global_pe_index;
+    const bool is_flag_thread = !((myIdx + 1) % _LL_128_FLAG_THREAD);
+
+    /* We will always have a SCOPES worth of elements when doing unrolling */
+    if (UNROLL > 1) {
+        assert(remain == 0);
+        assert(nelems % _LL_128_NUM_DATA_ELEMS_PER_WARP(UNROLL, T) == 0);
+    }
+
+    /* Both source_end and psync_end remove the last < 128 bytes.
+     * These will be handled after the loop. */
+    T *source_end = (T *)(source + nelems - remain);
+
+    uint64_t regs[2 * UNROLL];
+    T *source_ptr;
+    T *psync_ptr;
+    T *remote_psync_ptr;
+    uint64_t ll_flag_mask;
+
+    assert(nvshmemi_threadgroup_size<SCOPE>() % NVSHMEMI_WARP_SIZE == 0);
+    assert((uintptr_t)psync % 16 == 0);
+    assert(sizeof(T) <= 8);
+
+    if (!is_flag_thread) {
+        ll_flag = UINT64_MAX;
+        ll_flag_mask = 0x0ULL;
+    } else {
+        ll_flag_mask = ll_flag;
+    }
+    __syncwarp();
+
+    /* Initial offset by thread */
+    source_ptr = (T *)source + source_offset;
+    psync_ptr = (T *)psync + psync_offset;
+
+    /* Only gate on source_end. psync_end is not important here. */
+    for (; source_ptr < source_end; source_ptr += source_stride, psync_ptr += psync_stride) {
+        nvshmemi_store_128b_register<T, UNROLL>(regs, ll_flag, ll_flag_mask, source_ptr,
+                                                _LL_128_NUM_DATA_ELEMS_PER_PACKET(T));
+
+        /* definitely possible we are not synchronized before loads to psync. Significant perf
+         * overhead? */
+        for (int pe = 0; pe < pe_count; pe++) {
+            current_global_pe_index = nvshmemi_team_translate_pe_to_team_world_wrap(
+                teami, team_offset + (pe_group_offset + pe) % pe_count);
+            /*             if (VOLATILE && current_global_pe_index == my_pe_idx) {
+                            continue;
+                        } */
+            remote_psync_ptr = (T *)nvshmemi_ptr(psync_ptr, current_global_pe_index);
+#pragma unroll
+            for (int unroll = 0; unroll < UNROLL * 2; unroll += 2) {
+                asm volatile(
+                    "st.volatile.global.v2.b64 [%0], {%1,%2};" ::"l"((int4 *)remote_psync_ptr),
+                    "l"(regs[unroll]), "l"(regs[unroll + 1]));
+                remote_psync_ptr += _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(T);
+            }
+        }
+    }
+
+    if (UNROLL == 1 && remain) {
+        uint8_t num_elems_per_store;
+        T *psync_end =
+            psync + (nelems - remain) +
+            (nelems / _LL_128_NUM_DATA_ELEMS_PER_PACKET(T)) * _LL_128_NUM_ELEMS_PER_FLAG(T);
+        /* Last packet will contain < 128 bytes. the variable remain is usually > 0. */
+        /* only need 1/4th of a warp */
+        if (myIdx < 8) {
+            source_ptr = source_end + source_offset;
+            psync_ptr = psync_end + psync_offset;
+            if (source_offset + _LL_128_NUM_ELEMS_PER_STORE(T) <= remain) {
+                nvshmemi_store_128b_register<T, 1>(regs, UINT64_MAX, ll_flag_mask, source_ptr,
+                                                   _LL_128_NUM_DATA_ELEMS_PER_PACKET(T));
+            } else {
+                num_elems_per_store = source_offset > remain ? 0 : remain - source_offset;
+                nvshmemi_store_varlen_register<T>(regs, ll_flag, ll_flag_mask, source_ptr,
+                                                  num_elems_per_store);
+            }
+            __syncwarp(warp_mask);
+            for (int pe = 0; pe < pe_count; pe++) {
+                current_global_pe_index = nvshmemi_team_translate_pe_to_team_world_wrap(
+                    teami, team_offset + (pe_group_offset + pe) % pe_count);
+                /*                 if (VOLATILE && current_global_pe_index == my_pe_idx) {
+                                    continue;
+                                } */
+                remote_psync_ptr = (T *)nvshmemi_ptr(psync_ptr, current_global_pe_index);
+                asm volatile(
+                    "st.volatile.global.v2.b64 [%0], {%1,%2};" ::"l"((int4 *)remote_psync_ptr),
+                    "l"(regs[0]), "l"(regs[1]));
+            }
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+template <int UNROLL>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_ll128_load_psync(uint64_t reg[UNROLL * 2],
+                                                                        uint64_t *src,
+                                                                        uint64_t ll_flag,
+                                                                        uint32_t warp_mask,
+                                                                        bool is_flag_thread) {
+    uint64_t *offset_src;
+    int i;
+    bool flag_arrived;
+    do {
+        flag_arrived = true;
+#pragma unroll
+        for (i = 0; i < UNROLL * 2; i += 2) {
+            offset_src = src + _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(uint64_t) * (i / 2);
+            asm volatile("ld.volatile.global.v2.b64 {%0,%1}, [%2];"
+                         : "=l"(reg[i]), "=l"(reg[i + 1])
+                         : "l"((int4 *)offset_src));
+            flag_arrived &= (reg[i + 1] == ll_flag);
+            flag_arrived |= !is_flag_thread;
+        }
+        flag_arrived = __all_sync(warp_mask, flag_arrived != false);
+    } while (!flag_arrived);
+}
+
+template <typename T, int UNROLL>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_recvLL128(T *dest, const T *psync,
+                                                                 size_t nelems, uint64_t flag) {
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<NVSHMEMI_THREADGROUP_WARP>();
+    const uint32_t warp_mask = 0x000000FF << (8 * (myIdx / 8));
+    /* max 127 */
+    const uint8_t remain = nelems % _LL_128_NUM_DATA_ELEMS_PER_PACKET(T);
+    /* max ~ 2048 * 16 * 4*/
+    const uint32_t dest_offset =
+        (myIdx / _LL_128_FLAG_THREAD) * UNROLL * _LL_128_NUM_DATA_ELEMS_PER_PACKET(T) +
+        myIdx % _LL_128_FLAG_THREAD * _LL_128_NUM_ELEMS_PER_STORE(T);
+    const uint32_t psync_offset =
+        (myIdx / _LL_128_FLAG_THREAD) * UNROLL * _LL_128_NUM_PSYNC_ELEMS_PER_PACKET(T) +
+        myIdx % _LL_128_FLAG_THREAD * _LL_128_NUM_ELEMS_PER_STORE(T);
+    const bool is_flag_thread = !((myIdx + 1) % _LL_128_FLAG_THREAD);
+    uint8_t source_copy_len = 16 >> is_flag_thread;
+
+    /* We will always have a SCOPES worth of elements when doing unrolling */
+    if (UNROLL > 1) {
+        assert(remain == 0);
+        assert(nelems % _LL_128_NUM_DATA_ELEMS_PER_WARP(UNROLL, T) == 0);
+    }
+
+    /* Both dest_end and psync_end remove the last < 128 bytes.
+     * These will be handled after the loop. */
+    T *dest_end = (T *)(dest + nelems - remain);
+
+    uint64_t regs[2 * UNROLL];
+    T *dest_ptr;
+    T *cur_dest_ptr;
+    T *psync_ptr;
+
+    assert((uintptr_t)psync % 16 == 0);
+    assert(sizeof(T) <= 8);
+
+    /* Initial offset by thread */
+    dest_ptr = (T *)dest + dest_offset;
+    psync_ptr = (T *)psync + psync_offset;
+    for (; dest_ptr < dest_end; dest_ptr += _LL_128_NUM_DATA_ELEMS_PER_WARP(UNROLL, T),
+                                psync_ptr += _LL_128_NUM_PSYNC_ELEMS_PER_WARP(UNROLL, T)) {
+        if (UNROLL > 1) {
+            nvshmemi_ll128_load_psync<UNROLL>(regs, (uint64_t *)psync_ptr, flag, 0xFFFFFFFF,
+                                              is_flag_thread);
+        } else {
+            nvshmemi_ll128_load_psync<UNROLL>(regs, (uint64_t *)psync_ptr, flag, warp_mask,
+                                              is_flag_thread);
+        }
+
+        cur_dest_ptr = dest_ptr;
+#pragma unroll
+        for (int i = 0; i < UNROLL * 2; i += 2) {
+            asm("st.global.b64 [%0], %1;" ::"l"((uint64_t *)cur_dest_ptr), "l"(regs[i]));
+            if (!is_flag_thread) {
+                asm("st.global.b64 [%0], %1;" ::"l"((uint64_t *)cur_dest_ptr + 1),
+                    "l"(regs[i + 1]));
+            }
+            if (UNROLL > 1) {
+                __syncwarp();
+            } else {
+                __syncwarp(warp_mask);
+            }
+            cur_dest_ptr += _LL_128_NUM_DATA_ELEMS_PER_PACKET(T);
+        }
+    }
+
+    if (UNROLL == 1 && remain) {
+        T *psync_end =
+            (T *)psync + (nelems - remain) +
+            (nelems / _LL_128_NUM_DATA_ELEMS_PER_PACKET(T)) * _LL_128_NUM_ELEMS_PER_FLAG(T);
+        if (remain && myIdx < 8) {
+            dest_ptr = dest_end + dest_offset;
+            psync_ptr = psync_end + psync_offset;
+            nvshmemi_ll128_load_psync<1>(regs, (uint64_t *)psync_ptr, flag, warp_mask,
+                                         is_flag_thread);
+            if (dest_offset < remain) {
+                source_copy_len = dest_offset + _LL_128_NUM_ELEMS_PER_STORE(T) < remain
+                                      ? _LL_128_STORE_SIZE
+                                      : ((remain - dest_offset) * sizeof(T));
+                nvshmemi_memcpy_threadgroup<NVSHMEMI_THREADGROUP_THREAD>(dest_ptr, regs,
+                                                                         source_copy_len);
+            }
+        }
+    }
+    __syncwarp();
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_mcast_recvLL(T *dest, const uint64_t *src,
+                                                                    size_t nelems, uint32_t flag) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    size_t num_subelems = (nelems * sizeof(T)) / sizeof(uint32_t);
+    if (TYPE_IS_FLOAT(T)) {
+        for (int i = myIdx; i < num_subelems; i += groupSize) {
+            float data1, flag1;
+            volatile uint32_t flagu32;
+            do {
+                asm volatile("ld.volatile.global.v2.f32 {%0, %1}, [%2];"
+                             : "=f"(data1), "=f"(flag1)
+                             : "l"(&src[i]));
+                asm("cvt.rni.u32.f32 %0, %1;" : "=r"(flagu32) : "f"(flag1));
+            } while ((flagu32 != flag));
+            *(float *)((char *)dest + i * sizeof(float)) = data1;
+        }
+    } else {
+        for (int i = 2 * myIdx; i < num_subelems; i += 2 * groupSize) {
+            uint32_t flag1, flag2, data1, data2;
+            do {
+                asm volatile("ld.volatile.global.v4.u32 {%0,%1,%2,%3}, [%4];"
+                             : "=r"(data1), "=r"(flag1), "=r"(data2), "=r"(flag2)
+                             : "l"(&src[i]));
+            } while ((flag1 != flag) || (flag2 != flag));
+            *(uint32_t *)((char *)dest + i * sizeof(uint32_t)) = data1;
+            *(uint32_t *)((char *)dest + (i + 1) * sizeof(uint32_t)) = data2;
+        }
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_mcast_packLL(uint64_t *dest, const T *source,
+                                                                    size_t nelems,
+                                                                    uint32_t ll_flag) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    const size_t num_subelems = (nelems * sizeof(T)) / sizeof(float);
+    float flagf32;
+    if (TYPE_IS_FLOAT(T)) asm("cvt.rn.f32.u32 %0, %1;" : "=f"(flagf32) : "r"(ll_flag));
+    for (int i = 2 * myIdx; i < num_subelems; i += 2 * groupSize) {
+        if (TYPE_IS_FLOAT(T)) {
+            float val1 = *(float *)((char *)source + i * sizeof(float));
+            float val2 = *(float *)((char *)source + (i + 1) * sizeof(float));
+            asm("multimem.st.global.v4.f32 [%0], {%1, %2, %3, %4};" ::"l"(&dest[i]), "f"(val1),
+                "f"(flagf32), "f"(val2), "f"(flagf32)
+                : "memory");
+        } else {
+            uint32_t val1 = *(uint32_t *)((char *)source + i * sizeof(uint32_t));
+            uint32_t val2 = *(uint32_t *)((char *)source + (i + 1) * sizeof(uint32_t));
+            asm("multimem.st.global.v4.f32 [%0], {%1, %2, %3, %4};" ::"l"(&dest[i]), "r"(val1),
+                "r"(ll_flag), "r"(val2), "r"(ll_flag)
+                : "memory");
+        }
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_recvLL(T *dest, const uint64_t *src,
+                                                              size_t nelems, uint32_t flag) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    size_t num_subelems = (nelems * sizeof(T)) / sizeof(uint32_t);
+    for (int i = 2 * myIdx; i < num_subelems; i += 2 * groupSize) {
+        uint32_t flag1, flag2, data1, data2;
+        do {
+            asm volatile("ld.volatile.global.v4.u32 {%0,%1,%2,%3}, [%4];"
+                         : "=r"(data1), "=r"(flag1), "=r"(data2), "=r"(flag2)
+                         : "l"(&src[i]));
+
+        } while ((flag1 != flag) || (flag2 != flag));
+        *(uint32_t *)((char *)dest + i * sizeof(uint32_t)) = data1;
+        *(uint32_t *)((char *)dest + (i + 1) * sizeof(uint32_t)) = data2;
+    }
+}
+
+template <typename T, threadgroup_t SCOPE>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_packLL_naive(uint64_t *dest, const T *source,
+                                                                    size_t nelems,
+                                                                    uint32_t ll_flag) {
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    size_t num_subelems = (nelems * sizeof(T)) / sizeof(uint32_t);
+    for (int i = myIdx * 2; i < num_subelems; i += groupSize * 2) {
+        size_t dst_offset = 2 * i * sizeof(uint32_t);
+        size_t src_offset = i * sizeof(uint32_t);
+        asm volatile("st.volatile.global.v4.u32 [%0], {%1,%2,%3,%4};" ::"l"(
+                         (uint32_t *)((char *)dest + dst_offset)),
+                     "r"(*(uint32_t *)((char *)source + src_offset)), "r"(ll_flag),
+                     "r"(*(uint32_t *)((char *)source + src_offset + sizeof(uint32_t))),
+                     "r"(ll_flag));
+    }
+}
+
+template <typename T, threadgroup_t SCOPE, int UNROLL>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_packLL(T *psync, const T *source,
+                                                              size_t nelems, uint32_t ll_flag,
+                                                              nvshmemi_team_t *teami, int pe_count,
+                                                              int team_offset) {
+    const size_t num_subelems = (nelems * sizeof(T)) / sizeof(uint32_t);
+    const int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+    const int groupSize = nvshmemi_threadgroup_size<SCOPE>();
+    /* each thread will write 2 subelements (8 bytes) */
+    const size_t element_start = myIdx * UNROLL * 2;
+    const size_t element_stride = groupSize * UNROLL * 2;
+    size_t element_offset;
+    uint32_t regs[2 * UNROLL];
+
+    int current_global_pe_index;
+    uint32_t *current_dest_address;
+
+    /* We need to be sure to fill each unrolled loop */
+    assert(num_subelems % UNROLL * 2 == 0);
+    assert((uintptr_t)psync % 16 == 0);
+
+    for (element_offset = element_start; element_offset < num_subelems;
+         element_offset += element_stride) {
+#pragma unroll
+        for (int unroll = 0; unroll < UNROLL * 2; unroll += 2) {
+            if (sizeof(T) == sizeof(uint64_t)) {
+                asm("ld.global.v2.u32 {%0,%1}, [%2];"
+                    : "=r"(regs[unroll]), "=r"(regs[unroll + 1])
+                    : "l"((uint32_t *)source + element_offset + unroll));
+            } else {
+                regs[unroll] = *((uint32_t *)source + element_offset + unroll);
+                regs[unroll + 1] = *((uint32_t *)source + element_offset + unroll + 1);
+            }
+        }
+        for (int pe = 0; pe < pe_count; pe++) {
+            current_global_pe_index =
+                nvshmemi_team_translate_pe_to_team_world_wrap(teami, team_offset + pe);
+            current_dest_address =
+                (uint32_t *)nvshmemi_ptr(psync, current_global_pe_index) + element_offset * 2;
+
+#pragma unroll
+            for (int unroll = 0; unroll < UNROLL * 2; unroll += 2) {
+                asm volatile("st.volatile.global.v4.u32 [%0], {%1,%2,%3,%4};" ::"l"(
+                                 (int4 *)current_dest_address),
+                             "r"(regs[unroll]), "r"(ll_flag), "r"(regs[unroll + 1]), "r"(ll_flag));
+                current_dest_address += sizeof(int4) / sizeof(uint32_t);
+            }
+        }
+    }
+}
+
+#endif /* __CUDA__ARCH__ */
+#endif /* _NVSHMEM_COMMON_DEVICE_CUH_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/common/nvshmemi_tile_utils.cuh

@@ -0,0 +1,288 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+#ifndef _NVSHMEM_TILE_UTILS_CUH_
+#define _NVSHMEM_TILE_UTILS_CUH_
+
+#include <cuda_runtime.h>
+#include "cuda/std/tuple"
+#include "cuda/std/type_traits"
+#include "cuda/std/utility"
+#include "host/nvshmem_macros.h"
+#include "device_host/nvshmem_tensor.h"
+
+using tuple5Int_t = cuda::std::tuple<int, int, int, int, int>;
+
+/**** Functions to get constant values at compile time ****/
+
+template <typename T, typename Enable = void>
+struct is_integral_constant {
+    static const bool value = false;
+};
+
+// Specialization for integral_constant types
+template <typename T>
+struct is_integral_constant<
+    T, typename cuda::std::enable_if<cuda::std::is_base_of<
+           cuda::std::integral_constant<typename T::value_type, T::value>, T>::value>::type> {
+    static const bool value = true;
+};
+
+// Check if T is an integral constant with specific value
+template <typename T, int N, typename Enable = void>
+struct is_integral_constant_value {
+    static const bool value = false;
+};
+
+template <typename T, int N>
+struct is_integral_constant_value<
+    T, N, typename cuda::std::enable_if<is_integral_constant<T>::value>::type> {
+    static const bool value = (T::value == N);
+};
+
+// Helper function to get integral constant value at compile time
+template <typename T, typename Enable = void>
+struct get_constant_value {
+    __host__ __device__ __forceinline__ static constexpr int value() { return 0; }  // default case
+};
+
+template <typename T>
+struct get_constant_value<T, typename cuda::std::enable_if<is_integral_constant<T>::value>::type> {
+    __host__ __device__ __forceinline__ static constexpr int value() { return T::value; }
+};
+
+// Convenience wrapper function
+template <typename T>
+__host__ __device__ __forceinline__ constexpr int get_constant() {
+    return get_constant_value<T>::value();
+}
+
+template <typename T>
+__host__ __device__ __forceinline__ constexpr int get_constant(T val) {
+    return get_constant_value<T>::value();
+}
+/**** End of Functions to get constant values at compile time ****/
+
+/***** Helper functions for tuples ******/
+// Traits to get tuple size at compile time
+template <typename Tuple>
+struct tuple_size_traits {
+    static constexpr size_t value = cuda::std::tuple_size<Tuple>::value;
+};
+
+// Check if index is in bounds
+template <int I, typename Tuple>
+struct is_index_in_bounds {
+    static constexpr bool value = (I >= 0 && I < tuple_size_traits<Tuple>::value);
+};
+/**** End of Helper functions for tuples ******/
+
+/*** Function to return the size of a tuple at compile time ****/
+// TODO: overload for cute::tuple
+template <typename... Args>
+NVSHMEMI_HOSTDEVICE_PREFIX constexpr size_t get_tuple_size(
+    cuda::std::tuple<Args...> const& /*tuple*/) {  // The instance isn't needed
+    return cuda::std::tuple_size<cuda::std::tuple<Args...>>::value;
+}
+
+template <int I, typename... Args>
+/*NVSHMEMI_HOSTDEVICE_PREFIX constexpr*/
+__host__ __device__ __forceinline__ constexpr decltype(
+    cuda::std::get<I>(cuda::std::declval<const cuda::std::tuple<Args...>&>()))
+get_tuple_val(cuda::std::tuple<Args...> const& tuple) {
+    return cuda::std::get<I>(tuple);
+}
+
+/*** Accessor functions for shape ***/
+/*** if index used is out of bounds, return 1 ***/
+// Primary template for shape access (out-of-bounds)
+template <int I, typename T, class Layout, bool InBounds>
+struct tensor_shape_element_impl {
+    NVSHMEMI_HOSTDEVICE_PREFIX static constexpr int get(const nvshmemx::Tensor<T, Layout>& tensor) {
+        return 1;  // Out of bounds, return 1
+    }
+};
+
+// Specialization for in-bounds shape access
+template <int I, typename T, class Layout>
+struct tensor_shape_element_impl<I, T, Layout, true> {
+    NVSHMEMI_HOSTDEVICE_PREFIX static constexpr auto get(const nvshmemx::Tensor<T, Layout>& tensor)
+        -> decltype(cuda::std::get<I>(tensor.shape())) {
+        return cuda::std::get<I>(tensor.shape());
+    }
+};
+
+// Public interface for shape
+template <int I, typename T, class Layout>
+NVSHMEMI_HOSTDEVICE_PREFIX constexpr auto get_shape_element(
+    const nvshmemx::Tensor<T, Layout>& tensor)
+    -> decltype(
+        tensor_shape_element_impl<
+            I, T, Layout, is_index_in_bounds<I, decltype(tensor.shape())>::value>::get(tensor)) {
+    return tensor_shape_element_impl<
+        I, T, Layout, is_index_in_bounds<I, decltype(tensor.shape())>::value>::get(tensor);
+}
+
+/*** Accessor functions for stride ***/
+/*** if index used is out of bounds, return 0 ***/
+
+// Primary template for stride access (out-of-bounds)
+template <int I, typename T, class Layout, bool InBounds>
+struct tensor_stride_element_impl {
+    NVSHMEMI_HOSTDEVICE_PREFIX static constexpr int get(const nvshmemx::Tensor<T, Layout>& tensor) {
+        return 0;  // Out of bounds, return 0 for stride
+    }
+};
+
+// Specialization for in-bounds stride access
+template <int I, typename T, class Layout>
+struct tensor_stride_element_impl<I, T, Layout, true> {
+    NVSHMEMI_HOSTDEVICE_PREFIX static constexpr auto get(const nvshmemx::Tensor<T, Layout>& tensor)
+        -> decltype(cuda::std::get<I>(tensor.stride())) {
+        return cuda::std::get<I>(tensor.stride());
+    }
+};
+
+// Public interface for stride
+template <int I, typename T, class Layout>
+NVSHMEMI_HOSTDEVICE_PREFIX constexpr auto get_stride_element(
+    const nvshmemx::Tensor<T, Layout>& tensor)
+    -> decltype(
+        tensor_stride_element_impl<
+            I, T, Layout, is_index_in_bounds<I, decltype(tensor.stride())>::value>::get(tensor)) {
+    return tensor_stride_element_impl<
+        I, T, Layout, is_index_in_bounds<I, decltype(tensor.stride())>::value>::get(tensor);
+}
+
+/**** Safe access functions for tuples ******/
+/*** Returns 0 for out-of-bounds access ***/
+
+// Primary template for safe tuple access (out-of-bounds)
+template <int I, typename Tuple, bool InBounds>
+struct safe_get_impl {
+    // Out of bounds access returns int
+    NVSHMEMI_HOSTDEVICE_PREFIX
+    static constexpr int get(const Tuple&) {
+        return 0;  // Default to 0 for out-of-bounds
+    }
+};
+
+// Specialization for in-bounds access
+template <int I, typename Tuple>
+struct safe_get_impl<I, Tuple, true> {
+    // Define the return type for in-bounds access
+    typedef decltype(cuda::std::get<I>(cuda::std::declval<const Tuple&>())) return_type;
+
+    NVSHMEMI_HOSTDEVICE_PREFIX
+    static constexpr return_type get(const Tuple& tuple) { return cuda::std::get<I>(tuple); }
+};
+
+// Public interface for safe tuple access
+template <int I, typename Tuple>
+NVSHMEMI_HOSTDEVICE_PREFIX constexpr
+    typename cuda::std::conditional<(I < tuple_size_traits<Tuple>::value),
+                                    decltype(cuda::std::get<I>(cuda::std::declval<const Tuple&>())),
+                                    int>::type
+    safe_get(const Tuple& tuple) {
+    return safe_get_impl<I, Tuple, (I < tuple_size_traits<Tuple>::value)>::get(tuple);
+}
+
+/**** Function to tuple of size 2 accounting for the major dimension */
+// TODO:  expand this to support more than 2 dimensions
+template <int major_dim>
+NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__ tuple5Int_t create_coord_tuple(int coord_major,
+                                                                          int coord_minor) {
+    if (major_dim == 0) {
+        return cuda::std::make_tuple(coord_major, coord_minor, 0, 0, 0);
+    } else {
+        return cuda::std::make_tuple(coord_minor, coord_major, 0, 0, 0);
+    }
+}
+
+/*
+ * Functionto compare elements of tuples
+ */
+// TODO make a cute variant of this
+// Helper to check bounds for each dimension
+// Helper to check if a dimension is valid
+template <typename tuple_t>
+NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__ bool check_dimension_valid(const tuple_t& start_coord,
+                                                                      const tuple5Int_t& elem_coord,
+                                                                      const tuple_t& boundary,
+                                                                      int dim, int major_dim,
+                                                                      int vlen) {
+    if (dim == major_dim) {
+        return (get_tuple_val<0>(start_coord) + get_tuple_val<0>(elem_coord) + (vlen - 1) <
+                get_tuple_val<0>(boundary));
+    } else {
+        return (get_tuple_val<0>(start_coord) + get_tuple_val<0>(elem_coord) <
+                get_tuple_val<0>(boundary));
+    }
+}
+
+// Primary template for dimension checking
+template <int Dim, int MaxDim, typename tuple_t, bool = (Dim < MaxDim)>
+struct dimension_checker {
+    NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__ static bool check(const tuple_t& start_coord,
+                                                                 const tuple5Int_t& elem_coord,
+                                                                 const tuple_t& boundary,
+                                                                 int major_dim, int vlen) {
+        bool current_valid;
+
+        if (Dim == major_dim) {
+            current_valid =
+                (get_tuple_val<Dim>(start_coord) + get_tuple_val<Dim>(elem_coord) + (vlen - 1) <
+                 get_tuple_val<Dim>(boundary));
+        } else {
+            current_valid = (get_tuple_val<Dim>(start_coord) + get_tuple_val<Dim>(elem_coord) <
+                             get_tuple_val<Dim>(boundary));
+        }
+
+        return current_valid && dimension_checker<Dim + 1, MaxDim, tuple_t>::check(
+                                    start_coord, elem_coord, boundary, major_dim, vlen);
+    }
+};
+
+// Base case: When Dim == MaxDim
+template <int Dim, int MaxDim, typename tuple_t>
+struct dimension_checker<Dim, MaxDim, tuple_t, false> {
+    NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__ static bool check(const tuple_t&, const tuple5Int_t&,
+                                                                 const tuple_t&, int, int) {
+        return true;  // End of recursion
+    }
+};
+
+// Special case for 1D tuples
+template <typename tuple_t, int major_dim>
+NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__
+    typename cuda::std::enable_if<(tuple_size_traits<tuple_t>::value == 1), bool>::type
+    is_less_than_impl(const tuple_t& start_coord, const tuple5Int_t& elem_coord,
+                      const tuple_t& boundary, int vlen) {
+    return check_dimension_valid(start_coord, elem_coord, boundary, 0, major_dim, vlen);
+}
+
+// Special case for 2D tuples
+template <typename tuple_t, int major_dim>
+NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__
+    typename cuda::std::enable_if<(tuple_size_traits<tuple_t>::value == 2), bool>::type
+    is_less_than_impl(const tuple_t& start_coord, const tuple5Int_t& elem_coord,
+                      const tuple_t& boundary, int vlen) {
+    return dimension_checker<0, 2, tuple_t>::check(start_coord, elem_coord, boundary, major_dim,
+                                                   vlen);
+}
+
+// Main function with runtime dispatching based on tuple size
+template <typename tuple_t, int major_dim>
+NVSHMEMI_HOSTDEVICE_PREFIX __forceinline__ bool is_less_than(const tuple_t& start_coord,
+                                                             const tuple5Int_t& elem_coord,
+                                                             const tuple_t& boundary,
+                                                             int vlen = 1) {
+    static_assert(tuple_size_traits<tuple_t>::value <= 2,
+                  "Tuples with more than 2 dimensions are not supported");
+
+    return is_less_than_impl<tuple_t, major_dim>(start_coord, elem_coord, boundary, vlen);
+}
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/pt-to-pt/nvshmemi_transfer_api.cuh

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#include <cuda_runtime.h>
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+
+#ifndef _NVSHMEMI_TRANSFER_H_
+#define _NVSHMEMI_TRANSFER_H_
+template <typename T>
+__device__ void nvshmemi_transfer_rma_p(void *rptr, const T value, int pe);
+
+template <typename T>
+__device__ T nvshmemi_transfer_rma_g(void *rptr, int pe);
+
+template <threadgroup_t SCOPE, nvshmemi_op_t channel_op>
+__device__ void nvshmemi_transfer_rma(void *rptr, void *lptr, size_t bytes, int pe);
+
+template <threadgroup_t SCOPE>
+__device__ void nvshmemi_transfer_put_signal(void *rptr, void *lptr, size_t bytes, void *sig_addr,
+                                             uint64_t signal, nvshmemi_amo_t sig_op, int pe,
+                                             bool is_nbi);
+
+template <threadgroup_t SCOPE, nvshmemi_op_t channel_op>
+__device__ void nvshmemi_transfer_rma_nbi(void *rptr, void *lptr, size_t bytes, int pe);
+
+template <typename T>
+__device__ T nvshmemi_transfer_amo_fetch(void *rptr, T value, T compare, int pe, nvshmemi_amo_t op);
+
+template <typename T>
+__device__ void nvshmemi_transfer_amo_nonfetch(void *rptr, T value, int pe, nvshmemi_amo_t op);
+
+template <threadgroup_t SCOPE>
+__device__ void nvshmemi_transfer_quiet(bool use_membar);
+
+template <threadgroup_t SCOPE>
+__device__ void nvshmemi_transfer_fence();
+__device__ void nvshmemi_transfer_enforce_consistency_at_target(bool use_membar);
+__device__ void nvshmemi_transfer_syncapi_update_mem();
+#endif /* _NVSHMEMI_TRANSFER_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/pt-to-pt/proxy_device.cuh

@@ -0,0 +1,572 @@
+/****
+ * Copyright (c) 2014, NVIDIA Corporation.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ *    * Redistributions of source code must retain the above copyright notice,
+ *      this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the name of the NVIDIA Corporation nor the names of its
+ *      contributors may be used to endorse or promote products derived from
+ *      this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * The U.S. Department of Energy funded the development of this software
+ * under subcontract 7078610 with Lawrence Berkeley National Laboratory.
+ *
+ ****/
+
+#ifndef PROXY_DEVICE_CUH
+#define PROXY_DEVICE_CUH
+
+#include <cuda_runtime.h>
+#include "utils_device.h"
+#include "non_abi/device/wait/nvshmemi_wait_until_apis.cuh"
+/* this file does not directly use the definitions from device_host/nvshmem_proxy_channel.h */
+/* But the way the requests are filled in directly represents those structures. */
+#include "device_host/nvshmem_proxy_channel.h"  // IWYU pragma: keep
+
+#ifdef __CUDA_ARCH__
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE __device__ void check_channel_availability(
+    uint64_t tail_idx) {
+    uint64_t complete;
+    complete = *((volatile uint64_t *)nvshmemi_device_state_d.proxy_channels_complete_local_ptr);
+    if ((complete + nvshmemi_device_state_d.proxy_channel_buf_size - 1) < tail_idx) {
+        nvshmemi_wait_until_greater_than_equals_add<uint64_t>(
+            nvshmemi_device_state_d.proxy_channels_complete,
+            nvshmemi_device_state_d.proxy_channel_buf_size - 1, tail_idx,
+            NVSHMEMI_CALL_SITE_PROXY_CHECK_CHANNEL_AVAILABILITY);
+        atomicMax(
+            (unsigned long long int *)nvshmemi_device_state_d.proxy_channels_complete_local_ptr,
+            *nvshmemi_device_state_d.proxy_channels_complete);
+        __threadfence_system();  // XXX: prevents store to buf_d reordered to before load from
+                                 // complete_d (breaks rma)
+    }
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_quiet(
+    bool use_membar) {
+    uint64_t quiet_issue;
+    quiet_issue = (*(volatile uint64_t *)nvshmemi_device_state_d.proxy_channels_issue);
+    atomicMax((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_quiet_issue,
+              quiet_issue);
+
+    nvshmemi_wait_until_greater_than_equals<uint64_t>(
+        nvshmemi_device_state_d.proxy_channels_quiet_ack, quiet_issue,
+        NVSHMEMI_CALL_SITE_PROXY_QUIET);
+    if (use_membar) {
+        __threadfence_system();  // XXX: prevents store to issue_d reordered to before load from
+                                 // quiet_ack_d (breaks quiet -> rma)
+    }
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_global_exit(
+    int status) {
+    int rc;
+
+    rc = atomicCAS(nvshmemi_device_state_d.global_exit_request_state,
+                   PROXY_GLOBAL_EXIT_NOT_REQUESTED, PROXY_GLOBAL_EXIT_INIT);
+    if (rc == PROXY_GLOBAL_EXIT_NOT_REQUESTED) {
+        *nvshmemi_device_state_d.global_exit_code = status;
+        __threadfence_system();
+        rc = atomicCAS(nvshmemi_device_state_d.global_exit_request_state, PROXY_GLOBAL_EXIT_INIT,
+                       PROXY_GLOBAL_EXIT_REQUESTED);
+        assert(rc == PROXY_GLOBAL_EXIT_INIT);
+    }
+    /* Note, this will block indefinitely, but that is fine as nvshmemi_global_exit should never
+     * return. */
+    long long int now, later;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(now));
+    do {
+        asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(later));
+    } while (later >= now);
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void
+nvshmemi_proxy_enforce_consistency_at_target(bool use_membar) {
+    uint64_t cst_issue;
+    cst_issue = (*(volatile uint64_t *)nvshmemi_device_state_d.proxy_channels_issue);
+    atomicMax((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_cst_issue,
+              cst_issue);
+
+    nvshmemi_wait_until_greater_than_equals<uint64_t>(
+        nvshmemi_device_state_d.proxy_channels_cst_ack, cst_issue,
+        NVSHMEMI_CALL_SITE_PROXY_ENFORCE_CONSISTENCY_AT_TARGET);
+    if (use_membar) {
+        __threadfence_system();  // XXX: prevents store to issue_d reordered to before load from
+                                 // cst_ack_d (breaks cst -> rma)
+    }
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void copy_to_channel(void *ptr,
+                                                                              uint32_t size) {
+    channel_bounce_buffer_t bounce;
+    uint64_t idx, tail_idx;
+    volatile uint64_t *channel_ptr;
+    char *src_ptr = (char *)ptr;
+    uint32_t size_with_flags;
+    uint32_t size_remaining;
+
+    /* idx is an every increasing counter. Since it is 64 bit integer, practically
+    it will not overflow */
+    size_with_flags = (size * 8) / 7;
+    if (size_with_flags % 8) {
+        size_with_flags += (8 - (size_with_flags % 8));
+    }
+    idx = atomicAdd((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_issue,
+                    size_with_flags);
+    tail_idx = idx + (size_with_flags - 1);
+
+    // flow-control
+    check_channel_availability(tail_idx);
+
+    for (size_remaining = size; size_remaining > 7; idx += sizeof(uint64_t), size_remaining -= 7) {
+        channel_ptr = (volatile uint64_t *)((uint64_t)nvshmemi_device_state_d.proxy_channels_buf +
+                                            (idx & (CHANNEL_BUF_SIZE - 1)));
+        memcpy(&bounce.bytes[1], src_ptr, 7);
+        /* Note, the second to last bit being set denotes a continuation of the same request to the
+         * other side. */
+        bounce.bytes[0] =
+            (char)(!((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1) | 0x10);
+        *channel_ptr = bounce.whole_buffer;
+        src_ptr += 7;
+    }
+
+    channel_ptr = (volatile uint64_t *)((uint64_t)nvshmemi_device_state_d.proxy_channels_buf +
+                                        (idx & (CHANNEL_BUF_SIZE - 1)));
+    memcpy(&bounce.bytes[1], src_ptr, size_remaining);
+    bounce.bytes[0] = (char)!((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    *channel_ptr = bounce.whole_buffer;
+}
+
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE __device__ void transfer_dma(
+    void *rptr, void *lptr, size_t bytes, int pe, int channel_op) {
+    uint64_t idx, tail_idx, *req;
+    int size = PROXY_DMA_REQ_BYTES;
+    int group_size = 1;
+    void *buf_ptr = nvshmemi_device_state_d.proxy_channels_buf;
+    void *base_ptr = nvshmemi_device_state_d.heap_base;
+    const uint64_t mask_lowest_byte = 0xFFFFFFFFFFFFFF00u;
+    const uint64_t mask_upper_7_bytes = 0x00000000000000FFu;
+
+    __threadfence();
+
+    /* idx is an every increasing counter. Since it is 64 bit integer, practically
+    it will not overflow */
+    idx = atomicAdd((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_issue, size);
+    tail_idx = idx + (size - 1);
+
+    // flow-control
+    check_channel_availability(tail_idx);
+
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    uint64_t curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    /* curr_flag is either 0 or 1. Starting at idx = 0 to idx =
+     * nvshmemi_device_state_d.proxy_channel_buf_size - 1, it will be 1, then for next
+     * nvshmemi_device_state_d.proxy_channel_buf_size idx values it will be 0, and so
+     * on.
+     */
+    uint64_t roffset = (uint64_t)((char *)rptr - (char *)base_ptr);
+    uint64_t laddr = (uint64_t)lptr;
+    uint64_t op = channel_op;
+    uint16_t pe_u16 = pe;
+    uint64_t size_u64 = bytes;
+
+    /* base_request_t
+     * 32 | 8 | 8 | 8 | 8
+     * roffset_high | roffset_low | op | group_size | flag */
+    *((volatile uint64_t *)req) =
+        (uint64_t)((roffset << 24) | (op << 16) | (group_size << 8) | curr_flag);
+
+    /* put_dma_request_0
+     * 56 | 8
+     * laddr_high | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    uint64_t laddr_high = laddr & mask_lowest_byte;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    *((volatile uint64_t *)req) = laddr_high | curr_flag;
+
+    /* put_dma_request_1
+     * 32 | 16 | 8 | 8
+     * size_high | size_low | laddr_low | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    uint64_t laddr_low = laddr & mask_upper_7_bytes;
+    req = (uint64_t *)((uint8_t *)buf_ptr +
+                       (idx & (nvshmemi_device_state_d.proxy_channel_buf_size - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    *((volatile uint64_t *)req) = (uint64_t)(size_u64 << 16 | laddr_low << 8 | curr_flag);
+
+    /* put_dma_request_2
+     * 32 | 16 | 8 | 8
+     * resv2 | pe | resv1 | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    *((volatile uint64_t *)req) = (uint64_t)((pe_u16 << 16) | curr_flag);
+}
+
+/*XXX : Only no const version is used*/
+template <nvshmemi_op_t channel_op>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_rma(void *rptr,
+                                                                                 void *lptr,
+                                                                                 size_t bytes,
+                                                                                 int pe) {
+    assert(0);
+    /*XXX:to be used for 1) NVSHMEMI_DEVICE_ALWAYS_INLINE 2) DMA with ack 3) DMA by staging in
+     * another buffer*/
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE void nvshmemi_proxy_rma_nbi(
+    void *rptr, void *lptr, size_t bytes, int pe, nvshmemi_op_t op) {
+    if (!bytes) return;
+    transfer_dma(rptr, lptr, bytes, pe, op);
+}
+
+template <typename T>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE T nvshmemi_proxy_rma_g(void *source,
+                                                                                int pe) {
+// check for CC >= 7.0 because the code depends on __match_all_sync
+#if __CUDA_ARCH__ >= 700
+    constexpr unsigned int full_warp = 0xffffffffu;
+    const unsigned int amask = __activemask();
+    unsigned int laneId;
+    asm("mov.u32 %0, %%laneid;" : "=r"(laneId));
+    int pred_pe = 0;
+    int pred_contigous = 0;
+
+    // check if warp is coalesced, if all lanes put to the same PE and if buffer is contigous
+    if (full_warp == amask && full_warp == __match_all_sync(full_warp, pe, &pred_pe) &&
+        full_warp == __match_all_sync(full_warp,
+                                      reinterpret_cast<uintptr_t>(reinterpret_cast<char *>(source) -
+                                                                  (laneId * sizeof(T))),
+                                      &pred_contigous)) {
+        assert(pred_pe && pred_contigous);
+
+        g_elem_t *elem = nullptr;
+        int coalescing_buf_byte_offset = -1;
+        if (0 == laneId) {
+            uint64_t counter = atomicAdd(
+                (unsigned long long int *)nvshmemi_device_state_d.proxy_channel_g_buf_head_ptr, 1);
+            uint64_t idx = counter * sizeof(g_elem_t);
+            uint64_t idx_in_buf = idx & (nvshmemi_device_state_d.proxy_channel_g_buf_size - 1);
+            elem = (g_elem_t *)(nvshmemi_device_state_d.proxy_channel_g_buf + idx_in_buf);
+            coalescing_buf_byte_offset =
+                (idx_in_buf / sizeof(g_elem_t)) * NVSHMEMI_WARP_SIZE * sizeof(uint64_t);
+            // Using a g_elem_t as to for a coalescing buffer at the same index
+            uint64_t flag = (idx >> nvshmemi_device_state_d.proxy_channel_g_buf_log_size) * 2;
+
+            /* wait until element can be used */
+            nvshmemi_wait_until_greater_than_equals<uint64_t>((volatile uint64_t *)&(elem->flag),
+                                                              flag, NVSHMEMI_CALL_SITE_G_WAIT_FLAG);
+            static_assert(sizeof(T) <= sizeof(uint64_t), "sizeof(T) exceeds sizeof(uint64_t)");
+            nvshmemi_proxy_rma_nbi(source,
+                                   (void *)(nvshmemi_device_state_d.proxy_channel_g_coalescing_buf +
+                                            coalescing_buf_byte_offset),
+                                   NVSHMEMI_WARP_SIZE * sizeof(T), pe, NVSHMEMI_OP_G);
+            nvshmemi_proxy_quiet(false);
+        }
+        coalescing_buf_byte_offset = __shfl_sync(amask, coalescing_buf_byte_offset, 0);
+        T *__restrict__ coalescing_buf = reinterpret_cast<T *>(
+            nvshmemi_device_state_d.proxy_channel_g_coalescing_buf + coalescing_buf_byte_offset);
+        T return_val = coalescing_buf[laneId];
+        __syncwarp(amask);
+        if (0 == laneId) {
+            __threadfence();
+            /* release the element for the next thread */
+            elem->flag += 2;
+        }
+
+        return return_val;
+    } else
+#endif  //__CUDA_ARCH__ >= 700
+    {
+        uint64_t counter = atomicAdd(
+            (unsigned long long int *)nvshmemi_device_state_d.proxy_channel_g_buf_head_ptr, 1);
+        uint64_t idx = counter * sizeof(g_elem_t);
+        uint64_t idx_in_buf = idx & (nvshmemi_device_state_d.proxy_channel_g_buf_size - 1);
+        g_elem_t *elem = (g_elem_t *)(nvshmemi_device_state_d.proxy_channel_g_buf + idx_in_buf);
+        uint64_t flag = (idx >> nvshmemi_device_state_d.proxy_channel_g_buf_log_size) * 2;
+
+        /* wait until element can be used */
+        nvshmemi_wait_until_greater_than_equals<uint64_t>((volatile uint64_t *)&(elem->flag), flag,
+                                                          NVSHMEMI_CALL_SITE_G_WAIT_FLAG);
+
+        nvshmemi_proxy_rma_nbi(source, (void *)elem, sizeof(T), pe, NVSHMEMI_OP_G);
+        nvshmemi_proxy_quiet(false);
+
+        __threadfence();
+        T return_val = *(T *)(&(elem->data));
+        __threadfence();
+        /* release the element for the next thread */
+        elem->flag += 2;
+
+        return return_val;
+    }
+}
+
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE __device__ void convert_val_to_uint64(
+    uint64_t *dest, void *value, size_t size) {
+    uint8_t byte_buffer_1;
+    uint16_t byte_buffer_2;
+    uint32_t byte_buffer_4;
+    uint64_t byte_buffer_8;
+
+    switch (size) {
+        case 1:
+            memcpy(&byte_buffer_1, value, size);
+            *dest = byte_buffer_1;
+            break;
+        case 2:
+            memcpy(&byte_buffer_2, value, size);
+            *dest = byte_buffer_2;
+            break;
+        case 4:
+            memcpy(&byte_buffer_4, value, size);
+            *dest = byte_buffer_4;
+            break;
+        case 8:
+            memcpy(&byte_buffer_8, value, size);
+            *dest = byte_buffer_8;
+            break;
+        default:
+            printf("Invalid size value provided to convert_val_to_uint64 in proxy_device.cu.\n");
+    }
+}
+
+template <typename T>
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_FORCE_INLINE __device__ void transfer_inline(
+    void *rptr, T value, int pe, nvshmemi_op_t optype) {
+    uint64_t idx, tail_idx, *req;
+    int size = PROXY_INLINE_REQ_BYTES;
+    int group_size = 1;
+    void *buf_ptr = nvshmemi_device_state_d.proxy_channels_buf;
+    void *base_ptr = nvshmemi_device_state_d.heap_base;
+
+    idx = atomicAdd((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_issue, size);
+    tail_idx = idx + (size - 1);
+
+    // flow-control
+    check_channel_availability(tail_idx);
+
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    uint64_t curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    uint64_t roffset = (uint64_t)((char *)rptr - (char *)base_ptr);
+    uint64_t op = optype;
+    uint16_t pe_u16 = pe;
+    uint64_t size_u64 = sizeof(T);
+
+    uint64_t lvalue_buffer = 0;
+    const uint64_t mask_4_bytes = 0x00000000ffffffff;
+
+    convert_val_to_uint64(&lvalue_buffer, &value, sizeof(T));
+
+    /* base_request_t
+     * 32 | 8 | 8 | 8 | 8
+     * roffset_high | roffset_low | op | group_size | flag */
+    *((volatile uint64_t *)req) =
+        (uint64_t)((roffset << 24) | (op << 16) | (group_size << 8) | curr_flag);
+
+    /* put_inline_request_0
+     * 32 | 16 | 8 | 8
+     * lvalue (low) | pe | resv | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    /* mask lower four bytes. */
+    const uint64_t lvalue_low = lvalue_buffer & mask_4_bytes;
+    *((volatile uint64_t *)req) = (lvalue_low << 32 | ((uint64_t)pe_u16 << 16) | curr_flag);
+
+    /* put_inline_request_1
+     * 32 | 16 | 8 | 8
+     * lvalue(high) | size | resv | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    const uint64_t lvalue_high = lvalue_buffer & ~mask_4_bytes;
+    *((volatile uint64_t *)req) = (lvalue_high | size_u64 << 16 | curr_flag);
+}
+
+template <typename T>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_rma_p(void *rptr,
+                                                                                   const T value,
+                                                                                   int pe) {
+    transfer_inline<T>(rptr, value, pe, NVSHMEMI_OP_P);
+}
+
+template <typename T>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void amo(
+    void *rptr, uint64_t g_buf_counter /* used only for fetch atomics */, T swap_add, T compare,
+    int pe, nvshmemi_amo_t amo_op) {
+    uint64_t idx, tail_idx, *req;
+    int size = PROXY_AMO_REQ_BYTES;
+    int group_size = 1;
+    void *buf_ptr = nvshmemi_device_state_d.proxy_channels_buf;
+    void *base_ptr = nvshmemi_device_state_d.heap_base;
+
+    idx = atomicAdd((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_issue, size);
+    tail_idx = idx + (size - 1);
+
+    // flow-control
+    check_channel_availability(tail_idx);
+
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    uint64_t curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    uint64_t roffset = (uint64_t)((char *)rptr - (char *)base_ptr);
+    uint64_t op = NVSHMEMI_OP_AMO;
+    uint64_t amo = amo_op;
+    uint16_t pe_u16 = pe;
+    uint64_t size_u64 = sizeof(T);
+    uint64_t swap_add_buffer;
+    uint64_t compare_buffer;
+    const uint64_t mask_1_byte = 0x00FFFFFFFFFFFFFF;
+    const uint64_t mask_4_bytes = 0x00000000FFFFFFFF;
+    const uint64_t mask_7_bytes = 0x00000000000000FF;
+
+    convert_val_to_uint64(&swap_add_buffer, &swap_add, sizeof(T));
+    convert_val_to_uint64(&compare_buffer, &compare, sizeof(T));
+
+    /* base_request_t
+     * 32 | 8 | 8 | 8 | 8
+     * roffset_high | roffset_low | op | group_size | flag */
+    *((volatile uint64_t *)req) =
+        (uint64_t)((roffset << 24) | (op << 16) | (group_size << 8) | curr_flag);
+
+    /* amo_request_0
+     * 32 | 16 | 8 | 8
+     * swap_add_low | pe | amo | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    const uint64_t swap_add_low = swap_add_buffer & mask_4_bytes;
+    *((volatile uint64_t *)req) =
+        (swap_add_low << 32 | ((uint64_t)pe_u16 << 16) | (amo << 8) | curr_flag);
+
+    /* amo_request_1
+     * 32 | 16 | 8 | 8
+     * swap_add_high | size | compare_low | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    const uint64_t swap_add_high = swap_add_buffer & ~mask_4_bytes;
+    const uint64_t compare_low = compare_buffer & mask_7_bytes;
+    *((volatile uint64_t *)req) = (swap_add_high | size_u64 << 16 | compare_low << 8 | curr_flag);
+
+    /* amo_request_2
+     * 32 | 16 | 8 | 8
+     * comapare_high | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    /* only mask the low byte for */
+    const uint64_t compare_high = compare_buffer & ~mask_7_bytes;
+    *((volatile uint64_t *)req) = (compare_high | curr_flag);
+
+    /* amo_request_3
+     * 32 | 16 | 8 | 8
+     * g_buf_counter_low | flag */
+    idx += CHANNEL_ENTRY_BYTES;
+    req = (uint64_t *)((uint8_t *)buf_ptr + (idx & (CHANNEL_BUF_SIZE - 1)));
+    curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    /* assumes g_buf_counter <= (1 << 56) */
+    const uint64_t g_buf_counter_low = g_buf_counter & mask_1_byte;
+    *((volatile uint64_t *)req) = (g_buf_counter_low << 8 | curr_flag);
+}
+
+template <typename T>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_amo_nonfetch(
+    void *rptr, T swap_add, int pe, nvshmemi_amo_t op) {
+    amo<T>(rptr, 0 /* dummy value */, swap_add, 0, pe, op);
+}
+
+template <typename T>
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_amo_fetch(
+    void *rptr, void *lptr, T swap_add, T compare, int pe, nvshmemi_amo_t op) {
+    uint64_t counter = atomicAdd(
+        (unsigned long long int *)nvshmemi_device_state_d.proxy_channel_g_buf_head_ptr, 1);
+    uint64_t idx = counter * sizeof(g_elem_t);
+    uint64_t idx_in_buf = idx & (nvshmemi_device_state_d.proxy_channel_g_buf_size - 1);
+    g_elem_t *elem = (g_elem_t *)(nvshmemi_device_state_d.proxy_channel_g_buf + idx_in_buf);
+    uint64_t flag = (idx >> nvshmemi_device_state_d.proxy_channel_g_buf_log_size) * 2;
+    size_t atomic_size = sizeof(T);
+
+    /* wait until element can be used */
+    nvshmemi_wait_until_greater_than_equals<uint64_t>((volatile uint64_t *)&(elem->flag), flag,
+                                                      NVSHMEMI_CALL_SITE_AMO_FETCH_WAIT_FLAG);
+    __threadfence();
+
+    amo<T>(rptr, counter, swap_add, compare, pe, op);
+
+    /* The IBDEVX transport doesn't rely on an active message from the receiver for atomics. */
+    if (nvshmemi_device_state_d.atomics_complete_on_quiet) {
+        nvshmemi_proxy_quiet(false);
+        elem->flag += 1;
+        /* MLNX NICs will typically return 8 byte atomics in host-endian and 4 byte atomics in
+         * big-enian. This behavior is controlled by flags read from the NIC at runtime.
+         */
+        if (atomic_size < nvshmemi_device_state_d.atomics_le_min_size) {
+            if (atomic_size == 8) {
+                NTOH64(&elem->data);
+            } else if (atomic_size == 4) {
+                NTOH32(&elem->data);
+            } else {
+                /* Our APIs currently only support 4 and 8-byte atomics. Any other size is a fatal
+                 * error. */
+                assert(false);
+            }
+        }
+    } else {
+        nvshmemi_wait_until_greater_than_equals<uint64_t>(
+            (volatile uint64_t *)&(elem->flag), flag + 1, NVSHMEMI_CALL_SITE_AMO_FETCH_WAIT_DATA);
+    }
+    __threadfence();
+    T return_val = *(T *)(&(elem->data));
+    __threadfence();
+
+    /* release the element for the next thread */
+    elem->flag += 1;
+
+    *((T *)lptr) = return_val;
+}
+
+NVSHMEMI_STATIC __device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_proxy_fence() {
+    // making it a no-op as it is a no-op for IB RC, the only transport
+    uint64_t idx, tail_idx, *req;
+    int size = sizeof(uint64_t);
+
+    idx = atomicAdd((unsigned long long int *)nvshmemi_device_state_d.proxy_channels_issue, size);
+    tail_idx = idx + (size - 1);
+
+    // flow-control
+    check_channel_availability(tail_idx);
+
+    req = (uint64_t *)((uint64_t)nvshmemi_device_state_d.proxy_channels_buf +
+                       (idx & (nvshmemi_device_state_d.proxy_channel_buf_size - 1)));
+    uint64_t curr_flag = !((idx >> nvshmemi_device_state_d.proxy_channel_buf_logsize) & 1);
+    uint64_t op = NVSHMEMI_OP_FENCE;
+
+    /* base_request_t
+     * 32 | 8 | 8 | 8 | 8
+     * resv | resv | op | resv | flag */
+    *((volatile uint64_t *)req) = (uint64_t)((op << 16) | curr_flag);
+
+    return;
+}
+
+#endif /* __CUDA_ARCH__ */
+#endif /* PROXY_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/pt-to-pt/transfer_device.cuh

@@ -0,0 +1,302 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef TRANSFER_DEVICE_CUH
+#define TRANSFER_DEVICE_CUH
+
+#include <cuda_runtime.h>
+#include "non_abi/nvshmem_build_options.h"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "device_host/nvshmem_common.cuh"
+#include "device/nvshmem_device_macros.h"
+#include "non_abi/device/pt-to-pt/proxy_device.cuh"
+
+#ifdef NVSHMEM_IBGDA_SUPPORT
+#include "non_abi/device/pt-to-pt/ibgda_device.cuh"
+#endif
+
+#if defined __clang_llvm_bitcode_lib__
+#define NVSHMEMI_TRANSFER_INLINE \
+    __attribute__((noinline, section(".text.compute"), not_tail_called))
+#define NVSHMEMI_TRANSFER_STATIC
+#elif defined NVSHMEM_ENABLE_ALL_DEVICE_INLINING
+#define NVSHMEMI_TRANSFER_INLINE inline
+#define NVSHMEMI_TRANSFER_STATIC static
+#else
+#define NVSHMEMI_TRANSFER_INLINE __noinline__
+#define NVSHMEMI_TRANSFER_STATIC
+#endif
+
+#define TRANSFER_REPT_FOR_STANDARD_RMA_TYPES(FN_TEMPLATE) \
+    FN_TEMPLATE(char)                                     \
+    FN_TEMPLATE(unsigned char)                            \
+    FN_TEMPLATE(short)                                    \
+    FN_TEMPLATE(unsigned short)                           \
+    FN_TEMPLATE(int)                                      \
+    FN_TEMPLATE(unsigned int)                             \
+    FN_TEMPLATE(long)                                     \
+    FN_TEMPLATE(unsigned long)                            \
+    FN_TEMPLATE(long long)                                \
+    FN_TEMPLATE(unsigned long long)                       \
+    FN_TEMPLATE(float)                                    \
+    FN_TEMPLATE(double)
+
+#define TRANSFER_REPT_FOR_STANDARD_AMO_TYPES(FN_TEMPLATE) \
+    FN_TEMPLATE(short)                                    \
+    FN_TEMPLATE(unsigned short)                           \
+    FN_TEMPLATE(int)                                      \
+    FN_TEMPLATE(unsigned int)                             \
+    FN_TEMPLATE(long)                                     \
+    FN_TEMPLATE(unsigned long)                            \
+    FN_TEMPLATE(long long)                                \
+    FN_TEMPLATE(unsigned long long)
+
+#define TRANSFER_REPT_FOR_EXTENDED_AMO_TYPES(FN_TEMPLATE) \
+    FN_TEMPLATE(float)                                    \
+    FN_TEMPLATE(double)
+
+#define TRANSFER_REPT_FOR_ALL_SCOPES(FN_TEMPLATE) \
+    FN_TEMPLATE(NVSHMEMI_THREADGROUP_THREAD)      \
+    FN_TEMPLATE(NVSHMEMI_THREADGROUP_WARP)        \
+    FN_TEMPLATE(NVSHMEMI_THREADGROUP_BLOCK)
+
+#ifdef __CUDA_ARCH__
+__device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_syncapi_update_mem() {
+    __threadfence(); /* 1. Ensures consitency op is not called before the prior test/wait condition
+                        has been met
+                        2. Needed to prevent reorder of instructions after sync api (when the
+                        following if condition is false) */
+    if (nvshmemi_device_state_d.job_connectivity > NVSHMEMI_JOB_GPU_PROXY) {
+        nvshmemi_proxy_enforce_consistency_at_target(true);
+    }
+}
+
+template <typename T>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_rma_p(
+    void *rptr, const T value, int pe) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_rma_p<T>(rptr, value, pe);
+    } else
+#endif
+    {
+        nvshmemi_proxy_rma_p<T>(rptr, value, pe);
+    }
+}
+
+#define TRANSFER_DECL_RMA_P(Type) \
+    template __device__ void nvshmemi_transfer_rma_p<Type>(void *rptr, const Type value, int pe);
+
+TRANSFER_REPT_FOR_STANDARD_RMA_TYPES(TRANSFER_DECL_RMA_P)
+
+template <typename T>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE T nvshmemi_transfer_rma_g(void *rptr,
+                                                                                       int pe) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        return nvshmemi_ibgda_rma_g<T>(rptr, pe);
+    } else
+#endif
+    {
+        return nvshmemi_proxy_rma_g<T>(rptr, pe);
+    }
+}
+
+#define TRANSFER_DECL_RMA_G(Type) \
+    template __device__ Type nvshmemi_transfer_rma_g<Type>(void *rptr, int pe);
+
+TRANSFER_REPT_FOR_STANDARD_RMA_TYPES(TRANSFER_DECL_RMA_G)
+
+template <threadgroup_t SCOPE, nvshmemi_op_t channel_op>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_rma(
+    void *rptr, void *lptr, size_t bytes, int pe) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_rma<SCOPE, channel_op>(rptr, lptr, bytes, pe);
+    } else
+#endif
+    {
+        int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+        if (!myIdx) {
+            nvshmemi_proxy_rma_nbi(rptr, lptr, bytes, pe, channel_op);
+            nvshmemi_proxy_quiet(false);
+            if (SCOPE == nvshmemi_threadgroup_thread)
+                __threadfence_block(); /* to prevent reuse of src buffer before quiet completion;
+                                    for warp/block scope, following sync op will accomplish that */
+        }
+    }
+}
+
+#define TRANSFER_DECL_RMA(SCOPE)                                                                   \
+    template __device__ void nvshmemi_transfer_rma<SCOPE, NVSHMEMI_OP_PUT>(void *rptr, void *lptr, \
+                                                                           size_t bytes, int pe);  \
+    template __device__ void nvshmemi_transfer_rma<SCOPE, NVSHMEMI_OP_GET>(void *rptr, void *lptr, \
+                                                                           size_t bytes, int pe);
+
+TRANSFER_REPT_FOR_ALL_SCOPES(TRANSFER_DECL_RMA)
+
+template <threadgroup_t SCOPE>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_put_signal(
+    void *rptr, void *lptr, size_t bytes, void *sig_addr, uint64_t signal, nvshmemi_amo_t sig_op,
+    int pe, bool is_nbi) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_put_signal<SCOPE>(rptr, lptr, bytes, sig_addr, signal, sig_op, pe, is_nbi);
+    } else
+#endif
+    {
+        int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+        if (!myIdx) {
+            nvshmemi_proxy_rma_nbi(rptr, lptr, bytes, pe, NVSHMEMI_OP_PUT);
+            nvshmemi_proxy_fence();
+            nvshmemi_proxy_amo_nonfetch<uint64_t>(sig_addr, signal, pe, sig_op);
+            if (is_nbi == 0) {
+                nvshmemi_proxy_quiet(false);
+                if (SCOPE == nvshmemi_threadgroup_thread)
+                    __threadfence_block(); /* to prevent reuse of src buffer before quiet completion
+                                        for warp/block scope, following sync op will accomplish that
+                                      */
+            }
+        }
+    }
+}
+
+#define TRANSFER_DECL_PUT_SIGNAL(SCOPE)                                        \
+    template __device__ void nvshmemi_transfer_put_signal<SCOPE>(              \
+        void *rptr, void *lptr, size_t bytes, void *sig_rptr, uint64_t signal, \
+        nvshmemi_amo_t sig_op, int pe, bool is_nbi);
+
+TRANSFER_REPT_FOR_ALL_SCOPES(TRANSFER_DECL_PUT_SIGNAL)
+
+template <threadgroup_t SCOPE, nvshmemi_op_t channel_op>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_rma_nbi(
+    void *rptr, void *lptr, size_t bytes, int pe) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_rma_nbi<SCOPE, channel_op>(rptr, lptr, bytes, pe);
+    } else
+#endif
+    {
+        int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+        if (!myIdx) nvshmemi_proxy_rma_nbi(rptr, lptr, bytes, pe, channel_op);
+    }
+}
+
+#define TRANSFER_DECL_RMA_NBI(SCOPE)                                            \
+    template __device__ void nvshmemi_transfer_rma_nbi<SCOPE, NVSHMEMI_OP_PUT>( \
+        void *rptr, void *lptr, size_t bytes, int pe);                          \
+    template __device__ void nvshmemi_transfer_rma_nbi<SCOPE, NVSHMEMI_OP_GET>( \
+        void *rptr, void *lptr, size_t bytes, int pe);
+
+TRANSFER_REPT_FOR_ALL_SCOPES(TRANSFER_DECL_RMA_NBI)
+
+template <typename T>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE T
+nvshmemi_transfer_amo_fetch(void *rptr, T value, T compare, int pe, nvshmemi_amo_t op) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        return nvshmemi_ibgda_amo_fetch<T>(rptr, value, compare, pe, op);
+    } else
+#endif
+    {
+        T retval;
+        nvshmemi_proxy_amo_fetch<T>(rptr, (void *)&retval, value, compare, pe, op);
+        return retval;
+    }
+}
+
+#define TRANSFER_DECL_AMO_FETCH(Type)                           \
+    template __device__ Type nvshmemi_transfer_amo_fetch<Type>( \
+        void *rptr, const Type value, const Type compare, int pe, nvshmemi_amo_t op);
+
+TRANSFER_REPT_FOR_STANDARD_AMO_TYPES(TRANSFER_DECL_AMO_FETCH);
+TRANSFER_REPT_FOR_EXTENDED_AMO_TYPES(TRANSFER_DECL_AMO_FETCH);
+
+template <typename T>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_amo_nonfetch(
+    void *rptr, T value, int pe, nvshmemi_amo_t op) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_amo_nonfetch<T>(rptr, value, pe, op);
+    } else
+#endif
+    {
+        nvshmemi_proxy_amo_nonfetch<T>(rptr, value, pe, op);
+    }
+}
+
+#define TRANSFER_DECL_AMO_NONFETCH(Type)                                                        \
+    template __device__ void nvshmemi_transfer_amo_nonfetch<Type>(void *rptr, const Type value, \
+                                                                  int pe, nvshmemi_amo_t op);
+
+TRANSFER_REPT_FOR_STANDARD_AMO_TYPES(TRANSFER_DECL_AMO_NONFETCH);
+TRANSFER_REPT_FOR_EXTENDED_AMO_TYPES(TRANSFER_DECL_AMO_NONFETCH);
+
+template <threadgroup_t SCOPE>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_quiet(
+    bool use_membar) {
+    // quiet_on_stream also shares this code path.
+    int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_quiet<SCOPE>();
+        if (use_membar) {
+            if (!myIdx) {
+                __threadfence_system();
+            }
+        }
+    } else
+#endif
+        if (nvshmemi_device_state_d.proxy == NVSHMEMI_PROXY_FULL) {
+        if (!myIdx) {
+            nvshmemi_proxy_quiet(use_membar);
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+#define TRANSFER_DECL_QUIET(SCOPE) \
+    template __device__ void nvshmemi_transfer_quiet<SCOPE>(bool use_membar);
+
+TRANSFER_REPT_FOR_ALL_SCOPES(TRANSFER_DECL_QUIET);
+#undef TRANSFER_DECL_QUIET
+
+template <threadgroup_t SCOPE>
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void nvshmemi_transfer_fence() {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_fence<SCOPE>();
+    } else
+#endif
+        if ((nvshmemi_device_state_d.proxy == NVSHMEMI_PROXY_FULL) &&
+            !nvshmemi_device_state_d.proxy_ops_are_ordered) {
+        int myIdx = nvshmemi_thread_id_in_threadgroup<SCOPE>();
+        if (!myIdx) {
+            nvshmemi_proxy_fence();
+        }
+    }
+    nvshmemi_threadgroup_sync<SCOPE>();
+}
+
+#define TRANSFER_DECL_FENCE(SCOPE) template __device__ void nvshmemi_transfer_fence<SCOPE>();
+
+TRANSFER_REPT_FOR_ALL_SCOPES(TRANSFER_DECL_FENCE);
+#undef TRANSFER_DECL_FENCE
+
+NVSHMEMI_TRANSFER_STATIC __device__ NVSHMEMI_TRANSFER_INLINE void
+nvshmemi_transfer_enforce_consistency_at_target(bool use_membar) {
+#ifdef NVSHMEM_IBGDA_SUPPORT
+    if (nvshmemi_device_state_d.ibgda_is_initialized) {
+        nvshmemi_ibgda_enforce_consistency_at_target(use_membar);
+    } else
+#endif
+    {
+        nvshmemi_proxy_enforce_consistency_at_target(use_membar);
+    }
+}
+#endif /* __CUDA_ARCH__ */
+
+#endif /* TRANSFER_DEVICE_CUH */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/pt-to-pt/utils_device.h

@@ -0,0 +1,111 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _COMM_DEVICE_UTILS_H
+#define _COMM_DEVICE_UTILS_H
+
+#if !defined __CUDACC_RTC__
+#include <stdint.h>
+#else
+#include "cuda/std/cstdint"
+#endif
+
+#include <cuda_runtime.h>
+
+#if defined __CUDACC__
+#define NVSHMEMI_COMM_DEVICE_UTILS_USE_PTX
+#endif
+#define NTOH64(x)                                                             \
+    *x = ((*(x)&0xFF00000000000000) >> 56 | (*(x)&0x00FF000000000000) >> 40 | \
+          (*(x)&0x0000FF0000000000) >> 24 | (*(x)&0x000000FF00000000) >> 8 |  \
+          (*(x)&0x00000000FF000000) << 8 | (*(x)&0x0000000000FF0000) << 24 |  \
+          (*(x)&0x000000000000FF00) << 40 | (*(x)&0x00000000000000FF) << 56)
+
+#define NTOH32(x)                                                                     \
+    *x = ((*(x)&0xFF000000) >> 24 | (*(x)&0x00FF0000) >> 8 | (*(x)&0x0000FF00) << 8 | \
+          (*(x)&0x000000FF) << 24)
+
+#ifdef NVSHMEMI_COMM_DEVICE_UTILS_USE_PTX
+
+#if defined __CUDACC__
+
+__device__ static inline uint64_t BSWAP64(uint64_t x) {
+    uint64_t ret;
+    asm volatile(
+        "{\n\t"
+        ".reg .b32 mask;\n\t"
+        ".reg .b32 ign;\n\t"
+        ".reg .b32 lo;\n\t"
+        ".reg .b32 hi;\n\t"
+        ".reg .b32 new_lo;\n\t"
+        ".reg .b32 new_hi;\n\t"
+        "mov.b32 mask, 0x0123;\n\t"
+        "mov.b64 {lo,hi}, %1;\n\t"
+        "prmt.b32 new_hi, lo, ign, mask;\n\t"
+        "prmt.b32 new_lo, hi, ign, mask;\n\t"
+        "mov.b64 %0, {new_lo,new_hi};\n\t"
+        "}"
+        : "=l"(ret)
+        : "l"(x));
+    return ret;
+}
+
+__device__ static inline uint32_t BSWAP32(uint32_t x) {
+    uint32_t ret;
+    asm volatile(
+        "{\n\t"
+        ".reg .b32 mask;\n\t"
+        ".reg .b32 ign;\n\t"
+        "mov.b32 mask, 0x0123;\n\t"
+        "prmt.b32 %0, %1, ign, mask;\n\t"
+        "}"
+        : "=r"(ret)
+        : "r"(x));
+    return ret;
+}
+
+__device__ static inline uint16_t BSWAP16(uint16_t x) {
+    uint16_t ret;
+
+    uint32_t a = (uint32_t)x;
+    uint32_t d;
+    asm volatile(
+        "{\n\t"
+        ".reg .b32 mask;\n\t"
+        ".reg .b32 ign;\n\t"
+        "mov.b32 mask, 0x4401;\n\t"
+        "mov.b32 ign, 0x0;\n\t"
+        "prmt.b32 %0, %1, ign, mask;\n\t"
+        "}"
+        : "=r"(d)
+        : "r"(a));
+    ret = (uint16_t)d;
+    return ret;
+}
+
+#endif /*! __CUDACC__ */
+
+#else /* NVSHMEMI_COMM_DEVICE_UTILS_USE_PTX */
+
+#define BSWAP64(x)                                                               \
+    ((((x)&0xff00000000000000ull) >> 56) | (((x)&0x00ff000000000000ull) >> 40) | \
+     (((x)&0x0000ff0000000000ull) >> 24) | (((x)&0x000000ff00000000ull) >> 8) |  \
+     (((x)&0x00000000ff000000ull) << 8) | (((x)&0x0000000000ff0000ull) << 24) |  \
+     (((x)&0x000000000000ff00ull) << 40) | (((x)&0x00000000000000ffull) << 56))
+
+#define BSWAP32(x)                                                                  \
+    ((((x)&0xff000000) >> 24) | (((x)&0x00ff0000) >> 8) | (((x)&0x0000ff00) << 8) | \
+     (((x)&0x000000ff) << 24))
+
+#define BSWAP16(x) ((((x)&0xff00) >> 8) | (((x)&0x00ff) << 8))
+
+#endif /* NVSHMEMI_COMM_DEVICE_UTILS_USE_PTX */
+
+#define HTOBE64(x) BSWAP64(x)
+#define HTOBE32(x) BSWAP32(x)
+#define HTOBE16(x) BSWAP16(x)
+
+#endif /* _COMM_DEVICE_UTILS_H */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/team/nvshmemi_team_defines.cuh

@@ -0,0 +1,174 @@
+#ifndef _NVSHMEMI_TEAM_DEFINES_CUH_
+#define _NVSHMEMI_TEAM_DEFINES_CUH_
+
+#include "device_host/nvshmem_common.cuh"
+#include <cuda_runtime.h>
+#if !defined __CUDACC_RTC__
+#include <assert.h>
+#else
+#include <cuda/std/cassert>
+#endif
+
+#ifdef __CUDA_ARCH__
+
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE int nvshmemi_team_my_pe(
+    nvshmem_team_t team) {
+    if (team == NVSHMEM_TEAM_INVALID)
+        return -1;
+    else if (team == NVSHMEM_TEAM_WORLD)
+        return nvshmemi_device_state_d.mype;
+    else if (team == NVSHMEMX_TEAM_NODE)
+        return nvshmemi_device_state_d.node_mype;
+    else
+        return nvshmemi_device_state_d.team_pool[team]->my_pe;
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE int nvshmemi_team_n_pes(nvshmem_team_t team) {
+    if (team == NVSHMEM_TEAM_INVALID)
+        return -1;
+    else if (team == NVSHMEM_TEAM_WORLD)
+        return nvshmemi_device_state_d.npes;
+    else if (team == NVSHMEMX_TEAM_NODE)
+        return nvshmemi_device_state_d.node_npes;
+    else
+        return nvshmemi_device_state_d.team_pool[team]->size;
+}
+
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE __device__ size_t get_fcollect_psync_len_per_team() {
+    size_t fcollect_ll_threshold =
+        nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll_threshold;
+    size_t fcollect_sync_size =
+        (2 * 2 * nvshmemi_device_state_d.npes * fcollect_ll_threshold) / sizeof(long);
+
+    return fcollect_sync_size;
+}
+
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE __device__ size_t
+get_fcollect_ll128_psync_len_per_team() {
+    size_t fcollect_ll128_threshold =
+        nvshmemi_device_state_d.gpu_coll_env_params_var.fcollect_ll128_threshold;
+    size_t fcollect_ll128_sync_size =
+        NVSHMEMI_FCOLLECT_LL128_CALC_PSYNC_SIZE(fcollect_ll128_threshold, char);
+
+    /* scale for npes and two separate psyncs */
+    fcollect_ll128_sync_size =
+        fcollect_ll128_sync_size * 2 * nvshmemi_device_state_d.npes / sizeof(long);
+
+    return fcollect_ll128_sync_size;
+}
+
+NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE __device__ size_t get_psync_len_per_team() {
+    size_t fcollect_sync_size = get_fcollect_psync_len_per_team();
+    size_t fcollect_ll128_sync_size = get_fcollect_ll128_psync_len_per_team();
+    /* sync: Two buffers are used - one for sync/barrier collective ops, the second one during team
+       split operation reduce: Two pWrk's are used alternatively across consecutive reduce calls,
+       this is to avoid having to put a barrier in between bcast: The buffer is split to do multiple
+       consecutive broadcast, when all buffers are used, a barrier is called and then again we begin
+       from the start of the buffer fcollect: Two sets of buffer are used to alternate between -
+       same way as in reduce. The other fator of 2 is because when using LL double the space is
+       needed to fuse flag with data */
+
+    return (2 * NVSHMEMI_SYNC_SIZE +
+            nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size / sizeof(long) +
+            NVSHMEMI_BCAST_SYNC_SIZE + fcollect_sync_size + 2 * NVSHMEMI_ALLTOALL_SYNC_SIZE +
+            fcollect_ll128_sync_size);
+}
+
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE int
+nvshmemi_team_translate_pe_to_team_world_wrap(nvshmemi_team_t *src_team, int src_pe) {
+    return src_team->pe_mapping[src_pe % src_team->size];
+}
+
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE int
+nvshmemi_team_translate_pe_from_team_world(nvshmemi_team_t *dest_team, int src_pe) {
+    return dest_team->pe_mapping[dest_team->size + src_pe];
+}
+
+__device__ NVSHMEMI_STATIC NVSHMEMI_DEVICE_ALWAYS_INLINE bool nvshmemi_team_is_identical(
+    nvshmemi_team_t *t1, nvshmemi_team_t *t2) {
+    if (t1->start != t2->start || t1->size != t2->size) {
+        return false;
+    }
+
+    /* shortcut for teams with linear stride */
+    if (t1->stride > 0 && t2->stride == t1->stride) {
+        return true;
+    }
+
+    for (int i = 0; i < t1->size; i++) {
+        if (t1->pe_mapping[i] != t2->pe_mapping[i]) {
+            return false;
+        }
+    }
+
+    return true;
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE int nvshmemi_team_translate_pe(nvshmem_team_t src_team,
+                                                                        int src_pe,
+                                                                        nvshmem_team_t dest_team) {
+    if (src_team == NVSHMEM_TEAM_INVALID || dest_team == NVSHMEM_TEAM_INVALID) return -1;
+    nvshmemi_team_t *src_teami, *dest_teami;
+
+    src_teami = nvshmemi_device_state_d.team_pool[src_team];
+    dest_teami = nvshmemi_device_state_d.team_pool[dest_team];
+    int src_pe_world, dest_pe = -1;
+
+    if (src_pe > src_teami->size) return -1;
+
+    src_pe_world = src_teami->pe_mapping[src_pe];
+    assert(src_pe_world >= src_teami->start && src_pe_world < nvshmemi_device_state_d.npes);
+    dest_pe = dest_teami->pe_mapping[dest_teami->size + src_pe_world];
+
+    return dest_pe;
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE long *nvshmemi_team_get_psync(nvshmemi_team_t *team,
+                                                                       nvshmemi_team_op_t op) {
+    long *team_psync;
+    size_t psync_fcollect_len;
+    psync_fcollect_len = get_fcollect_psync_len_per_team();
+    team_psync = &nvshmemi_device_state_d.psync_pool[team->team_idx * get_psync_len_per_team()];
+    switch (op) {
+        case SYNC:
+            return team_psync;
+        case REDUCE:
+            return &team_psync
+                [2 * NVSHMEMI_SYNC_SIZE +
+                 (((nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size / 2) /
+                   sizeof(long)) *
+                  (team->rdxn_count % 2))];
+        case BCAST:
+            return &team_psync[2 * NVSHMEMI_SYNC_SIZE +
+                               nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size /
+                                   sizeof(long)];
+        case FCOLLECT:
+            return &team_psync[2 * NVSHMEMI_SYNC_SIZE +
+                               nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size /
+                                   sizeof(long) +
+                               NVSHMEMI_BCAST_SYNC_SIZE];
+        case ALLTOALL:
+            return &team_psync[2 * NVSHMEMI_SYNC_SIZE +
+                               nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size /
+                                   sizeof(long) +
+                               NVSHMEMI_BCAST_SYNC_SIZE + psync_fcollect_len +
+                               (NVSHMEMI_ALLTOALL_SYNC_SIZE * (team->alltoall_count % 2))];
+        case FCOLLECT_128:
+            return &team_psync[2 * NVSHMEMI_SYNC_SIZE +
+                               nvshmemi_device_state_d.gpu_coll_env_params_var.reduce_scratch_size /
+                                   sizeof(long) +
+                               NVSHMEMI_BCAST_SYNC_SIZE + psync_fcollect_len +
+                               2 * NVSHMEMI_ALLTOALL_SYNC_SIZE];
+        default:
+            printf("Incorrect argument to nvshmemi_team_get_psync\n");
+            return NULL;
+    }
+}
+
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE long *nvshmemi_team_get_sync_counter(
+    nvshmemi_team_t *team) {
+    return &nvshmemi_device_state_d.sync_counter[2 * team->team_idx];
+}
+#endif
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh

@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+#ifndef _NVSHMEM_COMMON_DEVICE_DEFINES_CUH_
+#define _NVSHMEM_COMMON_DEVICE_DEFINES_CUH_
+#include <cuda_runtime.h>
+#include "device_host/nvshmem_common.cuh"
+
+#if defined(__CUDACC_RDC__) && !defined(__NVSHMEM_NUMBA_SUPPORT__)
+#define EXTERN_CONSTANT extern __constant__
+#elif defined(__clang__)
+#define EXTERN_CONSTANT extern __constant__ __attribute__((address_space(4)))
+#else
+#define EXTERN_CONSTANT static __constant__
+#endif
+EXTERN_CONSTANT nvshmemi_device_host_state_t nvshmemi_device_state_d;
+#undef EXTERN_CONSTANT
+
+#ifdef __NVSHMEM_NUMBA_SUPPORT__
+static __constant__ nvshmemi_version_t nvshmemi_device_lib_version_d = {
+    NVSHMEM_VENDOR_MAJOR_VERSION, NVSHMEM_VENDOR_MINOR_VERSION, NVSHMEM_VENDOR_PATCH_VERSION};
+#endif
+
+typedef enum {
+    nvshmemi_threadgroup_thread = 0,
+    NVSHMEMI_THREADGROUP_THREAD = 0,
+    nvshmemi_threadgroup_warp = 1,
+    NVSHMEMI_THREADGROUP_WARP = 1,
+    nvshmemi_threadgroup_warpgroup = 2,
+    NVSHMEMI_THREADGROUP_WARPGROUP = 2,
+    nvshmemi_threadgroup_block = 3,
+    NVSHMEMI_THREADGROUP_BLOCK = 3
+} threadgroup_t;
+
+#ifdef __CUDA_ARCH__
+
+template <threadgroup_t scope>
+__device__ __forceinline__ int nvshmemi_thread_id_in_threadgroup() {
+    switch (scope) {
+        case NVSHMEMI_THREADGROUP_THREAD:
+            return 0;
+        case NVSHMEMI_THREADGROUP_WARP:
+            int myIdx;
+            asm volatile("mov.u32  %0,  %%laneid;" : "=r"(myIdx));
+            return myIdx;
+        case NVSHMEMI_THREADGROUP_WARPGROUP:
+            return (
+                (threadIdx.x + threadIdx.y * blockDim.x + threadIdx.z * blockDim.x * blockDim.y) %
+                (4 * warpSize));
+        case NVSHMEMI_THREADGROUP_BLOCK:
+            return (threadIdx.x + threadIdx.y * blockDim.x + threadIdx.z * blockDim.x * blockDim.y);
+        default:
+            printf("unrecognized threadscope passed\n");
+            assert(0);
+            return -1;
+    }
+}
+
+template <threadgroup_t scope>
+__device__ inline int nvshmemi_threadgroup_size() {
+    switch (scope) {
+        case NVSHMEMI_THREADGROUP_THREAD:
+            return 1;
+        case NVSHMEMI_THREADGROUP_WARP:
+            return ((blockDim.x * blockDim.y * blockDim.z) < warpSize)
+                       ? (blockDim.x * blockDim.y * blockDim.z)
+                       : warpSize;
+        case NVSHMEMI_THREADGROUP_WARPGROUP:
+            // warpgroup = 4 warps
+            return ((blockDim.x * blockDim.y * blockDim.z) < (4 * warpSize))
+                       ? (blockDim.x * blockDim.y * blockDim.z)
+                       : (4 * warpSize);
+        case NVSHMEMI_THREADGROUP_BLOCK:
+            return (blockDim.x * blockDim.y * blockDim.z);
+        default:
+            printf("unrecognized threadscope passed\n");
+            assert(0);
+            return -1;
+    }
+}
+
+template <threadgroup_t scope>
+__device__ inline void nvshmemi_threadgroup_sync() {
+    uint32_t tid, barrierId;
+    switch (scope) {
+        case NVSHMEMI_THREADGROUP_THREAD:
+            return;
+        case NVSHMEMI_THREADGROUP_WARP:
+            __syncwarp();
+            break;
+        case NVSHMEMI_THREADGROUP_WARPGROUP:
+            // break;
+            tid =
+                threadIdx.x + (threadIdx.y * blockDim.x) + (threadIdx.z * blockDim.x * blockDim.y);
+
+            // each warpgroup has a unique barrier id per CTA
+            barrierId = (tid / (4 * warpSize));
+            // Ensure blocksize is a multiple of warpgroup size
+            assert((blockDim.x * blockDim.y * blockDim.z) % (4 * warpSize) == 0);
+            // Hardware limit on named barriers (max 16)
+            assert((barrierId < 16) && "Reduce blocksize");
+            asm volatile("bar.sync %0, %1;" : : "r"(barrierId), "r"(4 * warpSize));
+            break;
+        case NVSHMEMI_THREADGROUP_BLOCK:
+            __syncthreads();
+            break;
+        default:
+            printf("unrecognized threadscope passed\n");
+            assert(0);
+            break;
+    }
+}
+#endif
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/device/wait/nvshmemi_wait_until_apis.cuh

@@ -0,0 +1,158 @@
+/*
+ * Copyright (c) 2016-2025, NVIDIA CORPORATION. All rights reserved.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEM_WAIT_UNTIL_APIS_CUH_
+#define _NVSHMEM_WAIT_UNTIL_APIS_CUH_
+
+#ifdef __CUDA_ARCH__
+
+#include <cuda_runtime.h>
+#include "device_host_transport/nvshmem_constants.h"
+#include "device/nvshmem_device_macros.h"
+#include "non_abi/device/threadgroup/nvshmemi_common_device_defines.cuh"
+#include "device_host/nvshmem_common.cuh"
+#include "non_abi/nvshmem_build_options.h"
+
+#define TIMEOUT_NCYCLES 1e10
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_check_timeout_and_log(
+    long long int start, int caller, uintptr_t signal_addr, T signal_val_found,
+    T signal_val_expected) {
+    long long int now;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(now));
+    if ((now - start) > TIMEOUT_NCYCLES) {
+        nvshmemi_timeout_t *timeout_d = nvshmemi_device_state_d.timeout;
+        timeout_d->caller = caller;
+        timeout_d->signal_addr = signal_addr;
+        *(T *)(&timeout_d->signal_val_found) = signal_val_found;
+        *(T *)(&timeout_d->signal_val_expected) = signal_val_expected;
+        *((volatile uint64_t *)(&timeout_d->signal)) = 1;
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_greater_than(volatile T *addr,
+                                                                               T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr <= val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_greater_than_equals(
+    volatile T *addr, T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr < val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_lesser_than(volatile T *addr,
+                                                                              T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr >= val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_lesser_than_equals(
+    volatile T *addr, T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr > val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_equals(volatile T *addr, T val,
+                                                                         int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr != val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_not_equals(volatile T *addr,
+                                                                             T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    while (*addr == val) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, *addr, val);
+#endif
+    }
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until_greater_than_equals_add(
+    volatile T *addr, uint64_t toadd, T val, int caller) {
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+    long long int start;
+    asm volatile("mov.u64  %0, %%globaltimer;" : "=l"(start));
+#endif
+    T valataddr;
+    do {
+        valataddr = *addr;
+#ifdef NVSHMEM_TIMEOUT_DEVICE_POLLING
+        nvshmemi_check_timeout_and_log<T>(start, caller, (uintptr_t)addr, valataddr + toadd, val);
+#endif
+    } while (valataddr + toadd < val);
+}
+
+template <typename T>
+__device__ NVSHMEMI_DEVICE_ALWAYS_INLINE void nvshmemi_wait_until(volatile T *ivar, int cmp,
+                                                                  T cmp_value) {
+    if (NVSHMEM_CMP_GE == cmp) {
+        nvshmemi_wait_until_greater_than_equals<T>(ivar, cmp_value,
+                                                   NVSHMEMI_CALL_SITE_WAIT_UNTIL_GE);
+    } else if (NVSHMEM_CMP_EQ == cmp) {
+        nvshmemi_wait_until_equals<T>(ivar, cmp_value, NVSHMEMI_CALL_SITE_WAIT_UNTIL_EQ);
+    } else if (NVSHMEM_CMP_NE == cmp) {
+        nvshmemi_wait_until_not_equals<T>(ivar, cmp_value, NVSHMEMI_CALL_SITE_WAIT_UNTIL_NE);
+    } else if (NVSHMEM_CMP_GT == cmp) {
+        nvshmemi_wait_until_greater_than<T>(ivar, cmp_value, NVSHMEMI_CALL_SITE_WAIT_UNTIL_GT);
+    } else if (NVSHMEM_CMP_LT == cmp) {
+        nvshmemi_wait_until_lesser_than<T>(ivar, cmp_value, NVSHMEMI_CALL_SITE_WAIT_UNTIL_LT);
+    } else if (NVSHMEM_CMP_LE == cmp) {
+        nvshmemi_wait_until_lesser_than_equals<T>(ivar, cmp_value,
+                                                  NVSHMEMI_CALL_SITE_WAIT_UNTIL_LE);
+    }
+}
+
+#endif
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/nvshmem_build_options.h

@@ -0,0 +1,37 @@
+#pragma once
+
+/* #undef NVSHMEM_COMPLEX_SUPPORT */
+/* #undef NVSHMEM_DEBUG */
+/* #undef NVSHMEM_DEVEL */
+/* #undef NVSHMEM_TRACE */
+/* #undef NVSHMEM_DEFAULT_PMI2 */
+/* #undef NVSHMEM_DEFAULT_PMIX */
+/* #undef NVSHMEM_DEFAULT_UCX */
+/* #undef NVSHMEM_GPU_COLL_USE_LDST */
+#define NVSHMEM_IBDEVX_SUPPORT
+#define NVSHMEM_IBRC_SUPPORT
+#define NVSHMEM_LIBFABRIC_SUPPORT
+#define NVSHMEM_MPI_SUPPORT
+#define NVSHMEM_NVTX
+#define NVSHMEM_PMIX_SUPPORT
+#define NVSHMEM_SHMEM_SUPPORT
+/* #undef NVSHMEM_TEST_STATIC_LIB */
+/* #undef NVSHMEM_TIMEOUT_DEVICE_POLLING */
+#define NVSHMEM_UCX_SUPPORT
+/* #undef NVSHMEM_USE_DLMALLOC */
+#define NVSHMEM_USE_NCCL
+#define NVSHMEM_USE_GDRCOPY
+#define NVSHMEM_USE_MLX5DV
+/* #undef NVSHMEM_VERBOSE */
+#define NVSHMEM_BUILD_TESTS
+#define NVSHMEM_BUILD_EXAMPLES
+#define NVSHMEM_IBGDA_SUPPORT
+/* #undef NVSHMEM_IBGDA_SUPPORT_GPUMEM_ONLY */
+/* #undef NVSHMEM_ENABLE_ALL_DEVICE_INLINING */
+/* #undef NVSHMEM_HOSTLIB_ONLY */
+
+#if defined __clang_llvm_bitcode_lib__ || defined NVSHMEM_HOSTLIB_ONLY
+#undef NVSHMEM_IBGDA_SUPPORT
+#undef NVSHMEM_IBGDA_SUPPORT_GPUMEM_ONLY
+#define NVSHMEM_ENABLE_ALL_DEVICE_INLINING
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/nvshmem_version.h

@@ -0,0 +1,19 @@
+/* Note - For packaging reasons, do not move this file from src/include/non_abi */
+
+#pragma once
+
+// clang-format off
+
+#define NVSHMEM_VENDOR_MAJOR_VERSION 3
+#define NVSHMEM_VENDOR_MINOR_VERSION 4
+#define NVSHMEM_VENDOR_PATCH_VERSION 5
+#define NVSHMEM_VENDOR_PACKAGE_VERSION 0
+#define NVSHMEM_TRANSPORT_PLUGIN_MAJOR_VERSION 3
+#define NVSHMEM_TRANSPORT_PLUGIN_MINOR_VERSION 0
+#define NVSHMEM_TRANSPORT_PLUGIN_PATCH_VERSION 0
+#define NVSHMEM_BOOTSTRAP_PLUGIN_MAJOR_VERSION 3
+#define NVSHMEM_BOOTSTRAP_PLUGIN_MINOR_VERSION 0
+#define NVSHMEM_BOOTSTRAP_PLUGIN_PATCH_VERSION 0
+#define NVSHMEM_BUILD_VARS "NVSHMEM_DEBUG=OFF NVSHMEM_DEVEL=OFF NVSHMEM_DEFAULT_PMI2=OFF NVSHMEM_DEFAULT_PMIX=OFF NVSHMEM_DEFAULT_UCX=OFF NVSHMEM_ENABLE_ALL_DEVICE_INLINING=OFF NVSHMEM_GPU_COLL_USE_LDST=OFF NVSHMEM_IBGDA_SUPPORT=ON NVSHMEM_IBGDA_SUPPORT_GPUMEM_ONLY=OFF NVSHMEM_IBDEVX_SUPPORT=ON NVSHMEM_IBRC_SUPPORT=ON NVSHMEM_LIBFABRIC_SUPPORT=ON NVSHMEM_MPI_SUPPORT=ON NVSHMEM_NVTX=ON NVSHMEM_PMIX_SUPPORT=ON NVSHMEM_SHMEM_SUPPORT=ON NVSHMEM_TEST_STATIC_LIB=OFF NVSHMEM_TIMEOUT_DEVICE_POLLING=OFF NVSHMEM_TRACE=OFF NVSHMEM_UCX_SUPPORT=ON NVSHMEM_USE_DLMALLOC=OFF NVSHMEM_USE_NCCL=ON NVSHMEM_USE_GDRCOPY=ON NVSHMEM_VERBOSE=OFF CUDA_HOME=/dvs/p4/build/sw/rel/gpgpu/toolkit/r12.9/build/cuda GDRCOPY_HOME=/dvs/p4/build/sw/rel/gpgpu/toolkit/r12.9/gdrcopy_build LIBFABRIC_HOME=/data/tmp/libfabric_install MPI_HOME=/data/tmp/openmpi_install NCCL_HOME=/dvs/p4/build/sw/rel/gpgpu/toolkit/r12.9/nccl/build NVSHMEM_PREFIX=/dvs/p4/build/sw/rel/gpgpu/toolkit/r12.9/main_nvshmem/install PMIX_HOME=/data/tmp/pmix_install SHMEM_HOME=/data/tmp/openmpi_install UCX_HOME=/dvs/p4/build/sw/gpgpu/openucx/build"
+
+// clang-format on

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvshmem/include/non_abi/nvshmemx_error.h

@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2018-2025, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * NVIDIA CORPORATION and its licensors retain all intellectual property
+ * and proprietary rights in and to this software, related documentation
+ * and any modifications thereto.  Any use, reproduction, disclosure or
+ * distribution of this software and related documentation without an express
+ * license agreement from NVIDIA CORPORATION is strictly prohibited.
+ *
+ * See License.txt for license information
+ */
+
+#ifndef _NVSHMEMX_ERROR_H_
+#define _NVSHMEMX_ERROR_H_
+#if !defined __CUDACC_RTC__
+#include <errno.h>  // for errno
+#include <limits.h>
+#include <stdio.h>   // for stderr, stdout, NULL
+#include <string.h>  // IWYU pragma: keep for strerror
+#include <stdlib.h>  // IWYU pragma: keep for exit
+#else
+#define fprintf(...)
+#define exit(...)
+#include <cuda/std/climits>
+#include <cuda/std/cstdlib>
+#endif
+
+/* The !! idiom is used to convert non-boolean types to booleans.
+ * Doing so in this case allows us to ensure that __builtin_expect
+ * will be given a clean boolean value for the comparison. */
+#define nvshmemxi_error_unlikely(x) __builtin_expect(!!(x), 0)
+
+#if defined __cplusplus || defined __clang_llvm_bitcode_lib__
+extern "C" {
+#endif
+
+enum nvshmemx_status {
+    NVSHMEMX_SUCCESS = 0,
+    NVSHMEMX_ERROR_INVALID_VALUE,
+    NVSHMEMX_ERROR_OUT_OF_MEMORY,
+    NVSHMEMX_ERROR_NOT_SUPPORTED,
+    NVSHMEMX_ERROR_SYMMETRY,
+    NVSHMEMX_ERROR_GPU_NOT_SELECTED,
+    NVSHMEMX_ERROR_COLLECTIVE_LAUNCH_FAILED,
+    NVSHMEMX_ERROR_INTERNAL,
+    NVSHMEMX_ERROR_SENTINEL = INT_MAX
+};
+
+#define NVSHMEMI_ERROR_EXIT(...)                                         \
+    do {                                                                 \
+        fprintf(stderr, "%s:%s:%d: ", __FILE__, __FUNCTION__, __LINE__); \
+        fprintf(stderr, __VA_ARGS__);                                    \
+        fprintf(stderr, "\n");                                           \
+        exit(-1);                                                        \
+    } while (0)
+
+#define NVSHMEMI_ERROR_PRINT(...)                                        \
+    do {                                                                 \
+        fprintf(stderr, "%s:%s:%d: ", __FILE__, __FUNCTION__, __LINE__); \
+        fprintf(stderr, __VA_ARGS__);                                    \
+        fprintf(stderr, "\n");                                           \
+    } while (0)
+
+#define NVSHMEMI_WARN_PRINT(...)      \
+    do {                              \
+        fprintf(stdout, "WARN: ");    \
+        fprintf(stdout, __VA_ARGS__); \
+        fprintf(stdout, "\n");        \
+    } while (0)
+
+#define NVSHMEMI_ERROR_JMP(status, err, label, ...)                              \
+    do {                                                                         \
+        fprintf(stderr, "%s:%d: non-zero status: %d ", __FILE__, __LINE__, err); \
+        fprintf(stderr, __VA_ARGS__);                                            \
+        fprintf(stderr, "\n");                                                   \
+        status = err;                                                            \
+        goto label;                                                              \
+    } while (0)
+
+#define NVSHMEMI_NULL_ERROR_JMP(var, status, err, label, ...)          \
+    do {                                                               \
+        if (nvshmemxi_error_unlikely(var == NULL)) {                   \
+            fprintf(stderr, "%s:%d: NULL value ", __FILE__, __LINE__); \
+            fprintf(stderr, __VA_ARGS__);                              \
+            fprintf(stderr, "\n");                                     \
+            status = err;                                              \
+            goto label;                                                \
+        }                                                              \
+    } while (0)
+
+#define NVSHMEMI_EQ_ERROR_JMP(status, expected, err, label, ...)                     \
+    do {                                                                             \
+        if (nvshmemxi_error_unlikely(status == expected)) {                          \
+            fprintf(stderr, "%s:%d: error status: %d ", __FILE__, __LINE__, status); \
+            fprintf(stderr, __VA_ARGS__);                                            \
+            fprintf(stderr, "\n");                                                   \
+            status = err;                                                            \
+            goto label;                                                              \
+        }                                                                            \
+    } while (0)
+
+#define NVSHMEMI_NE_ERROR_JMP(status, expected, err, label, ...)                        \
+    do {                                                                                \
+        if (nvshmemxi_error_unlikely(status != expected)) {                             \
+            fprintf(stderr, "%s:%d: non-zero status: %d ", __FILE__, __LINE__, status); \
+            fprintf(stderr, __VA_ARGS__);                                               \
+            fprintf(stderr, "\n");                                                      \
+            status = err;                                                               \
+            goto label;                                                                 \
+        }                                                                               \
+    } while (0)
+
+#define NVSHMEMI_NZ_ERROR_JMP(status, err, label, ...)                                  \
+    do {                                                                                \
+        if (nvshmemxi_error_unlikely(status != 0)) {                                    \
+            fprintf(stderr, "%s:%d: non-zero status: %d ", __FILE__, __LINE__, status); \
+            fprintf(stderr, __VA_ARGS__);                                               \
+            fprintf(stderr, "\n");                                                      \
+            status = err;                                                               \
+            goto label;                                                                 \
+        }                                                                               \
+    } while (0)
+
+#define NVSHMEMI_CHECK_ERROR_JMP(statement, status, err, label, ...) \
+    do {                                                             \
+        if (nvshmemxi_error_unlikely(statement)) {                   \
+            fprintf(stderr, "%s:%d: ", __FILE__, __LINE__);          \
+            fprintf(stderr, __VA_ARGS__);                            \
+            fprintf(stderr, "\n");                                   \
+            status = err;                                            \
+            goto label;                                              \
+        }                                                            \
+    } while (0)
+
+#define NVSHMEMI_NZ_EXIT(status, ...)                                                          \
+    do {                                                                                       \
+        if (nvshmemxi_error_unlikely(status != 0)) {                                           \
+            fprintf(stderr, "%s:%d: non-zero status: %d: %s, exiting... ", __FILE__, __LINE__, \
+                    status, strerror(errno));                                                  \
+            fprintf(stderr, __VA_ARGS__);                                                      \
+            fprintf(stderr, "\n");                                                             \
+            exit(-1);                                                                          \
+        }                                                                                      \
+    } while (0)
+
+#define NVSHMEMI_NZ_SYSCHECK_EXIT(sys_status, ...)                                             \
+    do {                                                                                       \
+        if (nvshmemxi_error_unlikely((sys_status) != 0)) {                                     \
+            fprintf(stderr, "%s:%d: non-zero status: %d: %s, exiting... ", __FILE__, __LINE__, \
+                    (sys_status), strerror(sys_status));                                       \
+            fprintf(stderr, __VA_ARGS__);                                                      \
+            fprintf(stderr, "\n");                                                             \
+            exit(-1);                                                                          \
+        }                                                                                      \
+    } while (0)
+
+#if defined __cplusplus || defined __clang_llvm_bitcode_lib__
+}
+#endif
+
+#endif

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvToolsExt.h

@@ -0,0 +1,1578 @@
+/*
+* Copyright 2009-2024  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+/** \file nvToolsExt.h
+ */
+
+/*
+* Deprecation and upcoming removal warning for NVTX version 2
+* This warning can be suppressed by defining NVTX_SUPPRESS_V2_DEPRECATION_WARNING
+*/
+#ifndef NVTX_SUPPRESS_V2_DEPRECATION_WARNING
+#ifndef NVTX_V2_DEPRECATION_WARNING_MESSAGE
+#define NVTX_V2_DEPRECATION_WARNING_MESSAGE "DEPRECATION NOTICE:  NVTX 2 is deprecated and will be removed from toolkits that distribute it in their next major version (CUDA 12.9).  Please use NVTX 3 instead.  All NVTX 2 API functions are supported in version 3.  The implementation is now header-only, so you no longer need to link with and distribute a dynamic library to use NVTX.  Ensure you are explicitly using NVTX 3 by writing #include <nvtx3/nvToolsExt.h> instead of #include <nvToolsExt.h>.  Remove nvToolsExt from your link command and linker search paths, and stop deploying libnvToolsExt.so or nvToolsExt64_1.dll -- these binary libraries will not be shipped with NVTX 3 for C/C++ usage.  A new library called 'libnvtx3interop.so' or 'nvtx3interop.dll' will be provided for interop with other languages.  This message can be suppressed by defining NVTX_SUPPRESS_V2_DEPRECATION_WARNING before including the NVTX 2 headers."
+#ifdef _MSC_VER
+#define NVTX_V2_WARNING_HELPER2(x) #x
+#define NVTX_V2_WARNING_HELPER(x) NVTX_V2_WARNING_HELPER2(x)
+#pragma message(__FILE__ ":" NVTX_V2_WARNING_HELPER(__LINE__) ": note: \"" NVTX_V2_DEPRECATION_WARNING_MESSAGE "\"\n")
+#else
+#pragma message NVTX_V2_DEPRECATION_WARNING_MESSAGE
+#endif
+#endif /* NVTX_V2_DEPRECATION_WARNING_MESSAGE */
+#endif /* NVTX_SUPPRESS_V2_DEPRECATION_WARNING */
+
+/* ========================================================================= */
+/** \mainpage
+ * \tableofcontents
+ * \section INTRODUCTION Introduction
+ *
+ * The NVIDIA Tools Extension library is a set of functions that a
+ * developer can use to provide additional information to tools.
+ * The additional information is used by the tool to improve
+ * analysis and visualization of data.
+ *
+ * The library introduces close to zero overhead if no tool is
+ * attached to the application.  The overhead when a tool is
+ * attached is specific to the tool.
+ *
+ * \section INITIALIZATION_SECTION Initialization
+ *
+ * Typically the tool's library that plugs into NVTX is indirectly 
+ * loaded via enviromental properties that are platform specific. 
+ * For some platform or special cases, the user may be required 
+ * to instead explicity initialize instead though.   This can also
+ * be helpful to control when the API loads a tool's library instead
+ * of what would typically be the first function call to emit info.
+ * For these rare case, see \ref INITIALIZATION for additional information.
+ *
+ * \section MARKERS_AND_RANGES Markers and Ranges
+ *
+ * Markers and ranges are used to describe events at a specific time (markers)
+ * or over a time span (ranges) during the execution of the application
+ * respectively. 
+ *
+ * \subsection MARKERS Markers
+ * 
+ * Markers denote specific moments in time.
+ * 
+ * 
+ * See \ref DOMAINS and \ref EVENT_ATTRIBUTES for additional information on
+ * how to specify the domain.
+ * 
+ * \subsection THREAD_RANGES Thread Ranges
+ *
+ * Thread ranges denote nested time ranges. Nesting is maintained per thread
+ * per domain and does not require any additional correlation mechanism. The
+ * duration of a thread range is defined by the corresponding pair of
+ * nvtxRangePush* to nvtxRangePop API calls.
+ *
+ * See \ref DOMAINS and \ref EVENT_ATTRIBUTES for additional information on
+ * how to specify the domain.
+ *
+ * \subsection PROCESS_RANGES Process Ranges
+ *
+ * Process ranges denote a time span that can expose arbitrary concurrency, as 
+ * opposed to thread ranges that only support nesting. In addition the range
+ * start event can happen on a different thread than the end marker. For the 
+ * correlation of a start/end pair an unique correlation ID is used that is
+ * returned from the start API call and needs to be passed into the end API
+ * call.
+ *
+ * \subsection EVENT_ATTRIBUTES Event Attributes
+ *
+ * \ref MARKERS_AND_RANGES can be annotated with various attributes to provide
+ * additional information for an event or to guide the tool's visualization of
+ * the data. Each of the attributes is optional and if left unused the
+ * attributes fall back to a default value. The attributes include:
+ * - color
+ * - category
+ *
+ * To specify any attribute other than the text message, the \ref
+ * EVENT_ATTRIBUTE_STRUCTURE "Event Attribute Structure" must be used.
+ *
+ * \section DOMAINS Domains
+ *
+ * Domains enable developers to scope annotations. By default all events and
+ * annotations are in the default domain. Additional domains can be registered.
+ * This allows developers to scope markers, ranges, and resources names to
+ * avoid conflicts.
+ *
+ * The function ::nvtxDomainCreateA or ::nvtxDomainCreateW is used to create
+ * a named domain.
+ * 
+ * Each domain maintains its own
+ * - categories
+ * - thread range stacks
+ * - registered strings
+ *
+ * The function ::nvtxDomainDestroy marks the end of the domain. Destroying 
+ * a domain unregisters and destroys all objects associated with it such as 
+ * registered strings, resource objects, named categories, and started ranges. 
+ *
+ * \section RESOURCE_NAMING Resource Naming
+ *
+ * This section covers calls that allow to annotate objects with user-provided
+ * names in order to allow for a better analysis of complex trace data. All of
+ * the functions take the handle or the ID of the object to name and the name.
+ * The functions can be called multiple times during the execution of an
+ * application, however, in that case it is implementation dependent which
+ * name will be reported by the tool.
+ * 
+ * \subsection CATEGORY_NAMING Category Naming
+ *
+ * Some function in this library support associating an integer category 
+ * to enable filtering and sorting.  The category naming functions allow 
+ * the application to associate a user friendly name with the integer 
+ * category.  Support for domains have been added in NVTX_VERSION_2 to 
+ * avoid collisions when domains are developed independantly. 
+ *
+ * \subsection RESOURCE_OBJECTS Resource Objects
+ *
+ * Resource objects are a generic mechanism for attaching data to an application 
+ * resource.  The identifier field makes the association to a pointer or handle, 
+ * while the type field helps provide deeper understanding of the identifier as 
+ * well as enabling differentiation in cases where handles generated by different
+ * APIs may collide.  The resource object may also have an associated message to
+ * associate with the application resource, enabling further annotation of this 
+ * object and how it is used.
+ * 
+ * The resource object was introduced in NVTX_VERSION_2 to supersede existing naming
+ * functions and allow the application resource identified by those functions to be
+ * associated to a domain.  The other naming functions are still supported for backward
+ * compatibility but will be associated only to the default domain.
+ *
+ * \subsection RESOURCE_NAMING_OS Resource Naming
+ * 
+ * Some operating system resources creation APIs do not support providing a user friendly 
+ * name, such as some OS thread creation APIs.  This API support resource naming though 
+ * both through resource objects and functions following the pattern 
+ * nvtxName[RESOURCE_TYPE][A|W](identifier, name).  Resource objects introduced in NVTX_VERSION 2 
+ * supersede the other functions with a a more general method of assigning names to OS resources,
+ * along with associating them to domains too.  The older nvtxName* functions are only associated 
+ * with the default domain.
+ * \section EXTENSIONS Optional Extensions
+ * Optional extensions will either appear within the existing sections the extend or appear 
+ * in the "Related Pages" when they introduce new concepts.
+ */
+
+#ifndef NVTOOLSEXT_H_
+#define NVTOOLSEXT_H_
+
+#if defined(_MSC_VER)
+    #ifdef NVTX_EXPORTS
+        #define NVTX_DECLSPEC
+    #else
+        #define NVTX_DECLSPEC __declspec(dllimport)
+    #endif /* NVTX_EXPORTS */
+    #define NVTX_API __stdcall
+    #define NVTX_INLINE_STATIC __inline static
+#else /*defined(__GNUC__)*/
+    #define NVTX_DECLSPEC
+    #define NVTX_API
+    #define NVTX_INLINE_STATIC inline static
+#endif /* Platform */
+
+/**
+ * The nvToolsExt library depends on stdint.h.  If the build tool chain in use
+ * does not include stdint.h then define NVTX_STDINT_TYPES_ALREADY_DEFINED
+ * and define the following types:
+ * <ul>
+ *   <li>uint8_t
+ *   <li>int8_t
+ *   <li>uint16_t
+ *   <li>int16_t
+ *   <li>uint32_t
+ *   <li>int32_t
+ *   <li>uint64_t
+ *   <li>int64_t
+ *   <li>uintptr_t
+ *   <li>intptr_t
+ * </ul>
+ #define NVTX_STDINT_TYPES_ALREADY_DEFINED if you are using your own header file.
+ */
+#ifndef NVTX_STDINT_TYPES_ALREADY_DEFINED
+#include <stdint.h>
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * Tools Extension API version
+ */
+#define NVTX_VERSION 2
+
+/**
+ * Size of the nvtxEventAttributes_t structure.
+ */
+#define NVTX_EVENT_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxEventAttributes_t) ) )
+
+/**
+ * Size of the nvtxInitializationAttributes_t structure.
+ */
+#define NVTX_INITIALIZATION_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxInitializationAttributes_t) ) )
+
+#define NVTX_NO_PUSH_POP_TRACKING ((int)-2)
+
+typedef uint64_t nvtxRangeId_t;
+
+
+/* \brief String Handle Structure.
+* \anchor STRING_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a string.  The tools will return a pointer through the API for the application
+* to hold on it's behalf to reference the string in the future.
+*
+*/
+typedef struct nvtxStringHandle* nvtxStringHandle_t;
+
+/* \brief Domain Handle Structure.
+* \anchor DOMAIN_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a domain.  The tools will return a pointer through the API for the application
+* to hold on its behalf to reference the domain in the future.
+*
+*/
+typedef struct nvtxDomainHandle* nvtxDomainHandle_t;
+
+
+
+
+
+
+/* ========================================================================= */
+/** \defgroup GENERAL General
+ * @{
+ */
+
+/** ---------------------------------------------------------------------------
+ * Color Types
+ * ------------------------------------------------------------------------- */
+typedef enum nvtxColorType_t
+{
+    NVTX_COLOR_UNKNOWN  = 0,                 /**< Color attribute is unused. */
+    NVTX_COLOR_ARGB     = 1                  /**< An ARGB color is provided. */
+} nvtxColorType_t;
+
+/** ---------------------------------------------------------------------------
+ * Message Types
+ * ------------------------------------------------------------------------- */
+typedef enum nvtxMessageType_t
+{
+    NVTX_MESSAGE_UNKNOWN          = 0,    /**< Message payload is unused. */
+    NVTX_MESSAGE_TYPE_ASCII       = 1,    /**< A character sequence is used as payload. */
+    NVTX_MESSAGE_TYPE_UNICODE     = 2,     /**< A wide character sequence is used as payload. */
+    /* NVTX_VERSION_2 */
+    NVTX_MESSAGE_TYPE_REGISTERED  = 3     /**< A unique string handle that was registered
+                                                with \ref nvtxDomainRegisterStringA() or 
+                                                \ref nvtxDomainRegisterStringW(). */
+} nvtxMessageType_t;
+
+typedef union nvtxMessageValue_t
+{
+    const char* ascii;
+    const wchar_t* unicode;
+    /* NVTX_VERSION_2 */
+    nvtxStringHandle_t registered;
+} nvtxMessageValue_t;
+
+
+/** @} */ /*END defgroup*/
+
+/* ========================================================================= */
+/** \defgroup INITIALIZATION Initialization
+* @{
+* Typically the tool's library that plugs into NVTX is indirectly
+* loaded via enviromental properties that are platform specific.
+* For some platform or special cases, the user may be required
+* to instead explicity initialize instead though.  This can also
+* be helpful to control when the API loads a tool's library instead
+* of what would typically be the first function call to emit info.
+*/
+
+/** ---------------------------------------------------------------------------
+* Initialization Modes
+* ------------------------------------------------------------------------- */
+typedef enum nvtxInitializationMode_t
+{
+    NVTX_INITIALIZATION_MODE_UNKNOWN = 0,   /**< A platform that supports indirect initialization will attempt this style, otherwise expect failure. */
+    NVTX_INITIALIZATION_MODE_CALLBACK_V1 = 1,   /**< A function pointer conforming to NVTX_VERSION=1 will be used. */
+    NVTX_INITIALIZATION_MODE_CALLBACK_V2 = 2,   /**< A function pointer conforming to NVTX_VERSION=2 will be used. */
+    NVTX_INITIALIZATION_MODE_SIZE
+} nvtxInitializationMode_t;
+
+
+/** \brief Initialization Attribute Structure.
+* \anchor INITIALIZATION_ATTRIBUTE_STRUCTURE
+*
+* This structure is used to describe the attributes used for initialization
+* of the NVTX API.
+*
+* \par Initializing the Attributes
+*
+* The caller should always perform the following three tasks when using
+* attributes:
+* <ul>
+*    <li>Zero the structure
+*    <li>Set the version field
+*    <li>Set the size field
+* </ul>
+*
+* Zeroing the structure sets all the event attributes types and values
+* to the default value.
+*
+* The version and size field are used by the Tools Extension
+* implementation to handle multiple versions of the attributes structure.
+* NVTX_INITIALIZATION_ATTRIB_STRUCT_SIZE may be used for the size.
+*
+* It is recommended that the caller use one of the following to methods
+* to initialize the event attributes structure:
+*
+* \par Method 1: Initializing nvtxInitializationAttributes_t for future compatibility
+* \code
+* nvtxInitializationAttributes_t initAttribs = {0};
+* initAttribs.version = NVTX_VERSION;
+* initAttribs.size = NVTX_INITIALIZATION_ATTRIB_STRUCT_SIZE;
+* \endcode
+*
+* \par Method 2: Initializing nvtxInitializationAttributes_t for a specific version
+* \code
+* nvtxInitializationAttributes_t initAttribs = {0};
+* initAttribs.version =2;
+* initAttribs.size = (uint16_t)(sizeof(nvtxInitializationAttributes_v2));
+* \endcode
+*
+* If the caller uses Method 1 it is critical that the entire binary
+* layout of the structure be configured to 0 so that all fields
+* are initialized to the default value.
+*
+* The caller should either use both NVTX_VERSION and
+* NVTX_INITIALIZATION_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+* and a versioned type (Method 2).  Using a mix of the two methods
+* will likely cause either source level incompatibility or binary
+* incompatibility in the future.
+*
+* \par Settings Attribute Types and Values
+*
+*
+* \par Example:
+* \code
+* // Initialize
+* nvtxInitializationAttributes_t initAttribs = {0};
+* initAttribs.version = NVTX_VERSION;
+* initAttribs.size = NVTX_INITIALIZATION_ATTRIB_STRUCT_SIZE;
+*
+* // Configure the Attributes
+* initAttribs.mode = NVTX_INITIALIZATION_MODE_CALLBACK_V2;
+* initAttribs.fnptr = InitializeInjectionNvtx2;
+* \endcode
+
+* \sa
+* ::nvtxInitializationMode_t
+* ::nvtxInitialize
+*/
+typedef struct nvtxInitializationAttributes_v2
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of the event attribute
+    * structure used to specify the event.
+    */
+    uint16_t size;
+
+    /**
+    * \brief Mode of initialization.
+    *
+    * The mode of initialization dictates the overall behavior and which
+    * attributes in this struct will be used.
+    *
+    * Default Value is NVTX_INITIALIZATION_MODE_UNKNOWN = 0
+    * \sa
+    * ::nvtxInitializationMode_t
+    */
+    uint32_t mode;
+
+    /**
+    * \brief Function pointer used for initialization if the mode requires
+    *
+    * The user has retrieved this function pointer from the tool library
+    * and would like to use it to initialize.  The mode must be set to a
+    * NVTX_INITIALIZATION_MODE_CALLBACK_V# for this to be used.  The mode
+    * will dictate the expectations for this member.  The function signature
+    * will be cast from void(*)() to the appropriate signature for the mode.
+    * the expected behavior of the function will also depend on the mode
+    * beyond the simple function signature.
+    *
+    * Default Value is NVTX_INITIALIZATION_MODE_UNKNOWN which will either
+    * initialize based on external properties or fail if not supported on
+    * the given platform.
+
+    * \sa
+    * ::nvtxInitializationMode_t
+    */
+    void(*fnptr)(void);
+
+} nvtxInitializationAttributes_v2;
+
+typedef struct nvtxInitializationAttributes_v2 nvtxInitializationAttributes_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Force initialization (optional on most platforms)
+*
+* Force NVTX library to initialize.  On some platform NVTX will implicit initialize
+* upon the first function call into an NVTX API.
+*
+* \return Result codes are simplest to assume NVTX_SUCCESS or !NVTX_SUCCESS
+*
+* \param initAttrib - The initialization attribute structure
+*
+* \sa
+* ::nvtxInitializationAttributes_t
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC int NVTX_API nvtxInitialize(const nvtxInitializationAttributes_t* initAttrib);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+
+/* ========================================================================= */
+/** \defgroup EVENT_ATTRIBUTES Event Attributes
+* @{
+*/
+
+/** ---------------------------------------------------------------------------
+* Payload Types
+* ------------------------------------------------------------------------- */
+typedef enum nvtxPayloadType_t
+{
+    NVTX_PAYLOAD_UNKNOWN = 0,   /**< Color payload is unused. */
+    NVTX_PAYLOAD_TYPE_UNSIGNED_INT64 = 1,   /**< A 64 bit unsigned integer value is used as payload. */
+    NVTX_PAYLOAD_TYPE_INT64 = 2,   /**< A 64 bit signed integer value is used as payload. */
+    NVTX_PAYLOAD_TYPE_DOUBLE = 3,   /**< A 64 bit floating point value is used as payload. */
+    /* NVTX_VERSION_2 */
+    NVTX_PAYLOAD_TYPE_UNSIGNED_INT32 = 4,   /**< A 32 bit floating point value is used as payload. */
+    NVTX_PAYLOAD_TYPE_INT32 = 5,   /**< A 32 bit floating point value is used as payload. */
+    NVTX_PAYLOAD_TYPE_FLOAT = 6    /**< A 32 bit floating point value is used as payload. */
+} nvtxPayloadType_t;
+
+/** \brief Event Attribute Structure.
+ * \anchor EVENT_ATTRIBUTE_STRUCTURE
+ *
+ * This structure is used to describe the attributes of an event. The layout of
+ * the structure is defined by a specific version of the tools extension
+ * library and can change between different versions of the Tools Extension
+ * library.
+ *
+ * \par Initializing the Attributes
+ *
+ * The caller should always perform the following three tasks when using
+ * attributes:
+ * <ul>
+ *    <li>Zero the structure
+ *    <li>Set the version field
+ *    <li>Set the size field
+ * </ul>
+ *
+ * Zeroing the structure sets all the event attributes types and values
+ * to the default value.
+ *
+ * The version and size field are used by the Tools Extension
+ * implementation to handle multiple versions of the attributes structure.
+ *
+ * It is recommended that the caller use one of the following to methods
+ * to initialize the event attributes structure:
+ *
+ * \par Method 1: Initializing nvtxEventAttributes for future compatibility
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * \endcode
+ *
+ * \par Method 2: Initializing nvtxEventAttributes for a specific version
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = 1;
+ * eventAttrib.size = (uint16_t)(sizeof(nvtxEventAttributes_v1));
+ * \endcode
+ *
+ * If the caller uses Method 1 it is critical that the entire binary
+ * layout of the structure be configured to 0 so that all fields
+ * are initialized to the default value.
+ *
+ * The caller should either use both NVTX_VERSION and
+ * NVTX_EVENT_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+ * and a versioned type (Method 2).  Using a mix of the two methods
+ * will likely cause either source level incompatibility or binary
+ * incompatibility in the future.
+ *
+ * \par Settings Attribute Types and Values
+ *
+ *
+ * \par Example:
+ * \code
+ * // Initialize
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ *
+ * // Configure the Attributes
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF880000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example";
+ * \endcode
+ *
+ * In the example the caller does not have to set the value of
+ * \ref ::nvtxEventAttributes_v2::category or
+ * \ref ::nvtxEventAttributes_v2::payload as these fields were set to
+ * the default value by {0}.
+ * \sa
+ * ::nvtxDomainMarkEx
+ * ::nvtxDomainRangeStartEx
+ * ::nvtxDomainRangePushEx
+ */
+typedef struct nvtxEventAttributes_v2
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of the event attribute
+    * structure used to specify the event.
+    */
+    uint16_t size;
+
+    /**
+     * \brief ID of the category the event is assigned to.
+     *
+     * A category is a user-controlled ID that can be used to group
+     * events.  The tool may use category IDs to improve filtering or
+     * enable grouping of events in the same category. The functions
+     * \ref ::nvtxNameCategoryA or \ref ::nvtxNameCategoryW can be used
+     * to name a category.
+     *
+     * Default Value is 0
+     */
+    uint32_t category;
+
+    /** \brief Color type specified in this attribute structure.
+     *
+     * Defines the color format of the attribute structure's \ref COLOR_FIELD
+     * "color" field.
+     *
+     * Default Value is NVTX_COLOR_UNKNOWN
+     */
+    int32_t colorType;              /* nvtxColorType_t */
+
+    /** \brief Color assigned to this event. \anchor COLOR_FIELD
+     *
+     * The color that the tool should use to visualize the event.
+     */
+    uint32_t color;
+
+    /**
+     * \brief Payload type specified in this attribute structure.
+     *
+     * Defines the payload format of the attribute structure's \ref PAYLOAD_FIELD
+     * "payload" field.
+     *
+     * Default Value is NVTX_PAYLOAD_UNKNOWN
+     */
+    int32_t payloadType;            /* nvtxPayloadType_t */
+
+    int32_t reserved0;
+
+    /**
+     * \brief Payload assigned to this event. \anchor PAYLOAD_FIELD
+     *
+     * A numerical value that can be used to annotate an event. The tool could
+     * use the payload data to reconstruct graphs and diagrams.
+     */
+    union payload_t
+    {
+        uint64_t ullValue;
+        int64_t llValue;
+        double dValue;
+        /* NVTX_VERSION_2 */
+        uint32_t uiValue;
+        int32_t iValue;
+        float fValue;
+    } payload;
+
+    /** \brief Message type specified in this attribute structure.
+     *
+     * Defines the message format of the attribute structure's \ref MESSAGE_FIELD
+     * "message" field.
+     *
+     * Default Value is NVTX_MESSAGE_UNKNOWN
+     */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure. \anchor MESSAGE_FIELD
+     *
+     * The text message that is attached to an event.
+     */
+    nvtxMessageValue_t message;
+
+} nvtxEventAttributes_v2;
+
+typedef struct nvtxEventAttributes_v2 nvtxEventAttributes_t;
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup MARKERS_AND_RANGES Markers and Ranges
+ *
+ * See \ref MARKERS_AND_RANGES for more details
+ *
+ * @{
+ */
+
+/** \name Marker */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+*
+* A marker can contain a text message or specify additional information
+* using the event attributes structure.  These attributes include a text
+* message, color, category, and a payload. Each of the attributes is optional
+* and can only be sent out using the \ref nvtxDomainMarkEx function.
+*
+* nvtxDomainMarkEx(NULL, event) is equivalent to calling
+* nvtxMarkEx(event).
+*
+* \param domain    - The domain of scoping the category.
+* \param eventAttrib - The event attribute structure defining the marker's
+* attribute types and attribute values.
+*
+* \sa
+* ::nvtxMarkEx
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainMarkEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+ *
+ * A marker can contain a text message or specify additional information
+ * using the event attributes structure.  These attributes include a text
+ * message, color, category, and a payload. Each of the attributes is optional
+ * and can only be sent out using the \ref nvtxMarkEx function.
+ * If \ref nvtxMarkA or \ref nvtxMarkW are used to specify the marker
+ * or if an attribute is unspecified then a default value will be used.
+ *
+ * \param eventAttrib - The event attribute structure defining the marker's
+ * attribute types and attribute values.
+ *
+ * \par Example:
+ * \code
+ * // zero the structure
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * // set the version and the size information
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * // configure the attributes.  0 is the default for all attributes.
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF880000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example nvtxMarkEx";
+ * nvtxMarkEx(&eventAttrib);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainMarkEx
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxMarkEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+ *
+ * A marker created using \ref nvtxMarkA or \ref nvtxMarkW contains only a
+ * text message.
+ *
+ * \param message     - The message associated to this marker event.
+ *
+ * \par Example:
+ * \code
+ * nvtxMarkA("Example nvtxMarkA");
+ * nvtxMarkW(L"Example nvtxMarkW");
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainMarkEx
+ * ::nvtxMarkEx
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxMarkA(const char* message);
+NVTX_DECLSPEC void NVTX_API nvtxMarkW(const wchar_t* message);
+/** @} */
+
+
+/** \name Process Ranges */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range in a domain.
+*
+* \param domain    - The domain of scoping the category.
+* \param eventAttrib - The event attribute structure defining the range's
+* attribute types and attribute values.
+*
+* \return The unique ID used to correlate a pair of Start and End events.
+*
+* \remarks Ranges defined by Start/End can overlap.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("my domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "my range";
+* nvtxRangeId_t rangeId = nvtxDomainRangeStartEx(&eventAttrib);
+* // ...
+* nvtxDomainRangeEnd(rangeId);
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangeEnd
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxDomainRangeStartEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range.
+ *
+ * \param eventAttrib - The event attribute structure defining the range's
+ * attribute types and attribute values.
+ *
+ * \return The unique ID used to correlate a pair of Start and End events.
+ *
+ * \remarks Ranges defined by Start/End can overlap.
+ *
+ * \par Example:
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * eventAttrib.category = 3;
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF0088FF;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example Range";
+ * nvtxRangeId_t rangeId = nvtxRangeStartEx(&eventAttrib);
+ * // ...
+ * nvtxRangeEnd(rangeId);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangeEnd
+ * ::nvtxDomainRangeStartEx
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range.
+ *
+ * \param message     - The event message associated to this range event.
+ *
+ * \return The unique ID used to correlate a pair of Start and End events.
+ *
+ * \remarks Ranges defined by Start/End can overlap.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangeId_t r1 = nvtxRangeStartA("Range 1");
+ * nvtxRangeId_t r2 = nvtxRangeStartW(L"Range 2");
+ * nvtxRangeEnd(r1);
+ * nvtxRangeEnd(r2);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangeEnd
+ * ::nvtxRangeStartEx
+ * ::nvtxDomainRangeStartEx
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartA(const char* message);
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartW(const wchar_t* message);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a process range.
+*
+* \param domain - The domain 
+* \param id - The correlation ID returned from a nvtxRangeStart call.
+*
+* \remarks This function is offered completeness but is an alias for ::nvtxRangeEnd. 
+* It does not need a domain param since that is associated iwth the range ID at ::nvtxDomainRangeStartEx
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("my domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "my range";
+* nvtxRangeId_t rangeId = nvtxDomainRangeStartEx(&eventAttrib);
+* // ...
+* nvtxDomainRangeEnd(rangeId);
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangeStartEx
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainRangeEnd(nvtxDomainHandle_t domain, nvtxRangeId_t id);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a process range.
+ *
+ * \param id - The correlation ID returned from an nvtxRangeStart call.
+ *
+ * \sa
+ * ::nvtxDomainRangeStartEx
+ * ::nvtxRangeStartEx
+ * ::nvtxRangeStartA
+ * ::nvtxRangeStartW
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxRangeEnd(nvtxRangeId_t id);
+/** @} */
+
+/** \name Thread Ranges */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+*
+* \param domain    - The domain of scoping.
+* \param eventAttrib - The event attribute structure defining the range's
+* attribute types and attribute values.
+*
+* \return The 0 based level of range being started. This value is scoped to the domain.
+* If an error occurs, a negative value is returned.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.colorType = NVTX_COLOR_ARGB;
+* eventAttrib.color = 0xFFFF0000;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "Level 0";
+* nvtxDomainRangePushEx(domain, &eventAttrib);
+*
+* // Re-use eventAttrib
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_UNICODE;
+* eventAttrib.message.unicode = L"Level 1";
+* nvtxDomainRangePushEx(domain, &eventAttrib);
+*
+* nvtxDomainRangePop(domain); //level 1
+* nvtxDomainRangePop(domain); //level 0
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangePop
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePushEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+ *
+ * \param eventAttrib - The event attribute structure defining the range's
+ * attribute types and attribute values.
+ *
+ * \return The 0 based level of range being started. This level is per domain.
+ * If an error occurs a negative value is returned.
+ *
+ * \par Example:
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFFFF0000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Level 0";
+ * nvtxRangePushEx(&eventAttrib);
+ *
+ * // Re-use eventAttrib
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_UNICODE;
+ * eventAttrib.message.unicode = L"Level 1";
+ * nvtxRangePushEx(&eventAttrib);
+ *
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainRangePushEx
+ * ::nvtxRangePop
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePushEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+ *
+ * \param message     - The event message associated to this range event.
+ *
+ * \return The 0 based level of range being started.  If an error occurs a
+ * negative value is returned.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangePushA("Level 0");
+ * nvtxRangePushW(L"Level 1");
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainRangePushEx
+ * ::nvtxRangePop
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePushA(const char* message);
+NVTX_DECLSPEC int NVTX_API nvtxRangePushW(const wchar_t* message);
+/** @} */
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a nested thread range.
+*
+* \return The level of the range being ended. If an error occurs a negative
+* value is returned on the current thread.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreate("example library");
+* nvtxDomainRangePushA(domain, "Level 0");
+* nvtxDomainRangePushW(domain, L"Level 1");
+* nvtxDomainRangePop(domain);
+* nvtxDomainRangePop(domain);
+* \endcode
+*
+* \sa
+* ::nvtxRangePushEx
+* ::nvtxRangePushA
+* ::nvtxRangePushW
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePop(nvtxDomainHandle_t domain);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a nested thread range.
+ *
+ * \return The level of the range being ended. If an error occurs a negative
+ * value is returned on the current thread.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangePushA("Level 0");
+ * nvtxRangePushW(L"Level 1");
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangePushEx
+ * ::nvtxRangePushA
+ * ::nvtxRangePushW
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePop(void);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup RESOURCE_NAMING Resource Naming
+ *
+ * See \ref RESOURCE_NAMING for more details
+ *
+ * @{
+ */
+
+
+/*  ------------------------------------------------------------------------- */
+/** \name Functions for Generic Resource Naming*/
+/*  ------------------------------------------------------------------------- */
+
+/*  ------------------------------------------------------------------------- */
+/** \cond SHOW_HIDDEN
+* \brief Resource typing helpers.  
+*
+* Classes are used to make it easy to create a series of resource types 
+* per API without collisions 
+*/
+#define NVTX_RESOURCE_MAKE_TYPE(CLASS, INDEX) ((((uint32_t)(NVTX_RESOURCE_CLASS_ ## CLASS))<<16)|((uint32_t)(INDEX)))
+#define NVTX_RESOURCE_CLASS_GENERIC 1
+/** \endcond */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Generic resource type for when a resource class is not available.
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*
+* \version \NVTX_VERSION_2
+*/
+typedef enum nvtxResourceGenericType_t
+{
+    NVTX_RESOURCE_TYPE_UNKNOWN = 0,
+    NVTX_RESOURCE_TYPE_GENERIC_POINTER = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 1), /**< Generic pointer assumed to have no collisions with other pointers. */
+    NVTX_RESOURCE_TYPE_GENERIC_HANDLE = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 2), /**< Generic handle assumed to have no collisions with other handles. */
+    NVTX_RESOURCE_TYPE_GENERIC_THREAD_NATIVE = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 3), /**< OS native thread identifier. */
+    NVTX_RESOURCE_TYPE_GENERIC_THREAD_POSIX = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 4) /**< POSIX pthread identifier. */
+} nvtxResourceGenericType_t;
+
+
+
+/** \brief Resource Attribute Structure.
+* \anchor RESOURCE_ATTRIBUTE_STRUCTURE
+*
+* This structure is used to describe the attributes of a resource. The layout of
+* the structure is defined by a specific version of the tools extension
+* library and can change between different versions of the Tools Extension
+* library.
+*
+* \par Initializing the Attributes
+*
+* The caller should always perform the following three tasks when using
+* attributes:
+* <ul>
+*    <li>Zero the structure
+*    <li>Set the version field
+*    <li>Set the size field
+* </ul>
+*
+* Zeroing the structure sets all the resource attributes types and values
+* to the default value.
+*
+* The version and size field are used by the Tools Extension
+* implementation to handle multiple versions of the attributes structure.
+*
+* It is recommended that the caller use one of the following to methods
+* to initialize the event attributes structure:
+*
+* \par Method 1: Initializing nvtxEventAttributes for future compatibility
+* \code
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* \endcode
+*
+* \par Method 2: Initializing nvtxEventAttributes for a specific version
+* \code
+* nvtxResourceAttributes_v0 attribs = {0};
+* attribs.version = 2;
+* attribs.size = (uint16_t)(sizeof(nvtxResourceAttributes_v0));
+* \endcode
+*
+* If the caller uses Method 1 it is critical that the entire binary
+* layout of the structure be configured to 0 so that all fields
+* are initialized to the default value.
+*
+* The caller should either use both NVTX_VERSION and
+* NVTX_RESOURCE_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+* and a versioned type (Method 2).  Using a mix of the two methods
+* will likely cause either source level incompatibility or binary
+* incompatibility in the future.
+*
+* \par Settings Attribute Types and Values
+*
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+*
+* // Initialize
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+*
+* // Configure the Attributes
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+*
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* \endcode
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*/
+typedef struct nvtxResourceAttributes_v0
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of this attribute
+    * structure.
+    */
+    uint16_t size;
+
+    /**
+    * \brief Identifier type specifies how to interpret the identifier field
+    *
+    * Defines the identifier format of the attribute structure's \ref RESOURCE_IDENTIFIER_FIELD
+    * "identifier" field.
+    *
+    * Default Value is NVTX_RESOURCE_TYPE_UNKNOWN
+    */
+    int32_t identifierType;            /* values from enums following the pattern nvtxResource[name]Type_t */
+
+    /**
+    * \brief Identifier for the resource. 
+    * \anchor RESOURCE_IDENTIFIER_FIELD
+    *
+    * An identifier may be a pointer or a handle to an OS or middleware API object.
+    * The resource type will assist in avoiding collisions where handles values may collide.
+    */
+    union identifier_t
+    {
+        const void* pValue;
+        uint64_t ullValue;
+    } identifier;
+
+    /** \brief Message type specified in this attribute structure.
+    *
+    * Defines the message format of the attribute structure's \ref RESOURCE_MESSAGE_FIELD
+    * "message" field.
+    *
+    * Default Value is NVTX_MESSAGE_UNKNOWN
+    */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure. \anchor RESOURCE_MESSAGE_FIELD
+    *
+    * The text message that is attached to a resource.
+    */
+    nvtxMessageValue_t message;
+
+} nvtxResourceAttributes_v0;
+
+typedef struct nvtxResourceAttributes_v0 nvtxResourceAttributes_t;
+
+/* \cond SHOW_HIDDEN 
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxResourceAttributes_v0) ) )
+typedef struct nvtxResourceHandle* nvtxResourceHandle_t;
+/** \endcond */
+
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Create a resource object to track and associate data with OS and middleware objects
+*
+* Allows users to associate an API handle or pointer with a user-provided name.
+* 
+*
+* \param domain - Domain to own the resource object
+* \param attribs - Attributes to be associated with the resource
+*
+* \return A handle that represents the newly created resource object.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* \endcode
+*
+* \sa
+* ::nvtxResourceAttributes_t
+* ::nvtxDomainResourceDestroy
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxResourceHandle_t NVTX_API nvtxDomainResourceCreate(nvtxDomainHandle_t domain, nvtxResourceAttributes_t* attribs);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Destroy a resource object to track and associate data with OS and middleware objects
+*
+* Allows users to associate an API handle or pointer with a user-provided name.
+*
+* \param resource - Handle to the resource in which to operate.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* nvtxDomainResourceDestroy(handle);
+* \endcode
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainResourceDestroy(nvtxResourceHandle_t resource);
+/** @} */
+
+
+/** \name Functions for NVTX Category Naming*/
+
+/* ------------------------------------------------------------------------- */
+/**
+* \brief Annotate an NVTX category used within a domain.
+*
+* Categories are used to group sets of events. Each category is identified
+* through a unique ID and that ID is passed into any of the marker/range
+* events to assign that event to a specific category. The nvtxDomainNameCategory
+* function calls allow the user to assign a name to a category ID that is
+* specific to the domain.
+*
+* nvtxDomainNameCategory(NULL, category, name) is equivalent to calling
+* nvtxNameCategory(category, name).
+*
+* \param domain    - The domain of scoping the category.
+* \param category  - The category ID to name.
+* \param name      - The name of the category.
+*
+* \remarks The category names are tracked per domain.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example");
+* nvtxDomainNameCategoryA(domain, 1, "Memory Allocation");
+* nvtxDomainNameCategoryW(domain, 2, L"Memory Transfer");
+* \endcode
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryA(nvtxDomainHandle_t domain, uint32_t category, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryW(nvtxDomainHandle_t domain, uint32_t category, const wchar_t* name);
+/** @} */
+
+/** \brief Annotate an NVTX category.
+ *
+ * Categories are used to group sets of events. Each category is identified
+ * through a unique ID and that ID is passed into any of the marker/range
+ * events to assign that event to a specific category. The nvtxNameCategory
+ * function calls allow the user to assign a name to a category ID.
+ *
+ * \param category - The category ID to name.
+ * \param name     - The name of the category.
+ *
+ * \remarks The category names are tracked per process.
+ *
+ * \par Example:
+ * \code
+ * nvtxNameCategory(1, "Memory Allocation");
+ * nvtxNameCategory(2, "Memory Transfer");
+ * nvtxNameCategory(3, "Memory Object Lifetime");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryA(uint32_t category, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryW(uint32_t category, const wchar_t* name);
+/** @} */
+
+/** \name Functions for OS Threads Naming*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotate an OS thread.
+ *
+ * Allows the user to name an active thread of the current process. If an
+ * invalid thread ID is provided or a thread ID from a different process is
+ * used the behavior of the tool is implementation dependent.
+ *
+ * The thread name is associated to the default domain.  To support domains 
+ * use resource objects via ::nvtxDomainResourceCreate.
+ *
+ * \param threadId - The ID of the thread to name.
+ * \param name     - The name of the thread.
+ *
+ * \par Example:
+ * \code
+ * nvtxNameOsThread(GetCurrentThreadId(), "MAIN_THREAD");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadA(uint32_t threadId, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadW(uint32_t threadId, const wchar_t* name);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup STRING_REGISTRATION String Registration
+*
+* Registered strings are intended to increase performance by lowering instrumentation
+* overhead.  String may be registered once and the handle may be passed in place of
+* a string where an the APIs may allow.
+*
+* See \ref STRING_REGISTRATION for more details
+*
+* @{
+*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Register a string.
+
+* Registers an immutable string with NVTX. Once registered the pointer used
+* to register the domain name can be used in nvtxEventAttributes_t
+* \ref MESSAGE_FIELD. This allows NVTX implementation to skip copying the
+* contents of the message on each event invocation.
+*
+* String registration is an optimization. It is recommended to use string
+* registration if the string will be passed to an event many times.
+*
+* String are not unregistered, except that by unregistering the entire domain
+*
+* \param domain  - Domain handle. If NULL then the global domain is used.
+* \param string    - A unique pointer to a sequence of characters.
+*
+* \return A handle representing the registered string.
+*
+* \par Example:
+* \code
+* nvtxDomainCreateA("com.nvidia.nvtx.example");
+* nvtxStringHandle_t message = nvtxDomainRegisterStringA(domain, "registered string");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_REGISTERED;
+* eventAttrib.message.registered = message;
+* \endcode
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringA(nvtxDomainHandle_t domain, const char* string);
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringW(nvtxDomainHandle_t domain, const wchar_t* string);
+/** @} */
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup DOMAINS Domains
+*
+* Domains are used to group events to a developer defined scope. Middleware
+* vendors may also scope their own events to avoid collisions with the
+* the application developer's events, so that the application developer may
+* inspect both parts and easily differentiate or filter them.  By default
+* all events are scoped to a global domain where NULL is provided or when
+* using APIs provided b versions of NVTX below v2
+*
+* Domains are intended to be typically long lived objects with the intention
+* of logically separating events of large modules from each other such as
+* middleware libraries from each other and the main application.
+*
+* See \ref DOMAINS for more details
+*
+* @{
+*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Register a NVTX domain.
+*
+* Domains are used to scope annotations. All NVTX_VERSION_0 and NVTX_VERSION_1
+* annotations are scoped to the global domain. The function nvtxDomainCreate
+* creates a new named domain.
+*
+* Each domain maintains its own nvtxRangePush and nvtxRangePop stack.
+*
+* \param name - A unique string representing the domain.
+*
+* \return A handle representing the domain.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("com.nvidia.nvtx.example");
+*
+* nvtxMarkA("nvtxMarkA to global domain");
+*
+* nvtxEventAttributes_t eventAttrib1 = {0};
+* eventAttrib1.version = NVTX_VERSION;
+* eventAttrib1.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib1.message.ascii = "nvtxDomainMarkEx to global domain";
+* nvtxDomainMarkEx(NULL, &eventAttrib1);
+*
+* nvtxEventAttributes_t eventAttrib2 = {0};
+* eventAttrib2.version = NVTX_VERSION;
+* eventAttrib2.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib2.message.ascii = "nvtxDomainMarkEx to com.nvidia.nvtx.example";
+* nvtxDomainMarkEx(domain, &eventAttrib2);
+* nvtxDomainDestroy(domain);
+* \endcode
+*
+* \sa
+* ::nvtxDomainDestroy
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateA(const char* name);
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateW(const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Unregister a NVTX domain.
+*
+* Unregisters the domain handle and frees all domain specific resources.
+*
+* \param domain    - the domain handle
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("com.nvidia.nvtx.example");
+* nvtxDomainDestroy(domain);
+* \endcode
+*
+* \sa
+* ::nvtxDomainCreateA
+* ::nvtxDomainCreateW
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainDestroy(nvtxDomainHandle_t domain);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \cond SHOW_HIDDEN */
+
+#ifdef UNICODE
+    #define nvtxMark            nvtxMarkW
+    #define nvtxRangeStart      nvtxRangeStartW
+    #define nvtxRangePush       nvtxRangePushW
+    #define nvtxNameCategory    nvtxNameCategoryW
+    #define nvtxNameOsThread    nvtxNameOsThreadW
+    /* NVTX_VERSION_2 */
+    #define nvtxDomainCreate         nvtxDomainCreateW
+    #define nvtxDomainRegisterString nvtxDomainRegisterStringW
+    #define nvtxDomainNameCategory   nvtxDomainNameCategoryW
+#else
+    #define nvtxMark            nvtxMarkA
+    #define nvtxRangeStart      nvtxRangeStartA
+    #define nvtxRangePush       nvtxRangePushA
+    #define nvtxNameCategory    nvtxNameCategoryA
+    #define nvtxNameOsThread    nvtxNameOsThreadA
+    /* NVTX_VERSION_2 */
+    #define nvtxDomainCreate         nvtxDomainCreateA
+    #define nvtxDomainRegisterString nvtxDomainRegisterStringA
+    #define nvtxDomainNameCategory   nvtxDomainNameCategoryA    
+#endif
+
+/** \endcond */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* NVTOOLSEXT_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvToolsExtCuda.h

@@ -0,0 +1,164 @@
+/*
+* Copyright 2009-2017  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTOOLSEXT_CUDA_H_
+#define NVTOOLSEXT_CUDA_H_
+
+#include "cuda.h"
+
+#include "nvToolsExt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for CUDA Resource Naming
+*/
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_CUDA CUDA Resource Naming
+ *
+ * This section covers the API functions that allow to annotate CUDA resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_CUDA  4
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for CUDA
+*/
+typedef enum nvtxResourceCUDAType_t
+{
+    NVTX_RESOURCE_TYPE_CUDA_DEVICE = NVTX_RESOURCE_MAKE_TYPE(CUDA, 1), /* CUdevice */
+    NVTX_RESOURCE_TYPE_CUDA_CONTEXT = NVTX_RESOURCE_MAKE_TYPE(CUDA, 2), /* CUcontext */
+    NVTX_RESOURCE_TYPE_CUDA_STREAM = NVTX_RESOURCE_MAKE_TYPE(CUDA, 3), /* CUstream */
+    NVTX_RESOURCE_TYPE_CUDA_EVENT = NVTX_RESOURCE_MAKE_TYPE(CUDA, 4)  /* CUevent */
+} nvtxResourceCUDAType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA device.
+ *
+ * Allows the user to associate a CUDA device with a user-provided name.
+ *
+ * \param device - The handle of the CUDA device to name.
+ * \param name   - The name of the CUDA device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceA(CUdevice device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceW(CUdevice device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA context.
+ *
+ * Allows the user to associate a CUDA context with a user-provided name.
+ *
+ * \param context - The handle of the CUDA context to name.
+ * \param name    - The name of the CUDA context.
+ *
+ * \par Example:
+ * \code
+ * CUresult status = cuCtxCreate( &cuContext, 0, cuDevice );
+ * if ( CUDA_SUCCESS != status )
+ *     goto Error;
+ * nvtxNameCuContext(cuContext, "CTX_NAME");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextA(CUcontext context, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextW(CUcontext context, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA stream.
+ *
+ * Allows the user to associate a CUDA stream with a user-provided name.
+ *
+ * \param stream - The handle of the CUDA stream to name.
+ * \param name   - The name of the CUDA stream.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamA(CUstream stream, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamW(CUstream stream, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA event.
+ *
+ * Allows the user to associate a CUDA event with a user-provided name.
+ *
+ * \param event - The handle of the CUDA event to name.
+ * \param name  - The name of the CUDA event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventA(CUevent event, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventW(CUevent event, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameCuDevice   nvtxNameCuDeviceW
+  #define nvtxNameCuContext  nvtxNameCuContextW
+  #define nvtxNameCuStream   nvtxNameCuStreamW
+  #define nvtxNameCuEvent    nvtxNameCuEventW
+#else
+  #define nvtxNameCuDevice   nvtxNameCuDeviceA
+  #define nvtxNameCuContext  nvtxNameCuContextA
+  #define nvtxNameCuStream   nvtxNameCuStreamA
+  #define nvtxNameCuEvent    nvtxNameCuEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* NVTOOLSEXT_CUDA_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvToolsExtCudaRt.h

@@ -0,0 +1,140 @@
+/*
+* Copyright 2009-2017  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTOOLSEXT_CUDART_H_
+#define NVTOOLSEXT_CUDART_H_
+
+#include "cuda.h"
+#include "driver_types.h"
+
+#include "nvToolsExt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for CUDA Resource Naming
+*/
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_CUDART CUDA Runtime Resource Naming
+ *
+ * This section covers the API functions that allow to annotate CUDA resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_CUDART 5
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for CUDART
+*/
+typedef enum nvtxResourceCUDARTType_t
+{
+    NVTX_RESOURCE_TYPE_CUDART_DEVICE = NVTX_RESOURCE_MAKE_TYPE(CUDART, 0), /* int device */
+    NVTX_RESOURCE_TYPE_CUDART_STREAM = NVTX_RESOURCE_MAKE_TYPE(CUDART, 1), /* cudaStream_t */
+    NVTX_RESOURCE_TYPE_CUDART_EVENT = NVTX_RESOURCE_MAKE_TYPE(CUDART, 2)  /* cudaEvent_t */
+} nvtxResourceCUDARTType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA device.
+ *
+ * Allows the user to associate a CUDA device with a user-provided name.
+ *
+ * \param device - The id of the CUDA device to name.
+ * \param name   - The name of the CUDA device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceA(int device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceW(int device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA stream.
+ *
+ * Allows the user to associate a CUDA stream with a user-provided name.
+ *
+ * \param stream - The handle of the CUDA stream to name.
+ * \param name   - The name of the CUDA stream.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamA(cudaStream_t stream, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamW(cudaStream_t stream, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA event.
+ *
+ * Allows the user to associate a CUDA event with a user-provided name.
+ *
+ * \param event - The handle of the CUDA event to name.
+ * \param name  - The name of the CUDA event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventA(cudaEvent_t event, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventW(cudaEvent_t event, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameCudaDevice nvtxNameCudaDeviceW
+  #define nvtxNameCudaStream nvtxNameCudaStreamW
+  #define nvtxNameCudaEvent  nvtxNameCudaEventW
+#else
+  #define nvtxNameCudaDevice nvtxNameCudaDeviceA
+  #define nvtxNameCudaStream nvtxNameCudaStreamA
+  #define nvtxNameCudaEvent  nvtxNameCudaEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* NVTOOLSEXT_CUDART_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvToolsExtOpenCL.h

@@ -0,0 +1,214 @@
+/*
+* Copyright 2009-2017 NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTOOLSEXT_OPENCL_H_
+#define NVTOOLSEXT_OPENCL_H_
+
+#include <CL/cl.h>
+
+#include "nvToolsExt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for OpenCL Resource Naming
+ */
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_OPENCL OpenCL Resource Naming
+ *
+ * This section covers the API functions that allow to annotate OpenCL resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_OPENCL 6 
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for OpenCL
+*/
+typedef enum nvtxResourceOpenCLType_t
+{
+    NVTX_RESOURCE_TYPE_OPENCL_DEVICE = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 1),
+    NVTX_RESOURCE_TYPE_OPENCL_CONTEXT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 2),
+    NVTX_RESOURCE_TYPE_OPENCL_COMMANDQUEUE = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 3),
+    NVTX_RESOURCE_TYPE_OPENCL_MEMOBJECT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 4),
+    NVTX_RESOURCE_TYPE_OPENCL_SAMPLER = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 5),
+    NVTX_RESOURCE_TYPE_OPENCL_PROGRAM = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 6),
+    NVTX_RESOURCE_TYPE_OPENCL_EVENT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 7)
+} nvtxResourceOpenCLType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL device.
+ *
+ * Allows to associate an OpenCL device with a user-provided name.
+ *
+ * \param device - The handle of the OpenCL device to name.
+ * \param name   - The name of the OpenCL device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClDeviceA(cl_device_id device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClDeviceW(cl_device_id device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL context.
+ *
+ * Allows to associate an OpenCL context with a user-provided name.
+ *
+ * \param context - The handle of the OpenCL context to name.
+ * \param name    - The name of the OpenCL context.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClContextA(cl_context context, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClContextW(cl_context context, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL command queue.
+ *
+ * Allows to associate an OpenCL command queue with a user-provided name.
+ *
+ * \param command_queue - The handle of the OpenCL command queue to name.
+ * \param name          - The name of the OpenCL command queue.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClCommandQueueA(cl_command_queue command_queue, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClCommandQueueW(cl_command_queue command_queue, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL memory object.
+ *
+ * Allows to associate an OpenCL memory object with a user-provided name.
+ *
+ * \param memobj - The handle of the OpenCL memory object to name.
+ * \param name   - The name of the OpenCL memory object.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClMemObjectA(cl_mem memobj, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClMemObjectW(cl_mem memobj, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL sampler.
+ *
+ * Allows to associate an OpenCL sampler with a user-provided name.
+ *
+ * \param sampler - The handle of the OpenCL sampler to name.
+ * \param name    - The name of the OpenCL sampler.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClSamplerA(cl_sampler sampler, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClSamplerW(cl_sampler sampler, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL program.
+ *
+ * Allows to associate an OpenCL program with a user-provided name.
+ *
+ * \param program - The handle of the OpenCL program to name.
+ * \param name    - The name of the OpenCL program.
+ *
+ * \code
+ * cpProgram = clCreateProgramWithSource(cxGPUContext, 1,
+ *     (const char **) &cSourceCL, &program_length, &ciErrNum);
+ * shrCheckErrorEX(ciErrNum, CL_SUCCESS, pCleanup);
+ * nvtxNameClProgram(cpProgram, L"PROGRAM_NAME");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClProgramA(cl_program program, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClProgramW(cl_program program, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL event.
+ *
+ * Allows to associate an OpenCL event with a user-provided name.
+ *
+ * \param evnt - The handle of the OpenCL event to name.
+ * \param name - The name of the OpenCL event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClEventA(cl_event evnt, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClEventW(cl_event evnt, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameClDevice        nvtxNameClDeviceW
+  #define nvtxNameClContext       nvtxNameClContextW
+  #define nvtxNameClCommandQueue  nvtxNameClCommandQueueW
+  #define nvtxNameClMemObject     nvtxNameClMemObjectW
+  #define nvtxNameClSampler       nvtxNameClSamplerW
+  #define nvtxNameClProgram       nvtxNameClProgramW
+  #define nvtxNameClEvent         nvtxNameClEventW
+#else
+  #define nvtxNameClDevice        nvtxNameClDeviceA
+  #define nvtxNameClContext       nvtxNameClContextA
+  #define nvtxNameClCommandQueue  nvtxNameClCommandQueueA
+  #define nvtxNameClMemObject     nvtxNameClMemObjectA
+  #define nvtxNameClSampler       nvtxNameClSamplerA
+  #define nvtxNameClProgram       nvtxNameClProgramA
+  #define nvtxNameClEvent         nvtxNameClEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* NVTOOLSEXT_OPENCL_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvToolsExtSync.h

@@ -0,0 +1,406 @@
+/*
+* Copyright 2009-2017  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTOOLSEXT_SYNC_H_
+#define NVTOOLSEXT_SYNC_H_
+
+#include "nvToolsExt.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* \cond SHOW_HIDDEN 
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxSyncUserAttributes_v0) ) )
+/** \endcond */
+
+
+/** 
+* \page PAGE_SYNCHRONIZATION Synchronization
+*
+* This section covers a subset of the API that allow users to track additional
+* synchronization details of their application.   Naming OS synchronization primitives 
+* may allow users to better understand the data collected by traced synchronization 
+* APIs.  Additionally, a user defined synchronization object can allow the users to
+* to tell the tools when the user is building their own synchronization system
+* that do not rely on the OS to provide behaviors and instead use techniques like
+* atomic operations and spinlocks.  
+*
+* See module \ref SYNCHRONIZATION for details.
+*
+* \par Example:
+* \code
+* class MyMutex
+* {
+*     volatile long bLocked;
+*     nvtxSyncUser_t hSync;
+* public:
+*     MyMutex(const char* name, nvtxDomainHandle_t d){
+*          bLocked = 0;
+*
+*          nvtxSyncUserAttributes_t attribs = { 0 };
+*          attribs.version = NVTX_VERSION;
+*          attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+*          attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+*          attribs.message.ascii = name;
+*          hSync = nvtxDomainSyncUserCreate(d, &attribs);
+*     }
+*
+*     ~MyMutex() {
+*          nvtxDomainSyncUserDestroy(hSync);
+*     }
+*
+*     bool Lock() {
+*          nvtxDomainSyncUserAcquireStart(hSync);
+*          bool acquired = __sync_bool_compare_and_swap(&bLocked, 0, 1);//atomic compiler intrinsic 
+
+*          if (acquired) {
+*              nvtxDomainSyncUserAcquireSuccess(hSync);
+*          }
+*          else {
+*              nvtxDomainSyncUserAcquireFailed(hSync);
+*          }
+*          return acquired;
+*     }
+
+*     void Unlock() {
+*          nvtxDomainSyncUserReleasing(hSync);
+*          bLocked = false;
+*     }
+* };
+* \endcode
+* 
+* \version \NVTX_VERSION_2
+*/
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_SYNC_OS 2 /**< Synchronization objects that are OS specific. */
+#define NVTX_RESOURCE_CLASS_SYNC_PTHREAD 3 /**< Synchronization objects that are from the POSIX Threads API (pthread)*/
+/** \endcond */
+
+
+/*  ------------------------------------------------------------------------- */
+/** \defgroup SYNCHRONIZATION Synchronization
+* See page \ref PAGE_SYNCHRONIZATION.
+* @{
+*/
+
+/** \brief Resource type values for OSs with POSIX Thread API support
+ */
+typedef enum nvtxResourceSyncPosixThreadType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 1), /* pthread_mutex_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_CONDITION = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 2), /* pthread_cond_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_RWLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 3), /* pthread_rwlock_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_BARRIER = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 4), /* pthread_barrier_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_SPINLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 5), /* pthread_spinlock_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_ONCE = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 6) /* pthread_once_t  */
+} nvtxResourceSyncPosixThreadType_t;
+
+/** \brief Resource type values for Windows OSs
+*/
+typedef enum nvtxResourceSyncWindowsType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 1),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_SEMAPHORE = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 2),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_EVENT = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 3),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_CRITICAL_SECTION = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 4),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_SRWLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 5)
+} nvtxResourceSyncWindowsType_t;
+
+/** \brief Resource type values for Linux and Linux derived OSs such as Android
+* \sa
+* ::nvtxResourceSyncPosixThreadType_t
+*/
+typedef enum nvtxResourceSyncLinuxType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 1),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_FUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 2),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SEMAPHORE = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 3),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_COMPLETION = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 4),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SPINLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 5),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SEQLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 6),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_RCU = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 7)
+} nvtxResourceSyncLinuxType_t;
+
+/** \brief Resource type values for Android come from Linux.
+* \sa
+* ::nvtxResourceSyncLinuxType_t
+* ::nvtxResourceSyncPosixThreadType_t
+*/
+typedef enum nvtxResourceSyncLinuxType_t nvtxResourceSyncAndroidType_t;
+
+/** \brief User Defined Synchronization Object Handle .
+* \anchor SYNCUSER_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a user defined syncrhonization object.  The tools will return a pointer through the API for the application
+* to hold on it's behalf to reference the string in the future.
+*
+*/
+typedef struct nvtxSyncUser* nvtxSyncUser_t;
+
+/** \brief User Defined Synchronization Object Attributes Structure.
+* \anchor USERDEF_SYNC_ATTRIBUTES_STRUCTURE
+*
+* This structure is used to describe the attributes of a user defined synchronization 
+* object.  The layout of the structure is defined by a specific version of the tools 
+* extension library and can change between different versions of the Tools Extension
+* library.
+*
+* \par Initializing the Attributes
+*
+* The caller should always perform the following three tasks when using
+* attributes:
+* <ul>
+*    <li>Zero the structure
+*    <li>Set the version field
+*    <li>Set the size field
+* </ul>
+*
+* Zeroing the structure sets all the event attributes types and values
+* to the default value.
+*
+* The version and size field are used by the Tools Extension
+* implementation to handle multiple versions of the attributes structure.
+*
+* It is recommended that the caller use one of the following to methods
+* to initialize the event attributes structure:
+*
+* \par Method 1: Initializing nvtxEventAttributes for future compatibility
+* \code
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+* \endcode
+*
+* \par Method 2: Initializing nvtxSyncUserAttributes_t for a specific version
+* \code
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = 1;
+* attribs.size = (uint16_t)(sizeof(nvtxSyncUserAttributes_t));
+* \endcode
+*
+* If the caller uses Method 1 it is critical that the entire binary
+* layout of the structure be configured to 0 so that all fields
+* are initialized to the default value.
+*
+* The caller should either use both NVTX_VERSION and
+* NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+* and a versioned type (Method 2).  Using a mix of the two methods
+* will likely cause either source level incompatibility or binary
+* incompatibility in the future.
+*
+* \par Settings Attribute Types and Values
+*
+*
+* \par Example:
+* \code
+* // Initialize
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+*
+* // Configure the Attributes
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Example";
+* \endcode
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+*/
+typedef struct nvtxSyncUserAttributes_v0
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of the event attribute
+    * structure used to specify the event.
+    */
+    uint16_t size;
+
+    /** \brief Message type specified in this attribute structure.
+    *
+    * Defines the message format of the attribute structure's \ref nvtxSyncUserAttributes_v0::message
+    * "message" field.
+    *
+    * Default Value is NVTX_MESSAGE_UNKNOWN
+    */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure.
+    *
+    * The text message that is attached to an event.
+    */
+    nvtxMessageValue_t message;
+
+} nvtxSyncUserAttributes_v0;
+
+typedef struct nvtxSyncUserAttributes_v0 nvtxSyncUserAttributes_t;
+
+/* ------------------------------------------------------------------------- */
+/** \brief Create a user defined synchronization object 
+* This is used to track non-OS synchronization working with spinlocks and atomics
+*
+* \param domain - Domain to own the resource
+* \param attribs - A structure to assign multiple attributes to the object.
+*
+* \return A handle that represents the newly created user defined synchronization object.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC nvtxSyncUser_t NVTX_API nvtxDomainSyncUserCreate(nvtxDomainHandle_t domain, const nvtxSyncUserAttributes_t* attribs);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Destroy a user defined synchronization object
+* This is used to track non-OS synchronization working with spinlocks and atomics
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserDestroy(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools that an attempt to acquire a user defined synchronization object
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireStart(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of failure in acquiring a user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireStart
+* 
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireFailed(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of success in acquiring a user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireStart.
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireSuccess(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of releasing a reservation on user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireSuccess.
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserReleasing(nvtxSyncUser_t handle);
+
+
+/** @} */ /*END defgroup*/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* NVTOOLSEXT_SYNC_H_ */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvToolsExt.h

@@ -0,0 +1,1499 @@
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+/** \file nvToolsExt.h
+ */
+
+/* ========================================================================= */
+/** \mainpage
+ * \tableofcontents
+ * \section INTRODUCTION Introduction
+ *
+ * The NVIDIA Tools Extension library is a set of functions that a
+ * developer can use to provide additional information to tools.
+ * The additional information is used by the tool to improve
+ * analysis and visualization of data.
+ *
+ * The library introduces close to zero overhead if no tool is
+ * attached to the application.  The overhead when a tool is
+ * attached is specific to the tool.
+ *
+ * \section INITIALIZATION_SECTION Initialization
+ *
+ * Typically the tool's library that plugs into NVTX is indirectly 
+ * loaded via enviromental properties that are platform specific. 
+ * For some platform or special cases, the user may be required 
+ * to instead explicity initialize instead though.   This can also
+ * be helpful to control when the API loads a tool's library instead
+ * of what would typically be the first function call to emit info.
+ * For these rare case, see \ref INITIALIZATION for additional information.
+ *
+ * \section MARKERS_AND_RANGES Markers and Ranges
+ *
+ * Markers and ranges are used to describe events at a specific time (markers)
+ * or over a time span (ranges) during the execution of the application
+ * respectively. 
+ *
+ * \subsection MARKERS Markers
+ * 
+ * Markers denote specific moments in time.
+ * 
+ * 
+ * See \ref DOMAINS and \ref EVENT_ATTRIBUTES for additional information on
+ * how to specify the domain.
+ * 
+ * \subsection THREAD_RANGES Thread Ranges
+ *
+ * Thread ranges denote nested time ranges. Nesting is maintained per thread
+ * per domain and does not require any additional correlation mechanism. The
+ * duration of a thread range is defined by the corresponding pair of
+ * nvtxRangePush* to nvtxRangePop API calls.
+ *
+ * See \ref DOMAINS and \ref EVENT_ATTRIBUTES for additional information on
+ * how to specify the domain.
+ *
+ * \subsection PROCESS_RANGES Process Ranges
+ *
+ * Process ranges denote a time span that can expose arbitrary concurrency, as 
+ * opposed to thread ranges that only support nesting. In addition the range
+ * start event can happen on a different thread than the end marker. For the 
+ * correlation of a start/end pair an unique correlation ID is used that is
+ * returned from the start API call and needs to be passed into the end API
+ * call.
+ *
+ * \subsection EVENT_ATTRIBUTES Event Attributes
+ *
+ * \ref MARKERS_AND_RANGES can be annotated with various attributes to provide
+ * additional information for an event or to guide the tool's visualization of
+ * the data. Each of the attributes is optional and if left unused the
+ * attributes fall back to a default value. The attributes include:
+ * - color
+ * - category
+ *
+ * To specify any attribute other than the text message, the \ref
+ * EVENT_ATTRIBUTE_STRUCTURE "Event Attribute Structure" must be used.
+ *
+ * \section DOMAINS Domains
+ *
+ * Domains enable developers to scope annotations. By default all events and
+ * annotations are in the default domain. Additional domains can be registered.
+ * This allows developers to scope markers, ranges, and resources names to
+ * avoid conflicts.
+ *
+ * The function ::nvtxDomainCreateA or ::nvtxDomainCreateW is used to create
+ * a named domain.
+ * 
+ * Each domain maintains its own
+ * - categories
+ * - thread range stacks
+ * - registered strings
+ *
+ * The function ::nvtxDomainDestroy marks the end of the domain. Destroying 
+ * a domain unregisters and destroys all objects associated with it such as 
+ * registered strings, resource objects, named categories, and started ranges. 
+ *
+ * \section RESOURCE_NAMING Resource Naming
+ *
+ * This section covers calls that allow to annotate objects with user-provided
+ * names in order to allow for a better analysis of complex trace data. All of
+ * the functions take the handle or the ID of the object to name and the name.
+ * The functions can be called multiple times during the execution of an
+ * application, however, in that case it is implementation dependent which
+ * name will be reported by the tool.
+ * 
+ * \subsection CATEGORY_NAMING Category Naming
+ *
+ * Some function in this library support associating an integer category 
+ * to enable filtering and sorting.  The category naming functions allow 
+ * the application to associate a user friendly name with the integer 
+ * category.  Support for domains have been added in NVTX_VERSION_2 to 
+ * avoid collisions when domains are developed independantly. 
+ *
+ * \subsection RESOURCE_OBJECTS Resource Objects
+ *
+ * Resource objects are a generic mechanism for attaching data to an application 
+ * resource.  The identifier field makes the association to a pointer or handle, 
+ * while the type field helps provide deeper understanding of the identifier as 
+ * well as enabling differentiation in cases where handles generated by different
+ * APIs may collide.  The resource object may also have an associated message to
+ * associate with the application resource, enabling further annotation of this 
+ * object and how it is used.
+ * 
+ * The resource object was introduced in NVTX_VERSION_2 to supersede existing naming
+ * functions and allow the application resource identified by those functions to be
+ * associated to a domain.  The other naming functions are still supported for backward
+ * compatibility but will be associated only to the default domain.
+ *
+ * \subsection RESOURCE_NAMING_OS Resource Naming
+ * 
+ * Some operating system resources creation APIs do not support providing a user friendly 
+ * name, such as some OS thread creation APIs.  This API support resource naming though 
+ * both through resource objects and functions following the pattern 
+ * nvtxName[RESOURCE_TYPE][A|W](identifier, name).  Resource objects introduced in NVTX_VERSION 2 
+ * supersede the other functions with a a more general method of assigning names to OS resources,
+ * along with associating them to domains too.  The older nvtxName* functions are only associated 
+ * with the default domain.
+ * \section EXTENSIONS Optional Extensions
+ * Optional extensions will either appear within the existing sections the extend or appear 
+ * in the "Related Pages" when they introduce new concepts.
+ */
+
+ /**
+ * Tools Extension API version
+ */
+#if defined(NVTX_VERSION) && NVTX_VERSION < 3
+#error "Trying to #include NVTX version 3 in a source file where an older NVTX version has already been included.  If you are not directly using NVTX (the NVIDIA Tools Extension library), you are getting this error because libraries you are using have included different versions of NVTX.  Suggested solutions are: (1) reorder #includes so the newest NVTX version is included first, (2) avoid using the conflicting libraries in the same .c/.cpp file, or (3) update the library using the older NVTX version to use the newer version instead."
+#endif
+
+/* Header guard */
+#if !defined(NVTX_VERSION)
+#define NVTX_VERSION 3
+
+#if defined(_MSC_VER)
+#define NVTX_API __stdcall
+#define NVTX_INLINE_STATIC __inline static
+#else /*defined(__GNUC__)*/
+#define NVTX_API
+#define NVTX_INLINE_STATIC inline static
+#endif /* Platform */
+
+#if defined(NVTX_NO_IMPL)
+/* When omitting implementation, avoid declaring functions inline */
+/* without definitions, since this causes compiler warnings. */
+#define NVTX_DECLSPEC
+#elif defined(NVTX_EXPORT_API)
+/* Allow overriding definition of NVTX_DECLSPEC when exporting API. */
+/* Default is empty, meaning non-inline with external linkage. */
+#if !defined(NVTX_DECLSPEC)
+#define NVTX_DECLSPEC
+#endif
+#else
+/* Normal NVTX usage defines the NVTX API inline with static */
+/* (internal) linkage. */
+#define NVTX_DECLSPEC NVTX_INLINE_STATIC
+#endif
+
+#include "nvtxDetail/nvtxLinkOnce.h"
+
+#define NVTX_VERSIONED_IDENTIFIER_L3(NAME, VERSION) NAME##_v##VERSION
+#define NVTX_VERSIONED_IDENTIFIER_L2(NAME, VERSION) NVTX_VERSIONED_IDENTIFIER_L3(NAME, VERSION)
+#define NVTX_VERSIONED_IDENTIFIER(NAME) NVTX_VERSIONED_IDENTIFIER_L2(NAME, NVTX_VERSION)
+
+/**
+ * The nvToolsExt library depends on stdint.h.  If the build tool chain in use
+ * does not include stdint.h then define NVTX_STDINT_TYPES_ALREADY_DEFINED
+ * and define the following types:
+ * <ul>
+ *   <li>uint8_t
+ *   <li>int8_t
+ *   <li>uint16_t
+ *   <li>int16_t
+ *   <li>uint32_t
+ *   <li>int32_t
+ *   <li>uint64_t
+ *   <li>int64_t
+ *   <li>uintptr_t
+ *   <li>intptr_t
+ * </ul>
+ * #define NVTX_STDINT_TYPES_ALREADY_DEFINED if you are using your own header file.
+ */
+#ifndef NVTX_STDINT_TYPES_ALREADY_DEFINED
+#include <stdint.h>
+#endif
+
+#include <stddef.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/** 
+* Result Codes
+*/
+
+#define NVTX_SUCCESS 0
+#define NVTX_FAIL 1
+#define NVTX_ERR_INIT_LOAD_PROPERTY 2
+#define NVTX_ERR_INIT_ACCESS_LIBRARY 3
+#define NVTX_ERR_INIT_LOAD_LIBRARY 4
+#define NVTX_ERR_INIT_MISSING_LIBRARY_ENTRY_POINT 5
+#define NVTX_ERR_INIT_FAILED_LIBRARY_ENTRY_POINT 6
+#define NVTX_ERR_NO_INJECTION_LIBRARY_AVAILABLE 7
+
+/**
+ * Size of the nvtxEventAttributes_t structure.
+ */
+#define NVTX_EVENT_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxEventAttributes_t) ) )
+
+#define NVTX_NO_PUSH_POP_TRACKING ((int)-2)
+
+typedef uint64_t nvtxRangeId_t;
+
+/* Forward declaration of opaque domain registration structure */
+struct nvtxDomainRegistration_st;
+typedef struct nvtxDomainRegistration_st nvtxDomainRegistration;
+
+/* \brief Domain Handle Structure.
+* \anchor DOMAIN_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a domain.  This type is returned from tools when using the NVTX API to
+* create a domain.
+*
+*/
+typedef nvtxDomainRegistration* nvtxDomainHandle_t;
+
+/* Forward declaration of opaque string registration structure */
+struct nvtxStringRegistration_st;
+typedef struct nvtxStringRegistration_st nvtxStringRegistration;
+
+/* \brief Registered String Handle Structure.
+* \anchor REGISTERED_STRING_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a registered string.  This type is returned from tools when using the NVTX
+* API to create a registered string.
+*
+*/
+typedef nvtxStringRegistration* nvtxStringHandle_t;
+
+/* ========================================================================= */
+/** \defgroup GENERAL General
+ * @{
+ */
+
+/** ---------------------------------------------------------------------------
+ * Color Types
+ * ------------------------------------------------------------------------- */
+typedef enum nvtxColorType_t
+{
+    NVTX_COLOR_UNKNOWN  = 0,                 /**< Color attribute is unused. */
+    NVTX_COLOR_ARGB     = 1                  /**< An ARGB color is provided. */
+} nvtxColorType_t;
+
+/** ---------------------------------------------------------------------------
+ * Message Types
+ * ------------------------------------------------------------------------- */
+typedef enum nvtxMessageType_t
+{
+    NVTX_MESSAGE_UNKNOWN          = 0,    /**< Message payload is unused. */
+    NVTX_MESSAGE_TYPE_ASCII       = 1,    /**< A character sequence is used as payload. */
+    NVTX_MESSAGE_TYPE_UNICODE     = 2,     /**< A wide character sequence is used as payload. */
+    /* NVTX_VERSION_2 */
+    NVTX_MESSAGE_TYPE_REGISTERED  = 3,    /**< A unique string handle that was registered
+                                                with \ref nvtxDomainRegisterStringA() or 
+                                                \ref nvtxDomainRegisterStringW(). */
+} nvtxMessageType_t;
+
+typedef union nvtxMessageValue_t
+{
+    const char* ascii;
+    const wchar_t* unicode;
+    /* NVTX_VERSION_2 */
+    nvtxStringHandle_t registered;
+} nvtxMessageValue_t;
+
+
+/** @} */ /*END defgroup*/
+/* ------------------------------------------------------------------------- */
+/** \brief Force initialization (optional)
+*
+* Force NVTX library to initialize.  The first call to any NVTX API function
+* will automatically initialize the entire API.  This can make the first call
+* much slower than subsequent calls.  In applications where the first call to
+* NVTX may be in a performance-critical section, calling nvtxInitialize before
+* any performance-critical sections will ensure NVTX initialization occurs at
+* an acceptable time.  Since nvtxInitialize takes no parameters and has no
+* expected behavior besides initialization, it is convenient to add a call to
+* nvtxInitialize in NVTX-instrumented applications that need to force earlier
+* initialization without changing any other code.  For example, if an app's
+* first NVTX call is nvtxDomainCreate, and it is difficult to move that call
+* earlier because the domain handle must be stored in an object only created
+* at that point, adding a call to nvtxInitialize at the top of main() will
+* ensure the later call to nvtxDomainCreate is as fast as possible.
+*
+* \version \NVTX_VERSION_3
+*
+* \param reserved - must be zero or NULL.
+*
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxInitialize(const void* reserved);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+
+/* ========================================================================= */
+/** \defgroup EVENT_ATTRIBUTES Event Attributes
+* @{
+*/
+
+/** ---------------------------------------------------------------------------
+* Payload Types
+* ------------------------------------------------------------------------- */
+typedef enum nvtxPayloadType_t
+{
+    NVTX_PAYLOAD_UNKNOWN = 0,   /**< Color payload is unused. */
+    NVTX_PAYLOAD_TYPE_UNSIGNED_INT64 = 1,   /**< A 64 bit unsigned integer value is used as payload. */
+    NVTX_PAYLOAD_TYPE_INT64 = 2,   /**< A 64 bit signed integer value is used as payload. */
+    NVTX_PAYLOAD_TYPE_DOUBLE = 3,   /**< A 64 bit floating point value is used as payload. */
+    /* NVTX_VERSION_2 */
+    NVTX_PAYLOAD_TYPE_UNSIGNED_INT32 = 4,   /**< A 32 bit floating point value is used as payload. */
+    NVTX_PAYLOAD_TYPE_INT32 = 5,   /**< A 32 bit floating point value is used as payload. */
+    NVTX_PAYLOAD_TYPE_FLOAT = 6    /**< A 32 bit floating point value is used as payload. */
+} nvtxPayloadType_t;
+
+/** \brief Event Attribute Structure.
+ * \anchor EVENT_ATTRIBUTE_STRUCTURE
+ *
+ * This structure is used to describe the attributes of an event. The layout of
+ * the structure is defined by a specific version of the tools extension
+ * library and can change between different versions of the Tools Extension
+ * library.
+ *
+ * \par Initializing the Attributes
+ *
+ * The caller should always perform the following three tasks when using
+ * attributes:
+ * <ul>
+ *    <li>Zero the structure
+ *    <li>Set the version field
+ *    <li>Set the size field
+ * </ul>
+ *
+ * Zeroing the structure sets all the event attributes types and values
+ * to the default value.
+ *
+ * The version and size field are used by the Tools Extension
+ * implementation to handle multiple versions of the attributes structure.
+ *
+ * It is recommended that the caller use one of the following to methods
+ * to initialize the event attributes structure:
+ *
+ * \par Method 1: Initializing nvtxEventAttributes for future compatibility
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * \endcode
+ *
+ * \par Method 2: Initializing nvtxEventAttributes for a specific version
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = 1;
+ * eventAttrib.size = (uint16_t)(sizeof(nvtxEventAttributes_v1));
+ * \endcode
+ *
+ * If the caller uses Method 1 it is critical that the entire binary
+ * layout of the structure be configured to 0 so that all fields
+ * are initialized to the default value.
+ *
+ * The caller should either use both NVTX_VERSION and
+ * NVTX_EVENT_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+ * and a versioned type (Method 2).  Using a mix of the two methods
+ * will likely cause either source level incompatibility or binary
+ * incompatibility in the future.
+ *
+ * \par Settings Attribute Types and Values
+ *
+ *
+ * \par Example:
+ * \code
+ * // Initialize
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ *
+ * // Configure the Attributes
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF880000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example";
+ * \endcode
+ *
+ * In the example the caller does not have to set the value of
+ * \ref ::nvtxEventAttributes_v2::category or
+ * \ref ::nvtxEventAttributes_v2::payload as these fields were set to
+ * the default value by {0}.
+ * \sa
+ * ::nvtxDomainMarkEx
+ * ::nvtxDomainRangeStartEx
+ * ::nvtxDomainRangePushEx
+ */
+typedef struct nvtxEventAttributes_v2
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of the event attribute
+    * structure used to specify the event.
+    */
+    uint16_t size;
+
+    /**
+     * \brief ID of the category the event is assigned to.
+     *
+     * A category is a user-controlled ID that can be used to group
+     * events.  The tool may use category IDs to improve filtering or
+     * enable grouping of events in the same category. The functions
+     * \ref ::nvtxNameCategoryA or \ref ::nvtxNameCategoryW can be used
+     * to name a category.
+     *
+     * Default Value is 0
+     */
+    uint32_t category;
+
+    /** \brief Color type specified in this attribute structure.
+     *
+     * Defines the color format of the attribute structure's \ref COLOR_FIELD
+     * "color" field.
+     *
+     * Default Value is NVTX_COLOR_UNKNOWN
+     */
+    int32_t colorType;              /* nvtxColorType_t */
+
+    /** \brief Color assigned to this event. \anchor COLOR_FIELD
+     *
+     * The color that the tool should use to visualize the event.
+     */
+    uint32_t color;
+
+    /**
+     * \brief Payload type specified in this attribute structure.
+     *
+     * Defines the payload format of the attribute structure's \ref PAYLOAD_FIELD
+     * "payload" field.
+     *
+     * Default Value is NVTX_PAYLOAD_UNKNOWN
+     */
+    int32_t payloadType;            /* nvtxPayloadType_t */
+
+    int32_t reserved0;
+
+    /**
+     * \brief Payload assigned to this event. \anchor PAYLOAD_FIELD
+     *
+     * A numerical value that can be used to annotate an event. The tool could
+     * use the payload data to reconstruct graphs and diagrams.
+     */
+    union payload_t
+    {
+        uint64_t ullValue;
+        int64_t llValue;
+        double dValue;
+        /* NVTX_VERSION_2 */
+        uint32_t uiValue;
+        int32_t iValue;
+        float fValue;
+    } payload;
+
+    /** \brief Message type specified in this attribute structure.
+     *
+     * Defines the message format of the attribute structure's \ref MESSAGE_FIELD
+     * "message" field.
+     *
+     * Default Value is NVTX_MESSAGE_UNKNOWN
+     */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure. \anchor MESSAGE_FIELD
+     *
+     * The text message that is attached to an event.
+     */
+    nvtxMessageValue_t message;
+
+} nvtxEventAttributes_v2;
+
+typedef struct nvtxEventAttributes_v2 nvtxEventAttributes_t;
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup MARKERS_AND_RANGES Markers and Ranges
+ *
+ * See \ref MARKERS_AND_RANGES for more details
+ *
+ * @{
+ */
+
+/** \name Marker */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+*
+* A marker can contain a text message or specify additional information
+* using the event attributes structure.  These attributes include a text
+* message, color, category, and a payload. Each of the attributes is optional
+* and can only be sent out using the \ref nvtxDomainMarkEx function.
+*
+* nvtxDomainMarkEx(NULL, event) is equivalent to calling
+* nvtxMarkEx(event).
+*
+* \param domain    - The domain of scoping the category.
+* \param eventAttrib - The event attribute structure defining the marker's
+* attribute types and attribute values.
+*
+* \sa
+* ::nvtxMarkEx
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainMarkEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+ *
+ * A marker can contain a text message or specify additional information
+ * using the event attributes structure.  These attributes include a text
+ * message, color, category, and a payload. Each of the attributes is optional
+ * and can only be sent out using the \ref nvtxMarkEx function.
+ * If \ref nvtxMarkA or \ref nvtxMarkW are used to specify the marker
+ * or if an attribute is unspecified then a default value will be used.
+ *
+ * \param eventAttrib - The event attribute structure defining the marker's
+ * attribute types and attribute values.
+ *
+ * \par Example:
+ * \code
+ * // zero the structure
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * // set the version and the size information
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * // configure the attributes.  0 is the default for all attributes.
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF880000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example nvtxMarkEx";
+ * nvtxMarkEx(&eventAttrib);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainMarkEx
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxMarkEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Marks an instantaneous event in the application.
+ *
+ * A marker created using \ref nvtxMarkA or \ref nvtxMarkW contains only a
+ * text message.
+ *
+ * \param message     - The message associated to this marker event.
+ *
+ * \par Example:
+ * \code
+ * nvtxMarkA("Example nvtxMarkA");
+ * nvtxMarkW(L"Example nvtxMarkW");
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainMarkEx
+ * ::nvtxMarkEx
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxMarkA(const char* message);
+NVTX_DECLSPEC void NVTX_API nvtxMarkW(const wchar_t* message);
+/** @} */
+
+
+/** \name Process Ranges */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range in a domain.
+*
+* \param domain    - The domain of scoping the category.
+* \param eventAttrib - The event attribute structure defining the range's
+* attribute types and attribute values.
+*
+* \return The unique ID used to correlate a pair of Start and End events.
+*
+* \remarks Ranges defined by Start/End can overlap.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("my domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "my range";
+* nvtxRangeId_t rangeId = nvtxDomainRangeStartEx(&eventAttrib);
+* // ...
+* nvtxDomainRangeEnd(rangeId);
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangeEnd
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxDomainRangeStartEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range.
+ *
+ * \param eventAttrib - The event attribute structure defining the range's
+ * attribute types and attribute values.
+ *
+ * \return The unique ID used to correlate a pair of Start and End events.
+ *
+ * \remarks Ranges defined by Start/End can overlap.
+ *
+ * \par Example:
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * eventAttrib.category = 3;
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFF0088FF;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Example Range";
+ * nvtxRangeId_t rangeId = nvtxRangeStartEx(&eventAttrib);
+ * // ...
+ * nvtxRangeEnd(rangeId);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangeEnd
+ * ::nvtxDomainRangeStartEx
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a process range.
+ *
+ * \param message     - The event message associated to this range event.
+ *
+ * \return The unique ID used to correlate a pair of Start and End events.
+ *
+ * \remarks Ranges defined by Start/End can overlap.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangeId_t r1 = nvtxRangeStartA("Range 1");
+ * nvtxRangeId_t r2 = nvtxRangeStartW(L"Range 2");
+ * nvtxRangeEnd(r1);
+ * nvtxRangeEnd(r2);
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangeEnd
+ * ::nvtxRangeStartEx
+ * ::nvtxDomainRangeStartEx
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartA(const char* message);
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartW(const wchar_t* message);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a process range.
+*
+* \param domain - The domain 
+* \param id - The correlation ID returned from a nvtxRangeStart call.
+*
+* \remarks This function is offered completeness but is an alias for ::nvtxRangeEnd. 
+* It does not need a domain param since that is associated iwth the range ID at ::nvtxDomainRangeStartEx
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("my domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "my range";
+* nvtxRangeId_t rangeId = nvtxDomainRangeStartEx(&eventAttrib);
+* // ...
+* nvtxDomainRangeEnd(rangeId);
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangeStartEx
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainRangeEnd(nvtxDomainHandle_t domain, nvtxRangeId_t id);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a process range.
+ *
+ * \param id - The correlation ID returned from an nvtxRangeStart call.
+ *
+ * \sa
+ * ::nvtxDomainRangeStartEx
+ * ::nvtxRangeStartEx
+ * ::nvtxRangeStartA
+ * ::nvtxRangeStartW
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxRangeEnd(nvtxRangeId_t id);
+/** @} */
+
+/** \name Thread Ranges */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+*
+* \param domain    - The domain of scoping.
+* \param eventAttrib - The event attribute structure defining the range's
+* attribute types and attribute values.
+*
+* \return The 0 based level of range being started. This value is scoped to the domain.
+* If an error occurs, a negative value is returned.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.colorType = NVTX_COLOR_ARGB;
+* eventAttrib.color = 0xFFFF0000;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* eventAttrib.message.ascii = "Level 0";
+* nvtxDomainRangePushEx(domain, &eventAttrib);
+*
+* // Re-use eventAttrib
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_UNICODE;
+* eventAttrib.message.unicode = L"Level 1";
+* nvtxDomainRangePushEx(domain, &eventAttrib);
+*
+* nvtxDomainRangePop(domain); //level 1
+* nvtxDomainRangePop(domain); //level 0
+* \endcode
+*
+* \sa
+* ::nvtxDomainRangePop
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePushEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+ *
+ * \param eventAttrib - The event attribute structure defining the range's
+ * attribute types and attribute values.
+ *
+ * \return The 0 based level of range being started. This level is per domain.
+ * If an error occurs a negative value is returned.
+ *
+ * \par Example:
+ * \code
+ * nvtxEventAttributes_t eventAttrib = {0};
+ * eventAttrib.version = NVTX_VERSION;
+ * eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+ * eventAttrib.colorType = NVTX_COLOR_ARGB;
+ * eventAttrib.color = 0xFFFF0000;
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_ASCII;
+ * eventAttrib.message.ascii = "Level 0";
+ * nvtxRangePushEx(&eventAttrib);
+ *
+ * // Re-use eventAttrib
+ * eventAttrib.messageType = NVTX_MESSAGE_TYPE_UNICODE;
+ * eventAttrib.message.unicode = L"Level 1";
+ * nvtxRangePushEx(&eventAttrib);
+ *
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainRangePushEx
+ * ::nvtxRangePop
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePushEx(const nvtxEventAttributes_t* eventAttrib);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Starts a nested thread range.
+ *
+ * \param message     - The event message associated to this range event.
+ *
+ * \return The 0 based level of range being started.  If an error occurs a
+ * negative value is returned.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangePushA("Level 0");
+ * nvtxRangePushW(L"Level 1");
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxDomainRangePushEx
+ * ::nvtxRangePop
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePushA(const char* message);
+NVTX_DECLSPEC int NVTX_API nvtxRangePushW(const wchar_t* message);
+/** @} */
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a nested thread range.
+*
+* \return The level of the range being ended. If an error occurs a negative
+* value is returned on the current thread.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreate("example library");
+* nvtxDomainRangePushA(domain, "Level 0");
+* nvtxDomainRangePushW(domain, L"Level 1");
+* nvtxDomainRangePop(domain);
+* nvtxDomainRangePop(domain);
+* \endcode
+*
+* \sa
+* ::nvtxRangePushEx
+* ::nvtxRangePushA
+* ::nvtxRangePushW
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePop(nvtxDomainHandle_t domain);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Ends a nested thread range.
+ *
+ * \return The level of the range being ended. If an error occurs a negative
+ * value is returned on the current thread.
+ *
+ * \par Example:
+ * \code
+ * nvtxRangePushA("Level 0");
+ * nvtxRangePushW(L"Level 1");
+ * nvtxRangePop();
+ * nvtxRangePop();
+ * \endcode
+ *
+ * \sa
+ * ::nvtxRangePushEx
+ * ::nvtxRangePushA
+ * ::nvtxRangePushW
+ *
+ * \version \NVTX_VERSION_0
+ * @{ */
+NVTX_DECLSPEC int NVTX_API nvtxRangePop(void);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup RESOURCE_NAMING Resource Naming
+ *
+ * See \ref RESOURCE_NAMING for more details
+ *
+ * @{
+ */
+
+
+/*  ------------------------------------------------------------------------- */
+/** \name Functions for Generic Resource Naming*/
+/*  ------------------------------------------------------------------------- */
+
+/*  ------------------------------------------------------------------------- */
+/** \cond SHOW_HIDDEN
+* \brief Resource typing helpers.  
+*
+* Classes are used to make it easy to create a series of resource types 
+* per API without collisions 
+*/
+#define NVTX_RESOURCE_MAKE_TYPE(CLASS, INDEX) ((((uint32_t)(NVTX_RESOURCE_CLASS_ ## CLASS))<<16)|((uint32_t)(INDEX)))
+#define NVTX_RESOURCE_CLASS_GENERIC 1
+/** \endcond */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Generic resource type for when a resource class is not available.
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*
+* \version \NVTX_VERSION_2
+*/
+typedef enum nvtxResourceGenericType_t
+{
+    NVTX_RESOURCE_TYPE_UNKNOWN = 0,
+    NVTX_RESOURCE_TYPE_GENERIC_POINTER = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 1), /**< Generic pointer assumed to have no collisions with other pointers. */
+    NVTX_RESOURCE_TYPE_GENERIC_HANDLE = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 2), /**< Generic handle assumed to have no collisions with other handles. */
+    NVTX_RESOURCE_TYPE_GENERIC_THREAD_NATIVE = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 3), /**< OS native thread identifier. */
+    NVTX_RESOURCE_TYPE_GENERIC_THREAD_POSIX = NVTX_RESOURCE_MAKE_TYPE(GENERIC, 4) /**< POSIX pthread identifier. */
+} nvtxResourceGenericType_t;
+
+
+
+/** \brief Resource Attribute Structure.
+* \anchor RESOURCE_ATTRIBUTE_STRUCTURE
+*
+* This structure is used to describe the attributes of a resource. The layout of
+* the structure is defined by a specific version of the tools extension
+* library and can change between different versions of the Tools Extension
+* library.
+*
+* \par Initializing the Attributes
+*
+* The caller should always perform the following three tasks when using
+* attributes:
+* <ul>
+*    <li>Zero the structure
+*    <li>Set the version field
+*    <li>Set the size field
+* </ul>
+*
+* Zeroing the structure sets all the resource attributes types and values
+* to the default value.
+*
+* The version and size field are used by the Tools Extension
+* implementation to handle multiple versions of the attributes structure.
+*
+* It is recommended that the caller use one of the following to methods
+* to initialize the event attributes structure:
+*
+* \par Method 1: Initializing nvtxEventAttributes for future compatibility
+* \code
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* \endcode
+*
+* \par Method 2: Initializing nvtxEventAttributes for a specific version
+* \code
+* nvtxResourceAttributes_v0 attribs = {0};
+* attribs.version = 2;
+* attribs.size = (uint16_t)(sizeof(nvtxResourceAttributes_v0));
+* \endcode
+*
+* If the caller uses Method 1 it is critical that the entire binary
+* layout of the structure be configured to 0 so that all fields
+* are initialized to the default value.
+*
+* The caller should either use both NVTX_VERSION and
+* NVTX_RESOURCE_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+* and a versioned type (Method 2).  Using a mix of the two methods
+* will likely cause either source level incompatibility or binary
+* incompatibility in the future.
+*
+* \par Settings Attribute Types and Values
+*
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+*
+* // Initialize
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+*
+* // Configure the Attributes
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+*
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* \endcode
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*/
+typedef struct nvtxResourceAttributes_v0
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of this attribute
+    * structure.
+    */
+    uint16_t size;
+
+    /**
+    * \brief Identifier type specifies how to interpret the identifier field
+    *
+    * Defines the identifier format of the attribute structure's \ref RESOURCE_IDENTIFIER_FIELD
+    * "identifier" field.
+    *
+    * Default Value is NVTX_RESOURCE_TYPE_UNKNOWN
+    */
+    int32_t identifierType;            /* values from enums following the pattern nvtxResource[name]Type_t */
+
+    /**
+    * \brief Identifier for the resource. 
+    * \anchor RESOURCE_IDENTIFIER_FIELD
+    *
+    * An identifier may be a pointer or a handle to an OS or middleware API object.
+    * The resource type will assist in avoiding collisions where handles values may collide.
+    */
+    union identifier_t
+    {
+        const void* pValue;
+        uint64_t ullValue;
+    } identifier;
+
+    /** \brief Message type specified in this attribute structure.
+    *
+    * Defines the message format of the attribute structure's \ref RESOURCE_MESSAGE_FIELD
+    * "message" field.
+    *
+    * Default Value is NVTX_MESSAGE_UNKNOWN
+    */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure. \anchor RESOURCE_MESSAGE_FIELD
+    *
+    * The text message that is attached to a resource.
+    */
+    nvtxMessageValue_t message;
+
+} nvtxResourceAttributes_v0;
+
+typedef struct nvtxResourceAttributes_v0 nvtxResourceAttributes_t;
+
+/* \cond SHOW_HIDDEN 
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxResourceAttributes_v0) ) )
+typedef struct nvtxResourceHandle* nvtxResourceHandle_t;
+/** \endcond */
+
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Create a resource object to track and associate data with OS and middleware objects
+*
+* Allows users to associate an API handle or pointer with a user-provided name.
+* 
+*
+* \param domain - Domain to own the resource object
+* \param attribs - Attributes to be associated with the resource
+*
+* \return A handle that represents the newly created resource object.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* \endcode
+*
+* \sa
+* ::nvtxResourceAttributes_t
+* ::nvtxDomainResourceDestroy
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxResourceHandle_t NVTX_API nvtxDomainResourceCreate(nvtxDomainHandle_t domain, nvtxResourceAttributes_t* attribs);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Destroy a resource object to track and associate data with OS and middleware objects
+*
+* Allows users to associate an API handle or pointer with a user-provided name.
+*
+* \param resource - Handle to the resource in which to operate.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example domain");
+* nvtxResourceAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_RESOURCE_ATTRIB_STRUCT_SIZE;
+* attribs.identifierType = NVTX_RESOURCE_TYPE_GENERIC_POINTER;
+* attribs.identifier.pValue = (const void*)pMutex;
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Single thread access to database.";
+* nvtxResourceHandle_t handle = nvtxDomainResourceCreate(domain, attribs);
+* nvtxDomainResourceDestroy(handle);
+* \endcode
+*
+* \sa
+* ::nvtxDomainResourceCreate
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainResourceDestroy(nvtxResourceHandle_t resource);
+/** @} */
+
+
+/** \name Functions for NVTX Category Naming*/
+
+/* ------------------------------------------------------------------------- */
+/**
+* \brief Annotate an NVTX category used within a domain.
+*
+* Categories are used to group sets of events. Each category is identified
+* through a unique ID and that ID is passed into any of the marker/range
+* events to assign that event to a specific category. The nvtxDomainNameCategory
+* function calls allow the user to assign a name to a category ID that is
+* specific to the domain.
+*
+* nvtxDomainNameCategory(NULL, category, name) is equivalent to calling
+* nvtxNameCategory(category, name).
+*
+* \param domain    - The domain of scoping the category.
+* \param category  - The category ID to name.
+* \param name      - The name of the category.
+*
+* \remarks The category names are tracked per domain.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("example");
+* nvtxDomainNameCategoryA(domain, 1, "Memory Allocation");
+* nvtxDomainNameCategoryW(domain, 2, L"Memory Transfer");
+* \endcode
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryA(nvtxDomainHandle_t domain, uint32_t category, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryW(nvtxDomainHandle_t domain, uint32_t category, const wchar_t* name);
+/** @} */
+
+/** \brief Annotate an NVTX category.
+ *
+ * Categories are used to group sets of events. Each category is identified
+ * through a unique ID and that ID is passed into any of the marker/range
+ * events to assign that event to a specific category. The nvtxNameCategory
+ * function calls allow the user to assign a name to a category ID.
+ *
+ * \param category - The category ID to name.
+ * \param name     - The name of the category.
+ *
+ * \remarks The category names are tracked per process.
+ *
+ * \par Example:
+ * \code
+ * nvtxNameCategory(1, "Memory Allocation");
+ * nvtxNameCategory(2, "Memory Transfer");
+ * nvtxNameCategory(3, "Memory Object Lifetime");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryA(uint32_t category, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryW(uint32_t category, const wchar_t* name);
+/** @} */
+
+/** \name Functions for OS Threads Naming*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotate an OS thread.
+ *
+ * Allows the user to name an active thread of the current process. If an
+ * invalid thread ID is provided or a thread ID from a different process is
+ * used the behavior of the tool is implementation dependent.
+ *
+ * Tools expect thread ID to be a number that uniquely identifies the thread
+ * at the time of the call. Note that a thread's ID can be reused after
+ * it is destroyed. Tools may choose how to handle aliasing of thread IDs.
+ *
+ * POSIX pthread_t type returned by pthread_self() may not comply with these
+ * expectations. Please use OS-specific thread ID instead of pthread_t.
+ *
+ * The thread name is associated to the default domain.  To support domains 
+ * use resource objects via ::nvtxDomainResourceCreate.
+ *
+ * \param threadId - The ID of the thread to name.
+ * \param name     - The name of the thread.
+ *
+ * \par Examples:
+ * MS Windows:
+ * \code
+ * #include <windows.h>
+ * nvtxNameOsThread(GetCurrentThreadId(), "Current thread");
+ * nvtxNameOsThread(GetThreadId(SomeThreadHandle), "Other thread");
+ * \endcode
+ *
+ * Android:
+ * \code
+ * #include <unistd.h>
+ * nvtxNameOsThreadA(gettid(), "Current thread");
+ * nvtxNameOsThreadA(getpid(), "Main thread");
+ * \endcode
+ *
+ * Linux:
+ * \code
+ * #include <sys/syscall.h>
+ * nvtxNameOsThreadA(syscall(SYS_gettid), "Current thread");
+ * \endcode
+ * \code
+ * #include <unistd.h>
+ * nvtxNameOsThreadA(getpid(), "Main thread");
+ * \endcode
+ *
+ * OS X:
+ * \code
+ * #include <sys/syscall.h>
+ * nvtxNameOsThreadA(syscall(SYS_thread_selfid), "Current thread");
+ * \endcode
+ * \code
+ * #include <pthread.h>
+ * __uint64_t id;
+ * pthread_threadid_np(pthread_self(), &id);
+ * nvtxNameOsThreadA(id, "Current thread");
+ * pthread_threadid_np(somePThreadId, &id);
+ * nvtxNameOsThreadA(id, "Other thread");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadA(uint32_t threadId, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadW(uint32_t threadId, const wchar_t* name);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup STRING_REGISTRATION String Registration
+*
+* Registered strings are intended to increase performance by lowering instrumentation
+* overhead.  String may be registered once and the handle may be passed in place of
+* a string where an the APIs may allow.
+*
+* See \ref STRING_REGISTRATION for more details
+*
+* @{
+*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Register a string.
+
+* Registers an immutable string with NVTX. Once registered the pointer used
+* to register the domain name can be used in nvtxEventAttributes_t
+* \ref MESSAGE_FIELD. This allows NVTX implementation to skip copying the
+* contents of the message on each event invocation.
+*
+* String registration is an optimization. It is recommended to use string
+* registration if the string will be passed to an event many times.
+*
+* String are not unregistered, except that by unregistering the entire domain
+*
+* \param domain  - Domain handle. If NULL then the global domain is used.
+* \param string    - A unique pointer to a sequence of characters.
+*
+* \return A handle representing the registered string.
+*
+* \par Example:
+* \code
+* nvtxDomainCreateA("com.nvidia.nvtx.example");
+* nvtxStringHandle_t message = nvtxDomainRegisterStringA(domain, "registered string");
+* nvtxEventAttributes_t eventAttrib = {0};
+* eventAttrib.version = NVTX_VERSION;
+* eventAttrib.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib.messageType = NVTX_MESSAGE_TYPE_REGISTERED;
+* eventAttrib.message.registered = message;
+* \endcode
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringA(nvtxDomainHandle_t domain, const char* string);
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringW(nvtxDomainHandle_t domain, const wchar_t* string);
+/** @} */
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \defgroup DOMAINS Domains
+*
+* Domains are used to group events to a developer defined scope. Middleware
+* vendors may also scope their own events to avoid collisions with the
+* the application developer's events, so that the application developer may
+* inspect both parts and easily differentiate or filter them.  By default
+* all events are scoped to a global domain where NULL is provided or when
+* using APIs provided b versions of NVTX below v2
+*
+* Domains are intended to be typically long lived objects with the intention
+* of logically separating events of large modules from each other such as
+* middleware libraries from each other and the main application.
+*
+* See \ref DOMAINS for more details
+*
+* @{
+*/
+
+/* ------------------------------------------------------------------------- */
+/** \brief Register a NVTX domain.
+*
+* Domains are used to scope annotations. All NVTX_VERSION_0 and NVTX_VERSION_1
+* annotations are scoped to the global domain. The function nvtxDomainCreate
+* creates a new named domain.
+*
+* Each domain maintains its own nvtxRangePush and nvtxRangePop stack.
+*
+* \param name - A unique string representing the domain.
+*
+* \return A handle representing the domain.
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("com.nvidia.nvtx.example");
+*
+* nvtxMarkA("nvtxMarkA to global domain");
+*
+* nvtxEventAttributes_t eventAttrib1 = {0};
+* eventAttrib1.version = NVTX_VERSION;
+* eventAttrib1.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib1.message.ascii = "nvtxDomainMarkEx to global domain";
+* nvtxDomainMarkEx(NULL, &eventAttrib1);
+*
+* nvtxEventAttributes_t eventAttrib2 = {0};
+* eventAttrib2.version = NVTX_VERSION;
+* eventAttrib2.size = NVTX_EVENT_ATTRIB_STRUCT_SIZE;
+* eventAttrib2.message.ascii = "nvtxDomainMarkEx to com.nvidia.nvtx.example";
+* nvtxDomainMarkEx(domain, &eventAttrib2);
+* nvtxDomainDestroy(domain);
+* \endcode
+*
+* \sa
+* ::nvtxDomainDestroy
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateA(const char* name);
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateW(const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Unregister a NVTX domain.
+*
+* Unregisters the domain handle and frees all domain specific resources.
+*
+* \param domain    - the domain handle
+*
+* \par Example:
+* \code
+* nvtxDomainHandle_t domain = nvtxDomainCreateA("com.nvidia.nvtx.example");
+* nvtxDomainDestroy(domain);
+* \endcode
+*
+* \sa
+* ::nvtxDomainCreateA
+* ::nvtxDomainCreateW
+*
+* \version \NVTX_VERSION_2
+* @{ */
+NVTX_DECLSPEC void NVTX_API nvtxDomainDestroy(nvtxDomainHandle_t domain);
+/** @} */
+
+
+/** @} */ /*END defgroup*/
+/* ========================================================================= */
+/** \cond SHOW_HIDDEN */
+
+#ifdef UNICODE
+    #define nvtxMark            nvtxMarkW
+    #define nvtxRangeStart      nvtxRangeStartW
+    #define nvtxRangePush       nvtxRangePushW
+    #define nvtxNameCategory    nvtxNameCategoryW
+    #define nvtxNameOsThread    nvtxNameOsThreadW
+    /* NVTX_VERSION_2 */
+    #define nvtxDomainCreate         nvtxDomainCreateW
+    #define nvtxDomainRegisterString nvtxDomainRegisterStringW
+    #define nvtxDomainNameCategory   nvtxDomainNameCategoryW
+#else
+    #define nvtxMark            nvtxMarkA
+    #define nvtxRangeStart      nvtxRangeStartA
+    #define nvtxRangePush       nvtxRangePushA
+    #define nvtxNameCategory    nvtxNameCategoryA
+    #define nvtxNameOsThread    nvtxNameOsThreadA
+    /* NVTX_VERSION_2 */
+    #define nvtxDomainCreate         nvtxDomainCreateA
+    #define nvtxDomainRegisterString nvtxDomainRegisterStringA
+    #define nvtxDomainNameCategory   nvtxDomainNameCategoryA
+#endif
+
+/** \endcond */
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif /* __cplusplus */
+
+#define NVTX_IMPL_GUARD /* Ensure other headers cannot included directly */
+
+#include "nvtxDetail/nvtxTypes.h"
+
+#ifndef NVTX_NO_IMPL
+#include "nvtxDetail/nvtxImpl.h"
+#endif /*NVTX_NO_IMPL*/
+
+#undef NVTX_IMPL_GUARD
+
+#endif /* !defined(NVTX_VERSION) */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvToolsExtCuda.h

@@ -0,0 +1,170 @@
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#include "nvToolsExt.h"
+
+#include "cuda.h"
+
+#ifndef NVTOOLSEXT_CUDA_V3
+#define NVTOOLSEXT_CUDA_V3
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for CUDA Resource Naming
+*/
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_CUDA CUDA Resource Naming
+ *
+ * This section covers the API functions that allow to annotate CUDA resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_CUDA  4
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for CUDA
+*/
+typedef enum nvtxResourceCUDAType_t
+{
+    NVTX_RESOURCE_TYPE_CUDA_DEVICE = NVTX_RESOURCE_MAKE_TYPE(CUDA, 1), /* CUdevice */
+    NVTX_RESOURCE_TYPE_CUDA_CONTEXT = NVTX_RESOURCE_MAKE_TYPE(CUDA, 2), /* CUcontext */
+    NVTX_RESOURCE_TYPE_CUDA_STREAM = NVTX_RESOURCE_MAKE_TYPE(CUDA, 3), /* CUstream */
+    NVTX_RESOURCE_TYPE_CUDA_EVENT = NVTX_RESOURCE_MAKE_TYPE(CUDA, 4), /* CUevent */
+} nvtxResourceCUDAType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA device.
+ *
+ * Allows the user to associate a CUDA device with a user-provided name.
+ *
+ * \param device - The handle of the CUDA device to name.
+ * \param name   - The name of the CUDA device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceA(CUdevice device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceW(CUdevice device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA context.
+ *
+ * Allows the user to associate a CUDA context with a user-provided name.
+ *
+ * \param context - The handle of the CUDA context to name.
+ * \param name    - The name of the CUDA context.
+ *
+ * \par Example:
+ * \code
+ * CUresult status = cuCtxCreate( &cuContext, 0, cuDevice );
+ * if ( CUDA_SUCCESS != status )
+ *     goto Error;
+ * nvtxNameCuContext(cuContext, "CTX_NAME");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextA(CUcontext context, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextW(CUcontext context, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA stream.
+ *
+ * Allows the user to associate a CUDA stream with a user-provided name.
+ *
+ * \param stream - The handle of the CUDA stream to name.
+ * \param name   - The name of the CUDA stream.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamA(CUstream stream, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamW(CUstream stream, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA event.
+ *
+ * Allows the user to associate a CUDA event with a user-provided name.
+ *
+ * \param event - The handle of the CUDA event to name.
+ * \param name  - The name of the CUDA event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventA(CUevent event, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventW(CUevent event, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameCuDevice   nvtxNameCuDeviceW
+  #define nvtxNameCuContext  nvtxNameCuContextW
+  #define nvtxNameCuStream   nvtxNameCuStreamW
+  #define nvtxNameCuEvent    nvtxNameCuEventW
+#else
+  #define nvtxNameCuDevice   nvtxNameCuDeviceA
+  #define nvtxNameCuContext  nvtxNameCuContextA
+  #define nvtxNameCuStream   nvtxNameCuStreamA
+  #define nvtxNameCuEvent    nvtxNameCuEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#ifndef NVTX_NO_IMPL
+#define NVTX_IMPL_GUARD_CUDA /* Ensure other headers cannot included directly */
+#include "nvtxDetail/nvtxImplCuda_v3.h"
+#undef NVTX_IMPL_GUARD_CUDA
+#endif /*NVTX_NO_IMPL*/
+
+#endif /* NVTOOLSEXT_CUDA_V3 */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvToolsExtCudaRt.h

@@ -0,0 +1,146 @@
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#include "nvToolsExt.h"
+
+#include "cuda.h"
+#include "driver_types.h"
+
+#ifndef NVTOOLSEXT_CUDART_V3
+#define NVTOOLSEXT_CUDART_V3
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for CUDA Resource Naming
+*/
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_CUDART CUDA Runtime Resource Naming
+ *
+ * This section covers the API functions that allow to annotate CUDA resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_CUDART 5
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for CUDART
+*/
+typedef enum nvtxResourceCUDARTType_t
+{
+    NVTX_RESOURCE_TYPE_CUDART_DEVICE = NVTX_RESOURCE_MAKE_TYPE(CUDART, 0), /* int device */
+    NVTX_RESOURCE_TYPE_CUDART_STREAM = NVTX_RESOURCE_MAKE_TYPE(CUDART, 1), /* cudaStream_t */
+    NVTX_RESOURCE_TYPE_CUDART_EVENT = NVTX_RESOURCE_MAKE_TYPE(CUDART, 2), /* cudaEvent_t */
+} nvtxResourceCUDARTType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA device.
+ *
+ * Allows the user to associate a CUDA device with a user-provided name.
+ *
+ * \param device - The id of the CUDA device to name.
+ * \param name   - The name of the CUDA device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceA(int device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceW(int device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA stream.
+ *
+ * Allows the user to associate a CUDA stream with a user-provided name.
+ *
+ * \param stream - The handle of the CUDA stream to name.
+ * \param name   - The name of the CUDA stream.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamA(cudaStream_t stream, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamW(cudaStream_t stream, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates a CUDA event.
+ *
+ * Allows the user to associate a CUDA event with a user-provided name.
+ *
+ * \param event - The handle of the CUDA event to name.
+ * \param name  - The name of the CUDA event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventA(cudaEvent_t event, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventW(cudaEvent_t event, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameCudaDevice nvtxNameCudaDeviceW
+  #define nvtxNameCudaStream nvtxNameCudaStreamW
+  #define nvtxNameCudaEvent  nvtxNameCudaEventW
+#else
+  #define nvtxNameCudaDevice nvtxNameCudaDeviceA
+  #define nvtxNameCudaStream nvtxNameCudaStreamA
+  #define nvtxNameCudaEvent  nvtxNameCudaEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#ifndef NVTX_NO_IMPL
+#define NVTX_IMPL_GUARD_CUDART /* Ensure other headers cannot included directly */
+#include "nvtxDetail/nvtxImplCudaRt_v3.h"
+#undef NVTX_IMPL_GUARD_CUDART
+#endif /*NVTX_NO_IMPL*/
+
+#endif /* NVTOOLSEXT_CUDART_V3 */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvToolsExtOpenCL.h

@@ -0,0 +1,220 @@
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#include "nvToolsExt.h"
+
+#include <CL/cl.h>
+
+#ifndef NVTOOLSEXT_OPENCL_V3
+#define NVTOOLSEXT_OPENCL_V3
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* ========================================================================= */
+/** \name Functions for OpenCL Resource Naming
+ */
+/** \addtogroup RESOURCE_NAMING
+ * \section RESOURCE_NAMING_OPENCL OpenCL Resource Naming
+ *
+ * This section covers the API functions that allow to annotate OpenCL resources
+ * with user-provided names.
+ *
+ * @{
+ */
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_OPENCL 6 
+/** \endcond */
+
+/*  ------------------------------------------------------------------------- */
+/** \brief Resource types for OpenCL
+*/
+typedef enum nvtxResourceOpenCLType_t
+{
+    NVTX_RESOURCE_TYPE_OPENCL_DEVICE = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 1),
+    NVTX_RESOURCE_TYPE_OPENCL_CONTEXT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 2),
+    NVTX_RESOURCE_TYPE_OPENCL_COMMANDQUEUE = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 3),
+    NVTX_RESOURCE_TYPE_OPENCL_MEMOBJECT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 4),
+    NVTX_RESOURCE_TYPE_OPENCL_SAMPLER = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 5),
+    NVTX_RESOURCE_TYPE_OPENCL_PROGRAM = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 6),
+    NVTX_RESOURCE_TYPE_OPENCL_EVENT = NVTX_RESOURCE_MAKE_TYPE(OPENCL, 7),
+} nvtxResourceOpenCLType_t;
+
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL device.
+ *
+ * Allows to associate an OpenCL device with a user-provided name.
+ *
+ * \param device - The handle of the OpenCL device to name.
+ * \param name   - The name of the OpenCL device.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClDeviceA(cl_device_id device, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClDeviceW(cl_device_id device, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL context.
+ *
+ * Allows to associate an OpenCL context with a user-provided name.
+ *
+ * \param context - The handle of the OpenCL context to name.
+ * \param name    - The name of the OpenCL context.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClContextA(cl_context context, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClContextW(cl_context context, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL command queue.
+ *
+ * Allows to associate an OpenCL command queue with a user-provided name.
+ *
+ * \param command_queue - The handle of the OpenCL command queue to name.
+ * \param name          - The name of the OpenCL command queue.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClCommandQueueA(cl_command_queue command_queue, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClCommandQueueW(cl_command_queue command_queue, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL memory object.
+ *
+ * Allows to associate an OpenCL memory object with a user-provided name.
+ *
+ * \param memobj - The handle of the OpenCL memory object to name.
+ * \param name   - The name of the OpenCL memory object.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClMemObjectA(cl_mem memobj, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClMemObjectW(cl_mem memobj, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL sampler.
+ *
+ * Allows to associate an OpenCL sampler with a user-provided name.
+ *
+ * \param sampler - The handle of the OpenCL sampler to name.
+ * \param name    - The name of the OpenCL sampler.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClSamplerA(cl_sampler sampler, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClSamplerW(cl_sampler sampler, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL program.
+ *
+ * Allows to associate an OpenCL program with a user-provided name.
+ *
+ * \param program - The handle of the OpenCL program to name.
+ * \param name    - The name of the OpenCL program.
+ *
+ * \code
+ * cpProgram = clCreateProgramWithSource(cxGPUContext, 1,
+ *     (const char **) &cSourceCL, &program_length, &ciErrNum);
+ * shrCheckErrorEX(ciErrNum, CL_SUCCESS, pCleanup);
+ * nvtxNameClProgram(cpProgram, L"PROGRAM_NAME");
+ * \endcode
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClProgramA(cl_program program, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClProgramW(cl_program program, const wchar_t* name);
+/** @} */
+
+/* ------------------------------------------------------------------------- */
+/** \brief Annotates an OpenCL event.
+ *
+ * Allows to associate an OpenCL event with a user-provided name.
+ *
+ * \param evnt - The handle of the OpenCL event to name.
+ * \param name - The name of the OpenCL event.
+ *
+ * \version \NVTX_VERSION_1
+ * @{ */
+NVTX_DECLSPEC void NVTX_API nvtxNameClEventA(cl_event evnt, const char* name);
+NVTX_DECLSPEC void NVTX_API nvtxNameClEventW(cl_event evnt, const wchar_t* name);
+/** @} */
+
+/** @} */ /* END RESOURCE_NAMING */
+
+/* ========================================================================= */
+#ifdef UNICODE
+  #define nvtxNameClDevice        nvtxNameClDeviceW
+  #define nvtxNameClContext       nvtxNameClContextW
+  #define nvtxNameClCommandQueue  nvtxNameClCommandQueueW
+  #define nvtxNameClMemObject     nvtxNameClMemObjectW
+  #define nvtxNameClSampler       nvtxNameClSamplerW
+  #define nvtxNameClProgram       nvtxNameClProgramW
+  #define nvtxNameClEvent         nvtxNameClEventW
+#else
+  #define nvtxNameClDevice        nvtxNameClDeviceA
+  #define nvtxNameClContext       nvtxNameClContextA
+  #define nvtxNameClCommandQueue  nvtxNameClCommandQueueA
+  #define nvtxNameClMemObject     nvtxNameClMemObjectA
+  #define nvtxNameClSampler       nvtxNameClSamplerA
+  #define nvtxNameClProgram       nvtxNameClProgramA
+  #define nvtxNameClEvent         nvtxNameClEventA
+#endif
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#ifndef NVTX_NO_IMPL
+#define NVTX_IMPL_GUARD_OPENCL /* Ensure other headers cannot included directly */
+#include "nvtxDetail/nvtxImplOpenCL_v3.h"
+#undef NVTX_IMPL_GUARD_OPENCL
+#endif /*NVTX_NO_IMPL*/
+
+#endif /* NVTOOLSEXT_OPENCL_V3 */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvToolsExtSync.h

@@ -0,0 +1,411 @@
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#include "nvToolsExt.h"
+
+#ifndef NVTOOLSEXT_SYNC_V3
+#define NVTOOLSEXT_SYNC_V3
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* \cond SHOW_HIDDEN 
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE ( (uint16_t)( sizeof(nvtxSyncUserAttributes_v0) ) )
+/** \endcond */
+
+
+/** 
+* \page PAGE_SYNCHRONIZATION Synchronization
+*
+* This section covers a subset of the API that allow users to track additional
+* synchronization details of their application.   Naming OS synchronization primitives 
+* may allow users to better understand the data collected by traced synchronization 
+* APIs.  Additionally, a user defined synchronization object can allow the users to
+* to tell the tools when the user is building their own synchronization system
+* that do not rely on the OS to provide behaviors and instead use techniques like
+* atomic operations and spinlocks.  
+*
+* See module \ref SYNCHRONIZATION for details.
+*
+* \par Example:
+* \code
+* class MyMutex
+* {
+*     volatile long bLocked;
+*     nvtxSyncUser_t hSync;
+* public:
+*     MyMutex(const char* name, nvtxDomainHandle_t d){
+*          bLocked = 0;
+*
+*          nvtxSyncUserAttributes_t attribs = { 0 };
+*          attribs.version = NVTX_VERSION;
+*          attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+*          attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+*          attribs.message.ascii = name;
+*          hSync = nvtxDomainSyncUserCreate(d, &attribs);
+*     }
+*
+*     ~MyMutex() {
+*          nvtxDomainSyncUserDestroy(hSync);
+*     }
+*
+*     bool Lock() {
+*          nvtxDomainSyncUserAcquireStart(hSync);
+*          bool acquired = __sync_bool_compare_and_swap(&bLocked, 0, 1);//atomic compiler intrinsic 
+
+*          if (acquired) {
+*              nvtxDomainSyncUserAcquireSuccess(hSync);
+*          }
+*          else {
+*              nvtxDomainSyncUserAcquireFailed(hSync);
+*          }
+*          return acquired;
+*     }
+
+*     void Unlock() {
+*          nvtxDomainSyncUserReleasing(hSync);
+*          bLocked = false;
+*     }
+* };
+* \endcode
+* 
+* \version \NVTX_VERSION_2
+*/
+
+/*  ------------------------------------------------------------------------- */
+/* \cond SHOW_HIDDEN 
+* \brief Used to build a non-colliding value for resource types separated class
+* \version \NVTX_VERSION_2
+*/
+#define NVTX_RESOURCE_CLASS_SYNC_OS 2 /**< Synchronization objects that are OS specific. */
+#define NVTX_RESOURCE_CLASS_SYNC_PTHREAD 3 /**< Synchronization objects that are from the POSIX Threads API (pthread)*/
+/** \endcond */
+
+
+/*  ------------------------------------------------------------------------- */
+/** \defgroup SYNCHRONIZATION Synchronization
+* See page \ref PAGE_SYNCHRONIZATION.
+* @{
+*/
+
+/** \brief Resource type values for OSs with POSIX Thread API support
+ */
+typedef enum nvtxResourceSyncPosixThreadType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 1), /* pthread_mutex_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_CONDITION = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 2), /* pthread_cond_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_RWLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 3), /* pthread_rwlock_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_BARRIER = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 4), /* pthread_barrier_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_SPINLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 5), /* pthread_spinlock_t  */
+    NVTX_RESOURCE_TYPE_SYNC_PTHREAD_ONCE = NVTX_RESOURCE_MAKE_TYPE(SYNC_PTHREAD, 6) /* pthread_once_t  */
+} nvtxResourceSyncPosixThreadType_t;
+
+/** \brief Resource type values for Windows OSs
+*/
+typedef enum nvtxResourceSyncWindowsType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 1),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_SEMAPHORE = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 2),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_EVENT = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 3),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_CRITICAL_SECTION = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 4),
+    NVTX_RESOURCE_TYPE_SYNC_WINDOWS_SRWLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 5)
+} nvtxResourceSyncWindowsType_t;
+
+/** \brief Resource type values for Linux and Linux derived OSs such as Android
+* \sa
+* ::nvtxResourceSyncPosixThreadType_t
+*/
+typedef enum nvtxResourceSyncLinuxType_t
+{
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_MUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 1),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_FUTEX = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 2),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SEMAPHORE = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 3),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_COMPLETION = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 4),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SPINLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 5),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_SEQLOCK = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 6),
+    NVTX_RESOURCE_TYPE_SYNC_LINUX_RCU = NVTX_RESOURCE_MAKE_TYPE(SYNC_OS, 7)
+} nvtxResourceSyncLinuxType_t;
+
+/** \brief Resource type values for Android come from Linux.
+* \sa
+* ::nvtxResourceSyncLinuxType_t
+* ::nvtxResourceSyncPosixThreadType_t
+*/
+typedef enum nvtxResourceSyncLinuxType_t nvtxResourceSyncAndroidType_t;
+
+/** \brief User Defined Synchronization Object Handle .
+* \anchor SYNCUSER_HANDLE_STRUCTURE
+*
+* This structure is opaque to the user and is used as a handle to reference
+* a user defined syncrhonization object.  The tools will return a pointer through the API for the application
+* to hold on it's behalf to reference the string in the future.
+*
+*/
+typedef struct nvtxSyncUser* nvtxSyncUser_t;
+
+/** \brief User Defined Synchronization Object Attributes Structure.
+* \anchor USERDEF_SYNC_ATTRIBUTES_STRUCTURE
+*
+* This structure is used to describe the attributes of a user defined synchronization 
+* object.  The layout of the structure is defined by a specific version of the tools 
+* extension library and can change between different versions of the Tools Extension
+* library.
+*
+* \par Initializing the Attributes
+*
+* The caller should always perform the following three tasks when using
+* attributes:
+* <ul>
+*    <li>Zero the structure
+*    <li>Set the version field
+*    <li>Set the size field
+* </ul>
+*
+* Zeroing the structure sets all the event attributes types and values
+* to the default value.
+*
+* The version and size field are used by the Tools Extension
+* implementation to handle multiple versions of the attributes structure.
+*
+* It is recommended that the caller use one of the following to methods
+* to initialize the event attributes structure:
+*
+* \par Method 1: Initializing nvtxEventAttributes for future compatibility
+* \code
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+* \endcode
+*
+* \par Method 2: Initializing nvtxSyncUserAttributes_t for a specific version
+* \code
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = 1;
+* attribs.size = (uint16_t)(sizeof(nvtxSyncUserAttributes_t));
+* \endcode
+*
+* If the caller uses Method 1 it is critical that the entire binary
+* layout of the structure be configured to 0 so that all fields
+* are initialized to the default value.
+*
+* The caller should either use both NVTX_VERSION and
+* NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE (Method 1) or use explicit values
+* and a versioned type (Method 2).  Using a mix of the two methods
+* will likely cause either source level incompatibility or binary
+* incompatibility in the future.
+*
+* \par Settings Attribute Types and Values
+*
+*
+* \par Example:
+* \code
+* // Initialize
+* nvtxSyncUserAttributes_t attribs = {0};
+* attribs.version = NVTX_VERSION;
+* attribs.size = NVTX_SYNCUSER_ATTRIB_STRUCT_SIZE;
+*
+* // Configure the Attributes
+* attribs.messageType = NVTX_MESSAGE_TYPE_ASCII;
+* attribs.message.ascii = "Example";
+* \endcode
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+*/
+typedef struct nvtxSyncUserAttributes_v0
+{
+    /**
+    * \brief Version flag of the structure.
+    *
+    * Needs to be set to NVTX_VERSION to indicate the version of NVTX APIs
+    * supported in this header file. This can optionally be overridden to
+    * another version of the tools extension library.
+    */
+    uint16_t version;
+
+    /**
+    * \brief Size of the structure.
+    *
+    * Needs to be set to the size in bytes of the event attribute
+    * structure used to specify the event.
+    */
+    uint16_t size;
+
+    /** \brief Message type specified in this attribute structure.
+    *
+    * Defines the message format of the attribute structure's \ref nvtxSyncUserAttributes_v0::message
+    * "message" field.
+    *
+    * Default Value is NVTX_MESSAGE_UNKNOWN
+    */
+    int32_t messageType;            /* nvtxMessageType_t */
+
+    /** \brief Message assigned to this attribute structure.
+    *
+    * The text message that is attached to an event.
+    */
+    nvtxMessageValue_t message;
+
+} nvtxSyncUserAttributes_v0;
+
+typedef struct nvtxSyncUserAttributes_v0 nvtxSyncUserAttributes_t;
+
+/* ------------------------------------------------------------------------- */
+/** \brief Create a user defined synchronization object 
+* This is used to track non-OS synchronization working with spinlocks and atomics
+*
+* \param domain - Domain to own the resource
+* \param attribs - A structure to assign multiple attributes to the object.
+*
+* \return A handle that represents the newly created user defined synchronization object.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC nvtxSyncUser_t NVTX_API nvtxDomainSyncUserCreate(nvtxDomainHandle_t domain, const nvtxSyncUserAttributes_t* attribs);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Destroy a user defined synchronization object
+* This is used to track non-OS synchronization working with spinlocks and atomics
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserDestroy(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools that an attempt to acquire a user defined synchronization object
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireStart(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of failure in acquiring a user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireStart
+* 
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireFailed(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of success in acquiring a user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireStart.
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserAcquireSuccess(nvtxSyncUser_t handle);
+
+/* ------------------------------------------------------------------------- */
+/** \brief Signal to tools of releasing a reservation on user defined synchronization object
+* This should be called after \ref nvtxDomainSyncUserAcquireSuccess.
+*
+* \param handle - A handle to the object to operate on.
+*
+* \sa
+* ::nvtxDomainSyncUserCreate
+* ::nvtxDomainSyncUserDestroy
+* ::nvtxDomainSyncUserAcquireStart
+* ::nvtxDomainSyncUserAcquireFailed
+* ::nvtxDomainSyncUserAcquireSuccess
+* ::nvtxDomainSyncUserReleasing
+*
+* \version \NVTX_VERSION_2
+*/
+NVTX_DECLSPEC void NVTX_API nvtxDomainSyncUserReleasing(nvtxSyncUser_t handle);
+
+
+/** @} */ /*END defgroup*/
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#ifndef NVTX_NO_IMPL
+#define NVTX_IMPL_GUARD_SYNC /* Ensure other headers cannot included directly */
+#include "nvtxDetail/nvtxImplSync_v3.h"
+#undef NVTX_IMPL_GUARD_SYNC
+#endif /*NVTX_NO_IMPL*/
+
+#endif /* NVTOOLSEXT_SYNC_V3 */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvtxDetail/nvtxImpl.h

@@ -0,0 +1,469 @@
+/* This file was procedurally generated!  Do not modify this file by hand.  */
+
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTX_IMPL_GUARD
+#error Never include this file directly -- it is automatically included by nvToolsExt.h (except when NVTX_NO_IMPL is defined).
+#endif
+
+/* ---- Include required platform headers ---- */
+
+#if defined(_WIN32) 
+
+#include <Windows.h>
+
+#else
+#include <unistd.h>
+
+#if defined(__ANDROID__)
+#include <android/api-level.h> 
+#endif
+
+#if defined(__linux__) || defined(__CYGWIN__)
+#include <sched.h>
+#endif
+
+#include <limits.h>
+#include <dlfcn.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <errno.h>
+
+#include <string.h>
+#include <sys/types.h>
+#include <pthread.h>
+#include <stdlib.h>
+#include <wchar.h>
+
+#endif
+
+/* ---- Define macros used in this file ---- */
+
+#define NVTX_INIT_STATE_FRESH 0
+#define NVTX_INIT_STATE_STARTED 1
+#define NVTX_INIT_STATE_COMPLETE 2
+
+#ifdef NVTX_DEBUG_PRINT
+#ifdef __ANDROID__
+#include <android/log.h>
+#define NVTX_ERR(...) __android_log_print(ANDROID_LOG_ERROR, "NVTOOLSEXT", __VA_ARGS__);
+#define NVTX_INFO(...) __android_log_print(ANDROID_LOG_INFO, "NVTOOLSEXT", __VA_ARGS__);
+#else
+#include <stdio.h>
+#define NVTX_ERR(...) fprintf(stderr, "NVTX_ERROR: " __VA_ARGS__)
+#define NVTX_INFO(...) fprintf(stderr, "NVTX_INFO: " __VA_ARGS__)
+#endif
+#else /* !defined(NVTX_DEBUG_PRINT) */
+#define NVTX_ERR(...)
+#define NVTX_INFO(...)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#ifdef __GNUC__
+#pragma GCC visibility push(hidden)
+#endif
+
+/* ---- Forward declare all functions referenced in globals ---- */
+
+NVTX_LINKONCE_FWDDECL_FUNCTION void NVTX_VERSIONED_IDENTIFIER(nvtxInitOnce)(void);
+NVTX_LINKONCE_FWDDECL_FUNCTION int NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxEtiGetModuleFunctionTable)(
+    NvtxCallbackModule module,
+    NvtxFunctionTable* out_table,
+    unsigned int* out_size);
+NVTX_LINKONCE_FWDDECL_FUNCTION void NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxEtiSetInjectionNvtxVersion)(
+    uint32_t version);
+NVTX_LINKONCE_FWDDECL_FUNCTION const void* NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxGetExportTable)(
+    uint32_t exportTableId);
+
+#include "nvtxInitDecls.h"
+
+/* ---- Define all globals ---- */
+
+typedef struct nvtxGlobals_t
+{
+    volatile unsigned int initState;
+    NvtxExportTableCallbacks etblCallbacks;
+    NvtxExportTableVersionInfo etblVersionInfo;
+
+    /* Implementation function pointers */
+    nvtxMarkEx_impl_fntype nvtxMarkEx_impl_fnptr;
+    nvtxMarkA_impl_fntype nvtxMarkA_impl_fnptr;
+    nvtxMarkW_impl_fntype nvtxMarkW_impl_fnptr;
+    nvtxRangeStartEx_impl_fntype nvtxRangeStartEx_impl_fnptr;
+    nvtxRangeStartA_impl_fntype nvtxRangeStartA_impl_fnptr;
+    nvtxRangeStartW_impl_fntype nvtxRangeStartW_impl_fnptr;
+    nvtxRangeEnd_impl_fntype nvtxRangeEnd_impl_fnptr;
+    nvtxRangePushEx_impl_fntype nvtxRangePushEx_impl_fnptr;
+    nvtxRangePushA_impl_fntype nvtxRangePushA_impl_fnptr;
+    nvtxRangePushW_impl_fntype nvtxRangePushW_impl_fnptr;
+    nvtxRangePop_impl_fntype nvtxRangePop_impl_fnptr;
+    nvtxNameCategoryA_impl_fntype nvtxNameCategoryA_impl_fnptr;
+    nvtxNameCategoryW_impl_fntype nvtxNameCategoryW_impl_fnptr;
+    nvtxNameOsThreadA_impl_fntype nvtxNameOsThreadA_impl_fnptr;
+    nvtxNameOsThreadW_impl_fntype nvtxNameOsThreadW_impl_fnptr;
+
+    nvtxNameCuDeviceA_fakeimpl_fntype nvtxNameCuDeviceA_impl_fnptr;
+    nvtxNameCuDeviceW_fakeimpl_fntype nvtxNameCuDeviceW_impl_fnptr;
+    nvtxNameCuContextA_fakeimpl_fntype nvtxNameCuContextA_impl_fnptr;
+    nvtxNameCuContextW_fakeimpl_fntype nvtxNameCuContextW_impl_fnptr;
+    nvtxNameCuStreamA_fakeimpl_fntype nvtxNameCuStreamA_impl_fnptr;
+    nvtxNameCuStreamW_fakeimpl_fntype nvtxNameCuStreamW_impl_fnptr;
+    nvtxNameCuEventA_fakeimpl_fntype nvtxNameCuEventA_impl_fnptr;
+    nvtxNameCuEventW_fakeimpl_fntype nvtxNameCuEventW_impl_fnptr;
+
+    nvtxNameClDeviceA_fakeimpl_fntype nvtxNameClDeviceA_impl_fnptr;
+    nvtxNameClDeviceW_fakeimpl_fntype nvtxNameClDeviceW_impl_fnptr;
+    nvtxNameClContextA_fakeimpl_fntype nvtxNameClContextA_impl_fnptr;
+    nvtxNameClContextW_fakeimpl_fntype nvtxNameClContextW_impl_fnptr;
+    nvtxNameClCommandQueueA_fakeimpl_fntype nvtxNameClCommandQueueA_impl_fnptr;
+    nvtxNameClCommandQueueW_fakeimpl_fntype nvtxNameClCommandQueueW_impl_fnptr;
+    nvtxNameClMemObjectA_fakeimpl_fntype nvtxNameClMemObjectA_impl_fnptr;
+    nvtxNameClMemObjectW_fakeimpl_fntype nvtxNameClMemObjectW_impl_fnptr;
+    nvtxNameClSamplerA_fakeimpl_fntype nvtxNameClSamplerA_impl_fnptr;
+    nvtxNameClSamplerW_fakeimpl_fntype nvtxNameClSamplerW_impl_fnptr;
+    nvtxNameClProgramA_fakeimpl_fntype nvtxNameClProgramA_impl_fnptr;
+    nvtxNameClProgramW_fakeimpl_fntype nvtxNameClProgramW_impl_fnptr;
+    nvtxNameClEventA_fakeimpl_fntype nvtxNameClEventA_impl_fnptr;
+    nvtxNameClEventW_fakeimpl_fntype nvtxNameClEventW_impl_fnptr;
+
+    nvtxNameCudaDeviceA_impl_fntype nvtxNameCudaDeviceA_impl_fnptr;
+    nvtxNameCudaDeviceW_impl_fntype nvtxNameCudaDeviceW_impl_fnptr;
+    nvtxNameCudaStreamA_fakeimpl_fntype nvtxNameCudaStreamA_impl_fnptr;
+    nvtxNameCudaStreamW_fakeimpl_fntype nvtxNameCudaStreamW_impl_fnptr;
+    nvtxNameCudaEventA_fakeimpl_fntype nvtxNameCudaEventA_impl_fnptr;
+    nvtxNameCudaEventW_fakeimpl_fntype nvtxNameCudaEventW_impl_fnptr;
+
+    nvtxDomainMarkEx_impl_fntype nvtxDomainMarkEx_impl_fnptr;
+    nvtxDomainRangeStartEx_impl_fntype nvtxDomainRangeStartEx_impl_fnptr;
+    nvtxDomainRangeEnd_impl_fntype nvtxDomainRangeEnd_impl_fnptr;
+    nvtxDomainRangePushEx_impl_fntype nvtxDomainRangePushEx_impl_fnptr;
+    nvtxDomainRangePop_impl_fntype nvtxDomainRangePop_impl_fnptr;
+    nvtxDomainResourceCreate_impl_fntype nvtxDomainResourceCreate_impl_fnptr;
+    nvtxDomainResourceDestroy_impl_fntype nvtxDomainResourceDestroy_impl_fnptr;
+    nvtxDomainNameCategoryA_impl_fntype nvtxDomainNameCategoryA_impl_fnptr;
+    nvtxDomainNameCategoryW_impl_fntype nvtxDomainNameCategoryW_impl_fnptr;
+    nvtxDomainRegisterStringA_impl_fntype nvtxDomainRegisterStringA_impl_fnptr;
+    nvtxDomainRegisterStringW_impl_fntype nvtxDomainRegisterStringW_impl_fnptr;
+    nvtxDomainCreateA_impl_fntype nvtxDomainCreateA_impl_fnptr;
+    nvtxDomainCreateW_impl_fntype nvtxDomainCreateW_impl_fnptr;
+    nvtxDomainDestroy_impl_fntype nvtxDomainDestroy_impl_fnptr;
+    nvtxInitialize_impl_fntype nvtxInitialize_impl_fnptr;
+
+    nvtxDomainSyncUserCreate_impl_fntype nvtxDomainSyncUserCreate_impl_fnptr;
+    nvtxDomainSyncUserDestroy_impl_fntype nvtxDomainSyncUserDestroy_impl_fnptr;
+    nvtxDomainSyncUserAcquireStart_impl_fntype nvtxDomainSyncUserAcquireStart_impl_fnptr;
+    nvtxDomainSyncUserAcquireFailed_impl_fntype nvtxDomainSyncUserAcquireFailed_impl_fnptr;
+    nvtxDomainSyncUserAcquireSuccess_impl_fntype nvtxDomainSyncUserAcquireSuccess_impl_fnptr;
+    nvtxDomainSyncUserReleasing_impl_fntype nvtxDomainSyncUserReleasing_impl_fnptr;
+
+    /* Tables of function pointers -- Extra null added to the end to ensure
+    *  a crash instead of silent corruption if a tool reads off the end. */
+    NvtxFunctionPointer* functionTable_CORE  [NVTX_CBID_CORE_SIZE   + 1];
+    NvtxFunctionPointer* functionTable_CUDA  [NVTX_CBID_CUDA_SIZE   + 1];
+    NvtxFunctionPointer* functionTable_OPENCL[NVTX_CBID_OPENCL_SIZE + 1];
+    NvtxFunctionPointer* functionTable_CUDART[NVTX_CBID_CUDART_SIZE + 1];
+    NvtxFunctionPointer* functionTable_CORE2 [NVTX_CBID_CORE2_SIZE  + 1];
+    NvtxFunctionPointer* functionTable_SYNC  [NVTX_CBID_SYNC_SIZE   + 1];
+} nvtxGlobals_t;
+
+NVTX_LINKONCE_DEFINE_GLOBAL nvtxGlobals_t NVTX_VERSIONED_IDENTIFIER(nvtxGlobals) =
+{
+    NVTX_INIT_STATE_FRESH,
+
+    {
+        sizeof(NvtxExportTableCallbacks),
+        NVTX_VERSIONED_IDENTIFIER(nvtxEtiGetModuleFunctionTable)
+    },
+    {
+        sizeof(NvtxExportTableVersionInfo),
+        NVTX_VERSION,
+        0,
+        NVTX_VERSIONED_IDENTIFIER(nvtxEtiSetInjectionNvtxVersion)
+    },
+
+    /* Implementation function pointers */
+    NVTX_VERSIONED_IDENTIFIER(nvtxMarkEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxMarkA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxMarkW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangeStartEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangeStartA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangeStartW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangeEnd_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangePushEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangePushA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangePushW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxRangePop_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCategoryA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCategoryW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameOsThreadA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameOsThreadW_impl_init),
+
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuDeviceA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuDeviceW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuContextA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuContextW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuStreamA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuStreamW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuEventA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCuEventW_impl_init),
+
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClDeviceA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClDeviceW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClContextA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClContextW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClCommandQueueA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClCommandQueueW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClMemObjectA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClMemObjectW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClSamplerA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClSamplerW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClProgramA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClProgramW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClEventA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameClEventW_impl_init),
+
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaDeviceA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaDeviceW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaStreamA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaStreamW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaEventA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxNameCudaEventW_impl_init),
+
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainMarkEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRangeStartEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRangeEnd_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRangePushEx_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRangePop_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainResourceCreate_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainResourceDestroy_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainNameCategoryA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainNameCategoryW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRegisterStringA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainRegisterStringW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainCreateA_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainCreateW_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainDestroy_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxInitialize_impl_init),
+
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserCreate_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserDestroy_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserAcquireStart_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserAcquireFailed_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserAcquireSuccess_impl_init),
+    NVTX_VERSIONED_IDENTIFIER(nvtxDomainSyncUserReleasing_impl_init),
+
+    /* Tables of function pointers */
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeEnd_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePop_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCategoryA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCategoryW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameOsThreadA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameOsThreadW_impl_fnptr,
+        0
+    },
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuDeviceA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuDeviceW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuContextA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuContextW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuStreamA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuStreamW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuEventA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuEventW_impl_fnptr,
+        0
+    },
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClDeviceA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClDeviceW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClContextA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClContextW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClCommandQueueA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClCommandQueueW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClMemObjectA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClMemObjectW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClSamplerA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClSamplerW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClProgramA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClProgramW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClEventA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameClEventW_impl_fnptr,
+        0
+    },
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaDeviceA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaDeviceW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaStreamA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaStreamW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaEventA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaEventW_impl_fnptr,
+        0
+    },
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainMarkEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangeStartEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangeEnd_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangePushEx_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangePop_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainResourceCreate_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainResourceDestroy_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainNameCategoryA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainNameCategoryW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRegisterStringA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRegisterStringW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainCreateA_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainCreateW_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainDestroy_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxInitialize_impl_fnptr,
+        0
+    },
+    {
+        0,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserCreate_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserDestroy_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserAcquireStart_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserAcquireFailed_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserAcquireSuccess_impl_fnptr,
+        (NvtxFunctionPointer*)&NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainSyncUserReleasing_impl_fnptr,
+        0
+    }
+};
+
+/* ---- Define static inline implementations of core API functions ---- */
+
+#include "nvtxImplCore.h"
+
+/* ---- Define implementations of export table functions ---- */
+
+NVTX_LINKONCE_DEFINE_FUNCTION int NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxEtiGetModuleFunctionTable)(
+    NvtxCallbackModule module,
+    NvtxFunctionTable* out_table,
+    unsigned int* out_size)
+{
+    unsigned int bytes = 0;
+    NvtxFunctionTable table = (NvtxFunctionTable)0;
+
+    switch (module)
+    {
+    case NVTX_CB_MODULE_CORE:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CORE;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CORE);
+        break;
+    case NVTX_CB_MODULE_CUDA:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CUDA;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CUDA);
+        break;
+    case NVTX_CB_MODULE_OPENCL:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_OPENCL;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_OPENCL);
+        break;
+    case NVTX_CB_MODULE_CUDART:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CUDART;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CUDART);
+        break;
+    case NVTX_CB_MODULE_CORE2:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CORE2;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_CORE2);
+        break;
+    case NVTX_CB_MODULE_SYNC:
+        table = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_SYNC;
+        bytes = (unsigned int)sizeof(NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).functionTable_SYNC);
+        break;
+    default: return 0;
+    }
+
+    if (out_size)
+        *out_size = (bytes / (unsigned int)sizeof(NvtxFunctionPointer*)) - 1;
+
+    if (out_table)
+        *out_table = table;
+
+    return 1;
+}
+
+NVTX_LINKONCE_DEFINE_FUNCTION const void* NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxGetExportTable)(uint32_t exportTableId)
+{
+    switch (exportTableId)
+    {
+    case NVTX_ETID_CALLBACKS:       return &NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).etblCallbacks;
+    case NVTX_ETID_VERSIONINFO:     return &NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).etblVersionInfo;
+    default:                        return 0;
+    }
+}
+
+NVTX_LINKONCE_DEFINE_FUNCTION void NVTX_API NVTX_VERSIONED_IDENTIFIER(nvtxEtiSetInjectionNvtxVersion)(uint32_t version)
+{
+    /* Reserved for custom implementations to resolve problems with tools */
+    (void)version;
+}
+
+/* ---- Define implementations of init versions of all API functions ---- */
+
+#include "nvtxInitDefs.h"
+
+/* ---- Define implementations of initialization functions ---- */
+
+#include "nvtxInit.h"
+
+#ifdef __GNUC__
+#pragma GCC visibility pop
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif /* __cplusplus */

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvtxDetail/nvtxImplCore.h

@@ -0,0 +1,299 @@
+NVTX_DECLSPEC void NVTX_API nvtxMarkEx(const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxMarkEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkEx_impl_fnptr;
+    if(local!=0)
+        (*local)(eventAttrib);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxMarkA(const char* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxMarkA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkA_impl_fnptr;
+    if(local!=0)
+        (*local)(message);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxMarkW(const wchar_t* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxMarkW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxMarkW_impl_fnptr;
+    if(local!=0)
+        (*local)(message);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartEx(const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangeStartEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartEx_impl_fnptr;
+    if(local!=0)
+        return (*local)(eventAttrib);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxRangeId_t)0;
+}
+
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartA(const char* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangeStartA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartA_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxRangeId_t)0;
+}
+
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxRangeStartW(const wchar_t* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangeStartW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeStartW_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxRangeId_t)0;
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxRangeEnd(nvtxRangeId_t id)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangeEnd_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangeEnd_impl_fnptr;
+    if(local!=0)
+        (*local)(id);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxRangePushEx(const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangePushEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushEx_impl_fnptr;
+    if(local!=0)
+        return (*local)(eventAttrib);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxRangePushA(const char* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangePushA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushA_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxRangePushW(const wchar_t* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangePushW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePushW_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxRangePop(void)
+{
+#ifndef NVTX_DISABLE
+    nvtxRangePop_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxRangePop_impl_fnptr;
+    if(local!=0)
+        return (*local)();
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryA(uint32_t category, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCategoryA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCategoryA_impl_fnptr;
+    if(local!=0)
+        (*local)(category, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCategoryW(uint32_t category, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCategoryW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCategoryW_impl_fnptr;
+    if(local!=0)
+        (*local)(category, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadA(uint32_t threadId, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameOsThreadA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameOsThreadA_impl_fnptr;
+    if(local!=0)
+        (*local)(threadId, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameOsThreadW(uint32_t threadId, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameOsThreadW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameOsThreadW_impl_fnptr;
+    if(local!=0)
+        (*local)(threadId, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainMarkEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainMarkEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainMarkEx_impl_fnptr;
+    if(local!=0)
+        (*local)(domain, eventAttrib);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC nvtxRangeId_t NVTX_API nvtxDomainRangeStartEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRangeStartEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangeStartEx_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain, eventAttrib);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxRangeId_t)0;
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainRangeEnd(nvtxDomainHandle_t domain, nvtxRangeId_t id)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRangeEnd_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangeEnd_impl_fnptr;
+    if(local!=0)
+        (*local)(domain, id);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePushEx(nvtxDomainHandle_t domain, const nvtxEventAttributes_t* eventAttrib)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRangePushEx_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangePushEx_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain, eventAttrib);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC int NVTX_API nvtxDomainRangePop(nvtxDomainHandle_t domain)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRangePop_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRangePop_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (int)NVTX_NO_PUSH_POP_TRACKING;
+}
+
+NVTX_DECLSPEC nvtxResourceHandle_t NVTX_API nvtxDomainResourceCreate(nvtxDomainHandle_t domain, nvtxResourceAttributes_t* attribs)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainResourceCreate_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainResourceCreate_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain, attribs);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxResourceHandle_t)0;
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainResourceDestroy(nvtxResourceHandle_t resource)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainResourceDestroy_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainResourceDestroy_impl_fnptr;
+    if(local!=0)
+        (*local)(resource);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryA(nvtxDomainHandle_t domain, uint32_t category, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainNameCategoryA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainNameCategoryA_impl_fnptr;
+    if(local!=0)
+        (*local)(domain, category, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainNameCategoryW(nvtxDomainHandle_t domain, uint32_t category, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainNameCategoryW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainNameCategoryW_impl_fnptr;
+    if(local!=0)
+        (*local)(domain, category, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringA(nvtxDomainHandle_t domain, const char* string)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRegisterStringA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRegisterStringA_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain, string);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxStringHandle_t)0;
+}
+
+NVTX_DECLSPEC nvtxStringHandle_t NVTX_API nvtxDomainRegisterStringW(nvtxDomainHandle_t domain, const wchar_t* string)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainRegisterStringW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainRegisterStringW_impl_fnptr;
+    if(local!=0)
+        return (*local)(domain, string);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxStringHandle_t)0;
+}
+
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateA(const char* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainCreateA_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainCreateA_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxDomainHandle_t)0;
+}
+
+NVTX_DECLSPEC nvtxDomainHandle_t NVTX_API nvtxDomainCreateW(const wchar_t* message)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainCreateW_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainCreateW_impl_fnptr;
+    if(local!=0)
+        return (*local)(message);
+    else
+#endif  /*NVTX_DISABLE*/
+        return (nvtxDomainHandle_t)0;
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxDomainDestroy(nvtxDomainHandle_t domain)
+{
+#ifndef NVTX_DISABLE
+    nvtxDomainDestroy_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxDomainDestroy_impl_fnptr;
+    if(local!=0)
+        (*local)(domain);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxInitialize(const void* reserved)
+{
+#ifndef NVTX_DISABLE
+    nvtxInitialize_impl_fntype local = NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxInitialize_impl_fnptr;
+    if(local!=0)
+        (*local)(reserved);
+#endif /*NVTX_DISABLE*/
+}

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvtxDetail/nvtxImplCudaRt_v3.h

@@ -0,0 +1,112 @@
+/* This file was procedurally generated!  Do not modify this file by hand.  */
+
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTX_IMPL_GUARD_CUDART
+#error Never include this file directly -- it is automatically included by nvToolsExtCudaRt.h (except when NVTX_NO_IMPL is defined).
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+//typedef void (NVTX_API * nvtxNameCudaDeviceA_impl_fntype)(int device, const char* name);
+//typedef void (NVTX_API * nvtxNameCudaDeviceW_impl_fntype)(int device, const wchar_t* name);
+typedef void (NVTX_API * nvtxNameCudaStreamA_impl_fntype)(cudaStream_t stream, const char* name);
+typedef void (NVTX_API * nvtxNameCudaStreamW_impl_fntype)(cudaStream_t stream, const wchar_t* name);
+typedef void (NVTX_API * nvtxNameCudaEventA_impl_fntype)(cudaEvent_t event, const char* name);
+typedef void (NVTX_API * nvtxNameCudaEventW_impl_fntype)(cudaEvent_t event, const wchar_t* name);
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceA(int device, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaDeviceA_impl_fntype local = (nvtxNameCudaDeviceA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaDeviceA_impl_fnptr;
+    if(local!=0)
+        (*local)(device, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaDeviceW(int device, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaDeviceW_impl_fntype local = (nvtxNameCudaDeviceW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaDeviceW_impl_fnptr;
+    if(local!=0)
+        (*local)(device, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamA(cudaStream_t stream, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaStreamA_impl_fntype local = (nvtxNameCudaStreamA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaStreamA_impl_fnptr;
+    if(local!=0)
+        (*local)(stream, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaStreamW(cudaStream_t stream, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaStreamW_impl_fntype local = (nvtxNameCudaStreamW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaStreamW_impl_fnptr;
+    if(local!=0)
+        (*local)(stream, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventA(cudaEvent_t event, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaEventA_impl_fntype local = (nvtxNameCudaEventA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaEventA_impl_fnptr;
+    if(local!=0)
+        (*local)(event, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCudaEventW(cudaEvent_t event, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCudaEventW_impl_fntype local = (nvtxNameCudaEventW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCudaEventW_impl_fnptr;
+    if(local!=0)
+        (*local)(event, name);
+#endif /*NVTX_DISABLE*/
+}
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif /* __cplusplus */
+

miniconda3/envs/active_proaction/lib/python3.10/site-packages/nvidia/nvtx/include/nvtx3/nvtxDetail/nvtxImplCuda_v3.h

@@ -0,0 +1,133 @@
+/* This file was procedurally generated!  Do not modify this file by hand.  */
+
+/*
+* Copyright 2009-2016  NVIDIA Corporation.  All rights reserved.
+*
+* NOTICE TO USER:
+*
+* This source code is subject to NVIDIA ownership rights under U.S. and
+* international Copyright laws.
+*
+* This software and the information contained herein is PROPRIETARY and
+* CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
+* of a form of NVIDIA software license agreement.
+*
+* NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
+* CODE FOR ANY PURPOSE.  IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
+* IMPLIED WARRANTY OF ANY KIND.  NVIDIA DISCLAIMS ALL WARRANTIES WITH
+* REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
+* MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
+* IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
+* OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+* OF USE, DATA OR PROFITS,  WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
+* OR OTHER TORTIOUS ACTION,  ARISING OUT OF OR IN CONNECTION WITH THE USE
+* OR PERFORMANCE OF THIS SOURCE CODE.
+*
+* U.S. Government End Users.   This source code is a "commercial item" as
+* that term is defined at  48 C.F.R. 2.101 (OCT 1995), consisting  of
+* "commercial computer  software"  and "commercial computer software
+* documentation" as such terms are  used in 48 C.F.R. 12.212 (SEPT 1995)
+* and is provided to the U.S. Government only as a commercial end item.
+* Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
+* 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
+* source code with only those rights set forth herein.
+*
+* Any use of this source code in individual and commercial software must
+* include, in the user documentation and internal comments to the code,
+* the above Disclaimer and U.S. Government End Users Notice.
+*/
+
+#ifndef NVTX_IMPL_GUARD_CUDA
+#error Never include this file directly -- it is automatically included by nvToolsExtCuda.h (except when NVTX_NO_IMPL is defined).
+#endif
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef void (NVTX_API * nvtxNameCuDeviceA_impl_fntype)(CUdevice device, const char* name);
+typedef void (NVTX_API * nvtxNameCuDeviceW_impl_fntype)(CUdevice device, const wchar_t* name);
+typedef void (NVTX_API * nvtxNameCuContextA_impl_fntype)(CUcontext context, const char* name);
+typedef void (NVTX_API * nvtxNameCuContextW_impl_fntype)(CUcontext context, const wchar_t* name);
+typedef void (NVTX_API * nvtxNameCuStreamA_impl_fntype)(CUstream stream, const char* name);
+typedef void (NVTX_API * nvtxNameCuStreamW_impl_fntype)(CUstream stream, const wchar_t* name);
+typedef void (NVTX_API * nvtxNameCuEventA_impl_fntype)(CUevent event, const char* name);
+typedef void (NVTX_API * nvtxNameCuEventW_impl_fntype)(CUevent event, const wchar_t* name);
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceA(CUdevice device, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuDeviceA_impl_fntype local = (nvtxNameCuDeviceA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuDeviceA_impl_fnptr;
+    if(local!=0)
+        (*local)(device, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuDeviceW(CUdevice device, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuDeviceW_impl_fntype local = (nvtxNameCuDeviceW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuDeviceW_impl_fnptr;
+    if(local!=0)
+        (*local)(device, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextA(CUcontext context, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuContextA_impl_fntype local = (nvtxNameCuContextA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuContextA_impl_fnptr;
+    if(local!=0)
+        (*local)(context, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuContextW(CUcontext context, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuContextW_impl_fntype local = (nvtxNameCuContextW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuContextW_impl_fnptr;
+    if(local!=0)
+        (*local)(context, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamA(CUstream stream, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuStreamA_impl_fntype local = (nvtxNameCuStreamA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuStreamA_impl_fnptr;
+    if(local!=0)
+        (*local)(stream, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuStreamW(CUstream stream, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuStreamW_impl_fntype local = (nvtxNameCuStreamW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuStreamW_impl_fnptr;
+    if(local!=0)
+        (*local)(stream, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventA(CUevent event, const char* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuEventA_impl_fntype local = (nvtxNameCuEventA_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuEventA_impl_fnptr;
+    if(local!=0)
+        (*local)(event, name);
+#endif /*NVTX_DISABLE*/
+}
+
+NVTX_DECLSPEC void NVTX_API nvtxNameCuEventW(CUevent event, const wchar_t* name)
+{
+#ifndef NVTX_DISABLE
+    nvtxNameCuEventW_impl_fntype local = (nvtxNameCuEventW_impl_fntype)NVTX_VERSIONED_IDENTIFIER(nvtxGlobals).nvtxNameCuEventW_impl_fnptr;
+    if(local!=0)
+        (*local)(event, name);
+#endif /*NVTX_DISABLE*/
+}
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif /* __cplusplus */
+