Ingest 'DIGITAL ELECTRONICS-by-Flyod' (hybrid-winocr + Linearized + Arctic 256-d Index)

.gitattributes

@@ -98,3 +98,5 @@ data/pdfs/digital_design_and_computer_architecture_arm_edition.pdf filter=lfs di
 data/layouts/digital_design_and_computer_architecture_arm_edition.json filter=lfs diff=lfs merge=lfs -text
 data/pdfs/digital_integrated_circuits_a_design_perspective.pdf filter=lfs diff=lfs merge=lfs -text
 data/layouts/digital_integrated_circuits_a_design_perspective.json filter=lfs diff=lfs merge=lfs -text
+data/pdfs/digital_electronics_by_flyod.pdf filter=lfs diff=lfs merge=lfs -text
+data/layouts/digital_electronics_by_flyod.json filter=lfs diff=lfs merge=lfs -text

data/catalog.json

@@ -19797,5 +19797,956 @@
         "page": 1
       }
     ]
+  },
+  {
+    "id": "digital_electronics_by_flyod",
+    "title": "DIGITAL ELECTRONICS-by-Flyod",
+    "author": "Unknown Author",
+    "totalPages": 953,
+    "fileSize": 24004311,
+    "category": "Electronics",
+    "tags": [
+      "Electrical Circuits",
+      "Embedded Systems",
+      "Fundamentals",
+      "Algorithms & Data Structures",
+      "Electronics"
+    ],
+    "coverUrl": "data/covers/digital_electronics_by_flyod.png",
+    "pdfUrl": "data/pdfs/digital_electronics_by_flyod.pdf",
+    "layoutUrl": "data/layouts/digital_electronics_by_flyod.json",
+    "linearized": true,
+    "toc": [
+      {
+        "level": 1,
+        "title": "Cover",
+        "page": 1
+      },
+      {
+        "level": 1,
+        "title": "Title",
+        "page": 2
+      },
+      {
+        "level": 1,
+        "title": "Copyright",
+        "page": 3
+      },
+      {
+        "level": 1,
+        "title": "Contents",
+        "page": 12
+      },
+      {
+        "level": 1,
+        "title": "Chapter 1 Introductory Concepts",
+        "page": 16
+      },
+      {
+        "level": 2,
+        "title": "1–1 Digital and Analog Quantities",
+        "page": 17
+      },
+      {
+        "level": 2,
+        "title": "1–2 Binary Digits, Logic Levels, and Digital Waveforms",
+        "page": 20
+      },
+      {
+        "level": 2,
+        "title": "1–3 Basic Logic Functions",
+        "page": 26
+      },
+      {
+        "level": 2,
+        "title": "1–4 Combinational and Sequential Logic Functions",
+        "page": 28
+      },
+      {
+        "level": 2,
+        "title": "1–5 Introduction to Programmable Logic",
+        "page": 35
+      },
+      {
+        "level": 2,
+        "title": "1–6 Fixed-Function Logic Devices",
+        "page": 41
+      },
+      {
+        "level": 2,
+        "title": "1–7 Test and Measurement Instruments",
+        "page": 44
+      },
+      {
+        "level": 2,
+        "title": "1–8 Introduction to Troubleshooting",
+        "page": 55
+      },
+      {
+        "level": 1,
+        "title": "Chapter 2 Number Systems, Operations, and Codes",
+        "page": 66
+      },
+      {
+        "level": 2,
+        "title": "2–1 Decimal Numbers",
+        "page": 67
+      },
+      {
+        "level": 2,
+        "title": "2–2 Binary Numbers",
+        "page": 68
+      },
+      {
+        "level": 2,
+        "title": "2–3 Decimal-to-Binary Conversion",
+        "page": 72
+      },
+      {
+        "level": 2,
+        "title": "2–4 Binary Arithmetic",
+        "page": 75
+      },
+      {
+        "level": 2,
+        "title": "2–5 Complements of Binary Numbers",
+        "page": 78
+      },
+      {
+        "level": 2,
+        "title": "2–6 Signed Numbers",
+        "page": 80
+      },
+      {
+        "level": 2,
+        "title": "2–7 Arithmetic Operations with Signed Numbers",
+        "page": 86
+      },
+      {
+        "level": 2,
+        "title": "2–8 Hexadecimal Numbers",
+        "page": 93
+      },
+      {
+        "level": 2,
+        "title": "2–9 Octal Numbers",
+        "page": 99
+      },
+      {
+        "level": 2,
+        "title": "2–10 Binary Coded Decimal (BCD)",
+        "page": 101
+      },
+      {
+        "level": 2,
+        "title": "2–11 Digital Codes",
+        "page": 105
+      },
+      {
+        "level": 2,
+        "title": "2–12 Error Codes",
+        "page": 110
+      },
+      {
+        "level": 1,
+        "title": "Chapter 3 Logic Gates",
+        "page": 126
+      },
+      {
+        "level": 2,
+        "title": "3–1 The Inverter",
+        "page": 127
+      },
+      {
+        "level": 2,
+        "title": "3–2 The AND Gate",
+        "page": 130
+      },
+      {
+        "level": 2,
+        "title": "3–3 The OR Gate",
+        "page": 137
+      },
+      {
+        "level": 2,
+        "title": "3–4 The NAND Gate",
+        "page": 141
+      },
+      {
+        "level": 2,
+        "title": "3–5 The NOR Gate",
+        "page": 146
+      },
+      {
+        "level": 2,
+        "title": "3–6 The Exclusive-OR and Exclusive-NOR Gates",
+        "page": 150
+      },
+      {
+        "level": 2,
+        "title": "3–7 Programmable Logic",
+        "page": 154
+      },
+      {
+        "level": 2,
+        "title": "3–8 Fixed-Function Logic Gates",
+        "page": 161
+      },
+      {
+        "level": 2,
+        "title": "3–9 Troubleshooting",
+        "page": 171
+      },
+      {
+        "level": 1,
+        "title": "Chapter 4 Boolean Algebra and Logic Simplification",
+        "page": 192
+      },
+      {
+        "level": 2,
+        "title": "4–1 Boolean Operations and Expressions",
+        "page": 193
+      },
+      {
+        "level": 2,
+        "title": "4–2 Laws and Rules of Boolean Algebra",
+        "page": 194
+      },
+      {
+        "level": 2,
+        "title": "4–3 DeMorgan’s Theorems",
+        "page": 200
+      },
+      {
+        "level": 2,
+        "title": "4–4 Boolean Analysis of Logic Circuits",
+        "page": 204
+      },
+      {
+        "level": 2,
+        "title": "4–5 Logic Simplification Using Boolean Algebra",
+        "page": 206
+      },
+      {
+        "level": 2,
+        "title": "4–6 Standard Forms of Boolean Expressions",
+        "page": 210
+      },
+      {
+        "level": 2,
+        "title": "4–7 Boolean Expressions and Truth Tables",
+        "page": 217
+      },
+      {
+        "level": 2,
+        "title": "4–8 The Karnaugh Map",
+        "page": 220
+      },
+      {
+        "level": 2,
+        "title": "4–9 Karnaugh Map SOP Minimization",
+        "page": 223
+      },
+      {
+        "level": 2,
+        "title": "4–10 Karnaugh Map POS Minimization",
+        "page": 234
+      },
+      {
+        "level": 2,
+        "title": "4–11 The Quine-McCluskey Method",
+        "page": 238
+      },
+      {
+        "level": 2,
+        "title": "4–12 Boolean Expressions with VHDL",
+        "page": 241
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 245
+      },
+      {
+        "level": 1,
+        "title": "Chapter 5 Combinational Logic Analysis",
+        "page": 262
+      },
+      {
+        "level": 2,
+        "title": "5–1 Basic Combinational Logic Circuits",
+        "page": 263
+      },
+      {
+        "level": 2,
+        "title": "5–2 Implementing Combinational Logic",
+        "page": 268
+      },
+      {
+        "level": 2,
+        "title": "5–3 The Universal Property of NAND and NOR Gates",
+        "page": 273
+      },
+      {
+        "level": 2,
+        "title": "5–4 Combinational Logic Using NAND and NOR Gates",
+        "page": 275
+      },
+      {
+        "level": 2,
+        "title": "5–5 Pulse Waveform Operation",
+        "page": 280
+      },
+      {
+        "level": 2,
+        "title": "5–6 Combinational Logic with VHDL",
+        "page": 284
+      },
+      {
+        "level": 2,
+        "title": "5–7 Troubleshooting",
+        "page": 289
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 295
+      },
+      {
+        "level": 1,
+        "title": "Chapter 6 Functions of Combinational Logic",
+        "page": 314
+      },
+      {
+        "level": 2,
+        "title": "6–1 Half and Full Adders",
+        "page": 315
+      },
+      {
+        "level": 2,
+        "title": "6–2 Parallel Binary Adders",
+        "page": 318
+      },
+      {
+        "level": 2,
+        "title": "6–3 Ripple Carry and Look-Ahead Carry Adders",
+        "page": 325
+      },
+      {
+        "level": 2,
+        "title": "6–4 Comparators",
+        "page": 328
+      },
+      {
+        "level": 2,
+        "title": "6–5 Decoders",
+        "page": 332
+      },
+      {
+        "level": 2,
+        "title": "6–6 Encoders",
+        "page": 342
+      },
+      {
+        "level": 2,
+        "title": "6–7 Code Converters",
+        "page": 346
+      },
+      {
+        "level": 2,
+        "title": "6–8 Multiplexers (Data Selectors)",
+        "page": 348
+      },
+      {
+        "level": 2,
+        "title": "6–9 Demultiplexers",
+        "page": 357
+      },
+      {
+        "level": 2,
+        "title": "6–10 Parity Generators/Checkers",
+        "page": 359
+      },
+      {
+        "level": 2,
+        "title": "6–11 Troubleshooting",
+        "page": 363
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 366
+      },
+      {
+        "level": 1,
+        "title": "Chapter 7 Latches, Flip-Flops, and Timers",
+        "page": 388
+      },
+      {
+        "level": 2,
+        "title": "7–1 Latches",
+        "page": 389
+      },
+      {
+        "level": 2,
+        "title": "7–2 Flip-Flops",
+        "page": 396
+      },
+      {
+        "level": 2,
+        "title": "7–3 Flip-Flop Operating Characteristics",
+        "page": 407
+      },
+      {
+        "level": 2,
+        "title": "7–4 Flip-Flop Applications",
+        "page": 410
+      },
+      {
+        "level": 2,
+        "title": "7–5 One-Shots",
+        "page": 415
+      },
+      {
+        "level": 2,
+        "title": "7–6 The Astable Multivibrator",
+        "page": 424
+      },
+      {
+        "level": 2,
+        "title": "7–7 Troubleshooting",
+        "page": 428
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 430
+      },
+      {
+        "level": 1,
+        "title": "Chapter 8 Shift Registers",
+        "page": 450
+      },
+      {
+        "level": 2,
+        "title": "8–1 Shift Register Operations",
+        "page": 451
+      },
+      {
+        "level": 2,
+        "title": "8–2 Types of Shift Register Data I/Os",
+        "page": 452
+      },
+      {
+        "level": 2,
+        "title": "8–3 Bidirectional Shift Registers",
+        "page": 463
+      },
+      {
+        "level": 2,
+        "title": "8–4 Shift Register Counters",
+        "page": 466
+      },
+      {
+        "level": 2,
+        "title": "8–5 Shift Register Applications",
+        "page": 470
+      },
+      {
+        "level": 2,
+        "title": "8–6 Logic Symbols with Dependency Notation",
+        "page": 477
+      },
+      {
+        "level": 2,
+        "title": "8–7 Troubleshooting",
+        "page": 479
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 481
+      },
+      {
+        "level": 1,
+        "title": "Chapter 9 Counters",
+        "page": 498
+      },
+      {
+        "level": 2,
+        "title": "9–1 Finite State Machines",
+        "page": 499
+      },
+      {
+        "level": 2,
+        "title": "9–2 Asynchronous Counters",
+        "page": 501
+      },
+      {
+        "level": 2,
+        "title": "9–3 Synchronous Counters",
+        "page": 508
+      },
+      {
+        "level": 2,
+        "title": "9–4 Up/Down Synchronous Counters",
+        "page": 516
+      },
+      {
+        "level": 2,
+        "title": "9–5 Design of Synchronous Counters",
+        "page": 520
+      },
+      {
+        "level": 2,
+        "title": "9–6 Cascaded Counters",
+        "page": 528
+      },
+      {
+        "level": 2,
+        "title": "9–7 Counter Decoding",
+        "page": 532
+      },
+      {
+        "level": 2,
+        "title": "9–8 Counter Applications",
+        "page": 535
+      },
+      {
+        "level": 2,
+        "title": "9–9 Logic Symbols with Dependency Notation",
+        "page": 540
+      },
+      {
+        "level": 2,
+        "title": "9–10 Troubleshooting",
+        "page": 542
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 546
+      },
+      {
+        "level": 1,
+        "title": "Chapter 10 Programmable Logic",
+        "page": 562
+      },
+      {
+        "level": 2,
+        "title": "10–1 Simple Programmable Logic Devices (SPLDs)",
+        "page": 563
+      },
+      {
+        "level": 2,
+        "title": "10–2 Complex Programmable Logic Devices (CPLDs)",
+        "page": 568
+      },
+      {
+        "level": 2,
+        "title": "10–3 Macrocell Modes",
+        "page": 575
+      },
+      {
+        "level": 2,
+        "title": "10–4 Field-Programmable Gate Arrays (FPGAs)",
+        "page": 578
+      },
+      {
+        "level": 2,
+        "title": "10–5 Programmable Logic Software",
+        "page": 586
+      },
+      {
+        "level": 2,
+        "title": "10–6 Boundary Scan Logic",
+        "page": 596
+      },
+      {
+        "level": 2,
+        "title": "10–7 Troubleshooting",
+        "page": 603
+      },
+      {
+        "level": 2,
+        "title": "Applied Logic",
+        "page": 609
+      },
+      {
+        "level": 1,
+        "title": "Chapter 11 Data Storage",
+        "page": 628
+      },
+      {
+        "level": 2,
+        "title": "11–1 Semiconductor Memory Basics",
+        "page": 629
+      },
+      {
+        "level": 2,
+        "title": "11–2 The Random-Access Memory (RAM)",
+        "page": 634
+      },
+      {
+        "level": 2,
+        "title": "11–3 The Read-Only Memory (ROM)",
+        "page": 647
+      },
+      {
+        "level": 2,
+        "title": "11–4 Programmable ROMs",
+        "page": 653
+      },
+      {
+        "level": 2,
+        "title": "11–5 The Flash Memory",
+        "page": 656
+      },
+      {
+        "level": 2,
+        "title": "11–6 Memory Expansion",
+        "page": 661
+      },
+      {
+        "level": 2,
+        "title": "11–7 Special Types of Memories",
+        "page": 667
+      },
+      {
+        "level": 2,
+        "title": "11–8 Magnetic and Optical Storage",
+        "page": 671
+      },
+      {
+        "level": 2,
+        "title": "11–9 Memory Hierarchy",
+        "page": 677
+      },
+      {
+        "level": 2,
+        "title": "11–10 Cloud Storage",
+        "page": 681
+      },
+      {
+        "level": 2,
+        "title": "11–11 Troubleshooting",
+        "page": 684
+      },
+      {
+        "level": 1,
+        "title": "Chapter 12 Signal Conversion and Processing",
+        "page": 698
+      },
+      {
+        "level": 2,
+        "title": "12–1 Analog-to-Digital Conversion",
+        "page": 699
+      },
+      {
+        "level": 2,
+        "title": "12–2 Methods of Analog-to-Digital Conversion",
+        "page": 705
+      },
+      {
+        "level": 2,
+        "title": "12–3 Methods of Digital-to-Analog Conversion",
+        "page": 716
+      },
+      {
+        "level": 2,
+        "title": "12–4 Digital Signal Processing",
+        "page": 724
+      },
+      {
+        "level": 2,
+        "title": "12–5 The Digital Signal Processor (DSP)",
+        "page": 725
+      },
+      {
+        "level": 1,
+        "title": "Chapter 13 Data transmission",
+        "page": 740
+      },
+      {
+        "level": 2,
+        "title": "13–1 Data Transmission Media",
+        "page": 741
+      },
+      {
+        "level": 2,
+        "title": "13–2 Methods and Modes of Data Transmission",
+        "page": 746
+      },
+      {
+        "level": 2,
+        "title": "13–3 Modulation of Analog Signals with Digital Data",
+        "page": 751
+      },
+      {
+        "level": 2,
+        "title": "13–4 Modulation of Digital Signals with Analog Data",
+        "page": 754
+      },
+      {
+        "level": 2,
+        "title": "13–5 Multiplexing and Demultiplexing",
+        "page": 760
+      },
+      {
+        "level": 2,
+        "title": "13–6 Bus Basics",
+        "page": 765
+      },
+      {
+        "level": 2,
+        "title": "13–7 Parallel Buses",
+        "page": 770
+      },
+      {
+        "level": 2,
+        "title": "13–8 The Universal Serial Bus (USB)",
+        "page": 776
+      },
+      {
+        "level": 2,
+        "title": "13–9 Other Serial Buses",
+        "page": 779
+      },
+      {
+        "level": 2,
+        "title": "13–10 Bus Interfacing",
+        "page": 785
+      },
+      {
+        "level": 1,
+        "title": "Chapter 14 Data Processing and Control",
+        "page": 802
+      },
+      {
+        "level": 2,
+        "title": "14–1 The Computer System",
+        "page": 803
+      },
+      {
+        "level": 2,
+        "title": "14–2 Practical Computer System Considerations",
+        "page": 807
+      },
+      {
+        "level": 2,
+        "title": "14–3 The Processor: Basic Operation",
+        "page": 813
+      },
+      {
+        "level": 2,
+        "title": "14–4 The Processor: Addressing Modes",
+        "page": 818
+      },
+      {
+        "level": 2,
+        "title": "14–5 The Processor: Special Operations",
+        "page": 824
+      },
+      {
+        "level": 2,
+        "title": "14–6 Operating Systems and Hardware",
+        "page": 829
+      },
+      {
+        "level": 2,
+        "title": "14–7 Programming",
+        "page": 832
+      },
+      {
+        "level": 2,
+        "title": "14–8 Microcontrollers and Embedded Systems",
+        "page": 839
+      },
+      {
+        "level": 2,
+        "title": "14–9 System on Chip (SoC)",
+        "page": 845
+      },
+      {
+        "level": 1,
+        "title": "Chapter 15 Integrated Circuit Technologies",
+        "page": 856
+      },
+      {
+        "level": 2,
+        "title": "15–1 Basic Operational Characteristics and Parameters",
+        "page": 857
+      },
+      {
+        "level": 2,
+        "title": "15–2 CMOS Circuits",
+        "page": 864
+      },
+      {
+        "level": 2,
+        "title": "15–3 TTL (Bipolar) Circuits",
+        "page": 869
+      },
+      {
+        "level": 2,
+        "title": "15–4 Practical Considerations in the Use of TTL",
+        "page": 874
+      },
+      {
+        "level": 2,
+        "title": "15–5 Comparison of CMOS and TTL Performance",
+        "page": 881
+      },
+      {
+        "level": 2,
+        "title": "15–6 Emitter-Coupled Logic (ECL) Circuits",
+        "page": 882
+      },
+      {
+        "level": 2,
+        "title": "15–7 PMOS, NMOS, and E2CMOS",
+        "page": 884
+      },
+      {
+        "level": 1,
+        "title": "Answers to Odd -Numbered Problems",
+        "page": 896
+      },
+      {
+        "level": 1,
+        "title": "Glossary",
+        "page": 926
+      },
+      {
+        "level": 1,
+        "title": "Index",
+        "page": 937
+      },
+      {
+        "level": 2,
+        "title": "A",
+        "page": 937
+      },
+      {
+        "level": 2,
+        "title": "B",
+        "page": 937
+      },
+      {
+        "level": 2,
+        "title": "C",
+        "page": 939
+      },
+      {
+        "level": 2,
+        "title": "D",
+        "page": 940
+      },
+      {
+        "level": 2,
+        "title": "E",
+        "page": 941
+      },
+      {
+        "level": 2,
+        "title": "F",
+        "page": 942
+      },
+      {
+        "level": 2,
+        "title": "G",
+        "page": 943
+      },
+      {
+        "level": 2,
+        "title": "H",
+        "page": 943
+      },
+      {
+        "level": 2,
+        "title": "I",
+        "page": 943
+      },
+      {
+        "level": 2,
+        "title": "J",
+        "page": 944
+      },
+      {
+        "level": 2,
+        "title": "K",
+        "page": 944
+      },
+      {
+        "level": 2,
+        "title": "L",
+        "page": 944
+      },
+      {
+        "level": 2,
+        "title": "M",
+        "page": 945
+      },
+      {
+        "level": 2,
+        "title": "N",
+        "page": 947
+      },
+      {
+        "level": 2,
+        "title": "O",
+        "page": 947
+      },
+      {
+        "level": 2,
+        "title": "P",
+        "page": 948
+      },
+      {
+        "level": 2,
+        "title": "Q",
+        "page": 949
+      },
+      {
+        "level": 2,
+        "title": "R",
+        "page": 949
+      },
+      {
+        "level": 2,
+        "title": "S",
+        "page": 949
+      },
+      {
+        "level": 2,
+        "title": "T",
+        "page": 951
+      },
+      {
+        "level": 2,
+        "title": "U",
+        "page": 952
+      },
+      {
+        "level": 2,
+        "title": "V",
+        "page": 953
+      },
+      {
+        "level": 2,
+        "title": "W",
+        "page": 953
+      },
+      {
+        "level": 2,
+        "title": "X",
+        "page": 953
+      },
+      {
+        "level": 2,
+        "title": "Z",
+        "page": 953
+      }
+    ]
   }
 ]

data/cloud_index/manifest.json

@@ -1,11 +1,11 @@
 {
   "version": 3,
-  "updatedAt": 1793787931,
+  "updatedAt": 1793788035,
   "model": "Snowflake/snowflake-arctic-embed-m-v1.5",
   "reranker": "Xenova/ms-marco-MiniLM-L-6-v2",
   "dim": 256,
-  "totalBooks": 28,
-  "totalPassages": 25302,
+  "totalBooks": 29,
+  "totalPassages": 27490,
   "books": {
     "building_winning_algorithmic_trading_systems_kevin_j_davey": {
       "passages": 545,
@@ -147,6 +147,11 @@
       "passages": 1180,
       "ocrEngine": "hybrid-pymupdf",
       "linearized": true
+    },
+    "digital_electronics_by_flyod": {
+      "passages": 2188,
+      "ocrEngine": "hybrid-winocr",
+      "linearized": true
     }
   }
 }

data/cloud_index/passages.json.gz

@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:665a12538748176f1be52f7c2b015e19bb70736d8a2f915b38916c7807f1f9db
-size 8407209
+oid sha256:b364d9034fd4cbaee6af9c3b2662d3faa39c03d122fa228aceb02756b3e26cfe
+size 9033613

data/cloud_index/vectors.bin

@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:7f2031ef93c2292eef1b153c6bbd6e5752b1067d6ca3afd7e985e04fdf5b37d0
-size 6477374
+oid sha256:5749e274c97066b7cb2df4ca7b4c115d057b7c0958f43ed30d45f7b62d077109
+size 7037502

data/layouts/digital_electronics_by_flyod.json

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:70f05a82cc5647edce67cf83ad42029bd10378ade11cf93597b1a452f834fe55
+size 22263458

data/pdfs/digital_electronics_by_flyod.pdf

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:fa9252a00e1c6a85d129b207bb88feddf15bbf3b9be918d91181bb42d3481374
+size 24004311