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beatsprom/semiconductor-rtl-verilog-chip-design-2026
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Updated
Sep 7
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1k
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114
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2
vkenbeek/verilog-wavedrom
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Updated
May 3, 2024
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92.3k
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26
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7
Nellyw888/RTL-Coder_small
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Updated
May 20, 2025
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2.65k
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107
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1
Nellyw888/RTL-Coder_7b_reasoning
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Updated
May 20, 2025
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1.3k
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34
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1
Nellyw888/VeriReason-RTL-Coder_7b_reasoning_tb
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Updated
May 31, 2025
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1.15k
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80
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4
Nellyw888/VeriReason-RTL-Coder_7b_reasoning_tb_simple
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Updated
May 31, 2025
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743
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86
Nellyw888/RTL-Coder_7b_reasoning_tb_combined
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Updated
May 20, 2025
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1.89k
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64
AbiralArch/hardware-cvdp-problems
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Updated
Aug 1, 2025
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1
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109
AbiralArch/verilog-training-data
Updated
Aug 1, 2025
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30
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1
AbiralArch/autovcoder-datasets
Updated
Aug 1, 2025
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16
AbiralArch/hardware-cvdp-examples
Updated
Aug 1, 2025
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22
AbiralArch/hardware-verilogeval-v2
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Updated
Aug 1, 2025
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471
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30
AbiralArch/hardware-shailja-vgen
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Updated
Aug 1, 2025
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87
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12
AbiralArch/hardware-cvdp-complete
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Aug 1, 2025
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244
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1
sungyub/codev-r1-verl
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Updated
Nov 11, 2025
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3.13k
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21
Arrakark/scalared_guidelines
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Updated
Dec 8, 2025
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7.23k
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13
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1
HPAI-BSC/NotSoTiny-25-12
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Updated
Feb 4
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1.11k
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285
Ani-DNN/Verify-Verilog
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Updated
Jan 29
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1.31k
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29
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3
NOKHAB-Lab/LLM_4_Verilog
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Feb 12
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38
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1
weiber2002/ICRTL
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Updated
Jan 27
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6
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23
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1
HPAI-BSC/NotSoTiny-25-12-CVDP
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Updated
May 4
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86
xxrjun/rtllm-variants
Viewer
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Updated
Mar 6
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50
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10
mcc311/haven-hdl-benchmark
Updated
Mar 16
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428
architect-ubc-capstone/rtl-augmented
Updated
Mar 20
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205
architect-ubc-capstone/rtl-augmented-v2
Updated
Mar 23
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543
architect-ubc-capstone/rtl-augmented-v3
Updated
Apr 14
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1.1k
VN-26/rtl-llm-dataset
Updated
Mar 30
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21
Adel9st/Verilog-Turkish-Dataset
Updated
Apr 22
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43
muratkarahan/verilogeval-v1-qwen-base-results
Updated
Apr 20
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43
muratkarahan/verilogeval-v1-codev-qwen-v2-results
Updated
Apr 20
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29
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