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#include "edge-impulse-sdk/dsp/config.hpp"
#if EIDSP_LOAD_CMSIS_DSP_SOURCES
/* ----------------------------------------------------------------------
 * Project:      CMSIS DSP Library
 * Title:        arm_cmplx_dot_prod_f16.c
 * Description:  Floating-point complex dot product
 *
 * $Date:        23 April 2021
 * $Revision:    V1.9.0
 *
 * Target Processor: Cortex-M and Cortex-A cores
 * -------------------------------------------------------------------- */
/*
 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License); you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include "edge-impulse-sdk/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h"

#if defined(ARM_FLOAT16_SUPPORTED)


/**
  @ingroup groupCmplxMath
 */


/**
  @addtogroup cmplx_dot_prod
  @{
 */

/**
  @brief         Floating-point complex dot product.
  @param[in]     pSrcA       points to the first input vector
  @param[in]     pSrcB       points to the second input vector
  @param[in]     numSamples  number of samples in each vector
  @param[out]    realResult  real part of the result returned here
  @param[out]    imagResult  imaginary part of the result returned here
  @return        none
 */

#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)

#include "edge-impulse-sdk/CMSIS/DSP/Include/arm_helium_utils.h"

void arm_cmplx_dot_prod_f16(
    const float16_t * pSrcA,
    const float16_t * pSrcB,
    uint32_t numSamples,
    float16_t * realResult,
    float16_t * imagResult)
{
    int32_t         blkCnt;
    float16_t       real_sum, imag_sum;
    f16x8_t         vecSrcA, vecSrcB;
    f16x8_t         vec_acc = vdupq_n_f16(0.0f16);
    f16x8_t         vecSrcC, vecSrcD;

    blkCnt = (numSamples >> 3);
    blkCnt -= 1;
    if (blkCnt > 0) {
        /* should give more freedom to generate stall free code */
        vecSrcA = vld1q( pSrcA);
        vecSrcB = vld1q( pSrcB);
        pSrcA += 8;
        pSrcB += 8;

        while (blkCnt > 0) {
            vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
            vecSrcC = vld1q(pSrcA);
            pSrcA += 8;

            vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
            vecSrcD = vld1q(pSrcB);
            pSrcB += 8;

            vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
            vecSrcA = vld1q(pSrcA);
            pSrcA += 8;

            vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
            vecSrcB = vld1q(pSrcB);
            pSrcB += 8;
            /*
             * Decrement the blockSize loop counter
             */
            blkCnt--;
        }

        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
        vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
        vecSrcC = vld1q(pSrcA);

        vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
        vecSrcD = vld1q(pSrcB);

        vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
        vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);

        /*
         * tail
         */
        blkCnt = CMPLX_DIM * (numSamples & 7);
        while (blkCnt > 0) {
            mve_pred16_t    p = vctp16q(blkCnt);
            pSrcA += 8;
            pSrcB += 8;

            vecSrcA = vldrhq_z_f16(pSrcA, p);
            vecSrcB = vldrhq_z_f16(pSrcB, p);
            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);

            blkCnt -= 8;
        }
    } else {
        /* small vector */
        blkCnt = numSamples * CMPLX_DIM;
        vec_acc = vdupq_n_f16(0.0f16);

        do {
            mve_pred16_t    p = vctp16q(blkCnt);

            vecSrcA = vldrhq_z_f16(pSrcA, p);
            vecSrcB = vldrhq_z_f16(pSrcB, p);

            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);

            /*
             * Decrement the blkCnt loop counter
             * Advance vector source and destination pointers
             */
            pSrcA += 8;
            pSrcB += 8;
            blkCnt -= 8;
        }
        while (blkCnt > 0);
    }

    /* Sum the partial parts */
    mve_cmplx_sum_intra_r_i_f16(vec_acc, real_sum, imag_sum);

    /*
     * Store the real and imaginary results in the destination buffers
     */
    *realResult = real_sum;
    *imagResult = imag_sum;
}

#else
void arm_cmplx_dot_prod_f16(
  const float16_t * pSrcA,
  const float16_t * pSrcB,
        uint32_t numSamples,
        float16_t * realResult,
        float16_t * imagResult)
{
        uint32_t blkCnt;                               /* Loop counter */
        _Float16 real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
        _Float16 a0,b0,c0,d0;

#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)

  /* Loop unrolling: Compute 4 outputs at a time */
  blkCnt = numSamples >> 2U;

  while (blkCnt > 0U)
  {
    a0 = *pSrcA++;
    b0 = *pSrcA++;
    c0 = *pSrcB++;
    d0 = *pSrcB++;

    real_sum += a0 * c0;
    imag_sum += a0 * d0;
    real_sum -= b0 * d0;
    imag_sum += b0 * c0;

    a0 = *pSrcA++;
    b0 = *pSrcA++;
    c0 = *pSrcB++;
    d0 = *pSrcB++;

    real_sum += a0 * c0;
    imag_sum += a0 * d0;
    real_sum -= b0 * d0;
    imag_sum += b0 * c0;

    a0 = *pSrcA++;
    b0 = *pSrcA++;
    c0 = *pSrcB++;
    d0 = *pSrcB++;

    real_sum += a0 * c0;
    imag_sum += a0 * d0;
    real_sum -= b0 * d0;
    imag_sum += b0 * c0;

    a0 = *pSrcA++;
    b0 = *pSrcA++;
    c0 = *pSrcB++;
    d0 = *pSrcB++;

    real_sum += a0 * c0;
    imag_sum += a0 * d0;
    real_sum -= b0 * d0;
    imag_sum += b0 * c0;

    /* Decrement loop counter */
    blkCnt--;
  }

  /* Loop unrolling: Compute remaining outputs */
  blkCnt = numSamples % 0x4U;

#else

  /* Initialize blkCnt with number of samples */
  blkCnt = numSamples;

#endif /* #if defined (ARM_MATH_LOOPUNROLL) */

  while (blkCnt > 0U)
  {
    a0 = *pSrcA++;
    b0 = *pSrcA++;
    c0 = *pSrcB++;
    d0 = *pSrcB++;

    real_sum += a0 * c0;
    imag_sum += a0 * d0;
    real_sum -= b0 * d0;
    imag_sum += b0 * c0;

    /* Decrement loop counter */
    blkCnt--;
  }

  /* Store real and imaginary result in destination buffer. */
  *realResult = real_sum;
  *imagResult = imag_sum;
}
#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */

/**
  @} end of cmplx_dot_prod group
 */

#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

#endif // EIDSP_LOAD_CMSIS_DSP_SOURCES

	#include "edge-impulse-sdk/dsp/config.hpp"
	#if EIDSP_LOAD_CMSIS_DSP_SOURCES
	/* ----------------------------------------------------------------------
	* Project: CMSIS DSP Library
	* Title: arm_cmplx_dot_prod_f16.c
	* Description: Floating-point complex dot product
	*
	* $Date: 23 April 2021
	* $Revision: V1.9.0
	*
	* Target Processor: Cortex-M and Cortex-A cores
	* -------------------------------------------------------------------- */
	/*
	* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
	*
	* SPDX-License-Identifier: Apache-2.0
	*
	* Licensed under the Apache License, Version 2.0 (the License); you may
	* not use this file except in compliance with the License.
	* You may obtain a copy of the License at
	*
	* www.apache.org/licenses/LICENSE-2.0
	*
	* Unless required by applicable law or agreed to in writing, software
	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	* See the License for the specific language governing permissions and
	* limitations under the License.
	*/

	#include "edge-impulse-sdk/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h"

	#if defined(ARM_FLOAT16_SUPPORTED)


	/**
	@ingroup groupCmplxMath
	*/


	/**
	@addtogroup cmplx_dot_prod
	@{
	*/

	/**
	@brief Floating-point complex dot product.
	@param[in] pSrcA points to the first input vector
	@param[in] pSrcB points to the second input vector
	@param[in] numSamples number of samples in each vector
	@param[out] realResult real part of the result returned here
	@param[out] imagResult imaginary part of the result returned here
	@return none
	*/

	#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)

	#include "edge-impulse-sdk/CMSIS/DSP/Include/arm_helium_utils.h"

	void arm_cmplx_dot_prod_f16(
	const float16_t * pSrcA,
	const float16_t * pSrcB,
	uint32_t numSamples,
	float16_t * realResult,
	float16_t * imagResult)
	{
	int32_t blkCnt;
	float16_t real_sum, imag_sum;
	f16x8_t vecSrcA, vecSrcB;
	f16x8_t vec_acc = vdupq_n_f16(0.0f16);
	f16x8_t vecSrcC, vecSrcD;

	blkCnt = (numSamples >> 3);
	blkCnt -= 1;
	if (blkCnt > 0) {
	/* should give more freedom to generate stall free code */
	vecSrcA = vld1q( pSrcA);
	vecSrcB = vld1q( pSrcB);
	pSrcA += 8;
	pSrcB += 8;

	while (blkCnt > 0) {
	vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
	vecSrcC = vld1q(pSrcA);
	pSrcA += 8;

	vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
	vecSrcD = vld1q(pSrcB);
	pSrcB += 8;

	vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
	vecSrcA = vld1q(pSrcA);
	pSrcA += 8;

	vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
	vecSrcB = vld1q(pSrcB);
	pSrcB += 8;
	/*
	* Decrement the blockSize loop counter
	*/
	blkCnt--;
	}

	/* process last elements out of the loop avoid the armclang breaking the SW pipeline */
	vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
	vecSrcC = vld1q(pSrcA);

	vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
	vecSrcD = vld1q(pSrcB);

	vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
	vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);

	/*
	* tail
	*/
	blkCnt = CMPLX_DIM * (numSamples & 7);
	while (blkCnt > 0) {
	mve_pred16_t p = vctp16q(blkCnt);
	pSrcA += 8;
	pSrcB += 8;

	vecSrcA = vldrhq_z_f16(pSrcA, p);
	vecSrcB = vldrhq_z_f16(pSrcB, p);
	vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
	vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);

	blkCnt -= 8;
	}
	} else {
	/* small vector */
	blkCnt = numSamples * CMPLX_DIM;
	vec_acc = vdupq_n_f16(0.0f16);

	do {
	mve_pred16_t p = vctp16q(blkCnt);

	vecSrcA = vldrhq_z_f16(pSrcA, p);
	vecSrcB = vldrhq_z_f16(pSrcB, p);

	vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
	vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);

	/*
	* Decrement the blkCnt loop counter
	* Advance vector source and destination pointers
	*/
	pSrcA += 8;
	pSrcB += 8;
	blkCnt -= 8;
	}
	while (blkCnt > 0);
	}

	/* Sum the partial parts */
	mve_cmplx_sum_intra_r_i_f16(vec_acc, real_sum, imag_sum);

	/*
	* Store the real and imaginary results in the destination buffers
	*/
	*realResult = real_sum;
	*imagResult = imag_sum;
	}

	#else
	void arm_cmplx_dot_prod_f16(
	const float16_t * pSrcA,
	const float16_t * pSrcB,
	uint32_t numSamples,
	float16_t * realResult,
	float16_t * imagResult)
	{
	uint32_t blkCnt; /* Loop counter */
	_Float16 real_sum = 0.0f, imag_sum = 0.0f; /* Temporary result variables */
	_Float16 a0,b0,c0,d0;

	#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)

	/* Loop unrolling: Compute 4 outputs at a time */
	blkCnt = numSamples >> 2U;

	while (blkCnt > 0U)
	{
	a0 = *pSrcA++;
	b0 = *pSrcA++;
	c0 = *pSrcB++;
	d0 = *pSrcB++;

	real_sum += a0 * c0;
	imag_sum += a0 * d0;
	real_sum -= b0 * d0;
	imag_sum += b0 * c0;

	a0 = *pSrcA++;
	b0 = *pSrcA++;
	c0 = *pSrcB++;
	d0 = *pSrcB++;

	real_sum += a0 * c0;
	imag_sum += a0 * d0;
	real_sum -= b0 * d0;
	imag_sum += b0 * c0;

	a0 = *pSrcA++;
	b0 = *pSrcA++;
	c0 = *pSrcB++;
	d0 = *pSrcB++;

	real_sum += a0 * c0;
	imag_sum += a0 * d0;
	real_sum -= b0 * d0;
	imag_sum += b0 * c0;

	a0 = *pSrcA++;
	b0 = *pSrcA++;
	c0 = *pSrcB++;
	d0 = *pSrcB++;

	real_sum += a0 * c0;
	imag_sum += a0 * d0;
	real_sum -= b0 * d0;
	imag_sum += b0 * c0;

	/* Decrement loop counter */
	blkCnt--;
	}

	/* Loop unrolling: Compute remaining outputs */
	blkCnt = numSamples % 0x4U;

	#else

	/* Initialize blkCnt with number of samples */
	blkCnt = numSamples;

	#endif /* #if defined (ARM_MATH_LOOPUNROLL) */

	while (blkCnt > 0U)
	{
	a0 = *pSrcA++;
	b0 = *pSrcA++;
	c0 = *pSrcB++;
	d0 = *pSrcB++;

	real_sum += a0 * c0;
	imag_sum += a0 * d0;
	real_sum -= b0 * d0;
	imag_sum += b0 * c0;

	/* Decrement loop counter */
	blkCnt--;
	}

	/* Store real and imaginary result in destination buffer. */
	*realResult = real_sum;
	*imagResult = imag_sum;
	}
	#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */

	/**
	@} end of cmplx_dot_prod group
	*/

	#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

	#endif // EIDSP_LOAD_CMSIS_DSP_SOURCES