raw float weights: model.safetensors + config.json, exported from the shipped model.onnx
Browse files- README.md +8 -2
- config.json +14 -1
- model.safetensors +3 -0
README.md
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@@ -467,9 +467,15 @@ codesearchnet python 68.30 β 68.32.
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- **`model.onnx`** β the FP32 twin of the same weights, for lanes that cannot read Q/DQ and for
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fine-tuning. Derived from the file above by dropping its Q/DQ pairs, so the weights are
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identical β the 0.98 cosine between them is the quantization, not a different model.
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- **`sentencepiece.bpe.model`** β the tokenizer. Raw-SP ids: pad=0, unk=1, bos=2, eos=3. Its
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22,739 pieces match the embedding table row for row.
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- **`tokenizer_config.json`**
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**Prebuilt engines**, uploaded progressively per architecture:
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@@ -478,7 +484,7 @@ TensorRT β¦-{s,m,l,xl}_{win_x64,linux_x64}_trt11.0_sm_{75,80,86,89,120}.engi
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β¦-{s,m,l,xl}_linux_x64_trt11.0_sm_90.engine
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OpenVINO β¦-{s,m,l,xl}_ov2026.4_{cpu_int8,igpu_lnl_int8,npu_int4}_b*_s*.{xml,bin}
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TVM Vulkan β¦_{win_x64,linux_x64}_tvm0.25_vulkan.{dll,so}
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MLX (Apple) model_gpu_mlx0.
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```
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`sm_90` (H100 / H200) is Linux-only. An INT4 IR for discrete Intel Arc (`igpu_arc_int4`) is
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- **`model.onnx`** β the FP32 twin of the same weights, for lanes that cannot read Q/DQ and for
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fine-tuning. Derived from the file above by dropping its Q/DQ pairs, so the weights are
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identical β the 0.98 cosine between them is the quantization, not a different model.
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- **`model.safetensors`** + **`config.json`** β the same float weights under transformers names,
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exported from `model.onnx` and checked against it (max |Ξ| 3e-7 on the pooled vector).
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`AutoModel` loads the encoder (`XLMRobertaModel`); the trained projection `proj.weight` is
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not part of that class, so apply it yourself: mean-pool over the attention mask β `proj` β
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L2. `config.json` β `ultracode` spells the head out. This pair is also what the Apple (MLX)
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build is prepared from.
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- **`sentencepiece.bpe.model`** β the tokenizer. Raw-SP ids: pad=0, unk=1, bos=2, eos=3. Its
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22,739 pieces match the embedding table row for row.
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- **`tokenizer_config.json`** β HF-side metadata.
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**Prebuilt engines**, uploaded progressively per architecture:
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β¦-{s,m,l,xl}_linux_x64_trt11.0_sm_90.engine
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OpenVINO β¦-{s,m,l,xl}_ov2026.4_{cpu_int8,igpu_lnl_int8,npu_int4}_b*_s*.{xml,bin}
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TVM Vulkan β¦_{win_x64,linux_x64}_tvm0.25_vulkan.{dll,so}
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MLX (Apple) model_gpu_mlx0.32/
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```
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`sm_90` (H100 / H200) is Linux-only. An INT4 IR for discrete Intel Arc (`igpu_arc_int4`) is
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config.json
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"transformers_version": "5.1.0",
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"type_vocab_size": 1,
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"use_cache": true,
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"vocab_size": 22739
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}
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"transformers_version": "5.1.0",
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"type_vocab_size": 1,
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"use_cache": true,
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"vocab_size": 22739,
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"architectures": [
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"XLMRobertaModel"
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],
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"ultracode": {
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"format": "raw-safetensors/1",
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"exported_from": "model.onnx",
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"onnx_sha256": "57bcfc6aed11ea239d01f2b124f2f948456f2284ad6e2c4744452509c9c25ca9",
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"head": "mean_proj_l2",
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"position_ids": "roberta",
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"pooling": "mean over attention_mask",
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"projection": "proj.weight, applied after pooling",
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"normalize": "l2"
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}
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}
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model.safetensors
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@@ -0,0 +1,3 @@
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version https://git-lfs.github.com/spec/v1
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oid sha256:704f15d3ddddac9cfbc0b5c84ec387ef36593dd24c466f4184452b15d5253dc0
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size 187215600
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