Text Classification
TensorRT
Core ML
ONNX
Safetensors
OpenVINO
code
multilingual
xlm-roberta
knowledge-graph
relation-extraction
relation-classification
cross-encoder
knowledge-distillation
Instructions to use faxenoff/code-daemon-relation-v1 with libraries, inference providers, notebooks, and local apps. Follow these links to get started.
- Libraries
- TensorRT
How to use faxenoff/code-daemon-relation-v1 with TensorRT:
# No code snippets available yet for this library. # To use this model, check the repository files and the library's documentation. # Want to help? PRs adding snippets are welcome at: # https://github.com/huggingface/huggingface.js
- Notebooks
- Google Colab
- Kaggle
replace with the locally built v1: 15 added/updated, 24 superseded removed
Browse files- .gitattributes +6 -0
- README.md +89 -32
- code-daemon-relation-v1-l_ov2026.3_cpu_fp16_b16_s256.bin → code-daemon-relation-v1-l_ov2026.4_cpu_fp16_b16_s256.bin +0 -0
- code-daemon-relation-v1-l_ov2026.3_cpu_fp16_b16_s256.xml → code-daemon-relation-v1-l_ov2026.4_cpu_fp16_b16_s256.xml +1 -1
- code-daemon-relation-v1-l_ov2026.3_igpu_fp16_b16_s256.bin → code-daemon-relation-v1-l_ov2026.4_igpu_fp16_b16_s256.bin +0 -0
- code-daemon-relation-v1-l_ov2026.3_igpu_fp16_b16_s256.xml → code-daemon-relation-v1-l_ov2026.4_igpu_fp16_b16_s256.xml +1 -1
- code-daemon-relation-v1-m_ov2026.3_cpu_fp16_b16_s128.bin → code-daemon-relation-v1-m_ov2026.4_cpu_fp16_b16_s128.bin +0 -0
- code-daemon-relation-v1-m_ov2026.3_cpu_fp16_b16_s128.xml → code-daemon-relation-v1-m_ov2026.4_cpu_fp16_b16_s128.xml +1 -1
- code-daemon-relation-v1-m_ov2026.3_igpu_fp16_b16_s128.bin → code-daemon-relation-v1-m_ov2026.4_igpu_fp16_b16_s128.bin +0 -0
- code-daemon-relation-v1-m_ov2026.3_igpu_fp16_b16_s128.xml → code-daemon-relation-v1-m_ov2026.4_igpu_fp16_b16_s128.xml +1 -1
- code-daemon-relation-v1-s_ov2026.3_cpu_fp16_b16_s64.bin → code-daemon-relation-v1-s_ov2026.4_cpu_fp16_b16_s64.bin +0 -0
- code-daemon-relation-v1-s_ov2026.3_cpu_fp16_b16_s64.xml → code-daemon-relation-v1-s_ov2026.4_cpu_fp16_b16_s64.xml +1 -1
- code-daemon-relation-v1-s_ov2026.3_igpu_fp16_b16_s64.bin → code-daemon-relation-v1-s_ov2026.4_igpu_fp16_b16_s64.bin +0 -0
- code-daemon-relation-v1-s_ov2026.3_igpu_fp16_b16_s64.xml → code-daemon-relation-v1-s_ov2026.4_igpu_fp16_b16_s64.xml +1 -1
- code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_120.engine +0 -3
- code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_75.engine +0 -3
- code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_86.engine +0 -3
- code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_89.engine +0 -3
- code-daemon-relation-v1-xl_ov2026.3_cpu_fp16_b16_s320.bin +0 -3
- code-daemon-relation-v1-xl_ov2026.3_cpu_fp16_b16_s320.xml +0 -0
- code-daemon-relation-v1-xl_ov2026.3_igpu_fp16_b16_s320.bin +0 -3
- code-daemon-relation-v1-xl_ov2026.3_igpu_fp16_b16_s320.xml +0 -0
- code-daemon-relation-v1-xl_win_x64_trt11.0_sm_120.engine +0 -3
- code-daemon-relation-v1-xl_win_x64_trt11.0_sm_75.engine +0 -3
- code-daemon-relation-v1-xl_win_x64_trt11.0_sm_86.engine +0 -3
- code-daemon-relation-v1-xl_win_x64_trt11.0_sm_89.engine +0 -3
- manifest.json +2 -2
- model_gpu_mlx0.22/config.json +45 -50
.gitattributes
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README.md
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| idx | label | meaning |
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| 0 | `NO_RELATION` |
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| 1 | `semantically_similar_to` |
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| 2 | `
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| 3 | `depends_on` | one requires or configures the other |
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The taxonomy is deliberately **coarse**. An earlier 8-way version split these into near-synonym pairs
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## 2. Architecture
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| Inputs | `input_ids`, `attention_mask` — **no `token_type_ids`** |
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| Output | `logits[batch, 4]` |
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| Parameters | **~117M**, of which 96M is the multilingual embedding table |
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### Entity-marker pooling, not `[CLS]`
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Measured on one laptop: Intel Core Ultra 9 275HX / NVIDIA RTX 5060 Laptop.
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Per bucket, OpenVINO 2026.3 on the same laptop (pairs/s, solo):
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| s | 16 × 64 | 159 | **508** |
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| m | 16 × 128 | 85 | **245** |
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| l | 16 × 256 | 44 | **111** |
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| xl | 16 × 320 | 34 | **85** |
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The integrated GPU is ~2.6× the CPU on every bucket, so on a host without a discrete card the
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iGPU lane is the one to route relation extraction to. Both devices at once give ~87 % of the sum
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of thousands of candidate pairs, and only the compiled-engine path makes that a background task
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rather than a batch job.
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-
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sequence length, so routing short passages to a short engine is worth taking when your pairs vary in
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length. Padding is attention-masked, so a pair produces the same logits from any bucket that fits it.
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The table above is a per-batch micro-benchmark. Sweeping a real corpus batches far wider, which
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changes what the bottleneck is:
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|---|--:|
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| GPU inference, 267 pairs
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| End-to-end incl. tokenisation
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| Relations written, 3 043 chunks | 15 175 in 15.3 s → **994/s** |
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| Relations written, 4 975 chunks | 31 696 in 45.0 s → **704/s** |
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---
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## 5. Standalone use
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```python
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import numpy as np, onnxruntime as ort
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from transformers import AutoTokenizer
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-
LABELS = ["NO_RELATION", "semantically_similar_to", "
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tok = AutoTokenizer.from_pretrained(".") # includes the [E1]/[E2] marker tokens
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sess = ort.InferenceSession("model.onnx", providers=["CPUExecutionProvider"])
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return (LABELS[i], float(p[i])) if i else ("NO_RELATION", float(p[0]))
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classify("The [E1]FAISS[/E1] index was replaced by the [E2]native IVF[/E2] backend.")
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# -> ('
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```
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Both entities must appear **inside one passage**, marked in place. The model reads context, so a bare
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maximum recall: for building a graph, the real test is spot-checking the edges it emits at your
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chosen threshold.
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**Suited to**
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- Turning prose or documentation into a typed concept graph.
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- Any sweep where a large LLM per pair would be too slow or too expensive.
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Compiled engines, named per **runtime × OS × GPU arch**, plus the ONNX for standalone use.
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- **TensorRT FP16** — `code-daemon-relation-v1-{s,m,l
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-
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-
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- **Tokenizer** — `tokenizer.json`, `sentencepiece.bpe.model`, `tokenizer_config.json` (XLM-R
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SentencePiece with the four marker tokens added).
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- **ONNX** — `model.onnx` (+ `model.onnx.data`), FP32, the build source for every engine above.
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Released **MIT**.
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-
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-
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| `cross-encoder/mmarco-mMiniLMv2-L12-H384-v1` (warm-start) | **mMARCO ← MS MARCO → non-commercial research terms** |
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⚠️ The warm-start base derives from **MS MARCO (non-commercial)**. Whether a fine-tuned model
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inherits dataset-use terms is legally unsettled — this is **not legal advice**. Retrain from a
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| idx | label | meaning |
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|--:|---|---|
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| 0 | `NO_RELATION` | co-occur, unrelated — **abstain** |
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| 1 | `semantically_similar_to` | same purpose or same goal, other mechanism |
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| 2 | `supersedes_or_conflicts` | one supersedes, replaces or contradicts |
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| 3 | `depends_on` | one requires or configures the other |
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The taxonomy is deliberately **coarse**. An earlier 8-way version split these into near-synonym pairs
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## 2. Architecture
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+
- **Warm-start** — [`cross-encoder/mmarco-mMiniLMv2-L12-H384-v1`](https://huggingface.co/cross-encoder/mmarco-mMiniLMv2-L12-H384-v1).
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- **Encoder** — XLM-RoBERTa, **12 layers / 384 hidden / 12 heads**, FFN 1536. **~117M**
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parameters, of which 96M is the multilingual embedding table.
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- **Vocabulary** — **250 006** pieces = 250 002 XLM-R + 4 markers `[E1]` `[/E1]` `[E2]` `[/E2]`
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(ids 250002–250005).
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- **I/O** — `input_ids`, `attention_mask` (**no `token_type_ids`**) → `logits[batch, 4]`.
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Sequence **256** on the shipped engines; 64 / 128 also provided.
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### Entity-marker pooling, not `[CLS]`
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Measured on one laptop: Intel Core Ultra 9 275HX / NVIDIA RTX 5060 Laptop.
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All lanes at batch 16 × seq 256:
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| lane | pairs/s | per batch |
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|---|--:|--:|
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| **TensorRT FP16, RTX 5060** | **2 942** | 5.44 ms |
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| **OpenVINO FP16, iGPU** | **111** | 143 ms |
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| OpenVINO FP16, CPU | 44 | 366 ms |
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| ONNX Runtime FP32, CPU | 42 | 380 ms |
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OpenVINO rows were measured on 2026.3; the IRs in this repository are built for 2026.4 (re-timed on the embedding model: within a few percent either way).
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Per bucket, OpenVINO 2026.3 on the same laptop (pairs/s, solo):
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| s | 16 × 64 | 159 | **508** |
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| m | 16 × 128 | 85 | **245** |
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| l | 16 × 256 | 44 | **111** |
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The integrated GPU is ~2.6× the CPU on every bucket, so on a host without a discrete card the
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iGPU lane is the one to route relation extraction to. Both devices at once give ~87 % of the sum
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of thousands of candidate pairs, and only the compiled-engine path makes that a background task
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rather than a batch job.
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+
Three **length buckets** ship — seq 64 / 128 / 256 at batch 16. Attention is quadratic in
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sequence length, so routing short passages to a short engine is worth taking when your pairs vary in
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length. Padding is attention-masked, so a pair produces the same logits from any bucket that fits it.
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The table above is a per-batch micro-benchmark. Sweeping a real corpus batches far wider, which
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changes what the bottleneck is:
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+
| at corpus scale | measured |
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|---|--:|
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+
| GPU inference, 267 pairs/call at seq 256 | **5.87 ms** → ~45 000 pairs/s |
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| End-to-end incl. tokenisation, 12 threads | **~2 500 pairs/s** |
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| Relations written, 3 043 chunks | 15 175 in 15.3 s → **994/s** |
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| Relations written, 4 975 chunks | 31 696 in 45.0 s → **704/s** |
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---
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+
### Inside a real index
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+
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Measured live in the UltraCode daemon over two repositories, TensorRT FP16, wide batches of
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~263 pairs per call:
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| metric | value |
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|---|--:|
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| pairs scored | **2 162 / s** sustained (210 071 in 97.2 s) |
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| inference share of wall | 90 % |
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| padding wasted | 33 % |
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| relations created | 1 011 – 1 345 / s |
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The live rate is below the 2 942 pairs/s micro-benchmark above because a third of every wide
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batch is padding. Relations *created* run lower still: most scored pairs fall under the
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acceptance threshold and are rejected, which is the point of the threshold.
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---
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+
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## 5. Standalone use
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```python
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import numpy as np, onnxruntime as ort
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from transformers import AutoTokenizer
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+
LABELS = ["NO_RELATION", "semantically_similar_to", "supersedes_or_conflicts", "depends_on"]
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tok = AutoTokenizer.from_pretrained(".") # includes the [E1]/[E2] marker tokens
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sess = ort.InferenceSession("model.onnx", providers=["CPUExecutionProvider"])
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return (LABELS[i], float(p[i])) if i else ("NO_RELATION", float(p[0]))
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classify("The [E1]FAISS[/E1] index was replaced by the [E2]native IVF[/E2] backend.")
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+
# -> ('supersedes_or_conflicts', 0.7x)
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```
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Both entities must appear **inside one passage**, marked in place. The model reads context, so a bare
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maximum recall: for building a graph, the real test is spot-checking the edges it emits at your
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chosen threshold.
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+
### Against zero-shot NLI — the alternative to training a head
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+
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With no training data for these classes, the textbook approach is a **zero-shot NLI** model: state
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each class as a hypothesis and take the entailment score.
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+
[`MoritzLaurer/mDeBERTa-v3-base-xnli-multilingual-nli-2mil7`](https://huggingface.co/MoritzLaurer/mDeBERTa-v3-base-xnli-multilingual-nli-2mil7)
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+
is the standard pick. Same 691 rows, same 4-way mapping, same machine.
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+
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+
**What matches and what does not.** There is no public model trained on these four merged
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classes, so the comparator matches on **task and dev set** but not on size (279 M against 117 M)
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+
or runtime (PyTorch against onnxruntime) — and zero-shot pays one forward pass per class by
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+
construction, which the speed figure below makes visible:
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+
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+
| model | params | macro-F1 | accuracy |
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+
|---|--:|--:|--:|
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| 228 |
+
| **this model** | 117 M | **0.569** | **0.670** |
|
| 229 |
+
| mDeBERTa-v3-xnli, zero-shot | 279 M | 0.194 | 0.295 |
|
| 230 |
+
| always `NO_RELATION` | — | 0.158 | 0.463 |
|
| 231 |
+
|
| 232 |
+
On the question the daemon actually asks — *is there a relation at all* — the gap is narrower on
|
| 233 |
+
F1 and wider in kind:
|
| 234 |
+
|
| 235 |
+
| model | has-rel F1 | P | R |
|
| 236 |
+
|---|--:|--:|--:|
|
| 237 |
+
| **this model** | **0.810** | **0.793** | 0.828 |
|
| 238 |
+
| mDeBERTa-v3-xnli | 0.699 | 0.538 | **0.997** |
|
| 239 |
+
|
| 240 |
+
A recall of 0.997 at a precision of 0.538 is the whole story: asked whether two entities in the
|
| 241 |
+
same paragraph are related, an NLI model says yes almost every time. For a graph builder that reads
|
| 242 |
+
the score as an edge weight, that is not a usable signal.
|
| 243 |
+
|
| 244 |
+
**Speed, same hardware, same 691 pairs:** **351 pairs/s** for this model (onnxruntime CUDA, FP32,
|
| 245 |
+
batch 16 × seq 256) against **61 pairs/s** for the zero-shot baseline (PyTorch CUDA). The 5.8× is
|
| 246 |
+
structural, not an implementation detail — zero-shot needs one forward pass **per class**, so a
|
| 247 |
+
4-class taxonomy costs four passes per pair where this model costs one. The shipped TensorRT FP16
|
| 248 |
+
engine is faster again (2 942 pairs/s, above).
|
| 249 |
+
|
| 250 |
+
Measured 2026-09-11; harness and raw JSON ship in the UltraCode repo
|
| 251 |
+
(`models/_distill_shared/bench_vs_generic.py`).
|
| 252 |
+
|
| 253 |
**Suited to**
|
| 254 |
- Turning prose or documentation into a typed concept graph.
|
| 255 |
- Any sweep where a large LLM per pair would be too slow or too expensive.
|
|
|
|
| 266 |
|
| 267 |
Compiled engines, named per **runtime × OS × GPU arch**, plus the ONNX for standalone use.
|
| 268 |
|
| 269 |
+
- **TensorRT FP16** — `code-daemon-relation-v1-{s,m,l}_{win_x64,linux_x64}_trt11.0_sm_{75,80,86,89,120}.engine`,
|
| 270 |
+
plus `code-daemon-relation-v1-{s,m,l}_linux_x64_trt11.0_sm_90.engine` (H100 / H200, Linux only)
|
| 271 |
+
(buckets seq 64 / 128 / 256, batch 16).
|
| 272 |
+
- **OpenVINO FP16** — `code-daemon-relation-v1-{s,m,l}_ov2026.4_{cpu,igpu}_fp16_b16_s{64,128,256}.{xml,bin}`.
|
| 273 |
- **Tokenizer** — `tokenizer.json`, `sentencepiece.bpe.model`, `tokenizer_config.json` (XLM-R
|
| 274 |
SentencePiece with the four marker tokens added).
|
| 275 |
- **ONNX** — `model.onnx` (+ `model.onnx.data`), FP32, the build source for every engine above.
|
|
|
|
| 283 |
|
| 284 |
Released **MIT**.
|
| 285 |
|
| 286 |
+
**Warm-start base:** `cross-encoder/mmarco-mMiniLMv2-L12-H384-v1` — mMARCO ← MS MARCO, whose terms
|
| 287 |
+
are **non-commercial research**.
|
|
|
|
| 288 |
|
| 289 |
⚠️ The warm-start base derives from **MS MARCO (non-commercial)**. Whether a fine-tuned model
|
| 290 |
inherits dataset-use terms is legally unsettled — this is **not legal advice**. Retrain from a
|
code-daemon-relation-v1-l_ov2026.3_cpu_fp16_b16_s256.bin → code-daemon-relation-v1-l_ov2026.4_cpu_fp16_b16_s256.bin
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<info name="OpenVINO Runtime" value="2026.4.0-22959-99c81491cc3-releases/2026/4" />
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</rt_info>
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| 21605 |
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<info name="OpenVINO Runtime" value="2026.4.0-22959-99c81491cc3-releases/2026/4" />
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</net>
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code-daemon-relation-v1-s_ov2026.3_cpu_fp16_b16_s64.bin → code-daemon-relation-v1-s_ov2026.4_cpu_fp16_b16_s64.bin
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code-daemon-relation-v1-s_ov2026.3_igpu_fp16_b16_s64.bin → code-daemon-relation-v1-s_ov2026.4_igpu_fp16_b16_s64.bin
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|
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RENAMED
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</edges>
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|
| 21605 |
+
<info name="OpenVINO Runtime" value="2026.4.0-22959-99c81491cc3-releases/2026/4" />
|
| 21606 |
</rt_info>
|
| 21607 |
</net>
|
code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_120.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:3e200a40f8dbf2c7c812a50c5bc5710f734c5f869d3bdb8b3364879b9ef361e3
|
| 3 |
-
size 238387732
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_75.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:1b48851f854a7f3f62657735e98e6063088eae357e245e67db44440b8a52efd7
|
| 3 |
-
size 237937980
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_86.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:eabd366dd653374a1325ef603a2737e08b222a2654495b8f84279bd6f4d2c840
|
| 3 |
-
size 238309732
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_linux_x64_trt11.0_sm_89.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:983ba8d9a7c73906b28410223a7cf2b2987672ac4f848858a3957c958d241dae
|
| 3 |
-
size 239674964
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_ov2026.3_cpu_fp16_b16_s320.bin
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:0c5212f004254b5de637be1b845bd77cf27ce28b9faa6116080ee1000788a63b
|
| 3 |
-
size 234999234
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_ov2026.3_cpu_fp16_b16_s320.xml
DELETED
|
The diff for this file is too large to render.
See raw diff
|
|
|
code-daemon-relation-v1-xl_ov2026.3_igpu_fp16_b16_s320.bin
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:0c5212f004254b5de637be1b845bd77cf27ce28b9faa6116080ee1000788a63b
|
| 3 |
-
size 234999234
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_ov2026.3_igpu_fp16_b16_s320.xml
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|
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|
|
|
code-daemon-relation-v1-xl_win_x64_trt11.0_sm_120.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:4d83141e50053725d59d49fa6074c1be0db9cce9eace64bd3dceeebfa41961f7
|
| 3 |
-
size 240319756
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_win_x64_trt11.0_sm_75.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:3456ad7f4a1f1b7f74bf128789537b4ea649cfd21f76b247fc3c46abcb1aa35c
|
| 3 |
-
size 237830228
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_win_x64_trt11.0_sm_86.engine
DELETED
|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:3d459caa6d37cb81b1c5ebd33284e182099646cca8845286ae58fcab19c0ca76
|
| 3 |
-
size 239786044
|
|
|
|
|
|
|
|
|
|
|
|
code-daemon-relation-v1-xl_win_x64_trt11.0_sm_89.engine
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|
@@ -1,3 +0,0 @@
|
|
| 1 |
-
version https://git-lfs.github.com/spec/v1
|
| 2 |
-
oid sha256:bd69f48dcd93bc6a41a475091d41cb1ad1479f5268600a37bc915ebb75b8243a
|
| 3 |
-
size 236747476
|
|
|
|
|
|
|
|
|
|
|
|
manifest.json
CHANGED
|
@@ -9,10 +9,10 @@
|
|
| 9 |
],
|
| 10 |
"runtime_tags": {
|
| 11 |
"trt": "trt11.0",
|
| 12 |
-
"ov": "ov2026.
|
| 13 |
"tvm": "tvm0.25",
|
| 14 |
"mlx_dir": "model_gpu_mlx0.22"
|
| 15 |
},
|
| 16 |
-
"compiled_at": "2026-
|
| 17 |
"compiled_by": "models/_compile"
|
| 18 |
}
|
|
|
|
| 9 |
],
|
| 10 |
"runtime_tags": {
|
| 11 |
"trt": "trt11.0",
|
| 12 |
+
"ov": "ov2026.4",
|
| 13 |
"tvm": "tvm0.25",
|
| 14 |
"mlx_dir": "model_gpu_mlx0.22"
|
| 15 |
},
|
| 16 |
+
"compiled_at": "2026-09-16T20:05:04Z",
|
| 17 |
"compiled_by": "models/_compile"
|
| 18 |
}
|
model_gpu_mlx0.22/config.json
CHANGED
|
@@ -1,50 +1,45 @@
|
|
| 1 |
-
{
|
| 2 |
-
"add_cross_attention": false,
|
| 3 |
-
"architectures": [
|
| 4 |
-
"XLMRobertaForSequenceClassification"
|
| 5 |
-
],
|
| 6 |
-
"attention_probs_dropout_prob": 0.1,
|
| 7 |
-
"bos_token_id": 0,
|
| 8 |
-
"classifier_dropout": null,
|
| 9 |
-
"
|
| 10 |
-
"
|
| 11 |
-
"
|
| 12 |
-
"
|
| 13 |
-
"
|
| 14 |
-
"
|
| 15 |
-
|
| 16 |
-
"
|
| 17 |
-
"
|
| 18 |
-
"
|
| 19 |
-
"
|
| 20 |
-
|
| 21 |
-
|
| 22 |
-
|
| 23 |
-
|
| 24 |
-
"
|
| 25 |
-
|
| 26 |
-
|
| 27 |
-
|
| 28 |
-
"
|
| 29 |
-
|
| 30 |
-
|
| 31 |
-
|
| 32 |
-
|
| 33 |
-
|
| 34 |
-
|
| 35 |
-
|
| 36 |
-
|
| 37 |
-
"
|
| 38 |
-
"
|
| 39 |
-
"
|
| 40 |
-
"
|
| 41 |
-
"
|
| 42 |
-
"
|
| 43 |
-
"
|
| 44 |
-
"
|
| 45 |
-
|
| 46 |
-
"transformers_version": "5.1.0",
|
| 47 |
-
"type_vocab_size": 1,
|
| 48 |
-
"use_cache": true,
|
| 49 |
-
"vocab_size": 250006
|
| 50 |
-
}
|
|
|
|
| 1 |
+
{
|
| 2 |
+
"add_cross_attention": false,
|
| 3 |
+
"architectures": [
|
| 4 |
+
"XLMRobertaForSequenceClassification"
|
| 5 |
+
],
|
| 6 |
+
"attention_probs_dropout_prob": 0.1,
|
| 7 |
+
"bos_token_id": 0,
|
| 8 |
+
"classifier_dropout": null,
|
| 9 |
+
"custom_head": "entity_start_marker_meanmask (concat E1,E2 -> Linear); [CLS] is not read",
|
| 10 |
+
"dtype": "float32",
|
| 11 |
+
"eos_token_id": 2,
|
| 12 |
+
"hidden_act": "gelu",
|
| 13 |
+
"hidden_dropout_prob": 0.1,
|
| 14 |
+
"hidden_size": 384,
|
| 15 |
+
"id2label": {
|
| 16 |
+
"0": "NO_RELATION",
|
| 17 |
+
"1": "semantically_similar_to",
|
| 18 |
+
"2": "invalidates_with",
|
| 19 |
+
"3": "depends_on"
|
| 20 |
+
},
|
| 21 |
+
"initializer_range": 0.02,
|
| 22 |
+
"intermediate_size": 1536,
|
| 23 |
+
"is_decoder": false,
|
| 24 |
+
"label2id": {
|
| 25 |
+
"NO_RELATION": 0,
|
| 26 |
+
"depends_on": 3,
|
| 27 |
+
"invalidates_with": 2,
|
| 28 |
+
"semantically_similar_to": 1
|
| 29 |
+
},
|
| 30 |
+
"layer_norm_eps": 1e-05,
|
| 31 |
+
"max_position_embeddings": 514,
|
| 32 |
+
"model_type": "xlm-roberta",
|
| 33 |
+
"num_attention_heads": 12,
|
| 34 |
+
"num_hidden_layers": 12,
|
| 35 |
+
"num_labels": 4,
|
| 36 |
+
"pad_token_id": 1,
|
| 37 |
+
"position_embedding_type": "absolute",
|
| 38 |
+
"sbert_ce_default_activation_function": "torch.nn.modules.linear.Identity",
|
| 39 |
+
"tie_word_embeddings": true,
|
| 40 |
+
"transformers_version": "5.1.0",
|
| 41 |
+
"type_vocab_size": 1,
|
| 42 |
+
"ultracode_note": "Inference artefact is model.onnx (inputs: input_ids, attention_mask; output: logits[batch, 4]). Feed the pair as (empty query, marked passage).",
|
| 43 |
+
"use_cache": true,
|
| 44 |
+
"vocab_size": 250006
|
| 45 |
+
}
|
|
|
|
|
|
|
|
|
|
|
|
|
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|