sync 91d990483a17
Browse files- README.md +11 -7
- build/webgpu/bench.json +0 -1
- build/webgpu/manifest.json +36 -48
- build/webgpu/metadata.json +11 -8
- build/webgpu/test.json +1 -2
- build/webgpu/unary-scalar.wgsl.jinja +12 -11
- build/webgpu/unary-vec4.wgsl.jinja +29 -10
README.md
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@@ -18,15 +18,15 @@ See the [ONNX `Relu` spec](https://onnx.ai/onnx/operators/onnx__Relu.html) for t
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## Inputs
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## Outputs
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## Type constraints
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## Files
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- [`metadata.json`](build/webgpu/metadata.json) — kernel metadata (id, digests, provenance)
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- [`manifest.json`](build/webgpu/manifest.json) — the op contract (source of truth)
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- [`test.json`](build/webgpu/test.json) — correctness cases
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- [`bench.json`](build/webgpu/bench.json) — benchmark + tuning cases
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## Use with `@huggingface/kernels`
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The `version: 1` option selects the published kernel contract; it is independent of any operator opset, contrib `since_version`, or model version.
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Replace each `*Data` placeholder with a typed array containing the corresponding input data.
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## Inputs
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| Name | Upstream name | Logical dtype | Rank | Shape | Description | Presence |
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| --- | --- | --- | --- | --- | --- | --- |
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| `x` | `X` | `T` | — | — | Values clamped elementwise to a minimum of zero. | required |
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## Outputs
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| Name | Upstream name | Logical dtype | Rank | Shape | Description | Presence |
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| --- | --- | --- | --- | --- | --- | --- |
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| `y` | `Y` | `T` | same as `x` | same as `x` | Output tensor; same shape as the input. | required |
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## Type constraints
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## Files
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- [`metadata.json`](build/webgpu/metadata.json) — kernel metadata (id, digests, per-variant templates, provenance)
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- [`manifest.json`](build/webgpu/manifest.json) — the op contract (source of truth)
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- [`test.json`](build/webgpu/test.json) — correctness cases
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- [`bench.json`](build/webgpu/bench.json) — benchmark + tuning cases
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## Use with `@huggingface/kernels`
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```sh
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npm install --save-exact @huggingface/kernels@0.0.1-preview.2
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```
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Required output shapes and logical data types are inferred from the supplied inputs and attributes; result tensors are allocated automatically.
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The `version: 1` option selects the published kernel contract; it is independent of any operator opset, contrib `since_version`, or model version.
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It follows the `v1` branch as fixes land. To pin exact artifact bytes, pass a 40-character commit `revision` instead of `version`.
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Replace each `*Data` placeholder with a typed array containing the corresponding input data.
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build/webgpu/bench.json
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{
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"op": "ai.onnx.Relu",
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"tunableSpace": { "WORKGROUP_SIZE": [64, 128, 256] },
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"cases": [
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{
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{
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"tunableSpace": { "WORKGROUP_SIZE": [64, 128, 256] },
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"cases": [
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{
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build/webgpu/manifest.json
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@@ -2,77 +2,65 @@
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"domain": "ai.onnx",
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"name": "Relu",
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"sinceVersion": 14,
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"
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"
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"outputs": [
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{
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"role": "Y",
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"dtype": "T",
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"rank": "ranks.x",
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"shape": "shapes.x",
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"description": "Output tensor; same shape as the input."
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}
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],
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"typeConstraints": { "T": ["float32", "float16", "int32", "int16", "int8"] },
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"
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"x": { "kind": "tensor", "semantic": "X", "role": "input" },
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"y": { "kind": "tensor", "semantic": "Y", "role": "output" }
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},
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"tunables": { "WORKGROUP_SIZE": 256 },
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"derive": {
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"wideVec4StorageOk": "dtypes.T != \"f32\" or device.features.has(\"subgroups\") or not (has(device.adapterInfo, \"subgroupMinSize\") and has(device.adapterInfo, \"subgroupMaxSize\") and device.adapterInfo.subgroupMinSize == 8 and device.adapterInfo.subgroupMaxSize <= 32)"
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},
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"variants": [
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{
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"id": "same_layout_vec4",
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"
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"passes": [
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{
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"id": "main",
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"name": "Relu.vec4",
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"bindings": [
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{ "
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{ "
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{
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"name": "params",
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"semantic": "kernel.params",
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"buffer": { "type": "uniform" },
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"struct": {
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"name": "Params",
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"fields": [{ "name": "count", "type": "u32", "value": "numel(shapes.y) / 4" }]
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}
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}
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],
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"dispatch": {
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}
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]
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"priority": 20,
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"constants": {
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"scalar": "dtypes.T",
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"usesF16": "dtypes.T == \"f16\"",
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"vectorScalar": "\"vec4<\" ~ dtypes.T ~ \">\""
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}
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},
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{
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"id": "scalar",
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"
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"passes": [
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{
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"id": "main",
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"name": "scalar",
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"
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"bindings": [
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{
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"name": "params",
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"semantic": "kernel.params",
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"buffer": { "type": "uniform" },
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"struct": { "name": "Params", "fields": [{ "name": "count", "type": "u32", "value": "numel(shapes.X)" }] }
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}
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],
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"dispatch": {
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}
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]
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}
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"domain": "ai.onnx",
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"name": "Relu",
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"sinceVersion": 14,
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"inputs": { "x": { "onnx": "X", "dtype": "T" } },
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"outputs": { "y": { "onnx": "Y", "dtype": "T", "rank": "ranks.x", "shape": "shapes.x" } },
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"typeConstraints": { "T": ["float32", "float16", "int32", "int16", "int8"] },
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"tunables": { "WORKGROUP_SIZE": { "default": 256 } },
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"derive": {
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"wideVec4StorageOk": "dtypes.T != \"f32\" or device.features.has(\"subgroups\") or not (has(device.adapterInfo, \"subgroupMinSize\") and has(device.adapterInfo, \"subgroupMaxSize\") and device.adapterInfo.subgroupMinSize == 8 and device.adapterInfo.subgroupMaxSize <= 32)"
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},
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"when": ["f16Ok(dtypes.T)"],
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"variants": [
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{
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"id": "same_layout_vec4",
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"priority": 20,
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"when": ["numel(shapes.x) > 0", "numel(shapes.x) % 4 == 0", "numel(shapes.x) == numel(shapes.y)", "wideVec4StorageOk"],
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"derive": {
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"scalar": "dtypes.T",
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"usesF16": "dtypes.T == \"f16\"",
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"vectorScalar": "\"vec4<\" ~ dtypes.T ~ \">\""
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},
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"passes": [
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{
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"id": "main",
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"name": "Relu.vec4",
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"shader": "unary-vec4.wgsl.jinja",
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"derive": {
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"op": "\"relu\"",
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"vec4PerThread": "4 if numel(shapes.y) * dtypeBytes(tensorDtypes.y) <= 16777216 else 1"
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},
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"bindings": [
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{ "arg": "x", "elementType": "$vectorScalar" },
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{ "arg": "y", "elementType": "$vectorScalar" },
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{ "name": "params", "struct": [{ "name": "count", "type": "u32", "value": "numel(shapes.y) / 4" }] }
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],
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"dispatch": {
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"x": "min(ceilDiv((ceilDiv(numel(shapes.y) / 4, 4 if numel(shapes.y) * dtypeBytes(tensorDtypes.y) <= 16777216 else 1)), (tunables.WORKGROUP_SIZE)), 65535)",
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"y": "ceilDiv(ceilDiv((ceilDiv(numel(shapes.y) / 4, 4 if numel(shapes.y) * dtypeBytes(tensorDtypes.y) <= 16777216 else 1)), (tunables.WORKGROUP_SIZE)), 65535)",
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"z": 1
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}
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}
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]
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},
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{
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"id": "scalar",
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"derive": { "scalar": "dtypes.T", "usesF16": "dtypes.T == \"f16\"" },
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"passes": [
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{
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"id": "main",
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"name": "scalar",
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"shader": "unary-scalar.wgsl.jinja",
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"derive": { "op": "\"relu\"", "itemsPerInvocation": 4 },
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"bindings": [
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"x",
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"y",
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{ "name": "params", "struct": [{ "name": "count", "type": "u32", "value": "numel(shapes.x)" }] }
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],
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"dispatch": {
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"x": "min(ceilDiv((ceilDiv(numel(shapes.x), 4)), (tunables.WORKGROUP_SIZE)), 65535)",
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"y": "ceilDiv(ceilDiv((ceilDiv(numel(shapes.x), 4)), (tunables.WORKGROUP_SIZE)), 65535)",
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"z": 1
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}
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}
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]
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}
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build/webgpu/metadata.json
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{
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"name": "ai.onnx.Relu",
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"id": "
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"version": 1,
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"license": "Apache-2.0",
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"backend": { "type": "webgpu" },
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"digest": {
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"algorithm": "sha256",
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"files": {
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"bench.json": "
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"manifest.json": "
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"test.json": "
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"unary-scalar.wgsl.jinja": "
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"unary-vec4.wgsl.jinja": "
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}
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},
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"provenance": { "kernel": { "sha": "
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"webgpu": {
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}
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{
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"name": "ai.onnx.Relu",
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"id": "_ai_onnx_relu_webgpu_251441b",
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"version": 1,
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"license": "Apache-2.0",
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"backend": { "type": "webgpu" },
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"digest": {
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"algorithm": "sha256",
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"files": {
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"bench.json": "ebSV1lr1/T3ypGQCKBHUbO1bygE2a5cJF9HMlB3unpI=",
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"manifest.json": "Cd+eoyUA3ITLJr1g3yz5nfXW3t5ESuzBdfAnc0e4LP4=",
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"test.json": "DDwaG+obBvpm6dyBb1kNPQ2G5uLX77yTTruGxnKJUlM=",
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"unary-scalar.wgsl.jinja": "cmT3ZpyQMwDNhN4i9ZSCIPZJVcin47pLs0Ce9C0JpYk=",
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"unary-vec4.wgsl.jinja": "v/Orpo0E19349fM5UjI6yJmPHAGtpWEeOIlGA4Lo6yg="
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}
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},
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"provenance": { "kernel": { "sha": "91d990483a174128daf7673f3f37a7c890493ae1", "dirty": false } },
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"webgpu": {
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"manifestSpec": "2.0",
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"variants": { "same_layout_vec4": ["unary-vec4.wgsl.jinja"], "scalar": ["unary-scalar.wgsl.jinja"] }
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}
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}
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build/webgpu/test.json
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{
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"op": "ai.onnx.Relu",
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"fixtureArrays": {
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"onnx_backend_input_x": [1.764052391052246, 0.40015721321105957, 0.978738009929657, 2.2408931255340576, 1.8675580024719238, -0.9772778749465942, 0.9500884413719177, -0.15135720372200012, -0.10321885347366333, 0.4105985164642334, 0.14404356479644775, 1.4542734622955322, 0.7610377073287964, 0.12167501449584961, 0.44386324286460876, 0.3336743414402008, 1.4940791130065918, -0.2051582634449005, 0.3130677044391632, -0.8540957570075989, -2.5529897212982178, 0.653618574142456, 0.8644362092018127, -0.7421650290489197, 2.269754648208618, -1.4543657302856445, 0.04575851559638977, -0.18718385696411133, 1.5327792167663574, 1.4693588018417358, 0.154947429895401, 0.37816253304481506, -0.8877857327461243, -1.980796456336975, -0.34791216254234314, 0.15634897351264954, 1.2302906513214111, 1.202379822731018, -0.38732680678367615, -0.302302747964859, -1.0485529899597168, -1.420017957687378, -1.7062702178955078, 1.950775384902954, -0.5096521973609924, -0.4380742907524109, -1.2527953386306763, 0.7774903774261475, -1.6138978004455566, -0.21274028718471527, -0.8954665660858154, 0.38690251111984253, -0.5108051300048828, -1.18063223361969, -0.02818222902715206, 0.4283318817615509, 0.06651721894741058, 0.30247190594673157, -0.6343221068382263, -0.3627411723136902]
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},
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"provenance": {
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"source": "onnxruntime/test/providers/cpu/activation/activation_op_test.cc",
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"test": "ActivationOpTest.Relu",
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-
"notes": "Scalar
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},
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"inputs": {
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"x": { "dtype": "float32", "shape": [3], "data": { "kind": "values", "values": [-1e-40, 0.0, 1e-40] } }
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{
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"fixtureArrays": {
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"onnx_backend_input_x": [1.764052391052246, 0.40015721321105957, 0.978738009929657, 2.2408931255340576, 1.8675580024719238, -0.9772778749465942, 0.9500884413719177, -0.15135720372200012, -0.10321885347366333, 0.4105985164642334, 0.14404356479644775, 1.4542734622955322, 0.7610377073287964, 0.12167501449584961, 0.44386324286460876, 0.3336743414402008, 1.4940791130065918, -0.2051582634449005, 0.3130677044391632, -0.8540957570075989, -2.5529897212982178, 0.653618574142456, 0.8644362092018127, -0.7421650290489197, 2.269754648208618, -1.4543657302856445, 0.04575851559638977, -0.18718385696411133, 1.5327792167663574, 1.4693588018417358, 0.154947429895401, 0.37816253304481506, -0.8877857327461243, -1.980796456336975, -0.34791216254234314, 0.15634897351264954, 1.2302906513214111, 1.202379822731018, -0.38732680678367615, -0.302302747964859, -1.0485529899597168, -1.420017957687378, -1.7062702178955078, 1.950775384902954, -0.5096521973609924, -0.4380742907524109, -1.2527953386306763, 0.7774903774261475, -1.6138978004455566, -0.21274028718471527, -0.8954665660858154, 0.38690251111984253, -0.5108051300048828, -1.18063223361969, -0.02818222902715206, 0.4283318817615509, 0.06651721894741058, 0.30247190594673157, -0.6343221068382263, -0.3627411723136902]
|
| 4 |
},
|
|
|
|
| 61 |
"provenance": {
|
| 62 |
"source": "onnxruntime/test/providers/cpu/activation/activation_op_test.cc",
|
| 63 |
"test": "ActivationOpTest.Relu",
|
| 64 |
+
"notes": "Scalar Relu must preserve positive subnormal activations."
|
| 65 |
},
|
| 66 |
"inputs": {
|
| 67 |
"x": { "dtype": "float32", "shape": [3], "data": { "kind": "values", "values": [-1e-40, 0.0, 1e-40] } }
|
build/webgpu/unary-scalar.wgsl.jinja
CHANGED
|
@@ -1,27 +1,28 @@
|
|
| 1 |
{% macro flat_tail_open() %}
|
| 2 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 3 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 4 |
// 2D-folded flat index: gid.y carries the high bits when the element count exceeds the
|
| 5 |
-
//
|
| 6 |
-
let invocation = gid.x + gid.y *
|
| 7 |
// Tail-safe scalar x4 keeps vector-like dispatch density without requiring
|
| 8 |
// the logical tensor length (or its storage binding) to be vec4 aligned.
|
| 9 |
-
|
| 10 |
-
let
|
|
|
|
| 11 |
for (var i = begin; i < end; i = i + 1u) {
|
| 12 |
{%- endmacro %}
|
| 13 |
{% macro flat_tail_close() %}
|
| 14 |
}
|
| 15 |
{% endmacro %}
|
| 16 |
|
| 17 |
-
// Scalar unary
|
| 18 |
-
//
|
| 19 |
-
{% if
|
| 20 |
enable f16;
|
| 21 |
{% endif %}
|
| 22 |
{{ env.wgsl.resourceDeclarations }}
|
| 23 |
|
| 24 |
-
{% if
|
| 25 |
fn is_nan_f32(value: f32) -> bool {
|
| 26 |
let bits = bitcast<u32>(value);
|
| 27 |
return (bits & 0x7f800000u) == 0x7f800000u && (bits & 0x007fffffu) != 0u;
|
|
@@ -29,7 +30,7 @@ fn is_nan_f32(value: f32) -> bool {
|
|
| 29 |
|
| 30 |
{% endif %}
|
| 31 |
{{ flat_tail_open() }}
|
| 32 |
-
{% if
|
| 33 |
let value = x[i];
|
| 34 |
y[i] = select(value, 0i, value < 0i);
|
| 35 |
{% else %}
|
|
@@ -38,7 +39,7 @@ fn is_nan_f32(value: f32) -> bool {
|
|
| 38 |
if (is_nan_f32(value)) {
|
| 39 |
out = value;
|
| 40 |
}
|
| 41 |
-
y[i] = {{
|
| 42 |
{% endif %}
|
| 43 |
{{ flat_tail_close() -}}
|
| 44 |
}
|
|
|
|
| 1 |
{% macro flat_tail_open() %}
|
| 2 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 3 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 4 |
// 2D-folded flat index: gid.y carries the high bits when the element count exceeds the
|
| 5 |
+
// dispatch's per-axis workgroup fold width (the dispatch caps x and spills the rest into y).
|
| 6 |
+
let invocation = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 7 |
// Tail-safe scalar x4 keeps vector-like dispatch density without requiring
|
| 8 |
// the logical tensor length (or its storage binding) to be vec4 aligned.
|
| 9 |
+
{% set itemsPerInvocation = itemsPerInvocation if itemsPerInvocation is defined else 4 %}
|
| 10 |
+
let begin = invocation * {{ itemsPerInvocation }}u;
|
| 11 |
+
let end = min(begin + {{ itemsPerInvocation }}u, params.count);
|
| 12 |
for (var i = begin; i < end; i = i + 1u) {
|
| 13 |
{%- endmacro %}
|
| 14 |
{% macro flat_tail_close() %}
|
| 15 |
}
|
| 16 |
{% endmacro %}
|
| 17 |
|
| 18 |
+
// Scalar unary elementwise implementation. Specialization emits only the
|
| 19 |
+
// selected operation and any numerical helper it requires.
|
| 20 |
+
{% if usesF16 %}
|
| 21 |
enable f16;
|
| 22 |
{% endif %}
|
| 23 |
{{ env.wgsl.resourceDeclarations }}
|
| 24 |
|
| 25 |
+
{% if scalar != "i32" %}
|
| 26 |
fn is_nan_f32(value: f32) -> bool {
|
| 27 |
let bits = bitcast<u32>(value);
|
| 28 |
return (bits & 0x7f800000u) == 0x7f800000u && (bits & 0x007fffffu) != 0u;
|
|
|
|
| 30 |
|
| 31 |
{% endif %}
|
| 32 |
{{ flat_tail_open() }}
|
| 33 |
+
{% if scalar == "i32" %}
|
| 34 |
let value = x[i];
|
| 35 |
y[i] = select(value, 0i, value < 0i);
|
| 36 |
{% else %}
|
|
|
|
| 39 |
if (is_nan_f32(value)) {
|
| 40 |
out = value;
|
| 41 |
}
|
| 42 |
+
y[i] = {{ scalar }}(out);
|
| 43 |
{% endif %}
|
| 44 |
{{ flat_tail_close() -}}
|
| 45 |
}
|
build/webgpu/unary-vec4.wgsl.jinja
CHANGED
|
@@ -1,8 +1,5 @@
|
|
| 1 |
-
// Loads and stores vec4<T>
|
| 2 |
-
//
|
| 3 |
-
{% if usesF16 %}
|
| 4 |
-
enable f16;
|
| 5 |
-
{% endif %}
|
| 6 |
{{ env.wgsl.resourceDeclarations }}
|
| 7 |
|
| 8 |
{% macro emit_is_nan_f32() %}
|
|
@@ -10,10 +7,10 @@ fn is_nan_f32(value: f32) -> bool {
|
|
| 10 |
let bits = bitcast<u32>(value);
|
| 11 |
return (bits & 0x7f800000u) == 0x7f800000u && (bits & 0x007fffffu) != 0u;
|
| 12 |
}{% endmacro %}
|
| 13 |
-
{% if (
|
| 14 |
{{ emit_is_nan_f32() }}
|
| 15 |
{% endif %}
|
| 16 |
-
{% if
|
| 17 |
fn relu_value(value: f32) -> f32 {
|
| 18 |
// Some shader compilers apply no-NaN fast-math to vector select/compare
|
| 19 |
// expressions. Inspecting the IEEE payload explicitly keeps Relu's required
|
|
@@ -25,14 +22,33 @@ fn relu_value(value: f32) -> f32 {
|
|
| 25 |
}
|
| 26 |
{% endif %}
|
| 27 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 28 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 29 |
-
fn main(@builtin(global_invocation_id) gid: vec3<u32>
|
| 30 |
// 2D-folded flat index: gid.y carries the high bits when the element count exceeds the
|
| 31 |
-
//
|
| 32 |
-
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 33 |
if (i >= params.count) {
|
| 34 |
return;
|
| 35 |
}
|
|
|
|
|
|
|
| 36 |
let xv = x[i];
|
| 37 |
{% if scalar == "i32" %}
|
| 38 |
y[i] = select(xv, vec4<i32>(0i), xv < vec4<i32>(0i));
|
|
@@ -43,4 +59,7 @@ fn main(@builtin(global_invocation_id) gid: vec3<u32>, @builtin(num_workgroups)
|
|
| 43 |
y[i] = {{ vectorScalar }}(vec4<f32>(
|
| 44 |
relu_value(fv.x), relu_value(fv.y), relu_value(fv.z), relu_value(fv.w)));
|
| 45 |
{% endif %}
|
|
|
|
|
|
|
|
|
|
| 46 |
}
|
|
|
|
| 1 |
+
// Loads and stores vec4<T> while evaluating the selected unary operation per
|
| 2 |
+
// component.
|
|
|
|
|
|
|
|
|
|
| 3 |
{{ env.wgsl.resourceDeclarations }}
|
| 4 |
|
| 5 |
{% macro emit_is_nan_f32() %}
|
|
|
|
| 7 |
let bits = bitcast<u32>(value);
|
| 8 |
return (bits & 0x7f800000u) == 0x7f800000u && (bits & 0x007fffffu) != 0u;
|
| 9 |
}{% endmacro %}
|
| 10 |
+
{% if (op == "clip" and scalar != "i32" and scalar != "u32") or (op == "relu" and scalar != "i32") or op == "sin" or op == "tan" %}
|
| 11 |
{{ emit_is_nan_f32() }}
|
| 12 |
{% endif %}
|
| 13 |
+
{% if op == "relu" and scalar != "i32" %}
|
| 14 |
fn relu_value(value: f32) -> f32 {
|
| 15 |
// Some shader compilers apply no-NaN fast-math to vector select/compare
|
| 16 |
// expressions. Inspecting the IEEE payload explicitly keeps Relu's required
|
|
|
|
| 22 |
}
|
| 23 |
{% endif %}
|
| 24 |
|
| 25 |
+
{% set vec4PerThread = vec4PerThread %}
|
| 26 |
+
{% if vec4PerThread > 1 %}
|
| 27 |
+
const ITEMS: u32 = {{ vec4PerThread }}u;
|
| 28 |
+
{% endif %}
|
| 29 |
+
|
| 30 |
@compute @workgroup_size({{ tunables.WORKGROUP_SIZE }})
|
| 31 |
+
fn main(@builtin(global_invocation_id) gid: vec3<u32>) {
|
| 32 |
// 2D-folded flat index: gid.y carries the high bits when the element count exceeds the
|
| 33 |
+
// per-axis dispatch fold width (the dispatch caps x and spills the rest into y).
|
| 34 |
+
{% if vec4PerThread > 1 %}
|
| 35 |
+
// Each invocation walks ITEMS vec4 groups a span apart. Consecutive lanes
|
| 36 |
+
// access consecutive words on every step, while each lane can keep several
|
| 37 |
+
// independent loads in flight.
|
| 38 |
+
let tid = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 39 |
+
let span = (params.count + ITEMS - 1u) / ITEMS;
|
| 40 |
+
for (var j = 0u; j < ITEMS; j = j + 1u) {
|
| 41 |
+
let i = tid + j * span;
|
| 42 |
+
if (i >= params.count) {
|
| 43 |
+
break;
|
| 44 |
+
}
|
| 45 |
+
{% else %}
|
| 46 |
+
let i = gid.x + gid.y * {{ DISPATCH_FOLD_WIDTH }}u * {{ tunables.WORKGROUP_SIZE }}u;
|
| 47 |
if (i >= params.count) {
|
| 48 |
return;
|
| 49 |
}
|
| 50 |
+
{% endif %}
|
| 51 |
+
|
| 52 |
let xv = x[i];
|
| 53 |
{% if scalar == "i32" %}
|
| 54 |
y[i] = select(xv, vec4<i32>(0i), xv < vec4<i32>(0i));
|
|
|
|
| 59 |
y[i] = {{ vectorScalar }}(vec4<f32>(
|
| 60 |
relu_value(fv.x), relu_value(fv.y), relu_value(fv.z), relu_value(fv.w)));
|
| 61 |
{% endif %}
|
| 62 |
+
{% if vec4PerThread > 1 %}
|
| 63 |
+
}
|
| 64 |
+
{% endif %}
|
| 65 |
}
|