Kernels
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Build uploaded using `kernels`.

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Files changed (21) hide show
  1. .gitattributes +6 -0
  2. build/torch210-cxx11-cu126-x86_64-linux/_ops.py +3 -3
  3. build/torch210-cxx11-cu126-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} +2 -2
  4. build/torch210-cxx11-cu126-x86_64-linux/core.py +28 -16
  5. build/torch210-cxx11-cu128-x86_64-linux/_ops.py +3 -3
  6. build/torch210-cxx11-cu128-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} +2 -2
  7. build/torch210-cxx11-cu128-x86_64-linux/core.py +28 -16
  8. build/torch210-cxx11-cu130-x86_64-linux/_ops.py +3 -3
  9. build/torch210-cxx11-cu130-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} +2 -2
  10. build/torch210-cxx11-cu130-x86_64-linux/core.py +28 -16
  11. build/torch29-cxx11-cu126-x86_64-linux/_ops.py +3 -3
  12. build/torch29-cxx11-cu126-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} +2 -2
  13. build/torch29-cxx11-cu126-x86_64-linux/core.py +28 -16
  14. build/torch29-cxx11-cu128-x86_64-linux/_ops.py +3 -3
  15. build/torch29-cxx11-cu128-x86_64-linux/_sage_attention_6e51d70.abi3.so +0 -3
  16. build/torch29-cxx11-cu128-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so +3 -0
  17. build/torch29-cxx11-cu128-x86_64-linux/core.py +28 -16
  18. build/torch29-cxx11-cu130-x86_64-linux/_ops.py +3 -3
  19. build/torch29-cxx11-cu130-x86_64-linux/_sage_attention_6e51d70.abi3.so +0 -3
  20. build/torch29-cxx11-cu130-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so +3 -0
  21. build/torch29-cxx11-cu130-x86_64-linux/core.py +28 -16
.gitattributes CHANGED
@@ -55,3 +55,9 @@ build/torch210-cxx11-cu130-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so fi
55
  build/torch29-cxx11-cu126-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
56
  build/torch29-cxx11-cu128-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
57
  build/torch29-cxx11-cu130-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
 
 
 
 
 
 
 
55
  build/torch29-cxx11-cu126-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
56
  build/torch29-cxx11-cu128-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
57
  build/torch29-cxx11-cu130-aarch64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
58
+ build/torch210-cxx11-cu126-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
59
+ build/torch210-cxx11-cu128-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
60
+ build/torch210-cxx11-cu130-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
61
+ build/torch29-cxx11-cu126-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
62
+ build/torch29-cxx11-cu128-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
63
+ build/torch29-cxx11-cu130-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so filter=lfs diff=lfs merge=lfs -text
build/torch210-cxx11-cu126-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch210-cxx11-cu126-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} RENAMED
@@ -1,3 +1,3 @@
1
  version https://git-lfs.github.com/spec/v1
2
- oid sha256:8b4b01fb9797a2b69820d313342d84dcfc94f0bf333aec597283953b8bd9eb7f
3
- size 26060392
 
1
  version https://git-lfs.github.com/spec/v1
2
+ oid sha256:38b7d44512d6188693316247322f279ef483bc2801118392dae59e12578a471d
3
+ size 26060416
build/torch210-cxx11-cu126-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,
build/torch210-cxx11-cu128-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch210-cxx11-cu128-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} RENAMED
@@ -1,3 +1,3 @@
1
  version https://git-lfs.github.com/spec/v1
2
- oid sha256:86cee1d97e0e6fcd5aaf9480aaa092d96d7e8780214e2768ae1a68448df2dbf3
3
- size 26573256
 
1
  version https://git-lfs.github.com/spec/v1
2
+ oid sha256:7fedc1235631ddd8ed0db9f8fd9e7860a9735acbe007f0d3cd81d4ecc8a5a0c6
3
+ size 26573280
build/torch210-cxx11-cu128-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,
build/torch210-cxx11-cu130-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch210-cxx11-cu130-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} RENAMED
@@ -1,3 +1,3 @@
1
  version https://git-lfs.github.com/spec/v1
2
- oid sha256:52f21795a824fc986e20cc3bda1ccfb7327343868888692d117ee8b81376dda9
3
- size 27244536
 
1
  version https://git-lfs.github.com/spec/v1
2
+ oid sha256:8a6aaec766a6189b2cf7d38059332368797a2bc3c8e3a8ceccd8620aa78ec9a8
3
+ size 27244560
build/torch210-cxx11-cu130-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,
build/torch29-cxx11-cu126-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch29-cxx11-cu126-x86_64-linux/{_sage_attention_6e51d70.abi3.so → _sage_attention_cuda_4eabbf5.abi3.so} RENAMED
@@ -1,3 +1,3 @@
1
  version https://git-lfs.github.com/spec/v1
2
- oid sha256:b3aaf3cffb71067f4816ba5da358cd3a0d3b19b9cb2ba1ec0eedf1bf9b4051e3
3
- size 26050976
 
1
  version https://git-lfs.github.com/spec/v1
2
+ oid sha256:ff22b0633165c491f8fbd9c8014a0534313c3c8b059fe6ffe3a13bfc09ba3ed1
3
+ size 26051000
build/torch29-cxx11-cu126-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,
build/torch29-cxx11-cu128-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch29-cxx11-cu128-x86_64-linux/_sage_attention_6e51d70.abi3.so DELETED
@@ -1,3 +0,0 @@
1
- version https://git-lfs.github.com/spec/v1
2
- oid sha256:c58f1609620670fd73e4b5e111a3efc2e1f17197afe9705a45d00e6aac8e02b5
3
- size 26559000
 
 
 
 
build/torch29-cxx11-cu128-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so ADDED
@@ -0,0 +1,3 @@
 
 
 
 
1
+ version https://git-lfs.github.com/spec/v1
2
+ oid sha256:1478890ef5329eeb7da56232cbadd79430dca69e3bbdd78c87e24e2c5c698e5d
3
+ size 26559024
build/torch29-cxx11-cu128-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,
build/torch29-cxx11-cu130-x86_64-linux/_ops.py CHANGED
@@ -1,9 +1,9 @@
1
  import torch
2
- from . import _sage_attention_6e51d70
3
- ops = torch.ops._sage_attention_6e51d70
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
- return f"_sage_attention_6e51d70::{op_name}"
 
1
  import torch
2
+ from . import _sage_attention_cuda_4eabbf5
3
+ ops = torch.ops._sage_attention_cuda_4eabbf5
4
 
5
  def add_op_namespace_prefix(op_name: str):
6
  """
7
  Prefix op by namespace.
8
  """
9
+ return f"_sage_attention_cuda_4eabbf5::{op_name}"
build/torch29-cxx11-cu130-x86_64-linux/_sage_attention_6e51d70.abi3.so DELETED
@@ -1,3 +0,0 @@
1
- version https://git-lfs.github.com/spec/v1
2
- oid sha256:bce203e59afbf482ef8d9669badd97ca0600d5fefc8c66cfc6158a9c319b3f78
3
- size 27230776
 
 
 
 
build/torch29-cxx11-cu130-x86_64-linux/_sage_attention_cuda_4eabbf5.abi3.so ADDED
@@ -0,0 +1,3 @@
 
 
 
 
1
+ version https://git-lfs.github.com/spec/v1
2
+ oid sha256:195ae232fffe6a586a7587e962b19980f8df71b541e24d179770d1794539a1a7
3
+ size 27230800
build/torch29-cxx11-cu130-x86_64-linux/core.py CHANGED
@@ -26,21 +26,33 @@ from .quant import per_channel_fp8
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
- from . import sm80_compile
 
 
 
 
 
30
  SM80_ENABLED = True
31
- except:
32
  SM80_ENABLED = False
33
 
34
  try:
35
- from . import sm89_compile
 
 
 
 
 
36
  SM89_ENABLED = True
37
- except:
38
  SM89_ENABLED = False
39
 
40
  try:
41
- from . import sm90_compile
 
 
42
  SM90_ENABLED = True
43
- except:
44
  SM90_ENABLED = False
45
 
46
  from typing import Any, List, Literal, Optional, Tuple, Union
@@ -378,7 +390,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
378
 
379
  if pv_accum_dtype == "fp32":
380
  v = v.to(torch.float16)
381
- lse = sm80_compile.qk_int8_sv_f16_accum_f32_attn(
382
  q_int8,
383
  k_int8,
384
  v,
@@ -394,7 +406,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
394
  elif pv_accum_dtype == "fp16":
395
  if smooth_v:
396
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
397
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
398
  q_int8,
399
  k_int8,
400
  smoothed_v,
@@ -410,7 +422,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
410
  )
411
  else:
412
  v = v.to(torch.float16)
413
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn(
414
  q_int8,
415
  k_int8,
416
  v,
@@ -425,7 +437,7 @@ def sageattn_qk_int8_pv_fp16_cuda(
425
  )
426
  elif pv_accum_dtype == "fp16+fp32":
427
  v = v.to(torch.float16)
428
- lse = sm80_compile.qk_int8_sv_f16_accum_f16_attn_inst_buf(
429
  q_int8,
430
  k_int8,
431
  v,
@@ -650,7 +662,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
650
  )
651
  if pv_accum_dtype == "fp32":
652
  if smooth_v:
653
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
654
  q_int8,
655
  k_int8,
656
  v_fp8,
@@ -667,7 +679,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
667
  )
668
  torch.cuda.synchronize()
669
  else:
670
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
671
  q_int8,
672
  k_int8,
673
  v_fp8,
@@ -683,7 +695,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
683
  )
684
  torch.cuda.synchronize()
685
  elif pv_accum_dtype == "fp32+fp32":
686
- lse = sm89_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
687
  q_int8,
688
  k_int8,
689
  v_fp8,
@@ -699,7 +711,7 @@ def sageattn_qk_int8_pv_fp8_cuda(
699
  )
700
  torch.cuda.synchronize()
701
  elif pv_accum_dtype == "fp32+fp16":
702
- lse = sm89_compile.qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
703
  q_int8,
704
  k_int8,
705
  v_fp8,
@@ -936,7 +948,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
936
 
937
  if pv_accum_dtype == "fp32":
938
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
939
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
940
  q_int8,
941
  k_int8,
942
  v_fp8,
@@ -951,7 +963,7 @@ def sageattn_qk_int8_pv_fp8_cuda_sm90(
951
  _return_lse,
952
  )
953
  elif pv_accum_dtype == "fp32+fp32":
954
- lse = sm90_compile.qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
955
  q_int8,
956
  k_int8,
957
  v_fp8,
 
26
  from .quant_per_thread import per_thread_int8 as per_thread_int8_triton
27
 
28
  try:
29
+ from .sm80_compile import (
30
+ qk_int8_sv_f16_accum_f32_attn as sm80_qk_int8_sv_f16_accum_f32_attn,
31
+ qk_int8_sv_f16_accum_f16_fuse_v_mean_attn as sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn,
32
+ qk_int8_sv_f16_accum_f16_attn as sm80_qk_int8_sv_f16_accum_f16_attn,
33
+ qk_int8_sv_f16_accum_f16_attn_inst_buf as sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf,
34
+ )
35
  SM80_ENABLED = True
36
+ except Exception:
37
  SM80_ENABLED = False
38
 
39
  try:
40
+ from .sm89_compile import (
41
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn,
42
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn,
43
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf,
44
+ qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf as sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf,
45
+ )
46
  SM89_ENABLED = True
47
+ except Exception:
48
  SM89_ENABLED = False
49
 
50
  try:
51
+ from .sm90_compile import (
52
+ qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90 as sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90,
53
+ )
54
  SM90_ENABLED = True
55
+ except Exception:
56
  SM90_ENABLED = False
57
 
58
  from typing import Any, List, Literal, Optional, Tuple, Union
 
390
 
391
  if pv_accum_dtype == "fp32":
392
  v = v.to(torch.float16)
393
+ lse = sm80_qk_int8_sv_f16_accum_f32_attn(
394
  q_int8,
395
  k_int8,
396
  v,
 
406
  elif pv_accum_dtype == "fp16":
407
  if smooth_v:
408
  smoothed_v, vm = sub_mean(v, tensor_layout=tensor_layout)
409
+ lse = sm80_qk_int8_sv_f16_accum_f16_fuse_v_mean_attn(
410
  q_int8,
411
  k_int8,
412
  smoothed_v,
 
422
  )
423
  else:
424
  v = v.to(torch.float16)
425
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn(
426
  q_int8,
427
  k_int8,
428
  v,
 
437
  )
438
  elif pv_accum_dtype == "fp16+fp32":
439
  v = v.to(torch.float16)
440
+ lse = sm80_qk_int8_sv_f16_accum_f16_attn_inst_buf(
441
  q_int8,
442
  k_int8,
443
  v,
 
662
  )
663
  if pv_accum_dtype == "fp32":
664
  if smooth_v:
665
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_fuse_v_mean_attn(
666
  q_int8,
667
  k_int8,
668
  v_fp8,
 
679
  )
680
  torch.cuda.synchronize()
681
  else:
682
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
683
  q_int8,
684
  k_int8,
685
  v_fp8,
 
695
  )
696
  torch.cuda.synchronize()
697
  elif pv_accum_dtype == "fp32+fp32":
698
+ lse = sm89_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf(
699
  q_int8,
700
  k_int8,
701
  v_fp8,
 
711
  )
712
  torch.cuda.synchronize()
713
  elif pv_accum_dtype == "fp32+fp16":
714
+ lse = sm89_qk_int8_sv_f8_accum_f16_fuse_v_scale_attn_inst_buf(
715
  q_int8,
716
  k_int8,
717
  v_fp8,
 
948
 
949
  if pv_accum_dtype == "fp32":
950
  raise NotImplementedError("Please use pv_accum_dtype='fp32+fp32' for sm90.")
951
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn(
952
  q_int8,
953
  k_int8,
954
  v_fp8,
 
963
  _return_lse,
964
  )
965
  elif pv_accum_dtype == "fp32+fp32":
966
+ lse = sm90_qk_int8_sv_f8_accum_f32_fuse_v_scale_attn_inst_buf_sm90(
967
  q_int8,
968
  k_int8,
969
  v_fp8,