tflite: bake output limiter into SAME-S/SAME-L decoders (ceiling 0.977, matches TRT graft)

tflite: bake output limiter into SAME-S/SAME-L decoders (ceiling 0.977, matches TRT graft)

model card: note optimized TFLite/LiteRT rung codecs

tflite: SAME codecs -> static rung models (fp32 + w8a8); retire w16a32/w8a32/w8a8-dyn to legacy/

tflite: preserve pre-rung SAME codecs under legacy/

Move the retired fp8_fast ONNX under onnx/same-s/legacy/

Rename the autoencoder ONNX to match the engine naming scheme

Move the retired w8_bf16 ONNX under onnx/*/legacy/

Delete the miscalibrated sm_120 SAME-S fp8 encoder

Move deprecated sm_120 TRT engines under legacy/

Move deprecated sm_90 TRT engines under legacy/

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

build-ready ONNX: limiter grafted + ceiling baked (decoders), amax-recalibrated activation scales (fp8 encoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

retire fp8_fast; remove the superseded sm_90 fp8 engines (miscalibrated encoder, 8192-ceiling decoders)

SAME-L/SAME-S: bake the limiter ceiling so the chunkable decoders keep the ('latent','pcm') signature; add the SAME-S fp8 chunkable pair

SAME-L/SAME-S: bake the limiter ceiling so the chunkable decoders keep the ('latent','pcm') signature; add the SAME-S fp8 chunkable pair

SAME-L/SAME-S: bake the limiter ceiling so the chunkable decoders keep the ('latent','pcm') signature; add the SAME-S fp8 chunkable pair

SAME-L/SAME-S: bake the limiter ceiling so the chunkable decoders keep the ('latent','pcm') signature; add the SAME-S fp8 chunkable pair

SAME-L/SAME-S: bake the limiter ceiling so the chunkable decoders keep the ('latent','pcm') signature; add the SAME-S fp8 chunkable pair

SAME-S: add the chunkable bf16 pair (two profiles, limiter)

SAME-S: add the chunkable bf16 pair (two profiles, limiter)

SAME-L encoders: low band 64 -> 256 (1.3-1.5x faster, cos 0.99831 -> 0.99969)

SAME-L encoders: low band 64 -> 256 (1.3-1.5x faster, cos 0.99831 -> 0.99969)

SAME-L: remove miscalibrated enc_fp8.trt (activation scales 1.3-28x too small; superseded by enc_fp8_chunkable.trt on sm_90)

SAME-L: remove miscalibrated enc_fp8.trt (activation scales 1.3-28x too small; superseded by enc_fp8_chunkable.trt on sm_90)

SAME-L: add enc_fp8_chunkable.trt (fp16, two-profile chunkable)

SAME-L: add dec_fp8_chunkable_limiter.trt (fp16, two-profile chunkable, runtime limiter ceiling)

SAME-L: add enc_fp16_chunkable.trt (fp16, two-profile chunkable)

SAME-L: add dec_fp16_chunkable_limiter.trt (fp16, two-profile chunkable, runtime limiter ceiling)

Add T5Gemma SentencePiece tokenizer.model (#8)

cpu-amx README: document the bf16 DiT tier (--dit-precision)

cpu-amx: add dit_medium_bf16_core.bin (bf16 DiT engine)

cpu-amx: add dit_medium_bf16_flash.so (bf16 DiT engine)

cpu-amx: add dit_medium_bf16_pin_fp32.npz (bf16 DiT engine)

cpu-amx: add dit_medium_bf16_core_manifest.txt (bf16 DiT engine)

cpu-amx: add dit_medium_bf16.so (bf16 DiT engine)

Delete old fp16mixed names + retired medium dit_bf16.trt (fp16 rename shipped)

Rename fp16mixed->fp16 DiT/T5Gemma engines+onnx (copies; deletes follow after code merge)

Remove redundant w8_bf16 engines (int8 weights fold to bf16 at build → identical size/speed to the bf16 baseline)

Add sm_120 TRT engines (AOT SWA, wide profile) for the quantized tiers