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  1. .gitattributes +8 -35
  2. .gitignore +8 -0
  3. BACKUP.md +23 -0
  4. BUILD.md +40 -0
  5. LICENSE +21 -0
  6. NOTICE.md +26 -0
  7. README.md +65 -1
  8. SHA256SUMS +87 -0
  9. data/dataset.json +135 -0
  10. data/model-int8.bin +3 -0
  11. data/model-int8.json +204 -0
  12. data/original-export.json +192 -0
  13. data/original.espdl +3 -0
  14. data/reference-tests.json +67 -0
  15. data/reference_latent.f32 +0 -0
  16. data/reference_rgb.f32 +3 -0
  17. firmware.bin +3 -0
  18. release.json +64 -0
  19. source/README.md +5 -0
  20. source/firmware/CMakeLists.txt +5 -0
  21. source/firmware/main/CMakeLists.txt +4 -0
  22. source/firmware/main/app_main.c +110 -0
  23. source/firmware/main/epaper.c +103 -0
  24. source/firmware/main/epaper.h +11 -0
  25. source/firmware/partitions.csv +5 -0
  26. source/firmware/sdkconfig +1278 -0
  27. source/firmware/sdkconfig.defaults +15 -0
  28. source/generated/model-int8.json +204 -0
  29. source/generated/model-meta.h +25 -0
  30. source/generated/palette-lut.h +4099 -0
  31. source/licenses/MPL-2.0.txt +378 -0
  32. source/licenses/esp-idf/LICENSE +202 -0
  33. source/licenses/esp-idf/components/bootloader/subproject/components/micro-ecc/micro-ecc/LICENSE.txt +21 -0
  34. source/licenses/esp-idf/components/bt/common/tinycrypt/LICENSE +61 -0
  35. source/licenses/esp-idf/components/bt/controller/lib_esp32/LICENSE +202 -0
  36. source/licenses/esp-idf/components/bt/controller/lib_esp32c2/esp32c2-bt-lib/NOTICE +9 -0
  37. source/licenses/esp-idf/components/bt/controller/lib_esp32c3_family/LICENSE +202 -0
  38. source/licenses/esp-idf/components/bt/controller/lib_esp32c5/esp32c5-bt-lib/NOTICE +9 -0
  39. source/licenses/esp-idf/components/bt/controller/lib_esp32c6/esp32c6-bt-lib/NOTICE +9 -0
  40. source/licenses/esp-idf/components/bt/controller/lib_esp32h2/esp32h2-bt-lib/NOTICE +9 -0
  41. source/licenses/esp-idf/components/bt/esp_ble_mesh/lib/lib/LICENSE +202 -0
  42. source/licenses/esp-idf/components/bt/host/nimble/nimble/LICENSE +227 -0
  43. source/licenses/esp-idf/components/bt/host/nimble/nimble/NOTICE +9 -0
  44. source/licenses/esp-idf/components/bt/host/nimble/nimble/ext/tinycrypt/LICENSE +61 -0
  45. source/licenses/esp-idf/components/cmock/CMock/LICENSE.txt +19 -0
  46. source/licenses/esp-idf/components/cmock/CMock/vendor/unity/LICENSE.txt +21 -0
  47. source/licenses/esp-idf/components/console/argtable3/LICENSE +167 -0
  48. source/licenses/esp-idf/components/console/linenoise/LICENSE +25 -0
  49. source/licenses/esp-idf/components/driver/test_apps/components/esp_serial_slave_link/LICENSE +202 -0
  50. source/licenses/esp-idf/components/esp_coex/lib/LICENSE +202 -0
.gitattributes CHANGED
@@ -1,35 +1,8 @@
1
- *.7z filter=lfs diff=lfs merge=lfs -text
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- *.arrow filter=lfs diff=lfs merge=lfs -text
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- *.pt filter=lfs diff=lfs merge=lfs -text
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- *.rar filter=lfs diff=lfs merge=lfs -text
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- *.safetensors filter=lfs diff=lfs merge=lfs -text
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- saved_model/**/* filter=lfs diff=lfs merge=lfs -text
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- *tfevents* filter=lfs diff=lfs merge=lfs -text
 
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+ * text=auto eol=lf
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+ *.bin -text
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+ *.espdl -text
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+ *.f32 -text
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+ data/model-int8.bin filter=lfs diff=lfs merge=lfs -text
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+ data/original.espdl filter=lfs diff=lfs merge=lfs -text
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+ data/reference_rgb.f32 filter=lfs diff=lfs merge=lfs -text
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+ firmware.bin filter=lfs diff=lfs merge=lfs -text
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
.gitignore ADDED
@@ -0,0 +1,8 @@
 
 
 
 
 
 
 
 
 
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+ source/firmware/build/
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+ __pycache__/
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+ *.pyc
4
+ original-badge*.bin
5
+ backups/
6
+ host-model
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+ host-model.exe
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+ output-int8.bin*
BACKUP.md ADDED
@@ -0,0 +1,23 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ # Optional backup and restore
2
+
3
+ Use the official esptool. Replace `PORT` with your badge's serial port. With the
4
+ original summit app, connect USB and hold rear SHARE until solid blue, then release.
5
+
6
+ ```sh
7
+ python -m pip install esptool==5.6.0
8
+ python -m esptool --chip esp32c3 --port PORT --baud 460800 --before usb-reset --after hard-reset read-flash 0x0 0x400000 original-badge.bin
9
+ ```
10
+
11
+ Keep the 4,194,304-byte backup privately. It can include photos, contacts, and
12
+ settings. For an independent check, read again to a different filename and compare
13
+ SHA-256 hashes. Return to solid-blue mode again before using the browser flasher.
14
+
15
+ To restore your own backup to the same badge:
16
+
17
+ ```sh
18
+ python -m esptool --chip esp32c3 --port PORT --baud 460800 --before usb-reset --after hard-reset write-flash 0x0 original-badge.bin
19
+ ```
20
+
21
+ The native flower app keeps USB awake and does not need the solid-blue sequence.
22
+ These commands do not write eFuses. See the
23
+ [official command reference](https://docs.espressif.com/projects/esptool/en/latest/esp32c3/esptool/basic-commands.html).
BUILD.md ADDED
@@ -0,0 +1,40 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ # Build and inspect
2
+
3
+ Use **ESP-IDF v5.5.1**, its **riscv32-esp-elf GCC 14.2.0_20241119** toolchain,
4
+ and **esptool 5.6.0**. The release was built with CMake 3.30.2 and Ninja 1.12.1.
5
+ The complete configuration is included as `source/firmware/sdkconfig`, alongside
6
+ `sdkconfig.defaults`. Reproducible-build mode and project version 1.0.0 are set.
7
+
8
+ After installing/activating official ESP-IDF, from the repository root:
9
+
10
+ ```sh
11
+ idf.py -C source/firmware build
12
+ ```
13
+
14
+ Build your own merged image with official esptool:
15
+
16
+ ```sh
17
+ python -m esptool --chip esp32c3 merge-bin -o rebuilt-firmware.bin --flash-mode dio --flash-freq 40m --flash-size 4MB --pad-to-size 4MB 0x0 source/firmware/build/bootloader/bootloader.bin 0x8000 source/firmware/build/partition_table/partition-table.bin 0x10000 source/firmware/build/flower_c3.bin 0x70000 data/model-int8.bin
18
+ ```
19
+
20
+ This writes no device. Flash the resulting file at `0x0` using the same guide.
21
+ Reproducible-build mode removes variable build metadata; byte identity across
22
+ independent build environments has not been independently verified.
23
+
24
+ `data/model-int8.json` describes the weights as signed INT8 OHWI tensors, with
25
+ byte offsets, little-endian INT32 biases, and power-of-two quantization exponents.
26
+ `source/generated/model-meta.h` contains layer descriptors, lookup tables, and the
27
+ startup latent. The source retains all trained values from `data/original.espdl`.
28
+
29
+ For desktop inference with a C11 compiler:
30
+
31
+ ```sh
32
+ cc -O3 -std=c11 -Isource/generated -Isource/native source/native/flower.c source/native/render.c source/native/host_main.c -o host-model
33
+ ./host-model data/model-int8.bin output-int8.bin 2000
34
+ ```
35
+
36
+ The output is 320 × 176 interleaved signed INT8 RGB, plus a packed `.epaper` frame.
37
+ Seed 2000 has CRC-32 `534cfdc5`; the embedded startup seed has CRC-32 `4033cceb`.
38
+ Original seed-2000 float reference tensors and a seven-seed test report are in
39
+ `data/`. Training source is in `training/`; reproducing training requires the
40
+ upstream dataset and dependencies listed in `data/original-export.json`.
LICENSE ADDED
@@ -0,0 +1,21 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ MIT License
2
+
3
+ Copyright (c) 2026 Flower Badge contributors
4
+
5
+ Permission is hereby granted, free of charge, to any person obtaining a copy
6
+ of this software and associated documentation files (the "Software"), to deal
7
+ in the Software without restriction, including without limitation the rights
8
+ to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9
+ copies of the Software, and to permit persons to whom the Software is
10
+ furnished to do so, subject to the following conditions:
11
+
12
+ The above copyright notice and this permission notice shall be included in all
13
+ copies or substantial portions of the Software.
14
+
15
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
+ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18
+ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21
+ SOFTWARE.
NOTICE.md ADDED
@@ -0,0 +1,26 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ # Source and upstream notices
2
+
3
+ The project owner's original code and trained weights are released under the
4
+ root MIT LICENSE. This does not relicense the separately attributed third-party
5
+ panel driver, ESP-IDF components, or training images.
6
+
7
+ The trained INT8 flower model was supplied by the project owner from their
8
+ existing ESP32-S3 flower-GAN project. Its architecture and precision are preserved.
9
+ That project's handoff identifies Oxford Flowers102 (8,189 images, 102 classes)
10
+ as its training data: https://www.robots.ox.ac.uk/~vgg/data/flowers/102/ .
11
+ No training images or original badge data are included here. This notice does not
12
+ replace upstream model/dataset terms.
13
+
14
+ The modified panel driver in `source/firmware/main/epaper.c` adapts Gordon Williams /
15
+ Pur3 Ltd's Espruino ePaper Badge driver, under Mozilla Public License 2.0. Its source
16
+ is included in this release and the license is at `source/licenses/MPL-2.0.txt`.
17
+ Original: https://github.com/espruino/Espruino/blob/master/libs/js/misc/epaper_badge.js
18
+
19
+ The native application and bootloader use Espressif ESP-IDF v5.5.1. IDF and its
20
+ bundled component notices are retained in `source/licenses/esp-idf/`.
21
+ https://github.com/espressif/esp-idf/tree/v5.5.1
22
+
23
+ Flashing instructions use Espressif's official browser utility (not bundled):
24
+ https://github.com/espressif/esptool-js . Optional terminal instructions use
25
+ esptool 5.6.0, installed separately from PyPI under its upstream terms:
26
+ https://github.com/espressif/esptool . No custom installer is included.
README.md CHANGED
@@ -1,3 +1,67 @@
1
  ---
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- license: apache-2.0
 
 
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  ---
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
  ---
2
+ license: mit
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+ tags: [esp32-c3, e-paper, gan, flowers, int8, embedded]
4
+ pipeline_tag: unconditional-image-generation
5
  ---
6
+
7
+ # Flower GAN on an ePaper badge
8
+
9
+ A **3.42-million-parameter INT8 flower generator** running entirely on the
10
+ Espruino ESP32-C3 ePaper Badge from Google Web AI Summit 2026. No network, cloud,
11
+ PSRAM, or external storage is needed. The existing trained model is reused without
12
+ retraining. Images generate in about **48 seconds**, with the next generation
13
+ overlapping the four-color screen refresh.
14
+
15
+ The model generates 320 × 176 RGB. The original 320 × 172 crop is enlarged to
16
+ 800 × 430 and dithered to black, white, yellow, and red. Small borders show timing,
17
+ free RAM, image number, and seed. Hardware: ESP32-C3, 4 MiB flash, 800 × 480 panel,
18
+ maker's rev 1.2 pin mapping. Other ESP32 boards need their own port.
19
+
20
+ ## Easiest flash: your browser
21
+
22
+ **This replaces the original app and saved badge data.** Back up first if you want
23
+ to preserve your photo, contacts, and settings; see [backup instructions](BACKUP.md).
24
+
25
+ 1. Download [firmware.bin](firmware.bin?download=true). It includes the application
26
+ and all model weights.
27
+ 2. Connect a USB data cable. In the original summit app, hold the rear **SHARE**
28
+ button until the LEDs stay solid blue, then release. Close other serial apps.
29
+ 3. In desktop Chrome or Edge, open [Espressif's ESP Tool](https://espressif.github.io/esptool-js/).
30
+ Click **Connect** in the Program section and select the badge's USB serial/JTAG
31
+ device. It should identify as **ESP32-C3**; leave WebUSB (CH340) unchecked.
32
+ 4. Choose `firmware.bin` in one file row at **Flash Address `0x0`**. Set flash mode,
33
+ frequency, and size to **keep**. Leave Erase all unchecked and click **Program**.
34
+ 5. Wait for verification and automatic reset. The first flower appears in about
35
+ one minute; subsequent images advance automatically. Both buttons are unassigned.
36
+
37
+ No custom installer scripts or build tools are required. For terminal users:
38
+
39
+ ```sh
40
+ python -m pip install esptool==5.6.0
41
+ python -m esptool --chip esp32c3 --port PORT --baud 460800 --before usb-reset --after hard-reset write-flash 0x0 firmware.bin
42
+ ```
43
+
44
+ Replace `PORT` with your device's port. If it does not appear, check the cable,
45
+ solid-blue mode, and whether another app has the port open.
46
+
47
+ ## Code, weights, and data
48
+
49
+ | Path | Contents |
50
+ | --- | --- |
51
+ | [source/](source/) | Native C inference, display driver, and ESP-IDF project |
52
+ | [training/](training/) | Original PyTorch architecture, training, data preparation, and export code |
53
+ | [data/](data/) | Exact INT8 weights, tensor layout, original model export, and reference tensors |
54
+ | [data/dataset.json](data/dataset.json) | Training dataset source, pinned revision, and preprocessing metadata |
55
+ | [BUILD.md](BUILD.md) | Build versions and commands |
56
+ | [release.json](release.json) / [SHA256SUMS](SHA256SUMS) | Flash layout, versions, and file hashes |
57
+
58
+ Training used all **8,189 Oxford Flowers102 images**, from the
59
+ [pufanyi/flowers102 mirror](https://huggingface.co/datasets/pufanyi/flowers102),
60
+ revision `b61e48cb66625272ca3bf36442062362587fa9bb`. Images are not mirrored here;
61
+ the source and preparation code are included. The original floating-point training
62
+ checkpoint was not in the supplied bundle; the original INT8 export is included.
63
+
64
+ Original project code and trained weights are released under [MIT](LICENSE).
65
+ Third-party code and dataset terms remain separate; see [NOTICE.md](NOTICE.md).
66
+ The release contains no private badge data. The inference implementation matched
67
+ its reference byte for byte across seven seeds and ran successfully on the badge.
SHA256SUMS ADDED
@@ -0,0 +1,87 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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+ 1c7689094a996beff43b8a91fbf3c8e2a4edd03ead540dfa8ba918063d1fb359 data/reference_rgb.f32
13
+ 03ca5e73c2d254c568bcafb616abb598df8dc1e5774be480169bc2885aa9b98c firmware.bin
14
+ 4453349a154e6a82ee514f7bcf50eec902b2de51c24b4483503533ecda01fc5d LICENSE
15
+ 8389b04da02141b65c23bc1e621b0422ee1bf596a1d70b30ee41fd2449a1c596 NOTICE.md
16
+ 3b0992e922932d5a6f5029a78283c88b8c9c0828ff6fa8a6817c034a4ac36e79 README.md
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30
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31
+ cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30 source/licenses/esp-idf/components/bt/controller/lib_esp32/LICENSE
32
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33
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34
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+ "source_url": "https://huggingface.co/datasets/pufanyi/flowers102",
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+ "license": "The Hugging Face mirror declares CC BY 4.0 and attributes the original Oxford 102 Flowers dataset; verify upstream terms before redistribution.",
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+ "selection_audit": "selected_items.jsonl",
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+ "augmentation_profile": "flowers"
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+ }
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+ }
data/original.espdl ADDED
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+ }
data/reference_latent.f32 ADDED
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firmware.bin ADDED
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+ {
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+ "name": "Flower GAN ePaper Badge",
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+ "version": "1.0.0",
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+ "chip": "ESP32-C3",
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+ "flash_bytes": 4194304,
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+ "compatible_hardware": "Espruino 800x480 four-color ePaper Badge (Web AI Summit 2026)",
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+ "build": {
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+ "esp_idf": "v5.5.1",
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+ "gcc": "14.2.0_20241119",
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+ "cmake": "3.30.2",
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+ "ninja": "1.12.1",
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+ "reproducible_build_mode": true,
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+ "computer_test_seeds": 7,
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+ "scope": "Inference/display implementation tested; version/reproducibility metadata rebuild not reflashed",
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+ }
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+ }
source/README.md ADDED
@@ -0,0 +1,5 @@
 
 
 
 
 
 
1
+ # Source
2
+
3
+ Native C inference, display driver, generated metadata, and the ESP-IDF project.
4
+ See ../BUILD.md for versions and build commands; ../data/ contains the weights
5
+ and original export. ../training/ contains the original training source.
source/firmware/CMakeLists.txt ADDED
@@ -0,0 +1,5 @@
 
 
 
 
 
 
1
+ cmake_minimum_required(VERSION 3.16)
2
+ set(COMPONENTS main)
3
+ set(PROJECT_VER "1.0.0")
4
+ include($ENV{IDF_PATH}/tools/cmake/project.cmake)
5
+ project(flower_c3)
source/firmware/main/CMakeLists.txt ADDED
@@ -0,0 +1,4 @@
 
 
 
 
 
1
+ idf_component_register(SRCS "app_main.c" "epaper.c" "../../native/flower.c" "../../native/render.c"
2
+ INCLUDE_DIRS "." "../../native" "../../generated"
3
+ REQUIRES esp_driver_gpio esp_driver_spi esp_timer esp_partition esp_hw_support)
4
+ target_compile_options(${COMPONENT_LIB} PRIVATE -O3)
source/firmware/main/app_main.c ADDED
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1
+ #include <stdio.h>
2
+ #include <stdbool.h>
3
+ #include <string.h>
4
+ #include "flower.h"
5
+ #include "render.h"
6
+ #include "epaper.h"
7
+ #include "esp_heap_caps.h"
8
+ #include "esp_log.h"
9
+ #include "esp_partition.h"
10
+ #include "esp_random.h"
11
+ #include "esp_timer.h"
12
+ #include "freertos/FreeRTOS.h"
13
+ #include "freertos/task.h"
14
+
15
+ static const char *TAG="FLOWER-C3";
16
+ static const uint8_t *weights;
17
+ static size_t weights_size;
18
+ static int8_t *arena;
19
+ static FC3Frame frame;
20
+ static int64_t last_yield,last_log,render_us,refresh_started;
21
+ static bool refresh_active,first_display=true;
22
+
23
+ static esp_err_t service_display(bool wait)
24
+ {
25
+ if(!refresh_active || (!wait && !badge_epaper_ready() && esp_timer_get_time()-refresh_started<90000000)) return ESP_OK;
26
+ esp_err_t result=badge_epaper_finish();
27
+ refresh_active=false;
28
+ ESP_LOGI(TAG,"DISPLAY_DONE result=%s seconds=%.3f",esp_err_to_name(result),(esp_timer_get_time()-refresh_started)/1000000.0);
29
+ if(first_display && result==ESP_OK) {
30
+ ESP_LOGI(TAG,"READY: continuously generating; next inference overlaps ePaper refresh. USB stays awake.");
31
+ first_display=false;
32
+ }
33
+ return result;
34
+ }
35
+
36
+ static void heartbeat(int stage,int row,void *user)
37
+ {
38
+ (void)user;
39
+ int64_t now=esp_timer_get_time();
40
+ if(now-last_yield>250000) {
41
+ ESP_ERROR_CHECK(service_display(false));
42
+ vTaskDelay(1);last_yield=esp_timer_get_time();
43
+ }
44
+ if(now-last_log>10000000) {
45
+ ESP_LOGI(TAG,"Computing stage=%d row=%d free_heap=%u",stage,row,(unsigned)esp_get_free_heap_size());
46
+ last_log=now;
47
+ }
48
+ }
49
+ static int output_row(int y,const int8_t *rgb,void *user)
50
+ {
51
+ (void)user;
52
+ int64_t start=esp_timer_get_time();
53
+ int result=fc3_frame_row(y,rgb,&frame);
54
+ render_us+=esp_timer_get_time()-start;
55
+ return result;
56
+ }
57
+ static bool generate(uint32_t seed,bool self_test,uint32_t number)
58
+ {
59
+ fc3_frame_clear(&frame);
60
+ int8_t latent[64];fc3_latent_from_seed(seed,latent);
61
+ FC3Stats stats;
62
+ render_us=0;last_yield=last_log=esp_timer_get_time();int64_t start=last_log;
63
+ ESP_LOGI(TAG,"Generating seed=%lu, INT8 320x176, arena=%u",(unsigned long)seed,FC3_ARENA_BYTES);
64
+ int result=fc3_generate(weights,weights_size,self_test ? fc3_test_latent() : latent,arena,FC3_ARENA_BYTES,output_row,heartbeat,NULL,&stats);
65
+ int64_t elapsed=esp_timer_get_time()-start;
66
+ double seconds=elapsed/1000000.0;
67
+ ESP_LOGI(TAG,"INFERENCE_DONE status=%d seconds=%.3f crc32=%08lx arena=%u",result,seconds,(unsigned long)stats.output_crc32,(unsigned)stats.arena_bytes);
68
+ if(result || (self_test && stats.output_crc32!=fc3_test_crc32())) {
69
+ ESP_LOGE(TAG,"Reference validation failed; display update skipped. Expected %08lx",(unsigned long)fc3_test_crc32());return false;
70
+ }
71
+ if(self_test) ESP_LOGI(TAG,"SELF_TEST_PASS: original model output matched exactly");
72
+ FC3DisplayStats overlay={.generation_ms=(uint32_t)(elapsed/1000),.number=number,.seed=seed,.free_heap_bytes=esp_get_free_heap_size()};
73
+ int64_t overlay_start=esp_timer_get_time();
74
+ fc3_frame_overlay(&frame,&overlay);
75
+ ESP_LOGI(TAG,"STATS overlay_us=%u render_ms=%u colors_black_white_yellow_red=%lu,%lu,%lu,%lu",
76
+ (unsigned)(esp_timer_get_time()-overlay_start),(unsigned)(render_us/1000),
77
+ (unsigned long)frame.colors[0],(unsigned long)frame.colors[1],(unsigned long)frame.colors[2],(unsigned long)frame.colors[3]);
78
+ return true;
79
+ }
80
+
81
+ void app_main(void)
82
+ {
83
+ ESP_LOGI(TAG,"INT8 flower generator / ESP32-C3 / native 320x176 / no PSRAM");
84
+ ESP_LOGI(TAG,"Free heap=%u largest=%u",(unsigned)esp_get_free_heap_size(),(unsigned)heap_caps_get_largest_free_block(MALLOC_CAP_8BIT));
85
+ const esp_partition_t *model=esp_partition_find_first(ESP_PARTITION_TYPE_DATA,0x40,"model");
86
+ if(!model) { ESP_LOGE(TAG,"Missing model partition");return; }
87
+ esp_partition_mmap_handle_t handle;
88
+ ESP_ERROR_CHECK(esp_partition_mmap(model,0,model->size,ESP_PARTITION_MMAP_DATA,(const void **)&weights,&handle));
89
+ weights_size=model->size;
90
+ arena=heap_caps_malloc(FC3_ARENA_BYTES,MALLOC_CAP_8BIT);
91
+ if(!arena) { ESP_LOGE(TAG,"Cannot allocate inference arena");return; }
92
+ for(int i=0;i<FC3_FRAME_CHUNKS;++i) {
93
+ frame.chunks[i]=heap_caps_malloc(FC3_FRAME_CHUNK_BYTES,MALLOC_CAP_8BIT);
94
+ if(!frame.chunks[i]) { ESP_LOGE(TAG,"Cannot allocate frame chunk %d",i);return; }
95
+ }
96
+ ESP_LOGI(TAG,"Memory ready: inference=%u display=%d free_heap=%u",FC3_ARENA_BYTES,FC3_FRAME_CHUNKS*FC3_FRAME_CHUNK_BYTES,(unsigned)esp_get_free_heap_size());
97
+ ESP_ERROR_CHECK(badge_epaper_setup());
98
+ uint32_t seed=1234,number=1;
99
+ for(;;) {
100
+ if(!generate(seed,number==1,number)) { ESP_LOGE(TAG,"Inference failed; stopped.");return; }
101
+ ESP_ERROR_CHECK(service_display(true));
102
+ refresh_started=esp_timer_get_time();
103
+ ESP_LOGI(TAG,"REFRESH_START number=%lu seed=%lu",(unsigned long)number,(unsigned long)seed);
104
+ ESP_ERROR_CHECK(badge_epaper_start(&frame));
105
+ refresh_active=true;
106
+ ESP_LOGI(TAG,"FRAME_RELEASED: panel has the pixels; computing next image now.");
107
+ seed=number==1 ? 2000 : esp_random();
108
+ ++number;
109
+ }
110
+ }
source/firmware/main/epaper.c ADDED
@@ -0,0 +1,103 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ /* Panel protocol adapted from Gordon Williams' Espruino ePaper Badge driver:
2
+ * https://github.com/espruino/Espruino/blob/master/libs/js/misc/epaper_badge.js
3
+ * Source driver is Copyright Pur3 Ltd, Mozilla Public License 2.0.
4
+ */
5
+ #include "epaper.h"
6
+ #include "esp_check.h"
7
+ #include "driver/gpio.h"
8
+ #include "driver/spi_master.h"
9
+ #include "esp_timer.h"
10
+ #include "freertos/FreeRTOS.h"
11
+ #include "freertos/task.h"
12
+
13
+ enum { PIN_BUSY=0,PIN_RESET=1,PIN_LED_ENABLE=4,PIN_CLOCK=7,PIN_MOSI=8,PIN_CS=10,PIN_DC=21 };
14
+ static spi_device_handle_t panel;
15
+ static void pause_ms(int ms) { vTaskDelay(pdMS_TO_TICKS(ms)+1); }
16
+ static esp_err_t transfer(const void *data,size_t length)
17
+ {
18
+ const uint8_t *p=data;
19
+ while(length) {
20
+ size_t n=length>64 ? 64 : length;
21
+ spi_transaction_t tx={.length=n*8,.tx_buffer=p};
22
+ esp_err_t result=spi_device_polling_transmit(panel,&tx);
23
+ if(result!=ESP_OK) return result;
24
+ p+=n;length-=n;
25
+ }
26
+ return ESP_OK;
27
+ }
28
+ static esp_err_t send_command(uint8_t value)
29
+ {
30
+ gpio_set_level(PIN_CS,0);gpio_set_level(PIN_DC,0);
31
+ esp_err_t result=transfer(&value,1);gpio_set_level(PIN_CS,1);return result;
32
+ }
33
+ static esp_err_t send_data(const void *data,size_t length)
34
+ {
35
+ gpio_set_level(PIN_CS,0);gpio_set_level(PIN_DC,1);
36
+ esp_err_t result=transfer(data,length);gpio_set_level(PIN_CS,1);return result;
37
+ }
38
+ static esp_err_t command_data(uint8_t command,const uint8_t *data,size_t length)
39
+ {
40
+ esp_err_t result=send_command(command);
41
+ return result==ESP_OK ? send_data(data,length) : result;
42
+ }
43
+ static esp_err_t wait_ready(void)
44
+ {
45
+ int64_t start=esp_timer_get_time();
46
+ while(!gpio_get_level(PIN_BUSY)) {
47
+ if(esp_timer_get_time()-start>90000000) return ESP_ERR_TIMEOUT;
48
+ pause_ms(5);
49
+ }
50
+ return ESP_OK;
51
+ }
52
+
53
+ esp_err_t badge_epaper_setup(void)
54
+ {
55
+ gpio_config_t outputs={.pin_bit_mask=(1ULL<<PIN_RESET)|(1ULL<<PIN_CS)|(1ULL<<PIN_DC)|(1ULL<<PIN_LED_ENABLE),.mode=GPIO_MODE_OUTPUT};
56
+ ESP_RETURN_ON_ERROR(gpio_config(&outputs),"EPAPER","GPIO setup failed");
57
+ gpio_set_level(PIN_RESET,1);gpio_set_level(PIN_CS,1);gpio_set_level(PIN_DC,1);gpio_set_level(PIN_LED_ENABLE,0);
58
+ gpio_config_t input={.pin_bit_mask=1ULL<<PIN_BUSY,.mode=GPIO_MODE_INPUT};
59
+ ESP_RETURN_ON_ERROR(gpio_config(&input),"EPAPER","BUSY setup failed");
60
+ spi_bus_config_t bus={.mosi_io_num=PIN_MOSI,.miso_io_num=-1,.sclk_io_num=PIN_CLOCK,.quadwp_io_num=-1,.quadhd_io_num=-1,.max_transfer_sz=64};
61
+ ESP_RETURN_ON_ERROR(spi_bus_initialize(SPI2_HOST,&bus,SPI_DMA_DISABLED),"EPAPER","SPI bus setup failed");
62
+ spi_device_interface_config_t device={.clock_speed_hz=4000000,.mode=0,.spics_io_num=-1,.queue_size=1};
63
+ return spi_bus_add_device(SPI2_HOST,&device,&panel);
64
+ }
65
+
66
+ bool badge_epaper_ready(void) { return gpio_get_level(PIN_BUSY)!=0; }
67
+
68
+ esp_err_t badge_epaper_start(const FC3Frame *frame)
69
+ {
70
+ /* Keep the maker's initialization values, including its 680-gate setting. */
71
+ static const uint8_t init[]={
72
+ 0x00,2,0x2b,0x29, 0x06,4,0x0f,0x8b,0x93,0xc1,
73
+ 0x50,1,0x37, 0x30,1,0x08, 0x61,4,0x03,0x20,0x02,0xa8,
74
+ 0x62,8,0x76,0x76,0x76,0x5a,0x9d,0x8a,0x76,0x62,
75
+ 0x65,4,0,0,0,0, 0xe0,1,0x10, 0xe7,1,0xa4, 0xe9,1,1,
76
+ 0xef,1,1, 0xf6,1,0x20, 0xef,1,0, 0xe0,1,0x12,
77
+ 0xe6,1,92, 0xa5,1,0
78
+ };
79
+ pause_ms(20);gpio_set_level(PIN_RESET,0);pause_ms(10);gpio_set_level(PIN_RESET,1);pause_ms(10);
80
+ ESP_RETURN_ON_ERROR(wait_ready(),"EPAPER","Reset timeout");
81
+ for(size_t p=0;p<sizeof(init);) {
82
+ uint8_t command=init[p++],length=init[p++];
83
+ ESP_RETURN_ON_ERROR(command_data(command,init+p,length),"EPAPER","Panel init failed");p+=length;
84
+ }
85
+ ESP_RETURN_ON_ERROR(wait_ready(),"EPAPER","Init timeout");
86
+ ESP_RETURN_ON_ERROR(send_command(0x04),"EPAPER","Power on failed");
87
+ ESP_RETURN_ON_ERROR(wait_ready(),"EPAPER","Power on timeout");
88
+ ESP_RETURN_ON_ERROR(send_command(0x10),"EPAPER","Frame command failed");
89
+ for(int i=0;i<FC3_FRAME_CHUNKS;++i) ESP_RETURN_ON_ERROR(send_data(frame->chunks[i],FC3_FRAME_CHUNK_BYTES),"EPAPER","Frame transfer failed");
90
+ const uint8_t zero=0;
91
+ ESP_RETURN_ON_ERROR(command_data(0x12,&zero,1),"EPAPER","Refresh failed");
92
+ pause_ms(10);
93
+ return ESP_OK;
94
+ }
95
+
96
+ esp_err_t badge_epaper_finish(void)
97
+ {
98
+ const uint8_t zero=0,a5=0xa5;
99
+ ESP_RETURN_ON_ERROR(wait_ready(),"EPAPER","Refresh timeout");
100
+ ESP_RETURN_ON_ERROR(command_data(0x02,&zero,1),"EPAPER","Power off failed");
101
+ ESP_RETURN_ON_ERROR(wait_ready(),"EPAPER","Power off timeout");
102
+ return command_data(0x07,&a5,1);
103
+ }
source/firmware/main/epaper.h ADDED
@@ -0,0 +1,11 @@
 
 
 
 
 
 
 
 
 
 
 
 
1
+ #ifndef FC3_EPAPER_H
2
+ #define FC3_EPAPER_H
3
+ #include <stdbool.h>
4
+ #include "esp_err.h"
5
+ #include "render.h"
6
+ esp_err_t badge_epaper_setup(void);
7
+ /* Start copies the whole framebuffer into the controller before returning. */
8
+ esp_err_t badge_epaper_start(const FC3Frame *frame);
9
+ bool badge_epaper_ready(void);
10
+ esp_err_t badge_epaper_finish(void);
11
+ #endif
source/firmware/partitions.csv ADDED
@@ -0,0 +1,5 @@
 
 
 
 
 
 
1
+ # Name, Type, SubType, Offset, Size, Flags
2
+ nvs, data, nvs, 0x9000, 0x6000,
3
+ phy_init, data, phy, 0xf000, 0x1000,
4
+ factory, app, factory, 0x10000, 0x60000,
5
+ model, data, 0x40, 0x70000, 0x390000,
source/firmware/sdkconfig ADDED
@@ -0,0 +1,1278 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ #
2
+ # Automatically generated file. DO NOT EDIT.
3
+ # Espressif IoT Development Framework (ESP-IDF) 5.5.1 Project Configuration
4
+ #
5
+ CONFIG_SOC_ADC_SUPPORTED=y
6
+ CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y
7
+ CONFIG_SOC_UART_SUPPORTED=y
8
+ CONFIG_SOC_GDMA_SUPPORTED=y
9
+ CONFIG_SOC_UHCI_SUPPORTED=y
10
+ CONFIG_SOC_AHB_GDMA_SUPPORTED=y
11
+ CONFIG_SOC_GPTIMER_SUPPORTED=y
12
+ CONFIG_SOC_TWAI_SUPPORTED=y
13
+ CONFIG_SOC_BT_SUPPORTED=y
14
+ CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y
15
+ CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y
16
+ CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y
17
+ CONFIG_SOC_XT_WDT_SUPPORTED=y
18
+ CONFIG_SOC_PHY_SUPPORTED=y
19
+ CONFIG_SOC_WIFI_SUPPORTED=y
20
+ CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y
21
+ CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y
22
+ CONFIG_SOC_EFUSE_HAS_EFUSE_RST_BUG=y
23
+ CONFIG_SOC_EFUSE_SUPPORTED=y
24
+ CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y
25
+ CONFIG_SOC_RTC_MEM_SUPPORTED=y
26
+ CONFIG_SOC_I2S_SUPPORTED=y
27
+ CONFIG_SOC_RMT_SUPPORTED=y
28
+ CONFIG_SOC_SDM_SUPPORTED=y
29
+ CONFIG_SOC_GPSPI_SUPPORTED=y
30
+ CONFIG_SOC_LEDC_SUPPORTED=y
31
+ CONFIG_SOC_I2C_SUPPORTED=y
32
+ CONFIG_SOC_SYSTIMER_SUPPORTED=y
33
+ CONFIG_SOC_SUPPORT_COEXISTENCE=y
34
+ CONFIG_SOC_AES_SUPPORTED=y
35
+ CONFIG_SOC_MPI_SUPPORTED=y
36
+ CONFIG_SOC_SHA_SUPPORTED=y
37
+ CONFIG_SOC_HMAC_SUPPORTED=y
38
+ CONFIG_SOC_DIG_SIGN_SUPPORTED=y
39
+ CONFIG_SOC_FLASH_ENC_SUPPORTED=y
40
+ CONFIG_SOC_SECURE_BOOT_SUPPORTED=y
41
+ CONFIG_SOC_MEMPROT_SUPPORTED=y
42
+ CONFIG_SOC_BOD_SUPPORTED=y
43
+ CONFIG_SOC_CLK_TREE_SUPPORTED=y
44
+ CONFIG_SOC_ASSIST_DEBUG_SUPPORTED=y
45
+ CONFIG_SOC_WDT_SUPPORTED=y
46
+ CONFIG_SOC_SPI_FLASH_SUPPORTED=y
47
+ CONFIG_SOC_RNG_SUPPORTED=y
48
+ CONFIG_SOC_LIGHT_SLEEP_SUPPORTED=y
49
+ CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y
50
+ CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT=y
51
+ CONFIG_SOC_PM_SUPPORTED=y
52
+ CONFIG_SOC_XTAL_SUPPORT_40M=y
53
+ CONFIG_SOC_AES_SUPPORT_DMA=y
54
+ CONFIG_SOC_AES_GDMA=y
55
+ CONFIG_SOC_AES_SUPPORT_AES_128=y
56
+ CONFIG_SOC_AES_SUPPORT_AES_256=y
57
+ CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y
58
+ CONFIG_SOC_ADC_ARBITER_SUPPORTED=y
59
+ CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED=y
60
+ CONFIG_SOC_ADC_MONITOR_SUPPORTED=y
61
+ CONFIG_SOC_ADC_DMA_SUPPORTED=y
62
+ CONFIG_SOC_ADC_PERIPH_NUM=2
63
+ CONFIG_SOC_ADC_MAX_CHANNEL_NUM=5
64
+ CONFIG_SOC_ADC_ATTEN_NUM=4
65
+ CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=1
66
+ CONFIG_SOC_ADC_PATT_LEN_MAX=8
67
+ CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12
68
+ CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12
69
+ CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4
70
+ CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4
71
+ CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM=2
72
+ CONFIG_SOC_ADC_DIGI_MONITOR_NUM=2
73
+ CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=83333
74
+ CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=611
75
+ CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=12
76
+ CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12
77
+ CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED=y
78
+ CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED=y
79
+ CONFIG_SOC_ADC_SHARED_POWER=y
80
+ CONFIG_SOC_APB_BACKUP_DMA=y
81
+ CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y
82
+ CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y
83
+ CONFIG_SOC_CACHE_FREEZE_SUPPORTED=y
84
+ CONFIG_SOC_CACHE_MEMORY_IBANK_SIZE=0x4000
85
+ CONFIG_SOC_CPU_CORES_NUM=1
86
+ CONFIG_SOC_CPU_INTR_NUM=32
87
+ CONFIG_SOC_CPU_HAS_FLEXIBLE_INTC=y
88
+ CONFIG_SOC_CPU_HAS_CSR_PC=y
89
+ CONFIG_SOC_CPU_BREAKPOINTS_NUM=8
90
+ CONFIG_SOC_CPU_WATCHPOINTS_NUM=8
91
+ CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x80000000
92
+ CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=3072
93
+ CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16
94
+ CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100
95
+ CONFIG_SOC_AHB_GDMA_VERSION=1
96
+ CONFIG_SOC_GDMA_NUM_GROUPS_MAX=1
97
+ CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=3
98
+ CONFIG_SOC_GPIO_PORT=1
99
+ CONFIG_SOC_GPIO_PIN_COUNT=22
100
+ CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y
101
+ CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB=y
102
+ CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y
103
+ CONFIG_SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP=y
104
+ CONFIG_SOC_GPIO_IN_RANGE_MAX=21
105
+ CONFIG_SOC_GPIO_OUT_RANGE_MAX=21
106
+ CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK=0
107
+ CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT=6
108
+ CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x00000000003FFFC0
109
+ CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX=y
110
+ CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3
111
+ CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP=y
112
+ CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM=8
113
+ CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM=8
114
+ CONFIG_SOC_DEDIC_PERIPH_ALWAYS_ENABLE=y
115
+ CONFIG_SOC_I2C_NUM=1
116
+ CONFIG_SOC_HP_I2C_NUM=1
117
+ CONFIG_SOC_I2C_FIFO_LEN=32
118
+ CONFIG_SOC_I2C_CMD_REG_NUM=8
119
+ CONFIG_SOC_I2C_SUPPORT_SLAVE=y
120
+ CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS=y
121
+ CONFIG_SOC_I2C_SUPPORT_XTAL=y
122
+ CONFIG_SOC_I2C_SUPPORT_RTC=y
123
+ CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y
124
+ CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y
125
+ CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y
126
+ CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS=y
127
+ CONFIG_SOC_I2S_NUM=1
128
+ CONFIG_SOC_I2S_HW_VERSION_2=y
129
+ CONFIG_SOC_I2S_SUPPORTS_XTAL=y
130
+ CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y
131
+ CONFIG_SOC_I2S_SUPPORTS_PCM=y
132
+ CONFIG_SOC_I2S_SUPPORTS_PDM=y
133
+ CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y
134
+ CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y
135
+ CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y
136
+ CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2
137
+ CONFIG_SOC_I2S_PDM_MAX_RX_LINES=1
138
+ CONFIG_SOC_I2S_SUPPORTS_TDM=y
139
+ CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y
140
+ CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y
141
+ CONFIG_SOC_LEDC_TIMER_NUM=4
142
+ CONFIG_SOC_LEDC_CHANNEL_NUM=6
143
+ CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=14
144
+ CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y
145
+ CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=1
146
+ CONFIG_SOC_MMU_PERIPH_NUM=1
147
+ CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000
148
+ CONFIG_SOC_MPU_REGIONS_MAX_NUM=8
149
+ CONFIG_SOC_RMT_GROUPS=1
150
+ CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=2
151
+ CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=2
152
+ CONFIG_SOC_RMT_CHANNELS_PER_GROUP=4
153
+ CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48
154
+ CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y
155
+ CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y
156
+ CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y
157
+ CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y
158
+ CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y
159
+ CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY=y
160
+ CONFIG_SOC_RMT_SUPPORT_XTAL=y
161
+ CONFIG_SOC_RMT_SUPPORT_APB=y
162
+ CONFIG_SOC_RMT_SUPPORT_RC_FAST=y
163
+ CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH=128
164
+ CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM=108
165
+ CONFIG_SOC_SLEEP_SYSTIMER_STALL_WORKAROUND=y
166
+ CONFIG_SOC_SLEEP_TGWDT_STOP_WORKAROUND=y
167
+ CONFIG_SOC_RTCIO_PIN_COUNT=0
168
+ CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4
169
+ CONFIG_SOC_MPI_OPERATIONS_NUM=3
170
+ CONFIG_SOC_RSA_MAX_BIT_LEN=3072
171
+ CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968
172
+ CONFIG_SOC_SHA_SUPPORT_DMA=y
173
+ CONFIG_SOC_SHA_SUPPORT_RESUME=y
174
+ CONFIG_SOC_SHA_GDMA=y
175
+ CONFIG_SOC_SHA_SUPPORT_SHA1=y
176
+ CONFIG_SOC_SHA_SUPPORT_SHA224=y
177
+ CONFIG_SOC_SHA_SUPPORT_SHA256=y
178
+ CONFIG_SOC_SDM_GROUPS=1
179
+ CONFIG_SOC_SDM_CHANNELS_PER_GROUP=4
180
+ CONFIG_SOC_SDM_CLK_SUPPORT_APB=y
181
+ CONFIG_SOC_SPI_PERIPH_NUM=2
182
+ CONFIG_SOC_SPI_MAX_CS_NUM=6
183
+ CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64
184
+ CONFIG_SOC_SPI_SUPPORT_DDRCLK=y
185
+ CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS=y
186
+ CONFIG_SOC_SPI_SUPPORT_CD_SIG=y
187
+ CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS=y
188
+ CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2=y
189
+ CONFIG_SOC_SPI_SUPPORT_CLK_APB=y
190
+ CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y
191
+ CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y
192
+ CONFIG_SOC_SPI_SCT_SUPPORTED=y
193
+ CONFIG_SOC_SPI_SCT_REG_NUM=14
194
+ CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX=y
195
+ CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX=0x3FFFA
196
+ CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y
197
+ CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16
198
+ CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y
199
+ CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y
200
+ CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y
201
+ CONFIG_SOC_SPI_MEM_SUPPORT_IDLE_INTR=y
202
+ CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y
203
+ CONFIG_SOC_SPI_MEM_SUPPORT_CHECK_SUS=y
204
+ CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y
205
+ CONFIG_SOC_SPI_MEM_SUPPORT_WRAP=y
206
+ CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y
207
+ CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y
208
+ CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y
209
+ CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y
210
+ CONFIG_SOC_SYSTIMER_COUNTER_NUM=2
211
+ CONFIG_SOC_SYSTIMER_ALARM_NUM=3
212
+ CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32
213
+ CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI=20
214
+ CONFIG_SOC_SYSTIMER_FIXED_DIVIDER=y
215
+ CONFIG_SOC_SYSTIMER_INT_LEVEL=y
216
+ CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y
217
+ CONFIG_SOC_TIMER_GROUPS=2
218
+ CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=1
219
+ CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=54
220
+ CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL=y
221
+ CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y
222
+ CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=2
223
+ CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32
224
+ CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16
225
+ CONFIG_SOC_MWDT_SUPPORT_XTAL=y
226
+ CONFIG_SOC_TWAI_CONTROLLER_NUM=1
227
+ CONFIG_SOC_TWAI_MASK_FILTER_NUM=1
228
+ CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y
229
+ CONFIG_SOC_TWAI_BRP_MIN=2
230
+ CONFIG_SOC_TWAI_BRP_MAX=16384
231
+ CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS=y
232
+ CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE=y
233
+ CONFIG_SOC_EFUSE_DIS_PAD_JTAG=y
234
+ CONFIG_SOC_EFUSE_DIS_USB_JTAG=y
235
+ CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y
236
+ CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y
237
+ CONFIG_SOC_EFUSE_DIS_ICACHE=y
238
+ CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK=y
239
+ CONFIG_SOC_SECURE_BOOT_V2_RSA=y
240
+ CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3
241
+ CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y
242
+ CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y
243
+ CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32
244
+ CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y
245
+ CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y
246
+ CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE=16
247
+ CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE=512
248
+ CONFIG_SOC_UART_NUM=2
249
+ CONFIG_SOC_UART_HP_NUM=2
250
+ CONFIG_SOC_UART_FIFO_LEN=128
251
+ CONFIG_SOC_UART_BITRATE_MAX=5000000
252
+ CONFIG_SOC_UART_SUPPORT_APB_CLK=y
253
+ CONFIG_SOC_UART_SUPPORT_RTC_CLK=y
254
+ CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y
255
+ CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y
256
+ CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND=y
257
+ CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y
258
+ CONFIG_SOC_UHCI_NUM=1
259
+ CONFIG_SOC_COEX_HW_PTI=y
260
+ CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21
261
+ CONFIG_SOC_MAC_BB_PD_MEM_SIZE=192
262
+ CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12
263
+ CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y
264
+ CONFIG_SOC_PM_SUPPORT_BT_WAKEUP=y
265
+ CONFIG_SOC_PM_SUPPORT_CPU_PD=y
266
+ CONFIG_SOC_PM_SUPPORT_WIFI_PD=y
267
+ CONFIG_SOC_PM_SUPPORT_BT_PD=y
268
+ CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y
269
+ CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y
270
+ CONFIG_SOC_PM_SUPPORT_MAC_BB_PD=y
271
+ CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL=y
272
+ CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA=y
273
+ CONFIG_SOC_PM_MODEM_PD_BY_SW=y
274
+ CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y
275
+ CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y
276
+ CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y
277
+ CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y
278
+ CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2=y
279
+ CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC=y
280
+ CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL=y
281
+ CONFIG_SOC_WIFI_HW_TSF=y
282
+ CONFIG_SOC_WIFI_FTM_SUPPORT=y
283
+ CONFIG_SOC_WIFI_GCMP_SUPPORT=y
284
+ CONFIG_SOC_WIFI_WAPI_SUPPORT=y
285
+ CONFIG_SOC_WIFI_CSI_SUPPORT=y
286
+ CONFIG_SOC_WIFI_MESH_SUPPORT=y
287
+ CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y
288
+ CONFIG_SOC_WIFI_PHY_NEEDS_USB_WORKAROUND=y
289
+ CONFIG_SOC_BLE_SUPPORTED=y
290
+ CONFIG_SOC_BLE_MESH_SUPPORTED=y
291
+ CONFIG_SOC_BLE_50_SUPPORTED=y
292
+ CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED=y
293
+ CONFIG_SOC_BLUFI_SUPPORTED=y
294
+ CONFIG_SOC_PHY_COMBO_MODULE=y
295
+ CONFIG_IDF_CMAKE=y
296
+ CONFIG_IDF_TOOLCHAIN="gcc"
297
+ CONFIG_IDF_TOOLCHAIN_GCC=y
298
+ CONFIG_IDF_TARGET_ARCH_RISCV=y
299
+ CONFIG_IDF_TARGET_ARCH="riscv"
300
+ CONFIG_IDF_TARGET="esp32c3"
301
+ CONFIG_IDF_INIT_VERSION="5.5.1"
302
+ CONFIG_IDF_TARGET_ESP32C3=y
303
+ CONFIG_IDF_FIRMWARE_CHIP_ID=0x0005
304
+
305
+ #
306
+ # Build type
307
+ #
308
+ CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
309
+ # CONFIG_APP_BUILD_TYPE_RAM is not set
310
+ CONFIG_APP_BUILD_GENERATE_BINARIES=y
311
+ CONFIG_APP_BUILD_BOOTLOADER=y
312
+ CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
313
+ CONFIG_APP_REPRODUCIBLE_BUILD=y
314
+ # CONFIG_APP_NO_BLOBS is not set
315
+ # end of Build type
316
+
317
+ #
318
+ # Bootloader config
319
+ #
320
+
321
+ #
322
+ # Bootloader manager
323
+ #
324
+ CONFIG_BOOTLOADER_PROJECT_VER=1
325
+ # end of Bootloader manager
326
+
327
+ #
328
+ # Application Rollback
329
+ #
330
+ # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set
331
+ # end of Application Rollback
332
+
333
+ #
334
+ # Recovery Bootloader and Rollback
335
+ #
336
+ # end of Recovery Bootloader and Rollback
337
+
338
+ CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0
339
+ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
340
+ # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set
341
+ # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
342
+ # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
343
+
344
+ #
345
+ # Log
346
+ #
347
+ CONFIG_BOOTLOADER_LOG_VERSION_1=y
348
+ CONFIG_BOOTLOADER_LOG_VERSION=1
349
+ # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
350
+ # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
351
+ # CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
352
+ CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
353
+ # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
354
+ # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
355
+ CONFIG_BOOTLOADER_LOG_LEVEL=3
356
+
357
+ #
358
+ # Format
359
+ #
360
+ # CONFIG_BOOTLOADER_LOG_COLORS is not set
361
+ CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS=y
362
+ # end of Format
363
+
364
+ #
365
+ # Settings
366
+ #
367
+ CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN=y
368
+ CONFIG_BOOTLOADER_LOG_MODE_TEXT=y
369
+ # end of Settings
370
+ # end of Log
371
+
372
+ #
373
+ # Serial Flash Configurations
374
+ #
375
+ # CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set
376
+ CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
377
+ # end of Serial Flash Configurations
378
+
379
+ # CONFIG_BOOTLOADER_FACTORY_RESET is not set
380
+ # CONFIG_BOOTLOADER_APP_TEST is not set
381
+ CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y
382
+ CONFIG_BOOTLOADER_WDT_ENABLE=y
383
+ # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set
384
+ CONFIG_BOOTLOADER_WDT_TIME_MS=9000
385
+ # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set
386
+ # CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set
387
+ # CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set
388
+ CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
389
+ # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
390
+ # end of Bootloader config
391
+
392
+ #
393
+ # Security features
394
+ #
395
+ CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED=y
396
+ CONFIG_SECURE_BOOT_V2_PREFERRED=y
397
+ # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
398
+ # CONFIG_SECURE_BOOT is not set
399
+ # CONFIG_SECURE_FLASH_ENC_ENABLED is not set
400
+ CONFIG_SECURE_ROM_DL_MODE_ENABLED=y
401
+ # end of Security features
402
+
403
+ #
404
+ # Application manager
405
+ #
406
+ # CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
407
+ # CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
408
+ # CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
409
+ CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9
410
+ # end of Application manager
411
+
412
+ CONFIG_ESP_ROM_HAS_CRC_LE=y
413
+ CONFIG_ESP_ROM_HAS_CRC_BE=y
414
+ CONFIG_ESP_ROM_HAS_MZ_CRC32=y
415
+ CONFIG_ESP_ROM_HAS_JPEG_DECODE=y
416
+ CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y
417
+ CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=3
418
+ CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y
419
+ CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG=y
420
+ CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV=y
421
+ CONFIG_ESP_ROM_GET_CLK_FREQ=y
422
+ CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y
423
+ CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y
424
+ CONFIG_ESP_ROM_HAS_SPI_FLASH=y
425
+ CONFIG_ESP_ROM_HAS_SPI_FLASH_MMAP=y
426
+ CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG=y
427
+ CONFIG_ESP_ROM_HAS_NEWLIB=y
428
+ CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y
429
+ CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME=y
430
+ CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE=y
431
+ CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT=y
432
+ CONFIG_ESP_ROM_HAS_SW_FLOAT=y
433
+ CONFIG_ESP_ROM_USB_OTG_NUM=-1
434
+ CONFIG_ESP_ROM_HAS_VERSION=y
435
+ CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB=y
436
+ CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY=y
437
+ CONFIG_ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY=y
438
+
439
+ #
440
+ # Boot ROM Behavior
441
+ #
442
+ CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
443
+ # CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set
444
+ # CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set
445
+ # CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set
446
+ # end of Boot ROM Behavior
447
+
448
+ #
449
+ # Serial flasher config
450
+ #
451
+ # CONFIG_ESPTOOLPY_NO_STUB is not set
452
+ # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
453
+ # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
454
+ CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
455
+ # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
456
+ CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y
457
+ CONFIG_ESPTOOLPY_FLASHMODE="dio"
458
+ # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set
459
+ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
460
+ # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
461
+ # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
462
+ CONFIG_ESPTOOLPY_FLASHFREQ="40m"
463
+ # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
464
+ # CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
465
+ CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
466
+ # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
467
+ # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
468
+ # CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set
469
+ # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set
470
+ # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set
471
+ CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
472
+ # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set
473
+ CONFIG_ESPTOOLPY_BEFORE_RESET=y
474
+ # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
475
+ CONFIG_ESPTOOLPY_BEFORE="default_reset"
476
+ CONFIG_ESPTOOLPY_AFTER_RESET=y
477
+ # CONFIG_ESPTOOLPY_AFTER_NORESET is not set
478
+ CONFIG_ESPTOOLPY_AFTER="hard_reset"
479
+ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
480
+ # end of Serial flasher config
481
+
482
+ #
483
+ # Partition Table
484
+ #
485
+ # CONFIG_PARTITION_TABLE_SINGLE_APP is not set
486
+ # CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
487
+ # CONFIG_PARTITION_TABLE_TWO_OTA is not set
488
+ # CONFIG_PARTITION_TABLE_TWO_OTA_LARGE is not set
489
+ CONFIG_PARTITION_TABLE_CUSTOM=y
490
+ CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
491
+ CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
492
+ CONFIG_PARTITION_TABLE_OFFSET=0x8000
493
+ CONFIG_PARTITION_TABLE_MD5=y
494
+ # end of Partition Table
495
+
496
+ #
497
+ # Compiler options
498
+ #
499
+ # CONFIG_COMPILER_OPTIMIZATION_DEBUG is not set
500
+ # CONFIG_COMPILER_OPTIMIZATION_SIZE is not set
501
+ CONFIG_COMPILER_OPTIMIZATION_PERF=y
502
+ # CONFIG_COMPILER_OPTIMIZATION_NONE is not set
503
+ CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y
504
+ # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set
505
+ # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set
506
+ CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE=y
507
+ CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y
508
+ CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2
509
+ # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set
510
+ CONFIG_COMPILER_HIDE_PATHS_MACROS=y
511
+ # CONFIG_COMPILER_CXX_EXCEPTIONS is not set
512
+ # CONFIG_COMPILER_CXX_RTTI is not set
513
+ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
514
+ # CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set
515
+ # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
516
+ # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
517
+ # CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set
518
+ # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
519
+ # CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set
520
+ CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS=y
521
+ # CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set
522
+ # CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set
523
+ # CONFIG_COMPILER_DISABLE_GCC14_WARNINGS is not set
524
+ # CONFIG_COMPILER_DUMP_RTL_FILES is not set
525
+ CONFIG_COMPILER_RT_LIB_GCCLIB=y
526
+ CONFIG_COMPILER_RT_LIB_NAME="gcc"
527
+ CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING=y
528
+ # CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE is not set
529
+ # CONFIG_COMPILER_STATIC_ANALYZER is not set
530
+ # end of Compiler options
531
+
532
+ #
533
+ # Component config
534
+ #
535
+
536
+ #
537
+ # eFuse Bit Manager
538
+ #
539
+ # CONFIG_EFUSE_CUSTOM_TABLE is not set
540
+ # CONFIG_EFUSE_VIRTUAL is not set
541
+ CONFIG_EFUSE_MAX_BLK_LEN=256
542
+ # end of eFuse Bit Manager
543
+
544
+ #
545
+ # Common ESP-related
546
+ #
547
+ CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
548
+ # end of Common ESP-related
549
+
550
+ #
551
+ # ESP-Driver:GPIO Configurations
552
+ #
553
+ # CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set
554
+ # end of ESP-Driver:GPIO Configurations
555
+
556
+ #
557
+ # ESP-Driver:SPI Configurations
558
+ #
559
+ # CONFIG_SPI_MASTER_IN_IRAM is not set
560
+ CONFIG_SPI_MASTER_ISR_IN_IRAM=y
561
+ # CONFIG_SPI_SLAVE_IN_IRAM is not set
562
+ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
563
+ # end of ESP-Driver:SPI Configurations
564
+
565
+ #
566
+ # Hardware Settings
567
+ #
568
+
569
+ #
570
+ # Chip revision
571
+ #
572
+ # CONFIG_ESP32C3_REV_MIN_0 is not set
573
+ # CONFIG_ESP32C3_REV_MIN_1 is not set
574
+ # CONFIG_ESP32C3_REV_MIN_2 is not set
575
+ CONFIG_ESP32C3_REV_MIN_3=y
576
+ # CONFIG_ESP32C3_REV_MIN_4 is not set
577
+ # CONFIG_ESP32C3_REV_MIN_101 is not set
578
+ CONFIG_ESP32C3_REV_MIN_FULL=3
579
+ CONFIG_ESP_REV_MIN_FULL=3
580
+
581
+ #
582
+ # Maximum Supported ESP32-C3 Revision (Rev v1.99)
583
+ #
584
+ CONFIG_ESP32C3_REV_MAX_FULL=199
585
+ CONFIG_ESP_REV_MAX_FULL=199
586
+ CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0
587
+ CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199
588
+
589
+ #
590
+ # Maximum Supported ESP32-C3 eFuse Block Revision (eFuse Block Rev v1.99)
591
+ #
592
+ # end of Chip revision
593
+
594
+ #
595
+ # MAC Config
596
+ #
597
+ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
598
+ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
599
+ CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
600
+ CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
601
+ CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y
602
+ CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=4
603
+ # CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO is not set
604
+ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR=y
605
+ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=4
606
+ # CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set
607
+ # end of MAC Config
608
+
609
+ #
610
+ # Sleep Config
611
+ #
612
+ # CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set
613
+ CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y
614
+ # CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set
615
+ CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
616
+ CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=0
617
+ # CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set
618
+ # CONFIG_ESP_SLEEP_DEBUG is not set
619
+ CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y
620
+ # end of Sleep Config
621
+
622
+ #
623
+ # RTC Clock Config
624
+ #
625
+ CONFIG_RTC_CLK_SRC_INT_RC=y
626
+ # CONFIG_RTC_CLK_SRC_EXT_CRYS is not set
627
+ # CONFIG_RTC_CLK_SRC_EXT_OSC is not set
628
+ # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set
629
+ CONFIG_RTC_CLK_CAL_CYCLES=1024
630
+ # end of RTC Clock Config
631
+
632
+ #
633
+ # Peripheral Control
634
+ #
635
+ CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM=y
636
+ CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM=y
637
+ # end of Peripheral Control
638
+
639
+ #
640
+ # GDMA Configurations
641
+ #
642
+ CONFIG_GDMA_CTRL_FUNC_IN_IRAM=y
643
+ CONFIG_GDMA_ISR_HANDLER_IN_IRAM=y
644
+ CONFIG_GDMA_OBJ_DRAM_SAFE=y
645
+ # CONFIG_GDMA_ENABLE_DEBUG_LOG is not set
646
+ # CONFIG_GDMA_ISR_IRAM_SAFE is not set
647
+ # end of GDMA Configurations
648
+
649
+ #
650
+ # Main XTAL Config
651
+ #
652
+ CONFIG_XTAL_FREQ_40=y
653
+ CONFIG_XTAL_FREQ=40
654
+ # end of Main XTAL Config
655
+
656
+ #
657
+ # Power Supplier
658
+ #
659
+
660
+ #
661
+ # Brownout Detector
662
+ #
663
+ CONFIG_ESP_BROWNOUT_DET=y
664
+ CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7=y
665
+ # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set
666
+ # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set
667
+ # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set
668
+ # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set
669
+ # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set
670
+ CONFIG_ESP_BROWNOUT_DET_LVL=7
671
+ CONFIG_ESP_BROWNOUT_USE_INTR=y
672
+ # end of Brownout Detector
673
+ # end of Power Supplier
674
+
675
+ CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y
676
+ CONFIG_ESP_INTR_IN_IRAM=y
677
+ # end of Hardware Settings
678
+
679
+ #
680
+ # ESP-MM: Memory Management Configurations
681
+ #
682
+ # end of ESP-MM: Memory Management Configurations
683
+
684
+ #
685
+ # Partition API Configuration
686
+ #
687
+ # end of Partition API Configuration
688
+
689
+ #
690
+ # Power Management
691
+ #
692
+ CONFIG_PM_SLEEP_FUNC_IN_IRAM=y
693
+ # CONFIG_PM_ENABLE is not set
694
+ CONFIG_PM_SLP_IRAM_OPT=y
695
+ CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
696
+ # end of Power Management
697
+
698
+ #
699
+ # ESP-ROM
700
+ #
701
+ CONFIG_ESP_ROM_PRINT_IN_IRAM=y
702
+ # end of ESP-ROM
703
+
704
+ #
705
+ # ESP Security Specific
706
+ #
707
+ # end of ESP Security Specific
708
+
709
+ #
710
+ # ESP System Settings
711
+ #
712
+ # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
713
+ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
714
+ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
715
+ CONFIG_ESP_SYSTEM_IN_IRAM=y
716
+ # CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
717
+ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
718
+ # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
719
+ CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0
720
+ CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y
721
+ CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
722
+ CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
723
+ CONFIG_ESP_SYSTEM_NO_BACKTRACE=y
724
+ # CONFIG_ESP_SYSTEM_USE_EH_FRAME is not set
725
+ # CONFIG_ESP_SYSTEM_USE_FRAME_POINTER is not set
726
+
727
+ #
728
+ # Memory protection
729
+ #
730
+ CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y
731
+ CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK=y
732
+ # end of Memory protection
733
+
734
+ CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
735
+ CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
736
+ CONFIG_ESP_MAIN_TASK_STACK_SIZE=12288
737
+ CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
738
+ # CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
739
+ CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
740
+ CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
741
+ # CONFIG_ESP_CONSOLE_UART_DEFAULT is not set
742
+ CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y
743
+ # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
744
+ # CONFIG_ESP_CONSOLE_NONE is not set
745
+ CONFIG_ESP_CONSOLE_SECONDARY_NONE=y
746
+ CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED=y
747
+ CONFIG_ESP_CONSOLE_UART_NUM=-1
748
+ CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=3
749
+ CONFIG_ESP_INT_WDT=y
750
+ CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
751
+ CONFIG_ESP_TASK_WDT_EN=y
752
+ CONFIG_ESP_TASK_WDT_INIT=y
753
+ # CONFIG_ESP_TASK_WDT_PANIC is not set
754
+ CONFIG_ESP_TASK_WDT_TIMEOUT_S=30
755
+ CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
756
+ # CONFIG_ESP_PANIC_HANDLER_IRAM is not set
757
+ # CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
758
+ CONFIG_ESP_DEBUG_OCDAWARE=y
759
+ CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
760
+ CONFIG_ESP_SYSTEM_HW_STACK_GUARD=y
761
+ CONFIG_ESP_SYSTEM_HW_PC_RECORD=y
762
+ # end of ESP System Settings
763
+
764
+ #
765
+ # IPC (Inter-Processor Call)
766
+ #
767
+ CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
768
+ # end of IPC (Inter-Processor Call)
769
+
770
+ #
771
+ # ESP Timer (High Resolution Timer)
772
+ #
773
+ CONFIG_ESP_TIMER_IN_IRAM=y
774
+ # CONFIG_ESP_TIMER_PROFILING is not set
775
+ CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y
776
+ CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y
777
+ CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584
778
+ CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1
779
+ # CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set
780
+ CONFIG_ESP_TIMER_TASK_AFFINITY=0x0
781
+ CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y
782
+ CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y
783
+ # CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set
784
+ CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
785
+ # end of ESP Timer (High Resolution Timer)
786
+
787
+ #
788
+ # FreeRTOS
789
+ #
790
+
791
+ #
792
+ # Kernel
793
+ #
794
+ # CONFIG_FREERTOS_SMP is not set
795
+ CONFIG_FREERTOS_UNICORE=y
796
+ CONFIG_FREERTOS_HZ=100
797
+ CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
798
+ # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
799
+ # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
800
+ CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
801
+ CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
802
+ CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
803
+ # CONFIG_FREERTOS_USE_IDLE_HOOK is not set
804
+ # CONFIG_FREERTOS_USE_TICK_HOOK is not set
805
+ CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
806
+ # CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set
807
+ CONFIG_FREERTOS_USE_TIMERS=y
808
+ CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc"
809
+ # CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set
810
+ CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y
811
+ CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF
812
+ CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
813
+ CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048
814
+ CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10
815
+ CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
816
+ CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1
817
+ # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set
818
+ # CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES is not set
819
+ # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
820
+ # CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG is not set
821
+ # end of Kernel
822
+
823
+ #
824
+ # Port
825
+ #
826
+ # CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set
827
+ CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y
828
+ # CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set
829
+ # CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set
830
+ CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
831
+ CONFIG_FREERTOS_ISR_STACKSIZE=1536
832
+ CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
833
+ CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y
834
+ CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
835
+ # CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
836
+ CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y
837
+ # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
838
+ # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
839
+ # end of Port
840
+
841
+ #
842
+ # Extra
843
+ #
844
+ # end of Extra
845
+
846
+ CONFIG_FREERTOS_PORT=y
847
+ CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
848
+ CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
849
+ CONFIG_FREERTOS_DEBUG_OCDAWARE=y
850
+ CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
851
+ CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y
852
+ CONFIG_FREERTOS_NUMBER_OF_CORES=1
853
+ CONFIG_FREERTOS_IN_IRAM=y
854
+ # end of FreeRTOS
855
+
856
+ #
857
+ # Hardware Abstraction Layer (HAL) and Low Level (LL)
858
+ #
859
+ CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
860
+ # CONFIG_HAL_ASSERTION_DISABLE is not set
861
+ # CONFIG_HAL_ASSERTION_SILENT is not set
862
+ # CONFIG_HAL_ASSERTION_ENABLE is not set
863
+ CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2
864
+ # end of Hardware Abstraction Layer (HAL) and Low Level (LL)
865
+
866
+ #
867
+ # Heap memory debugging
868
+ #
869
+ CONFIG_HEAP_POISONING_DISABLED=y
870
+ # CONFIG_HEAP_POISONING_LIGHT is not set
871
+ # CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
872
+ CONFIG_HEAP_TRACING_OFF=y
873
+ # CONFIG_HEAP_TRACING_STANDALONE is not set
874
+ # CONFIG_HEAP_TRACING_TOHOST is not set
875
+ # CONFIG_HEAP_USE_HOOKS is not set
876
+ # CONFIG_HEAP_TASK_TRACKING is not set
877
+ # CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
878
+ # CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set
879
+ # end of Heap memory debugging
880
+
881
+ #
882
+ # Log
883
+ #
884
+ CONFIG_LOG_VERSION_1=y
885
+ # CONFIG_LOG_VERSION_2 is not set
886
+ CONFIG_LOG_VERSION=1
887
+
888
+ #
889
+ # Log Level
890
+ #
891
+ # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
892
+ # CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set
893
+ # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
894
+ CONFIG_LOG_DEFAULT_LEVEL_INFO=y
895
+ # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
896
+ # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
897
+ CONFIG_LOG_DEFAULT_LEVEL=3
898
+ CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
899
+ # CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set
900
+ # CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set
901
+ CONFIG_LOG_MAXIMUM_LEVEL=3
902
+
903
+ #
904
+ # Level Settings
905
+ #
906
+ # CONFIG_LOG_MASTER_LEVEL is not set
907
+ CONFIG_LOG_DYNAMIC_LEVEL_CONTROL=y
908
+ # CONFIG_LOG_TAG_LEVEL_IMPL_NONE is not set
909
+ # CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST is not set
910
+ CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST=y
911
+ # CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY is not set
912
+ CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP=y
913
+ CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE=31
914
+ # end of Level Settings
915
+ # end of Log Level
916
+
917
+ #
918
+ # Format
919
+ #
920
+ # CONFIG_LOG_COLORS is not set
921
+ CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
922
+ # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
923
+ # end of Format
924
+
925
+ #
926
+ # Settings
927
+ #
928
+ CONFIG_LOG_MODE_TEXT_EN=y
929
+ CONFIG_LOG_MODE_TEXT=y
930
+ # end of Settings
931
+
932
+ CONFIG_LOG_IN_IRAM=y
933
+ # end of Log
934
+
935
+ #
936
+ # mbedTLS
937
+ #
938
+ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
939
+ # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
940
+ # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
941
+ CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
942
+ CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
943
+ CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
944
+ # CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
945
+ # CONFIG_MBEDTLS_DEBUG is not set
946
+
947
+ #
948
+ # mbedTLS v3.x related
949
+ #
950
+ # CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set
951
+ # CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
952
+ # CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
953
+ # CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
954
+ CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
955
+ # CONFIG_MBEDTLS_SSL_KEYING_MATERIAL_EXPORT is not set
956
+ CONFIG_MBEDTLS_PKCS7_C=y
957
+ # end of mbedTLS v3.x related
958
+
959
+ #
960
+ # Certificate Bundle
961
+ #
962
+ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
963
+ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
964
+ # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
965
+ # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set
966
+ # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
967
+ # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEPRECATED_LIST is not set
968
+ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200
969
+ # end of Certificate Bundle
970
+
971
+ # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
972
+ # CONFIG_MBEDTLS_CMAC_C is not set
973
+ CONFIG_MBEDTLS_HARDWARE_AES=y
974
+ CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
975
+ CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0
976
+ CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y
977
+ CONFIG_MBEDTLS_HARDWARE_MPI=y
978
+ CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI=y
979
+ CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y
980
+ CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0
981
+ CONFIG_MBEDTLS_HARDWARE_SHA=y
982
+ CONFIG_MBEDTLS_ROM_MD5=y
983
+ # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
984
+ # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
985
+ CONFIG_MBEDTLS_HAVE_TIME=y
986
+ # CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set
987
+ # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
988
+ CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y
989
+ CONFIG_MBEDTLS_SHA1_C=y
990
+ CONFIG_MBEDTLS_SHA512_C=y
991
+ # CONFIG_MBEDTLS_SHA3_C is not set
992
+ CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
993
+ # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set
994
+ # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set
995
+ # CONFIG_MBEDTLS_TLS_DISABLED is not set
996
+ CONFIG_MBEDTLS_TLS_SERVER=y
997
+ CONFIG_MBEDTLS_TLS_CLIENT=y
998
+ CONFIG_MBEDTLS_TLS_ENABLED=y
999
+
1000
+ #
1001
+ # TLS Key Exchange Methods
1002
+ #
1003
+ # CONFIG_MBEDTLS_PSK_MODES is not set
1004
+ CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
1005
+ CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
1006
+ CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
1007
+ CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
1008
+ CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y
1009
+ CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
1010
+ # end of TLS Key Exchange Methods
1011
+
1012
+ CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
1013
+ CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
1014
+ # CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set
1015
+ # CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set
1016
+ CONFIG_MBEDTLS_SSL_ALPN=y
1017
+ CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
1018
+ CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
1019
+
1020
+ #
1021
+ # Symmetric Ciphers
1022
+ #
1023
+ CONFIG_MBEDTLS_AES_C=y
1024
+ # CONFIG_MBEDTLS_CAMELLIA_C is not set
1025
+ # CONFIG_MBEDTLS_DES_C is not set
1026
+ # CONFIG_MBEDTLS_BLOWFISH_C is not set
1027
+ # CONFIG_MBEDTLS_XTEA_C is not set
1028
+ CONFIG_MBEDTLS_CCM_C=y
1029
+ CONFIG_MBEDTLS_GCM_C=y
1030
+ # CONFIG_MBEDTLS_NIST_KW_C is not set
1031
+ # end of Symmetric Ciphers
1032
+
1033
+ # CONFIG_MBEDTLS_RIPEMD160_C is not set
1034
+
1035
+ #
1036
+ # Certificates
1037
+ #
1038
+ CONFIG_MBEDTLS_PEM_PARSE_C=y
1039
+ CONFIG_MBEDTLS_PEM_WRITE_C=y
1040
+ CONFIG_MBEDTLS_X509_CRL_PARSE_C=y
1041
+ CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
1042
+ # end of Certificates
1043
+
1044
+ CONFIG_MBEDTLS_ECP_C=y
1045
+ CONFIG_MBEDTLS_PK_PARSE_EC_EXTENDED=y
1046
+ CONFIG_MBEDTLS_PK_PARSE_EC_COMPRESSED=y
1047
+ # CONFIG_MBEDTLS_DHM_C is not set
1048
+ CONFIG_MBEDTLS_ECDH_C=y
1049
+ CONFIG_MBEDTLS_ECDSA_C=y
1050
+ # CONFIG_MBEDTLS_ECJPAKE_C is not set
1051
+ CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y
1052
+ CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y
1053
+ CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
1054
+ CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
1055
+ CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y
1056
+ CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y
1057
+ CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y
1058
+ CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y
1059
+ CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y
1060
+ CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y
1061
+ CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y
1062
+ CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y
1063
+ CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
1064
+ # CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM is not set
1065
+ # CONFIG_MBEDTLS_POLY1305_C is not set
1066
+ # CONFIG_MBEDTLS_CHACHA20_C is not set
1067
+ # CONFIG_MBEDTLS_HKDF_C is not set
1068
+ # CONFIG_MBEDTLS_THREADING_C is not set
1069
+ CONFIG_MBEDTLS_ERROR_STRINGS=y
1070
+ # CONFIG_MBEDTLS_ALLOW_WEAK_CERTIFICATE_VERIFICATION is not set
1071
+ # end of mbedTLS
1072
+
1073
+ #
1074
+ # LibC
1075
+ #
1076
+ CONFIG_LIBC_NEWLIB=y
1077
+ CONFIG_LIBC_MISC_IN_IRAM=y
1078
+ CONFIG_LIBC_LOCKS_PLACE_IN_IRAM=y
1079
+ CONFIG_LIBC_NEWLIB_NANO_FORMAT=y
1080
+ CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y
1081
+ # CONFIG_LIBC_TIME_SYSCALL_USE_RTC is not set
1082
+ # CONFIG_LIBC_TIME_SYSCALL_USE_HRT is not set
1083
+ # CONFIG_LIBC_TIME_SYSCALL_USE_NONE is not set
1084
+ # CONFIG_LIBC_OPTIMIZED_MISALIGNED_ACCESS is not set
1085
+ # end of LibC
1086
+
1087
+ #
1088
+ # PThreads
1089
+ #
1090
+ CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
1091
+ CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
1092
+ CONFIG_PTHREAD_STACK_MIN=768
1093
+ CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
1094
+ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
1095
+ # end of PThreads
1096
+
1097
+ #
1098
+ # MMU Config
1099
+ #
1100
+ CONFIG_MMU_PAGE_SIZE_64KB=y
1101
+ CONFIG_MMU_PAGE_MODE="64KB"
1102
+ CONFIG_MMU_PAGE_SIZE=0x10000
1103
+ # end of MMU Config
1104
+
1105
+ #
1106
+ # Main Flash configuration
1107
+ #
1108
+
1109
+ #
1110
+ # SPI Flash behavior when brownout
1111
+ #
1112
+ CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y
1113
+ CONFIG_SPI_FLASH_BROWNOUT_RESET=y
1114
+ # end of SPI Flash behavior when brownout
1115
+
1116
+ #
1117
+ # Optional and Experimental Features (READ DOCS FIRST)
1118
+ #
1119
+
1120
+ #
1121
+ # Features here require specific hardware (READ DOCS FIRST!)
1122
+ #
1123
+ # CONFIG_SPI_FLASH_AUTO_SUSPEND is not set
1124
+ CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50
1125
+ # CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set
1126
+ # CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set
1127
+ CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y
1128
+ # end of Optional and Experimental Features (READ DOCS FIRST)
1129
+ # end of Main Flash configuration
1130
+
1131
+ #
1132
+ # SPI Flash driver
1133
+ #
1134
+ # CONFIG_SPI_FLASH_VERIFY_WRITE is not set
1135
+ # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
1136
+ CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
1137
+ # CONFIG_SPI_FLASH_ROM_IMPL is not set
1138
+ CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
1139
+ # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set
1140
+ # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set
1141
+ # CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set
1142
+ CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
1143
+ CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20
1144
+ CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
1145
+ CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
1146
+ # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
1147
+ # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set
1148
+ # CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set
1149
+
1150
+ #
1151
+ # Auto-detect flash chips
1152
+ #
1153
+ CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORT_ENABLED=y
1154
+ CONFIG_SPI_FLASH_VENDOR_GD_SUPPORT_ENABLED=y
1155
+ CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORT_ENABLED=y
1156
+ CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORT_ENABLED=y
1157
+ CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORT_ENABLED=y
1158
+ CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORT_ENABLED=y
1159
+ CONFIG_SPI_FLASH_VENDOR_TH_SUPPORT_ENABLED=y
1160
+ CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
1161
+ CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
1162
+ CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
1163
+ CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
1164
+ CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
1165
+ CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
1166
+ # end of Auto-detect flash chips
1167
+
1168
+ CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
1169
+ # end of SPI Flash driver
1170
+ # end of Component config
1171
+
1172
+ # CONFIG_IDF_EXPERIMENTAL_FEATURES is not set
1173
+
1174
+ # Deprecated options for backward compatibility
1175
+ # CONFIG_APP_BUILD_TYPE_ELF_RAM is not set
1176
+ # CONFIG_NO_BLOBS is not set
1177
+ # CONFIG_APP_ROLLBACK_ENABLE is not set
1178
+ # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
1179
+ # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
1180
+ # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
1181
+ CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
1182
+ # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
1183
+ # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
1184
+ CONFIG_LOG_BOOTLOADER_LEVEL=3
1185
+ # CONFIG_FLASH_ENCRYPTION_ENABLED is not set
1186
+ # CONFIG_FLASHMODE_QIO is not set
1187
+ # CONFIG_FLASHMODE_QOUT is not set
1188
+ CONFIG_FLASHMODE_DIO=y
1189
+ # CONFIG_FLASHMODE_DOUT is not set
1190
+ CONFIG_MONITOR_BAUD=115200
1191
+ # CONFIG_OPTIMIZATION_LEVEL_DEBUG is not set
1192
+ # CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set
1193
+ # CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
1194
+ # CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set
1195
+ # CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set
1196
+ CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
1197
+ # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
1198
+ # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
1199
+ CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2
1200
+ # CONFIG_CXX_EXCEPTIONS is not set
1201
+ CONFIG_STACK_CHECK_NONE=y
1202
+ # CONFIG_STACK_CHECK_NORM is not set
1203
+ # CONFIG_STACK_CHECK_STRONG is not set
1204
+ # CONFIG_STACK_CHECK_ALL is not set
1205
+ # CONFIG_WARN_WRITE_STRINGS is not set
1206
+ # CONFIG_ESP_SYSTEM_PD_FLASH is not set
1207
+ CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND=y
1208
+ CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC=y
1209
+ # CONFIG_ESP32C3_RTC_CLK_SRC_EXT_CRYS is not set
1210
+ # CONFIG_ESP32C3_RTC_CLK_SRC_EXT_OSC is not set
1211
+ # CONFIG_ESP32C3_RTC_CLK_SRC_INT_8MD256 is not set
1212
+ CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES=1024
1213
+ CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y
1214
+ CONFIG_BROWNOUT_DET=y
1215
+ CONFIG_ESP32C3_BROWNOUT_DET=y
1216
+ CONFIG_BROWNOUT_DET_LVL_SEL_7=y
1217
+ CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7=y
1218
+ # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set
1219
+ # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_6 is not set
1220
+ # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set
1221
+ # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_5 is not set
1222
+ # CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set
1223
+ # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_4 is not set
1224
+ # CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set
1225
+ # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_3 is not set
1226
+ # CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set
1227
+ # CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_2 is not set
1228
+ CONFIG_BROWNOUT_DET_LVL=7
1229
+ CONFIG_ESP32C3_BROWNOUT_DET_LVL=7
1230
+ CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y
1231
+ CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y
1232
+ # CONFIG_ESP32C3_DEFAULT_CPU_FREQ_80 is not set
1233
+ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_160=y
1234
+ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ=160
1235
+ CONFIG_ESP32C3_MEMPROT_FEATURE=y
1236
+ CONFIG_ESP32C3_MEMPROT_FEATURE_LOCK=y
1237
+ CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
1238
+ CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304
1239
+ CONFIG_MAIN_TASK_STACK_SIZE=12288
1240
+ # CONFIG_CONSOLE_UART_DEFAULT is not set
1241
+ # CONFIG_CONSOLE_UART_CUSTOM is not set
1242
+ # CONFIG_CONSOLE_UART_NONE is not set
1243
+ # CONFIG_ESP_CONSOLE_UART_NONE is not set
1244
+ CONFIG_CONSOLE_UART_NUM=-1
1245
+ CONFIG_INT_WDT=y
1246
+ CONFIG_INT_WDT_TIMEOUT_MS=300
1247
+ CONFIG_TASK_WDT=y
1248
+ CONFIG_ESP_TASK_WDT=y
1249
+ # CONFIG_TASK_WDT_PANIC is not set
1250
+ CONFIG_TASK_WDT_TIMEOUT_S=30
1251
+ CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
1252
+ # CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
1253
+ CONFIG_ESP32C3_DEBUG_OCDAWARE=y
1254
+ CONFIG_IPC_TASK_STACK_SIZE=1024
1255
+ CONFIG_TIMER_TASK_STACK_SIZE=3584
1256
+ CONFIG_TIMER_TASK_PRIORITY=1
1257
+ CONFIG_TIMER_TASK_STACK_DEPTH=2048
1258
+ CONFIG_TIMER_QUEUE_LENGTH=10
1259
+ # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set
1260
+ # CONFIG_HAL_ASSERTION_SILIENT is not set
1261
+ CONFIG_NEWLIB_NANO_FORMAT=y
1262
+ CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y
1263
+ CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER=y
1264
+ # CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set
1265
+ # CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC is not set
1266
+ # CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set
1267
+ # CONFIG_ESP32C3_TIME_SYSCALL_USE_SYSTIMER is not set
1268
+ # CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set
1269
+ # CONFIG_ESP32C3_TIME_SYSCALL_USE_NONE is not set
1270
+ CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
1271
+ CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
1272
+ CONFIG_ESP32_PTHREAD_STACK_MIN=768
1273
+ CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1
1274
+ CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread"
1275
+ CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
1276
+ # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set
1277
+ # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set
1278
+ # End of deprecated options
source/firmware/sdkconfig.defaults ADDED
@@ -0,0 +1,15 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ CONFIG_IDF_TARGET="esp32c3"
2
+ CONFIG_COMPILER_OPTIMIZATION_PERF=y
3
+ CONFIG_APP_REPRODUCIBLE_BUILD=y
4
+ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
5
+ CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
6
+ CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
7
+ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
8
+ CONFIG_PARTITION_TABLE_CUSTOM=y
9
+ CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
10
+ CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y
11
+ CONFIG_ESP_CONSOLE_SECONDARY_NONE=y
12
+ CONFIG_ESP_MAIN_TASK_STACK_SIZE=12288
13
+ CONFIG_ESP_TASK_WDT_TIMEOUT_S=30
14
+ CONFIG_LOG_DEFAULT_LEVEL_INFO=y
15
+ CONFIG_NEWLIB_NANO_FORMAT=y
source/generated/model-int8.json ADDED
@@ -0,0 +1,204 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ {
2
+ "source_sha256": "3a5ccc5f7dc423d65778aa3226fb97100f9aa6aaf79b3a1f95c2268629c6f66d",
3
+ "weight_precision_bits": 8,
4
+ "weights_requantized": false,
5
+ "bytes": 3529772,
6
+ "sha256": "ebcf094242437d185b8fef08881883728aca9e19a9e4231544da55a4c37f6947",
7
+ "layers": [
8
+ {
9
+ "name": "/generator/fc/Gemm",
10
+ "input": "latent",
11
+ "output": "/generator/relu/Relu_output_0",
12
+ "weight_offset": 0,
13
+ "bias_offset": 2252800,
14
+ "input_channels": 64,
15
+ "output_channels": 35200,
16
+ "kernel": 1,
17
+ "input_exponent": -7,
18
+ "weight_exponent": -9,
19
+ "bias_exponent": -16,
20
+ "output_exponent": -7,
21
+ "relu": true
22
+ },
23
+ {
24
+ "name": "/generator/trunk11/trunk11.0/conv/Conv",
25
+ "input": "PPQ_Variable_5",
26
+ "output": "/generator/trunk11/trunk11.0/conv/Conv_output_0",
27
+ "weight_offset": 2393600,
28
+ "bias_offset": 2624000,
29
+ "input_channels": 160,
30
+ "output_channels": 160,
31
+ "kernel": 3,
32
+ "input_exponent": -7,
33
+ "weight_exponent": -8,
34
+ "bias_exponent": -15,
35
+ "output_exponent": -5,
36
+ "relu": false
37
+ },
38
+ {
39
+ "name": "/generator/trunk11/trunk11.1/conv/Conv",
40
+ "input": "/generator/trunk11/trunk11.0/relu/Relu_output_0",
41
+ "output": "/generator/trunk11/trunk11.1/conv/Conv_output_0",
42
+ "weight_offset": 2624640,
43
+ "bias_offset": 2855040,
44
+ "input_channels": 160,
45
+ "output_channels": 160,
46
+ "kernel": 3,
47
+ "input_exponent": -5,
48
+ "weight_exponent": -10,
49
+ "bias_exponent": -15,
50
+ "output_exponent": -4,
51
+ "relu": false
52
+ },
53
+ {
54
+ "name": "/generator/trunk11/trunk11.2/conv/Conv",
55
+ "input": "/generator/trunk11/trunk11.1/relu/Relu_output_0",
56
+ "output": "/generator/trunk11/trunk11.2/conv/Conv_output_0",
57
+ "weight_offset": 2855680,
58
+ "bias_offset": 3086080,
59
+ "input_channels": 160,
60
+ "output_channels": 160,
61
+ "kernel": 3,
62
+ "input_exponent": -4,
63
+ "weight_exponent": -10,
64
+ "bias_exponent": -14,
65
+ "output_exponent": -3,
66
+ "relu": false
67
+ },
68
+ {
69
+ "name": "/generator/stage22/stage22.0/conv/Conv",
70
+ "input": "/generator/stage22/stage22.0/resize/Resize_output_0",
71
+ "output": "/generator/stage22/stage22.0/relu/Relu_output_0",
72
+ "weight_offset": 3086720,
73
+ "bias_offset": 3271040,
74
+ "input_channels": 160,
75
+ "output_channels": 128,
76
+ "kernel": 3,
77
+ "input_exponent": -3,
78
+ "weight_exponent": -10,
79
+ "bias_exponent": -13,
80
+ "output_exponent": -4,
81
+ "relu": true
82
+ },
83
+ {
84
+ "name": "/generator/stage22/stage22.1/conv/Conv",
85
+ "input": "/generator/stage22/stage22.0/relu/Relu_output_0",
86
+ "output": "/generator/stage22/stage22.1/relu/Relu_output_0",
87
+ "weight_offset": 3271552,
88
+ "bias_offset": 3419008,
89
+ "input_channels": 128,
90
+ "output_channels": 128,
91
+ "kernel": 3,
92
+ "input_exponent": -4,
93
+ "weight_exponent": -9,
94
+ "bias_exponent": -13,
95
+ "output_exponent": -4,
96
+ "relu": true
97
+ },
98
+ {
99
+ "name": "/generator/stage44/conv/Conv",
100
+ "input": "/generator/stage44/resize/Resize_output_0",
101
+ "output": "/generator/stage44/relu/Relu_output_0",
102
+ "weight_offset": 3419520,
103
+ "bias_offset": 3493248,
104
+ "input_channels": 128,
105
+ "output_channels": 64,
106
+ "kernel": 3,
107
+ "input_exponent": -4,
108
+ "weight_exponent": -9,
109
+ "bias_exponent": -13,
110
+ "output_exponent": -4,
111
+ "relu": true
112
+ },
113
+ {
114
+ "name": "/generator/stage88/stage88.0/conv/Conv",
115
+ "input": "/generator/stage88/stage88.0/resize/Resize_output_0",
116
+ "output": "/generator/stage88/stage88.0/relu/Relu_output_0",
117
+ "weight_offset": 3493504,
118
+ "bias_offset": 3511936,
119
+ "input_channels": 64,
120
+ "output_channels": 32,
121
+ "kernel": 3,
122
+ "input_exponent": -4,
123
+ "weight_exponent": -7,
124
+ "bias_exponent": -11,
125
+ "output_exponent": -5,
126
+ "relu": true
127
+ },
128
+ {
129
+ "name": "/generator/stage88/stage88.1/conv/Conv",
130
+ "input": "/generator/stage88/stage88.0/relu/Relu_output_0",
131
+ "output": "/generator/stage88/stage88.1/relu/Relu_output_0",
132
+ "weight_offset": 3512064,
133
+ "bias_offset": 3521280,
134
+ "input_channels": 32,
135
+ "output_channels": 32,
136
+ "kernel": 3,
137
+ "input_exponent": -5,
138
+ "weight_exponent": -7,
139
+ "bias_exponent": -12,
140
+ "output_exponent": -5,
141
+ "relu": true
142
+ },
143
+ {
144
+ "name": "/generator/base_rgb/Conv",
145
+ "input": "/generator/stage88/stage88.1/relu/Relu_output_0",
146
+ "output": "/generator/base_rgb/Conv_output_0",
147
+ "weight_offset": 3521408,
148
+ "bias_offset": 3522272,
149
+ "input_channels": 32,
150
+ "output_channels": 3,
151
+ "kernel": 3,
152
+ "input_exponent": -5,
153
+ "weight_exponent": -10,
154
+ "bias_exponent": -15,
155
+ "output_exponent": -5,
156
+ "relu": false
157
+ },
158
+ {
159
+ "name": "/generator/detail_reduce/conv/Conv",
160
+ "input": "/generator/stage88/stage88.1/relu/Relu_output_0",
161
+ "output": "/generator/detail_reduce/relu/Relu_output_0",
162
+ "weight_offset": 3522288,
163
+ "bias_offset": 3526896,
164
+ "input_channels": 32,
165
+ "output_channels": 16,
166
+ "kernel": 3,
167
+ "input_exponent": -5,
168
+ "weight_exponent": -7,
169
+ "bias_exponent": -12,
170
+ "output_exponent": -4,
171
+ "relu": true
172
+ },
173
+ {
174
+ "name": "/generator/stage176/conv/Conv",
175
+ "input": "/generator/stage176/resize/Resize_output_0",
176
+ "output": "/generator/stage176/relu/Relu_output_0",
177
+ "weight_offset": 3526960,
178
+ "bias_offset": 3529264,
179
+ "input_channels": 16,
180
+ "output_channels": 16,
181
+ "kernel": 3,
182
+ "input_exponent": -4,
183
+ "weight_exponent": -7,
184
+ "bias_exponent": -11,
185
+ "output_exponent": -4,
186
+ "relu": true
187
+ },
188
+ {
189
+ "name": "/generator/detail_rgb/Conv",
190
+ "input": "/generator/stage176/relu/Relu_output_0",
191
+ "output": "/generator/detail_rgb/Conv_output_0",
192
+ "weight_offset": 3529328,
193
+ "bias_offset": 3529760,
194
+ "input_channels": 16,
195
+ "output_channels": 3,
196
+ "kernel": 3,
197
+ "input_exponent": -4,
198
+ "weight_exponent": -9,
199
+ "bias_exponent": -13,
200
+ "output_exponent": -5,
201
+ "relu": false
202
+ }
203
+ ]
204
+ }
source/generated/model-meta.h ADDED
@@ -0,0 +1,25 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ /* Generated from the verified original INT8 export; do not edit. */
2
+ #define FC3_MODEL_BYTES 3529772u
3
+ #define FC3_REFERENCE_CRC 0x4033ccebu
4
+ static const FC3Layer fc3_layers[13] = {
5
+ {0u,2252800u,64,35200,9,-7,-7,1},
6
+ {2393600u,2624000u,160,160,10,-7,-5,0},
7
+ {2624640u,2855040u,160,160,11,-5,-4,0},
8
+ {2855680u,3086080u,160,160,11,-4,-3,0},
9
+ {3086720u,3271040u,160,128,9,-3,-4,1},
10
+ {3271552u,3419008u,128,128,9,-4,-4,1},
11
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1926
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1927
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1928
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1929
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1930
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1931
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1932
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1933
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1934
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1935
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1936
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1937
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1938
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1939
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1940
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1941
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1942
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1943
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1944
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1945
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1946
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1947
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1948
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1949
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1950
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1951
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1952
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1953
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1954
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1955
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1956
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1957
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1958
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1959
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1960
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1961
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1962
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1963
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1964
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1965
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1966
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1967
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1968
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1969
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1970
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1971
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1972
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1973
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1974
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1975
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1976
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1977
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1978
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1979
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1980
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1981
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1982
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1983
+ {22,22,22},
1984
+ {21,21,21},
1985
+ {21,21,21},
1986
+ {20,20,20},
1987
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1988
+ {17,17,54},
1989
+ {18,18,50},
1990
+ {19,19,45},
1991
+ {19,19,40},
1992
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1993
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1994
+ {21,21,26},
1995
+ {22,22,22},
1996
+ {21,21,21},
1997
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1998
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1999
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2000
+ {19,19,19},
2001
+ {18,18,18},
2002
+ {18,18,18},
2003
+ {14,14,60},
2004
+ {15,15,53},
2005
+ {15,15,48},
2006
+ {16,16,44},
2007
+ {17,17,39},
2008
+ {17,17,34},
2009
+ {18,18,30},
2010
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2011
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2012
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2013
+ {18,18,18},
2014
+ {18,18,18},
2015
+ {17,17,17},
2016
+ {17,17,17},
2017
+ {16,16,16},
2018
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2019
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2020
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2021
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2022
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2023
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2024
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2025
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2026
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2027
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2028
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2029
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2030
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2031
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2032
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2033
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2034
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2035
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2036
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2037
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2038
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2039
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2040
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2041
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2042
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2043
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2044
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2045
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2046
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2047
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2048
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2049
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2050
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2051
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2052
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2053
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2054
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2055
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2056
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2057
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2058
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2059
+ {26,64,64},
2060
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2061
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2062
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2063
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2064
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2065
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2066
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2067
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2068
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2069
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2070
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2071
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2072
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2073
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2074
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2075
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2076
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2077
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2078
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2079
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2080
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2081
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2082
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2083
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2084
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2085
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2086
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2087
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2088
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2089
+ {26,57,57},
2090
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2091
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2092
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2093
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2094
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2095
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2096
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2097
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2098
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2099
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2100
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2101
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2102
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2103
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2104
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2105
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2106
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2107
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2108
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2109
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2110
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2111
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2112
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2113
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2114
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2115
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2116
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2117
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2118
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2119
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2120
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2121
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2122
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2123
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2124
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2125
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2126
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2127
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2128
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2129
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2130
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2131
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2132
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2133
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2134
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2135
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2136
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2137
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2138
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2139
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2140
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2141
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2142
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2143
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2144
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2145
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2146
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2147
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2148
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2149
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2150
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2151
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2152
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2153
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2154
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2155
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2156
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2157
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2158
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2159
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2160
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2161
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2162
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2163
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2164
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2165
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2166
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2167
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2168
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2169
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2170
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2171
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2172
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2173
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2174
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2175
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2176
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2177
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2178
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2179
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2180
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2181
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2182
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2183
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2184
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2185
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2186
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2187
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2188
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2189
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2190
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2191
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2192
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2193
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2194
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2195
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2196
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2197
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2198
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2199
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2200
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2201
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2202
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2203
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2204
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2205
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2206
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2207
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2208
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2209
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2210
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2211
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2212
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2213
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2214
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2215
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2216
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2217
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2218
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2219
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2220
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2221
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2222
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2223
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2224
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2225
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2226
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2227
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2228
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2229
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2230
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2231
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2232
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2233
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2234
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2235
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2236
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2237
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2238
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2239
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2240
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2241
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2242
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2243
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2244
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2245
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2246
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2247
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2248
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2249
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2250
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2251
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2252
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2253
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2254
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2255
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2256
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2257
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2258
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2259
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2260
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2261
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2262
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2263
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2264
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2265
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2266
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2267
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2268
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2269
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2270
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2271
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2272
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2273
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2274
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2275
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2276
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2277
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2278
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2279
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2280
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2281
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2282
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2283
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2284
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2285
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2286
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2287
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2288
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2289
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2290
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2291
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2292
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2293
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2294
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2295
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2296
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2297
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2298
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2299
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2300
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2301
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2302
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2303
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2304
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2305
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2306
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2307
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2308
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2309
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2310
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2311
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2312
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2313
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2314
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2315
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2316
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2317
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2318
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2319
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2320
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2321
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2322
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2323
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2324
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2325
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2326
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2327
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2328
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2329
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2330
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2331
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2332
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2333
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2334
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2335
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2336
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2337
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2338
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2339
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2340
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2341
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2342
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2343
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2344
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2345
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2346
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2347
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2348
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2349
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2350
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2351
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2352
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2353
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2354
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2355
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2356
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2357
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2358
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2359
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2360
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2361
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2362
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2363
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2364
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2365
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2366
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2367
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2368
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2369
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2370
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2371
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2372
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2373
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2374
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2375
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2376
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2377
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2379
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2380
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2381
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2382
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2383
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2384
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2385
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2386
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2387
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2388
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2389
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2390
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2391
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2392
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2393
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2394
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2395
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2396
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2397
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2398
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2399
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2400
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2401
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2402
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2403
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2404
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2405
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2406
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2407
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2408
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2409
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2410
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2411
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2412
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2413
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2414
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2415
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2416
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2417
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2418
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2419
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2420
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2421
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2422
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2423
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2424
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2425
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2426
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2427
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2428
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2429
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2430
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2431
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2432
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2433
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2434
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2435
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2436
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2437
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2438
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2439
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2440
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2441
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2442
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2443
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2444
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2445
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2446
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2447
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2448
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2449
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2450
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2451
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2452
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2453
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2454
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2455
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2456
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2457
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2458
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2459
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2460
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2461
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2462
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2463
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2464
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2465
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2466
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2467
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2468
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2469
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2470
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2471
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2472
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2473
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2474
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2475
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2476
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2477
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2478
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2479
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2480
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2481
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2482
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2483
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2484
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2485
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2497
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2498
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2499
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2500
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2501
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2502
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2503
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2504
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2508
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2516
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4065
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4098
+ {0,0,0},
4099
+ };
source/licenses/MPL-2.0.txt ADDED
@@ -0,0 +1,378 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ All files in this package are Copyright 2019 Gordon Williams, Pur3 Ltd unless
2
+ otherwise noted.
3
+
4
+ -------------------------------------------------------------------------------
5
+
6
+ Mozilla Public License Version 2.0
7
+ ==================================
8
+
9
+ 1. Definitions
10
+ --------------
11
+
12
+ 1.1. "Contributor"
13
+ means each individual or legal entity that creates, contributes to
14
+ the creation of, or owns Covered Software.
15
+
16
+ 1.2. "Contributor Version"
17
+ means the combination of the Contributions of others (if any) used
18
+ by a Contributor and that particular Contributor's Contribution.
19
+
20
+ 1.3. "Contribution"
21
+ means Covered Software of a particular Contributor.
22
+
23
+ 1.4. "Covered Software"
24
+ means Source Code Form to which the initial Contributor has attached
25
+ the notice in Exhibit A, the Executable Form of such Source Code
26
+ Form, and Modifications of such Source Code Form, in each case
27
+ including portions thereof.
28
+
29
+ 1.5. "Incompatible With Secondary Licenses"
30
+ means
31
+
32
+ (a) that the initial Contributor has attached the notice described
33
+ in Exhibit B to the Covered Software; or
34
+
35
+ (b) that the Covered Software was made available under the terms of
36
+ version 1.1 or earlier of the License, but not also under the
37
+ terms of a Secondary License.
38
+
39
+ 1.6. "Executable Form"
40
+ means any form of the work other than Source Code Form.
41
+
42
+ 1.7. "Larger Work"
43
+ means a work that combines Covered Software with other material, in
44
+ a separate file or files, that is not Covered Software.
45
+
46
+ 1.8. "License"
47
+ means this document.
48
+
49
+ 1.9. "Licensable"
50
+ means having the right to grant, to the maximum extent possible,
51
+ whether at the time of the initial grant or subsequently, any and
52
+ all of the rights conveyed by this License.
53
+
54
+ 1.10. "Modifications"
55
+ means any of the following:
56
+
57
+ (a) any file in Source Code Form that results from an addition to,
58
+ deletion from, or modification of the contents of Covered
59
+ Software; or
60
+
61
+ (b) any new file in Source Code Form that contains any Covered
62
+ Software.
63
+
64
+ 1.11. "Patent Claims" of a Contributor
65
+ means any patent claim(s), including without limitation, method,
66
+ process, and apparatus claims, in any patent Licensable by such
67
+ Contributor that would be infringed, but for the grant of the
68
+ License, by the making, using, selling, offering for sale, having
69
+ made, import, or transfer of either its Contributions or its
70
+ Contributor Version.
71
+
72
+ 1.12. "Secondary License"
73
+ means either the GNU General Public License, Version 2.0, the GNU
74
+ Lesser General Public License, Version 2.1, the GNU Affero General
75
+ Public License, Version 3.0, or any later versions of those
76
+ licenses.
77
+
78
+ 1.13. "Source Code Form"
79
+ means the form of the work preferred for making modifications.
80
+
81
+ 1.14. "You" (or "Your")
82
+ means an individual or a legal entity exercising rights under this
83
+ License. For legal entities, "You" includes any entity that
84
+ controls, is controlled by, or is under common control with You. For
85
+ purposes of this definition, "control" means (a) the power, direct
86
+ or indirect, to cause the direction or management of such entity,
87
+ whether by contract or otherwise, or (b) ownership of more than
88
+ fifty percent (50%) of the outstanding shares or beneficial
89
+ ownership of such entity.
90
+
91
+ 2. License Grants and Conditions
92
+ --------------------------------
93
+
94
+ 2.1. Grants
95
+
96
+ Each Contributor hereby grants You a world-wide, royalty-free,
97
+ non-exclusive license:
98
+
99
+ (a) under intellectual property rights (other than patent or trademark)
100
+ Licensable by such Contributor to use, reproduce, make available,
101
+ modify, display, perform, distribute, and otherwise exploit its
102
+ Contributions, either on an unmodified basis, with Modifications, or
103
+ as part of a Larger Work; and
104
+
105
+ (b) under Patent Claims of such Contributor to make, use, sell, offer
106
+ for sale, have made, import, and otherwise transfer either its
107
+ Contributions or its Contributor Version.
108
+
109
+ 2.2. Effective Date
110
+
111
+ The licenses granted in Section 2.1 with respect to any Contribution
112
+ become effective for each Contribution on the date the Contributor first
113
+ distributes such Contribution.
114
+
115
+ 2.3. Limitations on Grant Scope
116
+
117
+ The licenses granted in this Section 2 are the only rights granted under
118
+ this License. No additional rights or licenses will be implied from the
119
+ distribution or licensing of Covered Software under this License.
120
+ Notwithstanding Section 2.1(b) above, no patent license is granted by a
121
+ Contributor:
122
+
123
+ (a) for any code that a Contributor has removed from Covered Software;
124
+ or
125
+
126
+ (b) for infringements caused by: (i) Your and any other third party's
127
+ modifications of Covered Software, or (ii) the combination of its
128
+ Contributions with other software (except as part of its Contributor
129
+ Version); or
130
+
131
+ (c) under Patent Claims infringed by Covered Software in the absence of
132
+ its Contributions.
133
+
134
+ This License does not grant any rights in the trademarks, service marks,
135
+ or logos of any Contributor (except as may be necessary to comply with
136
+ the notice requirements in Section 3.4).
137
+
138
+ 2.4. Subsequent Licenses
139
+
140
+ No Contributor makes additional grants as a result of Your choice to
141
+ distribute the Covered Software under a subsequent version of this
142
+ License (see Section 10.2) or under the terms of a Secondary License (if
143
+ permitted under the terms of Section 3.3).
144
+
145
+ 2.5. Representation
146
+
147
+ Each Contributor represents that the Contributor believes its
148
+ Contributions are its original creation(s) or it has sufficient rights
149
+ to grant the rights to its Contributions conveyed by this License.
150
+
151
+ 2.6. Fair Use
152
+
153
+ This License is not intended to limit any rights You have under
154
+ applicable copyright doctrines of fair use, fair dealing, or other
155
+ equivalents.
156
+
157
+ 2.7. Conditions
158
+
159
+ Sections 3.1, 3.2, 3.3, and 3.4 are conditions of the licenses granted
160
+ in Section 2.1.
161
+
162
+ 3. Responsibilities
163
+ -------------------
164
+
165
+ 3.1. Distribution of Source Form
166
+
167
+ All distribution of Covered Software in Source Code Form, including any
168
+ Modifications that You create or to which You contribute, must be under
169
+ the terms of this License. You must inform recipients that the Source
170
+ Code Form of the Covered Software is governed by the terms of this
171
+ License, and how they can obtain a copy of this License. You may not
172
+ attempt to alter or restrict the recipients' rights in the Source Code
173
+ Form.
174
+
175
+ 3.2. Distribution of Executable Form
176
+
177
+ If You distribute Covered Software in Executable Form then:
178
+
179
+ (a) such Covered Software must also be made available in Source Code
180
+ Form, as described in Section 3.1, and You must inform recipients of
181
+ the Executable Form how they can obtain a copy of such Source Code
182
+ Form by reasonable means in a timely manner, at a charge no more
183
+ than the cost of distribution to the recipient; and
184
+
185
+ (b) You may distribute such Executable Form under the terms of this
186
+ License, or sublicense it under different terms, provided that the
187
+ license for the Executable Form does not attempt to limit or alter
188
+ the recipients' rights in the Source Code Form under this License.
189
+
190
+ 3.3. Distribution of a Larger Work
191
+
192
+ You may create and distribute a Larger Work under terms of Your choice,
193
+ provided that You also comply with the requirements of this License for
194
+ the Covered Software. If the Larger Work is a combination of Covered
195
+ Software with a work governed by one or more Secondary Licenses, and the
196
+ Covered Software is not Incompatible With Secondary Licenses, this
197
+ License permits You to additionally distribute such Covered Software
198
+ under the terms of such Secondary License(s), so that the recipient of
199
+ the Larger Work may, at their option, further distribute the Covered
200
+ Software under the terms of either this License or such Secondary
201
+ License(s).
202
+
203
+ 3.4. Notices
204
+
205
+ You may not remove or alter the substance of any license notices
206
+ (including copyright notices, patent notices, disclaimers of warranty,
207
+ or limitations of liability) contained within the Source Code Form of
208
+ the Covered Software, except that You may alter any license notices to
209
+ the extent required to remedy known factual inaccuracies.
210
+
211
+ 3.5. Application of Additional Terms
212
+
213
+ You may choose to offer, and to charge a fee for, warranty, support,
214
+ indemnity or liability obligations to one or more recipients of Covered
215
+ Software. However, You may do so only on Your own behalf, and not on
216
+ behalf of any Contributor. You must make it absolutely clear that any
217
+ such warranty, support, indemnity, or liability obligation is offered by
218
+ You alone, and You hereby agree to indemnify every Contributor for any
219
+ liability incurred by such Contributor as a result of warranty, support,
220
+ indemnity or liability terms You offer. You may include additional
221
+ disclaimers of warranty and limitations of liability specific to any
222
+ jurisdiction.
223
+
224
+ 4. Inability to Comply Due to Statute or Regulation
225
+ ---------------------------------------------------
226
+
227
+ If it is impossible for You to comply with any of the terms of this
228
+ License with respect to some or all of the Covered Software due to
229
+ statute, judicial order, or regulation then You must: (a) comply with
230
+ the terms of this License to the maximum extent possible; and (b)
231
+ describe the limitations and the code they affect. Such description must
232
+ be placed in a text file included with all distributions of the Covered
233
+ Software under this License. Except to the extent prohibited by statute
234
+ or regulation, such description must be sufficiently detailed for a
235
+ recipient of ordinary skill to be able to understand it.
236
+
237
+ 5. Termination
238
+ --------------
239
+
240
+ 5.1. The rights granted under this License will terminate automatically
241
+ if You fail to comply with any of its terms. However, if You become
242
+ compliant, then the rights granted under this License from a particular
243
+ Contributor are reinstated (a) provisionally, unless and until such
244
+ Contributor explicitly and finally terminates Your grants, and (b) on an
245
+ ongoing basis, if such Contributor fails to notify You of the
246
+ non-compliance by some reasonable means prior to 60 days after You have
247
+ come back into compliance. Moreover, Your grants from a particular
248
+ Contributor are reinstated on an ongoing basis if such Contributor
249
+ notifies You of the non-compliance by some reasonable means, this is the
250
+ first time You have received notice of non-compliance with this License
251
+ from such Contributor, and You become compliant prior to 30 days after
252
+ Your receipt of the notice.
253
+
254
+ 5.2. If You initiate litigation against any entity by asserting a patent
255
+ infringement claim (excluding declaratory judgment actions,
256
+ counter-claims, and cross-claims) alleging that a Contributor Version
257
+ directly or indirectly infringes any patent, then the rights granted to
258
+ You by any and all Contributors for the Covered Software under Section
259
+ 2.1 of this License shall terminate.
260
+
261
+ 5.3. In the event of termination under Sections 5.1 or 5.2 above, all
262
+ end user license agreements (excluding distributors and resellers) which
263
+ have been validly granted by You or Your distributors under this License
264
+ prior to termination shall survive termination.
265
+
266
+ ************************************************************************
267
+ * *
268
+ * 6. Disclaimer of Warranty *
269
+ * ------------------------- *
270
+ * *
271
+ * Covered Software is provided under this License on an "as is" *
272
+ * basis, without warranty of any kind, either expressed, implied, or *
273
+ * statutory, including, without limitation, warranties that the *
274
+ * Covered Software is free of defects, merchantable, fit for a *
275
+ * particular purpose or non-infringing. The entire risk as to the *
276
+ * quality and performance of the Covered Software is with You. *
277
+ * Should any Covered Software prove defective in any respect, You *
278
+ * (not any Contributor) assume the cost of any necessary servicing, *
279
+ * repair, or correction. This disclaimer of warranty constitutes an *
280
+ * essential part of this License. No use of any Covered Software is *
281
+ * authorized under this License except under this disclaimer. *
282
+ * *
283
+ ************************************************************************
284
+
285
+ ************************************************************************
286
+ * *
287
+ * 7. Limitation of Liability *
288
+ * -------------------------- *
289
+ * *
290
+ * Under no circumstances and under no legal theory, whether tort *
291
+ * (including negligence), contract, or otherwise, shall any *
292
+ * Contributor, or anyone who distributes Covered Software as *
293
+ * permitted above, be liable to You for any direct, indirect, *
294
+ * special, incidental, or consequential damages of any character *
295
+ * including, without limitation, damages for lost profits, loss of *
296
+ * goodwill, work stoppage, computer failure or malfunction, or any *
297
+ * and all other commercial damages or losses, even if such party *
298
+ * shall have been informed of the possibility of such damages. This *
299
+ * limitation of liability shall not apply to liability for death or *
300
+ * personal injury resulting from such party's negligence to the *
301
+ * extent applicable law prohibits such limitation. Some *
302
+ * jurisdictions do not allow the exclusion or limitation of *
303
+ * incidental or consequential damages, so this exclusion and *
304
+ * limitation may not apply to You. *
305
+ * *
306
+ ************************************************************************
307
+
308
+ 8. Litigation
309
+ -------------
310
+
311
+ Any litigation relating to this License may be brought only in the
312
+ courts of a jurisdiction where the defendant maintains its principal
313
+ place of business and such litigation shall be governed by laws of that
314
+ jurisdiction, without reference to its conflict-of-law provisions.
315
+ Nothing in this Section shall prevent a party's ability to bring
316
+ cross-claims or counter-claims.
317
+
318
+ 9. Miscellaneous
319
+ ----------------
320
+
321
+ This License represents the complete agreement concerning the subject
322
+ matter hereof. If any provision of this License is held to be
323
+ unenforceable, such provision shall be reformed only to the extent
324
+ necessary to make it enforceable. Any law or regulation which provides
325
+ that the language of a contract shall be construed against the drafter
326
+ shall not be used to construe this License against a Contributor.
327
+
328
+ 10. Versions of the License
329
+ ---------------------------
330
+
331
+ 10.1. New Versions
332
+
333
+ Mozilla Foundation is the license steward. Except as provided in Section
334
+ 10.3, no one other than the license steward has the right to modify or
335
+ publish new versions of this License. Each version will be given a
336
+ distinguishing version number.
337
+
338
+ 10.2. Effect of New Versions
339
+
340
+ You may distribute the Covered Software under the terms of the version
341
+ of the License under which You originally received the Covered Software,
342
+ or under the terms of any subsequent version published by the license
343
+ steward.
344
+
345
+ 10.3. Modified Versions
346
+
347
+ If you create software not governed by this License, and you want to
348
+ create a new license for such software, you may create and use a
349
+ modified version of this License if you rename the license and remove
350
+ any references to the name of the license steward (except to note that
351
+ such modified license differs from this License).
352
+
353
+ 10.4. Distributing Source Code Form that is Incompatible With Secondary
354
+ Licenses
355
+
356
+ If You choose to distribute Source Code Form that is Incompatible With
357
+ Secondary Licenses under the terms of this version of the License, the
358
+ notice described in Exhibit B of this License must be attached.
359
+
360
+ Exhibit A - Source Code Form License Notice
361
+ -------------------------------------------
362
+
363
+ This Source Code Form is subject to the terms of the Mozilla Public
364
+ License, v. 2.0. If a copy of the MPL was not distributed with this
365
+ file, You can obtain one at http://mozilla.org/MPL/2.0/.
366
+
367
+ If it is not possible or desirable to put the notice in a particular
368
+ file, then You may include the notice in a location (such as a LICENSE
369
+ file in a relevant directory) where a recipient would be likely to look
370
+ for such a notice.
371
+
372
+ You may add additional accurate notices of copyright ownership.
373
+
374
+ Exhibit B - "Incompatible With Secondary Licenses" Notice
375
+ ---------------------------------------------------------
376
+
377
+ This Source Code Form is "Incompatible With Secondary Licenses", as
378
+ defined by the Mozilla Public License, v. 2.0.
source/licenses/esp-idf/LICENSE ADDED
@@ -0,0 +1,202 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
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+ Apache License
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source/licenses/esp-idf/components/bootloader/subproject/components/micro-ecc/micro-ecc/LICENSE.txt ADDED
@@ -0,0 +1,21 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+ Copyright (c) 2014, Kenneth MacKay
2
+ All rights reserved.
3
+
4
+ Redistribution and use in source and binary forms, with or without modification,
5
+ are permitted provided that the following conditions are met:
6
+ * Redistributions of source code must retain the above copyright notice, this
7
+ list of conditions and the following disclaimer.
8
+ * Redistributions in binary form must reproduce the above copyright notice,
9
+ this list of conditions and the following disclaimer in the documentation
10
+ and/or other materials provided with the distribution.
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+
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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+ ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
18
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19
+ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
21
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
source/licenses/esp-idf/components/bt/common/tinycrypt/LICENSE ADDED
@@ -0,0 +1,61 @@
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
+
2
+ ================================================================================
3
+
4
+ TinyCrypt Cryptographic Library
5
+
6
+ ================================================================================
7
+
8
+ Copyright (c) 2017, Intel Corporation. All rights reserved.
9
+
10
+ Redistribution and use in source and binary forms, with or without modification,
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+ are permitted provided that the following conditions are met:
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+
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+ - Redistributions of source code must retain the above copyright notice, this
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+ list of conditions and the following disclaimer.
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+
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+ - Redistributions in binary form must reproduce the above copyright notice,
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+ this list of conditions and the following disclaimer in the documentation
18
+ and/or other materials provided with the distribution.
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+
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+ - Neither the name of the Intel Corporation nor the names of its contributors
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+ may be used to endorse or promote products derived from this software
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+ without specific prior written permission.
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+
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+
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+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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+ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35
+
36
+ ================================================================================
37
+ Copyright (c) 2014, Kenneth MacKay
38
+ All rights reserved.
39
+
40
+ https://github.com/kmackay/micro-ecc
41
+
42
+ Redistribution and use in source and binary forms, with or without modification,
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+ are permitted provided that the following conditions are met:
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+ list of conditions and the following disclaimer.
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source/licenses/esp-idf/components/bt/controller/lib_esp32c5/esp32c5-bt-lib/NOTICE ADDED
@@ -0,0 +1,9 @@
 
 
 
 
 
 
 
 
 
 
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+ Apache Mynewt NimBLE
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+ Copyright 2015-2021 The Apache Software Foundation
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+ Modifications Copyright 2017-2024 Espressif Systems (Shanghai) CO., LTD.
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+ This product includes software developed at
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7
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+ Portions of this software were developed at
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+ Runtime Inc, copyright 2015.
source/licenses/esp-idf/components/bt/controller/lib_esp32c6/esp32c6-bt-lib/NOTICE ADDED
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+ Copyright 2015-2021 The Apache Software Foundation
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+ Modifications Copyright 2017-2024 Espressif Systems (Shanghai) CO., LTD.
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+
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+ This product includes software developed at
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+ The Apache Software Foundation (http://www.apache.org/).
7
+
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+ Portions of this software were developed at
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+ Runtime Inc, copyright 2015.
source/licenses/esp-idf/components/bt/controller/lib_esp32h2/esp32h2-bt-lib/NOTICE ADDED
@@ -0,0 +1,9 @@
 
 
 
 
 
 
 
 
 
 
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2
+ Copyright 2015-2022 The Apache Software Foundation
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+ Modifications Copyright 2017-2023 Espressif Systems (Shanghai) CO., LTD.
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+
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+ This product includes software developed at
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+ The Apache Software Foundation (http://www.apache.org/).
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+ This product partly derives from FreeBSD, which is available under the
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+ these files in later releases. These files are:
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+ * babblesim/hw/mcu/nordic/nrf52_bsim/include/mcu/cmsis_nvic.h
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source/licenses/esp-idf/components/bt/host/nimble/nimble/NOTICE ADDED
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+ Apache Mynewt NimBLE
2
+ Copyright 2015-2022 The Apache Software Foundation
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+ Portions of this software were developed at
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source/licenses/esp-idf/components/bt/host/nimble/nimble/ext/tinycrypt/LICENSE ADDED
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+
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+ TinyCrypt Cryptographic Library
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29
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105
+ ====================
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+ =========================
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