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| # PP4 measured selector qualification | |
| `fused-qualification.json` is the final hash-bound synthetic solo receipt. | |
| It matches the committed `sampled_fused.py` and `fused_probe.py`. All16 cases | |
| pass (B1–B4, depth4/5, all-positive and mixedT0/T1), with360 exact conditional | |
| position comparisons and1,600 graph replays. Tokens, support IDs and every | |
| dyadic q value match the original materialized Markov+PP3 producer reference. | |
| Graph/eager outputs match exactly under the same keys. Ties, signed zero, | |
| NaN/inf/all-masked refusal and safe continuation after an invalid draw pass. | |
| Both physical-peer specializations compile without executing peer traffic; | |
| this is explicitly not physical-pair qualification. | |
| MEASURED on x86host's assigned bc62df2a at unchanged225W, CPython3.13.12, | |
| Torch2.12.1+cu130. Peak RSS979,392KiB; peak CUDA allocation264,765,440B. | |
| Runtime5.02s in the warmed compiler cache; qualification follows the final typing-only qualifier edit. Synthetic all-positive selector | |
| medians (including both logical shards and Markov, excluding backbone/pair): | |
| |B|depth4 ms|depth5 ms| | |
| |---|---:|---:| | |
| |1|1.021952|1.346560| | |
| |2|1.727488|2.307072| | |
| |3|2.014208|2.676736| | |
| |4|2.686976|3.578880| | |
| These uncached-heavy synthetic costs are neither whole-worker timings nor | |
| incremental serving costs. Whole-worker timing uses real N4 states separately. | |
| No kernel timings are transferred to GB10 or a physical pair. | |
| The frozen pre-change CPU selection passed339 tests with41 existing | |
| GPU/checkpoint/optional-lib skips. The same changed selection passed343 with | |
| the same41 skips before two additional priming regressions; the final focused | |
| dispatch selection passes6/6. The initial unfiltered worker selection also | |
| attempted39 explicitly GPU-only fused tests with CUDA hidden, all failing with | |
| no-device errors; no assertion or skip was changed. The selected CPU regression | |
| omits that file explicitly. Logs remain in the campaign directory. | |
| Strict mypy covers the new fused runtime, GPU qualifier and CPU dispatch tests | |
| with the existing narrow Triton JIT stubs; legacy tp2 is not claimed newly | |
| strict in its entirety. New runtime boundaries are annotated. Ruff, shell | |
| syntax and diff checks pass. | |
| Reproduce only on the designated solo: stage code into PP4 x86host scratch, | |
| set `PP4_SOURCE_ROOT`, start an owned detached named tmux with private | |
| `TMUX_TMPDIR` before server creation, then run `fused_probe_locked.sh --out` | |
| with an output beneath PP4 scratch. The launcher takes the existing solo lock | |
| with `flock -w3600`, checks occupancy/225W and uses the required interpreter, | |
| affinity/nice/thread limits and private caches. It changes no power or unit. | |
| Preserve aggregate receipts before deleting scratch. CPU tests use TMUX unset, | |
| private TMPDIR/TMUX_TMPDIR, CUDA hidden, bytecode disabled, and repository root | |
| plus `offload/dspark` on PYTHONPATH. | |
| ## Round2 CPU validation | |
| Tests in offload/launch/windows/tests/test_pp4_{window,remote,prepare,pair}.py | |
| cover receiving-host second-hop stop/run, timed-out recovery/retry, delayed | |
| pair-open, exact-HOLD deferred close/retention, strict current-production env | |
| mounts, both actual K1 None branches and exact base reconstruction, failed | |
| counter growth/reset/missing/late increments, physical receipt case/teardown | |
| coverage, pair-first failure restoration, two restored ABBA segments and | |
| measured whole-block budget refusal. No new hardware skip qualifies a path. | |
| New pair_probe/pair_qualify scripts are syntax/type inspected only on Controller. | |
| Their MEASURED physical labels are emitted only when real checked subprocesses | |
| finish on the exact locked pair; no such receipt was generated by this lane. | |
| Synthetic CPU receipts are confined to test fixtures and never admission. | |
| The coordinator must obtain independent review and actual hardware/GB10 | |
| qualification; a passing CPU suite is not execution clearance. | |