Renesas/InceptionV3-ONNX

InceptionV3 (ONNX) – Renesas X5H

⏳ Model file not yet uploaded. Benchmark results on this page were published ahead of the model weights — see Provided Artifacts below. Download/deployment steps will not work until the file is added to this repository.

Introduction

This repository hosts Inception V3, targeting the Renesas R-Car X5H platform for image classification inference on the NPX6 NPU.

• Model Architecture: Inception V3 — a factorized-convolution CNN using parallel multi-scale "Inception" modules.
• Source Model: timm/inception_v3.tf_in1k — OpenMMLab config inception_v3_3rdparty_8xb32_in1k
• Task: Image Classification (ImageNet-1k, 1000 classes)
• Parameters: 23.8M

Deployment Flow

The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time — no separate quantization step is required.

inception_v3_..._optimized.onnx (FP32)
        │
        └─▶  MWMX Runtime  ──▶  INT8 auto-cast  ──▶  NPX6 NPU

Provided Artifacts

Artifact	Status	Notes
FP32 (ONNX)	⏳ Not yet uploaded	Benchmark numbers below exist; the model file has not been published to this repo yet

Performance

Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).

Benchmark configuration: Single NPU · Batch size: 1 · Input resolution: not available from source data (TBD)

Parameters	Runtime	Precision	Device	Latency (ms)	Type
~23.8M	MWMX Runtime	INT8 (auto)	X5H · 1× NPU · 12 Cores · 850 MHz	1.859839	Measured

Note: the 1 AI-core (npu_cores_per_instance: 1) configuration failed to compile in the APM50 CI pipeline for this model, so no 1-core latency is reported here. Only the 12-core result is published — this is a genuine gap in the source data, not an omission.

Accuracy

TBD — not yet measured/published for this repo.

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Runtime Details

MWMX Runtime

• Engine: Renesas MWMX (Middleware MX) native inference runtime
• Input format: FP32 ONNX (compiled by the MWMX toolchain)
• NPU execution precision: INT8 (auto-cast by MWMX toolchain)
• Execution target: NPX6-48K NPU on R-Car X5H

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Prerequisites

To run inference on Renesas R-Car X5H, you need:

1. Renesas R-Car X5H board with NPX6 NPU
2. Renesas MWMX Runtime
3. Hugging Face CLI to download the model (once the model file is published)

Download

TBD — model file not yet published to this repository.

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Benchmark Methodology

• HIL runs: Hardware-in-the-loop — measured on physical R-Car X5H silicon via the MWMX runtime (metawaremx_runtime CI pipeline, "APM50" ship-performance target)
• Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
• Slices: only the 12 AI-core result is reported; the 1 AI-core slice failed to compile in CI and is intentionally omitted rather than fabricated