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Codecfake-W2V2-AASIST-Codec — implementation notes
Codec-trained W2V2-AASIST of the Codecfake paper (Xie et al., arXiv 2405.04880), plan model #8, built
2026-11-01. Everything except the checkpoint is identical to ../Codecfake-W2V2-AASIST-CoTrain/ (same _net.py
copy; see that dir's notes for the port, XLS-R truncation bit-identity proof, allow-list unpickler, score
definition, TF32-off). Helper scripts (run_sets.sh, trt_export_both.sh, trt_jspaw.sh, parity.py) live in
the CoTrain dir and cover both models.
- Code: xieyuankun/Codecfake @
72c32e2840eef95fbeade349425fa9c5391fa11e, no LICENSE → linked, not re-hosted. - Checkpoint:
pretrained_model/codec_w2v2aasist/anti-spoofing_feat_model.pt(sha2565a606d1f…c25a3), trained on Codecfake train only; fetched at load time from the pinned raw GitHub URL →head_codec_w2v2aasist.safetensors. Strict load 245 keys; pickled temperatures/pool ratios identical to the port. - Params 76,554,634. Score = logits[:,0] − logits[:,1] (class 0 = bona fide). trained_on: none.
Reproduction vs authors' result/ITW_result.txt (no 19LA file shipped for this model)
Full InTheWild (31 779): EER ours 9.274% vs authors 9.609%; Pearson (logit) 0.9989, Spearman 0.9990, median |Δ logit| 0.044 — the same 16-bit-FLAC packaging residual measured for the CoTrain sibling (float source wavs: median |Δ| 0.0035).
Throughput / TRT (2026-11-01, shared GPUs)
PyTorch: same arch as CoTrain (288 / 104 utt/s on 4070 Ti SUPER / 5060 Ti). TRT sidecar
trt_codecfake-w2v2-aasist-codec.json:
| card | precision | best batch | utt/s | build Spearman | J-SPAW_LA EER PT → TRT | Spearman vs PT |
|---|---|---|---|---|---|---|
| RTX 4070 Ti SUPER | FP32 (FP16 0.9997 < 0.9999) | 32 | 395 | 1.0000 | 0.1252 → 0.1252 | 0.999999 |
| RTX 5060 Ti | FP16 (0.99995) | 16 | 784 | 0.99995 | 0.1252 → 0.1252 | 0.99996 |
| Both accepted. |