repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
neural-speed | github_2023 | cpp | 261 | intel | zhewang1-intc | @@ -176,12 +190,20 @@ class gemm_t<
// note: plane format, row-major
// note: 4bit x 2, row-major
- using matB_tile_desc_t = subgroup::tile_desc_t<
- tile_size_x_b / pack_ratio,
- tile_size_y_b,
- block_size_x_b / pack_ratio,
- block_size_y_b,
- reg_layout::tiled>;
+ using matB_tile_d... | will row/col major weight share the same block_size_x_b in policy?
if true, will this behavior affect simd lane utilization? |
neural-speed | github_2023 | cpp | 261 | intel | zhewang1-intc | @@ -549,7 +612,12 @@ class gemm_t<
subgroup::elemwise_cvt(matA_acc, matA);
dequantize(matB_acc, matB, scale, zero_pt);
SW_BARRIER();
- tile_mma::mma(matAcc, matAcc, matB_acc, matA_acc);
+ if constexpr (
+ is_col_major_b && compute_policy::mma_engine == mma_engine::fpu) { | this mean col major only support fpu engine?
i also notice we add a new fma core, will it only works on next token case?
if true, this mean we should keep 2 weight(row+col major) in vram to handle first & next token? |
neural-speed | github_2023 | cpp | 261 | intel | JianpingChen066 | @@ -89,14 +88,68 @@ struct compute_policy_int4_dequantize<
static constexpr uint32_t block_size_y_a = 16;
using mma_attr = mma_attr_t<arch_tag_, block_size_y_a>;
- static constexpr uint32_t block_bytes_x_a =
- (mma_engine == mma_engine::xmx) ? mma_attr::mma_k_in_bytes : 32;
+ static constexpr uint32_t bl... | why set block_bytes_y_b as so big ? and is that should be set for the different arch ?
In pr255, I make this change as:
using mma_attr = mma_attr_t<arch_tag_, mma_engine, block_size_y_a>;
static constexpr uint32_t block_bytes_x_a = (mma_engine == mma_engine::xmx)
? mma_attr::mma_k_in_bytes
: mma_a... |
neural-speed | github_2023 | cpp | 261 | intel | luoyu-intel | @@ -24,6 +24,129 @@
namespace gpu::xetla::subgroup {
/// @brief Is the tile mma operation functor, specialized for Xe and fpu engine.
+template <
+ typename matDst_t_,
+ typename matSrc_t_,
+ typename matAcc_t_,
+ typename matB_t_,
+ typename matA_t_,
+ gpu_arch arch_tag_>
+struct tile_fma_t {
+ ... | how about batch or beam_num support for the next-token? |
neural-speed | github_2023 | cpp | 261 | intel | JianpingChen066 | @@ -1003,40 +1000,36 @@ __XETLA_API typename std::enable_if_t<
tile_t::tile_size_y == 1 && tile_t::block_size_y == 1>
tile_store(tile_t& tile, payload_t& payload) {
using dtype = typename tile_t::dtype;
- using tile_desc = typename payload_t::tile_desc;
- using store_dtype = typename payload_t::mem_dtype;
-
... | using mem_dtype = payload_t::mem_dtype;
static constexpr uint32_t max_store_vec_elems = max_store_vec_len / sizeof(mem_dtype); |
neural-speed | github_2023 | cpp | 261 | intel | JianpingChen066 | @@ -1003,40 +1000,36 @@ __XETLA_API typename std::enable_if_t<
tile_t::tile_size_y == 1 && tile_t::block_size_y == 1>
tile_store(tile_t& tile, payload_t& payload) {
using dtype = typename tile_t::dtype;
- using tile_desc = typename payload_t::tile_desc;
- using store_dtype = typename payload_t::mem_dtype;
-
... | then scale_factor still can be kept ? |
neural-speed | github_2023 | cpp | 261 | intel | JianpingChen066 | @@ -24,6 +24,150 @@
namespace gpu::xetla::subgroup {
/// @brief Is the tile mma operation functor, specialized for Xe and fpu engine.
+template <
+ typename matAcc_t_,
+ typename matC_t_,
+ typename matB_t_,
+ typename matA_t_,
+ gpu_arch arch_tag_>
+struct tile_fma_t { | May you consider add a new reg_layout as col_major_tiled, thus make this enabled as:
template <
typename matAcc_dst_t_,
typename matAcc_src_t_,
typename matB_t_,
typename matA_t_,
gpu_arch arch_tag_>
struct tile_mma_t<
matAcc_dst_t_,
matAcc_src_t_,
matB_t_,
matA_t_,
m... |
neural-speed | github_2023 | others | 272 | intel | zhentaoyu | @@ -36,9 +36,10 @@ endif()
if(NOT WIN32)
target_link_libraries(ne_layers PUBLIC rt)
else()
- target_link_options(ne_layers PUBLIC /STACK:5242880)
+ target_link_options(ne_layers PUBLIC /STACK:5242880 /F5242880) | Sorry, what does `/STACK:5242880 /F5242880` mean? |
neural-speed | github_2023 | cpp | 272 | intel | zhentaoyu | @@ -162,3 +162,128 @@ void bestla_add(int batch, int vsize, const float* tensor, const float* vector,
pth->parallel_for(threadfunc);
}
}
+
+static inline bool ne_is_contiguous(const struct ne_tensor* tensor) {
+ static_assert(NE_MAX_DIMS == 4, "NE_MAX_DIMS is not 4 - update this function");
+ return tensor->... | typo? `src_on_device`? |
neural-speed | github_2023 | cpp | 292 | intel | github-advanced-security[bot] | @@ -224,48 +224,47 @@
int rawnk_scale = utils::updiv(K, stor->mBlockSize);
int nk_scale = utils::updiv(stor->mKPad, stor->mBlockSize);
parallel::Scheduler2D _para({threading->num_threads(), 1, nk_scale, 1, 1});
- if (stor->SDtype() == BTLA_DTYPE::F32) { // fp32 to fp32 direct copy
+ if (stor->SDty... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/400) |
neural-speed | github_2023 | cpp | 292 | intel | github-advanced-security[bot] | @@ -224,48 +224,47 @@
int rawnk_scale = utils::updiv(K, stor->mBlockSize);
int nk_scale = utils::updiv(stor->mKPad, stor->mBlockSize);
parallel::Scheduler2D _para({threading->num_threads(), 1, nk_scale, 1, 1});
- if (stor->SDtype() == BTLA_DTYPE::F32) { // fp32 to fp32 direct copy
+ if (stor->SDty... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/401) |
neural-speed | github_2023 | cpp | 292 | intel | github-advanced-security[bot] | @@ -224,48 +224,47 @@
int rawnk_scale = utils::updiv(K, stor->mBlockSize);
int nk_scale = utils::updiv(stor->mKPad, stor->mBlockSize);
parallel::Scheduler2D _para({threading->num_threads(), 1, nk_scale, 1, 1});
- if (stor->SDtype() == BTLA_DTYPE::F32) { // fp32 to fp32 direct copy
+ if (stor->SDty... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/402) |
neural-speed | github_2023 | python | 294 | intel | zhentaoyu | @@ -561,7 +561,7 @@ def chatglm4_convert(model, tokenizer, dir_model, fname_out, ftype, hparams):
fout.write(struct.pack("i", 0)) # n_embd_head_k for gemma
fout.write(struct.pack("f", hparams.get("layernorm_epsilon", 1e-5))) # rms_norm_eps or layer_norm_eps
fout.write(struct.pack("f", 10000.0)) # freq_... | what is the issue of the original code? |
neural-speed | github_2023 | python | 291 | intel | a32543254 | @@ -95,7 +95,12 @@ def _get_model_type(model_config):
if model_type == "chatglm" and "chatglm3" in model_config._name_or_path:
# due to the same model architecture.
model_type = "chatglm2"
-
+ # For ChatGLM3
+ if model_type == "chatglm" and "glm-4" in model_config._name_or_path:
+ # ... | remove pdb |
neural-speed | github_2023 | cpp | 291 | intel | a32543254 | @@ -31,6 +31,12 @@ static const model_scratch chatglm_mem_req(int n_layers, float scratch_size_rati
static_cast<unsigned long long>(scratch_size_ratio * 2048) * MB,
static_cast<unsigned long long>(scratch_size_ratio * 4096) * MB,
};
+ case 40:
+ return {
+ static_cast<unsig... | could this memory accept 4k input ? or 2 k input ? |
neural-speed | github_2023 | python | 291 | intel | zhentaoyu | @@ -95,7 +95,10 @@ def _get_model_type(model_config):
if model_type == "chatglm" and "chatglm3" in model_config._name_or_path:
# due to the same model architecture.
model_type = "chatglm2"
-
+ # For GLM4
+ if model_type == "chatglm" and "glm-4" in model_config._name_or_path:
+ # due ... | Please also update this `model_type` in https://github.com/intel/neural-speed/blob/main/scripts/huggingface.py#L401. Otherwise, it will breke the ACC test for `GLM4` |
neural-speed | github_2023 | python | 291 | intel | zhentaoyu | @@ -973,7 +1115,9 @@ def main(args_in: Optional[List[str]] = None) -> None:
# ChatGLM3 shares the same architecture and model config with ChatGLM2
# but its tokenizer further supports system prompts,
# so we can check system token to discriminate ChatGLM3 from ChatGLM2.
- if hasattr(tokenizer, "tokeni... | please add some annotations here to explain why using this `if-statement` to choose related converting functions. |
neural-speed | github_2023 | cpp | 282 | intel | github-advanced-security[bot] | @@ -1251,23 +1281,35 @@
auto vdzp = _mm512_set1_epi32(zp);
int sum = 0;
ij = 0;
- for (; ij < vblocksize; ij += VLen) {
- __m512 vsrc;
- if constexpr (std::is_same_v<SRC_T, float>) vsrc = _mm512_loadu_ps(&srcptr[(j + ij) + i * ld_src]);
- if constexpr (std::is_same_v<SRC_T... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/398) |
neural-speed | github_2023 | cpp | 282 | intel | github-advanced-security[bot] | @@ -1251,23 +1281,35 @@
auto vdzp = _mm512_set1_epi32(zp);
int sum = 0;
ij = 0;
- for (; ij < vblocksize; ij += VLen) {
- __m512 vsrc;
- if constexpr (std::is_same_v<SRC_T, float>) vsrc = _mm512_loadu_ps(&srcptr[(j + ij) + i * ld_src]);
- if constexpr (std::is_same_v<SRC_T... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/399) |
neural-speed | github_2023 | cpp | 281 | intel | github-advanced-security[bot] | @@ -267,9 +271,9 @@
// V_trans = Vmem.view(n_embd/n_head, n_head, n_past + N).permute(1, 2, 0, 3).contiguous()
struct ne_tensor* V =
- ne_view_4d(ctx0, kv_self.v, n_past + N, head_dim, n_head, batch_size, n_ctx * ne_element_size(kv_self.v),
- n_ctx * ne_element_size(... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/392) |
neural-speed | github_2023 | cpp | 281 | intel | github-advanced-security[bot] | @@ -216,29 +218,31 @@
std::vector<ne_tensor*> v_bs(batch_size);
for (int i = 0; i < batch_size; ++i) {
// batch K
- Kcur_bs[i] = ne_permute(ctx0,
- ne_view_4d(ctx0, Kcur, head_dim, n_head, N, 1, ne_element_size(Kcur) * head_dim,
- ... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/393) |
neural-speed | github_2023 | cpp | 281 | intel | github-advanced-security[bot] | @@ -247,10 +251,10 @@
struct ne_tensor* Q = ne_permute(ctx0, ne_reshape_4d(ctx0, Qcur, head_dim, n_head, N, batch_size), 0, 2, 1, 3);
// K = Kmem.view(n_embd/n_head, n_head, n_past + N).permute(0, 2, 1, 3)
- struct ne_tensor* K =
- ne_view_4d(ctx0, kv_self.k, head_dim, n_past + N, ... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/396) |
neural-speed | github_2023 | cpp | 281 | intel | github-advanced-security[bot] | @@ -216,29 +218,31 @@
std::vector<ne_tensor*> v_bs(batch_size);
for (int i = 0; i < batch_size; ++i) {
// batch K
- Kcur_bs[i] = ne_permute(ctx0,
- ne_view_4d(ctx0, Kcur, head_dim, n_head, N, 1, ne_element_size(Kcur) * head_dim,
- ... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/397) |
neural-speed | github_2023 | cpp | 281 | intel | a32543254 | @@ -44,6 +44,18 @@ static const model_scratch qwen_mem_req(int n_layers, float scratch_size_ratio =
static_cast<unsigned long long>(scratch_size_ratio * 2048) * MB,
static_cast<unsigned long long>(scratch_size_ratio * 4096) * MB,
};
+ case 28:
+ return {
+ static_cast<unsig... | will times 10 compare to 28 layer is too large ? |
neural-speed | github_2023 | cpp | 274 | intel | github-advanced-security[bot] | @@ -1035,47 +1057,216 @@
*dststep = k_size;
return BTLA_CODE::Success;
}
-
- virtual inline void quantRowBlock(const float* srcptr, int8_t* dstptr, int row, int col, int ld_src, int ld_dst,
- float* scales, int8_t* zero_points, void* stor) {
- auto ptr = reinterpret_c... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/385) |
neural-speed | github_2023 | cpp | 274 | intel | github-advanced-security[bot] | @@ -1035,47 +1057,216 @@
*dststep = k_size;
return BTLA_CODE::Success;
}
-
- virtual inline void quantRowBlock(const float* srcptr, int8_t* dstptr, int row, int col, int ld_src, int ld_dst,
- float* scales, int8_t* zero_points, void* stor) {
- auto ptr = reinterpret_c... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/387) |
neural-speed | github_2023 | cpp | 274 | intel | github-advanced-security[bot] | @@ -1035,47 +1057,216 @@
*dststep = k_size;
return BTLA_CODE::Success;
}
-
- virtual inline void quantRowBlock(const float* srcptr, int8_t* dstptr, int row, int col, int ld_src, int ld_dst,
- float* scales, int8_t* zero_points, void* stor) {
- auto ptr = reinterpret_c... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/389) |
neural-speed | github_2023 | cpp | 271 | intel | github-advanced-security[bot] | @@ -542,8 +544,9 @@
} else {
mBlock[1] = mThdSize[1];
}
- auto rawk = static_cast<int>((valid_total - mBlock[0] * mBlock[1] * mEleSize[2]) /
- (mStep[0] * mEleSize[0] + mBlock[1] * mEleSize[1]));
+ bsize = KRef * mBlock[1] * mEleSize[1] * 2;
+ size_t csize = mBl... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/383) |
neural-speed | github_2023 | cpp | 271 | intel | github-advanced-security[bot] | @@ -818,14 +634,14 @@
} else {
this->mBlock[1] = this->mThdSize[1];
}
- auto rawk = static_cast<int>((valid_total - this->mBlock[0] * this->mBlock[1] * this->mEleSize[2]) /
+ auto rawk = static_cast<int>((valid_total - this->mBlock[0] * this->mBlock[1] * this->mEleSize[2]) / 2 / | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/384) |
neural-speed | github_2023 | cpp | 271 | intel | yuchengliu1 | @@ -6634,10 +6634,57 @@ static inline BTLA_CODE gemv_7bit_s8s8_fp32(const utils::GemvParamA& A, const ut
#endif
} // namespace vnni
+template <typename T>
+static inline BTLA_CODE mul(const T* src0ptr, const T* src1ptr, T* dstptr, size_t size) {
+ int constexpr VLen = 8;
+ size_t velt = utils::padto_le(size, VLe... | Should ref::add be used here? |
neural-speed | github_2023 | cpp | 270 | intel | a32543254 | @@ -20,6 +20,7 @@
enum llama_model {
LLAMA_UNKNOWN,
+ Tiny_llama, | better all letter capital in enum |
neural-speed | github_2023 | others | 239 | intel | zhentaoyu | @@ -1,3 +1,5 @@
+gguf | it has already been added in setup.py. please remove it. |
neural-speed | github_2023 | others | 239 | intel | zhentaoyu | @@ -139,6 +145,7 @@ function main() {
NEURAL_SPEED_VERBOSE=1 OMP_NUM_THREADS=$(($cores_per_instance * 1)) numactl -m 0 -C 0-$(($cores_per_instance * 1 - 1)) \
$infer_cmd --seed 1234 -t $cores_per_instance -b 2047 -c ${ctx} -n ${output} -m ${model}-${precision}.bin -p "$prom... | only ”llama" and "gpt-j" support batch_size > 1. We may need a filter. |
neural-speed | github_2023 | cpp | 259 | intel | github-advanced-security[bot] | @@ -733,11 +755,10 @@
auto sptr = wptr->template SPtr<void>();
int8_t* bit3_ptr = wptr->template WPtr<int8_t>();
auto elt_offset = n_offset * KPad + k_offset * _GemmCore_T::NTILE + i * KPad;
- auto ld_dst = _GemmCore_T::NTILE * KPad;
- auto row = NPad / _GemmCore_T::NTILE;
... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/379) |
neural-speed | github_2023 | cpp | 259 | intel | github-advanced-security[bot] | @@ -756,9 +777,18 @@
kernel::wrapper::DecompressKBlockS8Fp<_GemmCore_T::PACK_ROW, _GemmCore_T::NTILE, _T>::template forward<ISA_T>(
bptr, *dstptr + i * k_size, k_size, _GemmCore_T::NTILE, sptr, wptr->SDtype(), zptr, k_offset, n_offset + i,
wptr->mBlockSize, NPad, tmpcache, cachesize);... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/380) |
neural-speed | github_2023 | cpp | 259 | intel | github-advanced-security[bot] | @@ -804,15 +834,13 @@
auto zpptr = wptr->template ZPtr<int8_t>();
auto KPad = wptr->mKPad;
auto NPad = wptr->mNPad;
- int constexpr ColSize = _GemmCore_T::NTILE * _GemmCore_T::PACK_ROW;
- auto row = NPad / _GemmCore_T::NTILE;
- auto ld_dst = _GemmCore_T::NTILE * KPad;
+ size_t bit1_offset = N... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/381) |
neural-speed | github_2023 | cpp | 259 | intel | github-advanced-security[bot] | @@ -821,6 +849,28 @@
return BTLA_CODE::Success;
}
+ static inline BTLA_CODE getQ5Weight(int8_t** dstptr, int* dststep, int k_size, int n_size, int k_offset, int n_offset,
+ const Param& _param, void* tmpcache, size_t cachesize) {
+ auto wptr = _param.packedW;
+ int8... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/382) |
neural-speed | github_2023 | others | 103 | intel | airMeng | @@ -4,7 +4,7 @@ project(bestla LANGUAGES CXX VERSION 0.1.0)
file(GLOB headers ${PROJECT_NAME}/*.h ${PROJECT_NAME}/*.hpp)
file(GLOB xbyak_headers ${PROJECT_NAME}/xbyak/*.h ${PROJECT_NAME}/xbyak/*.hpp)
-option(BTLA_USE_OPENMP "Enable OpenMP thread pool" ON)
+option(BTLA_USE_OPENMP "Enable OpenMP thread pool" OFF) | we already have a customized threadpool implemented? |
neural-speed | github_2023 | others | 55 | intel | airMeng | @@ -13,6 +13,14 @@
# limitations under the License.
file(GLOB MODEL_UTILS_SOURCE "model_utils/*.cpp")
+
+function(add_model)
+ add_library_w_warning(${TARGET} ${ModelSrcs}) # no (gpt) model utils needed | shall ```ModelSrcs``` passed as variables instead of assuming it will always be defined otherwhere. |
neural-speed | github_2023 | cpp | 51 | intel | airMeng | @@ -135,10 +135,7 @@ enum gguf_type {
};
static const char* GGUF_TYPE_NAME[GGUF_TYPE_COUNT] = {
- [GGUF_TYPE_UINT8] = "u8", [GGUF_TYPE_INT8] = "i8", [GGUF_TYPE_UINT16] = "u16", [GGUF_TYPE_INT16] = "i16",
- [GGUF_TYPE_UINT32] = "u32", [GGUF_TYPE_INT32] = "i32", [GGUF_TYPE_FLOAT32] = "f32", [GGUF_TYPE_BO... | which warning here is? |
neural-speed | github_2023 | others | 209 | intel | zhewang1-intc | @@ -40,6 +40,7 @@ if(BTLA_SYCL)
file(GLOB sycl_headers ${PROJECT_NAME}/sycl/*.h ${PROJECT_NAME}/sycl/*.hpp)
add_compile_definitions(BTLA_SYCL)
list(APPEND sycl_libs IntelSYCL::SYCL_CXX)
+ add_compile_options(-march=native) | will this change make bestla contain some instructions which customers' machines don't support?
e.g. we compile & release the package by spr/emr, but user use Core processor to use bestla. |
neural-speed | github_2023 | cpp | 209 | intel | zhewang1-intc | @@ -486,8 +485,8 @@ class WeightKBlockNInteger {
for (size_t i = thdp.loc[0]; i < thdp.loc[0] + thdp.size[0]; i++) {
for (size_t j = thdp.loc[1]; j < thdp.loc[1] + thdp.size[1]; j += 2) {
auto src = *(B + i * ldb / 2 + j / 2);
- s8ptr[(j + 0) * N + i] = ((src ... | this mean we should modify all repack pre-process codes right? and looks like we should recover the sign when we decompress, why we change to this? |
neural-speed | github_2023 | cpp | 209 | intel | zhewang1-intc | @@ -26,12 +26,15 @@ namespace ne_bestla {
class ne_threading {
public:
static bestla::parallel::IThreading* get() {
+ GetCPUDevice();
+ static bestla::parallel::StdThreading OptmizedThreading;
#ifdef NS_USE_OMP
- static bestla::parallel::OMPThreading DefaultThreading(4);
-#else
- static bestla::paral... | emm, if user uses hybrid CPUs but they only launch P-Core, will this choose affect performance? |
neural-speed | github_2023 | cpp | 242 | intel | DDEle | @@ -83,74 +87,114 @@ struct load_store_attr_t<msg_type::block_2d, gpu_arch::XeLpg>
msg_type::block_2d,
gpu_arch::XeLpg> {};
+template <gpu_arch arch_tag>
+inline constexpr bool arch_has_2d_load_store() {
+ using block2d_attr = load_store_attr_t<msg_type::block_2d, arch_tag>;
+ return block2d_a... | Then maybe remove here
https://github.com/intel/neural-speed/blob/53093e5480475076764ff10637ca67eb5e65155b/include/common/core/common_types.hpp#L25-L30
Similar for `arch_has_xmx` |
neural-speed | github_2023 | cpp | 256 | intel | luoyu-intel | @@ -115,20 +115,22 @@ struct register_attr_t {};
template <grf_mode grf_num_mode, gpu_arch arch_tag>
struct client_register_attr_base_t {
+ static constexpr uint32_t reg_in_bytes = 32; | iGPU is different? |
neural-speed | github_2023 | cpp | 256 | intel | luoyu-intel | @@ -79,7 +79,7 @@ template <
typename payload_t>
__XETLA_API typename std::enable_if_t<
detail::check_load_type<tile_t, payload_t>::is_global_block_2d &&
- arch_has_2d_load_store(payload_t::arch_tag)>
+ payload_t::arch_tag == gpu_arch::XeHpc> | I think arch_has_2d_load_store(payload_t::arch_tag) is better than a fixed tag condition |
neural-speed | github_2023 | cpp | 256 | intel | JianpingChen066 | @@ -288,6 +307,57 @@ __XETLA_API void xetla_prefetch_global(Ty* p, uint64_t offset = 0) {
gpu::xetla::detail::get_cache_hint(L2H)>((T*)p + (offset / sizeof(T)));
}
+/// simd<T, N> block_load(const T* ptr, size_t byte_offset, | is this modification need to be controlled by the different compiler version ? |
neural-speed | github_2023 | cpp | 256 | intel | JianpingChen066 | @@ -544,6 +547,61 @@ tile_store(tile_t& tile, payload_t& payload) {
}
}
+/// @brief Is the func storing data from register file to unaligned global
+/// memory surface. store a rectangular region (X,Y)..(X+W,Y+H) into memory from
+/// registers.
+/// @tparam tile_t Is the tile_t struct contains registers
+/// The... | is this can be replaced by " ! arch_has_2d_load_store<payload_T::arch_tag>" ? |
neural-speed | github_2023 | cpp | 256 | intel | DDEle | @@ -98,6 +98,9 @@ void gemm_exec(const std::string& compile_str, size_t batch = 1) {
device,
context);
+ size_t ops = 2 * matrix_m * matrix_n * matrix_k;
+ profiling_helper prof("gemm", ops, "gflops");
+ | That is the "ops" used before? |
neural-speed | github_2023 | cpp | 256 | intel | DDEle | @@ -147,31 +152,41 @@ void gemm_exec(const std::string& compile_str, size_t batch = 1) {
result = test_result::skip;
break;
}
-
- auto e_esimd = queue.submit([&](handler& cgh) {
- cgh.use_kernel_bundle(exeBundle);
- cgh.parallel_for<Test>(nd_range, [=](nd_item<3> item) KERNEL... | How did we profile before? and why add it here this time? |
neural-speed | github_2023 | cpp | 256 | intel | DDEle | @@ -1090,38 +1017,28 @@ TYPED_TEST_P(dequantize_gemm_test, esimd) {
}
REGISTER_TYPED_TEST_SUITE_P(dequantize_gemm_test, esimd);
-using tests = ::testing::Types<
- test1_gpu_xelpg,
- test2_gpu_xelpg,
- test3_gpu_xelpg,
- test4_gpu_xelpg,
- test5_gpu_xelpg,
- test6_gpu_xelpg,
- test7_gpu_xelpg,
-... | Recover shuf test |
neural-speed | github_2023 | cpp | 256 | intel | DDEle | @@ -992,15 +919,15 @@ void dequantize_gemm_run(int iter) {
epilogue_args);
cl::sycl::nd_range<3> nd_range = gemm_op_t::get_nd_range(gemm_arg);
- if (!gemm_op_t::can_implement(gemm_arg)) {
- std::cout << "The arguments cannot be supported, aborting ... "
- << std::endl;
- ... | recover arg checking |
neural-speed | github_2023 | cpp | 256 | intel | zhewang1-intc | @@ -55,6 +55,25 @@ elemwise_cvt(T_dst& dst, T_src& src) {
}
}
+template <typename T_dst, typename T_src>
+__XETLA_API typename std::enable_if_t<
+ std::is_same<mx_fp4, typename T_dst::dtype>::value>
+elemwise_cvt(T_dst& dst, T_src& src) { | where these codes come from...
I think this can't work at first glance since I don't notice the code which support T_src => mx_fp4 convertion. |
neural-speed | github_2023 | cpp | 256 | intel | zhewang1-intc | @@ -55,6 +55,141 @@ using fp16 = sycl::half;
///
using tf32 = sycl::ext::intel::experimental::esimd::tfloat32;
+/// @brief mx_fp4(E2M1) data packed as 8bits data type.
+struct mx_fp4 {
+ uint8_t data;
+ operator uint8_t() const {
+ return data;
+ }
+ mx_fp4() = default;
+ mx_fp4(uint8_t val) {
+ data = v... | this mean dpc++ compiler supports some experimental data-type natively?
what's the dpc++ compiler version since supports these data-type?
how could we get the all experimental data-type list? |
neural-speed | github_2023 | others | 256 | intel | airMeng | @@ -1,25 +1,6 @@
set(TARGET stream_k_gemm)
-set(XETLA_KERNEL_FLAGS ${XETLA_KERNEL_FLAGS} -fsycl) | why only update this example? |
neural-speed | github_2023 | cpp | 256 | intel | airMeng | @@ -188,41 +198,47 @@ struct mma_attr_t<arch_tag, m, std::enable_if_t<!arch_has_xmx<arch_tag>>> {
template <gpu_arch arch_tag>
struct arch_attr_t {};
-template <gpu_arch arch_tag>
-struct client_arch_attr_base_t {
+template <>
+struct arch_attr_t<gpu_arch::XeHpc> {
template <msg_type message_type = msg_type::blo... | what is the difference between hpg and lpg? |
neural-speed | github_2023 | python | 253 | intel | a32543254 | @@ -20,14 +20,15 @@
# This script is similar to "convert-pt-to-ne.py"
#
import os
+import sys
import struct
import numpy as np
from pathlib import Path
import argparse
from typing import (IO, TYPE_CHECKING, Any, Callable, Dict, Iterable, List, Literal, Optional, Sequence, Tuple, TypeVar,
Un... | why we remove the support of gguf ?
|
neural-speed | github_2023 | cpp | 253 | intel | a32543254 | @@ -309,9 +315,13 @@ static bool stablelm_model_eval_internal(model_context* ctx, const model_input*
{
// Post Attention norm
{
- cur = ne_norm(ctx0, cur, hparams.norm_eps);
- cur = ne_mul(ctx0, cur, model.layers[il].norm[2]);
- cur = ne_add(ctx0, cur, model.layers[il].norm[3]);
... | why when layer is equal and large than 40, the Post Attention norm will be changed? |
neural-speed | github_2023 | python | 253 | intel | zhentaoyu | @@ -223,45 +146,72 @@ def stablelm_convert(model, tokenizer, dir_model, fname_out, ftype, hparams):
fout.write(text)
fout.write(struct.pack("f", -10000))
- list_vars = model.state_dict()
+ def write_header(name, data, ftype=0):
+ str = name.encode('utf-8')
+ n_dims = len(... | could you please explain these codes? I'm a bit confused about the `qk_norm` stacking way. |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'int64_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/367) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/368) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/369) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/370) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'unsigned long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/372) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'int64_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/373) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_t'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/374) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_type'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/375) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,418 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'size_type'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/376) |
neural-speed | github_2023 | cpp | 244 | intel | github-advanced-security[bot] | @@ -0,0 +1,408 @@
+// Copyright (c) 2023 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | ## Multiplication result converted to larger type
Multiplication result may overflow 'int' before it is converted to 'long'.
[Show more details](https://github.com/intel/neural-speed/security/code-scanning/377) |
neural-speed | github_2023 | python | 244 | intel | a32543254 | @@ -0,0 +1,192 @@
+# Copyright (c) 2024 Intel Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by... | could freq_base read from config.json ?
like:
hparams.get("freq_base ", 1e-5) |
neural-speed | github_2023 | c | 244 | intel | a32543254 | @@ -9040,6 +9047,38 @@ static void ne_compute_forward_rope_f32(const struct ne_compute_params* params,
dst_data[n_dims] = x2 * cos_block_theta - x3 * sin_block_theta;
dst_data[n_dims / 2 * 3] = x2 * sin_block_theta + x3 * cos_block_theta;
}
+ } else if (is_longrope) {
+ ... | this is probably wrong, but I can't figure it out
what is the mean of this ？ |
neural-speed | github_2023 | c | 244 | intel | a32543254 | @@ -9203,7 +9242,31 @@ static void ne_compute_forward_rope_f16(const struct ne_compute_params* params,
float theta = freq_scale * (float)p;
- if (!is_neox) {
+ if (is_longrope) {
+ float scale_factor = 1.1902380714238083; | this value is from paper or could also get from config ？ |
neural-speed | github_2023 | cpp | 172 | intel | zhewang1-intc | @@ -181,7 +181,14 @@ static inline BTLA_CODE compress_f4(const int8_t* srcptr, utils::f4x2* dstptr, i
static inline BTLA_CODE compress_3bit(const int8_t* srcptr, bestla::utils::bit2x4* bit2ptr, utils::bit1x8* bit1ptr,
int row, int col, int ld_src, int ld_dst) {
assert(col % 12... | thanks for correcting my mistake. |
neural-speed | github_2023 | cpp | 172 | intel | airMeng | @@ -181,7 +181,14 @@ static inline BTLA_CODE compress_f4(const int8_t* srcptr, utils::f4x2* dstptr, i
static inline BTLA_CODE compress_3bit(const int8_t* srcptr, bestla::utils::bit2x4* bit2ptr, utils::bit1x8* bit1ptr,
int row, int col, int ld_src, int ld_dst) {
assert(col % 12... | why ```+16```, ```-16```? |
neural-speed | github_2023 | cpp | 235 | intel | airMeng | @@ -0,0 +1,152 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | why gpu_arch is limited? |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,152 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | Encapsulate the esimd interface in memory.hpp |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,152 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | ```suggestion
subgroup::msg_type_v<store_tile_desc_t, dtype_out>,
``` |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,152 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | Use encapsulated interfaces. This esimd interface has been encapsulated in the origin/xetla_trans_matB branch. You can synchronize the two files load_xe /store_xe |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,145 @@
+/*******************************************************************************
+ * Copyright (c) 2022-2023 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | add profling |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,45 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the L... | col_major_shuf_attr_This parameter need described in detail |
neural-speed | github_2023 | cpp | 235 | intel | sunjiweiswift | @@ -0,0 +1,152 @@
+/*******************************************************************************
+ * Copyright (c) 2023-2024 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the ... | Is int8 not allowed? |
neural-speed | github_2023 | python | 234 | intel | zhentaoyu | @@ -149,7 +149,7 @@ def __init__(
self.model_format = model_format
if self.model_format == "neural_speed":
self.use_quant=True
- if weight_dtype=="fp32":
+ if weight_dtype=="fp32" and use_autoround==False and use_gptq==False and use_awq==False: | Thes `use_xxx` args will be removed later. So please avoid relying on them too much. |
neural-speed | github_2023 | python | 228 | intel | a32543254 | @@ -109,105 +117,232 @@ def main(args_in: Optional[List[str]] = None) -> None:
model, config, quantize_config = load_quantized_safetensors(model_path)
f = open(out_path, "wb")
- # 1. write hparams
- n_vocab = config["vocab_size"]
- n_embd = config["hidden_size"]
- n_layer = config["num_hidden_la... | what if we get a lm_head.weight dtype = fp16 llama3 model ? |
neural-speed | github_2023 | c | 201 | intel | zhentaoyu | @@ -707,6 +709,9 @@ static inline int ne_up(int n, int m) {
return (n + m - 1) & ~(m - 1);
}
+// static inline void ne_vec_tanh_f32 (const int n, float * y, const float * x) { for (int i = 0; i < n; ++i) y[i] = | why disable this function? |
neural-speed | github_2023 | cpp | 201 | intel | zhentaoyu | @@ -0,0 +1,255 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | `lctx.n_ctx`? |
neural-speed | github_2023 | cpp | 201 | intel | Zhenzhong1 | @@ -0,0 +1,53 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless req... | static_cast<unsigned long long>(scratch_size_ratio * 4096) * MB,
static_cast<unsigned long long>(scratch_size_ratio * 2048) * MB,
static_cast<unsigned long long>(scratch_size_ratio * 4096 * 10) * MB,
can we use this policy to keep the same as other models? |
neural-speed | github_2023 | cpp | 201 | intel | Zhenzhong1 | @@ -0,0 +1,255 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | please remove unused parameters |
neural-speed | github_2023 | cpp | 201 | intel | Zhenzhong1 | @@ -0,0 +1,255 @@
+// Copyright (c) 2024 Intel Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless re... | please print these used parameters. |
neural-speed | github_2023 | python | 217 | intel | zhentaoyu | @@ -13,27 +13,32 @@
# limitations under the License.
import sys
import argparse
-from evaluator import evaluate
+from ns_evaluator import LMEvalParser
+from accuracy import cli_evaluate
if __name__ == "__main__":
parser = argparse.ArgumentParser(description="Evaluate accuracy for a model")
parser.add_a... | I suggest adding more quant args (like `weight_dtype`, `group_size`, etc.) here so that we can evaluate any kind of quantized ns model. cc @a32543254 |
neural-speed | github_2023 | python | 217 | intel | zhentaoyu | @@ -62,848 +88,1024 @@ def _get_accelerate_args(
return args
-def _get_dtype(
- dtype: Union[str, torch.dtype], config: Optional[transformers.AutoConfig] = None
-) -> torch.dtype:
- """Converts `dtype` from `str` to torch.dtype when possible."""
- if dtype is None and config is not None:
- _tor... | as mentioned above, we can get quant args from `kwargs` |
neural-speed | github_2023 | python | 217 | intel | zhentaoyu | @@ -13,27 +13,32 @@
# limitations under the License.
import sys
import argparse
-from evaluator import evaluate
+from ns_evaluator import LMEvalParser
+from accuracy import cli_evaluate
if __name__ == "__main__":
parser = argparse.ArgumentParser(description="Evaluate accuracy for a model")
parser.add_a... | I think we don't need this, right? Since we only measure our `NS` format model? |
neural-speed | github_2023 | others | 217 | intel | zhentaoyu | @@ -499,9 +492,21 @@ index 894be0134d..a9a57c0a9e 100644
{
m.doc() = "cpp model python binding";
```
+# 3. Accuracy evaluation
+## 3.1 Evaluate llm model in neural speed by lm_eval
+We can use this python script for accuracy evaluation.
+```
+python scripts/cal_acc.py --model hf_model --tasks piqa --group_size 3... | update table of https://huggingface.co/Intel/neural-chat-7b-v3-3-int4-inc and let user know our acc script and inference has no problem. |
neural-speed | github_2023 | others | 217 | intel | zhentaoyu | @@ -499,9 +492,22 @@ index 894be0134d..a9a57c0a9e 100644
{
m.doc() = "cpp model python binding";
```
+# 3. Accuracy evaluation
+## 3.1 Evaluate llm model in neural speed by lm_eval
+We can use this python script for accuracy evaluation.
+```
+python scripts/cal_acc.py --model hf_model --tasks lambada_openai,bool... | better to also mention the `NS` version or commit-id |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -69,6 +69,26 @@ struct load_store_attr_t<msg_type::block_2d, gpu_arch::Dg2> {
static constexpr uint32_t cache_line_size_in_bytes = 64;
static constexpr uint32_t alignment_in_bytes = 8;
};
+template <> | many attrs are totally same as Dg2, i think we should reuse some Dg2 attr codes, i will have a try. |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -31,23 +31,28 @@ enum quant_mode { S4_ASYM, S4_FULLRANGE_NO_ZP };
/// @tparam arch_tag_ Is the HW architecture.
template <typename compute_attr_, typename perf_tuning_knob_,
typename dtype_scale_, typename dtype_zero_pt_, quant_mode quant_type_,
- int dequant_s_, gpu_arch arch_tag_ = gpu_arch::Xe,
... | suggest to change
static_assert(!(mma_engine==xmx&&arg_tag==igpu)) |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -112,6 +113,8 @@ class gemm_t<compute_policy_int4_dequantize_xmx<compute_attr_,
static constexpr uint32_t tile_size_y_c = sg_tile_m;
static constexpr uint32_t block_size_x_a
= compute_policy::block_bytes_x_a / sizeof(dtype_mma_a);
+ static_assert(block_size_x_a == 16); | why add this assert? |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -407,6 +415,19 @@ class gemm_t<compute_policy_int4_dequantize_xmx<compute_attr_,
}
subgroup::tile_load<cache_hint::cached, cache_hint::cached>(
matA, matA_payload);
+ // sycl::ext::oneapi::experimental::printf("Mat A load :\n "); | i guess we can make these debug codes as a debug func? |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -353,6 +356,21 @@ class gemm_t<
}
private:
+ inline void reorder_matA(matA_t &matA) {
+ constexpr uint32_t num_block_x = tile_size_x_a / block_size_x_a;
+ constexpr uint32_t num_block_y = tile_size_y_a / block_size_y_a;
+ for (int i = 0; i < num_block_y * num_block_x; i++) {
+ ... | we should add assert(block_size_y_a==block_size_x_a) here. |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -461,6 +461,37 @@ vnni_transform(T_dst &dst, T_src &src) {
dst.reg = reg_dst;
}
+/// @brief Converts tiled layout to transpose_tiled layout.
+///
+/// @tparam T Is the tile data type.
+/// @param mat_Acc Is the reference of the tile object.
+/// @return No return, update the data in-place.
+template <typena... | as above comment in reorder_matA |
neural-speed | github_2023 | cpp | 176 | intel | zhewang1-intc | @@ -668,8 +668,9 @@ struct mem_payload_t<
base_y = mem_tdesc.coord.y;
width_in_elems = mem_tdesc.shape.x;
height_in_elems = mem_tdesc.shape.y;
- base_offset = trans ? base_x * pitch_in_bytes + base_y * sizeof(dtype)
- : base_y * pitch_in_bytes + base_x * size... | will this change(trans => mem_transpose) affect xetla correctness on PVC? |
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