Add missing snapshots (batch 12/24)

.gitattributes

@@ -806,3 +806,19 @@ Repos/HWE/agents/Lingxi/docs/Lingxi[[:space:]]v1.5[[:space:]]Technical[[:space:]
 Repos/HWE/agents/Lingxi/docs/Lingxi[[:space:]]v2.0[[:space:]]Technical[[:space:]]Report[[:space:]]2026.pdf filter=lfs diff=lfs merge=lfs -text
 Repos/HWE/agents/Lingxi/imgs/overview_fig.pdf filter=lfs diff=lfs merge=lfs -text
 patches/esa-tu-darmstadt_tapasco_pr105.patch filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/aliens/doc/051937_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/aliens/doc/051960_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/aliens/doc/052591/k052591_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/aliens/doc/k051962_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/aliens/doc/k052109_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/contra/doc/007121.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/pinpon/doc/Konami's[[:space:]]Ping[[:space:]]Pong[[:space:]]Report.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/s16b/doc/315-5195_schematics.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/simson/doc/053251.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/cores/simson/doc/k053260_schematics.PDF filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/doc/articulo.odt filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/doc/dd2/Double[[:space:]]Dragon[[:space:]]2[[:space:]]pcb.m4a filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/doc/mame.xml filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/modules/jtframe/asm/z80/tiny_basic_instructions.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/modules/jtframe/doc/93c06.pdf filter=lfs diff=lfs merge=lfs -text
+snapshots/jotego_jtcores_pr854/modules/jtframe/doc/T48[[:space:]]Integration[[:space:]]Manual.pdf filter=lfs diff=lfs merge=lfs -text

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/mra.go

@@ -0,0 +1,252 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"encoding/xml"
+	"fmt"
+	"os"
+	"path/filepath"
+	"slices"
+	"strings"
+
+	"github.com/spf13/cobra"
+)
+
+var mra_args struct{
+	zip, core, main_only *bool
+}
+
+// mraCmd represents the mra command
+var mraCmd = &cobra.Command{
+	Use:   "mra",
+	Short: "MRA inspection utilities",
+	Long: `List zip files used in JTBIN's .mra files`,
+	Run: runMRA,
+}
+
+func init() {
+	rootCmd.AddCommand(mraCmd)
+
+	mra_args.zip       = mraCmd.Flags().BoolP("zip",       "z", false, "Shows all zip files used in MRA files")
+	mra_args.core      = mraCmd.Flags().BoolP("core",      "c", false, "Shows games supported by each core")
+	mra_args.main_only = mraCmd.Flags().BoolP("main-only", "m", false, "Parse only the main games")
+}
+
+func runMRA(cmd *cobra.Command, args []string) {
+	if( *mra_args.core && *mra_args.zip) { list_cores(true); return}
+	if( *mra_args.zip ) { list_zip();   return }
+	if( *mra_args.core ) { list_cores(false); return }
+	cmd.Help()
+}
+
+func list_zip() {
+	zipuse := make(map[string]bool)
+
+	get_mradata := func(fname string, fi os.DirEntry, err error) error {
+		var game MRA
+		readin_mra( fname, fi, &game, err )
+		if len(game.Rom)==0 { return nil }
+		names := strings.Split(game.Rom[0].Zip, "|")
+		if len(names) == 0 {
+			return nil
+		}
+		if len(names)>1 && verbose {
+			fmt.Println(names)
+		}
+		last := len(names)-1
+		merged := names[last]
+		if merged=="qsound.zip" && len(names)==2 {
+			setname := names[last-1]
+			zipuse[setname] = true
+		}
+		zipuse[merged] = true
+		return nil
+	}
+	e := filepath.WalkDir(filepath.Join(os.Getenv("JTBIN"), "mra"), get_mradata)
+	if e != nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	first := true
+	for each, _ := range zipuse {
+		if !first {
+			fmt.Print(" ")
+		}
+		fmt.Print(each)
+		first = false
+	}
+}
+
+func readin_mra(fname string, fi os.DirEntry, game *MRA, err error) (error) {
+	if !strings.HasSuffix(fname,".mra") { return nil }
+	if err != nil {
+		fmt.Println(err)
+		return nil
+	}
+	if fi.IsDir() {
+		return nil
+	}
+	// get the information
+	buf, e := os.ReadFile(fname)
+	if e != nil {
+		return e
+	}
+	xml.Unmarshal(buf, game)
+	if game.Name=="" {
+		fmt.Printf("Warning: no game Name for file %s\n",fname)
+		return nil
+	}
+	return err
+}
+
+type game_info struct {
+	name, mame_set, zip string
+}
+
+type jtcores map[string][]game_info
+
+func cmp_games( a, b game_info) int {
+	return strings.Compare(a.name,b.name)
+}
+
+func list_cores(include_zip bool) {
+	const delim = "|"
+	games, e := get_coregames(delim)
+	if e != nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	sorted_cores := sort_cores(games)
+	sort_games(games)
+	report_games(sorted_cores, games, include_zip)
+}
+
+func get_coregames(delim string) (jtcores,error) {
+	games := make(jtcores)
+	get_mradata := func(fname string, fi os.DirEntry, err error) error {
+		var game MRA
+		if is_alternative(fname) && *mra_args.main_only { return nil }
+		readin_mra( fname, fi, &game, err )
+		if game.Setname=="" { return nil }
+		list, found := games[game.Rbf]
+		if !found || list==nil {
+			list = make([]game_info,0,16)
+		}
+		info := game_info {
+			name: game.Name,
+			mame_set: game.Setname,
+			zip: strings.ReplaceAll(game.Rom[0].Zip, "|", " "),
+		}
+		games[game.Rbf]=append(list,info)
+		return nil
+	}
+	e := filepath.WalkDir(filepath.Join(os.Getenv("JTBIN"), "mra"), get_mradata)
+	if e!=nil { return nil, e }
+	return games, nil
+}
+
+func is_alternative(fname string) bool {
+	up2levels := filepath.Dir(filepath.Dir(fname))
+	dirname := filepath.Base(up2levels)
+	return dirname=="_alternatives"
+}
+
+func sort_cores(all_cores jtcores) []string {
+	sorted_names := make([]string,0,len(all_cores))
+	for name,_ := range all_cores {
+		sorted_names = append(sorted_names,name)
+	}
+	slices.Sort(sorted_names)
+	return sorted_names
+}
+
+func sort_games(all_games jtcores) {
+	for _, core_games := range all_games {
+		slices.SortFunc(core_games,cmp_games)
+	}
+}
+
+func report_games(cores []string, games jtcores, include_zip bool) {
+	game_count := 0
+	core_len, game_len, set_len, zip_len := find_longest_names(games)
+	format := make_format_string(core_len, game_len, set_len, zip_len, include_zip)
+	print_header(format, include_zip)
+	for _, corename := range cores {
+		core_games := games[corename]
+		for _,info := range core_games {
+			if include_zip {
+				fmt.Printf(format,corename[2:],info.name,info.mame_set, info.zip)
+			} else {
+				fmt.Printf(format,corename[2:],info.name,info.mame_set)
+			}
+			game_count++
+		}
+	}
+	fmt.Printf("\n%d cores, supporting %d games\n",len(cores),game_count)
+}
+
+func find_longest_names(all_games jtcores) (core_len, game_len, set_len, zip_len int) {
+	for corename, coregames := range all_games {
+		core_len = max_length(corename, core_len)
+		for _, info := range coregames {
+			game_len = max_length(info.name, game_len)
+			set_len  = max_length(info.mame_set, set_len)
+			zip_len = max_length(info.zip, zip_len)
+		}
+	}
+	const JTPREFIX_LEN = 2
+	core_len -= JTPREFIX_LEN
+	return core_len, game_len, set_len, zip_len
+}
+
+func max_length(name string, previous_max int) int {
+	name_length := len(name)
+	if name_length>previous_max {
+		return name_length
+	} else {
+		return previous_max
+	}
+}
+
+func make_format_string(core_len, game_len, set_len, zip_len int, include_zip bool) string {
+	if include_zip {
+		return fmt.Sprintf("| %%-%ds | %%-%ds | %%-%ds | %%-%ds |\n", core_len, game_len, set_len, zip_len)
+	} else {
+		return fmt.Sprintf("| %%-%ds | %%-%ds | %%-%ds |\n", core_len, game_len, set_len)
+	}
+}
+
+func print_header(format string, include_zip bool) {
+	var header string
+	if include_zip {
+		header = fmt.Sprintf(format,"Core","Game", "MAME set", "ZIP files")
+	} else {
+		header = fmt.Sprintf(format,"Core","Game","MAME set")
+	}
+	dashline := make([]rune,len(header))
+	for k,_ := range dashline {
+		if header[k]=='|' || header[k]=='\n'{
+			dashline[k]=rune(header[k])
+		} else {
+			dashline[k]='-'
+		}
+	}
+	fmt.Printf(header)
+	fmt.Printf(string(dashline))
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/root.go

@@ -0,0 +1,66 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"fmt"
+	"os"
+
+	"jtutil/cmd/wav"
+	"github.com/spf13/cobra"
+)
+
+var verbose bool
+
+// rootCmd represents the base command when called without any subcommands
+var rootCmd = &cobra.Command{
+	Use:   "jtutil",
+}
+
+func Execute() {
+	err := rootCmd.Execute()
+	if err != nil {
+		os.Exit(1)
+	}
+}
+
+func init() {
+	rootCmd.PersistentFlags().BoolVarP(&verbose, "verbose", "v", false, "Verbose")
+	add_wav_cmd()
+}
+
+func add_wav_cmd() {
+	var wavCmd = &cobra.Command{
+		Use:   "wav [test.vcd]",
+		Short: "Creates a WAV file from the given VCD dump",
+		Run: wav.RunWavCmd,
+		Args: cobra.MaximumNArgs(1),
+	}
+	wavCmd.Flags().StringP("output","o","vcd.wav","output file name")
+	wavCmd.Flags().StringP("signal","s","","signal name")
+	wavCmd.Flags().BoolP  ("skip","k",false,"skip initial silence in input file")
+	rootCmd.AddCommand(wavCmd)
+}
+
+func must(e... error) {
+	if e==nil || len(e)==0 || e[0]==nil { return }
+	for _, each_error := range e {
+		fmt.Println(each_error)
+	}
+	os.Exit(1)
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/sdram.go

@@ -0,0 +1,281 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"fmt"
+
+	"os"
+	"strings"
+	"path/filepath"
+	"github.com/spf13/cobra"
+	"jotego/jtframe/macros"
+	"jotego/jtframe/mra"
+)
+
+// sdramCmd represents the sdram command
+var sdramCmd = &cobra.Command{
+	Use:   "sdram [game-name]",
+	Short: "Convert .rom files to sdram files for quick simulation",
+	Long: `Convert .rom files to sdram files for quick simulation
+
+After you create the .rom files using jtframe mra, you can generate
+the sdram*.bin simulation files without having to run a download simulation by
+calling jtframe sdram.
+
+jtframe sdram must be called from within a simulation folder, such as ver/game.
+If the simulation folder is the ROM set name, that will be used. If the folder
+is just "game", then the set name must be provided in the command line.
+
+jtframe sdram will split the .rom file in the right number of sdram*bin files by
+inspecting the definitions of JTFRAME_BA?_START, JTFRAME_PROM_START and
+JTFRAME_HEADER.
+
+jtframe sdram will also link a rom.bin file to the .rom file used. If rom.bin
+already existed, it will be deleted and re-created as a link.
+
+If the core uses the header for SDRAM bank assignment, special care
+must be taken for the PROM data as JTFRAME_PROM_START will not be defined. This
+utility will create a file for each ROM region after bank 3, so the core can
+directly load these files in simulation. You can also force the PROM load in
+simulation for these cores by setting the SIM_LOAD_PROM macro.
+
+The result will only be correct for cores that do not transform download data on
+the fly.
+`,
+	Run: run_sdram,
+	Args: cobra.MaximumNArgs(1),
+}
+
+func init() {
+	rootCmd.AddCommand(sdramCmd)
+}
+
+func run_sdram(cmd *cobra.Command, args []string) {
+	var game string
+
+	if len(args)!=0 {
+		game=args[0]
+	} else {
+		var e error
+		game, e = derive_game_from_wd()
+		must(e)
+	}
+
+	must(validate_wd())
+	core := derive_core_from_wd()
+	macros.MakeMacros( core, "mist" )
+	e := extract_sdram(core,game)
+	if e!=nil {
+		fmt.Println(e.Error())
+		os.Exit(1)
+	}
+	make_symlink(game)
+}
+
+func derive_game_from_wd() (string,error) {
+	wd, e := os.Getwd()
+	if e != nil { return "", e }
+	game := filepath.Base(wd)
+	if game=="game" {
+		return "",fmt.Errorf("Cannot derive ROM set name from current folder. Use jtutil sdram <game> instead.")
+	}
+	return game,nil
+}
+
+func validate_wd() (error) {
+	wd, e := os.Getwd()
+	if e != nil { return e }
+	wd = filepath.Join(wd,"..")
+	if filepath.Base(wd)!="ver" {
+		return fmt.Errorf("jtutil sdram must be called from a ver/game folder")
+	}
+	return nil
+}
+
+func derive_core_from_wd() string {
+	wd,_ := os.Getwd()
+	return filepath.Base(filepath.Join(wd,"../.."))
+}
+
+func must_env( env string ) string {
+	v, e := os.LookupEnv(env)
+	if !e {
+		fmt.Println(env,"is not defined in the environment.")
+		os.Exit(1)
+	}
+	return v
+}
+
+func swap_bytes( rom []byte, start int ) {
+	for k:=start;k<len(rom);k+=2 {
+		aux     := rom[k]
+		rom[k]   = rom[k+1]
+		rom[k+1] = aux
+	}
+}
+
+func read_rom( game string ) []byte {
+	rom, e := os.ReadFile( filepath.Join(must_env("JTROOT"),"rom",game+".rom") )
+	must(e)
+	if (len(rom)&1) != 0 {
+		fmt.Println("The ROM length must be even")
+		os.Exit(1)
+	}
+	// swap the bytes so the sdram.bin files get written correctly as 16-bit words
+	swap_bytes(rom,0)
+	return rom
+}
+
+
+func extract_sdram( core, game string ) error {
+	const EIGHT_MB=8*1024*1024
+	rom        := read_rom(game)
+
+	mra_cfg, e := mra.ParseTomlFile(core)
+	reg_cnt := len(mra_cfg.Header.Offset.Regions)
+	hinfo := mra_cfg.Header.Offset
+	if e!=nil { return e }
+	offsets,reg:= bankOffset(reg_cnt,hinfo,rom)
+
+	header     := macros.GetInt("JTFRAME_HEADER")
+	prom_start := offsets[4]
+	nx_start, e := dump("sdram_bank0.bin",rom,header,offsets[1], prom_start, EIGHT_MB)
+	if e!=nil { return fmt.Errorf("%w for bank 0",e) }
+	if nx_start<0 {
+		os.Remove("sdram_bank1.bin")
+		os.Remove("sdram_bank2.bin")
+		os.Remove("sdram_bank3.bin")
+		return nil
+	}
+	nx_start, e = dump("sdram_bank1.bin",rom,nx_start,offsets[2], prom_start, EIGHT_MB)
+	if e!=nil { return fmt.Errorf("%w for bank 1",e) }
+	if nx_start<0 {
+		os.Remove("sdram_bank2.bin")
+		os.Remove("sdram_bank3.bin")
+		return nil
+	}
+	nx_start, e = dump("sdram_bank2.bin",rom,nx_start,offsets[3], prom_start, EIGHT_MB)
+	if e!=nil { return fmt.Errorf("%w for bank 2",e) }
+	if nx_start<0 {
+		os.Remove("sdram_bank3.bin")
+		fmt.Println("Skippin bank3")
+		return nil
+	}
+	nx_start, e = dump("sdram_bank3.bin",rom,nx_start,0,prom_start, EIGHT_MB)
+	if e!=nil { return fmt.Errorf("%w for bank 3",e) }
+	// extra regions (read with prom_we set)
+	if len(reg)>4 { // undo the swap that was needed for the SDRAM part of the ROM file
+		swap_bytes(rom,offsets[4])
+	}
+	for k:=4; k<len(reg);k++ {
+		nx := 0
+		if k+1 < len(reg) {
+			nx = offsets[k+1]
+		}
+		_, e = dump(reg[k],rom,offsets[k],nx,len(rom),0)
+		if e!=nil { return e }
+	}
+	return nil
+}
+
+func bankOffset( reg_cnt int, hinfo mra.HeaderOffset, rom []byte ) ([]int, []string) {
+	header  := macros.GetInt("JTFRAME_HEADER")
+
+	if reg_cnt < 5 {
+		reg_cnt=5
+	}
+	offsets := make([]int,reg_cnt)
+	// Default values from macros (if defined)
+	offsets[1] = macros.GetInt("JTFRAME_BA1_START")+header
+	offsets[2] = macros.GetInt("JTFRAME_BA2_START")+header
+	offsets[3] = macros.GetInt("JTFRAME_BA3_START")+header
+	offsets[4] = macros.GetInt("JTFRAME_PROM_START")+header
+	for k, _ := range offsets {
+		if offsets[k] <= header {
+			offsets[k] = len(rom)
+		}
+	}
+	// final values from header (if defined)
+	for k:=1; k<len(hinfo.Regions); k++ {
+		var pos int
+		pos  = int(rom[hinfo.Start+(k<<1)])<<8
+		pos |= int(rom[hinfo.Start+(k<<1)+1])
+		pos <<= hinfo.Bits
+		offsets[k]=pos+header
+		if verbose {
+			fmt.Printf("%-4d %-20s %X\n",k,hinfo.Regions[k], offsets[k])
+		}
+	}
+	if verbose {
+		fmt.Println("Offsets")
+		for k:=1; k<len(offsets); k++ {
+			fmt.Printf("%d %X\n",k,offsets[k])
+		}
+		fmt.Println()
+	}
+	return offsets,hinfo.Regions
+}
+
+func dump( name string, rom []byte, p0, p1, lim, fill int) (int,error) {
+	if verbose {
+		fmt.Printf("%10s p0=%08X p1=%08X lim=%08X fill=%08X\n",name,p0,p1,lim,fill)
+	}
+	if p1<=0 { p1 = lim	}
+	if verbose { fmt.Printf("%s %X -> %X\n",name,p0,p1) }
+	if p1<p0 { return 0,fmt.Errorf("start offset was beyond end offset") }
+	if p1<=0 { return p0, nil }
+	if p1>len(rom) {
+		return 0,fmt.Errorf("ROM file is too short to produce file: $%X > $%X",
+			p1, len(rom))
+	}
+	if( p1==p0 && fill==0 ) {
+		e := os.Remove(name)
+		if e!=nil {
+			return 0,e
+		}
+		fmt.Println("Removed file",name)
+		return p1,nil
+	}
+	if e := os.WriteFile( name, rom[p0:p1],0664 ); e!=nil { return 0,e }
+	// complement up to 8MB
+	sz := p1-p0
+	if sz >= fill { return p1,nil }
+	f, e := os.OpenFile(name,os.O_APPEND|os.O_WRONLY,0664); if e!=nil { return 0,e }
+	defer f.Close()
+	blank := make([]byte,fill-sz)
+	_, e = f.Write(blank); if e!=nil { return 0,e }
+	if verbose {
+		fmt.Printf("%s done. Next starts at %x\n",name,p1)
+	}
+	return p1,nil
+}
+
+func make_symlink( game string ) {
+	// Link ROM files
+	src := filepath.Join(must_env("JTROOT"),"rom",game+".rom")
+	os.Remove("rom.bin")
+	os.Symlink(src,"rom.bin")
+	// Link NVRAM files
+	src = filepath.Join(must_env("JTROOT"),"rom",strings.ToUpper(game+".RAM"))
+	f, e := os.Open(src)
+	defer f.Close()
+	if e!=nil { return } // No RAM file
+	os.Remove("nvram.bin")
+	os.Symlink(src,"nvram.bin")
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/split16.go

@@ -0,0 +1,77 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"fmt"
+	"os"
+	"strings"
+
+	"github.com/spf13/cobra"
+)
+
+var split16_swap *bool
+
+// split16Cmd represents the split16 command
+var split16Cmd = &cobra.Command{
+	Use:   "split16",
+	Short: "Splits a file in two halves. Intended for 16-bit ROM simulation",
+	Long: `16-bit memories are normally implemented as two 8-bit memories.
+In order to load a default value from a file, you need to split the file in
+two halves. The new files add _lo and _hi to the name`,
+	Args: cobra.MinimumNArgs(1),
+	Run: func(cmd *cobra.Command, args []string) {
+		for _, each := range args {
+			b, e := os.ReadFile( each )
+			if e != nil {
+				fmt.Println(e)
+				continue
+			}
+			order := 0
+			if *split16_swap { order = 1 }
+			split16_dump( each, b,   order, "_lo")
+			split16_dump( each, b, 1-order, "_hi")
+		}
+	},
+}
+
+func split16_dump( fname string, b []byte, order int, suffix string ) {
+	if k:=strings.LastIndex(fname,"."); k>0 {
+		fname = fname[0:k]+suffix+fname[k:]
+	} else {
+		fname += suffix
+	}
+	f, e := os.Create(fname)
+	if e!=nil {
+		fmt.Println(e)
+		return
+	}
+	bout := make([]byte,len(b)/2)
+	j:=0
+	for k:=order; k<len(b); k+=2 {
+		bout[j] = b[k]
+		j++
+	}
+	f.Write(bout)
+	f.Close()
+}
+
+func init() {
+	rootCmd.AddCommand(split16Cmd)
+	split16_swap = split16Cmd.Flags().BoolP("swap", "s", false, "swaps lo and hi files")
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/tilemap.go

@@ -0,0 +1,278 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"fmt"
+	"crypto/sha1"
+	"encoding/hex"
+	"image"
+	"image/color"
+	"image/png"
+	"math"
+	"os"
+
+	"github.com/spf13/cobra"
+)
+
+var tilemap_args struct{
+	name   string
+	array  bool
+	wround bool
+}
+
+// tilemapCmd represents the tilemap command
+var tilemapCmd = &cobra.Command{
+	Use:   "tilemap",
+	Short: "Converts a PNG image to a tile map",
+	Long: `Creates two output files: tilemap.hex and tiledata.hex`,
+	Args: cobra.MinimumNArgs(1),
+	Run: func(cmd *cobra.Command, args []string) {
+		png2tilemap(args[0], tilemap_args.name )
+	},
+}
+
+func init() {
+	rootCmd.AddCommand(tilemapCmd)
+
+	// Here you will define your flags and configuration settings.
+
+	// Cobra supports Persistent Flags which will work for this command
+	// and all subcommands, e.g.:
+	// tilemapCmd.PersistentFlags().String("foo", "", "A help for foo")
+
+	// Cobra supports local flags which will only run when this command
+	// is called directly, e.g.:
+	// tilemapCmd.Flags().BoolP("toggle", "t", false, "Help message for toggle")
+	tilemapCmd.Flags().StringVarP( &tilemap_args.name, "name", "n", "tile", "Prefix for output file names")
+	tilemapCmd.Flags().BoolVarP( &tilemap_args.array,  "array", "a", false, "Output System Verilog arrays instead of a .hex file")
+	tilemapCmd.Flags().BoolVarP( &tilemap_args.wround, "width", "w", true, "Round up map width to nearest power of 2")
+}
+
+func png2tilemap( fname, ofname string ) {
+	f, e := os.Open(fname)
+	if e != nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	defer f.Close()
+	img, e := png.Decode(f)
+	if e != nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	if img.Bounds().Dx() % 8 != 0 || img.Bounds().Dy()%8!=0 {
+		fmt.Println("The image width and height must be a multiple of 8")
+		os.Exit(1)
+	}
+
+	uniqueBlocks := make(map[string]image.Image)
+	blockIds := make(map[string]int)
+	tiles := make([]image.Image,0)
+	tilemap := make([]int,0)
+	id := 0
+	w := 0
+	map_width  := img.Bounds().Dx()>>3
+	map_wround := int( math.Ceil(math.Log2(float64(map_width))) )
+
+    for y := 0; y < img.Bounds().Dy(); y += 8 {
+        for x := 0; x < img.Bounds().Dx(); x += 8 {
+            // Create a sub-image (block)
+            block := img.(interface {
+                SubImage(r image.Rectangle) image.Image
+            }).SubImage(image.Rect(x, y, x+8, y+8))
+
+            // Create a hash for the block
+            hash := hashImage(block)
+            // fmt.Println(x,y,hash)
+
+            // If the block is unique, store it
+            if _, exists := uniqueBlocks[hash]; !exists {
+                uniqueBlocks[hash] = block
+		    	blockIds[hash] = id
+		    	tiles = append( tiles, block )
+		    	id++
+            }
+            tilemap=append(tilemap,blockIds[hash])
+            w++
+            // round up the map width to the nearest power of 2
+            if w==map_width && tilemap_args.wround {
+            	for w < (1<<map_wround) {
+            		tilemap=append(tilemap,0)
+            		w++
+            	}
+            	w=0
+            }
+        }
+    }
+
+    pal := makePal(uniqueBlocks)
+    bpp := int(math.Ceil(math.Log2(float64(len(pal)))))
+    tileData := packTiles( dumpTiles( tiles, pal ), bpp )
+    if tilemap_args.array {
+    	arraydump( ofname+"map.sv", tilemap, 1 )
+	    arraydump( ofname+"data.sv", tileData, bpp )
+    } else {
+	    hexdump( ofname+"map.hex", tilemap, 1)
+	    hexdump( ofname+"data.hex", tileData, bpp )
+    }
+    if verbose {
+    	fmt.Printf("Total unique 8x8 tiles: %d\n", len(uniqueBlocks))
+    	fmt.Println("Total",len(pal),"colors")
+    }
+}
+
+func packTiles( tiles []int, bpp int ) []byte {
+	if bpp==0 || bpp!=2 || 8%bpp!=0 {
+		fmt.Println("Unsupported bpp encoding")
+		os.Exit(1)
+	}
+
+	pack := 8/bpp
+	data := make([]byte,len(tiles)/pack)
+	for k, _ := range data {
+		data[k]=0
+	}
+	sh := bpp-1
+	for i,each := range tiles {
+		ish := (i>>3) << sh
+		imod := (^i)&7
+		for j:=0; j<bpp; j++ {
+			data[ ish+j ] |= byte(((each>>j)&1) << imod)
+		}
+	}
+	return data
+}
+
+func dumpTiles( tiles []image.Image, pal map[int]int ) []int {
+	intdump := make([]int,len(tiles)<<6)
+	k:=0
+	for _,each := range tiles {
+		r := each.Bounds()
+	    for y := r.Min.Y; y < r.Max.Y; y ++ {
+	        for x := r.Min.X; x < r.Max.X; x ++ {
+	        	rgb := rgbPack(each.At(x,y))
+	        	intdump[k] = pal[rgb]
+	        	k++
+	        }
+        }
+	}
+	return intdump
+}
+
+func rgbPack( c color.Color ) int {
+	r,g,b,_ := c.RGBA()
+	return ((int(r)&0xff)<<16) | ((int(g)&0xff)<<8) | (int(b)&0xff)
+}
+
+func makePal( tiles map[string]image.Image ) map[int]int {
+	pal := make(map[int]int)
+	k := 0
+	for _, each := range tiles {
+		r := each.Bounds()
+	    for y := r.Min.Y; y < r.Max.Y; y ++ {
+	        for x := r.Min.X; x < r.Max.X; x ++ {
+	        	rgb := rgbPack(each.At(x,y))
+	        	if _, found := pal[rgb]; !found {
+	        		pal[rgb] = k
+	        		k++
+	        	}
+	        }
+	    }
+	}
+	return pal
+}
+
+// input data is truncated to 8 bits
+func hexdump[E int|byte]( fname string, data []E, bpp int ) {
+	f, e := os.Create(fname)
+	if e!=nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	defer f.Close()
+	format := fmt.Sprintf("%%0%dX\n",bpp<<1)
+	for k:=0; k<len(data); k+=bpp {
+		var v8 int
+		for j:=0; j<bpp; j++ {
+			v:=int(data[k+j])
+			if v>255 {
+				fmt.Println("Error: only 1-byte numbers allowed")
+				os.Exit(1)
+			}
+			v8 |= v<<(j<<3)
+		}
+		fmt.Fprintf(f,format,v8)
+	}
+	// the dump length is always extended to match a power of 2
+	// in order to prevent Quartus warnings when loading the data into a BRAM
+	rounded := 1<<int(math.Ceil(math.Log2(float64(len(data)))))
+	for k:=len(data); k <rounded; k+=bpp {
+		fmt.Fprintf(f,format,0)
+	}
+}
+
+func arraydump[E int|byte]( fname string, data []E, bpp int ) {
+	f, e := os.Create(fname)
+	if e!=nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+	defer f.Close()
+	fmt.Fprintf(f,"'{\n")
+	dw := bpp<<3
+	format := fmt.Sprintf("%%d'h%%0%dX",bpp<<1)
+	for k:=0; k<len(data); k+=bpp {
+		if k!=0 {
+			fmt.Fprintf(f,", ")
+			if (k&0xf) == 0 { fmt.Fprintln(f)}
+		}
+		var v8 int
+		for j:=0; j<bpp; j++ {
+			v:=int(data[k+j])
+			if v>255 {
+				fmt.Println("Error: only 1-byte numbers allowed")
+				os.Exit(1)
+			}
+			v8 |= v<<(j<<3)
+		}
+		fmt.Fprintf(f,format,dw,v8)
+	}
+	fmt.Fprintf(f,"  };\n")
+}
+
+
+func hashImage(img image.Image) string {
+    // Convert image to RGBA
+    bounds := img.Bounds()
+    rgba := image.NewRGBA(image.Rect(0, 0, bounds.Dx(), bounds.Dy()))
+    y0:=0
+    for y := bounds.Min.Y; y < bounds.Max.Y; y++ {
+    	x0:=0
+        for x := bounds.Min.X; x < bounds.Max.X; x++ {
+            rgba.Set(x0, y0, img.At(x, y))
+            x0++
+        }
+        y0++
+    }
+
+    // Hash the RGBA values
+    hash := sha1.New()
+    hash.Write(rgba.Pix)
+    return hex.EncodeToString(hash.Sum(nil))
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/trace.go

@@ -0,0 +1,145 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"jtutil/vcd"
+	"fmt"
+	"os"
+	"strings"
+	"github.com/spf13/cobra"
+)
+
+func init() {
+	const help=
+`Use to debug a simulation against MAME.
+Prepare a MAME trace file with register dumps, and a VCD file with the registers
+you want to compare.
+
+debug.trace		text file generated with MAME
+debug.vcd		VCD file for comparison
+
+File names can be overriden with --base-name
+
+An automatic matching  between the MAME variables and the VCD signal names will
+be attempted. If a signal is not matched to MAME, manually add it with the alias
+command.
+
+The comparison is interactive, although a script can also be run to help in
+debugging sessions. Type help to obtain the list of commands. The session
+commands are stored in the file trace.ses (and overwritten each time).
+
+The VCD comparison will not be done while these signals are high:
+
+- alu_busy      the ALU is busy solving a long operation
+- str_busy      a long string operation is in progress
+- stack_busy    processing long stack related operations
+`
+	traceCmd := &cobra.Command{
+		Use:   "trace",
+		Short: "Compare VCD file with MAME trace output",
+		Long:   help,
+		Run:    run_trace_cmd,
+	}
+	rootCmd.AddCommand(traceCmd)
+	flg  := traceCmd.Flags()
+
+	flg.StringP("make",     "m", "",      "Create MAME trace file for the given CPU")
+	flg.StringP("base-name","b", "debug", ".trace and .vcd files with this name will be used")
+}
+
+func run_trace_cmd(cmd *cobra.Command, args []string) {
+	if make_sample_file,_ := cmd.Flags().GetString("make"); make_sample_file!="" {
+		makeMAME(make_sample_file)
+		return
+	}
+	basename,_ := cmd.Flags().GetString("base-name")
+	run_trace_comparison(basename)
+}
+
+func run_trace_comparison(basename string) {
+	trace := &vcd.LnFile{}
+	vcdf  := &vcd.LnFile{}
+	vcdf.Open(basename+".vcd")
+	defer vcdf.Close()
+	signals := vcd.GetSignals(vcdf)
+	vcd.RenameRegs( signals )
+
+	trace.Open(basename+".trace")
+	defer trace.Close()
+
+	trace.Scan()
+	mame_alias := vcd.MakeAlias(trace.Text(), signals)
+	vcd.Prompt( vcdf, trace, signals, mame_alias  )
+}
+
+func makeMAME( cpu string ) {
+	var s string
+	switch strings.ToLower(cpu) {
+		case "z80": s=`trace off
+trace debug.trace,maincpu,noloop,{tracelog "PC=%4X,AF=%4X,BC=%4X,DE=%4X,HL=%4X,AF2=%4X,BC2=%4X,DE2=%4X,HL2=%4X,IX=%4X,IY=%4X,SP=%4X,* ",pc,af,bc,de,hl,af2,bc2,de2,hl2,ix,iy,sp}
+`
+		case "t900h": s=`trace debug.trace,maincpu,noloop,{tracelog "PC=%X,XWA0=%X,XBC0=%X,XDE0=%X,XHL0=%X,XWA1=%X,XBC1=%X,XDE1=%X,XHL1=%X,XWA2=%X,XBC2=%X,XDE2=%X,XHL2=%X,XWA3=%X,XBC3=%X,XDE3=%X,XHL3=%X,XIX=%X,XIY=%X,XIZ=%X,XSP=%X,* ",pc,xwa0,xbc0,xde0,xhl0,xwa1,xbc1,xde1,xhl1,xwa2,xbc2,xde2,xhl2,xwa3,xbc3,xde3,xhl3,xix,xiy,xiz,xssp}
+`
+		case "6301","6800","6801":
+			s=`focus 1
+trace off
+trace debug.trace,sub,noloop,{tracelog "PC=%X,S=%X,X=%X,CC=%X,A=%X,B=%X,frame_cnt=%x* ",pc,s,x,cc|c0,a,b,frame}
+`
+		case "6805":
+			s=`focus 1
+trace off
+trace debug.trace,mcu,noloop,{tracelog "PC=%X,S=%X,X=%X,CC=%X,A=%X,PA_OUT=%X,PB_OUT=%X,PC_OUT=%X,PA_DDR=%X,PB_DDR=%X,PC_DDR=%X,frame_cnt=%x* ",pc,s,x,cc|c0,a,latcha,latchb,latchc,ddra,ddrb,ddrc,frame}
+`
+		case "m68000","m68k","68k","68000":
+			s=`focus 0
+trace off
+trace debug.trace,maincpu,noloop,{tracelog "PC=%X,SSP=%X,D0=%X,D1=%X,D2=%X,D3=%X,D4=%X,D5=%X,D6=%X,D7=%X,A0=%X,A1=%X,A2=%X,A3=%X,A4=%X,A5=%X,A6=%X,A7=%X,IR=%X,frame_cnt=%x* ",rPC,SSP,d0,d1,d2,d3,d4,d5,d6,d7,a0,a1,a2,a3,a4,a5,a6,USP,ir,frame}
+`
+		case "konami","kcpu","6809": s=`focus 0
+trace off
+trace debug.trace,maincpu,noloop,{tracelog "PC=%X,cc=%X,dp=%x,a=%x,b=%x,x=%x,y=%x,u=%x,s=%x,ticks=%x,frame_cnt=%x* ",pc,cc,dp,a,b,x,y,u,s,totalcycles,frame}
+`
+		case "qsnd","qsound": s=`trace debug.trace,2,,{tracelog "! pc=%X pt=%X pr=%X pi=%X i=%X r0=%X r1=%X r2=%X r3=%X rb=%X re=%X j=%X k=%X x=%X y=%X p=%X a0=%X a1=%X c0=%X c1=%X c2=%X auc=%X psw=%X\n",pc,pt,pr,pi,i,r0,r1,r2,r3,rb,re,j,k,x,y,p,a0,a1,c0,c1,c2,auc,psw}
+`
+	}
+	if s=="" {
+		fmt.Printf("No default trace.mame file for %s CPU. Add it to trace.go\n", cpu)
+		fmt.Printf(`Supported CPUs names and aliases:
+z80
+t900h
+6800, 6301, 6801,
+m68000, m68k, 68k, 68000
+konami, kcpu, 6809
+qsnd, qsound
+`)
+		return
+	}
+	s += `
+gtime 100
+traceflush
+`
+	f, e := os.Create("trace.mame")
+	defer f.Close()
+	if e!=nil {
+		fmt.Println(e)
+		return
+	}
+	f.WriteString(s)
+	fmt.Println("trace.mame created")
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/vcd.go

@@ -0,0 +1,50 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"fmt"
+
+	"github.com/spf13/cobra"
+)
+
+// vcdCmd represents the vcd command
+var vcdCmd = &cobra.Command{
+	Use:   "vcd",
+	Short: "VCD file manipulation",
+	Long: `Several tools to manipulate VCD files`,
+	Run: func(cmd *cobra.Command, args []string) {
+		fmt.Println("Call vcd with one of the available subcommands")
+	},
+	Args: cobra.NoArgs,
+}
+
+func init() {
+	rootCmd.AddCommand(vcdCmd)
+
+	// Here you will define your flags and configuration settings.
+
+	// Cobra supports Persistent Flags which will work for this command
+	// and all subcommands, e.g.:
+	// vcdCmd.PersistentFlags().String("foo", "", "A help for foo")
+
+	// Cobra supports local flags which will only run when this command
+	// is called directly, e.g.:
+	// vcdCmd.Flags().BoolP("toggle", "t", false, "Help message for toggle")
+}
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/verilog.go

@@ -0,0 +1,50 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package cmd
+
+import (
+	"strings"
+
+	"jtutil/vcd"
+	"github.com/spf13/cobra"
+)
+
+// verilogCmd represents the verilog command
+var verilogCmd = &cobra.Command{
+	Use:   "verilog file[.vcd]",
+	Short: "Converts a VCD to a verilog .bin and .v files for simulation use",
+	//Long:
+	Run: verilogCmdRun,
+	Args: cobra.ExactArgs(1),
+}
+
+func verilogCmdRun(cmd *cobra.Command, args []string) {
+	fname := args[0]
+	if strings.HasSuffix(args[0],".vcd") {
+		fname = args[0][0:len(args[0])-4]
+	}
+	var d vcd.LnFile
+	d.Open(fname+".vcd")
+	ss := vcd.GetSignals(&d)
+	must(d.DumpHex(ss,fname))
+}
+
+func init() {
+	vcdCmd.AddCommand(verilogCmd)
+}
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/wav/parser.go

@@ -0,0 +1,135 @@
+package wav
+
+import(
+	"fmt"
+	"os"
+	"slices"
+	"strings"
+
+	"jtutil/vcd"
+	"github.com/spf13/cobra"
+)
+
+type wav_parser_t struct{
+	input_fname, signal_name, output_fname string
+	lnfile *vcd.LnFile
+	signal *vcd.VCDSignal
+	ss vcd.VCDData
+	wav_file *WavFile
+	repeat float64
+	skip_silence bool
+}
+
+func RunWavCmd(cmd *cobra.Command, args []string) {
+	parser := wav_parser_t{
+		lnfile: &vcd.LnFile{},
+		input_fname: "test.vcd",
+	}
+
+	if len(args)>0 { parser.input_fname = args[0] }
+
+	parser.signal_name,_  = cmd.Flags().GetString("signal")
+	parser.output_fname,_ = cmd.Flags().GetString("output")
+	parser.skip_silence,_ = cmd.Flags().GetBool("skip")
+	e := parser.Parse()
+	if e!=nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+}
+
+func (w *wav_parser_t)Parse() error {
+	w.lnfile.Open(w.input_fname)
+	defer w.lnfile.Close()
+	w.ss = vcd.GetSignals(w.lnfile)
+	e := w.validate_signals(); if e!=nil { return e }
+	w.wav_file = MakeWav()
+	w.move_vcd_data_to_wav()
+	return w.wav_file.Dump(w.output_fname)
+}
+
+func (w *wav_parser_t)validate_signals() error {
+	if len(w.ss)==0 {
+		return fmt.Errorf("Empty VCD file")
+	}
+	if w.signal_name=="" {
+		if len(w.ss)==1 {
+			for name,sgn := range w.ss {
+				w.signal_name = name
+				w.signal = sgn
+				return nil
+			}
+		} else {
+			all_names := w.collect_signal_names()
+			return fmt.Errorf("No signal name provided but VCD has multiple options:\n%s", all_names)
+		}
+	}
+	e := w.find_signal()
+	if e!=nil {
+		all_names := w.collect_signal_names()
+		return fmt.Errorf("%w.\nValid names:\n %s", e, all_names)
+	}
+	return nil
+}
+
+func (w *wav_parser_t)collect_signal_names() string {
+	names := make([]string,len(w.ss))
+	k:=0
+	for _, sgn := range w.ss {
+		names[k] = sgn.FullName()
+		k++
+	}
+	slices.Sort(names)
+	return strings.Join(names,"\n")
+}
+
+func (w *wav_parser_t)find_signal() error {
+	matches := make([]*vcd.VCDSignal,0,len(w.ss))
+	for _,sgn := range w.ss {
+		if strings.HasSuffix( sgn.FullName(), w.signal_name ) {
+			matches=append(matches,sgn)
+		}
+	}
+	switch len(matches) {
+		case 0: return fmt.Errorf("Signal %s not found", w.signal_name)
+		case 1: w.signal = matches[0]
+		default: return fmt.Errorf("Too many matches for name %s", w.signal_name)
+	}
+	return nil
+}
+
+func (w *wav_parser_t)move_vcd_data_to_wav() {
+	for {
+		w.write_value_to_wav()
+		if !w.next() { break }
+	}
+}
+
+func (w *wav_parser_t)write_value_to_wav() {
+	snd := w.get_16bit_value()
+	if w.skip_silence==true && snd==0 { return }
+	w.skip_silence = false
+	for w.repeat>=1.0 {
+		w.wav_file.append(snd)
+		w.repeat -= 1.0
+	}
+}
+
+func (w *wav_parser_t)get_16bit_value() int16 {
+	if w.signal.MSB==15 { return int16(w.signal.Value) }
+	if w.signal.MSB <15 { return int16(w.signal.Value<<(15-w.signal.MSB)) }
+	// > 15
+	return int16(w.signal.Value>>(w.signal.MSB-15))
+
+}
+
+func (w *wav_parser_t)next() bool {
+	const period_48k_in_ps = 20833333
+	tnow  := w.lnfile.Time()
+	tnext := tnow + period_48k_in_ps
+	is_new_data := w.lnfile.MoveTo(w.ss,tnext)
+	if !is_new_data { return false }
+	tnext = w.lnfile.Time()
+	w.repeat += (float64(tnext)-float64(tnow))/float64(period_48k_in_ps)
+	return true
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/cmd/wav/wav.go

@@ -0,0 +1,50 @@
+package wav
+
+import(
+	"os"
+)
+
+type WavFile struct{
+	buf []byte
+}
+
+func MakeWav() *WavFile {
+	wav := WavFile{
+		buf: make([]byte,44,2*1024*1024),
+	}
+	wav.make_header()
+	return &wav
+}
+
+func (w *WavFile)make_header() {
+	copy(w.buf,[]byte("RIFF"))
+	copy(w.buf[8:],[]byte("WAVEfmt "))
+	copy(w.buf[36:],[]byte("data"))
+	w.buf[16]=16	// 16-bit sound
+	w.buf[20]=1
+	w.buf[22]=2
+	sample_rate := uint32(48000)
+	w.write32(24,sample_rate)
+	w.write32(28,sample_rate*4)
+	w.buf[32]=4
+	w.buf[34] = 16
+}
+
+func (w *WavFile)write32(offset int, value uint32) {
+	w.buf[offset+0] = byte((value>> 0)&0xff)
+	w.buf[offset+1] = byte((value>> 8)&0xff)
+	w.buf[offset+2] = byte((value>>16)&0xff)
+	w.buf[offset+3] = byte((value>>24)&0xff)
+}
+
+func (w *WavFile)append( value int16 ) {
+	asbytes := []byte{byte(value),byte(value>>8)}
+	w.buf=append(w.buf,asbytes...) // left
+	w.buf=append(w.buf,asbytes...) // right
+}
+
+func (w *WavFile)Dump(fname string) error {
+	w.write32(4,  uint32(len(w.buf)))
+	w.write32(40, uint32(len(w.buf)-44))
+	return os.WriteFile(fname,w.buf,0664)
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/go.mod

@@ -0,0 +1,33 @@
+module jtutil
+
+go 1.22.0
+
+toolchain go1.23.4
+
+require (
+	github.com/PaesslerAG/gval v1.2.2
+	jotego/jtframe v0.0.0-00010101000000-000000000000
+	github.com/spf13/cobra v1.7.0
+)
+
+require (
+	github.com/Masterminds/goutils v1.1.1 // indirect
+	github.com/Masterminds/semver/v3 v3.2.0 // indirect
+	github.com/Masterminds/sprig/v3 v3.2.3 // indirect
+	github.com/google/uuid v1.1.1 // indirect
+	github.com/huandu/xstrings v1.3.3 // indirect
+	github.com/imdario/mergo v0.3.11 // indirect
+	github.com/inconshreveable/mousetrap v1.1.0 // indirect
+	github.com/komkom/toml v0.1.2 // indirect
+	github.com/mitchellh/copystructure v1.0.0 // indirect
+	github.com/mitchellh/reflectwalk v1.0.0 // indirect
+	github.com/pkg/errors v0.9.1 // indirect
+	github.com/shopspring/decimal v1.3.1 // indirect
+	github.com/spf13/cast v1.3.1 // indirect
+	github.com/spf13/pflag v1.0.5 // indirect
+	golang.org/x/crypto v0.3.0 // indirect
+	golang.org/x/exp v0.0.0-20250106191152-7588d65b2ba8 // indirect
+	gopkg.in/yaml.v2 v2.4.0 // indirect
+)
+
+replace jotego/jtframe => ../jtframe

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/go.sum

@@ -0,0 +1,87 @@
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+golang.org/x/xerrors v0.0.0-20190717185122-a985d3407aa7/go.mod h1:I/5z698sn9Ka8TeJc9MKroUUfqBBauWjQqLJ2OPfmY0=
+gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405 h1:yhCVgyC4o1eVCa2tZl7eS0r+SDo693bJlVdllGtEeKM=
+gopkg.in/check.v1 v0.0.0-20161208181325-20d25e280405/go.mod h1:Co6ibVJAznAaIkqp8huTwlJQCZ016jof/cbN4VW5Yz0=
+gopkg.in/yaml.v2 v2.2.2/go.mod h1:hI93XBmqTisBFMUTm0b8Fm+jr3Dg1NNxqwp+5A1VGuI=
+gopkg.in/yaml.v2 v2.3.0/go.mod h1:hI93XBmqTisBFMUTm0b8Fm+jr3Dg1NNxqwp+5A1VGuI=
+gopkg.in/yaml.v2 v2.4.0 h1:D8xgwECY7CYvx+Y2n4sBz93Jn9JRvxdiyyo8CTfuKaY=
+gopkg.in/yaml.v2 v2.4.0/go.mod h1:RDklbk79AGWmwhnvt/jBztapEOGDOx6ZbXqjP6csGnQ=
+gopkg.in/yaml.v3 v3.0.0-20200313102051-9f266ea9e77c/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM=
+gopkg.in/yaml.v3 v3.0.1 h1:fxVm/GzAzEWqLHuvctI91KS9hhNmmWOoWu0XTYJS7CA=
+gopkg.in/yaml.v3 v3.0.1/go.mod h1:K4uyk7z7BCEPqu6E+C64Yfv1cQ7kz7rIZviUmN+EgEM=

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/main.go

@@ -0,0 +1,24 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package main
+
+import "jtutil/cmd"
+
+func main() {
+	cmd.Execute()
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/compare.go

@@ -0,0 +1,212 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import (
+    "fmt"
+    "strings"
+    "os"
+)
+
+type CmpArgs struct {
+    Ignore_rst bool
+    Mismatch_n int
+    Time0a, Time0b uint64
+}
+
+type cmpData struct {
+    file   *LnFile
+    data    VCDData
+    signal *VCDSignal
+    resets []*VCDSignal
+}
+
+func (this cmpData) next() bool {
+    return this.file.NextVCD(this.data)
+}
+
+func in_reset(cmpd *cmpData) bool {
+    for _, rst := range cmpd.resets {
+        if rst.Value==1 { return true }
+    }
+    return false
+}
+
+func mv_reset( cmpd *cmpData ) {
+    // ensure that we are in reset state
+    for _, rst := range cmpd.resets {
+        for rst.Value!=1 && cmpd.file.NextVCD(cmpd.data) { }
+    }
+    // next, come out of it
+    for _, rst := range cmpd.resets {
+        for rst.Value!=0 && cmpd.file.NextVCD(cmpd.data) { }
+    }
+}
+
+func CompareAll( fnames []string, args CmpArgs ) {
+    var c [2]cmpData
+    for k,_ := range c{
+        c[k].file = &LnFile{}
+        if !strings.HasSuffix(fnames[k],".vcd") {
+            fnames[k] += ".vcd"
+        }
+        c[k].file.Open(fnames[k])
+        c[k].data = GetSignals(c[k].file)
+        c[k].resets=c[k].data.GetAll("rst",false)
+    }
+    if c[0].resets!=nil {
+        fmt.Println("rst signals found")
+    }
+    pairs := make(map[string]*VCDSignal)
+    k:=0
+    // find each signal pair in the other set
+    for _, signal := range c[0].data {
+        matched := c[1].data.Get( signal.FullName() )
+        if matched == nil {
+            for _, each := range c[1].data {
+                fmt.Println(each.FullName())
+            }
+            fmt.Println("Cannot find pair for signal ", signal.FullName())
+            return
+        }
+        pairs[signal.alias] = matched
+        k++
+    }
+    // function to compare the two sets
+    equal := func() (bool, string, uint64, uint64) {
+        for ref, cmp := range pairs {
+            if c[0].data[ref].Value != cmp.Value {
+                // fmt.Printf("%s <--> %s\n", c[0].data[ref].FullName(), cmp.FullName())
+                return false, cmp.FullName(), c[0].data[ref].Value, cmp.Value
+            }
+        }
+        return true,"",0,0
+    }
+    c[0].file.MoveTo(c[0].data,args.Time0a)
+    c[1].file.MoveTo(c[1].data,args.Time0b)
+    // run through the VCD
+    for c[0].file.NextVCD(c[0].data) {
+        matched := false
+        var offender string
+        var v0,v1 uint64
+        more := true
+        t1 := c[1].file.time
+        more = c[1].file.NextVCD(c[1].data)
+        if args.Ignore_rst {
+            if in_reset(&c[0]) || in_reset(&c[1]) {
+                mv_reset(&c[0])
+                mv_reset(&c[1])
+            }
+        }
+        matched, offender, v0, v1 = equal()
+        if !matched {
+            fmt.Printf("Time %d (%s) and %d (%s): %s\t %X != %X\n",
+                c[0].file.time, c[0].file.fname,
+                t1, c[1].file.fname, offender,
+                v0, v1)
+            args.Mismatch_n--
+            if( args.Mismatch_n<=0 ) { break }
+        }
+        if !more {
+            fmt.Println("EOF")
+            break
+        }
+    }
+}
+
+func Compare( fnames []string, sname string, args CmpArgs ) {
+    d,_ := cmpReadin( fnames, sname )
+    defer d[0].file.Close()
+    defer d[1].file.Close()
+    mismatch := false
+    d0Names := []string{ d[0].signal.alias }
+    d1Names := []string{ d[1].signal.alias }
+    d[0].file.MoveTo(d[0].data,args.Time0a)
+    d[1].file.MoveTo(d[1].data,args.Time0b)
+    if args.Ignore_rst {
+        for k:=0; k<len(d); k++ {
+            d[k].resets=d[k].data.GetAll("rst",false)
+        }
+        if d[0].resets!=nil {
+            fmt.Println("rst signals found")
+        }
+    }
+    more := true
+    for more {
+        more = more && d[0].file.NextChangeIn( d[0].data, d0Names )
+        more = more && d[1].file.NextChangeIn( d[1].data, d1Names )
+        if args.Ignore_rst {
+            if in_reset(&d[0]) || in_reset(&d[1]) {
+                mv_reset(&d[0])
+                mv_reset(&d[1])
+            }
+        }
+        mismatch = d[0].signal.Value != d[1].signal.Value
+        if mismatch {
+            fmt.Printf("Mismatch at times %d (%s) and %d (%s)\n\t%X != %X\n",
+                d[0].file.time, d[0].file.fname,
+                d[1].file.time, d[1].file.fname,
+                d[0].signal.Value, d[1].signal.Value )
+            args.Mismatch_n--
+            if( args.Mismatch_n<=0 ) { break }
+        }
+    }
+    if !mismatch {
+        fmt.Println("No differences found")
+    }
+}
+
+// Open the VCD files, get the VCD signal information and
+// find the required signal to compare. Caller must close the files
+func cmpReadin( fnames []string, sname string ) ([2]cmpData,[2]cmpData) {
+    var c,r [2]cmpData // compare and reset signals
+
+    for k:=0; k<2; k++ {
+        c[k].file = &LnFile{}
+        if !strings.HasSuffix(fnames[k],".vcd") {
+            fnames[k] += ".vcd"
+        }
+        c[k].file.Open(fnames[k])
+        c[k].data = GetSignals(c[k].file)
+        c[k].signal=getOne(c[k],sname, true)
+        r[k].signal=getOne(c[k],"rst", false)
+    }
+    return c,r
+}
+
+func getOne( cd cmpData, sname string, must bool ) *VCDSignal {
+    matchScope := strings.Index(sname,".")>-1
+    all := cd.data.GetAll(sname, matchScope)
+    if all == nil {
+        if must {
+            fmt.Println("Cannot find any signal named",sname,"in",cd.file.fname)
+            os.Exit(1)
+        }
+        return nil
+    }
+    if len(all)>1 {
+        fmt.Println("Found multiple signals named similarly to",sname)
+        for _,k := range all {
+            fmt.Println("\t",k.Name)
+        }
+        fmt.Println("Please specify the name better")
+        os.Exit(1)
+    }
+    fmt.Println("Found",all[0].FullName(), "in", cd.file.fname)
+    return all[0]
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/lnfile.go

@@ -0,0 +1,70 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import (
+    "bufio"
+    "log"
+    "os"
+)
+
+type LnFile struct{
+    f *os.File
+    line int    // line count
+    scn *bufio.Scanner
+    time uint64
+    fname string
+}
+
+func (ln *LnFile) Open(fname string) {
+    var e error
+    ln.f, e = os.Open(fname)
+    if e != nil {
+        log.Fatal(e)
+    }
+    ln.fname=fname
+    ln.scn = bufio.NewScanner(ln.f)
+    ln.line = 0
+}
+
+func (ln *LnFile) Scan() bool {
+    if ln.scn.Scan() {
+        ln.line++
+        if ln.scn.Err()!=nil {
+            log.Fatal(ln.scn.Err())
+        }
+        return true
+    } else {
+        return false
+    }
+}
+
+func (ln *LnFile) Close() {
+    if ln.f != nil {
+        ln.f.Close()
+    }
+}
+
+func (ln *LnFile) Time() uint64 {
+    return ln.time
+}
+
+func (ln *LnFile) Text() string {
+    return ln.scn.Text()
+}
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/state.go

@@ -0,0 +1,65 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import(
+    "fmt"
+    "strings"
+    "sort"
+)
+
+type SimState struct{
+	data VCDData
+	ram []byte
+}
+
+type MAMEState struct{
+	data NameValue
+	mask NameValue
+	alias mameAlias
+	ram []byte
+}
+
+type mameAlias map[string]*VCDSignal
+type NameValue map[string]uint64
+
+func (st MAMEState)validate(name string) bool {
+    _, valid := st.data[name]
+    return valid
+}
+
+func (mame_st *MAMEState) get_sorted_name_indexes() (names []string) {
+    names = make([]string,len(mame_st.data))
+    k := 0
+    for n,_ := range mame_st.data {
+        names[k]=n
+        k++
+    }
+    sort.Slice(names,func(i,j int) bool { return strings.Compare(names[i],names[j])<0})
+    return names
+}
+
+func (mame_st *MAMEState) print_registers(all_names []string) {
+    for _,name := range all_names {
+        format := "%-2s=0x%X\n"
+        if name=="frame_cnt" {
+            format = "%-2s=%d\n"
+        }
+        fmt.Printf( format, name, mame_st.data[name] )
+    }
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/vcd2hex.go

@@ -0,0 +1,102 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import (
+	"fmt"
+	"text/template"
+	"os"
+)
+
+// Creates a hex file to be used in
+// verilog and the accompanying verilog file
+// to read it
+func (this *LnFile) DumpHex(ss VCDData, fname string) (e error) {
+	f, e := os.Create(fname + ".bin"); if e!=nil { return e }
+	lines := 0
+	tbw := 64
+	outputs := make([]*VCDSignal, len(ss))
+	k := 0
+	for _, each := range ss {
+		outputs[k] = each
+		k++
+		tbw += each.MSB - each.LSB + 1
+	}
+	var t0 uint64
+	set_t0 := true
+	for this.NextVCD(ss) {
+		if set_t0 {
+			t0 = this.time
+			set_t0 = false
+		}
+		fmt.Fprintf(f, "%064b", (this.time-t0)/1000 ) // convert to ns
+		for _, each := range outputs {
+			fms := fmt.Sprintf("%%0%db", each.MSB-each.LSB+1)
+			fmt.Fprintf(f, fms, each.Value)
+		}
+		fmt.Fprintf(f,"\n")
+		lines++
+	}
+	f.Close()
+	t := `module vcd_{{ .Name }}(
+	input clk,
+	{{ range .Outputs -}}
+	output {{ if .MSB }}[{{.MSB}}:{{.LSB}}]{{ end }} {{ .Name }},
+	{{ end }}output reg eof=0
+);
+	reg [{{.TBW}}-1:0] data[0:{{.Lines}}-1];
+	wire [63:0] vcd_time;
+	integer idx=0;
+
+	initial $readmemb("{{.Name}}.bin",data);
+	assign {vcd_time{{ range .Outputs }},{{.Name}}{{end}}} = data[idx];
+
+	always @(posedge clk) begin
+		if( !eof ) begin
+			if( $time > vcd_time ) idx <= idx+1;
+			if( idx=={{.Lines}}-1 ) begin
+				eof <= 1;
+				$display("{{.Name}} data completely parsed");
+			end
+		end
+	end
+endmodule
+`
+	info := struct {
+		Name       string
+		TBW, Lines int
+		Outputs    []*VCDSignal
+	}{
+		Name:    fname,
+		TBW:     tbw,
+		Lines:   lines,
+		Outputs: outputs,
+	}
+	f, e = os.Create(fname + ".v")
+	defer f.Close()
+	if e!=nil { return e }
+	to, e := template.New(fname).Parse(t); if e!=nil { return e }
+	return to.Execute(f, info)
+}
+
+func must(e error) {
+	if e != nil {
+		fmt.Println(e)
+		os.Exit(1)
+	}
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/vcd_cmd.go

@@ -0,0 +1,816 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import(
+    "bufio"
+    "fmt"
+    "log"
+    "os"
+    "sort"
+    "slices"
+    "strings"
+    "strconv"
+    "github.com/PaesslerAG/gval"
+)
+
+const CMD_HELP=`
+a,alias             links a MAME variable name with a signal name in the VCD
+                    alias mame-name=vcd-name        declares an alias
+                    alias clear                     deletes all aliases
+                    alias -foo                      deletes the alias "foo"
+d,diff              show differences between MAME and simulation at current time
+ds,display          display simulation signals at current time
+dt,display-trace    display MAME trace values at current time
+f,frame #number     advances the simulation upto the given frame
+g,go                compare MAME and simulation until a discrepancy cannot be resolved
+?,help              produces this help screen
+h,hierarchy         shows the signal hierarchy in the simulation
+i,ignore foo boo    ignores the given MAME variables in comparison. Shows the
+                    list of ignored variables if called without names
+mask name FF        sets bit masks for signals. Bits set at 1 will be ignored.
+match-vcd           moves MAME forward until it matches simulation vcd
+match-trace         moves the simulation forward until it matches MAME trace
+mt,mt-trace foo     moves MAME forward until the given condition is met
+                    start hex numbers with $ for comparison
+mv,mv-vcd foo       moves simulation forward until the given condition is met
+p,print             evaluates an expression. Use to test conditions
+q,quit              quits the program
+.,source foo        executes the commands in the given file
+s,step              forwards simulation by one relevant change
+set vcd-name=value  alters the value of a simulation signal
+st,step-trace       forwards MAME trace by one relevant change`
+
+// keep making this class bigger as refactoring progress
+type Comparator struct{
+    alu_busy, str_busy, stack_busy *VCDSignal
+    kmax int
+}
+
+func NewComparator(ss VCDData) Comparator {
+    var cmp Comparator
+    cmp.alu_busy   = ss.Get(find_similar( "alu_busy", ss ))
+    cmp.str_busy   = ss.Get(find_similar( "str_busy", ss ))
+    cmp.stack_busy = ss.Get(find_similar( "stack_busy", ss ))
+    cmp.kmax = 4
+    return cmp
+}
+
+func Prompt( vcd, trace *LnFile, ss VCDData, mame_alias mameAlias ) {
+    fses, e := os.Create("trace.ses") // echo all session commands to a file
+    defer fses.Close()
+    must(e)
+    // Read from stdin initially
+    nested := make([]*bufio.Scanner,1)
+    nested[0] = bufio.NewScanner(os.Stdin)
+    scn := nested[0]
+    pc_name := find_similar( "pc", ss)
+    cmp := NewComparator(ss)
+
+    scope := findCommonScope(ss)
+    fmt.Printf("At scope %s\n",scope)
+    hier := GenerateHierarchy(ss)
+    mame_st := &MAMEState{ alias: mame_alias, mask: make(NameValue) }
+    sim_st := &SimState{ data: ss }
+    ignore := newBoolSet(mame_st)
+
+    cmd_diff := func() {
+        if diff( mame_st, fmt.Sprintf("trace at %d - vcd time %s",trace.line,formatTime(vcd.time)), true, ignore )==0 {
+            fmt.Printf("No differences\n")
+        } else {
+            extra := func( m, s,f string ) {
+                mame_pc,_ := mame_st.data[m]
+                p := ss.Get(s)
+                var vcd_pc uint64
+                if p!=nil { vcd_pc=p.Value }
+                if mame_pc!=0 || vcd_pc!=0 {
+                    fmt.Printf("\t%s="+f+" <-> "+f+"\n",m,mame_pc,vcd_pc)
+                }
+            }
+            extra("PC",pc_name,"%X")
+            extra("frame_cnt","TOP.game_test.frame_cnt","'d%d")
+        }
+    }
+
+    prompt_loop:
+    for {
+        if( nested[0]==scn ) { fmt.Printf("> ") }
+        if !scn.Scan() || scn.Err()!=nil {
+            if len(nested)>1 {
+                scn = nested[ len(nested)-2 ]
+                nested = nested[0:len(nested)-1]
+                continue
+            }
+            break
+        }
+        lt := scn.Text()
+        fmt.Fprintln(fses,lt)
+        if k:=strings.Index(lt,"#"); k!=-1 { lt=lt[0:k] }
+        tokens := strings.Fields(lt)
+        if len(tokens)==0 { continue }
+        if( nested[0]!=scn ) { fmt.Println(">",lt) } // echo if we are parsing a file
+        switch tokens[0] {
+        case "g","go": cmp.searchDiff( vcd, trace, sim_st, mame_st, ignore )
+        case "ds","display": {
+            var t []string
+            if len(tokens)>1 { t = tokens[1:]}
+            display( t, vcd, trace, sim_st.data, scope )
+        }
+        case "d","diff": cmd_diff()
+        case "dt","display-trace": display_trace(mame_st,trace)
+        case "a","alias": {
+            if len(tokens)==1 {
+                for k, each := range mame_st.alias {
+                    fmt.Printf("%s -> %s.%s\n",k,each.Scope, each.Name)
+                }
+                fmt.Printf("\nUse alias clear to delete all aliases\n")
+                fmt.Printf("Use alias mame-name=vcd-name to declare a new alias")
+                fmt.Printf("Use alias -name to delete one alias\n")
+            } else {
+                if tokens[1]=="clear" {
+                    mame_st.alias = make(mameAlias)
+                } else {
+                    parseAlias( tokens[1:], sim_st.data, mame_st.alias )
+                }
+            }
+        }
+        case "c","concat": {
+            if len(tokens)!=3 {
+                fmt.Println("Wrong arguments. Use cat main-signal appended-signal")
+                break
+            }
+
+            p1 := ss.Get(tokens[1])
+            p2 := ss.Get(tokens[2])
+            if p1==nil {
+                fmt.Printf("Cannot find %s\n",tokens[1])
+                break
+            }
+            if p2==nil {
+                fmt.Printf("Cannot find %s\n",tokens[2])
+                break
+            }
+            p1.Concat.p = p2
+            p1.Concat.at = p1.MSB+1
+        }
+        case "f", "frame": {
+            if len(tokens)!=2 {
+                fmt.Println("Wrong arguments. Use frame <number>")
+                break
+            }
+            limit,_ := strconv.ParseUint(tokens[1],0,64)
+            mvFrame(vcd,sim_st, uint64(limit) )
+        }
+        case "h","hierarchy": {
+            fmt.Printf("VCD at line %d (time %d ns)\n", vcd.line, vcd.time/1000)
+            hier.Dump("")
+        }
+        case "i","ignore": { // ignore mame-signals, use -name to take it out of the ignore list
+            if mame_st.data==nil || len(mame_st.data)==0 {
+                fmt.Printf("Start running a trace first\n")
+                break
+            }
+            if len(tokens)==1 {
+                ignore.Dump()
+            } else {
+                ignore.Update(tokens[1:]...)
+            }
+        }
+        case "kmax": {
+            if len(tokens)==1 {
+                fmt.Printf("KMAX=%d\n",cmp.kmax)
+                break
+            }
+            if len(tokens)!=2 {
+                fmt.Println("Wrong arguments. Use kmax <number>")
+                break
+            }
+            aux,_ := strconv.ParseUint(tokens[1],0,64)
+            cmp.kmax = int(aux)
+            if cmp.kmax < 2 {
+                fmt.Printf("Setting KMAX to minimum (2)")
+                cmp.kmax=2
+            }
+        }
+        case "mask": {
+            if len(tokens)==1 {
+                if len(mame_st.mask)==0 {
+                    fmt.Println("No masks defined")
+                } else {
+                    for k,v := range mame_st.mask {
+                        fmt.Printf("%-10s %02X\n",k,v)
+                    }
+                }
+                break
+            }
+            if len(tokens)!=3 {
+                fmt.Println("Wrong arguments. Use mask <signal name> <hex mask>")
+                fmt.Println("Use mask without arguments to show the current mask set")
+                break
+            }
+            mask,e := strconv.ParseUint(tokens[2],16,64)
+            if e!=nil {
+                fmt.Println(e)
+                break
+            }
+            name := tokens[1]
+            _, found := mame_st.data[name]
+            if !found {
+                fmt.Printf("Signal %s not found in MAME trace\n", name)
+                break
+            }
+            mame_st.mask[name]=mask
+        }
+        case "q","quit": break prompt_loop
+        case "scope": {
+            switch len(tokens) {
+                case 1: fmt.Println(scope)
+                case 2: {
+                    scope=tokens[1]
+                    fmt.Println(scope)
+                }
+                default: fmt.Println("Wrong number of arguments")
+            }
+        }
+        case "p","print": {
+            valueMap := HierValues( hier )
+            expr := replaceHex(strings.Join(tokens[1:],""))
+            v, e := gval.Evaluate( expr, valueMap )
+            if e != nil {
+                fmt.Println(e)
+                break
+            }
+            fmt.Printf("%s=%X\n",expr,v)
+        }
+        case "set": {
+            if len(tokens)==1 {
+                fmt.Println("Use set vcd-name=value ...")
+                break
+            }
+            for k:=1; k<len(tokens); k++ {
+                setSignal( tokens[k], hier )
+            }
+        }
+        case ".","source": {
+            if len(tokens)==1 {
+                fmt.Println("Use `source filename`")
+                break
+            }
+            f,e := os.Open(tokens[1])
+            defer f.Close()
+            if e!=nil {
+                fmt.Println(e)
+                break
+            }
+            scn = bufio.NewScanner(f)
+            nested = append( nested, scn )
+            break
+        }
+        case "s","step": {
+            cmp.nxVCDChange( vcd, sim_st, mame_st.alias )
+            cmd_diff()
+        }
+        case "st","step-trace": {
+            old_data := mame_st.data
+            var good bool
+            mame_st.data, good = nxTraceChange( trace, mame_st )
+            if good {
+                mame_st.data.showDiff(old_data)
+            }
+        }
+        case "mv","mv-vcd": {
+            if len(tokens)==1 {
+                fmt.Printf("Use mvvcd signal=value")
+                break
+            }
+            expr := replaceHex(strings.Join(tokens[1:],""))
+            fmt.Println(expr)
+            mvVCD( vcd, sim_st, hier, expr, scope)
+        }
+        case "mt","mv-trace": {
+            if len(tokens)==1 {
+                fmt.Printf("Use mvtrace signal=value")
+                break
+            }
+            expr := replaceHex(strings.Join(tokens[1:],""))
+            fmt.Println(expr)
+            if !mvTrace( trace, mame_st, expr ) { break prompt_loop } // EOF
+        }
+        case "match-vcd": { // moves the trace until it matches the VCD data
+            matchVCD( trace, sim_st, mame_st, ignore )
+        }
+        case "match-trace": { // moves the VCD until it matches MAME data
+            cmp.matchTrace( vcd, sim_st, mame_alias, mame_st, ignore )
+        }
+        case "?","help": {
+            fmt.Println(CMD_HELP)
+        }
+        default: fmt.Println("Unknown command ",tokens[0])
+        }
+    }
+    fmt.Println()
+}
+
+func mvTrace( trace *LnFile, mame_st *MAMEState, expr string ) bool {
+    l0 := trace.line
+    old_data := mame_st.data
+    if mame_st.data==nil || len(mame_st.data)==0 {
+        mame_st.data = parseTrace(trace.Text())
+    }
+    for {
+        mame_st.data["line"]=uint64(trace.line)
+        v, e := gval.Evaluate( expr, mame_st.data )
+        if e != nil {
+            fmt.Println(e)
+            break
+        }
+        f, fe := v.(bool)
+        if fe {
+            if f {
+                fmt.Printf("Moved by %d lines\n",trace.line-l0)
+                mame_st.data.showDiff(old_data)
+                break
+            }
+        } else {
+            fmt.Printf("Not a boolean expression\n")
+            break
+        }
+        if !trace.Scan() {
+            fmt.Println("Trace EOF")
+            return false
+        }
+        mame_st.data = parseTrace(trace.Text())
+    }
+    delete(mame_st.data,"line")
+    return true
+}
+
+func mvFrame( vcd *LnFile, sim_st *SimState, limit uint64 ) {
+    var frame *VCDSignal
+    for _,each := range sim_st.data {
+        if each.Name=="frame_cnt" {
+            frame = each
+            break
+        }
+    }
+    if sim_st.data==nil {
+        fmt.Printf("frame_cnt signal not found in VCD\n")
+        return
+    }
+    for frame.Value<limit && vcd.NextVCD(sim_st.data) { }
+}
+
+func mvVCD( vcd *LnFile, sim_st *SimState, hier *Hierarchy, expr string, scope string ) bool {
+    t0 := vcd.time
+    newline:=false
+    for {
+        valueMap := HierValues( hier )
+        valueMap["line"]=uint64(vcd.line)
+        valueMap["time"]=vcd.time
+        // add signals in scope
+        if scope!="" {
+            for _,each := range sim_st.data {
+                if each.Scope == scope {
+                    valueMap[each.Name]=each.Value
+                }
+            }
+        }
+        v, e := gval.Evaluate( expr, valueMap )
+        if e != nil {
+            fmt.Println(e)
+            break
+        }
+        f, fe := v.(bool)
+        if fe {
+            if f {
+                if newline { fmt.Println() }
+                fmt.Printf("+ %s\n",formatTime(vcd.time-t0))
+                return true
+            }
+        } else {
+            fmt.Printf("Not a boolean expression")
+            return false
+        }
+        if !vcd.NextVCD(sim_st.data) { break }
+        if vcd.time-t0>1000000000 { // 1ms
+            fmt.Print(".")
+            t0=vcd.time
+            newline=true
+        }
+    }
+    if newline { fmt.Println() }
+    fmt.Println("condition not found")
+    return false
+}
+
+func find_similar( name string, ss VCDData ) string {
+    pc := ""
+    for _, each := range ss {
+        if strings.ToLower(each.Name)==name {
+            pc = each.FullName()
+            break
+        }
+    }
+    if pc=="" {
+        // Try a partial match at the beginning of the name
+        for _, each := range ss {
+            if strings.Index( strings.ToLower(each.Name), name )==0 {
+                pc = each.FullName()
+                break
+            }
+        }
+    }
+    if pc=="" {
+        fmt.Printf("Could not find a suitable signal as '%s' in the VCD\n",name)
+    } else {
+        fmt.Printf("Using %s as '%s'\n",name,pc)
+    }
+    return pc
+}
+
+func findCommonScope( ss VCDData ) string {
+    scope := ""
+    var tokens []string
+    first := true
+    for _, each := range ss {
+        if first {
+            scope = each.Scope
+            if scope=="" { return "" }
+            tokens = strings.Split(scope,".")
+            first = false
+            continue
+        }
+        matched := false
+        for k:=len(tokens);k!=0;k-- {
+            check := strings.Join(tokens[0:k],".")
+            check_len := len(check)
+            if strings.HasPrefix( each.Scope, check) &&
+                ( len(each.Scope)==check_len ||
+                 (len(each.Scope)>check_len && each.Scope[check_len]=='.' )) {
+                scope = check
+                tokens = strings.Split(scope,".")
+                matched = true
+                break
+            }
+        }
+        if !matched { return "" }
+    }
+    return scope
+}
+
+// t must be MAME-name=VCD-name
+func parseAlias( t []string, ss VCDData, mame_alias mameAlias ) {
+    main_loop:
+    for _,each := range t {
+        if each[0]=='-' {
+            // remove the alias
+            delete(mame_alias, each[1:])
+            continue
+        }
+        tokens := strings.Split(each,"=")
+        if len(tokens)==0 { continue }
+        vcd_name := tokens[0]
+        if len(tokens)==2 {
+            vcd_name = tokens[1]
+        }
+        for _,s := range ss {
+            if s.Scope+"."+s.Name==vcd_name {
+                mame_alias[tokens[0]]=s
+                continue main_loop
+            }
+            if s.Name==vcd_name {
+                mame_alias[tokens[0]]=s
+            }
+        }
+        fmt.Printf("Cannot find VCD signal for %s\n",tokens[0])
+    }
+}
+
+// display all signals, or only the ones with partial string matches in the t []string
+func display( t []string, vcd, trace *LnFile, ss VCDData, scope string ) {
+    fmt.Printf("Trace at line %d - VCD at line %d (time %s)\n",
+        trace.line, vcd.line, formatTime(vcd.time))
+    sorted := make([]struct{
+        full string
+        p *VCDSignal },len(ss))
+    k := 0
+    for _, each := range ss {
+        sorted[k].p = each
+        sorted[k].full = each.FullName()
+        k++
+    }
+    sort.Slice(sorted,func(i,j int)bool {return strings.Compare(sorted[i].full,sorted[j].full)<0})
+    for _, each := range sorted {
+        print := t==nil
+        if !print {
+            for _,k := range t {
+                if strings.Index(each.full,k)!=-1 {
+                    print=true
+                    break
+                }
+            }
+        }
+        if print { each.p.Dump() }
+    }
+}
+
+func parseTrace( s string ) NameValue {
+    nv := pase_trace_interrupts(s)
+    parse_trace_tokens(s,nv)
+    return nv
+}
+
+func pase_trace_interrupts(s string) (nv NameValue) {
+    nv = make(NameValue)
+    if k := strings.Index(s,"*"); k!=-1 {
+        rest := s[k:]
+        s = s[0:k]
+        if k:=strings.Index(rest,"RTI");k!=-1 {
+            nv["RTI"]++
+            fmt.Printf("MAME RTI\n")
+        }
+        if k:=strings.Index(rest,"868D");k!=-1 {
+            fmt.Printf("MAME enters IRQ\n")
+        }
+    }
+    return nv
+}
+
+func parse_trace_tokens( s string, nv NameValue ) {
+    for _, token := range strings.Split(s,",") {
+        k := strings.Index(token,"=")
+        if k==-1 || k+1>len(token) { continue }
+        value_text := strings.TrimSpace(token[k+1:])
+        v,_ := strconv.ParseInt(value_text,16,64)
+        n := token[0:k]
+        nv[n] = uint64(v)
+    }
+}
+
+func diff( st *MAMEState, context string, verbose bool, ignore *boolSet ) int {
+    d := 0
+    var diffs []string
+    for name, value := range st.data {
+        if name=="PC" { continue }
+        p, _ := st.alias[name]
+        if p == nil { continue }
+        toignore := ignore.IsSet(name)
+        mask, _ := st.mask[name]
+        equal := (p.FullValue() | mask) == (value | mask)
+        if equal && toignore { // use full value to concatenate data
+            ignore.Remove(name) // stops ignoring it
+            fmt.Printf("%s taken out of the ignore list\n",name)
+        }
+        if !equal && !toignore {
+            if verbose {
+                if diffs==nil { diffs = make([]string,0,1) }
+                diffs = append(diffs, name)
+            }
+            d++
+        }
+        if p.Name=="irq_bsy" && p.Value==1 { // do not compare during the interrupt interval
+            return 0
+        }
+    }
+    if verbose && diffs!=nil {
+        if context!="" { fmt.Println(context) }
+        fmt.Println("\t     MAME  -   SIM")
+        slices.Sort(diffs)
+        for _,name := range diffs {
+            p,_ := st.alias[name]
+            if p==nil { continue }
+            fmt.Printf("\t%-4s %4X <-> %4X (%s.%s)\n", name, st.data[name], p.FullValue(), p.Scope, p.Name )
+        }
+    }
+    return d
+}
+
+func (cmp *Comparator) nxVCDChange( file *LnFile, sim_st *SimState, mame_alias mameAlias ) (int,bool) {
+    l0 := file.line
+    changed := false
+    irq_bsy := sim_st.data.Get("TOP.game_test.u_game.u_game.u_main.u_cpu.u_ctrl.u_ucode.irq_bsy")
+    was_irq := irq_bsy!=nil && irq_bsy.Value!=0
+    was_stack := cmp.stack_busy!=nil && cmp.stack_busy.Value!=0
+    was_alu   := cmp.alu_busy!=nil   && cmp.alu_busy.Value!=0
+    was_str   := cmp.str_busy!=nil   && cmp.str_busy.Value!=0
+    for file.Scan() {
+        txt := file.Text()
+        if txt[0]=='#' {
+            file.time, _ = strconv.ParseUint( txt[1:],10,64 )
+            if changed {
+                break
+            } else {
+                continue
+            }
+        }
+        a, v := parseValue(txt)
+        assign( a, v, sim_st.data )
+        p,_ := sim_st.data[a]
+        if p==nil {
+            log.Fatal("Error: bad pointer to VCDSignal\n")
+        }
+        // Skip busy sections
+        if cmp.alu_busy!=nil && cmp.alu_busy.Value==1 {
+            was_alu = true
+            continue
+        } else if was_alu {
+            changed = true
+            break
+        }
+        if cmp.str_busy!=nil && cmp.str_busy.Value==1 {
+            was_str = true
+            continue
+        } else if was_str {
+            changed = true
+            break
+        }
+        if cmp.stack_busy!=nil && cmp.stack_busy.Value==1 {
+            was_stack = true
+            continue
+        } else if was_stack {
+            changed = true
+            break
+        }
+        if irq_bsy!=nil && irq_bsy.Value==1 {
+            if !was_irq {
+                was_irq=true
+                fmt.Println("VCD enters IRQ")
+            }
+            continue  // fly over the interrupt
+        } else if was_irq {
+            changed = true
+            break
+        }
+        for _,v := range mame_alias {
+            if p==v {
+                changed = true
+                // fmt.Printf("%s=%X\n",p.FullName(),p.Value)
+                break
+            }
+        }
+    }
+    if !changed {
+        fmt.Printf("Reached EOF of VCD file after ")
+    }
+    return file.line-l0, changed
+}
+
+func nxTraceChange( trace *LnFile, mame_st *MAMEState ) (NameValue,bool) {
+    // l0 := trace.line
+    for trace.Scan() {
+        old := mame_st.data
+        mame_st.data = parseTrace(trace.Text())
+        for name, _ := range mame_st.alias {
+            if mame_st.data[name] != old[name] {
+                // fmt.Printf(">%s changed\n",name)
+                // fmt.Printf("trace +%d lines\n",trace.line-l0)
+                return mame_st.data,true
+            }
+        }
+    }
+    fmt.Printf("Trace EOF\n")
+    return mame_st.data,false
+}
+
+func (cmp *Comparator)searchDiff( vcd,trace *LnFile, sim_st *SimState, mame_st *MAMEState,
+        ignore *boolSet ) {
+    if mame_st.data==nil || len(mame_st.data)==0 {
+        trace.Scan()
+        mame_st.data = parseTrace(trace.Text())
+    }
+
+    var good bool
+    tvcd := vcd.time
+    var div_time uint64
+    main_loop:
+    for {
+        mame_st.data, good = nxTraceChange( trace, mame_st )
+        if !good { break }
+        div_time = vcd.time
+        for k:=0;k<cmp.kmax;k++ {
+            if diff( mame_st, "", false, ignore )==0 { continue main_loop }
+            _, good := cmp.nxVCDChange( vcd, sim_st, mame_st.alias )
+            if !good { break }
+            // fmt.Printf("+%d VCD lines\n",lines)
+        }
+        if diff( mame_st, "", false, ignore )!=0 {
+            break
+        }
+    }
+    fmt.Printf("+%s\n", formatTime(vcd.time-tvcd))
+    // display the difference
+    diff( mame_st, fmt.Sprintf("trace at %d - vcd time %s (diverged at %s)",
+        trace.line,formatTime(vcd.time), formatTime(div_time)), true, ignore )
+}
+
+func matchVCD( trace *LnFile, sim_st *SimState, mame_st *MAMEState, ignore *boolSet ) bool {
+    if mame_st.data==nil || len(mame_st.data)==0 {
+        trace.Scan()
+        mame_st.data = parseTrace(trace.Text())
+    }
+    line0 := trace.line
+    var good, matched bool
+    for {
+        mame_st.data, good = nxTraceChange( trace, mame_st )
+        matched = diff( mame_st, "", false, ignore )==0
+        if !good || matched { break }
+    }
+    // display the difference
+    if !matched {
+        fmt.Printf("Impossible to match MAME to VCD")
+        diff( mame_st, fmt.Sprintf("trace at %d",trace.line), true, ignore )
+    } else {
+        fmt.Printf("VCD matched by advancing MAME trace(+ %d lines)\n",trace.line-line0)
+    }
+    return matched
+}
+
+func (cmp *Comparator)matchTrace( file *LnFile, sim_st *SimState, mame_alias mameAlias,
+        mame_st *MAMEState, ignore *boolSet ) bool {
+    var good, matched bool
+    total_lines := 0
+    time0 := file.time
+    for {
+        lines := 0
+        lines, good = cmp.nxVCDChange( file, sim_st, mame_alias )
+        total_lines += lines
+        matched = diff( mame_st, "", false, ignore )==0
+        if !good || matched { break }
+    }
+    // display the difference
+    if !matched {
+        fmt.Printf("Impossible to match VCD to MAME")
+        diff( mame_st, fmt.Sprintf("sim at time %d",file.time), true, ignore )
+    } else {
+        time1 := file.time
+        delta := time1-time0
+        fmt.Printf("MAME trace matched by advancing the VCD by %d lines (%s)\n",
+            total_lines, formatTime(delta))
+    }
+    return matched
+}
+
+
+func MakeAlias( trace string, ss VCDData ) mameAlias {
+    mame_alias := make(mameAlias)
+    tokens := strings.Split(trace,",")
+    if len(tokens)==0 { return mame_alias }
+
+    for _,each := range tokens {
+        if len(each)==0 || each[0]=='*' { break }
+        k := strings.Index(each,"=")
+        if k==-1 { continue }
+        name := strings.ToLower(each[0:k])
+        if name=="pc" || name=="frame_cnt" { continue } // these are normally hard to match
+        var p *VCDSignal
+        for _, v := range ss {
+            if strings.ToLower(v.Name)==name {
+                p = v
+                break
+            }
+        }
+        if p==nil {
+            fmt.Printf("Cannot alias signal %s\n",name)
+            continue
+        }
+        mame_alias[each[0:k]]=p
+    }
+    return mame_alias
+}
+
+func display_trace(mame_st *MAMEState, trace *LnFile) {
+    fmt.Printf("At line %d",trace.line)
+    ltxt := trace.Text()
+    print_assembler_code(ltxt)
+
+    names := mame_st.get_sorted_name_indexes()
+    if len(names)==0 {
+        fmt.Println("\nNo register content in line")
+        fmt.Printf("Line: '%s'\n",ltxt)
+        return
+    }
+    mame_st.print_registers(names)
+}
+
+func print_assembler_code(line string) {
+    if k:=strings.Index(line,"*"); k!=-1 {
+        assembler_code := line[k+1:]
+        fmt.Println(assembler_code)
+    }
+}
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/vcd_cmd_test.go

@@ -0,0 +1,31 @@
+package vcd
+
+import(
+	"testing"
+)
+
+func Test_parseTrace(t *testing.T) {
+	match_parse_namevalue("AF=1234",NameValue{"AF":0x1234},t)
+	match_parse_namevalue("AF=1234,DE=5678",NameValue{"AF":0x1234,"DE":0x5678},t)
+	match_parse_namevalue("AF=  34",NameValue{"AF":0x0034},t)
+	match_parse_namevalue("AF=  34,DE=  78",NameValue{"AF":0x0034,"DE":0x0078},t)
+}
+
+func match_parse_namevalue(trace string,expected NameValue,t *testing.T) {
+	got := parseTrace(trace)
+	if len(got)!=len(expected) {
+		t.Error("Got wrong number of elements")
+		return
+	}
+	for name,val := range got {
+		exp,found := expected[name]
+		if !found {
+			t.Errorf("Missing value for %s",name)
+			return
+		}
+		if exp != val {
+			t.Errorf("Wrong value for %s",name)
+			return
+		}
+	}
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/src/jtutil/vcd/vcd_parser.go

@@ -0,0 +1,578 @@
+/*  This file is part of JTCORES.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Date: 4-1-2025 */
+
+package vcd
+
+import(
+	"fmt"
+	"os"
+	"regexp"
+	"slices"
+	"strings"
+	"strconv"
+	"sort"
+)
+
+type VCDSignal struct{
+	Scope, Name string
+	alias string
+	MSB,LSB int // MSB-LSB<=64, so it can fit in Value
+	Value, copy uint64
+	Concat struct{
+		p *VCDSignal	// signal to concatenate
+		at int			// bit position at which concatenation starts
+	}
+}
+
+type VCDData map[string]*VCDSignal
+type boolSet struct {
+	v validator
+	set map[string]bool
+}
+
+type Hierarchy struct{
+	Nested map[string]*Hierarchy
+	Signals map[string]*VCDSignal
+}
+
+func (bset boolSet) Dump() {
+    for k, each := range bset.set {
+        if each { fmt.Printf("%s\n",k) }
+    }
+}
+
+type validator interface {
+	validate (name string) bool
+}
+
+func newBoolSet(v validator) (*boolSet) {
+	return &boolSet{
+		v: v,
+		set: make(map[string]bool),
+	}
+}
+
+func (b *boolSet) Update(all_names...string) {
+    for _, name := range all_names {
+        turnon:= true
+        if name[0]=='-' {
+            turnon = false
+            name=name[1:]
+        }
+        if !b.v.validate(name) {
+            fmt.Printf("Couldn't find %s\n", name)
+            continue
+        }
+        b.set[name]=turnon
+    }
+}
+
+func (b *boolSet)Remove(all_names... string) {
+    for _, name := range all_names {
+        b.set[name]=false
+    }
+}
+
+func (b boolSet)IsSet(name string) bool {
+	valid, _ := b.set[name]
+	return valid
+}
+
+func (this *VCDSignal) Dump() {
+	if this.Scope != "" { fmt.Printf("%s.", this.Scope ) }
+	fmt.Printf( "%s",this.Name)
+	if this.MSB!=0 {
+		fmt.Printf("[%d:%d]",this.MSB, this.LSB)
+	}
+	fmt.Printf("\t = %X", this.Value )
+	if this.Concat.p != nil {
+		fmt.Printf(" -> %X", this.FullValue())
+	}
+	// the frame count is shown in decimal too
+	if( this.Name == "frame_cnt") {
+		fmt.Printf(" ('d%d)",this.Value)
+	}
+	fmt.Println()
+}
+
+func (this *VCDSignal)FullValue() uint64 {
+	v := this.Value
+	cat := this.Concat
+	for cat.p!=nil {
+		v = v | (cat.p.Value<<cat.at) // no masking for now
+		cat = cat.p.Concat
+	}
+	return v
+}
+
+func (this *VCDSignal)Save() {
+	this.copy = this.Value
+}
+
+func (this *VCDSignal)Restore() {
+	this.Value = this.copy
+}
+
+func (this *VCDSignal)FullName() string {
+	if this.Scope=="" {
+		return this.Name
+	} else {
+		return this.Scope+"."+this.Name
+	}
+}
+
+func (this VCDData)Get(name string) *VCDSignal {
+	if name=="" { return nil }
+	for _,each := range this {
+		if each.FullName()==name { return each }
+	}
+	return nil
+}
+
+// gets the scope part of a hierarchinal signal name
+func GetScope( name string ) (string, string) {
+	tokens := strings.Split(name,".")
+	if len(tokens)==1 {
+		return "",name
+	}
+	return strings.Join(tokens[0:len(tokens)-1],"."), tokens[len(tokens)-1]
+}
+
+func (this VCDData)GetAll(name string, matchScope bool) []*VCDSignal {
+	if name=="" { return nil }
+	r := make([]*VCDSignal,0,1)
+	scope,name := GetScope(name)
+	for _,each := range this {
+		if each.Name==name && (!matchScope || scope==each.Scope) {
+			r=append(r,each)
+		}
+	}
+	if len(r) == 0 {
+		return nil
+	} else {
+		return r
+	}
+}
+
+func RenameRegs( ss VCDData ) {
+	// Rename signals for some CPUs
+	// fx68k
+	for _,each := range ss {
+		switch each.Name {
+		case "regs68L[0]": each.Name="D0"
+		case "regs68L[1]": each.Name="D1"
+		case "regs68L[2]": each.Name="D2"
+		case "regs68L[3]": each.Name="D3"
+		case "regs68L[4]": each.Name="D4"
+		case "regs68L[5]": each.Name="D5"
+		case "regs68L[6]": each.Name="D6"
+		case "regs68L[7]": each.Name="D7"
+
+		case "regs68H[0]": each.Name="D0H"
+		case "regs68H[1]": each.Name="D1H"
+		case "regs68H[2]": each.Name="D2H"
+		case "regs68H[3]": each.Name="D3H"
+		case "regs68H[4]": each.Name="D4H"
+		case "regs68H[5]": each.Name="D5H"
+		case "regs68H[6]": each.Name="D6H"
+		case "regs68H[7]": each.Name="D7H"
+
+		case "regs68L[8]": each.Name="A0"
+		case "regs68L[9]": each.Name="A1"
+		case "regs68L[10]": each.Name="A2"
+		case "regs68L[11]": each.Name="A3"
+		case "regs68L[12]": each.Name="A4"
+		case "regs68L[13]": each.Name="A5"
+		case "regs68L[14]": each.Name="A6"
+		case "regs68L[16]": each.Name="A7"
+
+		case "regs68H[8]": each.Name="A0H"
+		case "regs68H[9]": each.Name="A1H"
+		case "regs68H[10]": each.Name="A2H"
+		case "regs68H[11]": each.Name="A3H"
+		case "regs68H[12]": each.Name="A4H"
+		case "regs68H[13]": each.Name="A5H"
+		case "regs68H[14]": each.Name="A6H"
+		case "regs68H[16]": each.Name="A7H"
+		}
+	}
+	concatHL := func( H,L string ) {
+		for _, each := range ss {
+			if each.Name==L {
+				for _, eachH := range ss {
+					if eachH.Name==H && eachH.Scope == each.Scope {
+						each.Concat.p = eachH
+						each.Concat.at = 16
+					}
+				}
+			}
+		}
+	}
+	concatSeries := func( prefix string ) {
+		for k:=0;k<8;k++ {
+			L := fmt.Sprintf("%s%d",prefix,k)
+			H := fmt.Sprintf("%s%dH",prefix,k)
+			concatHL( H, L )
+		}
+	}
+
+	concatSeries("D")
+	concatSeries("A")
+	concatHL("PcH","PcL")
+}
+
+func formatTime( t uint64 ) string {
+	tpico := t
+	t /= 1000 // ignore ps
+	if t==0 { return "0 s" }
+	o := 0
+	units := []string{"ns","us","ms","s"}
+	parts := []uint64{0,0,0,0}
+	for t>0 && o<4 {
+		parts[o] = t%1000
+		t/= 1000
+		o++
+	}
+	var s string
+	for k:=0;k<o; k++ {
+		if s!="" { s=","+s}
+		s = fmt.Sprintf("%d%s%s",parts[k],units[k],s)
+	}
+	s = fmt.Sprintf("%s= %d",s,tpico)
+	return s
+}
+
+func GenerateHierarchy( ss VCDData ) *Hierarchy {
+	// Convert ss to a slice
+	signals := make([]*VCDSignal,len(ss))
+	k := 0
+	for _,each := range ss {
+		signals[k] = each
+		k++
+	}
+	// Sort by scope length, then signal name
+	sort.Slice(signals,func( i, j int ) bool {
+		s := strings.Compare(signals[i].Scope,signals[j].Scope)
+		if s==0 {
+			return strings.Compare(signals[i].Name,signals[j].Name)<0
+		}
+		return s<0
+	})
+	// Create the hierarchy following the sorted list
+	return fillHierarchy( signals, "")
+}
+
+func fillHierarchy( signals []*VCDSignal, scope string ) *Hierarchy {
+	h := &Hierarchy{}
+	last := ""
+	for k, _ := range signals {
+		if signals[k].Scope==scope {
+			if h.Signals==nil { h.Signals = make(map[string]*VCDSignal) }
+			h.Signals[signals[k].Name]=signals[k]
+			continue
+		}
+		if strings.HasPrefix(signals[k].Scope,scope+".") || scope=="" {
+			var nx_scope, nx_full string
+			var rest []string
+			if scope == "" {
+				rest = strings.Split( signals[k].Scope, "." )
+				nx_scope = rest[0]
+				nx_full = nx_scope
+			} else {
+				rest = strings.Split( signals[k].Scope[len(scope)+1:], "." )
+				nx_scope = rest[0]
+				nx_full = scope+"."+nx_scope
+			}
+			if last != nx_scope {
+				nested := fillHierarchy( signals[k:], nx_full )
+				if h.Nested == nil { h.Nested = make(map[string]*Hierarchy) }
+				h.Nested[nx_scope] = nested
+				last = nx_scope
+			}
+			continue
+		}
+		break
+	}
+	return h
+}
+
+func (this *Hierarchy) Dump(indent string) {
+	i2 := indent+"  "
+	if len(this.Signals)>0 {
+		signals := make([]*VCDSignal,len(this.Signals))
+		cnt:=0
+		for _,s := range this.Signals {
+			signals[cnt] = s
+			cnt++
+		}
+		sort.Slice(signals,func(i,j int) bool {
+				return strings.Compare( signals[i].Name, signals[j].Name )<0
+			})
+		for _, each := range signals{
+			fmt.Printf("%s%s (%X)\n",indent,each.Name, each.Value)
+		}
+	}
+	for name,each := range this.Nested {
+		fmt.Println(indent+">"+name)
+		each.Dump(i2)
+	}
+}
+
+func HierValues( h *Hierarchy ) map[string]interface{} {
+	r := make(map[string]interface{})
+	for name,each := range h.Signals {
+		r[name] = each.Value
+	}
+	for name,each := range h.Nested {
+		r[name] = HierValues(each)
+	}
+	return r
+}
+
+func replaceHex( s string ) string {
+	re := regexp.MustCompile("\\$[a-fA-F0-9]+")
+	matches := re.FindAllString( s, -1 )
+	for _, each := range matches {
+		v, _ := strconv.ParseUint( each[1:], 16, 64 )
+		s = strings.ReplaceAll( s, each, fmt.Sprintf("%d",v) )
+	}
+	return s
+}
+
+func setSignal( s string, hier *Hierarchy ) {
+	tokens := strings.Split(s,"=")
+	if len(tokens)!=2 {
+		fmt.Println("Wrong expression ", s)
+		return
+	}
+	p := findSignal(tokens[0], hier )
+	if p==nil {
+		fmt.Println(s, " not found")
+		return
+	}
+	if tokens[1]!="" && tokens[1][0]=='$' { // ignore a $ before the number
+		tokens[1]=tokens[1][1:]
+	}
+	p.Value, _ = strconv.ParseUint( tokens[1],16, 64)
+}
+
+func findSignal( s string, h *Hierarchy ) *VCDSignal {
+	t := strings.Split(s,".")
+	k:=0
+	for ; k<len(t)-1;k++ {
+		nx, f := h.Nested[t[k]]
+		if !f {
+			return nil
+		}
+		h = nx
+	}
+	signal, f := h.Signals[t[k]]
+	if !f {
+		return nil
+	}
+	return signal
+}
+
+func ( this *NameValue ) showDiff( o NameValue ) bool {
+	if o==nil || len(o)==0 || len(*this)==0 { return true }
+	cnt:=0
+	diff := false
+	for k,v := range *this {
+		v2, f := o[k]
+		if f && v!=v2 {
+			if k=="frame_cnt" {
+				fmt.Printf("%s='d%d\t",k,v)
+			} else {
+				fmt.Printf("%s=%x\t",k,v)
+			}
+			cnt++
+			if cnt==8 {
+				cnt=0
+				fmt.Print("\n")
+			}
+			diff = true
+		}
+	}
+	if cnt!=0 { fmt.Printf("\n") }
+	return diff
+}
+
+func (file *LnFile) NextVCD( ss VCDData ) bool {
+	// fmt.Printf("%s (#%d @%d):\n",file.fname,file.time, file.line)
+    for file.Scan() {
+        txt := file.Text()
+        if txt[0]=='#' {
+            file.time, _ = strconv.ParseUint( txt[1:],10,64 )
+            return true
+        }
+        // fmt.Printf("\t%s\n",txt)
+        a, v := parseValue(txt)
+        assign( a, v, ss )
+    }
+    return false // EOF
+}
+
+// advance the VCD scan upto the next change in any of the provided signals
+func (file *LnFile) NextChangeIn( ss VCDData, names []string ) bool {
+	// fmt.Printf("%s (#%d @%d):\n",file.fname,file.time, file.line)
+	found := false
+    for file.Scan() {
+        txt := file.Text()
+        if txt[0]=='#' {
+            file.time, _ = strconv.ParseUint( txt[1:],10,64 )
+            if found {
+            	return true
+            } else {
+            	continue
+            }
+        }
+        // fmt.Printf("\t%s\n",txt)
+        a, v := parseValue(txt)
+        if slices.Contains( names, a ) { found = true }
+        assign( a, v, ss )
+    }
+    return false // EOF
+}
+
+// advance until given time
+func (file *LnFile) MoveTo( ss VCDData, t0 uint64 ) bool {
+	good := true
+	for file.time<t0 && good { good = file.NextVCD(ss) }
+	return good
+}
+
+func GetSignals( file *LnFile ) VCDData {
+    ss := make(VCDData)
+    scope := ""
+    type Mode int
+    const(
+        SCAN Mode = iota
+        PASS
+        INIT
+    )
+    mode := SCAN
+    scan_through:
+    for ; file.scn.Scan(); file.line++ {
+        txt := file.scn.Text()
+        switch(mode) {
+            case SCAN: {
+                tokens := strings.Fields(txt)
+                switch(tokens[0]) {
+                    case "$date","$version","$timescale": mode=PASS
+                    case "$scope": {
+                        if tokens[1]!="module" {
+                            fmt.Printf("Unknown syntax at line %d: %s\n",file.line, txt)
+                        }
+                        if scope!="" { scope += "." }
+                        scope += tokens[2]
+                    }
+                    case "$upscope": {
+                        if i := strings.LastIndex(scope,"."); i!=-1 {
+                            scope = scope[0:i]
+                        }
+                    }
+                    case "$var": {
+                        if tokens[1]!="wire" {
+                            fmt.Printf("Unknown syntax at line %d: %s\n",file.line, txt)
+                            break
+                        }
+                        s := &VCDSignal{
+                            Scope: scope,
+                            alias: tokens[3],
+                        }
+                        bracket_str := tokens[4]
+                        bracket := 0
+                        if tokens[5][0]=='[' { // bus expression is separated
+                            bracket_str = tokens[5]
+                            s.Name = tokens[4]
+                        } else {
+                            bracket = strings.Index(tokens[4],"[")
+                            if bracket == -1 {
+                                s.Name = tokens[4]
+                                bracket_str = ""
+                            } else {
+                                s.Name = tokens[4][0:bracket]
+                                bracket_str = tokens[4]
+                                bracket++
+                            }
+                        }
+                        if bracket_str!="" {
+                            bend := strings.Index(bracket_str,"]")
+                            parts := strings.Split(bracket_str[bracket:bend-1],":")
+                            s.MSB,_ = strconv.Atoi(parts[0])
+                            if len(parts)==2 {
+                                s.LSB,_ = strconv.Atoi(parts[1])
+                            }
+                        }
+                        ss[s.alias] = s
+                    }
+                    case "$dumpvars": mode = INIT
+                }
+            }
+            case INIT: {
+                if txt=="$end" {
+                    file.line++
+                    break scan_through
+                }
+                a, v := parseValue( txt )
+                assign( a, v, ss )
+            }
+            case PASS : {
+                if txt=="$end" {
+                    mode = SCAN
+                }
+            }
+        }
+    }
+    return ss
+}
+
+
+func assign( alias string, v uint64, ss VCDData) {
+    p, _ := ss[alias]
+    if p==nil {
+    	if alias=="" || alias==" " {
+    		fmt.Println("vcd_parser: called assign with no signal alias")
+        	os.Exit(1)
+    	}
+        fmt.Printf("Warning: signal VCDData aliased as -> %s <- not found\n",alias)
+        return
+    }
+    p.Value = v
+}
+
+func parseValue( txt string ) ( string, uint64 ) {
+    if txt[0]!='0' && txt[0]!='1' && txt[0]!='b' {
+        fmt.Printf("Warning: unexpected value definition %s\n",txt)
+        return "",0
+    }
+    var v uint64
+    if txt[0] == 'b' {
+        var s int
+        for s=1; s<len(txt) && txt[s]!=' '; s++ {
+            v <<= 1
+            if txt[s]=='1' {
+                v |= 1
+            }
+        }
+        s++
+        return txt[s:], v
+    } else {
+        if txt[0]=='1' { v=1 }
+        return txt[1:], v
+    }
+}

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/cpu/pauloblaze.qip

@@ -0,0 +1,7 @@
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/op_codes.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/alu.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/decoder.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/io_module.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/pauloBlaze.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/program_counter.vhd ]
+set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) ../../hdl/cpu/pauloblaze/regFile.vhd ]

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/jtframe_2308/adc_test.sdc

@@ -0,0 +1,2 @@
+create_clock -period "50.0 MHz" [get_ports FPGA_CLK1_50]
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/jtframe_2308/adc_test.v

@@ -0,0 +1,72 @@
+module adc_test(
+    input            FPGA_CLK1_50,
+    output           LED_USER,
+    output           LED_HDD,
+    output           LED_POWER,
+    output     [7:0] LED,
+    // ADC
+    output           ADC_CONVST,
+    output           ADC_SCK,
+    output           ADC_SDI,
+    input            ADC_SDO
+);
+
+wire clk = FPGA_CLK1_50;
+reg  [7:0] ledsr = 8'd1;
+
+reg [25:0] cnt=0;
+wire [2:0] LEDmister;
+// assign LED = ledsr;
+assign {LED_POWER,LED_HDD,LED_USER} = LEDmister; //~{ |ledsr[7:6], |ledsr[5:3], |ledsr[2:0] };
+
+always @(posedge clk) begin 
+    if( cnt[25] ) begin
+        cnt <= 0;
+        ledsr <= { ledsr[6:0], ledsr[7] };
+    end else begin
+        cnt <= cnt + 26'd1;
+    end
+end
+
+reg [5:0] rst_sr=6'b100_000;
+always @(negedge clk) begin
+    rst_sr <= { rst_sr[4:0], 1'b1 };
+end
+
+wire rst_n = rst_sr[5];
+
+reg [1:0] cen_cnt=0;
+reg cen;
+always @(negedge clk) begin
+    cen_cnt <= cen_cnt+2'd1;
+    cen <= cen_cnt == 2'b00;
+end
+
+wire [11:0] adc_read;
+assign { LEDmister, LED } = {~adc_read[10:8], adc_read[7:0]};
+
+/*
+always @(*) begin
+    if( adc_read < 12'd64   ) LEDmister <= 3'b000;
+    else
+    if( adc_read < 12'd512  ) LEDmister <= 3'b001;
+    else
+    if( adc_read < 12'd1512 ) LEDmister <= 3'b011;
+    else LEDmister <= 3'b111;
+end
+*/
+jtframe_2308 adc(
+    .rst_n      ( rst_n      ),
+    .clk        ( clk        ),
+    .cen        ( cen        ),        // CEN+CLK < 40MHz
+    // ADC control
+    .adc_sdo    ( ADC_SDO    ),
+    .adc_convst ( ADC_CONVST ),
+    .adc_sck    ( ADC_SCK    ),
+    .adc_sdi    ( ADC_SDI    ),
+    // ADC read data
+    .adc_read   ( adc_read   )
+);
+
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/jtframe_2308/makefile

@@ -0,0 +1,63 @@
+PROJECT=adc_test
+SOURCE_FILES= \
+	../../hdl/mister/jtframe_2308.v \
+	adc_test.v set_pins.tcl
+
+ASSIGNMENT_FILES = adc_test.qpf adc_test.qsf
+
+all: smart.log $(PROJECT).asm.rpt $(PROJECT).sta.rpt
+
+clean:
+	rm -rf *.rpt *.chg smart.log *.htm *.eqn *.pin *.sof *.pof db qdb
+	rm -rf hc_output incremental_db *jdi *fit.* *summary
+	rm -f $(PROJECT).qsf *.qws *.qpf *.smsg
+
+prog: $(PROJECT).sof
+	quartus_pgm -c "DE-SoC [1-1.2.1.1]" $(PROJECT).sof
+
+map: smart.log $(PROJECT).map.rpt
+fit: smart.log $(PROJECT).fit.rpt
+asm: smart.log $(PROJECT).asm.rpt
+sta: smart.log $(PROJECT).sta.rpt
+smart: smart.log
+
+MAP_ARGS = --family="Cyclone V"
+# MAP_ARGS = --part=5CSEBA6U23I7DK
+FIT_ARGS = --part=5CSEBA6U23I7
+ASM_ARGS =
+STA_ARGS =
+
+STAMP = echo done >
+
+$(PROJECT).map.rpt: map.chg $(SOURCE_FILES)
+	quartus_map $(MAP_ARGS) $(PROJECT)
+	$(STAMP) asm.chg
+	$(STAMP) sta.chg
+
+$(PROJECT).fit.rpt: fit.chg $(PROJECT).map.rpt
+	quartus_fit $(FIT_ARGS) $(PROJECT)
+	$(STAMP) asm.chg
+	# $(STAMP) sta.chg
+
+$(PROJECT).asm.rpt: asm.chg $(PROJECT).fit.rpt
+	quartus_asm $(ASM_ARGS) $(PROJECT)
+
+$(PROJECT).sta.rpt: sta.chg $(PROJECT).fit.rpt
+	quartus_sta $(STA_ARGS) $(PROJECT)
+
+smart.log: $(ASSIGNMENT_FILES)
+	quartus_sh --determine_smart_action $(PROJECT) > smart.log
+
+$(ASSIGNMENT_FILES): set_pins.tcl
+	quartus_sh --prepare $(PROJECT)
+	quartus_sh -t set_pins.tcl
+
+map.chg:
+	$(STAMP) map.chg
+fit.chg:
+	$(STAMP) fit.chg
+sta.chg:
+	$(STAMP) sta.chg
+asm.chg:
+	$(STAMP) asm.chg
+

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/jtframe_2308/set_pins.tcl

@@ -0,0 +1,57 @@
+project_open adc_test
+
+# Files
+set_global_assignment -name QIP_FILE source.qip
+
+# Pins
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
+set_location_assignment PIN_W15 -to LED[0]
+set_location_assignment PIN_AA24 -to LED[1]
+set_location_assignment PIN_V16 -to LED[2]
+set_location_assignment PIN_V15 -to LED[3]
+set_location_assignment PIN_AF26 -to LED[4]
+set_location_assignment PIN_AE26 -to LED[5]
+set_location_assignment PIN_Y16 -to LED[6]
+set_location_assignment PIN_AA23 -to LED[7]
+
+#============================================================
+# I/O
+#============================================================
+set_location_assignment PIN_Y15 -to LED_USER
+set_location_assignment PIN_AA15 -to LED_HDD
+set_location_assignment PIN_AG28 -to LED_POWER
+
+#set_location_assignment PIN_AH24 -to BTN_USER
+#set_location_assignment PIN_AG25 -to BTN_OSD
+#set_location_assignment PIN_AG23 -to BTN_RESET
+
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_*
+#set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BTN_*
+#set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to BTN_*
+
+
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
+set_location_assignment PIN_V11 -to FPGA_CLK1_50
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+
+
+#============================================================
+# ADC
+#============================================================
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
+set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
+set_location_assignment PIN_U9 -to ADC_CONVST
+set_location_assignment PIN_V10 -to ADC_SCK
+set_location_assignment PIN_AC4 -to ADC_SDI
+set_location_assignment PIN_AD4 -to ADC_SDO
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

snapshots/jotego_jtcores_pr1270/modules/jtframe/syn/jtframe_2308/source.qip

@@ -0,0 +1,3 @@
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/mister/jtframe_2308.v    ]
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) adc_test.v     ]
+set_global_assignment -name SDC_FILE     [file join $::quartus(qip_path) adc_test.sdc   ]

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/cfg/common.yaml

@@ -0,0 +1,49 @@
+# Common files to MiST, SiDi and NeptUNO
+jtframe:
+  - from: sound
+    unless: [ POCKET ]
+    get:
+      - hybrid_pwm_sd.v
+      - hifi_1bit_dac.v
+  - from: clocking
+    get:
+      - jtframe_sync.v
+      - jtframe_rst_sync.v
+  # JTFRAME scan doubler for memory constrained systems
+  - from: video
+    get:
+      - jtframe_scan2x.v
+  - from: video/rotate
+    get:
+    - scandoubler_rgb_interp.v
+    - scandoubler_rotate.v
+    - scandoubler_scaledepth.v
+    - scandoubler_sdram.v
+    - unsigned_division.v
+    - pixel_interp.v
+    - frac_interp.v
+jtframe/target/mist:
+  - get:
+      - jtframe_mist_clocks.v
+      - jtframe_mist_video.v
+      - osd.sv
+      - rgb2ypbpr.v
+  - unless: [ SIDI128, POCKET ]
+    get:
+      - pll_game.qip
+  - unless: [ POCKET ]
+    get:
+      - jtframe_mist_base.v
+      - mist_io.sdc
+  - unless: [ SIDI128, POCKET ]
+    get:
+      - sdram_clk.sdc # must come after mist_io.sdc
+      # PLLs
+  - unless: [ SIDI128 ]
+    get:
+      - pll.qip
+jtframe/target/mister:
+  - unless: [ VERILATOR ]
+    from: sys
+    get:
+      - yc_out.sv

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/cfg/files.yaml

@@ -0,0 +1,11 @@
+jtframe/target/mist:
+  - get:
+    - common.yaml
+    - jtframe_mist_top.sv
+    - jtframe_mist.sv
+    - jtframe_mist_video.v
+    - user_io.v
+    - i2c_master.v
+    - i2s.v
+    - spdif.v
+    - data_io.v

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/cfg/sim.yaml

@@ -0,0 +1,18 @@
+jtframe:
+  - from: clocking
+    get:
+      - jtframe_rst_sync.v
+      - jtframe_sync.v
+  - from: ver
+    get:
+      - video_dump.v
+      - mt48lc16m16a2.v
+      - spitx.v
+      - fast_pll.v
+      - jtframe_romrq_rdy_check.v
+jtframe/target/mist:
+  - unless: [ VERILATOR ]
+    from: ../ver
+    get:
+      - mist_test.v
+      - test_harness.v

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/cfgstr

@@ -0,0 +1,19 @@
+{{.CORENAME}};;
+
+                                    DIP;
+{{ if .JTFRAME_OSD_LOAD }}          F,rom; {{ end }}
+{{ if .JTFRAME_VERTICAL }}
+{{ if .JTFRAME_OSD_FLIP }}          O1,Flip screen,Off,On; {{ end }}
+                                    O2,Rotate controls,Yes,No;
+{{ if .JTFRAME_SDRAM_ROTATION }}    OD,Screen Rotation,No,Yes; {{ end }}{{ end }}
+                                    O34,Video Mode, pass thru, linear, analogue, dark;
+{{ if .JTFRAME_JOY1_POS }}          OIJ,Player 1 character,First,Second,Third,Fourth; {{ end }}
+{{ if .JTFRAME_OSD_VOL }}           O67,FX volume, high, very high, very low, low; {{ end }}
+{{ if .JTFRAME_OSD_TEST }}          OA,Test mode,Off,On; {{ end }}
+{{ if .JTFRAME_DIAL }}              O67,Sensitivity,high,highest,lowest,low;{{end}}
+{{ if not .JTFRAME_OSD_NOCREDITS }} OC,Pause,Off,On; {{ end }}
+{{ .SEPARATOR }}
+{{ .CORE_OSD }}
+{{ with .JTFRAME_IOCTL_RD }}         R{{ . }},Save NVRAM;{{ end }}
+T0,Reset v{{.JTFRAME_COMMIT}};
+V,{{ .JTFRAME_COMMIT }} - patreon.com/jotego

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/data_io.v

@@ -0,0 +1,572 @@
+//
+// data_io.v
+//
+// data_io for the MiST board
+// https://github.com/mist-devel
+//
+// Copyright (c) 2014 Till Harbaum <till@harbaum.org>
+//
+// This source file is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published
+// by the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This source file is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+///////////////////////////////////////////////////////////////////////
+
+module data_io #( parameter
+	START_ADDR = 27'd0,
+	ROM_DIRECT_UPLOAD = 1'b0,
+	USE_QSPI = 1'b0,
+	ENABLE_IDE = 1'b0,
+	DOUT_16 = 1'b0
+)(
+	input             clk_sys,
+	input             SPI_SCK,
+	input             SPI_SS2,
+	input             SPI_SS4,
+	input             SPI_DI,
+	inout             SPI_DO,
+
+	input             QCSn,
+	input             QSCK,
+	input       [3:0] QDAT,
+
+	input             clkref_n, // assert ioctl_wr one cycle after clkref stobe (negative active)
+
+	// ARM -> FPGA download
+	output reg        ioctl_download = 0, // signal indicating an active download
+	output reg        ioctl_upload = 0,   // signal indicating an active upload
+	output reg  [7:0] ioctl_index,        // menu index used to upload the file ([7:6] - extension index, [5:0] - menu index)
+	                                      // Note: this is also set for user_io mounts.
+	                                      // Valid when ioctl_download = 1 or when img_mounted strobe is active in user_io.
+	output reg        ioctl_wr,           // strobe indicating ioctl_dout valid
+	output reg [26:0] ioctl_addr,
+	output reg [((DOUT_16+1)*8)-1:0] ioctl_dout,
+	input       [7:0] ioctl_din,
+	output reg [23:0] ioctl_fileext,      // file extension
+	output reg [31:0] ioctl_filesize,     // file size
+
+	// IDE interface
+	input             hdd_clk,
+	input             hdd_cmd_req,
+	input             hdd_cdda_req,
+	input             hdd_dat_req,
+	output            hdd_cdda_wr,
+	output            hdd_status_wr,
+	output      [2:0] hdd_addr,
+	output            hdd_wr,
+
+	output     [15:0] hdd_data_out,
+	input      [15:0] hdd_data_in,
+	output            hdd_data_rd,
+	output            hdd_data_wr,
+
+	// IDE config
+	output      [1:0] hdd0_ena,
+	output      [1:0] hdd1_ena
+);
+
+`ifdef SIMULATION
+initial begin
+    ioctl_index = 8'h1;
+end
+`endif
+
+///////////////////////////////   DOWNLOADING   ///////////////////////////////
+
+reg   [6:0] sbuf;
+reg   [7:0] data_w;
+reg   [7:0] data_w2  = 0;
+reg  [15:0] data_w3  = 0;
+reg   [3:0] cnt;
+reg   [7:0] cmd;
+reg   [6:0] bytecnt;
+
+reg        rclk   = 0;
+reg        rclk2  = 0;
+reg        rclk3  = 0;
+reg        addr_reset = 0;
+reg        downloading_reg = 0;
+reg        uploading_reg = 0;
+reg        reg_do;
+
+localparam DIO_FILE_TX       = 8'h53;
+localparam DIO_FILE_TX_DAT   = 8'h54;
+localparam DIO_FILE_INDEX    = 8'h55;
+localparam DIO_FILE_INFO     = 8'h56;
+localparam DIO_FILE_RX       = 8'h57;
+localparam DIO_FILE_RX_DAT   = 8'h58;
+
+localparam QSPI_READ         = 8'h40;
+localparam QSPI_WRITE        = 8'h41;
+
+localparam CMD_IDE_REGS_RD   = 8'h80;
+localparam CMD_IDE_REGS_WR   = 8'h90;
+localparam CMD_IDE_DATA_WR   = 8'hA0;
+localparam CMD_IDE_DATA_RD   = 8'hB0;
+localparam CMD_IDE_CDDA_RD   = 8'hC0;
+localparam CMD_IDE_CDDA_WR   = 8'hD0;
+localparam CMD_IDE_STATUS_WR = 8'hF0;
+localparam CMD_IDE_CFG_WR    = 8'hFA;
+
+assign SPI_DO = reg_do;
+
+// data_io has its own SPI interface to the io controller
+wire [7:0] cmdcode = { 4'h0, hdd_dat_req, hdd_cmd_req, 2'b00 };
+
+always@(negedge SPI_SCK or posedge SPI_SS2) begin : SPI_TRANSMITTER
+	reg [7:0] dout_r;
+	reg oe;
+
+	if(SPI_SS2) begin
+		oe <= 0;
+		reg_do <= 1'bZ;
+	end else begin
+		if (cnt == 15) begin
+			oe <= 1;
+			case(cmd)
+				CMD_IDE_REGS_RD,
+				CMD_IDE_DATA_RD:
+					dout_r <= bytecnt[0] ? hdd_data_in[7:0] : hdd_data_in[15:8];
+
+				CMD_IDE_CDDA_RD:
+					dout_r <= {7'd0, hdd_cdda_req};
+
+				DIO_FILE_RX_DAT:
+					dout_r <= ioctl_din;
+
+				default: oe <= 0;
+			endcase
+		end
+
+		if (cnt == 7 && {sbuf, SPI_DI} == DIO_FILE_RX_DAT) oe <= 1;
+
+		reg_do <= (!cnt[3] && ENABLE_IDE == 1) ? cmdcode[~cnt[2:0]] : oe ? dout_r[~cnt[2:0]] : 1'bZ;
+	end
+end
+
+
+always@(posedge SPI_SCK, posedge SPI_SS2) begin : SPI_RECEIVER
+	if(SPI_SS2) begin
+		bytecnt <= 0;
+		cnt <= 0;
+	end	else begin
+		// don't shift in last bit. It is evaluated directly
+		// when writing to ram
+		if(cnt != 15) sbuf <= { sbuf[5:0], SPI_DI};
+
+		// count 0-7 8-15 8-15 ...
+		if(cnt != 15) cnt <= cnt + 1'd1;
+			else cnt <= 8;
+
+		// finished command byte
+		if(cnt == 7) cmd <= {sbuf, SPI_DI};
+
+		if(cnt == 15) begin
+			if (~&bytecnt) bytecnt <= bytecnt + 1'd1;
+			else bytecnt[0] <= ~bytecnt[0];
+
+			case (cmd)
+			// prepare/end transmission
+			DIO_FILE_TX: begin
+				// prepare
+				if(SPI_DI) begin
+					addr_reset <= ~addr_reset;
+					downloading_reg <= 1;
+				end else begin
+					downloading_reg <= 0;
+				end
+			end
+
+			DIO_FILE_RX: begin
+				// prepare
+				if(SPI_DI) begin
+					addr_reset <= ~addr_reset;
+					uploading_reg <= 1;
+				end else begin
+					uploading_reg <= 0;
+				end
+			end
+
+			// command 0x57: DIO_FILE_RX_DAT
+			// command 0x54: DIO_FILE_TX_DAT
+			DIO_FILE_RX_DAT,
+			DIO_FILE_TX_DAT: begin
+				data_w <= {sbuf, SPI_DI};
+				rclk <= ~rclk;
+			end
+
+			// expose file (menu) index
+			DIO_FILE_INDEX: ioctl_index <= {sbuf, SPI_DI};
+
+			// receiving FAT directory entry (mist-firmware/fat.h - DIRENTRY)
+			DIO_FILE_INFO: begin
+				case (bytecnt)
+					8'h08: ioctl_fileext[23:16]  <= {sbuf, SPI_DI};
+					8'h09: ioctl_fileext[15: 8]  <= {sbuf, SPI_DI};
+					8'h0A: ioctl_fileext[ 7: 0]  <= {sbuf, SPI_DI};
+					8'h1C: ioctl_filesize[ 7: 0] <= {sbuf, SPI_DI};
+					8'h1D: ioctl_filesize[15: 8] <= {sbuf, SPI_DI};
+					8'h1E: ioctl_filesize[23:16] <= {sbuf, SPI_DI};
+					8'h1F: ioctl_filesize[31:24] <= {sbuf, SPI_DI};
+				endcase
+			end
+			endcase
+		end
+	end
+end
+
+// direct SD Card->FPGA transfer
+generate if (ROM_DIRECT_UPLOAD == 1 || ENABLE_IDE == 1) begin
+
+always@(posedge SPI_SCK, posedge SPI_SS4) begin : SPI_DIRECT_RECEIVER
+	reg  [6:0] sbuf2;
+	reg  [2:0] cnt2;
+	reg  [9:0] bytecnt;
+
+	if(SPI_SS4) begin
+		cnt2 <= 0;
+		bytecnt <= 0;
+	end else begin
+		// don't shift in last bit. It is evaluated directly
+		// when writing to ram
+		if(cnt2 != 7)
+			sbuf2 <= { sbuf2[5:0], SPI_DO };
+
+		cnt2 <= cnt2 + 1'd1;
+
+		// received a byte
+		if(cnt2 == 7) begin
+			bytecnt <= bytecnt + 1'd1;
+			// read 514 byte/sector (512 + 2 CRC)
+			if (bytecnt == 513) bytecnt <= 0;
+			// don't send the CRC bytes
+			if (~bytecnt[9]) begin
+				data_w2 <= {sbuf2, SPI_DO};
+				rclk2 <= ~rclk2;
+			end
+		end
+	end
+end
+
+end
+endgenerate
+
+// QSPI receiver
+generate if (USE_QSPI == 1) begin
+
+always@(negedge QSCK, posedge QCSn) begin : QSPI_RECEIVER
+	reg [1:0] nibble;
+	reg cmd_got;
+	reg cmd_write;
+
+	if (QCSn) begin
+		cmd_got <= 0;
+		cmd_write <= 0;
+		nibble <= 0;
+	end else begin
+		nibble <= nibble + 1'd1;
+		data_w3 <= {data_w3[11:0], QDAT};
+		if (!cmd_got) begin
+			// first byte is the command
+			if (nibble[0]) begin
+				nibble <= 0;
+				cmd_got <= 1;
+				if ({data_w3[3:0], QDAT} == QSPI_WRITE) cmd_write <= 1;
+			end
+		end else if ((DOUT_16 == 1 && &nibble) || (DOUT_16 == 0 && nibble[0])) begin
+			if (cmd_write) rclk3 <= ~rclk3;
+		end
+	end
+end
+end
+endgenerate
+
+reg         wr_int, wr_int_direct, rd_int;
+wire  [7:0] ioctl_dout_next = wr_int ? data_w : data_w2;
+
+always@(posedge clk_sys) begin : DATA_OUT
+	// synchronisers
+	reg rclkD, rclkD2;
+	reg rclk2D, rclk2D2;
+	reg rclk3D, rclk3D2;
+	reg addr_resetD, addr_resetD2;
+
+	reg [26:0] addr;
+	reg [31:0] filepos;
+	reg  [7:0] tmp;
+
+	// bring flags from spi clock domain into core clock domain
+	{ rclkD, rclkD2 } <= { rclk, rclkD };
+	{ rclk2D ,rclk2D2 } <= { rclk2, rclk2D };
+	{ rclk3D ,rclk3D2 } <= { rclk3, rclk3D };
+	{ addr_resetD, addr_resetD2 } <= { addr_reset, addr_resetD };
+
+	ioctl_wr <= 0;
+
+	if (!downloading_reg) begin
+		ioctl_download <= 0;
+		wr_int <= 0;
+		wr_int_direct <= 0;
+	end
+
+	if (!uploading_reg) begin
+		ioctl_upload <= 0;
+		rd_int <= 0;
+	end
+
+	if (~clkref_n) begin
+		rd_int <= 0;
+		wr_int <= 0;
+		wr_int_direct <= 0;
+		if (wr_int || wr_int_direct) begin
+			if (DOUT_16 == 1) begin
+				if (addr[0]) begin
+					ioctl_dout <= {ioctl_dout_next, tmp};
+					ioctl_wr <= 1;
+					ioctl_addr <= {addr[26:1], 1'b0};
+				end else
+					tmp <= ioctl_dout_next;
+			end else begin
+				ioctl_dout <= ioctl_dout_next;
+				ioctl_wr <= 1;
+				ioctl_addr <= addr;
+			end
+			addr <= addr + 1'd1;
+		end
+		if (rd_int) begin
+			ioctl_addr <= ioctl_addr + 1'd1;
+		end
+	end
+
+	// detect transfer start from the SPI receiver
+	if(addr_resetD ^ addr_resetD2) begin
+		addr <= START_ADDR;
+		ioctl_addr <= START_ADDR;
+		filepos <= 0;
+		ioctl_download <= downloading_reg;
+		ioctl_upload <= uploading_reg;
+	end
+
+	// detect new byte from the SPI receiver
+	if (rclkD ^ rclkD2) begin
+		wr_int <= downloading_reg;
+		rd_int <= uploading_reg;
+	end
+	// direct transfer receiver
+	if ((rclk2D ^ rclk2D2) & (filepos != ioctl_filesize) & downloading_reg) begin
+		filepos <= filepos + 1'd1;
+		wr_int_direct <= 1;
+	end
+	// QSPI transfer receiver
+	if (rclk3D ^ rclk3D2) begin
+		ioctl_wr <= 1;
+		ioctl_addr <= addr;
+		if (DOUT_16 == 1) begin
+			addr <= addr + 2'd2;
+			ioctl_dout <= data_w3;
+		end else begin
+			addr <= addr + 1'd1;
+			ioctl_dout <= data_w3[7:0];
+		end
+	end
+
+end
+
+// IDE handling
+generate if (ENABLE_IDE == 1) begin
+
+reg  [1:0] int_hdd0_ena;
+reg  [1:0] int_hdd1_ena;
+reg        int_hdd_cdda_wr;
+reg        int_hdd_status_wr;
+reg  [2:0] int_hdd_addr = 0;
+reg        int_hdd_wr;
+reg [15:0] int_hdd_data_out;
+reg        int_hdd_data_rd;
+reg        int_hdd_data_wr;
+
+assign hdd0_ena = int_hdd0_ena;
+assign hdd1_ena = int_hdd1_ena;
+assign hdd_cdda_wr = int_hdd_cdda_wr;
+assign hdd_status_wr = int_hdd_status_wr;
+assign hdd_addr = int_hdd_addr;
+assign hdd_wr = int_hdd_wr;
+assign hdd_data_out = int_hdd_data_out;
+assign hdd_data_rd = int_hdd_data_rd;
+assign hdd_data_wr = int_hdd_data_wr;
+
+reg        rst0  = 1;
+reg        rst2  = 1;
+reg        rclk_ide_stat = 0;
+reg        rclk_ide_regs_rd = 0;
+reg        rclk_ide_regs_wr = 0;
+reg        rclk_ide_wr = 0;
+reg        rclk_ide_rd = 0;
+reg        rclk_cdda_wr = 0;
+reg  [7:0] data_ide;
+
+always@(posedge SPI_SCK, posedge SPI_SS2) begin : SPI_RECEIVER_IDE
+	if(SPI_SS2) begin
+		rst0 <= 1;
+	end	else begin
+		rst0 <= 0;
+
+		if(cnt == 15) begin
+
+			case (cmd)
+			//IDE commands
+			CMD_IDE_CFG_WR:
+				if (bytecnt == 0) begin
+					int_hdd0_ena <= {sbuf[0], SPI_DI};
+					int_hdd1_ena <= sbuf[2:1];
+				end
+
+			CMD_IDE_STATUS_WR:
+				if (bytecnt == 0) begin
+					data_ide <= {sbuf, SPI_DI};
+					rclk_ide_stat <= ~rclk_ide_stat;
+				end
+
+			CMD_IDE_REGS_WR:
+				if (bytecnt >= 8 && bytecnt <= 18 && !bytecnt[0]) begin
+					data_ide <= {sbuf, SPI_DI};
+					rclk_ide_regs_wr <= ~rclk_ide_regs_wr;
+				end
+
+			CMD_IDE_REGS_RD:
+				if (bytecnt > 5 && !bytecnt[0]) begin
+					rclk_ide_regs_rd <= ~rclk_ide_regs_rd;
+				end
+
+			CMD_IDE_DATA_WR:
+				if (bytecnt > 4) begin
+					data_ide <= {sbuf, SPI_DI};
+					rclk_ide_wr <= ~rclk_ide_wr;
+				end
+
+			CMD_IDE_CDDA_WR:
+				if (bytecnt > 4) begin
+					data_ide <= {sbuf, SPI_DI};
+					rclk_cdda_wr <= ~rclk_cdda_wr;
+				end
+
+			CMD_IDE_DATA_RD:
+				if (bytecnt > 3) rclk_ide_rd <= ~rclk_ide_rd;
+
+			endcase
+		end
+	end
+end
+
+always@(posedge SPI_SCK, posedge SPI_SS4) begin : SPI_DIRECT_RECEIVER_IDE
+	if(SPI_SS4) begin
+		rst2 <= 1;
+	end else begin
+		rst2 <= 0;
+	end
+end
+
+always@(posedge hdd_clk) begin : IDE_OUT
+	reg loword;
+
+	// synchronisers
+	reg rclk2D, rclk2D2;
+	reg rclk_ide_statD, rclk_ide_statD2;
+	reg rclk_cdda_wrD, rclk_cdda_wrD2;
+	reg rclk_ide_wrD, rclk_ide_wrD2;
+	reg rclk_ide_rdD, rclk_ide_rdD2;
+	reg rclk_ide_regs_wrD, rclk_ide_regs_wrD2;
+	reg rclk_ide_regs_rdD, rclk_ide_regs_rdD2;
+	reg rst0D, rst0D2;
+	reg rst2D, rst2D2;
+
+	// bring flags from spi clock domain into core clock domain
+	{ rclk2D ,rclk2D2 } <= { rclk2, rclk2D };
+	{ rclk_ide_statD, rclk_ide_statD2 } <= { rclk_ide_stat, rclk_ide_statD };
+	{ rclk_ide_rdD, rclk_ide_rdD2 } <= { rclk_ide_rd, rclk_ide_rdD };
+	{ rclk_ide_wrD, rclk_ide_wrD2 } <= { rclk_ide_wr, rclk_ide_wrD };
+	{ rclk_cdda_wrD, rclk_cdda_wrD2 } <= { rclk_cdda_wr, rclk_cdda_wrD };
+	{ rclk_ide_regs_rdD, rclk_ide_regs_rdD2 } <= { rclk_ide_regs_rd, rclk_ide_regs_rdD };
+	{ rclk_ide_regs_wrD, rclk_ide_regs_wrD2 } <= { rclk_ide_regs_wr, rclk_ide_regs_wrD };
+	{ rst0D, rst0D2 } <= { rst0, rst0D };
+	{ rst2D, rst2D2 } <= { rst2, rst2D };
+
+	// IDE receiver
+	int_hdd_wr <= 0;
+	int_hdd_status_wr <= 0;
+	int_hdd_data_wr <= 0;
+	int_hdd_data_rd <= 0;
+	int_hdd_cdda_wr <= 0;
+
+	if (rst0D2) int_hdd_addr <= 0;
+	if (rst0D2 && rst2D2) loword <= 0;
+
+	if (rclk_ide_statD ^ rclk_ide_statD2) begin
+		int_hdd_status_wr <= 1;
+		int_hdd_data_out <= {8'h00, data_ide};
+	end
+	if (rclk_ide_rdD ^ rclk_ide_rdD2) begin
+		loword <= ~loword;
+		if (loword)
+			int_hdd_data_rd <= 1;
+	end
+	if (rclk_ide_wrD ^ rclk_ide_wrD2) begin
+		loword <= ~loword;
+		if (!loword)
+			int_hdd_data_out[15:8] <= data_ide;
+		else begin
+			int_hdd_data_wr <= 1;
+			int_hdd_data_out[7:0] <= data_ide;
+		end
+	end
+	if (rclk_cdda_wrD ^ rclk_cdda_wrD2) begin
+		loword <= ~loword;
+		if (!loword)
+			int_hdd_data_out[15:8] <= data_ide;
+		else begin
+			int_hdd_cdda_wr <= 1;
+			int_hdd_data_out[7:0] <= data_ide;
+		end
+	end
+	if ((rclk2D ^ rclk2D2) & ~downloading_reg) begin
+		loword <= ~loword;
+		if (!loword)
+			int_hdd_data_out[15:8] <= data_w2;
+		else begin
+			int_hdd_data_wr <= 1;
+			int_hdd_data_out[7:0] <= data_w2;
+		end
+	end
+	if (rclk_ide_regs_wrD ^ rclk_ide_regs_wrD2) begin
+		int_hdd_wr <= 1;
+		int_hdd_data_out <= {8'h00, data_ide};
+		int_hdd_addr <= int_hdd_addr + 1'd1;
+	end
+	if (rclk_ide_regs_rdD ^ rclk_ide_regs_rdD2) begin
+		int_hdd_addr <= int_hdd_addr + 1'd1;
+	end
+end
+end else begin
+	assign hdd0_ena = 0;
+	assign hdd1_ena = 0;
+	assign hdd_cdda_wr = 0;
+	assign hdd_status_wr = 0;
+	assign hdd_addr = 0;
+	assign hdd_wr = 0;
+	assign hdd_data_out = 0;
+	assign hdd_data_rd = 0;
+	assign hdd_data_wr = 0;
+end
+
+endgenerate
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/i2c_master.v

@@ -0,0 +1,111 @@
+// taken and tweaked from MiSTer sys/
+module i2c_master
+(
+	input        CLK,
+
+	input        I2C_START,
+	input        I2C_READ,
+	input  [6:0] I2C_ADDR,
+	input  [7:0] I2C_SUBADDR,
+	input  [7:0] I2C_WDATA,
+	output [7:0] I2C_RDATA,
+	output reg   I2C_END = 1,
+	output reg   I2C_ACK = 0,
+
+	//I2C bus
+	inout        I2C_SCL,
+	inout        I2C_SDA
+);
+
+
+//	Clock Setting
+parameter CLK_Freq = 50_000_000;	//	50 MHz
+parameter I2C_Freq = 400_000;		//	400 KHz
+
+localparam I2C_FreqX2 = I2C_Freq*2;
+
+reg         I2C_CLOCK;
+reg  [31:0] cnt;
+wire [31:0] cnt_next = cnt + I2C_FreqX2;
+
+always @(posedge CLK) begin
+	cnt <= cnt_next;
+	if(cnt_next >= CLK_Freq) begin
+		cnt <= cnt_next - CLK_Freq;
+		I2C_CLOCK <= ~I2C_CLOCK;
+	end
+end
+
+reg        SCLK;
+reg [15:0] SDO;
+reg  [0:7] rdata;
+
+reg  [6:0] SD_COUNTER;
+reg [0:42] SD;
+
+assign I2C_SCL = (SCLK | I2C_CLOCK) ? 1'bZ : 1'b0;
+assign I2C_SDA = SDO[15] ? 1'bZ : 1'b0;
+
+initial begin
+	SD_COUNTER = 'b1111111;
+	SD   = {40'hFFFFFFFFFF, 3'b111};
+	SCLK = 1;
+	SDO  = 16'hFFFF;
+end
+
+assign I2C_RDATA = rdata;
+
+always @(posedge CLK) begin : b0
+	reg old_clk;
+	reg old_st;
+	reg rd;
+	reg sda_in;
+
+	old_clk <= I2C_CLOCK;
+	old_st  <= I2C_START;
+	sda_in <= I2C_SDA;
+
+	// delay to make sure SDA changed while SCL is stabilized at low
+	if(old_clk && ~I2C_CLOCK && ~SD_COUNTER[6]) SDO[0] <= SD[SD_COUNTER[5:0]];
+	SDO[15:1] <= SDO[14:0];
+
+	if(~old_st && I2C_START) begin
+		SCLK <= 1;
+		SDO  <= 16'hFFFF;
+		I2C_ACK  <= 0;
+		I2C_END  <= 0;
+		rd   <= I2C_READ;
+		if(I2C_READ) SD[0:42] <= {2'b10, I2C_ADDR, 1'b0, 1'b1, I2C_SUBADDR, 3'b110, I2C_ADDR, 1'b1, 1'b1, 8'b11111111, 4'b1011};
+		else         SD[0:31] <= {2'b10, I2C_ADDR, 1'b0, 1'b1, I2C_SUBADDR, 1'b1, I2C_WDATA, 4'b1011};
+		SD_COUNTER <= 0;
+	end else begin
+		if(~old_clk && I2C_CLOCK && ~SD_COUNTER[6]) begin
+			SD_COUNTER <= SD_COUNTER + 6'd1;
+			case(SD_COUNTER)
+			      01: SCLK <= 0;
+			      10: I2C_ACK <= ~sda_in;
+			      19: I2C_ACK <= ~sda_in;
+						20: if (rd) SCLK <= 1; // repeated start
+						21: if (rd) SCLK <= 0;
+			      28: if (~rd) I2C_ACK  <= ~sda_in;
+						29: if (~rd) SCLK <= 1;
+			      30: if (rd) I2C_ACK <= ~sda_in;
+			      32: if (~rd) begin
+							I2C_END  <= 1;
+							SD_COUNTER <= 64;
+						end
+						40: SCLK <= 1;
+						42: begin
+							I2C_END <= 1;
+							SD_COUNTER <= 64;
+						end
+						64: SCLK <= 1;
+						default: ;
+			endcase
+
+			if(SD_COUNTER >= 31 && SD_COUNTER <= 38) rdata[SD_COUNTER[5:0]-31] <= sda_in;
+		end
+	end
+end
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/i2s.v

@@ -0,0 +1,70 @@
+// taken and tweaked from MiSTer sys/
+
+module i2s #(parameter
+	// Clock Setting
+	I2S_Freq = 48_000,     // 48 KHz
+	AUDIO_DW = 16
+)(
+	input        reset,
+	input        clk,
+	input [31:0] clk_rate,
+
+	output reg sclk,
+	output reg lrclk,
+	output reg sdata,
+
+	input [AUDIO_DW-1:0]	left_chan,
+	input [AUDIO_DW-1:0]	right_chan
+);
+
+
+localparam I2S_FreqX2 = I2S_Freq*2*AUDIO_DW*2;
+
+reg  [31:0] cnt;
+wire [31:0] cnt_next = cnt + I2S_FreqX2;
+reg         ce;
+reg  [ 4:0] bit_cnt = 1;
+
+reg [AUDIO_DW-1:0] left;
+reg [AUDIO_DW-1:0] right;
+
+always @(posedge clk) begin
+	ce <= 0;
+	cnt <= cnt_next;
+	if(cnt_next >= clk_rate) begin
+		cnt <= cnt_next - clk_rate;
+		ce <= 1;
+	end
+end
+
+
+always @(posedge clk) begin
+	if (reset) begin
+		bit_cnt <= 1;
+		lrclk   <= 1;
+		sclk    <= 1;
+		sdata   <= 1;
+		sclk    <= 1;
+	end
+	else begin
+		if(ce) begin
+			sclk <= ~sclk;
+			if(sclk) begin
+				if(bit_cnt == AUDIO_DW) begin
+					bit_cnt <= 1;
+					lrclk <= ~lrclk;
+					if(lrclk) begin
+						left  <= left_chan;
+						right <= right_chan;
+					end
+				end
+				else begin
+					bit_cnt <= bit_cnt + 1'd1;
+				end
+				sdata <= lrclk ? right[AUDIO_DW - bit_cnt] : left[AUDIO_DW - bit_cnt];
+			end
+		end
+	end
+end
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/jtframe_mist.sv

@@ -0,0 +1,534 @@
+/*  This file is part of JTFRAME.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Version: 1.0
+    Date: 7-3-2019 */
+
+module jtframe_mist #(parameter
+    SIGNED_SND             = 1'b0,
+    BUTTONS                = 2,
+    DIPBASE                = 16,
+    GAME_INPUTS_ACTIVE_LOW = 1'b1,
+    COLORW                 = 4,
+    VIDEO_WIDTH            = 384,
+    VIDEO_HEIGHT           = 224,
+    SDRAMW                 = 23,
+    VGA_DW                 = 6,
+    QSPI                   = 1'b0,
+    HDMI                   = 1'b0,
+    XOR_ROT                = 1'b0
+)(
+    input              clk_sys,
+    input              clk_rom,
+    input              clk_pico,
+    input              pll_locked,
+    // interface with microcontroller
+    output      [63:0] status,
+    output      [31:0] dipsw,
+    // Base video
+    input [COLORW-1:0] game_r, game_g, game_b,
+    input              LHBL,
+    input              LVBL,
+    input              hs,
+    input              vs,
+    inout              pxl2_cen,
+    inout              pxl_cen,
+    // MiST VGA pins
+    output [VGA_DW-1:0] VGA_R, VGA_G, VGA_B,
+    output             VGA_HS,
+    output             VGA_VS,
+    // HDMI pins
+    output       [7:0] HDMI_R,
+    output       [7:0] HDMI_G,
+    output       [7:0] HDMI_B,
+    output             HDMI_HS,
+    output             HDMI_VS,
+    output             HDMI_PCLK,
+    output             HDMI_DE,
+    inout              HDMI_SDA,
+    inout              HDMI_SCL,
+    // ROM programming
+    input [SDRAMW-1:0] prog_addr,
+    input       [15:0] prog_data,
+    input       [ 1:0] prog_mask, prog_ba,
+    input              prog_we,
+    input              prog_rd,
+    output             prog_dst,
+    output             prog_dok,
+    output             prog_rdy,
+    output             prog_ack,
+    // ROM access from game
+    input [SDRAMW-1:0] ba0_addr,ba1_addr,ba2_addr,ba3_addr,
+    input        [3:0] ba_rd,   ba_wr,
+    output       [3:0] ba_ack,  ba_rdy,  ba_dst,  ba_dok,
+    input       [15:0] ba0_din, ba1_din, ba2_din, ba3_din,
+    input       [ 1:0] ba0_dsn, ba1_dsn, ba2_dsn, ba3_dsn,
+    output      [15:0] sdram_dout,
+    // UART
+    input              uart_rx,
+    output             uart_tx,
+    // SDRAM interface
+    inout       [15:0] SDRAM_DQ,       // SDRAM Data bus 16 Bits
+    output      [12:0] SDRAM_A,        // SDRAM Address bus 13 Bits
+    output             SDRAM_DQML,     // SDRAM Low-byte Data Mask
+    output             SDRAM_DQMH,     // SDRAM High-byte Data Mask
+    output             SDRAM_nWE,      // SDRAM Write Enable
+    output             SDRAM_nCAS,     // SDRAM Column Address Strobe
+    output             SDRAM_nRAS,     // SDRAM Row Address Strobe
+    output             SDRAM_nCS,      // SDRAM Chip Select
+    output       [1:0] SDRAM_BA,       // SDRAM Bank Address
+    output             SDRAM_CKE,      // SDRAM Clock Enable
+    // SPI interface to arm io controller
+    inout              SPI_DO,
+    input              SPI_DI,
+    input              SPI_SCK,
+    input              SPI_SS2,
+    input              SPI_SS3,
+    input              SPI_SS4,
+    input              CONF_DATA0,
+    // QSPI interface to ARM
+    input              QCSn,
+    input              QSCK,
+    input        [3:0] QDAT,
+    // SDRAM interface for rotation
+    inout       [15:0] sd_data,
+    output      [12:0] sd_addr,
+    output       [1:0] sd_dqm,
+    output       [1:0] sd_ba,
+    output             sd_cs,
+    output             sd_we,
+    output             sd_ras,
+    output             sd_cas,
+    output             sd_cke,
+    // Buttons for MC2(+)
+    input       [ 3:0] BUTTON_n,
+    // PS2 are input pins for Neptuno
+    // and outputs for MiST
+    inout              ps2_clk,
+    inout              ps2_dout,
+    // Joystick
+    input        [5:0] joy1_bus, joy2_bus,
+    output             JOY_SELECT,
+    // ROM load from SPI
+    output      [25:0] ioctl_addr,
+    output      [ 7:0] ioctl_dout,
+    output             ioctl_wr,
+    input       [ 7:0] ioctl_din,
+    output             ioctl_ram,
+    input              dwnld_busy,
+    output             ioctl_rom,
+    output             ioctl_cart,
+
+//////////// board
+    output             rst,      // synchronous reset
+    output             rst_n,    // asynchronous reset
+    output             game_rst,
+    output             game_rst_n,
+    // reset forcing signals:
+    input              rst_req,
+    // Sound
+    input       [15:0] snd_left, snd_right,
+    input              snd_sample,
+    input              snd_peak,
+    output      [ 5:0] snd_en,
+    input       [ 5:0] snd_vu,
+    output      [ 7:0] snd_vol,
+    output             AUDIO_L,
+    output             AUDIO_R,
+    output             I2S_BCK,
+    output             I2S_LRCK,
+    output             I2S_DATA,
+    output             SPDIF,
+
+    // joystick
+    output       [9:0] game_joystick1, game_joystick2, game_joystick3, game_joystick4,
+    output       [3:0] game_coin, game_start,
+    output       [1:0] dial_x,    dial_y,
+    output             game_service,
+    output             game_tilt,
+    output      [15:0] joyana_l1, joyana_r1, joyana_l2, joyana_r2, joyana_l3, joyana_r3, joyana_l4, joyana_r4,
+    // Paddle
+    output      [ 7:0] paddle_1, paddle_2, paddle_3, paddle_4,
+
+    // Mouse
+    output      [15:0] mouse_1p, mouse_2p,
+    output      [ 1:0] mouse_strobe,
+
+    // Lightguns
+    output      [ 8:0] gun_1p_x, gun_1p_y, gun_2p_x, gun_2p_y,
+
+    // DIP and OSD settings
+    output             dip_test,
+    // non standard:
+    output             dip_pause,
+    inout              dip_flip,     // A change in dip_flip implies a reset
+    output      [ 1:0] dip_fxlevel,
+    // Debug
+    output             LED,
+    output      [ 7:0] st_addr,
+    input       [ 7:0] st_dout,
+    output      [ 3:0] gfx_en,
+    output      [ 7:0] debug_bus,
+    input       [ 7:0] debug_view
+);
+
+// control
+wire [31:0]   joystick1, joystick2, joystick3, joystick4;
+reg  [63:0]   board_status;
+wire          ps2_kbd_clk, ps2_kbd_data;
+wire          osd_shown;
+
+wire [7:0]    game_vol=0; // per-game volume settings not available on ARC files
+wire [6:0]    core_mod;
+wire [3:0]    but_start, but_coin;
+
+wire  [ 1:0]  rotate;
+wire          rot_osdonly;
+wire          ioctl_cheat, sdram_init;
+
+wire  [15:0]  board_left, board_right;
+
+wire  [ 8:0]  bd_mouse_dx, bd_mouse_dy;
+wire          bd_mouse_st, bd_mouse_idx;
+wire  [ 7:0]  bd_mouse_f;
+wire  [ 7:0]  ioctl_merged, mist_view;
+wire  [3*COLORW-1:0] base_rgb;
+wire          base_lhbl, base_lvbl, base_hs, base_vs;
+
+assign paddle_3 = 0;
+assign paddle_4 = 0;
+assign dipsw = `ifdef JTFRAME_SIM_DIPS
+    `JTFRAME_SIM_DIPS `else
+    status[31+DIPBASE:DIPBASE] `endif;
+assign ioctl_cart = 0; // not supported for now
+
+always @* begin
+    board_status = { {64-DIPBASE{1'b0}}, status[DIPBASE-1:0] };
+    // bits 7:6 are also used for FX Volume, so cannot use both JTFRAME_SPINNER
+    // and JTFRAME_OSD_VOL together
+    board_status[33:32] = status[7:6];
+end
+
+jtframe_mist_base #(
+    .SIGNED_SND     ( SIGNED_SND    ),
+    .COLORW         ( COLORW        ),
+    .VGA_DW         ( VGA_DW        ),
+    .QSPI           ( QSPI          ),
+    .HDMI           ( HDMI          )
+) u_base(
+    .rst            ( rst           ),
+    .sdram_init     ( sdram_init    ),
+    .clk_sys        ( clk_sys       ),
+    .clk_rom        ( clk_rom       ),
+    .core_mod       ( core_mod      ),
+    .osd_shown      ( osd_shown     ),
+    // Base video
+    .osd_rotate     ( rot_osdonly ? rotate : 2'b00 ),
+    .rotation       ( (rot_osdonly | ~rotate[0]) ? 2'b00 : {rotate[1], ~rotate[1]} ),
+    .game_rgb       ( base_rgb      ),
+    .game_lhbl      ( base_lhbl     ),
+    .game_lvbl      ( base_lvbl     ),
+    .game_hs        ( base_hs       ),
+    .game_vs        ( base_vs       ),
+    .pxl_cen        ( pxl_cen       ),
+    .pxl2_cen       ( pxl2_cen      ),
+    // MiST VGA pins (includes OSD)
+    .VIDEO_R        ( VGA_R         ),
+    .VIDEO_G        ( VGA_G         ),
+    .VIDEO_B        ( VGA_B         ),
+    .VIDEO_HS       ( VGA_HS        ),
+    .VIDEO_VS       ( VGA_VS        ),
+    // HDMI pins
+    .HDMI_R         ( HDMI_R        ),
+    .HDMI_G         ( HDMI_G        ),
+    .HDMI_B         ( HDMI_B        ),
+    .HDMI_HS        ( HDMI_HS       ),
+    .HDMI_VS        ( HDMI_VS       ),
+    .HDMI_DE        ( HDMI_DE       ),
+    .HDMI_SDA       ( HDMI_SDA      ),
+    .HDMI_SCL       ( HDMI_SCL      ),
+    // SPI interface to arm io controller
+    .SPI_DO         ( SPI_DO        ),
+    .SPI_DI         ( SPI_DI        ),
+    .SPI_SCK        ( SPI_SCK       ),
+    .SPI_SS2        ( SPI_SS2       ),
+`ifndef NEPTUNO
+    .SPI_SS3        ( SPI_SS3       ),
+    .SPI_SS4        ( SPI_SS4       ),
+`else
+    .SPI_SS3        ( SPI_SS2       ),  // SS2 reused on NeptUNO for OSD
+    .SPI_SS4        (               ),
+`endif
+    .CONF_DATA0     ( CONF_DATA0    ),
+    .QCSn           ( QCSn          ),
+    .QSCK           ( QSCK          ),
+    .QDAT           ( QDAT          ),
+    // RAM interface for rotation
+    .sd_data        ( sd_data       ),
+    .sd_addr        ( sd_addr       ),
+    .sd_dqm         ( sd_dqm        ),
+    .sd_ba          ( sd_ba         ),
+    .sd_cs          ( sd_cs         ),
+    .sd_we          ( sd_we         ),
+    .sd_ras         ( sd_ras        ),
+    .sd_cas         ( sd_cas        ),
+    .sd_cke         ( sd_cke        ),
+    // control
+    .status         ( status        ),
+    .joystick1      ( joystick1     ),
+    .joystick2      ( joystick2     ),
+    .joystick3      ( joystick3     ),
+    .joystick4      ( joystick4     ),
+    .but_start      ( but_start     ),
+    .but_coin       ( but_coin      ),
+    // Analog joystick
+    .joyana_l1      ( joyana_l1     ),
+    .joyana_r1      ( joyana_r1     ),
+    .joyana_l2      ( joyana_l2     ),
+    .joyana_r2      ( joyana_r2     ),
+    .joyana_l3      ( joyana_l3     ),
+    .joyana_r3      ( joyana_r3     ),
+    .joyana_l4      ( joyana_l4     ),
+    .joyana_r4      ( joyana_r4     ),
+    // Keyboard
+    .ps2_kbd_clk    ( ps2_clk       ),
+    .ps2_kbd_data   ( ps2_dout      ),
+    // Direct joystick connection (Neptuno / MC)
+    .joy1_bus       ( joy1_bus      ),
+    .joy2_bus       ( joy2_bus      ),
+    .JOY_SELECT     ( JOY_SELECT    ),
+    // Mouse
+    .mouse_st       ( bd_mouse_st   ),
+    .mouse_dx       ( bd_mouse_dx   ),
+    .mouse_dy       ( bd_mouse_dy   ),
+    .mouse_idx      ( bd_mouse_idx  ),
+    .mouse_f        ( bd_mouse_f    ),
+    // MC2(+) buttons
+    .BUTTON_n       ( BUTTON_n      ),
+    // audio
+    .clk_dac        ( clk_sys       ),
+    .snd_left       ( board_left    ),
+    .snd_right      ( board_right   ),
+    .snd_pwm_left   ( AUDIO_L       ),
+    .snd_pwm_right  ( AUDIO_R       ),
+    .I2S_BCK        ( I2S_BCK       ),
+    .I2S_LRCK       ( I2S_LRCK      ),
+    .I2S_DATA       ( I2S_DATA      ),
+    .SPDIF          ( SPDIF         ),
+
+    // ROM load from SPI
+    .ioctl_addr     ( ioctl_addr    ),
+    .ioctl_dout     ( ioctl_dout    ),
+    .ioctl_din      ( ioctl_merged  ),
+    .ioctl_wr       ( ioctl_wr      ),
+    .ioctl_ram      ( ioctl_ram     ),
+    .ioctl_cheat    ( ioctl_cheat   ),
+    .ioctl_rom      ( ioctl_rom     ),
+    // Debug
+    .debug_bus      ( debug_bus     ),
+    .debug_view     ( mist_view     )
+);
+
+assign HDMI_PCLK = clk_pico;
+
+jtframe_board #(
+    .BUTTONS               ( BUTTONS               ),
+    .GAME_INPUTS_ACTIVE_LOW( GAME_INPUTS_ACTIVE_LOW),
+    .COLORW                ( COLORW                ),
+    .VIDEO_WIDTH           ( VIDEO_WIDTH           ),
+    .VIDEO_HEIGHT          ( VIDEO_HEIGHT          ),
+    .SDRAMW                ( SDRAMW                ),
+    .MISTER                ( 0                     ),
+    .XOR_ROT               ( XOR_ROT               )
+) u_board(
+    .rst            ( rst             ),
+    .rst_n          ( rst_n           ),
+    .game_rst       ( game_rst        ),
+    .game_rst_n     ( game_rst_n      ),
+    .rst_req        ( rst_req         ),
+    .sdram_init     ( sdram_init      ),
+    .pll_locked     ( pll_locked      ),
+    .ioctl_ram      ( ioctl_ram       ),
+    .ioctl_cart     ( ioctl_cart      ),
+    .dwnld_busy     ( dwnld_busy      ), // use busy signal from game module
+
+    .clk_sys        ( clk_sys         ),
+    .clk_rom        ( clk_rom         ),
+    .clk_pico       ( clk_pico        ),
+    .game_vol       ( game_vol        ),
+    .core_mod       ( core_mod        ),
+    .vertical       (                 ),
+    .black_frame    (                 ),
+    // Sound
+    .snd_lin        ( snd_left        ),
+    .snd_rin        ( snd_right       ),
+    .snd_lout       ( board_left      ),
+    .snd_rout       ( board_right     ),
+    .snd_sample     ( snd_sample      ),
+    .snd_en         ( snd_en          ),
+    .snd_vu         ( snd_vu          ),
+    .snd_vol        ( snd_vol         ),
+    .snd_peak       ( snd_peak        ),
+    // joystick
+    .ps2_kbd_clk    ( ps2_clk         ),
+    .ps2_kbd_data   ( ps2_dout        ),
+    .board_joystick1( joystick1[15:0] ),
+    .board_joystick2( joystick2[15:0] ),
+    .board_joystick3( joystick3[15:0] ),
+    .board_joystick4( joystick4[15:0] ),
+    .joyana_l1      ( joyana_l1       ),
+    .joyana_r1      ( joyana_r1       ),
+    .joyana_l2      ( joyana_l2       ),
+    .joyana_r2      ( joyana_r2       ),
+    .board_start    ( but_start       ),
+    .board_coin     ( but_coin        ),
+    .game_joystick1 ( game_joystick1  ),
+    .game_joystick2 ( game_joystick2  ),
+    .game_joystick3 ( game_joystick3  ),
+    .game_joystick4 ( game_joystick4  ),
+    .game_coin      ( game_coin       ),
+    .game_start     ( game_start      ),
+    .game_service   ( game_service    ),
+    .game_tilt      ( game_tilt       ),
+    .dial_x         ( dial_x          ),
+    .dial_y         ( dial_y          ),
+    .spinner_1      ( 9'd0            ),
+    .spinner_2      ( 9'd0            ),
+    // Mouse & paddle
+    .bd_mouse_dx    ( bd_mouse_dx     ),
+    .bd_mouse_dy    ( bd_mouse_dy     ),
+    .bd_mouse_st    ( bd_mouse_st     ),
+    .bd_mouse_f     ( bd_mouse_f      ),
+    .bd_mouse_idx   ( bd_mouse_idx    ),
+
+    .board_paddle_1 ( 8'd0            ),
+    .board_paddle_2 ( 8'd0            ),
+    .game_paddle_1  ( paddle_1        ),
+    .game_paddle_2  ( paddle_2        ),
+    .mouse_1p       ( mouse_1p        ),
+    .mouse_2p       ( mouse_2p        ),
+    .mouse_strobe   ( mouse_strobe    ),
+    // Lightguns
+    .gun_1p_x       ( gun_1p_x        ),
+    .gun_1p_y       ( gun_1p_y        ),
+    .gun_2p_x       ( gun_2p_x        ),
+    .gun_2p_y       ( gun_2p_y        ),
+    .lightgun_en    (                 ),
+    // DIP and OSD settings
+    .status         ( board_status    ),
+    .dipsw          ( dipsw[23:0]     ),
+    .dip_test       ( dip_test        ),
+    .dip_pause      ( dip_pause       ),
+    .dip_flip       ( dip_flip        ),
+    .dip_fxlevel    ( dip_fxlevel     ),
+    .timestamp      ( 32'd0           ), // MiST doesn't -normally- have a RTC
+    // screen
+    .rotate         ( rotate          ),
+    .rot_osdonly    ( rot_osdonly     ),
+    // LED
+    .osd_shown      ( 1'b0            ), // osd_shown would pause the game
+    .led            ( LED             ),
+    // UART
+    .uart_rx        ( uart_rx         ),
+    .uart_tx        ( uart_tx         ),
+    // SDRAM interface
+    // Bank 0: allows R/W
+    .ba0_addr   ( ba0_addr      ),
+    .ba1_addr   ( ba1_addr      ),
+    .ba2_addr   ( ba2_addr      ),
+    .ba3_addr   ( ba3_addr      ),
+    .ba_rd      ( ba_rd         ),
+    .ba_wr      ( ba_wr         ),
+    .ba_dst     ( ba_dst        ),
+    .ba_dok     ( ba_dok        ),
+    .ba_rdy     ( ba_rdy        ),
+    .ba_ack     ( ba_ack        ),
+    .ba0_din    ( ba0_din       ),
+    .ba0_dsn    ( ba0_dsn       ),
+    .ba1_din    ( ba1_din       ),
+    .ba1_dsn    ( ba1_dsn       ),
+    .ba2_din    ( ba2_din       ),
+    .ba2_dsn    ( ba2_dsn       ),
+    .ba3_din    ( ba3_din       ),
+    .ba3_dsn    ( ba3_dsn       ),
+
+    // ROM-load interface
+    .prog_addr  ( prog_addr     ),
+    .prog_ba    ( prog_ba       ),
+    .prog_rd    ( prog_rd       ),
+    .prog_we    ( prog_we       ),
+    .prog_data  ( prog_data     ),
+    .prog_dsn   ( prog_mask     ),
+    .prog_rdy   ( prog_rdy      ),
+    .prog_dst   ( prog_dst      ),
+    .prog_dok   ( prog_dok      ),
+    .prog_ack   ( prog_ack      ),
+    // SDRAM interface
+    .SDRAM_DQ   ( SDRAM_DQ      ),
+    .SDRAM_A    ( SDRAM_A       ),
+    .SDRAM_DQML ( SDRAM_DQML    ),
+    .SDRAM_DQMH ( SDRAM_DQMH    ),
+    .SDRAM_nWE  ( SDRAM_nWE     ),
+    .SDRAM_nCAS ( SDRAM_nCAS    ),
+    .SDRAM_nRAS ( SDRAM_nRAS    ),
+    .SDRAM_nCS  ( SDRAM_nCS     ),
+    .SDRAM_BA   ( SDRAM_BA      ),
+    .SDRAM_CKE  ( SDRAM_CKE     ),
+
+    // Common signals
+    .sdram_dout ( sdram_dout    ),
+
+    // Cheat!
+    .cheat      ( status[63:32]     ),
+    .prog_cheat ( ioctl_cheat       ),
+    .prog_lock  ( 1'b0              ),  // locking is not needed on MiST
+    .ioctl_wr   ( ioctl_wr          ),
+    .ioctl_dout ( ioctl_dout        ),
+    .ioctl_addr ( ioctl_addr[12:0]  ),
+    .st_addr    ( st_addr           ),
+    .st_dout    ( st_dout           ),
+    .target_info( mist_view         ),
+
+    // input data recording
+    .ioctl_din      ( ioctl_din       ),
+    .ioctl_merged   ( ioctl_merged    ),
+
+    .osd_rotate     ( rotate          ),
+    // input video
+    .game_r         ( game_r          ),
+    .game_g         ( game_g          ),
+    .game_b         ( game_b          ),
+    .LHBL           ( LHBL            ),
+    .LVBL           ( LVBL            ),
+    .hs             ( hs              ),
+    .vs             ( vs              ),
+    .pxl_cen        ( pxl_cen         ),
+    .pxl2_cen       ( pxl2_cen        ),
+    // output video with OSD/debug information
+    .base_rgb       ( base_rgb        ),
+    .base_lhbl      ( base_lhbl       ),
+    .base_lvbl      ( base_lvbl       ),
+    .base_hs        ( base_hs         ),
+    .base_vs        ( base_vs         ),
+    // Debug
+    .gfx_en         ( gfx_en          ),
+    .debug_bus      ( debug_bus       ),
+    .debug_view     ( debug_view      ),
+    // Unused ports (MiSTer)
+    .hdmi_arx       (                 ),
+    .hdmi_ary       (                 )
+);
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/jtframe_mist_base.v

@@ -0,0 +1,612 @@
+/*  This file is part of JTFRAME.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME. If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Version: 1.0
+    Date: 27-10-2017 */
+
+module jtframe_mist_base #(parameter
+    SIGNED_SND      = 1'b0,
+    COLORW          = 4,
+    VIDEO_WIDTH     = 384,
+    VGA_DW          = 6,
+    QSPI            = 1'b0,
+    HDMI            = 1'b0
+) (
+    input           rst,
+    input           clk_sys,
+    input           clk_rom,
+    input           sdram_init,
+    output          osd_shown,
+    output  [6:0]   core_mod,
+    // Base video
+    input   [1:0]   osd_rotate,
+    input   [1:0]   rotation, // 0 - no rotation, 1 - clockwise, 2 - anticlockwise
+    input           game_hs,
+    input           game_vs,
+    input           game_lhbl,
+    input           game_lvbl,
+    input [3*COLORW-1:0] game_rgb,
+    input           pxl_cen,
+    input           pxl2_cen,
+    // Final video: VGA+OSD or base+OSD depending on configuration
+    output [VGA_DW-1:0] VIDEO_R,
+    output [VGA_DW-1:0] VIDEO_G,
+    output [VGA_DW-1:0] VIDEO_B,
+    output          VIDEO_HS,
+    output          VIDEO_VS,
+    // HDMI pins
+    output    [7:0] HDMI_R,
+    output    [7:0] HDMI_G,
+    output    [7:0] HDMI_B,
+    output          HDMI_HS,
+    output          HDMI_VS,
+    output          HDMI_DE,
+    inout           HDMI_SDA,
+    inout           HDMI_SCL,
+    // SPI interface to arm io controller
+    inout           SPI_DO,
+    input           SPI_DI,
+    input           SPI_SCK,
+    input           SPI_SS2,
+    input           SPI_SS3,    // OSD interface
+    input           SPI_SS4,
+    input           CONF_DATA0,
+    // QSPI interface to ARM
+    input           QCSn,
+    input           QSCK,
+    input     [3:0] QDAT,
+    // SDRAM interface for rotation
+    inout    [15:0] sd_data,
+    output   [12:0] sd_addr,
+    output    [1:0] sd_dqm,
+    output    [1:0] sd_ba,
+    output          sd_cs,
+    output          sd_we,
+    output          sd_ras,
+    output          sd_cas,
+    output          sd_cke,
+    // control
+    output [63:0]   status,
+    output [31:0]   joystick1,
+    output [31:0]   joystick2,
+    output [31:0]   joystick3,
+    output [31:0]   joystick4,
+    output [15:0]   joyana_l1,
+    output [15:0]   joyana_r1,
+    output [15:0]   joyana_l2,
+    output [15:0]   joyana_r2,
+    output [15:0]   joyana_l3,
+    output [15:0]   joyana_r3,
+    output [15:0]   joyana_l4,
+    output [15:0]   joyana_r4,
+
+    output [ 8:0]   mouse_dx,
+    output [ 8:0]   mouse_dy,
+    output [ 7:0]   mouse_f,
+    output          mouse_st,
+    output          mouse_idx,
+
+    output [ 3:0]   but_coin,   // buttons, active high
+    output [ 3:0]   but_start,
+    // PS2 pins are outputs if NEPTUNO isn't defined
+    inout           ps2_kbd_clk,
+    inout           ps2_kbd_data,
+    // Sound
+    input           clk_dac,
+    input   [15:0]  snd_left,
+    input   [15:0]  snd_right,
+    output          snd_pwm_left,
+    output          snd_pwm_right,
+    output          I2S_BCK,
+    output          I2S_LRCK,
+    output          I2S_DATA,
+    output          SPDIF,
+
+    // Direct joystick connection (Neptuno / MC)
+    input   [5:0]   joy1_bus,
+    input   [5:0]   joy2_bus,
+    output          JOY_SELECT,
+    
+   // Buttons for MC2(+)
+    input    [ 3:0] BUTTON_n,
+        
+    // ROM load from SPI
+    output [25:0]   ioctl_addr,
+    output [ 7:0]   ioctl_dout,
+    input  [ 7:0]   ioctl_din,
+    output          ioctl_wr,
+    output          ioctl_ram,
+    output          ioctl_cheat,
+    output          ioctl_rom,
+    // Debug
+    input      [7:0]debug_bus,
+    output reg [7:0]debug_view
+);
+
+localparam [7:0] IDX_ROM   = 8'h00,
+                 IDX_CHEAT = 8'h10,
+                 IDX_NVRAM = 8'hFF;
+
+wire        ypbpr, no_csync;
+wire [7:0]  ioctl_index;
+wire        ioctl_download, ioctl_upload;
+
+// Scan-doubler video
+wire [7:0]   scan2x_r, scan2x_g, scan2x_b;
+wire         scan2x_hs, scan2x_vs, scan2x_de, scan2x_enb;
+
+assign ioctl_rom   =  ioctl_index == IDX_ROM   && ioctl_download;
+assign ioctl_ram   = (ioctl_index == IDX_NVRAM && ioctl_download) || ioctl_upload;
+assign ioctl_cheat =  ioctl_index == IDX_CHEAT && ioctl_download;
+
+// unsupported by user_io
+assign joyana_l3 = 0;
+assign joyana_r3 = 0;
+assign joyana_l4 = 0;
+assign joyana_r4 = 0;
+
+
+always @(posedge clk_sys) begin
+    case(debug_bus[3:0])
+        0: debug_view <= status[0*8+:8];
+        1: debug_view <= status[1*8+:8];
+        2: debug_view <= status[2*8+:8];
+        3: debug_view <= status[3*8+:8];
+        4: debug_view <= status[4*8+:8];
+        5: debug_view <= status[5*8+:8];
+        6: debug_view <= status[6*8+:8];
+        7: debug_view <= status[7*8+:8];
+        default: debug_view <= { osd_shown, 1'b0, osd_rotate, 1'b0, no_csync, ypbpr, scan2x_enb };
+    endcase
+end
+
+`ifndef SIMULATION
+    `ifndef NOSOUND
+    wire cen_dac;
+    reg [3:0] cen_dac_sr;
+
+    assign cen_dac = cen_dac_sr[0];
+    always @(posedge clk_dac, posedge rst) begin
+        if( rst )
+            cen_dac_sr <= 4'b100;
+        else begin
+            cen_dac_sr <= { cen_dac_sr[2:0], cen_dac_sr[3] };
+        end
+    end
+
+    function [19:0] snd_padded;
+        input [15:0] snd;
+        reg   [15:0] snd_in;
+        begin
+            snd_in = {snd[15]^SIGNED_SND[0], snd[14:0]};
+            snd_padded = { 1'b0, snd_in, 3'd0 };
+        end
+    endfunction
+
+    hifi_1bit_dac u_dac_left
+    (
+      .reset    ( rst                  ),
+      .clk      ( clk_dac              ),
+      .clk_ena  ( cen_dac              ),
+      .pcm_in   ( snd_padded(snd_left) ),
+      .dac_out  ( snd_pwm_left         )
+    );
+
+        `ifdef JTFRAME_STEREO
+        hifi_1bit_dac u_dac_right
+        (
+          .reset    ( rst                  ),
+          .clk      ( clk_dac              ),
+          .clk_ena  ( cen_dac              ),
+          .pcm_in   ( snd_padded(snd_right)),
+          .dac_out  ( snd_pwm_right        )
+        );
+        `else
+        assign snd_pwm_right = snd_pwm_left;
+        `endif
+    `else // NOSOUND
+    assign snd_pwm_left  = 0;
+    assign snd_pwm_right = 0;
+    `endif
+`else // Simulation:
+assign snd_pwm_left  = 0;
+assign snd_pwm_right = 0;
+`endif
+
+`ifndef SIMULATION
+`ifndef NOSOUND
+
+localparam [31:0] CLKRATE = `JTFRAME_MCLK;
+
+wire [19:0] snd_padded_left = snd_padded(snd_left);
+wire [19:0] snd_padded_right = snd_padded(snd_right);
+
+i2s i2s(
+    .reset(1'b0),
+    .clk(clk_sys),
+    .clk_rate(CLKRATE),
+
+    .sclk(I2S_BCK),
+    .lrclk(I2S_LRCK),
+    .sdata(I2S_DATA),
+
+    .left_chan(snd_padded_left[19:4]),
+    .right_chan(snd_padded_right[19:4])
+);
+
+spdif spdif(
+    .clk_i(clk_sys),
+    .rst_i(1'b0),
+    .clk_rate_i(CLKRATE),
+    .spdif_o(SPDIF),
+    .sample_i({snd_padded_right[19:4], snd_padded_left[19:4]})
+);
+`else
+assign I2S_DATA=0, SPDIF=0, I2S_BCK=0, I2S_LRCK=0;
+`endif
+`endif
+
+`ifndef JTFRAME_MIST_DIRECT
+`define JTFRAME_MIST_DIRECT 1'b1
+`endif
+
+`ifndef SIMULATION
+wire [9:0] cfg_addr;
+wire [7:0] cfg_dout;
+
+jtframe_ram #(.SYNFILE("cfgstr.hex")) u_cfgstr(
+    .clk    ( SPI_SCK   ),
+    .cen    ( 1'b1      ),
+    .data   (           ),
+    .addr   ( cfg_addr  ),
+    .we     ( 1'b0      ),
+    .q      ( cfg_dout  )
+);
+
+wire        i2c_start;
+wire        i2c_read;
+wire  [6:0] i2c_addr;
+wire  [7:0] i2c_subaddr;
+wire  [7:0] i2c_dout;
+wire  [7:0] i2c_din;
+wire        i2c_ack;
+wire        i2c_end;
+
+`ifndef NEPTUNO
+    wire [1:0]  buttons;
+    assign but_coin    = 4'd0;
+    assign but_start   = 4'd0;
+    wire [63:0] user_io_status;
+	 assign status = {user_io_status[63:1], user_io_status[0] | buttons[1]}; // status[0] | buttons[1] is reset
+
+    user_io #(.ROM_DIRECT_UPLOAD(`JTFRAME_MIST_DIRECT), .FEATURES(32'h0 /*| (QSPI << 2)*/ | (HDMI << 14))) u_userio(
+        .clk_sys        ( clk_sys   ),
+
+        // config string
+        .conf_str       (           ),
+        .conf_addr      ( cfg_addr  ),
+        .conf_chr       ( cfg_dout  ),
+
+        .SPI_CLK        ( SPI_SCK   ),
+        .SPI_SS_IO      ( CONF_DATA0),
+        .SPI_MISO       ( SPI_DO    ),
+        .SPI_MOSI       ( SPI_DI    ),
+        .joystick_0     ( joystick2 ),
+        .joystick_1     ( joystick1 ),
+        .joystick_2     ( joystick3 ),
+        .joystick_3     ( joystick4 ),
+        .buttons        ( buttons   ),
+        // Analog joysticks
+        .joystick_analog_0({joyana_r2[7:0], joyana_r2[15:8], joyana_l2}),
+        .joystick_analog_1({joyana_r1[7:0], joyana_r1[15:8], joyana_l1}),
+
+        .status         ( user_io_status ),
+        .ypbpr          ( ypbpr     ),
+        .no_csync       ( no_csync  ),
+        .scandoubler_disable ( scan2x_enb ),
+        // keyboard
+        .ps2_kbd_clk    ( ps2_kbd_clk  ),
+        .ps2_kbd_data   ( ps2_kbd_data ),
+        // Core variant
+        .core_mod       ( core_mod  ),
+        // i2c bridge
+        .i2c_start      (i2c_start  ),
+        .i2c_read       (i2c_read   ),
+        .i2c_addr       (i2c_addr   ),
+        .i2c_subaddr    (i2c_subaddr),
+        .i2c_dout       (i2c_dout   ),
+        .i2c_din        (i2c_din    ),
+        .i2c_ack        (i2c_ack    ),
+        .i2c_end        (i2c_end    ),
+        // unused ports:
+        .serial_strobe  ( 1'b0      ),
+        .serial_data    ( 8'd0      ),
+        .sd_lba         ( 32'd0     ),
+        .sd_rd          ( 1'b0      ),
+        .sd_wr          ( 1'b0      ),
+        .sd_conf        ( 1'b0      ),
+        .sd_sdhc        ( 1'b0      ),
+        .sd_din         ( 8'd0      ),
+        .mouse_x        ( mouse_dx  ),
+        .mouse_y        ( mouse_dy  ),
+        .mouse_z        (           ),
+        .mouse_flags    ( mouse_f   ),
+        .mouse_strobe   ( mouse_st  ),
+        .mouse_idx      ( mouse_idx )
+    );
+`else
+    assign ypbpr     = 0;
+    assign no_csync  = 1;
+`endif
+// Simulation:
+`else // these inputs are not used in simulation:
+    assign joystick1 = 32'd0;
+    assign joystick2 = 32'd0;
+    assign joystick3 = 32'd0;
+    assign joystick4 = 32'd0;
+    assign joyana_l1 = 0;
+    assign joyana_r1 = 0;
+    assign status    = 64'd0;
+    assign but_coin  = 0;
+    assign but_start = 0;
+    `ifndef SCANDOUBLER_DISABLE
+        `define SCANDOUBLER_DISABLE 1'b1
+        initial $display("INFO: Use -d SCANDOUBLER_DISABLE=0 if you want video output.");
+    `endif
+    initial $display("INFO:SCANDOUBLER_DISABLE=%d",`SCANDOUBLER_DISABLE);
+    assign scan2x_enb = `SCANDOUBLER_DISABLE;
+    assign ypbpr = 1'b0;
+`endif
+
+`ifndef NEPTUNO
+    data_io #(.ROM_DIRECT_UPLOAD(1'b1), .USE_QSPI(QSPI)) u_datain (
+        .clkref_n           ( 1'b0              ),
+        .SPI_SCK            ( SPI_SCK           ),
+        .SPI_SS2            ( SPI_SS2           ),
+        .SPI_SS4            ( SPI_SS4           ),
+        .SPI_DI             ( SPI_DI            ),
+        .SPI_DO             ( SPI_DO            ),
+
+        .QCSn               ( QCSn              ),
+        .QSCK               ( QSCK              ),
+        .QDAT               ( QDAT              ),
+
+        .clk_sys            ( clk_rom           ),
+        .ioctl_download     ( ioctl_download    ),
+        .ioctl_addr         ( ioctl_addr        ),
+        .ioctl_dout         ( ioctl_dout        ),
+        .ioctl_din          ( ioctl_din         ),
+        .ioctl_wr           ( ioctl_wr          ),
+        .ioctl_index        ( ioctl_index       ),
+        .ioctl_upload       ( ioctl_upload      ),
+        // Unused:
+        .ioctl_fileext      (                   ),
+        .ioctl_filesize     (                   ),
+
+        .hdd_clk            ( 1'b0              ),
+        .hdd_cmd_req        (                   ),
+        .hdd_cdda_req       (                   ),
+        .hdd_dat_req        (                   ),
+        .hdd_cdda_wr        (                   ),
+        .hdd_status_wr      (                   ),
+        .hdd_addr           (                   ),
+        .hdd_wr             (                   ),
+
+        .hdd_data_out       (                   ),
+        .hdd_data_in        (                   ),
+        .hdd_data_rd        (                   ),
+        .hdd_data_wr        (                   ),
+
+        .hdd0_ena           (                   ),
+        .hdd1_ena           (                   )
+    );
+
+    assign JOY_SELECT=0;
+`else
+    // Neptuno
+    wire [8:0]  nept_controls;
+    assign but_coin    = nept_controls[7:4];
+    assign but_start   = nept_controls[3:0];
+    // Mouse not supported
+    assign mouse_st    = 0;
+    assign mouse_dx    = 0;
+    assign mouse_dy    = 0;
+    assign mouse_idx   = 0;
+    assign mouse_f     = 0;
+
+    jtframe_neptuno_io u_neptuno_io(
+        .sdram_init     ( sdram_init    ),
+        .clk_sys        ( clk_sys       ),
+        .clk_rom        ( clk_rom       ),
+        .hs             ( game_hs       ),
+
+        .SPI_SCK        ( SPI_SCK       ),
+        .SPI_SS2        ( SPI_SS2       ),
+        .SPI_DI         ( SPI_DI        ),
+        .SPI_DO         ( SPI_DO        ),
+
+        // Config string
+        .cfg_addr       ( cfg_addr      ),
+        .cfg_dout       ( cfg_dout      ),
+
+        .ioctl_download ( ioctl_download),
+        .ioctl_index    ( ioctl_index   ),
+        .ioctl_wr       ( ioctl_wr      ),
+        .ioctl_addr     ( ioctl_addr    ),
+        .ioctl_dout     ( ioctl_dout    ),
+
+        .core_mod       ( core_mod      ),
+        .status         ( status        ),
+        .scan2x_enb     ( scan2x_enb    ),
+
+        // DB9 Joysticks
+        .joy1_bus       ( joy1_bus      ),
+        .joy2_bus       ( joy2_bus      ),
+        .JOY_SELECT     ( JOY_SELECT    ),
+        
+        .BUTTON_n       ( BUTTON_n      ),
+        
+        // keyboard
+        .ps2_kbd_clk    ( ps2_kbd_clk   ),
+        .ps2_kbd_data   ( ps2_kbd_data  ),
+
+        .joystick1      (joystick1[11:0]),
+        .joystick2      (joystick2[11:0]),
+        .controls       ( nept_controls )
+    );
+
+    assign joystick1[31:12] = 0;
+    assign joystick2[31:12] = 0;
+    assign joystick3        = 0;
+    assign joystick4        = 0;
+    assign joyana_l1        = 0;
+    assign joyana_r1        = 0;
+    assign ioctl_upload     = 0;
+`endif
+
+reg [1:0] scanlines;
+reg       bw_en, blend_en;
+
+always @(*) begin
+    case( status[4:3] )
+        2'd0: { scanlines, bw_en, blend_en } = { 2'd0, 2'd0 }; // pass thru
+        2'd1: { scanlines, bw_en, blend_en } = { 2'd0, 2'd1 }; // no scanlines, linear interpolation
+        2'd2: { scanlines, bw_en, blend_en } = { 2'd0, 2'd3 }; // analogue
+        2'd3: { scanlines, bw_en, blend_en } = { 2'd1, 2'd3 }; // analogue + scan lines
+    endcase // status[4:3]
+    `ifdef JTFRAME_FEEDTHRU
+    { scanlines, bw_en, blend_en } = { 3'd0, 2'd0 }; `endif
+end
+
+jtframe_mist_video #(
+    .COLORW     ( COLORW        ),
+    .VGA_DW     ( VGA_DW        ),
+    .VIDEO_WIDTH( VIDEO_WIDTH   ))
+u_video(
+    .rst        ( rst           ),
+    .clk        ( clk_sys       ),
+    // base video
+    .pxl_cen    ( pxl_cen       ),
+    .pxl2_cen   ( pxl2_cen      ),
+    .game_hs    ( game_hs       ),
+    .game_vs    ( game_vs       ),
+    .game_lvbl  ( game_lvbl     ),
+    .game_lhbl  ( game_lhbl     ),
+    .game_rgb   ( game_rgb      ),
+    // SPI for OSD contents
+    .osd_di     ( SPI_DI        ),
+    .osd_sck    ( SPI_SCK       ),
+    .osd_ss3    ( SPI_SS3       ),
+    .osd_rotate ( osd_rotate    ),
+    .osd_shown  ( osd_shown     ),
+    // low pass filter for video
+    .bw_en      ( bw_en         ),
+    .blend_en   ( blend_en      ),
+    .scanlines  ( scanlines     ),
+    .rotation   ( rotation      ),
+    // video signal type
+    .ypbpr      ( ypbpr         ),
+    .no_csync   ( no_csync      ),
+    .scan2x_en  ( ~scan2x_enb   ), // scan doubler enable bar
+    .sog        ( 1'b0          ),
+    .cvideo_en  ( 1'b0          ),
+    .pal_en     ( 1'b0          ),
+    // Scan-doubler video
+    .scan2x_r   ( scan2x_r      ),
+    .scan2x_g   ( scan2x_g      ),
+    .scan2x_b   ( scan2x_b      ),
+    .scan2x_hs  ( scan2x_hs     ),
+    .scan2x_vs  ( scan2x_vs     ),
+    .scan2x_de  ( scan2x_de     ),
+    .scan2x_HB  (               ),
+    .scan2x_VB  (               ),
+    // crt video
+    .video_hs   ( VIDEO_HS      ),
+    .video_vs   ( VIDEO_VS      ),
+    .video_de   (               ),
+    .video_r    ( VIDEO_R       ),
+    .video_g    ( VIDEO_G       ),
+    .video_b    ( VIDEO_B       ),
+    .yc_vid     (               ),
+    // RAM interface for rotation
+    .init       ( sdram_init    ),
+    .sd_data    ( sd_data       ),
+    .sd_addr    ( sd_addr       ),
+    .sd_dqm     ( sd_dqm        ),
+    .sd_ba      ( sd_ba         ),
+    .sd_cs      ( sd_cs         ),
+    .sd_we      ( sd_we         ),
+    .sd_ras     ( sd_ras        ),
+    .sd_cas     ( sd_cas        ),
+    .sd_cke     ( sd_cke        )
+
+);
+
+generate if (HDMI) begin
+i2c_master #(96_000_000) i2c_master (
+    .CLK         (clk_sys),
+    .I2C_START   (i2c_start),
+    .I2C_READ    (i2c_read),
+    .I2C_ADDR    (i2c_addr),
+    .I2C_SUBADDR (i2c_subaddr),
+    .I2C_WDATA   (i2c_dout),
+    .I2C_RDATA   (i2c_din),
+    .I2C_END     (i2c_end),
+    .I2C_ACK     (i2c_ack),
+
+    //I2C bus
+    .I2C_SCL     (HDMI_SCL),
+    .I2C_SDA     (HDMI_SDA)
+);
+
+osd #(0,0,6'b01_11_01,8) hdmi_osd (
+   .clk_sys    ( clk_sys      ),
+
+   // spi for OSD
+   .SPI_DI     ( SPI_DI       ),
+   .SPI_SCK    ( SPI_SCK      ),
+   .SPI_SS3    ( SPI_SS3      ),
+
+   .rotate     ( osd_rotate   ),
+
+   .R_in       ( scan2x_r[7:0]),
+   .G_in       ( scan2x_g[7:0]),
+   .B_in       ( scan2x_b[7:0]),
+   .DE         ( scan2x_de    ),
+   .HSync      ( scan2x_hs    ),
+   .VSync      ( scan2x_vs    ),
+
+   .R_out      ( HDMI_R       ),
+   .G_out      ( HDMI_G       ),
+   .B_out      ( HDMI_B       ),
+   .HSync_out  ( HDMI_HS      ),
+   .VSync_out  ( HDMI_VS      ),
+   .DE_out     ( HDMI_DE      ),
+   .osd_shown  (              )
+);
+
+end else begin
+  assign HDMI_SCL  = 1'bZ;
+  assign HDMI_SDA  = 1'bZ;
+  assign HDMI_R    = 8'd0;
+  assign HDMI_G    = 8'd0;
+  assign HDMI_B    = 8'd0;
+  assign HDMI_HS   = 1'b0;
+  assign HDMI_VS   = 1'b0;
+  assign HDMI_DE   = 1'b0;
+end
+
+endgenerate
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/jtframe_mist_clocks.v

@@ -0,0 +1,119 @@
+/*  This file is part of JTFRAME.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Version: 1.0
+    Date: 22-2-2019 */
+
+module jtframe_mist_clocks(
+    input   clk_ext,    // 27MHz for MiST, 50MHz for Neptuno
+
+    // PLL outputs
+    output  clk96,
+    output  clk48,
+    output  clk24,
+    output  pll_locked,
+
+    // System clocks
+    output  clk_sys,
+    output  clk_rom,
+    output  SDRAM_CLK,
+
+    // reset signals
+    input   game_rst,
+    output  rst96,
+    output  rst48,
+    output  rst24
+);
+
+`ifndef JTFRAME_PLL
+    `define JTFRAME_PLL jtframe_pll6000
+`endif
+
+// The PLL for 96MHz has a different phase shift for the SDRAM clock
+// This phase is related to the SDRAM controller configuration set
+// in jtframe_board.
+`ifdef JTFRAME_SDRAM96
+    `define JTFRAME_GAMEPLL jtframe_pllgame96
+`else
+    `define JTFRAME_GAMEPLL jtframe_pllgame
+`endif
+
+wire pll0_lock, pll1_lock, pll2_lock, pll_base, clk27;
+
+assign pll_locked = pll0_lock & pll1_lock & pll2_lock;
+
+`ifdef NEPTUNO
+    pll_neptuno u_pllneptuno(
+        .inclk0 ( clk_ext   ),
+        .c0     ( clk27     ),
+        .locked ( pll0_lock )
+    );
+`elsif POCKET
+    pll_pocket u_pllpocket( // converts 74.25 to 27MHz
+        .rst     ( 1'b0      ),
+        .refclk  ( clk_ext   ),
+        .outclk_0( clk27     ),
+        .locked  ( pll0_lock )
+    );
+`else
+    assign clk27 = clk_ext;
+    assign pll0_lock = 1;
+`endif
+
+`JTFRAME_PLL u_basepll(
+    .inclk0 ( clk27     ),
+    .c0     ( pll_base  ),
+    .locked ( pll2_lock )
+);
+
+// clk_rom is used for SDRAM access
+// clk_sys is for video
+// clk96, clk24 inputs to the core can be enabled via macros
+`JTFRAME_GAMEPLL u_pll_game (
+    .inclk0 ( pll_base    ),
+    .c0     ( SDRAM_CLK   ), // 96 or 48 MHz (possibly phase shifted)
+    .c1     ( clk48       ), // 48 MHz
+    .c2     ( clk96       ),
+    .c3     ( clk24       ),
+    .c4     (             ),
+    .locked ( pll1_lock   )
+);
+
+`ifdef JTFRAME_SDRAM96
+    assign clk_rom = clk96;
+`else
+    assign clk_rom = clk48;
+`endif
+assign clk_sys = clk_rom;
+
+jtframe_rst_sync u_reset96(
+    .rst        ( game_rst  ),
+    .clk        ( clk96     ),
+    .rst_sync   ( rst96     )
+);
+
+jtframe_rst_sync u_reset48(
+    .rst        ( game_rst  ),
+    .clk        ( clk48     ),
+    .rst_sync   ( rst48     )
+);
+
+jtframe_rst_sync u_reset24(
+    .rst        ( game_rst  ),
+    .clk        ( clk24     ),
+    .rst_sync   ( rst24     )
+);
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/jtframe_mist_top.sv

@@ -0,0 +1,642 @@
+/*  This file is part of JTFRAME.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME.  If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Version: 1.0
+    Date: 22-2-2019 */
+
+// This is the MiST/SiDi128 top level
+module mist_top #(parameter
+    VGA_DW = `ifdef MIST_VGA_8BIT 8 `else 6 `endif
+)(
+    input    [1:0]  CLOCK_27,
+
+    output          LED,
+    output   [VGA_DW-1:0] VGA_R,
+    output   [VGA_DW-1:0] VGA_G,
+    output   [VGA_DW-1:0] VGA_B,
+    output          VGA_HS,
+    output          VGA_VS,
+
+`ifdef MIST_USE_HDMI
+    output          HDMI_RST,
+    output    [7:0] HDMI_R,
+    output    [7:0] HDMI_G,
+    output    [7:0] HDMI_B,
+    output          HDMI_HS,
+    output          HDMI_VS,
+    output          HDMI_PCLK,
+    output          HDMI_DE,
+    inout           HDMI_SDA,
+    inout           HDMI_SCL,
+    input           HDMI_INT,
+`endif
+
+    input           SPI_SCK,
+    inout           SPI_DO,
+    input           SPI_DI,
+    input           SPI_SS2,
+    input           SPI_SS3,
+    input           CONF_DATA0,
+
+    `ifdef MIST_USE_QSPI
+    input           QSCK,
+    input           QCSn,
+    inout     [3:0] QDAT,
+    `endif
+    `ifndef MIST_NO_DIRECT_UPLOAD
+    input           SPI_SS4,
+    `endif
+
+    output   [12:0] SDRAM_A,
+    inout    [15:0] SDRAM_DQ,
+    output          SDRAM_DQML,
+    output          SDRAM_DQMH,
+    output          SDRAM_nWE,
+    output          SDRAM_nCAS,
+    output          SDRAM_nRAS,
+    output          SDRAM_nCS,
+    output    [1:0] SDRAM_BA,
+    output          SDRAM_CLK,
+    output          SDRAM_CKE,
+
+    `ifdef MIST_DUAL_SDRAM
+    output   [12:0] SDRAM2_A,
+    inout    [15:0] SDRAM2_DQ,
+    output          SDRAM2_DQML,
+    output          SDRAM2_DQMH,
+    output          SDRAM2_nWE,
+    output          SDRAM2_nCAS,
+    output          SDRAM2_nRAS,
+    output          SDRAM2_nCS,
+    output    [1:0] SDRAM2_BA,
+    output          SDRAM2_CLK,
+    output          SDRAM2_CKE,
+    `endif
+
+    output          AUDIO_L,
+    output          AUDIO_R,
+    `ifdef MIST_I2S_AUDIO
+    output          I2S_BCK,
+    output          I2S_LRCK,
+    output          I2S_DATA,
+    `endif
+    `ifdef MIST_I2S_AUDIO_HDMI
+    output          HDMI_MCLK,
+    output reg      HDMI_BCK,
+    output reg      HDMI_LRCK,
+    output reg      HDMI_SDATA,
+    `endif
+    `ifdef MIST_SPDIF_AUDIO
+    output          SPDIF,
+    `endif
+
+    input           UART_RX,
+    output          UART_TX
+
+    `ifdef SIMULATION
+    ,output         sim_pxl_cen,
+    output          sim_pxl_clk,
+    output          sim_vb,
+    output          sim_hb,
+    output          sim_dwnld_busy
+    `endif
+
+);
+
+`ifdef MIST_NO_DIRECT_UPLOAD
+localparam bit DIRECT_UPLOAD = 0;
+wire SPI_SS4 = 1;
+`else
+localparam bit DIRECT_UPLOAD = 1;
+`endif
+
+`ifdef MIST_USE_QSPI
+localparam bit QSPI = 1;
+assign QDAT = 4'hZ;
+`else
+localparam bit QSPI = 0;
+`endif
+
+`ifdef MIST_USE_HDMI
+assign HDMI_RST = 1'b1;
+localparam bit HDMI = 1;
+`else
+localparam bit HDMI = 0;
+`endif
+
+
+`ifdef MIST_DUAL_SDRAM
+
+`ifdef JTFRAME_LF_SDRAM_BUFFER
+`define MIST_USE_SDRAM2
+`endif
+`ifdef JTFRAME_VERTICAL
+`ifdef JTFRAME_SDRAM_ROTATION
+`define MIST_USE_SDRAM2
+`define MIST_USE_SDRAM2_ROTATION
+`endif
+`endif
+
+`ifndef MIST_USE_SDRAM2
+assign SDRAM2_A = 13'hZZZZ;
+assign SDRAM2_BA = 0;
+assign SDRAM2_DQML = 1;
+assign SDRAM2_DQMH = 1;
+assign SDRAM2_CKE = 0;
+assign SDRAM2_CLK = 0;
+assign SDRAM2_nCS = 1;
+assign SDRAM2_DQ = 16'hZZZZ;
+assign SDRAM2_nCAS = 1;
+assign SDRAM2_nRAS = 1;
+assign SDRAM2_nWE = 1;
+`endif
+
+`endif // MIST_DUAL_SDRAM
+
+`ifdef JTFRAME_SDRAM_LARGE
+    localparam SDRAMW=23; // 64 MB
+`else
+    localparam SDRAMW=22; // 32 MB
+`endif
+
+wire        rst, rst_n, clk_sys, clk_rom, clk24, clk48, clk96;
+wire [63:0] status;
+wire [31:0] joystick1, joystick2;
+wire [25:0] ioctl_addr;
+wire [ 7:0] ioctl_dout, ioctl_din;
+wire        ioctl_wr;
+wire        ioctl_ram;
+wire [ 1:0] dial_x, dial_y;
+
+wire [15:0] joyana_l1, joyana_l2, joyana_l3, joyana_l4,
+            joyana_r1, joyana_r2, joyana_r3, joyana_r4;
+
+wire rst_req   = status[0];
+
+// ROM download
+wire          ioctl_rom, ioctl_cart, dwnld_busy;
+
+wire [SDRAMW-1:0] prog_addr;
+wire [15:0]   prog_data;
+wire [ 1:0]   prog_mask, prog_ba;
+wire          prog_we, prog_rd, prog_rdy, prog_ack, prog_dst, prog_dok;
+
+// ROM access from game
+wire [SDRAMW-1:0] ba0_addr, ba1_addr, ba2_addr, ba3_addr;
+wire [ 3:0] ba_rd, ba_rdy, ba_ack, ba_dst, ba_dok, ba_wr;
+wire [15:0] ba0_din, ba1_din, ba2_din, ba3_din;
+wire [ 1:0] ba0_dsn, ba1_dsn, ba2_dsn, ba3_dsn;
+wire [15:0] sdram_dout;
+
+localparam COLORW=`JTFRAME_COLORW;
+
+wire [COLORW-1:0] red;
+wire [COLORW-1:0] green;
+wire [COLORW-1:0] blue;
+
+wire LHBL, LVBL, hs, vs;
+wire [15:0] snd_left, snd_right;
+wire [ 5:0] snd_en, snd_vu;
+wire [ 7:0] snd_vol;
+wire        snd_peak, sample;
+
+wire [9:0] game_joy1, game_joy2, game_joy3, game_joy4;
+wire [3:0] game_coin, game_start;
+wire       game_rst, game_service, game_tilt;
+wire       rst96, rst48, rst24;
+wire [3:0] gfx_en;
+// SDRAM
+wire data_rdy, sdram_ack;
+
+// PLL's
+wire pll_locked, clk_pico;
+
+
+`ifndef JTFRAME_STEREO
+    assign snd_right = snd_left;
+`endif
+
+jtframe_mist_clocks u_clocks(
+    .clk_ext    ( CLOCK_27[0]    ),    // 27MHz for MiST, 50MHz for Neptuno
+
+    // PLL outputs
+    .clk96      ( clk96          ),
+    .clk48      ( clk48          ),
+    .clk24      ( clk24          ),
+    .pll_locked ( pll_locked     ),
+
+    // System clocks
+    .clk_sys    ( clk_sys        ),
+    .clk_rom    ( clk_rom        ),
+    .SDRAM_CLK  ( SDRAM_CLK      ),
+
+    // reset signals
+    .game_rst   ( game_rst       ),
+    .rst96      ( rst96          ),
+    .rst48      ( rst48          ),
+    .rst24      ( rst24          )
+);
+
+assign clk_pico = clk48;
+
+wire [ 7:0] debug_bus, debug_view;
+wire [ 1:0] dip_fxlevel;
+wire        dip_pause, dip_flip, dip_test;
+wire        pxl_cen, pxl2_cen;
+wire [ 7:0] st_addr, st_dout;
+wire [ 7:0] paddle_1, paddle_2, paddle_3, paddle_4;
+wire [15:0] mouse_1p, mouse_2p;
+wire [ 1:0] mouse_strobe;
+wire [ 8:0] gun_1p_x, gun_1p_y, gun_2p_x, gun_2p_y;
+wire [31:0] dipsw;
+
+`ifdef JTFRAME_DIPBASE
+localparam DIPBASE=`JTFRAME_DIPBASE;
+`else
+localparam DIPBASE=16;
+`endif
+
+`ifdef MIST_I2S_AUDIO_HDMI
+assign HDMI_MCLK = 0;
+always @(posedge clk_sys) begin
+    HDMI_BCK <= I2S_BCK;
+    HDMI_LRCK <= I2S_LRCK;
+    HDMI_SDATA <= I2S_DATA;
+end
+`endif
+
+jtframe_mist #(
+    .SDRAMW       ( SDRAMW         ),
+    .SIGNED_SND   ( `JTFRAME_SIGNED_SND    ),
+    // as MiST firmware can remap buttons, leaving it fixed here
+    // means the same game pad mapping will work for all games the same
+    .BUTTONS      ( 6              ),
+    .DIPBASE      ( DIPBASE        ),
+    .COLORW       ( COLORW         ),
+    .VIDEO_WIDTH  ( `JTFRAME_WIDTH ),
+    .VIDEO_HEIGHT ( `JTFRAME_HEIGHT),
+    .VGA_DW       ( VGA_DW         ),
+    .QSPI         ( QSPI           ),
+    .HDMI         ( HDMI           ),
+    .XOR_ROT      ( 1'b1           )    // control rotation is on by default for MiST platforms as there is no hardware rotation
+)
+u_frame(
+    .clk_sys        ( clk_sys        ),
+    .clk_rom        ( clk_rom        ),
+    .clk_pico       ( clk_pico       ),
+    .pll_locked     ( pll_locked     ),
+    .status         ( status         ),
+    .dipsw          ( dipsw          ),
+    // Base video
+    .game_r         ( red            ),
+    .game_g         ( green          ),
+    .game_b         ( blue           ),
+    .LHBL           ( LHBL           ),
+    .LVBL           ( LVBL           ),
+    .hs             ( hs             ),
+    .vs             ( vs             ),
+    .pxl_cen        ( pxl_cen        ),
+    .pxl2_cen       ( pxl2_cen       ),
+    // MiST VGA pins
+    .VGA_R          ( VGA_R          ),
+    .VGA_G          ( VGA_G          ),
+    .VGA_B          ( VGA_B          ),
+    .VGA_HS         ( VGA_HS         ),
+    .VGA_VS         ( VGA_VS         ),
+    // HDMI pins
+`ifdef MIST_USE_HDMI
+    .HDMI_R         ( HDMI_R         ),
+    .HDMI_G         ( HDMI_G         ),
+    .HDMI_B         ( HDMI_B         ),
+    .HDMI_HS        ( HDMI_HS        ),
+    .HDMI_VS        ( HDMI_VS        ),
+    .HDMI_PCLK      ( HDMI_PCLK      ),
+    .HDMI_DE        ( HDMI_DE        ),
+    .HDMI_SDA       ( HDMI_SDA       ),
+    .HDMI_SCL       ( HDMI_SCL       ),
+`else
+    .HDMI_R         (                ),
+    .HDMI_G         (                ),
+    .HDMI_B         (                ),
+    .HDMI_HS        (                ),
+    .HDMI_VS        (                ),
+    .HDMI_PCLK      (                ),
+    .HDMI_DE        (                ),
+    .HDMI_SDA       (                ),
+    .HDMI_SCL       (                ),
+`endif
+    // UART
+`ifndef JTFRAME_UART
+    .uart_rx        ( UART_RX        ),
+    .uart_tx        ( UART_TX        ),
+`else
+    .uart_rx        ( 1'b1           ),
+    .uart_tx        (                ),
+`endif
+    // SDRAM interface
+    .SDRAM_DQ       ( SDRAM_DQ       ),
+    .SDRAM_A        ( SDRAM_A        ),
+    .SDRAM_DQML     ( SDRAM_DQML     ),
+    .SDRAM_DQMH     ( SDRAM_DQMH     ),
+    .SDRAM_nWE      ( SDRAM_nWE      ),
+    .SDRAM_nCAS     ( SDRAM_nCAS     ),
+    .SDRAM_nRAS     ( SDRAM_nRAS     ),
+    .SDRAM_nCS      ( SDRAM_nCS      ),
+    .SDRAM_BA       ( SDRAM_BA       ),
+    .SDRAM_CKE      ( SDRAM_CKE      ),
+`ifdef MIST_USE_SDRAM2_ROTATION
+    .sd_data        ( SDRAM2_DQ      ),
+    .sd_addr        ( SDRAM2_A       ),
+    .sd_dqm         ( {SDRAM2_DQMH, SDRAM2_DQML} ),
+    .sd_ba          ( SDRAM2_BA      ),
+    .sd_cs          ( SDRAM2_nCS     ),
+    .sd_we          ( SDRAM2_nWE     ),
+    .sd_ras         ( SDRAM2_nRAS    ),
+    .sd_cas         ( SDRAM2_nCAS    ),
+    .sd_cke         ( SDRAM2_CKE     ),
+`else
+    .sd_data        (                ),
+    .sd_addr        (                ),
+    .sd_dqm         (                ),
+    .sd_ba          (                ),
+    .sd_cs          (                ),
+    .sd_we          (                ),
+    .sd_ras         (                ),
+    .sd_cas         (                ),
+    .sd_cke         (                ),
+`endif
+    // SPI interface to arm io controller
+    .SPI_DO         ( SPI_DO         ),
+    .SPI_DI         ( SPI_DI         ),
+    .SPI_SCK        ( SPI_SCK        ),
+    .SPI_SS2        ( SPI_SS2        ),
+    .SPI_SS3        ( SPI_SS3        ),
+    .SPI_SS4        ( SPI_SS4        ),
+    .CONF_DATA0     ( CONF_DATA0     ),
+    `ifdef MIST_USE_QSPI
+    .QSCK           ( QSCK           ),
+    .QCSn           ( QCSn           ),
+    .QDAT           ( QDAT           ),
+    `else
+    .QSCK           ( 1'b0           ),
+    .QCSn           ( 1'b1           ),
+    .QDAT           ( 4'h0           ),
+    `endif
+    // ROM access from game
+    .ba0_addr   ( ba0_addr      ), .ba1_addr   ( ba1_addr      ),
+    .ba2_addr   ( ba2_addr      ), .ba3_addr   ( ba3_addr      ),
+    .ba_rd      ( ba_rd         ), .ba_wr      ( ba_wr         ),
+    .ba_dst     ( ba_dst        ), .ba_dok     ( ba_dok        ),
+    .ba_rdy     ( ba_rdy        ), .ba_ack     ( ba_ack        ),
+    .ba0_din    ( ba0_din       ), .ba0_dsn    ( ba0_dsn       ),
+    .ba1_din    ( ba1_din       ), .ba1_dsn    ( ba1_dsn       ),
+    .ba2_din    ( ba2_din       ), .ba2_dsn    ( ba2_dsn       ),
+    .ba3_din    ( ba3_din       ), .ba3_dsn    ( ba3_dsn       ),
+
+    // ROM-load interface
+    .prog_addr  ( prog_addr     ),
+    .prog_ba    ( prog_ba       ),
+    .prog_rd    ( prog_rd       ),
+    .prog_we    ( prog_we       ),
+    .prog_data  ( prog_data     ),
+    .prog_mask  ( prog_mask     ),
+    .prog_ack   ( prog_ack      ),
+    .prog_dst   ( prog_dst      ),
+    .prog_dok   ( prog_dok      ),
+    .prog_rdy   ( prog_rdy      ),
+
+    // ROM load
+    .ioctl_addr     ( ioctl_addr     ),
+    .ioctl_dout     ( ioctl_dout     ),
+    .ioctl_din      ( ioctl_din      ),
+    .ioctl_wr       ( ioctl_wr       ),
+    .ioctl_ram      ( ioctl_ram      ),
+
+    .ioctl_rom      ( ioctl_rom      ),
+    .ioctl_cart     ( ioctl_cart     ),
+    .dwnld_busy     ( dwnld_busy     ),
+
+    .sdram_dout     ( sdram_dout     ),
+//////////// board
+    .rst            ( rst            ),
+    .rst_n          ( rst_n          ), // unused
+    .game_rst       ( game_rst       ),
+    .game_rst_n     (                ),
+    // reset forcing signals:
+    .rst_req        ( rst_req        ),
+    // Sound
+    .snd_left       ( snd_left       ),
+    .snd_right      ( snd_right      ),
+    .snd_sample     ( sample         ),
+    .snd_en         ( snd_en         ),
+    .snd_vu         ( snd_vu         ),
+    .snd_vol        ( snd_vol        ),
+    .snd_peak       ( snd_peak       ),
+    .AUDIO_L        ( AUDIO_L        ),
+    .AUDIO_R        ( AUDIO_R        ),
+    `ifdef MIST_I2S_AUDIO
+    .I2S_BCK        ( I2S_BCK        ),
+    .I2S_LRCK       ( I2S_LRCK       ),
+    .I2S_DATA       ( I2S_DATA       ),
+    `else
+    .I2S_BCK        (                ),
+    .I2S_LRCK       (                ),
+    .I2S_DATA       (                ),
+    `endif
+    `ifdef MIST_SPDIF_AUDIO
+    .SPDIF          ( SPDIF          ),
+    `else
+    .SPDIF          (                ),
+    `endif
+    // joystick
+    .game_joystick1 ( game_joy1      ),
+    .game_joystick2 ( game_joy2      ),
+    .game_joystick3 ( game_joy3      ),
+    .game_joystick4 ( game_joy4      ),
+    .game_coin      ( game_coin      ),
+    .game_start     ( game_start     ),
+    .game_service   ( game_service   ),
+    .game_tilt      ( game_tilt      ),
+    .joyana_l1      ( joyana_l1      ),
+    .joyana_l2      ( joyana_l2      ),
+    .joyana_l3      ( joyana_l3      ),
+    .joyana_l4      ( joyana_l4      ),
+    .joyana_r1      ( joyana_r1      ),
+    .joyana_r2      ( joyana_r2      ),
+    .joyana_r3      ( joyana_r3      ),
+    .joyana_r4      ( joyana_r4      ),
+    // Paddle inputs
+    .paddle_1       ( paddle_1       ),
+    .paddle_2       ( paddle_2       ),
+    .paddle_3       ( paddle_3       ),
+    .paddle_4       ( paddle_4       ),
+    // Mouse inputs
+    .mouse_1p       ( mouse_1p       ),
+    .mouse_2p       ( mouse_2p       ),
+    .mouse_strobe   ( mouse_strobe   ),
+    .LED            ( LED            ),
+    // Lightguns position
+    .gun_1p_x       ( gun_1p_x       ),
+    .gun_1p_y       ( gun_1p_y       ),
+    .gun_2p_x       ( gun_2p_x       ),
+    .gun_2p_y       ( gun_2p_y       ),
+    // Dial emulation
+    .dial_x         ( dial_x         ),
+    .dial_y         ( dial_y         ),
+    // Unused in MiST
+    .BUTTON_n       ( 4'hf           ),
+    .ps2_clk        (                ),
+    .ps2_dout       (                ),
+    .joy1_bus       (                ),
+    .joy2_bus       (                ),
+    .JOY_SELECT     (                ),
+    // DIP and OSD settings
+    .dip_test       ( dip_test       ),
+    .dip_pause      ( dip_pause      ),
+    .dip_flip       ( dip_flip       ),
+    .dip_fxlevel    ( dip_fxlevel    ),
+    // status
+    .st_addr        ( st_addr        ),
+    .st_dout        ( st_dout        ),
+    // Debug
+    .gfx_en         ( gfx_en         ),
+    .debug_bus      ( debug_bus      ),
+    .debug_view     ( debug_view     )
+);
+
+wire        game_tx, game_rx;
+
+`ifdef JTFRAME_UART
+assign UART_TX = game_tx,
+       game_rx = UART_RX;
+`endif
+
+`ifdef MIST_USE_SDRAM2
+    // implement video buffer in the second SDRAM chip (sidi128)
+    wire pll_locked2, clk_rom2;
+
+    jtframe_mist_clocks u_clocks2(
+        .clk_ext    ( CLOCK_27[0]    ),    // 27MHz for MiST, 50MHz for Neptuno
+
+        // PLL outputs
+        .clk96      ( ),
+        .clk48      ( ),
+        .clk24      ( ),
+        .pll_locked ( pll_locked2 ),
+
+        // System clocks
+        .clk_sys    ( ),
+        .clk_rom    ( clk_rom2   ),
+        .SDRAM_CLK  ( SDRAM2_CLK ),
+
+        // reset signals
+        .game_rst   ( ),
+        .rst96      ( ),
+        .rst48      ( ),
+        .rst24      ( )
+    );
+`endif
+
+`ifdef JTFRAME_LF_BUFFER
+    // line-frame buffer
+    wire        [ 7:0] game_vrender;
+    wire        [ 8:0] game_hdump;
+    wire        [ 8:0] ln_addr;
+    wire        [15:0] ln_data;
+    wire               ln_done;
+    wire               ln_we;
+    wire               ln_hs, ln_vs, ln_lvbl;
+    wire        [15:0] ln_pxl;
+    wire        [ 7:0] ln_v;
+
+    wire [ 7:0] st_lpbuf;
+
+    // this places the pxl1_cen in the pixel centre
+    reg pxl1_cen;
+    always @(posedge clk_sys) pxl1_cen <= pxl2_cen & ~pxl_cen;
+
+`ifdef JTFRAME_LF_SDRAM_BUFFER
+    jtframe_lfbuf_sdr u_lf_buf(
+        .rst        ( rst           ),
+        .clk        ( clk_rom2      ),
+        .pxl_cen    ( pxl1_cen      ),
+
+        .hs         ( hs            ),
+        .vs         ( vs            ),
+        .lvbl       ( LVBL          ),
+        .lhbl       ( LHBL          ),
+        .vrender    ( game_vrender  ),
+        .hdump      ( game_hdump    ),
+
+        // interface with the game core
+        .ln_addr    ( ln_addr       ),
+        .ln_data    ( ln_data       ),
+        .ln_done    ( ln_done       ),
+        .ln_hs      ( ln_hs         ),
+        .ln_pxl     ( ln_pxl        ),
+        .ln_v       ( ln_v          ),
+        .ln_vs      ( ln_vs         ),
+        .ln_lvbl    ( ln_lvbl       ),
+        .ln_we      ( ln_we         ),
+
+        .init_n     ( pll_locked2   ),
+        .SDRAM_A    ( SDRAM2_A      ),
+        .SDRAM_DQ   ( SDRAM2_DQ     ),
+        .SDRAM_DQML ( SDRAM2_DQML   ),
+        .SDRAM_DQMH ( SDRAM2_DQMH   ),
+        .SDRAM_nWE  ( SDRAM2_nWE    ),
+        .SDRAM_nCAS ( SDRAM2_nCAS   ),
+        .SDRAM_nRAS ( SDRAM2_nRAS   ),
+        .SDRAM_nCS  ( SDRAM2_nCS    ),
+        .SDRAM_BA   ( SDRAM2_BA     ),
+        .SDRAM_CKE  ( SDRAM2_CKE    ),
+
+        .st_addr    ( st_addr       ),
+        .st_dout    ( st_lpbuf      )
+    );
+`else
+    // line-frame buffer
+    jtframe_lfbuf_bram u_lf_buf(
+        .rst        ( rst           ),
+        .clk        ( clk_rom       ),
+        .pxl_cen    ( pxl1_cen      ),
+
+        .hs         ( hs            ),
+        .vs         ( vs            ),
+        .lvbl       ( LVBL          ),
+        .lhbl       ( LHBL          ),
+        .vrender    ( game_vrender  ),
+        .hdump      ( game_hdump    ),
+
+        // interface with the game core
+        .ln_addr    ( ln_addr       ),
+        .ln_data    ( ln_data       ),
+        .ln_done    ( ln_done       ),
+        .ln_hs      ( ln_hs         ),
+        .ln_pxl     ( ln_pxl        ),
+        .ln_v       ( ln_v          ),
+        .ln_vs      ( ln_vs         ),
+        .ln_lvbl    ( ln_lvbl       ),
+        .ln_we      ( ln_we         ),
+
+        .st_addr    ( st_addr       ),
+        .st_dout    ( st_lpbuf      )
+    );
+`endif
+`endif
+
+`include "jtframe_game_instance.v"
+
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/jtframe_mist_video.v

@@ -0,0 +1,324 @@
+/*  This file is part of JTFRAME.
+    JTFRAME program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    JTFRAME program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with JTFRAME. If not, see <http://www.gnu.org/licenses/>.
+
+    Author: Jose Tejada Gomez. Twitter: @topapate
+    Version: 1.0
+    Date: 27-10-2017 */
+
+module jtframe_mist_video #(parameter
+    COLORW=4,
+    VGA_DW=6,
+    VIDEO_WIDTH=256,
+    OSD=1
+)(
+    input              rst,
+    input              clk,
+    // base video
+    input              pxl_cen,
+    input              pxl2_cen,
+    input              game_hs,
+    input              game_vs,
+    input              game_lvbl,
+    input              game_lhbl,
+    input [3*COLORW-1:0] game_rgb,
+    // SPI for OSD contents
+    input              osd_di, osd_sck, osd_ss3,
+    input   [1:0]      osd_rotate,
+    output             osd_shown,
+    // low pass filter for video
+    input              bw_en,
+    input              blend_en,
+    input   [1:0]      scanlines,
+    input   [1:0]      rotation, // 0 - no rotation, 1 - clockwise, 2 - anticlockwise
+    // video signal type
+    input              ypbpr,
+    input              no_csync,
+    input              scan2x_en, // scan doubler enable
+    input              sog, //Sync-On-Green
+    input              cvideo_en,
+    input              pal_en,
+    // Scan-doubler video
+    output reg [7:0]   scan2x_r,
+    output reg [7:0]   scan2x_g,
+    output reg [7:0]   scan2x_b,
+    output             scan2x_hs,
+    output             scan2x_vs,
+    output             scan2x_de,
+    output             scan2x_HB,
+    output             scan2x_VB,
+    // crt video
+    output reg         video_hs,
+    output reg         video_vs,
+    output             video_de,
+    output [VGA_DW-1:0] video_r,
+    output [VGA_DW-1:0] video_g,
+    output [VGA_DW-1:0] video_b,
+    // Composite video
+    output [23:0]      yc_vid,
+    // SDRAM interface for rotation
+    input              init,
+    inout       [15:0] sd_data,
+    output      [12:0] sd_addr,
+    output       [1:0] sd_dqm,
+    output       [1:0] sd_ba,
+    output             sd_cs,
+    output             sd_we,
+    output             sd_ras,
+    output             sd_cas,
+    output             sd_cke
+);
+`ifdef SIMULATION
+always @* begin
+    video_hs = game_hs;
+    video_vs = game_vs;
+end
+
+assign video_r = game_rgb[3*VGA_DW-1-:COLORW];
+assign video_g = game_rgb[2*VGA_DW-1-:COLORW];
+assign video_b = game_rgb[  VGA_DW-1-:COLORW];
+`else
+// Limited bandwidth for video signal
+localparam CLROUTW = COLORW < 5 ? COLORW+1 : COLORW;
+
+wire [CLROUTW-1:0] r_ana, g_ana, b_ana;
+wire               hs_ana, vs_ana, lhbl_ana, lvbl_ana;
+wire               pxl_ana;
+
+jtframe_wirebw #(.WIN(COLORW), .WOUT(CLROUTW)) u_wirebw(
+    .clk        ( clk       ),
+    .spl_in     ( pxl_cen   ),
+    .r_in       ( game_rgb[COLORW*2+:COLORW] ),
+    .g_in       ( game_rgb[COLORW*1+:COLORW] ),
+    .b_in       ( game_rgb[COLORW*0+:COLORW] ),
+    .HS_in      ( game_hs   ),
+    .VS_in      ( game_vs   ),
+    .LHB_in     ( game_lhbl ),
+    .LVB_in     ( game_lvbl ),
+    .enable     ( bw_en     ),
+    // filtered video
+    .HS_out     ( hs_ana    ),
+    .VS_out     ( vs_ana    ),
+    .LHB_out    ( lhbl_ana  ),
+    .LVB_out    ( lvbl_ana  ),
+    .r_out      ( r_ana     ),
+    .g_out      ( g_ana     ),
+    .b_out      ( b_ana     )
+);
+/* verilator lint_off WIDTHTRUNC */
+/* verilator lint_off WIDTHEXPAND */
+/* verilator lint_off SELRANGE */
+function [7:0] extend8(input [CLROUTW-1:0] a); begin
+    extend8[7-:CLROUTW] = a;
+    if( CLROUTW >= 8) extend8 = a[CLROUTW-1-: 8];
+    case( CLROUTW )
+        3: extend8[4:0] = { a[CLROUTW-1-:3], a[CLROUTW-1-:2]};
+        4: extend8[3:0] = { a[CLROUTW-1-:3], a[0]};
+        5: extend8[2:0] =   a[CLROUTW-1-:3];
+        6: extend8[1:0] =   a[CLROUTW-1-:2];
+        7: extend8[0]   =   a[CLROUTW-1];
+        default: ;
+    endcase
+end endfunction
+/* verilator lint_on WIDTHTRUNC */
+/* verilator lint_on WIDTHEXPAND */
+/* verilator lint_on SELRANGE */
+
+// This scan doubler takes very little memory. Some games in MiST
+// can only use this
+wire [CLROUTW*3-1:0] rgbx2;
+wire [CLROUTW*3-1:0] ana_rgb = { r_ana, g_ana, b_ana };
+wire scan2x_enb  = cvideo_en ? 1'b1  : ~scan2x_en;
+wire scan2x_vsin = bw_en ?  vs_ana   :  game_vs;
+wire scan2x_hsin = bw_en ?  hs_ana   :  game_hs;
+wire scan2x_hbin = bw_en ? ~lhbl_ana : ~game_lhbl;
+wire scan2x_vbin = bw_en ? ~lvbl_ana : ~game_lvbl;
+
+// Note that VIDEO_WIDTH must include blanking for jtframe_scan2x
+jtframe_scan2x #(.COLORW(CLROUTW), .HLEN(VIDEO_WIDTH)) u_scan2x(
+    .rst        ( rst            ),
+    .clk        ( clk            ),
+    .pxl_cen    ( pxl_cen        ),
+    // settings
+    .sl_mode    ( scanlines[1:0] ),
+    .blend_en   ( ~|rotation & blend_en ),
+    .enb        ( scan2x_enb     ),
+    .rotation   ( rotation       ),
+    .hfilter    ( blend_en       ),
+    .vfilter    ( blend_en       ),
+    // video inputs
+    .pxl2_cen   ( pxl2_cen       ),
+    .x1_pxl     ( ana_rgb        ),
+    .x1_hs      ( scan2x_hsin    ),
+    .x1_vs      ( scan2x_vsin    ),
+    .x1_hb      ( scan2x_hbin    ),
+    .x1_vb      ( scan2x_vbin    ),
+    // outputs
+    .x2_pxl     ( rgbx2          ),
+    .x2_hs      ( scan2x_hs      ),
+    .x2_vs      ( scan2x_vs      ),
+    .x2_de      ( scan2x_de      ),
+    .x2_HB      ( scan2x_HB      ),
+    .x2_VB      ( scan2x_VB      ),
+    // RAM interface for rotation
+    .init       ( init           ),
+    .sd_data    ( sd_data        ),
+    .sd_addr    ( sd_addr        ),
+    .sd_dqm     ( sd_dqm         ),
+    .sd_ba      ( sd_ba          ),
+    .sd_cs      ( sd_cs          ),
+    .sd_we      ( sd_we          ),
+    .sd_ras     ( sd_ras         ),
+    .sd_cas     ( sd_cas         ),
+    .sd_cke     ( sd_cke         )
+);
+
+always @* begin
+    scan2x_r <= extend8( rgbx2[CLROUTW*3-1:CLROUTW*2] );
+    scan2x_g <= extend8( rgbx2[CLROUTW*2-1:CLROUTW] );
+    scan2x_b <= extend8( rgbx2[CLROUTW-1:0] );
+end
+
+// on-screen display
+localparam m = VGA_DW/COLORW;
+localparam n = VGA_DW%COLORW;
+
+wire [VGA_DW-1:0] osd_r_o;
+wire [VGA_DW-1:0] osd_g_o;
+wire [VGA_DW-1:0] osd_b_o;
+wire              VSync_osd, HSync_osd, CSync_osd, de_osd;
+
+assign CSync_osd = ~(HSync_osd ^ VSync_osd);
+
+generate
+    if(OSD==1) begin
+        osd #(0,0,6'b01_11_01,VGA_DW) osd (
+           .clk_sys    ( clk          ),
+           // spi for OSD
+           .SPI_DI     ( osd_di       ),
+           .SPI_SCK    ( osd_sck      ),
+           .SPI_SS3    ( osd_ss3      ),
+
+           .rotate     ( osd_rotate   ),
+
+           .R_in       ( scan2x_r[7-:VGA_DW] ),
+           .G_in       ( scan2x_g[7-:VGA_DW] ),
+           .B_in       ( scan2x_b[7-:VGA_DW] ),
+           .HSync      ( scan2x_hs    ),
+           .VSync      ( scan2x_vs    ),
+           .DE         ( scan2x_de    ),
+
+           .R_out      ( osd_r_o      ),
+           .G_out      ( osd_g_o      ),
+           .B_out      ( osd_b_o      ),
+           .HSync_out  ( HSync_osd    ),
+           .VSync_out  ( VSync_osd    ),
+           .DE_out     ( de_osd       ),
+
+           .osd_shown  ( osd_shown    )
+        );
+    end else begin
+        assign {osd_r_o, osd_g_o, osd_b_o,HSync_osd,VSync_osd,de_osd} =
+            { scan2x_r[7-:VGA_DW], scan2x_g[7-:VGA_DW], scan2x_b[7-:VGA_DW],
+              scan2x_hs,scan2x_vs,scan2x_de };
+        assign osd_shown = 0;
+    end
+endgenerate
+
+wire       HSync_out, VSync_out, CSync_out;
+
+RGBtoYPbPr #(VGA_DW) u_rgb2ypbpr(
+    .clk       ( clk       ),
+    .ena       ( ypbpr     ),
+    .red_in    ( osd_r_o   ),
+    .green_in  ( osd_g_o   ),
+    .blue_in   ( osd_b_o   ),
+    .hs_in     ( HSync_osd ),
+    .vs_in     ( VSync_osd ),
+    .cs_in     ( CSync_osd ),
+    .de_in     ( de_osd    ),
+    .red_out   ( video_r   ),
+    .green_out ( video_g   ),
+    .blue_out  ( video_b   ),
+    .hs_out    ( HSync_out ),
+    .vs_out    ( VSync_out ),
+    .cs_out    ( CSync_out ),
+    .de_out    ( video_de  )
+);
+
+function [7:0] extend8v( input [VGA_DW-1:0] a); begin
+    extend8v[7-:VGA_DW] = a;
+    if( VGA_DW >= 8) extend8v = a[VGA_DW-1-: 8];
+    case( VGA_DW )
+        3: extend8v[4:0] = { a[VGA_DW-1-:3], a[VGA_DW-1-:2]};
+        4: extend8v[3:0] = { a[VGA_DW-1-:3], a[0]};
+        5: extend8v[2:0] =   a[VGA_DW-1-:3];
+        6: extend8v[1:0] =   a[VGA_DW-1-:2];
+        7: extend8v[0]   =   a[VGA_DW-1];
+        default: ;
+    endcase
+end endfunction
+
+wire        hsync_c, vsync_c, csync_c;
+wire [23:0] colours;
+wire [26:0] colorburst;
+wire [31:0] phase_inc;
+reg  [ 7:0] video_r8, video_g8, video_b8;
+
+always @* begin
+    video_r8 = extend8v( video_r );
+    video_g8 = extend8v( video_g );
+    video_b8 = extend8v( video_b );
+end
+
+localparam [31:0] JTFRAME_PAL  =`JTFRAME_PAL;
+localparam [31:0] JTFRAME_NTSC =`JTFRAME_NTSC;
+localparam [16:0] JTFRAME_PAL_LEN = `JTFRAME_PAL_LEN;
+localparam [16:0] JTFRAME_NTSC_LEN = `JTFRAME_NTSC_LEN;
+
+assign phase_inc  = pal_en ? JTFRAME_PAL     : JTFRAME_NTSC;
+assign colorburst = {JTFRAME_NTSC_LEN, JTFRAME_PAL_LEN[9:0]}; // pal/ntsc selection for colorburst is donde in the module
+assign colours    = {video_r8, video_g8, video_b8};
+
+yc_out u_yc(
+    .clk              ( clk        ),
+    .PHASE_INC        ( {phase_inc,8'b0} ), /* 40'd80070078948>>1 */
+    .PAL_EN           ( pal_en     ),
+    .CVBS             ( 1'b0       ),
+    .COLORBURST_RANGE ( colorburst ),  /* 16'd42145 */
+    .hsync            ( HSync_out  ),
+    .vsync            ( VSync_out  ),
+    .csync            ( CSync_out  ),
+    .din              ( colours & {24{video_de}} ),
+    .dout             ( yc_vid     ),
+    .hsync_o          ( hsync_c    ),
+    .vsync_o          ( vsync_c    ),
+    .csync_o          ( csync_c    )
+);
+
+// a minimig vga->scart cable expects a composite sync signal on the VIDEO_HS output.
+// and VCC on VIDEO_VS (to switch into rgb mode)
+always @(posedge clk) begin
+    video_hs <= ( (~no_csync & scan2x_enb) | ypbpr) ? CSync_out : HSync_out;
+    video_vs <= ( (~no_csync & scan2x_enb) | ypbpr) ? 1'b1      : VSync_out;
+    if( sog ) begin
+        video_hs <= 1'b1;
+        video_vs <= CSync_out;
+    end
+    if( cvideo_en ) begin
+        video_hs <= csync_c;
+        video_vs <= 1'b1;
+    end
+end
+`endif
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/osd.sv

@@ -0,0 +1,411 @@
+// A simple OSD implementation. Can be hooked up between a cores
+// VGA output and the physical VGA pins
+
+module osd #(
+	parameter [9:0] OSD_X_OFFSET = 10'd0,
+	parameter [9:0] OSD_Y_OFFSET = 10'd0,
+	parameter [5:0] OSD_COLOR    = `ifdef JTFRAME_OSDCOLOR `JTFRAME_OSDCOLOR `else 6'b101010 `endif ,
+	parameter       OSD_DW       = 6
+)(
+	// OSDs pixel clock, should be synchronous to cores pixel clock to
+	// avoid jitter.
+	input        clk_sys,
+
+	// SPI interface
+	input        SPI_SCK,
+	input        SPI_SS3,
+	input        SPI_DI,
+
+	input  [1:0] rotate, //[0] - rotate [1] - left or right
+
+	// VGA signals coming from core
+	input [OSD_DW-1:0] R_in,
+	input [OSD_DW-1:0] G_in,
+	input [OSD_DW-1:0] B_in,
+	input        HSync,
+	input        VSync,
+	input        DE,
+
+	// VGA signals going to video connector
+	output reg [OSD_DW-1:0] R_out,
+	output reg [OSD_DW-1:0] G_out,
+	output reg [OSD_DW-1:0] B_out,
+
+	output reg       HSync_out,
+	output reg       VSync_out,
+	output reg       DE_out,
+
+	output reg	 osd_shown
+);
+
+`ifndef JTFRAME_OSDCOLOR
+    `ifdef JTFRAME_RELEASE
+        `define JTFRAME_OSDCOLOR (~6'b0)
+    `else
+        `define JTFRAME_OSDCOLOR (6'h3c)
+    `endif
+`endif
+
+localparam [9:0] OSD_WIDTH   = 10'd256;
+localparam [9:0] OSD_HEIGHT  = 10'd128;
+
+// *********************************************************************************
+// spi client
+// *********************************************************************************
+
+// this core supports only the display related OSD commands
+// of the minimig
+reg  osd_enable=1'b0;
+wire osd_enable_sys;
+
+(* ramstyle = "no_rw_check" *) reg  [7:0] osd_buffer[2047:0];  // the OSD buffer itself
+always @(posedge clk_sys)
+	osd_shown <= osd_enable_sys;
+
+jtframe_sync u_sync_sys(
+	.clk_in ( SPI_SCK        ),
+	.clk_out( clk_sys 		 ),
+	.raw	( osd_enable     ),
+	.sync	( osd_enable_sys )
+);
+
+
+`ifdef SIMULATION
+initial begin:clear_buffer
+    integer cnt;
+    for( cnt=0; cnt<2048; cnt=cnt+1 )
+        osd_buffer[cnt] = 8'hAA;
+end
+`endif
+
+// the OSD has its own SPI interface to the io controller
+always@(posedge SPI_SCK, posedge SPI_SS3) begin: io_ctrl
+
+	reg  [4:0] cnt;
+	reg [10:0] bcnt;
+	reg  [7:0] sbuf;
+	reg  [7:0] cmd;
+	if(SPI_SS3) begin
+		cnt  <= 0;
+		bcnt <= 0;
+	end else begin
+		sbuf <= {sbuf[6:0], SPI_DI};
+
+		// 0:7 is command, rest payload
+		if(cnt < 15) cnt <= cnt + 1'd1;
+			else cnt <= 8;
+
+		if(cnt == 7) begin
+			cmd <= {sbuf[6:0], SPI_DI};
+
+			// lower three command bits are line address
+			bcnt <= {sbuf[1:0], SPI_DI, 8'h00};
+
+			// command 0x40: OSDCMDENABLE, OSDCMDDISABLE
+			if(sbuf[6:3] == 4'b0100) osd_enable <= SPI_DI;
+		end
+
+		// command 0x20: OSDCMDWRITE
+		if((cmd[7:3] == 5'b00100) && (cnt == 15)) begin
+			osd_buffer[bcnt] <= {sbuf[6:0], SPI_DI};
+			bcnt <= bcnt + 1'd1;
+		end
+	end
+end
+
+// *********************************************************************************
+// video timing and sync polarity anaylsis
+// *********************************************************************************
+
+// horizontal counter
+reg  [9:0] h_cnt;
+reg  [9:0] hs_low, hs_high;
+reg        hs_pol;
+reg  [9:0] dsp_width;
+
+// vertical counter
+reg  [9:0] v_cnt;
+reg  [9:0] vs_low, vs_high;
+reg        vs_pol;
+reg  [9:0] dsp_height;
+
+reg        doublescan;
+
+
+reg ce_pix;
+always @(negedge clk_sys) begin: horizontal_counter
+	integer cnt;
+	integer pixsz, pixcnt;
+	reg hs;
+
+	cnt <= cnt + 1;
+	hs <= HSync;
+
+	pixcnt <= pixcnt + 1;
+	if(pixcnt == pixsz) pixcnt <= 0;
+	ce_pix <= pixcnt==0;
+
+	if(hs && ~HSync) begin
+		cnt    <= 0;
+		pixsz  <= (cnt >> 9) - 1;
+		pixcnt <= 0;
+		ce_pix <= 1;
+	end
+end
+
+always @(posedge clk_sys) begin
+	hs_pol     <= hs_high < hs_low;
+	dsp_width  <= hs_pol ? hs_low : hs_high;
+	vs_pol 	   <= vs_high < vs_low;
+	dsp_height <= vs_pol ? vs_low : vs_high;
+	doublescan <= dsp_height>350;
+end
+
+always @(posedge clk_sys) begin: sync
+	reg hsD, hsD2;
+	reg vsD, vsD2;
+
+	if(ce_pix) begin
+		// bring hsync into local clock domain
+		hsD <= HSync;
+		hsD2 <= hsD;
+
+		// falling edge of HSync
+		if(!hsD && hsD2) begin
+			h_cnt <= 0;
+			hs_high <= h_cnt;
+		end
+
+		// rising edge of HSync
+		else if(hsD && !hsD2) begin
+			h_cnt <= 0;
+			hs_low <= h_cnt;
+			v_cnt <= v_cnt + 1'd1;
+		end else begin
+			h_cnt <= h_cnt + 1'd1;
+		end
+
+		vsD <= VSync;
+		vsD2 <= vsD;
+
+		// falling edge of VSync
+		if(!vsD && vsD2) begin
+			v_cnt <= 0;
+			vs_high <= v_cnt;
+		end
+
+		// rising edge of VSync
+		else if(vsD && !vsD2) begin
+			v_cnt <= 0;
+			vs_low <= v_cnt;
+		end
+	end
+end
+
+// area in which OSD is being displayed
+reg [9:0] h_osd_start;
+reg [9:0] h_osd_end;
+reg [9:0] v_osd_start;
+reg [9:0] v_osd_end;
+
+always @(posedge clk_sys) begin
+	h_osd_start <= ((dsp_width - OSD_WIDTH)>> 1) + OSD_X_OFFSET;
+	h_osd_end   <= h_osd_start + OSD_WIDTH;
+	v_osd_start <= ((dsp_height- (OSD_HEIGHT<<doublescan))>> 1) + OSD_Y_OFFSET;
+	v_osd_end   <= v_osd_start + (OSD_HEIGHT<<doublescan);
+end
+
+wire [9:0] osd_hcnt    = h_cnt - h_osd_start;
+wire [9:0] osd_vcnt    = v_cnt - v_osd_start;
+wire [9:0] osd_hcnt_next  = osd_hcnt + 10'd1;  // one pixel offset for osd pixel
+wire [9:0] osd_hcnt_next2 = osd_hcnt + 10'd2;  // two pixel offset for osd byte address register
+reg        osd_de;
+
+reg [10:0] osd_buffer_addr;
+wire [7:0] osd_byte = osd_buffer[osd_buffer_addr];
+reg        osd_pixel;
+
+`ifdef SIMULATION
+`ifndef JTFRAME_OSD_NOLOGO
+// Disable OSD background for simulation
+`define JTFRAME_OSD_NOLOGO
+`endif
+`endif
+
+`ifndef JTFRAME_OSD_NOLOGO
+reg  [7:0] back_buffer[8*256];
+wire [7:0] back_byte = back_buffer[osd_buffer_addr];
+reg        back_pixel;
+`else
+wire	   back_pixel = 1'b1;
+`endif
+
+always @(posedge clk_sys) begin
+	if (ce_pix) begin
+		osd_buffer_addr <= rotate[0] ? {rotate[1] ? ~osd_hcnt_next2[7:5] : osd_hcnt_next2[7:5],
+		                   rotate[1] ? (doublescan ?  osd_vcnt[7:0] :  {osd_vcnt[6:0], 1'b0}) :
+		                               (doublescan ? ~osd_vcnt[7:0] : ~{osd_vcnt[6:0], 1'b0})} :
+		                   // no rotation
+		                               {doublescan ? osd_vcnt[7:5] : osd_vcnt[6:4], osd_hcnt_next2[7:0]};
+
+		osd_pixel <= rotate[0]  ? osd_byte[rotate[1] ? ~osd_hcnt_next[4:2] : osd_hcnt_next[4:2]] :
+		                          osd_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+		`ifndef JTFRAME_OSD_NOLOGO
+		back_pixel <= rotate[0]  ?
+                              back_byte[rotate[1] ? ~osd_hcnt_next[4:2] : osd_hcnt_next[4:2]] :
+                              // no rotation:
+                              back_byte[doublescan ? osd_vcnt[4:2] : osd_vcnt[3:1]];
+		`endif
+
+		`ifdef SIMULATE_OSD
+		osd_de <=
+		`else
+		osd_de <= osd_enable_sys &&
+		`endif
+			(HSync != hs_pol) && ((h_cnt + 1'd1) >= h_osd_start) && ((h_cnt + 1'd1) < h_osd_end) &&
+			(VSync != vs_pol) && (v_cnt >= v_osd_start) && (v_cnt < v_osd_end);
+
+	end
+
+	R_out <= !osd_de ? R_in : { {2{osd_pixel}}, OSD_COLOR[5:4]^{1'b0,back_pixel}, R_in[OSD_DW-1:4]};
+	G_out <= !osd_de ? G_in : { {2{osd_pixel}}, OSD_COLOR[3:2]^{1'b0,back_pixel}, G_in[OSD_DW-1:4]};
+	B_out <= !osd_de ? B_in : { {2{osd_pixel}}, OSD_COLOR[1:0]^{1'b0,back_pixel}, B_in[OSD_DW-1:4]};
+	HSync_out <= HSync;
+	VSync_out <= VSync;
+	DE_out <= DE;
+end
+
+`ifndef JTFRAME_OSD_NOLOGO
+initial begin
+back_buffer = '{ 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
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+8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF,
+8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'h7F, 8'h7F, 8'h3F,
+8'h3F, 8'h1F, 8'h1F, 8'h0F, 8'h0F, 8'h07, 8'h03, 8'h03, 8'h01, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'hC0, 8'hF0, 8'hFC, 8'hFF, 8'hFF,
+8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF,
+8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF, 8'hFF,
+8'hFF, 8'h7F, 8'h1F, 8'h0F, 8'h03, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h01, 8'h01, 8'h03, 8'h03, 8'h03, 8'h07, 8'h07, 8'h07, 8'h0F, 8'h0F, 8'h0F, 8'h0F,
+8'h0F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F,
+8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F,
+8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h0F, 8'h0F, 8'h0F, 8'h0F, 8'h0F, 8'h0F,
+8'h07, 8'h07, 8'h07, 8'h07, 8'h03, 8'h03, 8'h03, 8'h01, 8'h01, 8'h01, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h01, 8'h01, 8'h01, 8'h01, 8'h01, 8'h07,
+8'h07, 8'h07, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F,
+8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h1F, 8'h07,
+8'h01, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00,
+8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00, 8'h00 };
+end
+`endif
+endmodule

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6000/jtframe_pll6000.ppf

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone III" variation_name="jtframe_pll6000" megafunction_name="ALTPLL" specifies="all_ports">
+<global>
+<pin name="inclk0" direction="input" scope="external" source="clock"  />
+<pin name="c0" direction="output" scope="external" source="clock"  />
+<pin name="locked" direction="output" scope="external"  />
+
+</global>
+</pinplan>

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6000/jtframe_pll6000.qip

@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "13.1"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_pll6000.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "jtframe_pll6000_bb.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "jtframe_pll6000.ppf"]

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6000/jtframe_pll6000.v

@@ -0,0 +1,309 @@
+// megafunction wizard: %ALTPLL%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll 
+
+// ============================================================
+// File Name: jtframe_pll6000.v
+// Megafunction Name(s):
+// 			altpll
+//
+// Simulation Library Files(s):
+// 			altera_mf
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 13.1.0 Build 162 10/23/2013 SJ Web Edition
+// ************************************************************
+
+
+//Copyright (C) 1991-2013 Altera Corporation
+//Your use of Altera Corporation's design tools, logic functions 
+//and other software and tools, and its AMPP partner logic 
+//functions, and any output files from any of the foregoing 
+//(including device programming or simulation files), and any 
+//associated documentation or information are expressly subject 
+//to the terms and conditions of the Altera Program License 
+//Subscription Agreement, Altera MegaCore Function License 
+//Agreement, or other applicable license agreement, including, 
+//without limitation, that your use is for the sole purpose of 
+//programming logic devices manufactured by Altera and sold by 
+//Altera or its authorized distributors.  Please refer to the 
+//applicable agreement for further details.
+
+
+// synopsys translate_off
+`timescale 1 ps / 1 ps
+// synopsys translate_on
+module jtframe_pll6000 (
+	inclk0,
+	c0,
+	locked);
+
+	input	  inclk0;
+	output	  c0;
+	output	  locked;
+
+	wire [4:0] sub_wire0;
+	wire  sub_wire2;
+	wire [0:0] sub_wire5 = 1'h0;
+	wire [0:0] sub_wire1 = sub_wire0[0:0];
+	wire  c0 = sub_wire1;
+	wire  locked = sub_wire2;
+	wire  sub_wire3 = inclk0;
+	wire [1:0] sub_wire4 = {sub_wire5, sub_wire3};
+
+	altpll	altpll_component (
+				.inclk (sub_wire4),
+				.clk (sub_wire0),
+				.locked (sub_wire2),
+				.activeclock (),
+				.areset (1'b0),
+				.clkbad (),
+				.clkena ({6{1'b1}}),
+				.clkloss (),
+				.clkswitch (1'b0),
+				.configupdate (1'b0),
+				.enable0 (),
+				.enable1 (),
+				.extclk (),
+				.extclkena ({4{1'b1}}),
+				.fbin (1'b1),
+				.fbmimicbidir (),
+				.fbout (),
+				.fref (),
+				.icdrclk (),
+				.pfdena (1'b1),
+				.phasecounterselect ({4{1'b1}}),
+				.phasedone (),
+				.phasestep (1'b1),
+				.phaseupdown (1'b1),
+				.pllena (1'b1),
+				.scanaclr (1'b0),
+				.scanclk (1'b0),
+				.scanclkena (1'b1),
+				.scandata (1'b0),
+				.scandataout (),
+				.scandone (),
+				.scanread (1'b0),
+				.scanwrite (1'b0),
+				.sclkout0 (),
+				.sclkout1 (),
+				.vcooverrange (),
+				.vcounderrange ());
+	defparam
+		altpll_component.bandwidth_type = "AUTO",
+		altpll_component.clk0_divide_by = 9,
+		altpll_component.clk0_duty_cycle = 50,
+		altpll_component.clk0_multiply_by = 16,
+		altpll_component.clk0_phase_shift = "0",
+		altpll_component.compensate_clock = "CLK0",
+		altpll_component.inclk0_input_frequency = 37037,
+		altpll_component.intended_device_family = "Cyclone III",
+		altpll_component.lpm_hint = "CBX_MODULE_PREFIX=jtframe_pll6000",
+		altpll_component.lpm_type = "altpll",
+		altpll_component.operation_mode = "NORMAL",
+		altpll_component.pll_type = "AUTO",
+		altpll_component.port_activeclock = "PORT_UNUSED",
+		altpll_component.port_areset = "PORT_UNUSED",
+		altpll_component.port_clkbad0 = "PORT_UNUSED",
+		altpll_component.port_clkbad1 = "PORT_UNUSED",
+		altpll_component.port_clkloss = "PORT_UNUSED",
+		altpll_component.port_clkswitch = "PORT_UNUSED",
+		altpll_component.port_configupdate = "PORT_UNUSED",
+		altpll_component.port_fbin = "PORT_UNUSED",
+		altpll_component.port_inclk0 = "PORT_USED",
+		altpll_component.port_inclk1 = "PORT_UNUSED",
+		altpll_component.port_locked = "PORT_USED",
+		altpll_component.port_pfdena = "PORT_UNUSED",
+		altpll_component.port_phasecounterselect = "PORT_UNUSED",
+		altpll_component.port_phasedone = "PORT_UNUSED",
+		altpll_component.port_phasestep = "PORT_UNUSED",
+		altpll_component.port_phaseupdown = "PORT_UNUSED",
+		altpll_component.port_pllena = "PORT_UNUSED",
+		altpll_component.port_scanaclr = "PORT_UNUSED",
+		altpll_component.port_scanclk = "PORT_UNUSED",
+		altpll_component.port_scanclkena = "PORT_UNUSED",
+		altpll_component.port_scandata = "PORT_UNUSED",
+		altpll_component.port_scandataout = "PORT_UNUSED",
+		altpll_component.port_scandone = "PORT_UNUSED",
+		altpll_component.port_scanread = "PORT_UNUSED",
+		altpll_component.port_scanwrite = "PORT_UNUSED",
+		altpll_component.port_clk0 = "PORT_USED",
+		altpll_component.port_clk1 = "PORT_UNUSED",
+		altpll_component.port_clk2 = "PORT_UNUSED",
+		altpll_component.port_clk3 = "PORT_UNUSED",
+		altpll_component.port_clk4 = "PORT_UNUSED",
+		altpll_component.port_clk5 = "PORT_UNUSED",
+		altpll_component.port_clkena0 = "PORT_UNUSED",
+		altpll_component.port_clkena1 = "PORT_UNUSED",
+		altpll_component.port_clkena2 = "PORT_UNUSED",
+		altpll_component.port_clkena3 = "PORT_UNUSED",
+		altpll_component.port_clkena4 = "PORT_UNUSED",
+		altpll_component.port_clkena5 = "PORT_UNUSED",
+		altpll_component.port_extclk0 = "PORT_UNUSED",
+		altpll_component.port_extclk1 = "PORT_UNUSED",
+		altpll_component.port_extclk2 = "PORT_UNUSED",
+		altpll_component.port_extclk3 = "PORT_UNUSED",
+		altpll_component.self_reset_on_loss_lock = "ON",
+		altpll_component.width_clock = 5;
+
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "jtframe_pll6000.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "1"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "9"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "16"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "ON"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.bsf FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000_bb.v TRUE
+// Retrieval info: LIB_FILE: altera_mf
+// Retrieval info: CBX_MODULE_PREFIX: ON

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6000/jtframe_pll6000_bb.v

@@ -0,0 +1,199 @@
+// megafunction wizard: %ALTPLL%VBB%
+// GENERATION: STANDARD
+// VERSION: WM1.0
+// MODULE: altpll 
+
+// ============================================================
+// File Name: jtframe_pll6000.v
+// Megafunction Name(s):
+// 			altpll
+//
+// Simulation Library Files(s):
+// 			altera_mf
+// ============================================================
+// ************************************************************
+// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
+//
+// 13.1.0 Build 162 10/23/2013 SJ Web Edition
+// ************************************************************
+
+//Copyright (C) 1991-2013 Altera Corporation
+//Your use of Altera Corporation's design tools, logic functions 
+//and other software and tools, and its AMPP partner logic 
+//functions, and any output files from any of the foregoing 
+//(including device programming or simulation files), and any 
+//associated documentation or information are expressly subject 
+//to the terms and conditions of the Altera Program License 
+//Subscription Agreement, Altera MegaCore Function License 
+//Agreement, or other applicable license agreement, including, 
+//without limitation, that your use is for the sole purpose of 
+//programming logic devices manufactured by Altera and sold by 
+//Altera or its authorized distributors.  Please refer to the 
+//applicable agreement for further details.
+
+module jtframe_pll6000 (
+	inclk0,
+	c0,
+	locked);
+
+	input	  inclk0;
+	output	  c0;
+	output	  locked;
+
+endmodule
+
+// ============================================================
+// CNX file retrieval info
+// ============================================================
+// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
+// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
+// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
+// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
+// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
+// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
+// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
+// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
+// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
+// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
+// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
+// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
+// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
+// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
+// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.000000"
+// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
+// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
+// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
+// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
+// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "27.000"
+// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
+// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
+// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
+// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
+// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
+// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
+// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
+// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
+// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
+// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.00000000"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
+// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
+// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
+// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
+// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
+// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
+// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
+// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
+// Retrieval info: PRIVATE: RECONFIG_FILE STRING "jtframe_pll6000.mif"
+// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
+// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "1"
+// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
+// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
+// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
+// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
+// Retrieval info: PRIVATE: SPREAD_USE STRING "0"
+// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
+// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
+// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
+// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
+// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
+// Retrieval info: PRIVATE: USE_CLK0 STRING "1"
+// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
+// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
+// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
+// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
+// Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "9"
+// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
+// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "16"
+// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
+// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
+// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037"
+// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
+// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
+// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
+// Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
+// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
+// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
+// Retrieval info: CONSTANT: SELF_RESET_ON_LOSS_LOCK STRING "ON"
+// Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
+// Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
+// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
+// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
+// Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
+// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
+// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
+// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
+// Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.v TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.ppf TRUE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.inc FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.cmp FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000.bsf FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000_inst.v FALSE
+// Retrieval info: GEN_FILE: TYPE_NORMAL jtframe_pll6000_bb.v TRUE
+// Retrieval info: LIB_FILE: altera_mf
+// Retrieval info: CBX_MODULE_PREFIX: ON

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6144/jtframe_pll6144.ppf

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<!DOCTYPE pinplan>
+<pinplan intended_family="Cyclone III" variation_name="jtframe_pll6144" megafunction_name="ALTPLL" specifies="all_ports">
+<global>
+<pin name="inclk0" direction="input" scope="external" source="clock"  />
+<pin name="c0" direction="output" scope="external" source="clock"  />
+<pin name="locked" direction="output" scope="external"  />
+
+</global>
+</pinplan>

snapshots/jotego_jtcores_pr1270/modules/jtframe/target/mist/hdl/pll6144/jtframe_pll6144.qip

@@ -0,0 +1,5 @@
+set_global_assignment -name IP_TOOL_NAME "ALTPLL"
+set_global_assignment -name IP_TOOL_VERSION "13.1"
+set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "jtframe_pll6144.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "jtframe_pll6144_bb.v"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "jtframe_pll6144.ppf"]