Download Amr-HAlahla_Multi-Cycle-RISC-Processor-In-Verilog/waveform_map.json from architect-ubc-capstone/rtl-augmented-v3: direct link, hf CLI and curl.
- Browser
- Download file 576 Bytes
-
https://huggingface.co/datasets/architect-ubc-capstone/rtl-augmented-v3/resolve/main/Amr-HAlahla_Multi-Cycle-RISC-Processor-In-Verilog/waveform_map.json
- Command line
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hf download hf://datasets/architect-ubc-capstone/rtl-augmented-v3/Amr-HAlahla_Multi-Cycle-RISC-Processor-In-Verilog/waveform_map.json
-
curl -L -o waveform_map.json https://huggingface.co/datasets/architect-ubc-capstone/rtl-augmented-v3/resolve/main/Amr-HAlahla_Multi-Cycle-RISC-Processor-In-Verilog/waveform_map.json
576 Bytes
| { | |
| "Source Code/ALU/alu_tb.v": "wave_alu.fst", | |
| "Source Code/ControlUnits/main_control_tb.v": "wave_control_unit.fst", | |
| "Source Code/ControlUnits/pc_control_tb.v": "wave_pc_control.fst", | |
| "Source Code/ControlUnits/stack_control_tb.v": "wave_stack_control.fst", | |
| "Source Code/extenders/immediate_extender_tb.v": "wave_immediate_extender.fst", | |
| "Source Code/instruction_memory/instruction_memory_tb.v": "wave_instruction_memory.fst", | |
| "Source Code/registers/register_file_tb.v": "wave_register_file.fst", | |
| "Source Code/stack/stack_memory_tb.v": "wave_stack_memory.fst" | |
| } |