Chip_Design / vortex /README.md
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AURA-1 chip design archive: docs, blog, research folders, tiny-gpu work, GDS viewer
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# Vortex open-source GPU — downloaded repos
Shallow clones (latest snapshot, no history) from https://github.com/orgs/vortexgpgpu/repositories, 2026-08-10.
Vortex is Georgia Tech's RISC-V-based open-source GPGPU — full RTL, testbenches,
compiler, and drivers all public. v3.0 (June 2026) added a 3D graphics pipeline,
Vulkan driver, tensor cores, and ASIC synthesis flows.
| Repo | Size | What it is |
|---|---|---|
| `vortex/` | 333M | **The main repo — RTL is in `vortex/hw/rtl/` (SystemVerilog).** Runtime (`runtime/`), simulator drivers (`sim/`), docs (`docs/`), tests. Cloned with submodules |
| `vortex_tutorials/` | 462M | MICRO/ISCA tutorial slides and hands-on exercises — best learning path |
| `skybox/` | 271M | Vortex Graphics research (Skybox) — the 3D pipeline work that fed v3.0 |
| `Volt/` | 792K | VOLT — their open GPU compiler project |
| `pocl/` | 56M | POCL fork — OpenCL runtime with Vortex device support |
Skipped (build dependencies, multi-GB — clone only if building the full stack):
`llvm` (2.3GB compiler fork), `vortex-toolchain-prebuilt` (17.6GB binaries),
`mesa` (440M Vulkan driver fork), HIP-path forks (`chipStar`, `HIPCC`,
`ROCm-Device-Libs`), `NVPTX-SPIRV-Translator`.
## Where to start reading RTL
- `vortex/hw/rtl/VX_define.vh` — architecture parameters
- `vortex/hw/rtl/core/` — the SIMT core: fetch, warp scheduler, execute units
- `vortex/hw/rtl/cache/` — cache subsystem
- `vortex/docs/` — microarchitecture documentation
- Compare with tiny-gpu: same concepts (warps, SIMT, memory coalescing), real scale.
To actually build/run: follow `vortex/README.md` (needs the llvm toolchain —
prebuilt binaries download during `./ci/install_dependencies.sh` setup).