question list | contexts list | answer list | ground_truths list |
|---|---|---|---|
[
"What is the reset value of the USBCTRL bit in the WDSEL register?",
"What happens when the buffer control register has not been written to in the device controller?",
"What is the implications of having the SNID and NSNID bits set to 1 while the SID and NSID bits are set to 0 on the overall tracing capability ... | [
[
"Table 929. DMA\r\nRegister\r\nBits Description Type Reset\r\n31:8 Reserved. - -\r\n7 DBG: If 1, DMA can be accessed by the debugger, at security/privilege levels\r\npermitted by SP/NSP/SU/NSU in this register.\r\nRW 0x1\r\n6 DMA: If 1, DMA can be accessed by the DMA, at security/privilege levels\r\npermitted... | [
"The reset value of the USBCTRL bit in the WDSEL register is 0x0.",
"The AVAILABLE bit in the buffer control register is set to 1 from the processor to give the controller ownership of the buffer. When the buffer control register has not been written to in the device controller, the AVAILABLE bit is set to 0.",
... | [
"0x0",
"The device controller responds with a NAK",
"The trace unit will be able to support both secure and non-secure non-invasive debug operations, but will be unable to perform invasive debug operations, resulting in a moderate level of tracing capability.",
"To detect and correct errors in data transmissi... |
No dataset card yet
- Downloads last month
- 16