reports/optimization-r3/METHOD.md

M5 Pro optimization round 3

This campaign applies tmp/mlx-skills/SKILL.md to MiniMax-H3-Image. The contract is frozen in optimization/round-03/contract.json. The objective is latency, with zero additional decoded-pixel error and zero nonfinite states. Saved trajectory payloads are checked independently of PNG conversion. The production source is snapshotted before inference under outputs/optimization-r3-deployment/source/.

The independent precision foundation remains the inspected official implementation and ATen primitive checks in provenance/sources.json and tests/test_numerics.py. This round establishes incremental identity to the existing MLX BF16 recipe. It does not establish CUDA byte identity or recover unpublished FP32 weights. The earlier same-latent BF16/FP32 decoder and cross-backend CUDA comparison galleries remain separate references.

Workload and scope

• Hardware: local Apple M5 Pro, 16 GPU cores, 64 GiB unified memory, macOS 27.0.1, MLX/MLX Metal 0.32.4.
• AC Automatic power. User applications remain running. No system power, swap, or background-process settings are changed.
• Timing cases: 2048-square product and portrait, three warm repeats each, with control/candidate order AB, BA, AB. Both configurations receive one complete warmup per timing shape. Loading and first-image results are retained separately.
• Quality cases: the same product and portrait, a detail-heavy prompt/seed fixed before search, and a 1024 reference-image edit on the original 2048 generation canvas. The detail case and edit are not used to select operator parameters. They are validation cases rather than a broad perceptual-quality dataset.
• Timing boundary: Pipeline.generate total time, including original CPU Torch RNG, conditioning-cache checks, all six original heads, native decode, trace and PNG save. Interpreter startup and external image scoring are excluded.
• Physical memory: parent-process macOS ri_phys_footprint, sampled every 100 ms over each generation. Includes Metal, excludes compiler XPC services; short peaks may be missed. The kernel's lifetime high-water counter is also retained but includes earlier requests. The ctypes ABI was verified against a compiled SDK sizeof/offsetof probe.
• MLX active/peak/cache counters are reported independently. They overlap physical footprint and must not be added. Both compiled variants can remain resident in the paired process, sharing the same native weights.

Search sequence

1. Actual first-block activations, including FC2 values above 4,000, rather than small normally distributed test inputs.
2. Six attention copy/layout settings; 60 Metal 4 FC1/FC2 tiles; 12 lossless unpack settings (two real projection weights); native-order Q/K producers; complete compiled blocks.
3. Three RMSNorm/AdaLN threadgroup layouts. Only the 1,024-thread native loop/reduction layout matched the actual BF16 operator exactly.
4. Eight dual-accumulator FC1/SwiGLU epilogues, then four larger FC2 K-panel settings. Combined with step 2, this is 72 distinct matrix settings. Compiler/harness failures are archived separately and are not successful operator trials.
5. Real 6,213-token edit and 16,478-token 4K FC2 activations. An additional 8,192-row boundary probe repeats actual edit activations and is explicitly an operator test, not a new complete-image validation.
6. Complete research outputs and then a separate production-entry-point campaign. No timing is pooled across those campaigns or with v2.

All selected work preserves the original weight bits, six sigma intervals, RNG, attention semantics and BF16/FP32 boundaries. Unsupported devices, MLX versions and shapes retain native execution. Q4/Q8, fewer heads, differing reductions and Core ML FP16 exports do not meet the exact campaign's quality contract.

Other backends

The earlier reports/optimization-v2/RESULTS.md contains actual complete VAE ML Packages on CPU_ONLY, CPU_AND_GPU, CPU_AND_NE and ALL, plus Torch CPU/MPS and direct Metal/MPSMatrix probes. Those are historical evidence, not retimings in this campaign. The Core ML work is a complete 24-block VAE export, not a 33B Core ML denoiser. GPU/ALL did not establish a generation-throughput advantage, and ANE showed real-image accuracy failures. No new full-denoiser ANE export or universal backend limit is claimed here.

The skill's historical source artifacts were unavailable at their registered workspace paths; the audit is retained as skill-source-audit.json. Its workflows and hypotheses were applied, but its previous project numbers were not used as current controls. New source-derived reductions were checked against the installed runtime and complete model outputs.

Compact campaign

A separate frozen contract in optimization/round-03-compact compares the previous packed12 champion (native kernels, wired 32 GiB) with the same storage plus exact QK/FC2 tuning. It uses the identical four cases and three paired timing repeats. Its timings are not pooled with the dense campaigns. All underlying BF16 weight bits and output tensors remain unchanged.