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Circuit atlas networks (+ integer-matvec)
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license: cc-by-4.0
tags:
  - mechanistic-interpretability
  - circuits
  - arithmetic
  - matrix-vector-product
  - scratchpad

integer-matvec

Atlas entry: entries/integer-matvec.md in https://github.com/jc1122/mechanistic-interpretability-circuit-atlas (mechanism, setup, limits). Task: y = Mv for a 3x3 integer matrix and vector with entries 0..7, each y_i as nine LSB-first bits. Format A emits the answers only; format T writes the row accumulator after every shifted partial product (scratchpad). Score: teacher-forced whole-output exact on each seed's disjoint 2,000-input test set. Model: GPT-NeoX, 5 layers, 4 heads x 32, d_model 128, ReLU MLP 640, no LayerNorm, no positional encoding, vocab 15 (config.json -> hf_config). Files: hand_{A,T} (hand-built HAND-a for A, HAND-b for T); train_<fmt>_<round>_{best,final}_s<seed> (rung TRAIN, full nets): T screening r1 s0-2, A retry r3 s0-2, T final run s0-9. PART research nets are not included. Per net: format, round, snapshot, seed, step, circuit type, recorded_test, acc_test_fp32 (fp32 re-score), sha256: manifest.json.

34 networks (2 HAND, 32 TRAIN). No pickles. License CC BY 4.0.