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CodeV-SVA-VL: Automated Hardware Assertion Generation from Natural Language Specifications and Waveform Diagrams

   

Introduction

We introduce CodeV-SVA-VL, a family of vision language models designed to translate natural-language verification properties and waveform diagrams into SystemVerilog Assertions (SVAs).

Open-Source Plan:

  • Benchmark ✓
  • Model ✓
  • Evaluation code ✓
  • Paper
  • Dataset ✓
  • Data synthesis and training code

Evaluation Results

Model Wave2SVA
Func.@1 Func.@16 Func.@32
Qwen3.6-Plus 53.8 89.4 94.0
GPT-5.4 53.9 77.4 84.0
GLM-5V 50.9 82.8 88.0
Kimi-K2.7-Code-1T-A32B 49.6 86.4 90.0
GLM-4.6V-106B-A12B 26.1 66.3 76.0
Qwen3.5-8B 16.5 65.2 70.0
Qwen3.5-27B 25.4 68.3 74.0
CodeV-SVA-VL-9B 51.9 79.4 82.0
CodeV-SVA-VL-27B 54.9 85.5 92.0

Models

Model Download
CodeV-SVA-VL-9B 🤗HuggingFace
CodeV-SVA-VL-27B 🤗HuggingFace

Citation

@misc{wu2026qimengcodevsvatrainingspecializedllms,
      title={QiMeng-CodeV-SVA: Training Specialized LLMs for Hardware Assertion Generation via RTL-Grounded Bidirectional Data Synthesis}, 
      author={Yutong Wu and Chenrui Cao and Pengwei Jin and Di Huang and Rui Zhang and Xishan Zhang and Zidong Du and Qi Guo and Xing Hu},
      year={2026},
      eprint={2603.14239},
      archivePrefix={arXiv},
      primaryClass={cs.CL},
      url={https://arxiv.org/abs/2603.14239}, 
}
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