repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -7,8 +7,152 @@
#include <iostream>
#include <string>
#include <vector>
+#include <regex>
+#include <algorithm>
#include "sycl_functions.h"
+#include "json.hpp"
+
+using json = nlohmann::json;
+using ordered_json = nlohmann::ordered_json;
+
+// Structure that contains Triton kernel arguments
+struct argsDict {
... | suggestion: move this to a static struct method, or we could make this the struct constructor |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -208,10 +336,9 @@ static void sycl_kernel_launch(uint32_t gridX, uint32_t gridY, uint32_t gridZ,
// Submit the imported kernel.
auto cgf = [&](sycl::handler &cgh) {
- set_scalar_arg(cgh, 0, sizeof(void *), params[0]);
- set_scalar_arg(cgh, 1, sizeof(void *), params[1]);
- set_scalar_arg(cgh, 2, size... | I see that you cast params to `void*` in the calling function - but I thought the type here needed to match the kernel function signature? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')})
+ args_dict.update({'threads_per_warp': getattr(arg, 'threads_per_warp')})
+ args_dict.update({'shared_memory': getattr(arg, 'shared')})
+ args... | Let's move the torch import here, similar to code in the `XPUDriver` class below.
```
import torch
torch.save(...)
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')}) | Can we simplify this code?
e.g. `args_dict['num_warps'] = arg['num_warps']`
or do we need to use the `update` and `getattr` methods? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')})
+ args_dict.update({'threads_per_warp': getattr(arg, 'threads_per_warp')})
+ args_dict.update({'shared_memory': getattr(arg, 'shared')})
+ args... | Are we sure that the kernel name always matches the spirv file name? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')})
+ args_dict.update({'threads_per_warp': getattr(arg, 'threads_per_warp')})
+ args_dict.update({'shared_memory': getattr(arg, 'shared')})
+ args... | If we're going to use this counter variable then let's use it in this loop, too.
```
for arg in args[cnt:]:
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')})
+ args_dict.update({'threads_per_warp': getattr(arg, 'threads_per_warp')})
+ args_dict.update({'shared_memory': getattr(arg, 'shared')})
+ args... | Should be able to do `if type(arg) is KernelMetadata:` (same below for Tensor) |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +437,45 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict.update({'num_warps': getattr(arg, 'num_warps')})
+ args_dict.update({'threads_per_warp': getattr(arg, 'threads_per_warp')})
+ args_dict.update({'shared_memory': getattr(arg, 'shared')})
+ args... | Let's make the path part of the environment variable that controls this. Something like `TRITON_XPU_DUMP_KERNEL_ARGS='/path/to/dump/directory`. |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -449,6 +490,10 @@ def __init__(self, src, metadata):
def __call__(self, *args, **kwargs):
self.launch(*args, **kwargs)
+ # Serialize KernelArguments for SPIR-V Runner
+ debug_mode = os.getenv('TRITON_DEBUG') | See above - `TRITON_DEBUG` is for enabling asserts in Kernel code. Let's create a new environment variable controlling this specific behavior. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | Can you explain what is happening here? I don't think I understand the code - with this kind of complex branching and magic numbers a comment is helpful. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | Looking at driver.py in the Intel backend there are quite a few more types we need to handle:
https://github.com/intel/intel-xpu-backend-for-triton/blob/main/third_party/intel/backend/driver.py#L161
I don't think we can key this off the JSON type - we will likely have to examine the function signature and then map... |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -2,29 +2,22 @@
#include <sycl/sycl.hpp>
#include <torch/torch.h>
+#include <algorithm>
#include <fstream>
#include <ios>
#include <iostream>
+#include <regex>
#include <string>
#include <vector>
#include "sycl_functions.h"
+#include <nlohmann/json.hpp>
-// Create an exception handler for asynchronous S... | NIT inconsistent function name convention. other functions use snake case i.e. `read_file_as_bytes`. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -286,26 +362,23 @@ int main() {
initContext(&q);
initDevices(&q);
- auto a = load_tensor("x.pt");
- auto b = load_tensor("y.pt");
- std::cout << "Tensor a: " << a.sizes() << ", " << a.scalar_type() << " ("
- << a.nbytes() << " bytes)" << std::endl;
- std::cout << "Tensor b: " << b.sizes() << "... | maybe just call `readFileAsBytes` directly? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | ```suggestion
#ifndef NDEBUG
```
I think `_DEBUG` is MSVC specific and `NDEBUG` is more widely supported. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | avoid the use of `std::endl` since it unnecessary flushes the buffer. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | ```suggestion
return static_cast<void *>(t.data_ptr());
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -36,35 +29,98 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = readFileAsBytes(filename);
return torch::pickle_load(by... | I would guess that you don't actually want a default value for all of these? you could use `.at` instead so an exception is thrown if the key isn't found. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -36,35 +29,98 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = readFileAsBytes(filename);
return torch::pickle_load(by... | ```suggestion
#ifndef NDEBUG
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | is this function needed at all? maybe just call `set_arg` directly? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | ```suggestion
stream.submit(cgf);
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | FMarno | @@ -160,124 +216,144 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | earlier you have
https://github.com/intel/intel-xpu-backend-for-triton/blob/e85125b1ab6f49a896bc2f5c79e2a0475008f741/utils/SPIRVRunner/SPIRVRunner.cpp#L245-L247
doesn't that mean that the assert will always fail if shared_memory is used?
Try to fail faster if that is intentional |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +435,64 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_name'] =... | I don't understand why we are still using the update member here - assignment operator `[]` should be fine. |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +435,64 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict): | rename: `serialize_kernel_metadata`. |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -446,9 +504,16 @@ def __init__(self, src, metadata):
src = make_launcher(constants, signature, ids)
mod = compile_module_from_src(src, "__triton_launcher")
self.launch = mod.launch
+ debug_mode = os.getenv('TRITON_SPIRV_RUNNER_ARGS') | ```suggestion
serialize_args = os.getenv("TRITON_SPIRV_RUNNER_ARGS", "0") == "1"
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -446,9 +504,16 @@ def __init__(self, src, metadata):
src = make_launcher(constants, signature, ids)
mod = compile_module_from_src(src, "__triton_launcher")
self.launch = mod.launch
+ debug_mode = os.getenv('TRITON_SPIRV_RUNNER_ARGS')
+ if debug_mode:
+ serialize_si... | SAA |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +435,64 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_name'] =... | Is this another new parameter? If so, why do we need it in addition to the SPIRV_RUNNER_ARGS param? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -22,35 +29,95 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = read_file_as_bytes(filename);
return torch::pickle_load... | Why not store the tensors in their own array in the JSON, so this regex is not necessary? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,6 +435,64 @@ def format_of(ty):
return src
+def kernel_meta_extractor(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_name'] =... | The signature and the args data need to be part of the same file. I think that would also simplify the type checking in the args code above. |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | victor-eds | @@ -236,6 +236,15 @@ def filter_traceback(e: BaseException):
e.__traceback__ = frames[0]
+def triton_spirv_dump(data, file_name, ext):
+ spv_path = os.getenv("TRITON_XPU_DUMP_SPIRV_KERNEL_ARGS")
+ if not os.path.exists(spv_path):
+ os.makedirs(spv_path) | ```suggestion
os.makedirs(spv_path, exist_ok=True)
```
Equivalent, right? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | victor-eds | @@ -236,6 +236,15 @@ def filter_traceback(e: BaseException):
e.__traceback__ = frames[0]
+def triton_spirv_dump(data, file_name, ext):
+ spv_path = os.getenv("TRITON_XPU_DUMP_SPIRV_KERNEL_ARGS")
+ if not os.path.exists(spv_path):
+ os.makedirs(spv_path)
+ spv_name = f"{spv_path}/{file_name}... | ```suggestion
spv_name = os.path.join(spv_path, f"{file_name}.{ext}")
```
`os.path.join` is better |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | victor-eds | @@ -236,6 +236,15 @@ def filter_traceback(e: BaseException):
e.__traceback__ = frames[0]
+def triton_spirv_dump(data, file_name, ext): | ```suggestion
def triton_spirv_dump(data, file_name):
ext = "spv"
```
Isn't it always `"spv"`? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | victor-eds | @@ -435,20 +435,79 @@ def format_of(ty):
return src
+def serialize_kernel_metadata(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_nam... | Why not using `isinstance` in these two `if` statements too? |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,20 +435,79 @@ def format_of(ty):
return src
+def serialize_kernel_metadata(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_nam... | should be before launch in case launch fails |
intel-xpu-backend-for-triton | github_2023 | python | 2,258 | intel | alexbaden | @@ -435,20 +435,120 @@ def format_of(ty):
return src
+def serialize_kernel_metadata(arg, args_dict):
+ args_dict['num_warps'] = arg.num_warps
+ args_dict['threads_per_warp'] = arg.threads_per_warp
+ args_dict['shared_memory'] = arg.shared
+ args_dict['kernel_name'] = arg.name
+ args_dict['spv_na... | This assumes that the user wants to run a SPIR-V file that is not already present in the cache when the kernel is executed. I don't think this will always be the case.
Please remove this code and the copy_spv_binary code to a second PR, I want to discuss the design of this functionality and we should not hold up th... |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -22,35 +30,76 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = read_file_as_bytes(filename);
return torch::pickle_load... | I think it looks weird to not have `{}` around the else, even if it is just one line. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -22,35 +30,76 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = read_file_as_bytes(filename);
return torch::pickle_load... | Why is it necessary to take the output tensor name here? How do we handle multiple outputs? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -22,35 +30,76 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = read_file_as_bytes(filename);
return torch::pickle_load... | I think it is preferable to specify the `args_data.json` file path explicitly rather than read it from the env variable. Remember, users of this program may not have a local Triton installation and would have no need to set the env variable (e.g. IGC team debugging an issue). |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -22,35 +30,77 @@ auto load_tensor(const std::string &filename) {
std::vector<char> bytes(fileSize);
ins.seekg(0, std::ios::beg);
ins.read(bytes.data(), fileSize);
+ return bytes;
+}
+auto load_tensor(const std::string &filename) {
+ auto bytes = read_file_as_bytes(filename);
return torch::pickle_load... | Note: this should not be necessary, `ifstream` supports `RAII`. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,258 | intel | alexbaden | @@ -146,151 +196,221 @@ size_t initDevices(sycl::queue *sycl_queue) {
return deviceCount;
}
-static void set_scalar_arg(sycl::handler &cgh, int index, size_t size,
- const void *value) {
- switch (size) {
- case sizeof(uint8_t):
- cgh.set_arg(index, *static_cast<const uint8_t *>(val... | I think the first followup should be to put this logic into the `KernelArguments` struct, so the launcher can iterate through arguments generically (either using an API that moves all this logic into `KernelArguments`, or preferably by parsing the JSON into structured objects in `KernelArguments`). There should only be... |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,367 | intel | anmyachev | @@ -147,6 +148,75 @@ void flash_attn(const at::Tensor &q, const at::Tensor &k, const at::Tensor &v,
return;
}
+#define CALL_IMPL_ATTENTION_BWD_FUNC(P) \
+ fmha::xetla_fmha_backward_kernel<P, T, kUseBias, kIsCausal, kIsDropout>( \
+ queue, grad_out.data_ptr(), q.dat... | ```suggestion
RECORD_FUNCTION("xetla fa", {});
``` |
intel-xpu-backend-for-triton | github_2023 | others | 2,367 | intel | ZzEeKkAa | @@ -2,7 +2,10 @@
find_package(XeTLALibrary REQUIRED)
set(CMAKE_CXX_STANDARD 20)
-set(XETLA_KERNEL_FLAGS ${XETLA_KERNEL_FLAGS} -fsycl)
+set(XETLA_KERNEL_FLAGS ${XETLA_KERNEL_FLAGS}
+ -fsycl
+ -fsycl-device-code-split=per_kernel | What does it change? |
intel-xpu-backend-for-triton | github_2023 | others | 2,445 | intel | anmyachev | @@ -162,21 +162,23 @@ jobs:
if: ${{ steps.install.outcome == 'success' && !cancelled() }}
run: |
cd benchmarks/triton_kernels_benchmark
- TRANSPOSE_B=1 python gemm_benchmark.py --reports $REPORTS
+ BENCHMARKING_METHOD="ELAPSED_TIME" TRANSPOSE_B=1 python gemm_benchmark.py -... | This will also change the default measurement method even if IPEX is set for xetla and triton. |
intel-xpu-backend-for-triton | github_2023 | python | 2,445 | intel | anmyachev | @@ -4,10 +4,8 @@
from typing import Any, Dict, List
USE_IPEX_OPTION = os.getenv("USE_IPEX", "1") == "1"
-if USE_IPEX_OPTION:
- BENCHMARKING_METHOD = "PYTORCH_LEGACY_PROFILER_USING_IPEX"
-else:
- BENCHMARKING_METHOD = os.getenv("BENCHMARKING_METHOD", "UPSTREAM_PYTORCH_PROFILER")
+BENCHMARKING_METHOD = os.geten... | Please revert this |
intel-xpu-backend-for-triton | github_2023 | python | 2,445 | intel | anmyachev | @@ -277,8 +279,11 @@ def benchmark(B, M, N, K, provider):
torch_b = torch.transpose(torch_b, -2, -1)
if provider == 'onednn':
- _, min_ms, max_ms, mean_ms, cv = benchmark_suit.do_bench(lambda: torch.matmul(torch_a, torch_b), warmup=10,
- ... | ```suggestion
# Legacy profiler shows ~6000TFLOPS GeoMean for onednn measurements
# which looks suspicious
do_bench = do_bench_elapsed_time
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,443 | intel | chengjunlu | @@ -4261,6 +4261,11 @@ def kernel():
def test_trans_reshape(device):
+ if is_xpu(): | Why have to skip this test case>? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,443 | intel | whitneywhtsang | @@ -91,10 +99,26 @@ struct TritonIntelGPUMaterializeBlockPointerPass
128 / tensorType.getElementTypeBitWidth()))
return;
+ const bool isRowMajor = fastChangeDim == rank - 1;
+ if (dotLayout) {
+ // Check if the load is being used in a dot layout, and i... | I feel hesitant on whether to have the two limitations here in MaterializeBlockPointer pass or RewriteTensorPointer pass, as one thought is MaterializeBlockPointer suppose to just annotate with the information, and how it is used depends on the users. |
intel-xpu-backend-for-triton | github_2023 | others | 2,453 | intel | whitneywhtsang | @@ -1,4 +1,5 @@
add_mlir_library(TritonTestAnalysis
+ intel/TestAxisInfo.cpp | can we add it to `third_party/intel/unittest`? |
intel-xpu-backend-for-triton | github_2023 | others | 2,450 | intel | etiotto | @@ -195,7 +195,7 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 16 : i32, triton_intel_gpu.min_sg_size = 16 : i32, triton_intel_gpu.support_dpas, triton_intel_gpu.s... | The function name changed, wondering why |
intel-xpu-backend-for-triton | github_2023 | others | 2,450 | intel | etiotto | @@ -214,7 +214,9 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
tt.func public @broadcast_range() -> tensor<16x16xi32> {
// CHECK: [[LAST_CONST:%.*]] = llvm.mlir.constant(15 : i32) : i32
// CHECK: [[RANGE:%.*]] = llvm.insertelement [[LAST_CONST]], {{%.*}}[[[LAST_CONST]]... | Kind of silly to generate these 2 operations. Probably a side effect of using the new lowering scheme, this is not avoidable correct ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | chengjunlu | @@ -40,6 +40,7 @@ constexpr int kPtrBitWidth = 64;
static std::pair<SmallVector<unsigned>, SmallVector<unsigned>>
getCvtOrder(Attribute srcLayout, Attribute dstLayout) {
+ // FIXME: Cannot get DPAS layout here. | Please create an issue to track this FIXME.
Maybe we can change it to `MmaTraits` to be general. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | chengjunlu | @@ -252,6 +252,14 @@ bool hasConvertToMMATransisitiveUse(Operation *op, Attribute encoding) {
}
}
}
+
+ // HACK: we want to propagate mma layout to the atomic rmw op | We may need a cost module to estimate the cost of Atomic ops with the MMA layout.
And compare it with the cost of `ConvertLayout` + `AtomicRMW`.
We can add the comments about what we should investigate. |
intel-xpu-backend-for-triton | github_2023 | others | 2,312 | intel | whitneywhtsang | @@ -2297,3 +2297,185 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
tt.return %3 : tensor<128x256xf32, #blocked>
}
}
+
+
+// -----
+
+// COM: Check that dpas layout can be propagated from dot op to atomic_rmw op
+// CHECK-NOT: #triton_gpu.blocke<{.*}> | ```suggestion
// CHECK-NOT: #triton_gpu.blocked<{.*}>
``` |
intel-xpu-backend-for-triton | github_2023 | others | 2,312 | intel | whitneywhtsang | @@ -2297,3 +2297,185 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
tt.return %3 : tensor<128x256xf32, #blocked>
}
}
+
+
+// -----
+
+// COM: Check that dpas layout can be propagated from dot op to atomic_rmw op
+// CHECK-NOT: #triton_gpu.blocke<{.*}>
+// CHECK: #[[$DPAS:.+... | ```suggestion
// CHECK-NOT: #triton_gpu.blocked<{.*}>
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | whitneywhtsang | @@ -288,8 +301,13 @@ bool hasConvertToMMATransisitiveUse(Operation *op, Attribute encoding) {
bool isLayoutAnchor(Operation *op) {
if (isa<LoadOp, StoreOp>(op))
return ttgi::isExpensiveLoadOrStore(op);
- if (isa<DotOp, AtomicRMWOp, AtomicCASOp>(op))
+ if (isa<DotOp, AtomicCASOp>(op))
return true;
+ // ... | before this change, shouldn't it already return true for atomic_rmw op with mma layout? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | whitneywhtsang | @@ -402,6 +420,18 @@ SmallVector<Value> LayoutPropagation::propagateToUsers(Value value,
setEncoding({afterArg, result}, info, changed, user);
continue;
}
+ if (auto atomic_rmw_op = dyn_cast<AtomicRMWOp>(user)) { | ```suggestion
if (auto atomicRMWOp = dyn_cast<AtomicRMWOp>(user)) {
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | whitneywhtsang | @@ -402,6 +420,18 @@ SmallVector<Value> LayoutPropagation::propagateToUsers(Value value,
setEncoding({afterArg, result}, info, changed, user);
continue;
}
+ if (auto atomic_rmw_op = dyn_cast<AtomicRMWOp>(user)) {
+ bool isBlockedOrMma = true;
+ for (Attribute encoding : info.encodings) {... | can you use `all_of` here? |
intel-xpu-backend-for-triton | github_2023 | others | 2,312 | intel | jopperm | @@ -2297,3 +2297,185 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
tt.return %3 : tensor<128x256xf32, #blocked>
}
}
+
+
+// -----
+
+// COM: Check that dpas layout can be propagated from dot op to atomic_rmw op
+// CHECK-NOT: #triton_gpu.blocke<{.*}>
+// CHECK: #[[$DPAS:.+... | ```suggestion
// CHECK-NOT: triton_gpu.convert_layout
``` |
intel-xpu-backend-for-triton | github_2023 | others | 2,312 | intel | jopperm | @@ -2297,3 +2297,185 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 :
tt.return %3 : tensor<128x256xf32, #blocked>
}
}
+
+
+// -----
+
+// COM: Check that dpas layout can be propagated from dot op to atomic_rmw op
+// CHECK-NOT: #triton_gpu.blocke<{.*}>
+// CHECK: #[[$DPAS:.+... | ```suggestion
// CHECK-NOT: triton_gpu.convert_layout
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | whitneywhtsang | @@ -288,8 +307,13 @@ bool hasConvertToMMATransisitiveUse(Operation *op, Attribute encoding) {
bool isLayoutAnchor(Operation *op) {
if (isa<LoadOp, StoreOp>(op))
return ttgi::isExpensiveLoadOrStore(op);
- if (isa<DotOp, AtomicRMWOp, AtomicCASOp>(op))
+ if (isa<DotOp, AtomicCASOp>(op))
return true;
+ // ... | Don't think the comment adds any extra information to the code below.
```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,312 | intel | etiotto | @@ -252,6 +253,19 @@ bool hasConvertToMMATransisitiveUse(Operation *op, Attribute encoding) {
}
}
}
+
+ // HACK: we want to propagate mma layout to the atomic_rmw op, so we do
+ // not need an extra ConvertLayout Op to convert layout from mma to other
+ // layouts, which may co... | @LiyangLingIntel have you opened an issue to track the performance work ? |
intel-xpu-backend-for-triton | github_2023 | python | 2,420 | intel | whitneywhtsang | @@ -4261,6 +4261,11 @@ def kernel():
def test_trans_reshape(device):
+ if is_xpu(): | Prefer to do it like https://github.com/intel/intel-xpu-backend-for-triton/pull/2359/files, instead of skipping the test. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,420 | intel | whitneywhtsang | @@ -715,28 +674,72 @@ class TritonIntelGPURewriteTensorPointerPass
void runOnOperation() override {
ModuleOp mod = getOperation();
- auto usedByLoadOrStoreOp = [](Value val) {
- return llvm::any_of(val.getUsers(), [](Operation *user) {
- return isa<tt::LoadOp, tt::StoreOp>(user);
- });
- ... | Looks like we only care about MakeTensorPtr?
```suggestion
mod.walk([&](tt::MakeTensorPtrOp op) {
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,420 | intel | whitneywhtsang | @@ -715,28 +674,72 @@ class TritonIntelGPURewriteTensorPointerPass
void runOnOperation() override {
ModuleOp mod = getOperation();
- auto usedByLoadOrStoreOp = [](Value val) {
- return llvm::any_of(val.getUsers(), [](Operation *user) {
- return isa<tt::LoadOp, tt::StoreOp>(user);
- });
- ... | once it is inserted to tensorPointersToRemove, we can advance to the next MakeTensorPtrOp |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,420 | intel | whitneywhtsang | @@ -715,28 +674,72 @@ class TritonIntelGPURewriteTensorPointerPass
void runOnOperation() override {
ModuleOp mod = getOperation();
- auto usedByLoadOrStoreOp = [](Value val) {
- return llvm::any_of(val.getUsers(), [](Operation *user) {
- return isa<tt::LoadOp, tt::StoreOp>(user);
- });
- ... | any chance of inserting elements erased before? do we need a visited set? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,420 | intel | whitneywhtsang | @@ -715,28 +674,71 @@ class TritonIntelGPURewriteTensorPointerPass
void runOnOperation() override {
ModuleOp mod = getOperation();
- auto usedByLoadOrStoreOp = [](Value val) {
- return llvm::any_of(val.getUsers(), [](Operation *user) {
- return isa<tt::LoadOp, tt::StoreOp>(user);
- });
- ... | do you know if `return;` behaves the same as `return WalkResult::advance();` and not `return WalkResult::interrupt();`, maybe we should make it explicit? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,420 | intel | whitneywhtsang | @@ -715,28 +674,71 @@ class TritonIntelGPURewriteTensorPointerPass
void runOnOperation() override {
ModuleOp mod = getOperation();
- auto usedByLoadOrStoreOp = [](Value val) {
- return llvm::any_of(val.getUsers(), [](Operation *user) {
- return isa<tt::LoadOp, tt::StoreOp>(user);
- });
- ... | your new test case makes me think, should we start with all makeTensorPtrOp in tensorPointersToRemove, and remove from the set when ever shouldRemove returns false?
As I assume we don't want to lower to tensor of pointers as long as one load can be lowered to 2d block load? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,425 | intel | Dewei-Wang-sh | @@ -275,6 +277,14 @@ class MatchTargetSizePass
MLIRContext *ctx = &getContext();
ModuleOp m = getOperation();
+ // By default, tritongpu are lowered to simt mode (threads-per-warp=16) | any reason to move this snippet? cause error? |
intel-xpu-backend-for-triton | github_2023 | python | 2,430 | intel | etiotto | @@ -175,27 +187,37 @@ def matmul(a, b, c):
matmul_kernel_with_block_pointers_batched[grid](
a, b, c, #
B, M, N, K, #
- a.stride(0), a.stride(1), a.stride(2), #
- b.stride(0), b.stride(1), b.stride(2), #
+ a.stride(0), a.stride(a_major), a.stride(a_... | When neither A nor B are transposed (a_major, a_minor) will be (-2,-1) which is different from the current code (1,2). |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,400 | intel | whitneywhtsang | @@ -738,11 +748,11 @@ class TritonIntelGPURewriteTensorPointerPass
LLVM_DEBUG({
if (valueToRemove.empty())
- llvm::dbgs() << "No tensor pointer to remove\n";
+ LDBG("No tensor pointer to remove");
else {
- llvm::dbgs() << "Values to remove: \n";
+ LDBG("Values to remove:... | Does LDBG inside LLVM_DEBUG work? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,402 | intel | etiotto | @@ -51,20 +33,22 @@ computeWarpLevelHistogram(Location loc, RankedTensorType srcType,
SmallVector<Value> ballotBits;
for (int j = 0; j < numBits; ++j) {
Value bitSet = and_(value, i32_val(1 << j));
- Value bit = generateVoteBallot(loc, icmp_ne(bitSet, zero), -1, threadId,
- ... | Is this different when threads per warp is 16? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,402 | intel | etiotto | @@ -170,20 +159,22 @@ struct HistogramOpConversion
auto typeConverter = getTypeConverter();
SmallVector<Value> srcValues = unpackLLElements(loc, input, rewriter);
int numBins = op.getType().getDimSize(0);
- int numThreadsPerWarp = triton::gpu::TritonGPUDialect::getThreadsPerWarp(
- op->getParen... | We should also allow 16 threads per warp ? Does the codegen consider 16 threads per warp or does this only work for 32/64 threads per warp? |
intel-xpu-backend-for-triton | github_2023 | python | 2,313 | intel | anmyachev | @@ -271,22 +272,33 @@ def benchmark(M, N, K, provider):
quantiles = [0.5, 0.0, 1.0]
if provider == 'onednn':
- _, min_ms, max_ms, mean, cv = benchmark_suit.do_bench(lambda: torch.matmul(a, b), warmup=10, rep=10,
- quantiles=quantiles, fast_... | At some point it has to work? |
intel-xpu-backend-for-triton | github_2023 | others | 2,313 | intel | anmyachev | @@ -121,12 +121,26 @@ jobs:
run: |
cd benchmarks/triton_kernels_benchmark
# Default path:
+ # Simply run the split-k benchmark to check correctness
+ TRITON_INTEL_ADVANCED_PATH=0 \
+ TRITON_INTEL_ENABLE_ADDRESS_PAYLOAD_OPT=1 \
+ IGC_VISAOptions=" -enabl... | Maybe it would be better to put this in a separate step? |
intel-xpu-backend-for-triton | github_2023 | others | 2,313 | intel | whitneywhtsang | @@ -121,12 +121,26 @@ jobs:
run: |
cd benchmarks/triton_kernels_benchmark
# Default path:
+ # Simply run the split-k benchmark to check correctness | As it is only for functional, let's only run splitk at the out of box step, the previous step. |
intel-xpu-backend-for-triton | github_2023 | others | 2,313 | intel | whitneywhtsang | @@ -121,12 +121,26 @@ jobs:
run: |
cd benchmarks/triton_kernels_benchmark
# Default path:
+ # Simply run the split-k benchmark to check correctness
+ TRITON_INTEL_ADVANCED_PATH=0 \
+ TRITON_INTEL_ENABLE_ADDRESS_PAYLOAD_OPT=1 \
+ IGC_VISAOptions=" -enabl... | Can you please check if any of the environment variables make a difference in performance?
If no difference, please move it to the previous step.
If there is a difference, please add it also to the previous step. |
intel-xpu-backend-for-triton | github_2023 | python | 2,313 | intel | whitneywhtsang | @@ -271,22 +272,33 @@ def benchmark(M, N, K, provider):
quantiles = [0.5, 0.0, 1.0]
if provider == 'onednn':
- _, min_ms, max_ms, mean, cv = benchmark_suit.do_bench(lambda: torch.matmul(a, b), warmup=10, rep=10,
- quantiles=quantiles, fast_... | We should call the streamk implementation, instead of regular GEMM. FYI @ESI-SYD |
intel-xpu-backend-for-triton | github_2023 | python | 2,313 | intel | whitneywhtsang | @@ -211,7 +211,6 @@ def matmul(a, b, c):
[1, 512, 32768, 8192], #
[1, 1024, 16384, 8192], #
[1, 1024, 28672, 8192], #
- [1, 3072, 4096, 3072], # FIXME: Remove this case when gemm_streamk_benchmark works | streamk performance is currently 100TFlops, which is smaller than generic gemm performance of 216TFlops, should not yet remove this shape here. |
intel-xpu-backend-for-triton | github_2023 | c | 2,385 | intel | alexbaden | @@ -192,9 +192,13 @@ static PyObject *loadBinary(PyObject *self, PyObject *args) {
// If the register mode isn't set, and the number of spills is greater
// than the threshold, recompile the kernel using large GRF mode.
if (!is_GRF_mode_specified && n_spills > max_reg_spill) {
- std::cout << "(I): D... | ```suggestion
const std::optional<bool> debugEnabled =
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,343 | intel | whitneywhtsang | @@ -141,13 +141,70 @@ def do_bench_no_ipex(fn, warmup=25, rep=100, grad_to_none=None, quantiles=None,
:param fast_flush: Use faster kernel to flush L2 between measurements
:type fast_flush: bool
"""
+
assert return_mode in ["min", "max", "mean", "median"]
import torch
- from triton.testing i... | Please ensure a ticket is created for this if it is not already. |
intel-xpu-backend-for-triton | github_2023 | others | 2,376 | intel | pbchekin | @@ -61,7 +61,7 @@ fi
if [[ "${USE_IPEX:-}" == "1" ]]; then
export BENCHMARKING_METHOD="PYTORCH_LEGACY_PROFILER_USING_IPEX"
elif [[ "${USE_IPEX:-}" == "0" ]]; then
- export BENCHMARKING_METHOD="ELAPSED_TIME"
+ export BENCHMARKING_METHOD="${BENCHMARKING_METHOD:ELAPSED_TIME}" | ```suggestion
export BENCHMARKING_METHOD="${BENCHMARKING_METHOD:-ELAPSED_TIME}"
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,335 | intel | whitneywhtsang | @@ -2232,97 +1812,38 @@ void populateElementwiseOpToLLVMPatterns(
PatternBenefit benefit) {
using namespace mlir::triton::gpu;
-#define POPULATE_BINARY_OP(SRC_OP, DST_OP) \
- patterns.add<ElementwiseOpConversion<SRC_OP, DST_OP>>( \
- typeConverte... | is the comment intentional to stay?
```suggestion
benefit); // must keep (is different, we have SPIRV calling convention to
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,335 | intel | victor-eds | @@ -1249,10 +1222,12 @@ struct FpToFpOpConversion
auto F64TyID = TypeID::get<Float64Type>();
if (srcTy.getTypeID() == dstTy.getTypeID()) {
- if (srcTy.getTypeID() == F8E4M3TyID || dstTy.getTypeID() == F8E4M3TyID)
- return {identity_func, 2};
- else
- return {identity_func, 4};
+ ... | ```suggestion
constexpr auto identityFn = [](Location, ConversionPatternRewriter &,
const SmallVector<Value> &v) { return v; };
```
Avoid warnings |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,335 | intel | whitneywhtsang | @@ -1222,8 +1222,9 @@ struct FpToFpOpConversion
auto F64TyID = TypeID::get<Float64Type>();
if (srcTy.getTypeID() == dstTy.getTypeID()) {
- auto identityFn = [](Location loc, ConversionPatternRewriter &rewriter,
- const SmallVector<Value> &v) { return v; };
+ constexpr aut... | `rewriter` can be removed too. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,347 | intel | chengjunlu | @@ -41,26 +48,47 @@ struct TritonIntelGPUMaterializeBlockPointerPass
"Expected 'loadOp' to load a tensor value.");
tt::MakeTensorPtrOp makeTensorPtrOp = getMakeTensorPtrOp(ptr);
+ LDBG("Found make tensor ptr op: " << makeTensorPtrOp);
auto ptrType = cast<tt::PointerType>(makeTensorPtr... | Clean the comment out code. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,347 | intel | whitneywhtsang | @@ -33,41 +35,60 @@ namespace {
/// - the tensor pointer pitch is not divisible by Qword bitwidth
/// - the tensor pointer is not contiguous on memory
bool shouldRemove(tt::MakeTensorPtrOp &op, bool isUsedByStoreOp) {
+ LDBG("Considering removal of: " << op);
if (!op->getParentOfType<ModuleOp>()->hasAttr(
... | ```suggestion
for (size_t i = 0; i < strides.size(); ++i) {
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,347 | intel | whitneywhtsang | @@ -33,41 +35,60 @@ namespace {
/// - the tensor pointer pitch is not divisible by Qword bitwidth
/// - the tensor pointer is not contiguous on memory
bool shouldRemove(tt::MakeTensorPtrOp &op, bool isUsedByStoreOp) {
+ LDBG("Considering removal of: " << op);
if (!op->getParentOfType<ModuleOp>()->hasAttr(
... | should this be `return true` instead? |
intel-xpu-backend-for-triton | github_2023 | others | 2,366 | intel | etiotto | @@ -261,6 +261,8 @@ module attributes {"triton_gpu.num-warps" = 1 : i32, "triton_gpu.threads-per-war
#dot_b = #triton_gpu.dot_op<{opIdx = 1, parent = #dpas, kWidth = 2}>
module attributes {"triton_gpu.num-warps" = 1 : i32, "triton_gpu.threads-per-warp" = 16 : i32} {
// CHECK-LABEL: llvm.func spir_kernelcc @non_c... | What about masked stores, can we have a lit test for the tt.store as well ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,360 | intel | whitneywhtsang | @@ -1,11 +1,14 @@
#include "Schedule.h"
#include "include/triton/Dialect/TritonGPU/Transforms/Utility.h"
#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "mlir/Dialect/Arith/IR/Arith.h" | ```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,360 | intel | whitneywhtsang | @@ -1,11 +1,14 @@
#include "Schedule.h"
#include "include/triton/Dialect/TritonGPU/Transforms/Utility.h"
#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
#include "mlir/Dialect/SCF/Transforms/Transforms.h"
#include "mlir/IR/TypeUtilities.h"
#include "mlir/Inte... | ```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | others | 2,351 | intel | alexbaden | @@ -1 +1 @@
-9fd54d787d9ee426c9165376ee6add0ef731b07b
+190e09d8b6a13f789b143f0fbd1325f924550967 | sounds good to me |
intel-xpu-backend-for-triton | github_2023 | python | 2,357 | intel | whitneywhtsang | @@ -226,25 +237,31 @@ def benchmark(Z, H, N_CTX, D_HEAD, provider):
if provider == 'onednn':
_, min_ms, max_ms, mean, cv = benchmark_suit.do_bench(
lambda: torch.nn.functional.scaled_dot_product_attention(q, k, v, attn_mask=None, dropout_p=0.0, is_causal=
- ... | ```suggestion
# FIXME: remove below if condition when extend attention support for Causal = True done
``` |
intel-xpu-backend-for-triton | github_2023 | python | 2,181 | intel | FMarno | @@ -211,7 +211,7 @@ def make_ttgir(mod, metadata, opt, properties):
intel.passes.ttgpuir.add_accelerate_matmul(pm)
intel.passes.ttgpuir.add_remove_layout_conversions(pm)
intel.passes.ttgpuir.add_materialize_block_pointer(pm)
- intel.passes.ttgpuir.add_rewrite_tensor_pointer(pm)
+ ... | ```suggestion
```
|
intel-xpu-backend-for-triton | github_2023 | cpp | 2,181 | intel | FMarno | @@ -705,56 +796,69 @@ struct LoadOpConversion
auto typeConverter = getTypeConverter();
auto *ctx = rewriter.getContext();
- // original values
- Value ptr = op.getPtr();
- Value mask = op.getMask();
- Value other = op.getOther();
-
- // adaptor values
- if (isTensorPointerType(ptr.getType(... | Why do you need ptr, other, and mask twice? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,181 | intel | FMarno | @@ -705,56 +796,69 @@ struct LoadOpConversion
auto typeConverter = getTypeConverter();
auto *ctx = rewriter.getContext();
- // original values
- Value ptr = op.getPtr();
- Value mask = op.getMask();
- Value other = op.getOther();
-
- // adaptor values
- if (isTensorPointerType(ptr.getType(... | I think the style guide suggests flipping this around for the early return in the success case |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,181 | intel | FMarno | @@ -996,46 +1100,60 @@ struct StoreOpConversion
LogicalResult
matchAndRewrite(triton::StoreOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
- Value ptr = op.getPtr();
- Value value = op.getValue();
-
- if (isTensorPointerType(ptr.getType()))
- return... | early return on success |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,181 | intel | FMarno | @@ -996,46 +1100,60 @@ struct StoreOpConversion
LogicalResult
matchAndRewrite(triton::StoreOp op, OpAdaptor adaptor,
ConversionPatternRewriter &rewriter) const override {
- Value ptr = op.getPtr();
- Value value = op.getValue();
-
- if (isTensorPointerType(ptr.getType()))
- return... | add assert messages |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,181 | intel | victor-eds | @@ -187,6 +187,97 @@ struct LoadStoreConversionBase {
return axisAnalysisPass.getMaskAlignment(mask);
}
+ std::tuple<SmallVector<Value>, SmallVector<Value>, SmallVector<Value>>
+ convertBlockPtrToTensorOfPtr(
+ Location loc, Value blockPointerStruct, RankedTensorType tensorType,
+ Type valueElemTy... | I don't think I fully get this:
- Why is `blockOffset` always 0?
- Why the others require this product? |
intel-xpu-backend-for-triton | github_2023 | others | 2,181 | intel | etiotto | @@ -660,10 +660,10 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 :
tt.func @basic_store(%ptrs: tensor<256x!tt.ptr<f32>, #blocked0>, %vals: tensor<256xf32, #blocked0>, %mask: tensor<256xi1, #blocked0>) {
// CHECK: [[ARG0_0:%.*]] = llvm.extractvalue %arg0[0] : !llvm.struct... | [Suggestion]: Use CHEK-DAG ? |
intel-xpu-backend-for-triton | github_2023 | others | 2,181 | intel | etiotto | @@ -255,3 +255,44 @@ module attributes {"triton_gpu.num-warps" = 1 : i32, "triton_gpu.threads-per-war
tt.return
}
}
+
+// -----
+
+#dpas = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSize = 16, opsPerChan = 2, threadsPerWarp = 16, warpsPerCTA = [1, 1], repCluster = [1, 1], A = [8, 16... | Add the result type of the load (same at line 276 |
intel-xpu-backend-for-triton | github_2023 | others | 2,181 | intel | etiotto | @@ -255,3 +255,44 @@ module attributes {"triton_gpu.num-warps" = 1 : i32, "triton_gpu.threads-per-war
tt.return
}
}
+
+// -----
+
+#dpas = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSize = 16, opsPerChan = 2, threadsPerWarp = 16, warpsPerCTA = [1, 1], repCluster = [1, 1], A = [8, 16... | Add load result type |
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