| { |
| "description": "Inventory of the available legacy testbench sources, not a claim of successful tests or complete 1783-example executable coverage. Missing DUTs/testbenches are recorded explicitly. No model predictions or experiment results are included.", |
| "languages": { |
| "chisel": { |
| "test_split_size": 323, |
| "candidate_count": 70, |
| "dut_available": 23, |
| "dut_with_target_marker": 23, |
| "with_located_testbench": 13, |
| "candidates": [ |
| { |
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| "local_folder": "accumulator", |
| "local_file": "accumulator/accumulator.scala", |
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| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "FPGA-Application-Development-and-Simulation/chisel/src/main/scala/loywong/counter.scala", |
| "local_folder": "counter", |
| "local_file": "counter/counter.scala", |
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| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "fpga_final_project/src/main/scala/some/maxpool.scala", |
| "local_folder": "maxpool", |
| "local_file": "maxpool/maxpool.scala", |
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| "target_marker_present": true, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "fpga_final_project/src/main/scala/top/show_on_board.scala", |
| "local_folder": "show_on_board", |
| "local_file": "show_on_board/show_on_board.scala", |
| "in_current_test_split": true, |
| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "fpga_final_project/src/main/scala/top/wrapper.scala", |
| "local_folder": "wrapper", |
| "local_file": "wrapper/wrapper.scala", |
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| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "fpga_final_project/src/main/scala/wr/read.scala", |
| "local_folder": "read", |
| "local_file": "read/read.scala", |
| "in_current_test_split": true, |
| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "magma-si/src/main/scala/components/Bitmap.scala", |
| "local_folder": "Bitmap", |
| "local_file": "Bitmap/Bitmap.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "Bitmap/BitmapTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "magma-si/src/main/scala/components/MultSwitch.scala", |
| "local_folder": "MultSwitch", |
| "local_file": "MultSwitch/MultSwitch.scala", |
| "in_current_test_split": true, |
| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "magma-si/src/main/scala/components/Regor.scala", |
| "local_folder": "Regor", |
| "local_file": "Regor/Regor.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "riscv-self/src/main/scala/RegFile.scala", |
| "local_folder": "RegFile", |
| "local_file": "RegFile/RegFile.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "RegFile/RegFileTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "FPGA-Application-Development-and-Simulation/chisel/src/main/scala/loywong/encoder.scala", |
| "local_folder": "encoder", |
| "local_file": "encoder/encoder.scala", |
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| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "encoder/EncoderTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "MultiScalarMultiplication/src/main/scala/MSM/PMNaive.scala", |
| "local_folder": "PMNaive", |
| "local_file": "PMNaive/PMNaive.scala", |
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| "target_marker_present": true, |
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| }, |
| { |
| "path": "Pythia-HDL/src/main/scala/pythia/MaxN.scala", |
| "local_folder": "MaxN", |
| "local_file": "MaxN/MaxN.scala", |
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| "target_marker_present": true, |
| "available_testbench_files": [ |
| "MaxN/MaxNTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "magma-si/src/main/scala/components/AdderSwitch.scala", |
| "local_folder": "AdderSwitch", |
| "local_file": "AdderSwitch/AdderSwitch.scala", |
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| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "ChiselAIA/src/main/scala/APLIC.scala", |
| "local_folder": "APLIC", |
| "local_file": "APLIC/APLIC.scala", |
| "in_current_test_split": true, |
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| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "MultiScalarMultiplication/src/main/scala/MSM/PAddReduction.scala", |
| "local_folder": "PAddReduction", |
| "local_file": "PAddReduction/PAddReduction.scala", |
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| }, |
| { |
| "path": "Pythia-HDL/src/main/scala/pythia/MasterModule.scala", |
| "local_folder": "MasterModule", |
| "local_file": "MasterModule/MasterModule.scala", |
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| }, |
| { |
| "path": "Pythia-HDL/src/main/scala/pythia/Plane.scala", |
| "local_folder": "Plane", |
| "local_file": "Plane/Plane.scala", |
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| }, |
| { |
| "path": "riscv-mini/src/main/scala/mini/CSR.scala", |
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| }, |
| { |
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| "local_folder": "Datapath", |
| "local_file": "Datapath/Datapath.scala", |
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| }, |
| { |
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| "local_folder": "GCD", |
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| "target_marker_present": true, |
| "available_testbench_files": [ |
| "GCD/GCDTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "rjrouter/src/main/scala/router/table/ArpCache.scala", |
| "local_folder": "ArpCache", |
| "local_file": "ArpCache/ArpCache.scala", |
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| "available_testbench_files": [] |
| }, |
| { |
| "path": "MultiScalarMultiplication/src/main/scala/MSM/Bucket.scala", |
| "local_folder": "Bucket", |
| "local_file": "Bucket/Bucket.scala", |
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| "dut_available": false, |
| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "riscv32-cpu-chisel/src/main/scala/Memory.scala", |
| "local_folder": "Memory", |
| "local_file": "Memory/Memory.scala", |
| "in_current_test_split": true, |
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| "target_marker_present": true, |
| "available_testbench_files": [ |
| "Memory/MemoryTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "riscv32-cpu-chisel/src/main/scala/Top.scala", |
| "local_folder": "Top", |
| "local_file": "Top/Top.scala", |
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| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "KyogenRV/src/main/scala/core/csr.scala", |
| "local_folder": "csr", |
| "local_file": "csr/csr.scala", |
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| "available_testbench_files": [] |
| }, |
| { |
| "path": "KyogenRV/src/main/scala/mem/DMem.scala", |
| "local_folder": "DMem", |
| "local_file": "DMem/DMem.scala", |
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| }, |
| { |
| "path": "KyogenRV/src/main/scala/mem/IMem.scala", |
| "local_folder": "IMem", |
| "local_file": "IMem/IMem.scala", |
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| "target_marker_present": true, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "ChiselAIA/src/main/scala/Example-axi.scala", |
| "local_folder": "Example-axi", |
| "local_file": "Example-axi/Example-axi.scala", |
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| }, |
| { |
| "path": "ChiselAIA/src/main/scala/Example.scala", |
| "local_folder": "Example", |
| "local_file": "Example/Example.scala", |
| "in_current_test_split": true, |
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| "target_marker_present": false, |
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| }, |
| { |
| "path": "asyncfifo/src/main/scala/AsyncQueue.scala", |
| "local_folder": "AsyncQueue", |
| "local_file": "AsyncQueue/AsyncQueue.scala", |
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| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "perfect-chisel/src/main/scala/perfect/util/Counter.scala", |
| "local_folder": "Counter", |
| "local_file": "Counter/Counter.scala", |
| "in_current_test_split": true, |
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| "target_marker_present": true, |
| "available_testbench_files": [ |
| "Counter/CounterTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "perfect-chisel/src/main/scala/perfect/util/PWM.scala", |
| "local_folder": "PWM", |
| "local_file": "PWM/PWM.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "PWM/PWMTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "ChiselAIA/src/main/scala/IMSIC.scala", |
| "local_folder": "IMSIC", |
| "local_file": "IMSIC/IMSIC.scala", |
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| "target_marker_present": false, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "asyncfifo/src/main/scala/SynchronizerReg.scala", |
| "local_folder": "SynchronizerReg", |
| "local_file": "SynchronizerReg/SynchronizerReg.scala", |
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| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [] |
| }, |
| { |
| "path": "tiny-gpu-chisel/playground/src/DecoupledGCD.scala", |
| "local_folder": "DecoupledGCD", |
| "local_file": "DecoupledGCD/DecoupledGCD.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "DecoupledGCD/DecoupledGCDTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "tiny-gpu-chisel/playground/src/DeviceControlRegister.scala", |
| "local_folder": "DeviceControlRegister", |
| "local_file": "DeviceControlRegister/DeviceControlRegister.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "DeviceControlRegister/DeviceControlRegisterTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "tiny-gpu-chisel/playground/src/Fetcher.scala", |
| "local_folder": "Fetcher", |
| "local_file": "Fetcher/Fetcher.scala", |
| "in_current_test_split": true, |
| "dut_available": true, |
| "target_marker_present": true, |
| "available_testbench_files": [ |
| "Fetcher/FetcherTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "tiny-gpu-chisel/playground/src/MemLoadStoreUnit.scala", |
| "local_folder": "MemLoadStoreUnit", |
| "local_file": "MemLoadStoreUnit/MemLoadStoreUnit.scala", |
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| "target_marker_present": true, |
| "available_testbench_files": [ |
| "MemLoadStoreUnit/MemLoadStoreUnitTargetSpec.scala" |
| ] |
| }, |
| { |
| "path": "fpga_final_project/src/main/scala/calc8x8/accumu.scala", |
| "local_folder": "accumu", |
| "local_file": "accumu/accumu.scala", |
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| "target_marker_present": true, |
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| { |
| "path": "magma-si/src/main/scala/components/FanCtrl.scala", |
| "local_folder": "FanCtrl", |
| "local_file": "FanCtrl/FanCtrl.scala", |
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| { |
| "path": "magma-si/src/main/scala/components/FanNetwork.scala", |
| "local_folder": "FanNetwork", |
| "local_file": "FanNetwork/FanNetwork.scala", |
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| }, |
| { |
| "path": "magma-si/src/main/scala/components/ReductionMux.scala", |
| "local_folder": "ReductionMux", |
| "local_file": "ReductionMux/ReductionMux.scala", |
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| { |
| "path": "fpga_final_project/src/main/scala/calc8x8/calc8x8.scala", |
| "local_folder": "calc8x8", |
| "local_file": "calc8x8/calc8x8.scala", |
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| { |
| "path": "fpga_final_project/src/main/scala/wr/read_pack.scala", |
| "local_folder": "read_pack", |
| "local_file": "read_pack/read_pack.scala", |
| "in_current_test_split": true, |
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| }, |
| { |
| "path": "magma-si/src/main/scala/components/Benes.scala", |
| "local_folder": "Benes", |
| "local_file": "Benes/Benes.scala", |
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| }, |
| { |
| "path": "tiny-gpu-chisel/playground/src/Scheduler.scala", |
| "local_folder": "Scheduler", |
| "local_file": "Scheduler/Scheduler.scala", |
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| "target_marker_present": true, |
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| "Scheduler/SchedulerTargetSpec.scala" |
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| { |
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| "local_folder": "common", |
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| { |
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|
