Add Croissant RAI metadata, inspection examples, and release resources

DATA_ACCESS.md

@@ -0,0 +1,90 @@
+# Accessing MHRC-Bench resources
+
+The code repository contains code. Dataset records, upstream repository
+snapshots and testbench assets are hosted separately here.
+
+## Standard task files
+
+This repository contains a compact inspection sample: 256 training records per language, with the existing validation/test representations. The original `sample_manifest.json` records per-file counts; `metadata_manifest.json` verifies the current files. The compact VHDL test file has 513 rows while the classified test content has 496; do not align these by row index.
+
+The full 44,964 / 453 / 1,783 task release is available at [Zanehpn/MHRC-Bench](https://huggingface.co/datasets/Zanehpn/MHRC-Bench). Use that release for full benchmark experiments. Eight small examples are available under [samples/](samples/README.md).
+
+## Repository sources
+
+The existing source archive is pinned to `Zanehpn/MHRC-Bench@cfea433c68462d01dd5c3fb88d4bbefd383bfb7d`.
+Download [collected_repos.tar.gz](https://huggingface.co/datasets/Zanehpn/MHRC-Bench/resolve/cfea433c68462d01dd5c3fb88d4bbefd383bfb7d/original_repo/collected_repos.tar.gz)
+(34,946,509,655 bytes).
+
+SHA-256: `f48c31af67a45d470776c00455c239a2d38616e70a8d1acf7660eee8fabb42eb`.
+
+Extract into a directory of your choice. The archive's paths begin with
+`chisel/`, `systemverilog/`, `vhdl/`, or `hls/`, followed by the source repository
+name. For a task path `repo/path/to/file`, look under
+`<repository-root>/<language>/repo/path/to/file`.
+
+The archive is a legacy snapshot. Its individual Git revisions have not been
+rechecked against the current local-checkout inventory. The separate
+[repository inventory](provenance/repositories.json) provides upstream URLs
+and observed commits for direct source retrieval and provenance review.
+
+## Enriched context files
+
+From the [full release](https://huggingface.co/datasets/Zanehpn/MHRC-Bench/tree/main), for each language download `valid_content_with_crossfile_context.jsonl` or
+`test_content_with_crossfile_context.jsonl`. Every row retains the corresponding
+standard task fields. The `crossfile_context` string wraps other source files
+with `--- FILE: ... (BEGIN) ---` / `--- FILE: ... (END) ---` markers. Target files
+and whitespace-normalised exact copies are excluded. These resources are for
+repository context; they do not change the number of validation or test tasks.
+
+## Functional testbench assets
+
+Download [functional_testbenches.tar.gz](resources/functional_testbenches.tar.gz)
+and extract it into a separate working directory. It includes source files,
+testbench code, build configuration, candidate mappings and the standard test
+records needed by the legacy runners. It excludes model predictions, result
+tables, compiler outputs and credentials.
+
+This inventory does not establish successful behavioral execution:
+
+| Language | Full test split | Candidate entries | Available DUT files | Entries with located testbench files |
+| --- | ---: | ---: | ---: | ---: |
+| chisel | 323 | 70 | 23 | 13 |
+| systemverilog | 508 | 50 | 50 | 50 |
+| vhdl | 496 | 50 | 50 | 50 |
+| hls | 456 | 50 | 50 | 37 |
+
+Some candidates are missing source files or runnable harnesses. Read
+[functional_coverage.json](resources/functional_coverage.json) before selecting
+an evaluation subset. Report the actual coverage; do not infer a pass rate over
+all 1,783 tasks from this bundle. Elaborating or compiling alone is not a
+behavioral correctness test.
+
+The legacy runners use `g++` for HLS, VCS for the supplied SystemVerilog/VHDL
+scripts, and sbt with Chisel/ChiselTest for Chisel. VCS and vendor libraries are
+external licensed dependencies. These legacy commands are not interchangeable
+with Icarus/GHDL without adapting their build scripts. The packaged Chisel build
+specifies Scala 2.13.12, Chisel 6.0.0 and ChiselTest 6.0.0.
+
+For example, from the extracted bundle root:
+
+```bash
+python hls_dataset/function_verify/run_function_verify.py /path/to/hls_predictions.jsonl --folders flat --output /path/to/hls_functional_results.jsonl
+MHRC_REPO_ROOT=/path/to/original_repositories python vhdl_dataset/function_verify/run_function_verify.py /path/to/vhdl_predictions.jsonl --folders counter --output /path/to/vhdl_functional_results.jsonl
+```
+
+Legacy prediction files must follow the exact row order of the bundled
+`<language>_dataset/test_content.jsonl`; each record supplies `generated_code`.
+Use a fresh extracted working copy because the legacy runners patch local
+files during execution. This release corrects the SystemVerilog helper to
+compile the replaced DUT, removes attempts to alter system library symlinks,
+and makes VHDL repository paths configurable with `MHRC_REPO_ROOT`.
+
+## Integrity and metadata
+
+[resource_manifest.json](resources/resource_manifest.json) lists resource URLs,
+sizes and SHA-256 checksums. [croissant.json](croissant.json) describes the actual sample files in this repository.
+[full-release-croissant.json](full-release-croissant.json) is an unchanged copy of the full release Croissant/RAI file; use the full-release file when submitting the full benchmark to OpenReview. Public hosting does not confirm an OpenReview upload. Each JSONL representation is modeled separately;
+source and testbench archives are non-tabular resources. Third-party notices
+and unresolved root licenses are documented in [LICENSE.md](LICENSE.md).
+
+The mirrored repository inventory covers all 583 upstream repositories of the full release; it is a superset of those represented in this compact sample. Unresolved license cases and partial testbench coverage remain unresolved by mirroring.

LICENSE.md

@@ -0,0 +1,59 @@
+# MHRC-Bench licensing and attribution
+
+This distribution combines author-created benchmark annotations and documentation
+with third-party source code. It is not a blanket MIT relicensing of the source
+repositories.
+
+## Author-created material
+
+The benchmark-specific annotations, metadata, and documentation are released
+under the MIT license below. This grant covers only material for which the
+MHRC-Bench authors hold the relevant rights.
+
+MIT License
+
+Copyright (c) 2026 MHRC-Bench authors
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
+
+## Third-party material
+
+Source snippets, repository snapshots, copied testbench components, dependency
+files, and upstream notices retain their original copyright and license terms.
+Apply the terms in the relevant repository and file headers, including nested
+or vendored components. A repository-level label does not override a file-level
+license or a separate dependency license.
+
+The source inventory is [repositories.json](provenance/repositories.json).
+Copies of the located root license/notice files are provided in
+[source_license_notices.tar.gz](provenance/source_license_notices.tar.gz).
+The snapshot archive also retains upstream notices. The inventory records
+observed license text and links to upstream revisions; it is not a legal
+determination of compatibility or a complete file-level audit.
+
+The inventory contains repositories with copyleft notices as well as permissive
+notices. For 171 of the 583 source repositories, no root license/notice file was
+found by this inventory. A missing root notice does not prove that every file is
+unlicensed, and it does not grant permission to reuse or redistribute it. Consult
+file-level notices and the original rights holders when the applicable terms
+are unclear. This release does not assert that all upstream content is
+permissively licensed.
+
+Commercial simulators, vendor headers, and toolchain dependencies are governed
+by their own licenses and must be obtained separately where required.

README.md

@@ -1,5 +1,7 @@
 ---
 license: other
+license_name: mhrc-mixed-upstream-and-mit-annotations
+license_link: LICENSE.md
 task_categories:
 - text-generation
 language:
@@ -33,3 +35,14 @@ Sampling policy:
 This generated sample contains 6,537 JSONL records and occupies
 217.0 MiB on disk. See `sample_manifest.json` for exact
 per-file counts, byte sizes, and generation arguments.
+
+## Inspection and release materials
+
+- [Eight small inspection examples](samples/README.md), two per language.
+- [Croissant metadata with RAI fields for this sample](croissant.json).
+- [Full benchmark Croissant/RAI copy](full-release-croissant.json), identical to the full release metadata. Use this file for a full-benchmark OpenReview submission; repository hosting alone does not establish that it was submitted.
+- [Data and source access instructions](DATA_ACCESS.md), including the full dataset and enriched repository context.
+- [Functional testbench sources](resources/functional_testbenches.tar.gz), [coverage inventory](resources/functional_coverage.json), and [resource checksums](resources/resource_manifest.json). The available testbench collection has partial coverage and does not establish complete reproduction of the reported functional results.
+- [License terms](LICENSE.md), [upstream repository/attribution inventory](provenance/repositories.json), and [preserved license notices](provenance/source_license_notices.tar.gz). Author-created annotations and documentation use MIT; upstream code retains its own terms, with unresolved cases explicitly recorded.
+
+The full release is hosted at [Zanehpn/MHRC-Bench](https://huggingface.co/datasets/Zanehpn/MHRC-Bench); experiment code is at [zanehpn/MHRC-Bench](https://github.com/zanehpn/MHRC-Bench). The provenance inventory covers the full release and may include repositories absent from this compact sample.

metadata_manifest.json

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+{
+  "sample_revision": "d6720f3137a030ab13a05c9f6418d9d8e1c80b4d",
+  "full_release_revision": "09f5ff38dc38ce0e04d175bb85ea5f50e0a74f79",
+  "files": {
+    "chisel/train_content.jsonl": {
+      "records": 256,
+      "bytes": 1630526,
+      "sha256": "49664a49d8e0c7cd3638c5166694103573ec02f0b9a1243b6fd7ca08d9d985a0"
+    },
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+      "bytes": 101517,
+      "sha256": "93e8da83cbbe360247210aaa4401410ee3fb712e02a64f51ff62354ee3b97fc5"
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+      "bytes": 473236,
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+      "bytes": 45071,
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+    },
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+      "sha256": "190c156bcb5ae2df30aae07a5c1e6e179a0633b9c5a43ab846bd8594d7556e49"
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+      "bytes": 5509902,
+      "sha256": "44f35d8d922a3a8dc782e7154212181d96120c43d01a833aa0d5727a91ab50a2"
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+      "bytes": 29491805,
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+      "sha256": "f1200bb1dec805ed8ef04ff0b4fa435608ff8424233dc10f1e24d008e773b7a2"
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+      "sha256": "3b8f723e337530a48fa787aeb821b22f3f6d686b159d457e148173c8cda3322c"
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+      "bytes": 1980447,
+      "sha256": "beea5ad8b76c5e2e521ee4a76f2a8c198acd562ba2bdb2b8318524ae30aa48ad"
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+      "sha256": "3ded4fa594cdc591e4ce76706db648f7cf56bb36f413a577031c6487f40c4ae5"
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+      "sha256": "8eb688bc9bb49ec92f273bdbb7a31d3aa1dd34249b7ceaeda2bafa3ae0cd3e7b"
+    }
+  },
+  "note": "This additive manifest verifies existing sample files and the eight new inspection examples. The original sample_manifest.json is retained."
+}

provenance/source_license_notices.tar.gz

@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:8756ce42e8c0f9abb87d899e5409ba3376715b07231179c360b5c03f5bdb0123
+size 1280478

resources/functional_coverage.json

@@ -0,0 +1,2323 @@
+{
+  "description": "Inventory of the available legacy testbench sources, not a claim of successful tests or complete 1783-example executable coverage. Missing DUTs/testbenches are recorded explicitly. No model predictions or experiment results are included.",
+  "languages": {
+    "chisel": {
+      "test_split_size": 323,
+      "candidate_count": 70,
+      "dut_available": 23,
+      "dut_with_target_marker": 23,
+      "with_located_testbench": 13,
+      "candidates": [
+        {
+          "path": "FPGA-Application-Development-and-Simulation/chisel/src/main/scala/loywong/accumulator.scala",
+          "local_folder": "accumulator",
+          "local_file": "accumulator/accumulator.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "FPGA-Application-Development-and-Simulation/chisel/src/main/scala/loywong/counter.scala",
+          "local_folder": "counter",
+          "local_file": "counter/counter.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": []
+        },
+        {
+          "path": "fpga_final_project/src/main/scala/some/maxpool.scala",
+          "local_folder": "maxpool",
+          "local_file": "maxpool/maxpool.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": []
+        },
+        {
+          "path": "fpga_final_project/src/main/scala/top/show_on_board.scala",
+          "local_folder": "show_on_board",
+          "local_file": "show_on_board/show_on_board.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "fpga_final_project/src/main/scala/top/wrapper.scala",
+          "local_folder": "wrapper",
+          "local_file": "wrapper/wrapper.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "fpga_final_project/src/main/scala/wr/read.scala",
+          "local_folder": "read",
+          "local_file": "read/read.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "magma-si/src/main/scala/components/Bitmap.scala",
+          "local_folder": "Bitmap",
+          "local_file": "Bitmap/Bitmap.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "Bitmap/BitmapTargetSpec.scala"
+          ]
+        },
+        {
+          "path": "magma-si/src/main/scala/components/MultSwitch.scala",
+          "local_folder": "MultSwitch",
+          "local_file": "MultSwitch/MultSwitch.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "magma-si/src/main/scala/components/Regor.scala",
+          "local_folder": "Regor",
+          "local_file": "Regor/Regor.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": []
+        },
+        {
+          "path": "riscv-self/src/main/scala/RegFile.scala",
+          "local_folder": "RegFile",
+          "local_file": "RegFile/RegFile.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "RegFile/RegFileTargetSpec.scala"
+          ]
+        },
+        {
+          "path": "FPGA-Application-Development-and-Simulation/chisel/src/main/scala/loywong/encoder.scala",
+          "local_folder": "encoder",
+          "local_file": "encoder/encoder.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "encoder/EncoderTargetSpec.scala"
+          ]
+        },
+        {
+          "path": "MultiScalarMultiplication/src/main/scala/MSM/PMNaive.scala",
+          "local_folder": "PMNaive",
+          "local_file": "PMNaive/PMNaive.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": []
+        },
+        {
+          "path": "Pythia-HDL/src/main/scala/pythia/MaxN.scala",
+          "local_folder": "MaxN",
+          "local_file": "MaxN/MaxN.scala",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "MaxN/MaxNTargetSpec.scala"
+          ]
+        },
+        {
+          "path": "magma-si/src/main/scala/components/AdderSwitch.scala",
+          "local_folder": "AdderSwitch",
+          "local_file": "AdderSwitch/AdderSwitch.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "ChiselAIA/src/main/scala/APLIC.scala",
+          "local_folder": "APLIC",
+          "local_file": "APLIC/APLIC.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "MultiScalarMultiplication/src/main/scala/MSM/PAddReduction.scala",
+          "local_folder": "PAddReduction",
+          "local_file": "PAddReduction/PAddReduction.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "Pythia-HDL/src/main/scala/pythia/MasterModule.scala",
+          "local_folder": "MasterModule",
+          "local_file": "MasterModule/MasterModule.scala",
+          "in_current_test_split": true,
+          "dut_available": false,
+          "target_marker_present": false,
+          "available_testbench_files": []
+        },
+        {
+          "path": "Pythia-HDL/src/main/scala/pythia/Plane.scala",
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+          ]
+        },
+        {
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+          "local_folder": "regionizer",
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+          ]
+        },
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+          "path": "DTQR-HLS/1D/tsqr_df.cpp",
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+          "path": "vivado_hls/anisotropic_diff/core.cpp",
+          "local_folder": "core_2",
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+        },
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+          "path": "HLS_FPGA/HLS_MAC_accel.cpp",
+          "local_folder": "HLS_MAC_accel",
+          "local_file": "HLS_MAC_accel/HLS_MAC_accel.cpp",
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+            "HLS_MAC_accel/HLS_MAC_accel_target_tb.cpp"
+          ]
+        },
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+          "path": "HLS_FPGA/lock_free_SPSCq.cpp",
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+          ]
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+          "path": "HLS_FPGA/rf_doppler_spoof_engine.cpp",
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+          ]
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+        {
+          "path": "Fast-Float4HLS/examples/bubble_sort/bubble_sort.cpp",
+          "local_folder": "bubble_sort",
+          "local_file": "bubble_sort/bubble_sort.cpp",
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+          "path": "DTQR-HLS/2D/dtqr2d.cpp",
+          "local_folder": "dtqr2d",
+          "local_file": "dtqr2d/dtqr2d.cpp",
+          "in_current_test_split": true,
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+            "dtqr2d/dtqr2d_original_tb.cpp"
+          ]
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+          "path": "hls_tutorial_examples/example_0/xilinx/Example0.cpp",
+          "local_folder": "Example0",
+          "local_file": "Example0/Example0.cpp",
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+          "local_folder": "fft_1",
+          "local_file": "fft_1/fft_1.cpp",
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+            "fft_1/fft_1_original_tb.cpp"
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+        },
+        {
+          "path": "hls_tutorial_examples/example_5/xilinx/Test.cpp",
+          "local_folder": "Test5",
+          "local_file": "Test5/Test5.cpp",
+          "in_current_test_split": true,
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+            "Test5/Test5_original_tb.cpp"
+          ]
+        },
+        {
+          "path": "hls_tutorial_examples/example_2/xilinx/Test.cpp",
+          "local_folder": "Test2",
+          "local_file": "Test2/Test2.cpp",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "Test2/Test2_original_tb.cpp"
+          ]
+        },
+        {
+          "path": "hls_tutorial_examples/example_3/xilinx/Test.cpp",
+          "local_folder": "Test3",
+          "local_file": "Test3/Test3.cpp",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "Test3/Test3_original_tb.cpp"
+          ]
+        },
+        {
+          "path": "HestonModel_MonteCarlo/common/volatilityData.cpp",
+          "local_folder": "volatilityData",
+          "local_file": "volatilityData/volatilityData.cpp",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "volatilityData/volatilityData_original_tb.cpp"
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+        {
+          "path": "High-Level-Synthesis/FFT/main.cpp",
+          "local_folder": "FFT_main",
+          "local_file": "FFT_main/FFT_main.cpp",
+          "in_current_test_split": true,
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+          "path": "hl5/soft/common/syscalls.c",
+          "local_folder": "syscalls_memset",
+          "local_file": "syscalls_memset/syscalls_memset.cpp",
+          "in_current_test_split": true,
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+        },
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+          "path": "HLS-CNN/Code/04-C/dense.c",
+          "local_folder": "dense_c",
+          "local_file": "dense_c/dense_c.cpp",
+          "in_current_test_split": true,
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+          "available_testbench_files": [
+            "dense_c/dense_c_original_tb.cpp"
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+          "path": "GlobalCorrelator_HLS/vertexing/firmware/bram_hist_vtx.cpp",
+          "local_folder": "bram_hist_vtx",
+          "local_file": "bram_hist_vtx/bram_hist_vtx.cpp",
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+          "available_testbench_files": [
+            "bram_hist_vtx/bram_hist_vtx_original_tb.cpp"
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+        {
+          "path": "ACA-HLS/Final/Encrypted Computing/ACA-Final-Team1-Encrypted-Computing-main/src/kernel/K_mov.cpp",
+          "local_folder": "K_mov",
+          "local_file": "K_mov/K_mov.cpp",
+          "in_current_test_split": true,
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+            "K_mov/K_mov_original_tb.cpp"
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+        },
+        {
+          "path": "HLS-CNN/Code/05-Vitis-HLS/pool.cc",
+          "local_folder": "pool_cc",
+          "local_file": "pool_cc/pool_cc.cpp",
+          "in_current_test_split": true,
+          "dut_available": true,
+          "target_marker_present": true,
+          "available_testbench_files": [
+            "pool_cc/pool_cc_original_tb.cpp"
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+        },
+        {
+          "path": "High-Level-Synthesis/FFT/fft.cpp",
+          "local_folder": "fft_cpp",
+          "local_file": "fft_cpp/fft_cpp.cpp",
+          "in_current_test_split": true,
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+          "available_testbench_files": [
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+          ]
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+        {
+          "path": "SDAI/source/SDAI/activation.h",
+          "local_folder": "activation_sigmoid",
+          "local_file": "activation_sigmoid/activation_sigmoid.cpp",
+          "in_current_test_split": true,
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+        {
+          "path": "hls-crypto/PRESENT/naive-lutsbox/present.cpp",
+          "local_folder": "present_perm",
+          "local_file": "present_perm/present_perm.cpp",
+          "in_current_test_split": true,
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+            "present_perm/present_perm_original_tb.cpp"
+          ]
+        }
+      ]
+    }
+  }
+}

resources/functional_testbenches.tar.gz

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resources/resource_manifest.json

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+{
+  "dataset": "MHRC-Bench",
+  "dataset_url": "https://huggingface.co/datasets/Zanehpn/MHRC-Bench",
+  "source_archive": {
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+    "extract_directory": "original_repositories",
+    "layout": "{language}/{repository}/...",
+    "description": "Existing repository snapshot archive, retained at an immutable revision. Large archive; use only if repository sources are required."
+  },
+  "testbenches": {
+    "url": "https://huggingface.co/datasets/OvertureMMXXI/HDL-RepoBench-Sample/resolve/main/resources/functional_testbenches.tar.gz",
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+    }
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+  "mirror_url": "https://huggingface.co/datasets/OvertureMMXXI/HDL-RepoBench-Sample"
+}

samples/README.md

@@ -0,0 +1,10 @@
+# Small inspection examples
+
+Eight existing test examples (two per language), preserving their original JSON fields and values. These examples demonstrate the file format and are not an evaluation subset. The selection rule, task paths, and checksums are in [manifest.json](manifest.json).
+
+- [chisel.jsonl](chisel.jsonl): 2 records, 934 bytes.
+- [systemverilog.jsonl](systemverilog.jsonl): 2 records, 769 bytes.
+- [vhdl.jsonl](vhdl.jsonl): 2 records, 1,261 bytes.
+- [hls.jsonl](hls.jsonl): 2 records, 809 bytes.
+
+Source code retains its upstream attribution and license terms. See [LICENSE.md](../LICENSE.md) and the [repository inventory](../provenance/repositories.json).

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