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AUCOHL_Lighter_pr16
Minimal fail-to-pass extraction for AUCOHL/Lighter PR 16, "bug fix in FF Mapping cells". The reduced snapshot models the sky130 `\$dffe` mapping cell. The buggy mapping feeds `EN` directly into the clock-gate cell and ignores `EN_POLARITY`, so an active-low enable does not capture data. The patch adds the polarity-a...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AUCOHL_Lighter_pr16
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AUCOHL_Lighter_pr16.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AUCOHL_Lighter_pr16
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AUCOHL_Lighter_pr16
AsFigo_pyslint_pr138
# SVA: expect construct usage - compatibility issue - Source URL: https://github.com/AsFigo/pyslint/issues/136 https://verificationacademy.com/forums/systemverilog/expect-assertion#answer-117075 ```verilog module test; bit req1,req2; bit clk; always #5 clk=~clk; initial begin #100; ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr138
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr138.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr138
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr138
AsFigo_pyslint_pr140
# SV: post/pre randomize return value check - COMPAT issue - Source URL: https://github.com/AsFigo/pyslint/issues/139 ```verilog class gen_c; rand bit b; function pre_randomize(); endfunction function post_randomize(); endfunction endclass : gen_c ``` Above code works fine in one but not in all others. ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr140
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr140.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr140
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr140
AsFigo_pyslint_pr149
# DPI - checks needed inside interface context - Source URL: https://github.com/AsFigo/pyslint/issues/147 DPI checks to be added for interface context. ```verilog interface af_sv_if; import "DPI" function int c_sum(); endinterface : af_sv_if ``` ## PR Content from GitHub # Pull Request Summary **PR Title:** DPI...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr149
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr149.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr149
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr149
AsFigo_pyslint_pr164
# Avoid begin..end around timing control - Source URL: https://github.com/AsFigo/pyslint/issues/161 https://verificationacademy.com/forums/systemverilog/memory-read-showing-xxx-values-apb-verification#reply-117165 ```verilog task Write(); begin @(negedge pclk) begin psel = 1; penb = 0; fo...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr164
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr164.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr164
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr164
AsFigo_pyslint_pr166
# VLT: no clocking blocks in interface - Source URL: https://github.com/AsFigo/pyslint/issues/165 Verilator does not support clocking block based driving (as of today). Add a rule to check. ## PR Content from GitHub # PR Summary **PR Title:** Added rule for CB check for Verilator issue 165 **PR Number:** #166 **...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr166
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr166.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr166
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr166
AsFigo_pyslint_pr167
# Avoid begin..end around task/function - Source URL: https://github.com/AsFigo/pyslint/issues/160 ```verilog task Write(); begin $display("PADDR %h, PWDATA %h ",paddr,pwdata); end endtask ``` ## PR Content from GitHub # GitHub Pull Request Summary **PR Title:** Support for issue 160 added **PR Number:** #1...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr167
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr167.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr167
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr167
AsFigo_pyslint_pr169
# COMPAT rule - function with ref arg shall be automatic - Source URL: https://github.com/AsFigo/pyslint/issues/159 Add a new rule to check that functions with ref arguments are declared automatic. ```verilog module x; integer x1; function func (ref integer a[]); $display ("%p", a); endfunction ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr169
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr169.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr169
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr169
AsFigo_pyslint_pr175
# COMPAT SVA missing ; - Source URL: https://github.com/AsFigo/pyslint/issues/174 ```verilog module m; bit clk, a, b; property p_ex; @(posedge clk) a |=> b endproperty : p_ex endmodule : m ``` ## PR Content from GitHub # GitHub Pull Request Summary **PR Title:** Added rule 174 - COMPAT **PR Number:** ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr175
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr175.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr175
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr175
AsFigo_pyslint_pr180
# COMPAT - class parameter default value missing check - Source URL: https://github.com/AsFigo/pyslint/issues/178 ```verilog class abstract_ifc #(int cwidth=1, int awidth=2, int dwidth); endclass ``` LOG ```log Omitting the assignment to constant_param_expression in a param_assignment in a parameter_port_list cur...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr180
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr180.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr180
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr180
AsFigo_pyslint_pr185
# CNST - add new rule - Source URL: https://github.com/AsFigo/pyslint/issues/184 ```verilog class bli_c; bit foo_sel; rand int foo; constraint cst_1 { foo == (foo_sel) ? 5 :6; } function void post_randomize(); $display ("%p", this); endfunction endclass module m; bli_c ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr185
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr185.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr185
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr185
AsFigo_pyslint_pr56
# REUSE_NO_TDEF_IN_MOD - check for typedef inside module - Source URL: https://github.com/AsFigo/pyslint/issues/55 **Is your feature request related to a new rule? Please describe.** Any typedef inside module scope would lead to reuse issues. Example: https://www.linkedin.com/posts/petermonsson_verification-systemve...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/AsFigo_pyslint_pr56
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/AsFigo_pyslint_pr56.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/AsFigo_pyslint_pr56
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/AsFigo_pyslint_pr56
FPGA-MAFIA_fpga_mafia_pr428
# change csr names and design to fit the spec - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/421 make changes both to core_rrv and rv32i_ref PR Title: add cycle and instret User mode csr's PR Number: #428 Status: Merged Author: roman012285 Merge Details: Merged on January 14, 2024, from branch core_rr...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr428
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr428.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr428
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr428
FPGA-MAFIA_fpga_mafia_pr429
# sc_core - screen is broken, and there is no reference model in TB - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/423 2 things to fix: 1) add a reference model and EOT check to make sure IP is running correctly 2) Make sure the display works. (have a dedicated memory region for VGA space) PR Title: i...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr429
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr429.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr429
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr429
FPGA-MAFIA_fpga_mafia_pr449
# Remove the Parameter override from the build. - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/441 https://github.com/FPGA-MAFIA/fpga_mafia/blob/931deaa13c92a1fe5d29dee95ba23c76531a68f2/build.py#L241C16-L241C16 I think there is room for creating a script that can override the parameter value by name...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr449
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr449.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr449
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr449
FPGA-MAFIA_fpga_mafia_pr451
# Remove the Parameter override from the build. - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/441 https://github.com/FPGA-MAFIA/fpga_mafia/blob/931deaa13c92a1fe5d29dee95ba23c76531a68f2/build.py#L241C16-L241C16 I think there is room for creating a script that can override the parameter value by name...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr451
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr451.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr451
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr451
FPGA-MAFIA_fpga_mafia_pr452
# change the directory structure in the verification - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/442 The directory structure in the verification is a little strange and i think it can be improved. The idea is that we will have the same main directory as the RTL. Meaning the content of the "verif/ca...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr452
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr452.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr452
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr452
FPGA-MAFIA_fpga_mafia_pr465
# add HW interrupt support to core_rrv - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/437 The interrupt will start when one of the counters will reach a predefined value. PR Title: fix issues we talked about csr Description: The contributor implemented an initial version that executes instructions on...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr465
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr465.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr465
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr465
FPGA-MAFIA_fpga_mafia_pr473
# Disable correctly the interrupts & restore correctly the enable bits - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/471 ![image](https://github.com/FPGA-MAFIA/fpga_mafia/assets/81047407/f3c2ce04-1feb-4806-879b-0bba8f41c702) This is wrong - after mret we dont need to enable the "csr_mie" this way.. ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr473
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr473.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr473
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr473
FPGA-MAFIA_fpga_mafia_pr479
# core_rrv - create a dedicated test for the timer interrupt during a illegal instruction trap - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/477 Create a test that has both "illegal instruction trap" and "timer interrupts". I am hoping to see hit this case: - illegal instruction trap exception handl...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr479
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr479.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr479
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr479
FPGA-MAFIA_fpga_mafia_pr495
# rvc_sample_csr - this is not a name we should use for the specific csr read of 0xb00 and 0xb02 - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/489 Acording to the spec - done we have a "correct" name for the mcycle and instret? Please revisit this and fix the name, the way we use it, where we use it, ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr495
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr495.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr495
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr495
FPGA-MAFIA_fpga_mafia_pr499
# remove nop from mini_core rv32e/i configuration fails to pass sanity test - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/497 `python build.py -dut 'mini_core' -regress rv32i_level0 -app -hw -sim -keep_going` ./build.py -cfg mini_rv32i -dut mini_core -test basic -app -hw -sim -clean when nothing writ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr499
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr499.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr499
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr499
FPGA-MAFIA_fpga_mafia_pr548
# Add a-j to print function in vga lib - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/531 PR Title: charcters a-k and more Status: Merged Author: jacobavitan837 Merge Details: Merged 2 commits from jacob_branch into main on March 11, 2024 by roman012285 Description: The PR extends the graphic VGA libr...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr548
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr548.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr548
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr548
FPGA-MAFIA_fpga_mafia_pr559
# rrv_core - Add a assertion for illegal memory access region. - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/498 We should add an assertion making sure that if we have a load/store its for a d_mem/cr/vga region.. (this would ease debugging when the SW tries to access the wrong memory space completely....
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr559
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr559.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr559
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr559
FPGA-MAFIA_fpga_mafia_pr638
# writing MC (memory controller) for communication between host and SDRAM - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/611 ** Goal - Create communication interface between host computer and SDRAM ** requirements - The controller will receive 128bit data (cache line) and transfer it to SDRAM at 16bit...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr638
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr638.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr638
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr638
FPGA-MAFIA_fpga_mafia_pr646
# add M extension to big_core - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/648 - implement multiplication in HW in straight forward manner. We do that because FPGA has dedicated multipliers - implement division as exception trap PR Title: add m_extension support Status: Merged Merged by: amichai-bd...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr646
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr646.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr646
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr646
FPGA-MAFIA_fpga_mafia_pr655
# Cache - support partiol read/write (byte enable) - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/583 Cache - support partial read/write (byte enable) LHU, LBU, LW,LH,LB SW,SH,SB Also, support signed and unsigned extends for the memory load request. PR Title: modify chach_tasks.vh to support random pa...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr655
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr655.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr655
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr655
FPGA-MAFIA_fpga_mafia_pr680
# Refactor the CR memory space - Source URL: https://github.com/FPGA-MAFIA/fpga_mafia/issues/679 ## Issue Title Refactor the CR memory space ## Issue Description Create a simple struct for the all CR! This shold solve the error in the readafter write issue we have. (The issue proposes organizing the Control Registe...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/FPGA-MAFIA_fpga_mafia_pr680
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/FPGA-MAFIA_fpga_mafia_pr680.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/FPGA-MAFIA_fpga_mafia_pr680
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/FPGA-MAFIA_fpga_mafia_pr680
HiSA-Team_Simply-V_pr102
# [bugfix/sync_pbus_interrupts] Add synchronizers for PBUS interrupts - Source URL: https://github.com/HiSA-Team/Simply-V/issues/101 ## Issue Title [bugfix/sync_pbus_interrupts] Add synchronizers for PBUS interrupts ## Issue Description During CDC (#91) we forgot to re-synchronize PBUS outgoing interrupts to the MAI...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr102
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr102.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr102
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr102
HiSA-Team_Simply-V_pr108
# [feature/rv64/rtl] RV64: RTL & IPs adjustments - Source URL: https://github.com/HiSA-Team/Simply-V/issues/86 **UninaSoC RTL** - [x] header files (`svh`) for protocols can work with adjusting the DATA_WIDTH, STRB and ID. To do so, let's remove parameters (as they are not used) and move to parametric macros and dec...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr108
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr108.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr108
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr108
HiSA-Team_Simply-V_pr118
# [Submission] <hidden> 2025 - Source URL: https://github.com/HiSA-Team/Simply-V/issues/65 ## Issue Title [Submission] <hidden> 2025 ## Issue Description This issue tracks all the technical tasks for the <hidden> submission. Paper evaluation tasks: - CPU Benchmark (tacle-bench) - HLS integration - HLS peripheral it...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr118
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr118.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr118
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr118
HiSA-Team_Simply-V_pr129
# [feature/rv64/cv64a6] RV64: Integrate CV64A6 - Source URL: https://github.com/HiSA-Team/Simply-V/issues/82 Integrating CV64A6 **Generic** - [x] Rebase on Main - [x] Restore HBUS behaviour and revert openocd **Hardware** - [x] Integrate CV64A6 in the socket - [x] Integrate JTAG2AXI DWIDTH converter - [x] Fix RTL: ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr129
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr129.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr129
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr129
HiSA-Team_Simply-V_pr147
# [feature/rv64/microblazev] Integrate RV64 version of Microblaze-V - Source URL: https://github.com/HiSA-Team/Simply-V/issues/114 ## Issue Title [feature/rv64/microblazev] Integrate RV64 version of Microblaze-V ## Issue Description Assigned to Salvatore Santoro. Add microblaze_riscv_rv64 Xilinx IP (UG1629). W.r.t...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr147
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr147.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr147
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr147
HiSA-Team_Simply-V_pr166
# [feature/rvv/ara] Integrate PULP Ara for RVV support - Source URL: https://github.com/HiSA-Team/Simply-V/issues/119 ## Issue Title [feature/rvv/ara] Integrate PULP Ara for RVV support ## Issue Description - Need finalized CVA6 support - Integrate CVA6 + Ara as a single custom IP (different than standalone cv64a6) ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr166
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr166.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr166
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr166
HiSA-Team_Simply-V_pr184
# [feature/axi_cdma/basic][student] Basic AXI CDMA integration - Source URL: https://github.com/HiSA-Team/Simply-V/issues/162 ## Issue Title [feature/axi_cdma/basic][student] Basic AXI CDMA integration ## Issue Description Assigned to Michele Giugliano. Integration design diagram is attached. See parent issue #153 ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr184
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr184.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr184
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr184
HiSA-Team_Simply-V_pr48
# [feature/debug_module] Integrate RISC-V debug module - Source URL: https://github.com/HiSA-Team/Simply-V/issues/22 ## Issue Title [feature/debug_module] Integrate RISC-V debug module ## Issue Description Add RISC-V debug module (https://github.com/pulp-platform/riscv-dbg/tree/v0.8.1) and expose it on Xilinx scanch...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr48
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr48.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr48
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr48
HiSA-Team_Simply-V_pr52
# [feature/core_selection] Add core selection to Make flow - Source URL: https://github.com/HiSA-Team/Simply-V/issues/20 ## Issue Title [feature/core_selection] Add core selection to Make flow ## Issue Description Add core selection to Make flow for RVM socket CORE_SELECTION parameter. ## Issue Comments None visibl...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr52
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr52.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr52
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr52
HiSA-Team_Simply-V_pr68
# [debug/plic] Fix PLIC integration - Source URL: https://github.com/HiSA-Team/Simply-V/issues/50 ## Issue Title [debug/plic] Fix PLIC integration ## Issue Description No description provided. ## Issue Comments None visible. ## Issue Metadata - Status: Closed - Assignee: Granp4sso - Milestone: MCU release ## Link...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr68
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr68.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr68
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr68
HiSA-Team_Simply-V_pr92
# [feature/cores/ibex] Integrate Ibex core as custom IP - Source URL: https://github.com/HiSA-Team/Simply-V/issues/66 ## Issue Title [feature/cores/ibex] Integrate Ibex core as custom IP ## Issue Description From https://github.com/lowRISC/ibex. Issues: - which release? - which DTM to use? from PULP or ibex-demo-sy...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/HiSA-Team_Simply-V_pr92
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/HiSA-Team_Simply-V_pr92.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/HiSA-Team_Simply-V_pr92
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/HiSA-Team_Simply-V_pr92
IEEE-UCF_Gaming-CPU-Project_pr42
# Subsystem: Design RAM Handler - Source URL: https://github.com/IEEE-UCF/Gaming-CPU-Project/issues/27 **Purpose:** Orchestrate Double Data Rate (DDR) interactions between RAM and CPU system, including booting from ROM and connecting to AXI **Main File(s)** - [SRAM Dualport](https://github.com/IEEE-UCF/Gaming-CPU-...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/IEEE-UCF_Gaming-CPU-Project_pr42
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/IEEE-UCF_Gaming-CPU-Project_pr42.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/IEEE-UCF_Gaming-CPU-Project_pr42
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/IEEE-UCF_Gaming-CPU-Project_pr42
KestrelComputer_polaris_pr21
Datasheet assumes the user knows how to instantiate the processor in Verilog. And they probably do. However, in the interests of professionalism, I'd like to see an example Verilog application of the processor included in the data sheet showing how it's typically used. Simple RAM memory; 4KB ought to be way more than...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/KestrelComputer_polaris_pr21
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/KestrelComputer_polaris_pr21.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/KestrelComputer_polaris_pr21
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/KestrelComputer_polaris_pr21
KestrelComputer_polaris_pr22
# Support SLT/SLTU instructions - Source URL: https://github.com/KestrelComputer/polaris/pull/22 The SLT and SLTU instructions are decoded. However, the driver signals are never propagated to the ALU. Moreover, I don't think the ALU itself has SLT/SLTU functionality baked into it just yet. Write bench tests to check...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/KestrelComputer_polaris_pr22
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/KestrelComputer_polaris_pr22.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/KestrelComputer_polaris_pr22
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/KestrelComputer_polaris_pr22
Lampro-Mellon_LM-RISCV-DV_pr81
# Enable Verilator in the RTL Simulation Flow for SweRV integration - Source URL: https://github.com/Lampro-Mellon/LM-RISCV-DV/issues/69 ## Fetched Issue/PR Details Title: Enable Verilator in the RTL Simulation Flow for SweRV integration (#69) Description: No description was provided in the original issue. Status...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Lampro-Mellon_LM-RISCV-DV_pr81
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Lampro-Mellon_LM-RISCV-DV_pr81.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Lampro-Mellon_LM-RISCV-DV_pr81
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Lampro-Mellon_LM-RISCV-DV_pr81
MPSU_APS_pr98
# 6 лабораторная - Source URL: https://github.com/MPSU/APS/issues/94 Не указано, что для работы симуляции память должна называться "ram", иначе выдаст ошибку. --- ## Pull Request **PR Title:** WIP: APS cumulative update **PR Number:** #98 **Status:** Merged on September 2, 2024 **Author:** HepoH3 ### Descripti...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MPSU_APS_pr98
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MPSU_APS_pr98.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MPSU_APS_pr98
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MPSU_APS_pr98
MiSTer-devel_Arcade-Robotron_MiSTer_pr25
# Core is outputting at 296 x 243... - Source URL: https://github.com/MiSTer-devel/Arcade-Robotron_MiSTer/issues/24 ...instead of 292 x 240 and as such doesn't seem to want to scale to 720p. ## Fetched Issue/PR Details Title: Core is outputting at 296 x 243... (#24) Description: The core outputs a resolution of 29...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Arcade-Robotron_MiSTer_pr25
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Arcade-Robotron_MiSTer_pr25.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Arcade-Robotron_MiSTer_pr25
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Arcade-Robotron_MiSTer_pr25
MiSTer-devel_C64_MiSTer_pr142
# Arctic Shipwreck crashes on start - Source URL: https://github.com/MiSTer-devel/C64_MiSTer/issues/107 TOSEC — Commodore C64 - Games - [D64]: Arctic Shipwreck (1983)(Commodore).d64 crc=684e5568 md5=aa9d3ed98bf0fe0b459626a1ff02bad1 sha1=a2139a5df6d949a4c402b726bd9f8bf11007a222 This game crashes on start, attempting ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_C64_MiSTer_pr142
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_C64_MiSTer_pr142.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_C64_MiSTer_pr142
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_C64_MiSTer_pr142
MiSTer-devel_Gameboy_MiSTer_pr216
# Perfect Dark (GBC) - No PCM Sound - Source URL: https://github.com/MiSTer-devel/Gameboy_MiSTer/issues/87 In the GBC game Perfect Dark the PCM sound (which plays a relatively big part in this game) does not work. Steps to reproduce: press start a few times once the game boots in order to select a new game and have ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Gameboy_MiSTer_pr216
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Gameboy_MiSTer_pr216.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Gameboy_MiSTer_pr216
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Gameboy_MiSTer_pr216
MiSTer-devel_Gameboy_MiSTer_pr24
# SRAM management - Source URL: https://github.com/MiSTer-devel/Gameboy_MiSTer/issues/13 Is it possible to import/export SRAM data? ## Fetched Issue/PR Details Title: SRAM management (#13) Description: "Is it possible to import/export SRAM data?" Author: catskull Date Opened: December 1, 2018 Status: Closed Relat...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Gameboy_MiSTer_pr24
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Gameboy_MiSTer_pr24.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Gameboy_MiSTer_pr24
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Gameboy_MiSTer_pr24
MiSTer-devel_Gameboy_MiSTer_pr240
# Save states save and load to the wrong save state slot - Source URL: https://github.com/MiSTer-devel/Gameboy_MiSTer/issues/174 @RobertPeip, I have found an interesting menu issue that seems to affect all cores save states implemented in them. To reproduce this issue choose a save state slot 2, 3, or 4 and save y...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Gameboy_MiSTer_pr240
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Gameboy_MiSTer_pr240.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Gameboy_MiSTer_pr240
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Gameboy_MiSTer_pr240
MiSTer-devel_Gameboy_MiSTer_pr52
# Loading B/W games with GBC hardware set results in severe gfx glitches - Source URL: https://github.com/MiSTer-devel/Gameboy_MiSTer/issues/45 So, when you load up a standard non-colour game in a real GBC, you get the standard boot intro and then the game loads with a predetermined palette if the game ID is found in...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Gameboy_MiSTer_pr52
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Gameboy_MiSTer_pr52.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Gameboy_MiSTer_pr52
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Gameboy_MiSTer_pr52
MiSTer-devel_Gameboy_MiSTer_pr96
# Spot: title music and sound effects aren’t right - Source URL: https://github.com/MiSTer-devel/Gameboy_MiSTer/issues/51 Both the title music and the gameplay sound effects contain high-pitched noises and distortion that are not correct. --- ## Pull Request **PR Title:** SOUND: multiple Wave channel fixes and GB/...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Gameboy_MiSTer_pr96
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Gameboy_MiSTer_pr96.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Gameboy_MiSTer_pr96
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Gameboy_MiSTer_pr96
MiSTer-devel_Genesis_MiSTer_pr144
# [MISSING ISSUE] MiSTer-devel/Genesis_MiSTer#143 - Source URL: https://github.com/MiSTer-devel/Genesis_MiSTer/issues/143 - Note: Issue content not available via API (recorded in missing_issues.*) Failed to fetch issue content. Reason: graphql_error Details: {"reason": "graphql_error", "errors": [{"type": "NOT_FOUND"...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Genesis_MiSTer_pr144
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Genesis_MiSTer_pr144.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Genesis_MiSTer_pr144
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Genesis_MiSTer_pr144
MiSTer-devel_Genesis_MiSTer_pr160
# [MISSING ISSUE] MiSTer-devel/Genesis_MiSTer#154 - Source URL: https://github.com/MiSTer-devel/Genesis_MiSTer/issues/154 - Note: Issue content not available via API (recorded in missing_issues.*) Failed to fetch issue content. Reason: graphql_error Details: {"reason": "graphql_error", "errors": [{"type": "NOT_FOUND"...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Genesis_MiSTer_pr160
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Genesis_MiSTer_pr160.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Genesis_MiSTer_pr160
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Genesis_MiSTer_pr160
MiSTer-devel_MegaDrive_MiSTer_pr58
# Incorrect button mapping for Master System games Using a Mega Drive controller to play Master System games on either Mega Drive or Master System hardware, the Master System buttons 1 and 2 map to Mega Drive B and C respectively. This is also handled correctly by the core using controllers via SNAC. However, MiSTer ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_MegaDrive_MiSTer_pr58
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_MegaDrive_MiSTer_pr58.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_MegaDrive_MiSTer_pr58
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_MegaDrive_MiSTer_pr58
MiSTer-devel_NES_MiSTer_pr121
# Digital Devil Monogatari Megami Tensei #76 - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/120 the game is crashing after game intro Mapper 76 only NES_20181207.rbf works good --- ## Pull Request **PR Title:** mapper 76 mirroring adjustment #121 **PR Number:** #121 **Status:** Merged **Author:...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr121
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr121.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr121
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr121
MiSTer-devel_NES_MiSTer_pr132
# Maharaja (FC): Visual Glitches on boot. - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/131 Game has visual glitches on boot and when in game is mainly a black screen with some glitched sprites. --- ## Pull Request **PR Title:** Fix mapper 68 mirroring, add battery WRAM support **PR Number:** #...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr132
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr132.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr132
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr132
MiSTer-devel_NES_MiSTer_pr135
# Indiana Jones 3 glitchy title screen - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/129 Indiana Jones and The Last Crusade (Taito) shows some flickering lines that shouldn't be there in the title screen. --- ## Pull Request **PR Title:** Timing fixes **PR Number:** #135 **Status:** Merged on S...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr135
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr135.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr135
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr135
MiSTer-devel_NES_MiSTer_pr147
# Twin Dragons graphics corruption - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/146 In Twin Dragons ([https://www.brokestudio.fr/en/shop/twin-dragons-2/](url)) you encounter signs that activate a tutorial screen. Exiting out of one will result in a corrupted screen. Walking away and back restores t...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr147
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr147.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr147
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr147
MiSTer-devel_NES_MiSTer_pr187
# Glitchy line in StarTropics - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/149 Can be seen in dungeons in the HUD, here's a video, it's in the bottom right near the hearts: https://streamable.com/upnul Video of console to compare: https://youtu.be/8b7x30_E0Ko?t=168 I noticed in the footage of the...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr187
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr187.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr187
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr187
MiSTer-devel_NES_MiSTer_pr436
# More Glider (mapper 30) - continue feature not functioning - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/435 MiSTer Main: 20250828 NES core: 20251013 More Glider (USA) (Aftermarket) (Unl).nes CRC32: 4ED588CE More Glider is an aftermarket NES game released by retroUSB, inspired by a classic share...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr436
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr436.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr436
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr436
MiSTer-devel_NES_MiSTer_pr438
# Dungeons & DoomKnights (mapper #30) won't save - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/282 This game was made with NESMaker and it uses mapper 30 + some very obnoxious way of saving ("self-flashing"): https://github.com/SourMesen/Mesen/issues/753 Having at least save state enabled for Mapp...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr438
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr438.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr438
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr438
MiSTer-devel_NES_MiSTer_pr441
# Mapper 64 (RAMBO-1) Klax graphic glitches - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/439 Reported through Reddit: https://www.reddit.com/r/MiSTerFPGA/comments/1oguj3h/klax_usa_on_nes_core_graphics_issue/ https://github.com/user-attachments/assets/7943bcf7-c733-480c-bffd-2271be30bc34 --- ## P...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr441
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr441.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr441
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr441
MiSTer-devel_NES_MiSTer_pr448
# Mapper 243 has corrupted graphics (Honey Peach) - Source URL: https://github.com/MiSTer-devel/NES_MiSTer/issues/446 Mapper 243 is listed as being both supported and with save states, but the only game that it supports, Honey Peach, has corrupted graphics. --- ## Pull Request **PR Title:** Mapper 141: Add 8KB unb...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_NES_MiSTer_pr448
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_NES_MiSTer_pr448.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_NES_MiSTer_pr448
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_NES_MiSTer_pr448
MiSTer-devel_S32X_MiSTer_pr42
# Star Wars Arcade hangs in second level - Source URL: https://github.com/MiSTer-devel/S32X_MiSTer/issues/12 Got up to the second level where you destroy TIE fighters with the Star Destroyers attacking you. It froze after about thirty seconds of play with the music still going. After leaving it for about a few minut...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_S32X_MiSTer_pr42
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_S32X_MiSTer_pr42.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_S32X_MiSTer_pr42
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_S32X_MiSTer_pr42
MiSTer-devel_S32X_MiSTer_pr44
# Amazing Spider-Man, The - Web of Fire (USA) hang on first level - Source URL: https://github.com/MiSTer-devel/S32X_MiSTer/issues/9 The game hang on first level. Amazing Spider-Man, The - Web of Fire (USA) CRC: 29DCE257 ![IMG_20220421_111050](https://user-images.githubusercontent.com/52424890/164453950-d9b95872-d53...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_S32X_MiSTer_pr44
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_S32X_MiSTer_pr44.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_S32X_MiSTer_pr44
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_S32X_MiSTer_pr44
MiSTer-devel_Saturn_MiSTer_pr249
# [FEATURE REQUEST] (Shuttle) Mouse support - Source URL: https://github.com/MiSTer-devel/Saturn_MiSTer/issues/146 Some users have asked on the Discord if it would be possible to support the Shuttle mouse (or even just a more basic mouse) on the core in the future. --- ## Pull Request **PR Title:** Shuttle mouse s...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_Saturn_MiSTer_pr249
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_Saturn_MiSTer_pr249.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_Saturn_MiSTer_pr249
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_Saturn_MiSTer_pr249
MiSTer-devel_ao486_MiSTer_pr118
# King's Quest VII won't go to menu after core update - Source URL: https://github.com/MiSTer-devel/ao486_MiSTer/issues/117 Full discussion here https://misterfpga.org/viewtopic.php?p=49685#p49685 Game freeze befor geting to the menu. Logo works fine but after that there is a soft freeze. Last working core was from...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_ao486_MiSTer_pr118
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_ao486_MiSTer_pr118.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_ao486_MiSTer_pr118
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_ao486_MiSTer_pr118
MiSTer-devel_ao486_MiSTer_pr172
# BOOM and Allegro freeze - Source URL: https://github.com/MiSTer-devel/ao486_MiSTer/issues/128 Tested in working DOS 6.22 and FreeDOS environments. All versions of BOOM and Allegro (ASETUP, the setup EXE) freeze when I try to run them. It locks at a blinking cursor, I've waited for 10 minutes or so. (DOOM and DOOM2...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_ao486_MiSTer_pr172
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_ao486_MiSTer_pr172.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_ao486_MiSTer_pr172
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_ao486_MiSTer_pr172
MiSTer-devel_ao486_MiSTer_pr185
# HIRAM issue with Release 20241227 - Source URL: https://github.com/MiSTer-devel/ao486_MiSTer/issues/177 HIRAM does not seem to work in the latest release (20241227). For example, the top300 image with the previous core release in HIRAM mode had 627K of base memory: The exact same image and settings with the late...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_ao486_MiSTer_pr185
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_ao486_MiSTer_pr185.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_ao486_MiSTer_pr185
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_ao486_MiSTer_pr185
MiSTer-devel_ao486_MiSTer_pr188
# Last OPL music note keeps playing forever on core reboot - Source URL: https://github.com/MiSTer-devel/ao486_MiSTer/issues/174 Hello there, I noticed that, as the tittle says, if a program is playing an OPL music note an the core is reboot, that last note keeps sounding forever, until a new program resets the OPL....
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_ao486_MiSTer_pr188
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_ao486_MiSTer_pr188.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_ao486_MiSTer_pr188
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_ao486_MiSTer_pr188
MiSTer-devel_ao486_MiSTer_pr72
# Tie Fighter CD Joystick buttons not responding - Source URL: https://github.com/MiSTer-devel/ao486_MiSTer/issues/30 After the update from August 16th 2020 the Joystick is finally detected in Tie Fighter CD but it isn't responding to any button press. It works fine in X-Wing and Tie Figher. ## Fetched Issue/PR Deta...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTer-devel_ao486_MiSTer_pr72
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTer-devel_ao486_MiSTer_pr72.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTer-devel_ao486_MiSTer_pr72
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTer-devel_ao486_MiSTer_pr72
MiSTle-Dev_MiSTeryNano_pr99
# Does second hid joystick work? - Source URL: https://github.com/MiSTle-Dev/MiSTeryNano/issues/97 I've connected two USB gamepads via raspberry pico and I see in logs JOY0 and JOY1 that send command to FPGA, but when I wanted to test two joysticks in a game. Second one never works, so I tried to understand if second...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/MiSTle-Dev_MiSTeryNano_pr99
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/MiSTle-Dev_MiSTeryNano_pr99.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/MiSTle-Dev_MiSTeryNano_pr99
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/MiSTle-Dev_MiSTeryNano_pr99
Multimedia-Processing_Digital-Logic-Design_pr46
# 6-3 多工器與解多工器的實習 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/44 1. 明瞭多工器的原理與電路設計的方法 2. 明瞭解多工器的原理與電路設計的方法 3. 學習解多工器與解碼器的互用方式 4. 學習直接套用制式IC完成所需 --- ## Pull Request **PR Title:** 44 ch6 3 multiplexer and demultiplexer **PR Number:** #46 **Status:** Merged on November 19, 2020...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr46
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr46.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr46
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr46
Multimedia-Processing_Digital-Logic-Design_pr48
# 6-3 多工器與解多工器的實習 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/44 1. 明瞭多工器的原理與電路設計的方法 2. 明瞭解多工器的原理與電路設計的方法 3. 學習解多工器與解碼器的互用方式 4. 學習直接套用制式IC完成所需 --- ## Pull Request **PR Title:** 47 verilog hdl practice ch4 **PR Number:** #48 **Status:** Merged on November 19, 2020 **Author:...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr48
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr48.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr48
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr48
Multimedia-Processing_Digital-Logic-Design_pr50
# Verilog硬體描述語言實務 第二版 Chapter4 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/47 - 4-1 基本邏輯閘 - 4-2 實例說明 練習題 - [x] 1 - [x] 2 --- ## Pull Request **PR Title:** 47 verilog hdl practice ch4 **PR Number:** #50 **Status:** Merged on November 27, 2020 **Author:** timmy61109 ### D...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr50
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr50.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr50
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr50
Multimedia-Processing_Digital-Logic-Design_pr60
# Verilog硬體描述語言實務 第二版 Chapter5 資料留層次之敘述 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/52 - assign連續指定 - 運算子 - 綜合範例 --- ## Pull Request **PR Title:** Verilog硬體描述語言實務 第二版 Chapter5 資料留層次之敘述 (#60) **PR Number:** #60 **Status:** Merged on December 17, 2020 ### Description The pu...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr60
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr60.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr60
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr60
Multimedia-Processing_Digital-Logic-Design_pr62
# Verilog硬體描述語言實務 第二版 Chapter6 行為層次之敘述 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/61 Title: Verilog硬體描述語言實務 第二版 Chapter6 行為層次之敘述 #61 Body: - 6-1 always 程序結構區塊 - 6-2 阻隔性與非阻隔性指定敘述 - 6-3 if-else敘述 - 6-4 case、casez與casex敘述 - 6-5 迴圈敘述 Comments: None Linked PR: #62 (closed) Metad...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr62
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr62.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr62
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr62
Multimedia-Processing_Digital-Logic-Design_pr65
# Chapter02 Verilog RTL 程式設計 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/54 Title: Chapter02 Verilog RTL 程式設計 #54 Body: - 2.1 Verilog語言與RTL描述 - 2.2 Verilog描述敘述對應電路 - 2.3 如何進行RTL設計 - 2.4 RTL設計要點 - 2.5 UART序列埠通訊設計實例 Comments: None Metadata: - Assignee: timmy61109 - Labels: docu...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr65
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr65.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr65
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr65
Multimedia-Processing_Digital-Logic-Design_pr68
# 第七章 組合邏輯電路設計 - Source URL: https://github.com/Multimedia-Processing/Digital-Logic-Design/issues/67 Title: 第七章 組合邏輯電路設計 #67 Body: 組合邏輯電路(Combinational Logic Circuit) Comments: None Linked PR: #68 (closed) Metadata: - Assignee: timmy61109 - Labels: documentation, enhancement - Milestone: Verilog硬體描述語言實務 第二版 - Sta...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Multimedia-Processing_Digital-Logic-Design_pr68
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Multimedia-Processing_Digital-Logic-Design_pr68.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Multimedia-Processing_Digital-Logic-Design_pr68
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Multimedia-Processing_Digital-Logic-Design_pr68
OpenPOWERFoundation_a2o_pr18
# Fix uncompliant begin in generate blocks Instance: OpenPOWERFoundation_a2o_pr18 Source: https://github.com/OpenPOWERFoundation/a2o/pull/18 Fetched: 2026-04-26 Repository: OpenPOWERFoundation/a2o Pull request: #18 Author: flaviens State: closed Base branch: master Head branch: fix_begin_genvar Created: 2022-10-26T08:...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/OpenPOWERFoundation_a2o_pr18
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/OpenPOWERFoundation_a2o_pr18.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/OpenPOWERFoundation_a2o_pr18
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/OpenPOWERFoundation_a2o_pr18
Panda-Cores_PandaZero_pr14
# C programs Instance: Panda-Cores_PandaZero_pr14 Source: https://github.com/Panda-Cores/PandaZero/pull/14 Fetched: 2026-05-03 Repository: Panda-Cores/PandaZero Pull request: #14 Author: GorgeousWalrus State: closed Base branch: master Head branch: c_programs Created: 2020-08-05 Updated: 2020-08-05 Closed: 2020-08-05 ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Panda-Cores_PandaZero_pr14
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Panda-Cores_PandaZero_pr14.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Panda-Cores_PandaZero_pr14
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Panda-Cores_PandaZero_pr14
Panda-Cores_PandaZero_pr3
# Wishbone integration Instance: Panda-Cores_PandaZero_pr3 Source: https://github.com/Panda-Cores/PandaZero/pull/3 Fetched: 2026-05-03 Repository: Panda-Cores/PandaZero Pull request: #3 Author: GorgeousWalrus State: closed Base branch: master Head branch: wishbone_integration Created: 2020-07-25 Updated: 2020-08-05 Cl...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Panda-Cores_PandaZero_pr3
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Panda-Cores_PandaZero_pr3.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Panda-Cores_PandaZero_pr3
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Panda-Cores_PandaZero_pr3
Panda-Cores_PandaZero_pr4
# Dbg module Instance: Panda-Cores_PandaZero_pr4 Source: https://github.com/Panda-Cores/PandaZero/pull/4 Fetched: 2026-05-03 Repository: Panda-Cores/PandaZero Pull request: #4 Author: GorgeousWalrus State: closed Base branch: master Head branch: dbg_module Created: 2020-07-29 Updated: 2020-07-29 Closed: 2020-07-29 Mer...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Panda-Cores_PandaZero_pr4
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Panda-Cores_PandaZero_pr4.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Panda-Cores_PandaZero_pr4
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Panda-Cores_PandaZero_pr4
Panda-Cores_PandaZero_pr7
# Dbg module Instance: Panda-Cores_PandaZero_pr7 Source: https://github.com/Panda-Cores/PandaZero/pull/7 Fetched: 2026-05-03 Repository: Panda-Cores/PandaZero Pull request: #7 Author: GorgeousWalrus State: closed Base branch: master Head branch: dbg_module Created: 2020-08-02 Updated: 2020-08-02 Closed: 2020-08-02 Mer...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/Panda-Cores_PandaZero_pr7
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/Panda-Cores_PandaZero_pr7.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/Panda-Cores_PandaZero_pr7
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/Panda-Cores_PandaZero_pr7
PeterMonsson_sv_waveterm_pr10
# Clean up examples Instance: PeterMonsson_sv_waveterm_pr10 Source: https://github.com/PeterMonsson/sv_waveterm/pull/10 Fetched: 2026-05-03 Repository: PeterMonsson/sv_waveterm Pull request: #10 Author: PeterMonsson State: closed Base branch: main Head branch: clean-up-examples Created: 2023-04-01 Updated: 2023-04-07 ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/PeterMonsson_sv_waveterm_pr10
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/PeterMonsson_sv_waveterm_pr10.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/PeterMonsson_sv_waveterm_pr10
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/PeterMonsson_sv_waveterm_pr10
SpiNNakerManchester_spif_pr8
# SpiNNaker peripheral output support - Source URL: https://github.com/SpiNNakerManchester/spif/issues/4 spif does __not__ currently support SpiNNaker peripheral output. Some of the hardware is already in place: - The SpiNNaker FPGAs __do__ support peripheral output. The routing is done using peripheral routing...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/SpiNNakerManchester_spif_pr8
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/SpiNNakerManchester_spif_pr8.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/SpiNNakerManchester_spif_pr8
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/SpiNNakerManchester_spif_pr8
SpiNNakerManchester_spio_pr40
# packet store goes empty incorrectly - Source URL: https://github.com/SpiNNakerManchester/spio/issues/39 Thanks to Will Toms, University of Manchester, for spotting and diagnosing this bug. The packet store read pointer **br** and the next packet sequence number **bpkt_seq** are **not** updated in the same clock cy...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/SpiNNakerManchester_spio_pr40
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/SpiNNakerManchester_spio_pr40.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/SpiNNakerManchester_spio_pr40
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/SpiNNakerManchester_spio_pr40
StanfordVLSI_dragonphy2_pr122
# Generate "update" signal for adc_unfolding directly, rather than through clock division circuitry - Source URL: https://github.com/StanfordVLSI/dragonphy2/issues/106 At the moment, we generate the ``update`` signal used in ``adc_unfolding`` by sampling ``clk_avg`` with ``clk_retimer`` and then generating a one-cycl...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/StanfordVLSI_dragonphy2_pr122
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/StanfordVLSI_dragonphy2_pr122.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/StanfordVLSI_dragonphy2_pr122
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/StanfordVLSI_dragonphy2_pr122
StanfordVLSI_dragonphy2_pr126
# Add method to trigger ADC dump without external pin - Source URL: https://github.com/StanfordVLSI/dragonphy2/issues/13 As I understand it, this would make lab testing easier PR title: Small fixes Source: https://github.com/StanfordVLSI/dragonphy2/pull/126 PR description: This PR addresses three open i...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/StanfordVLSI_dragonphy2_pr126
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/StanfordVLSI_dragonphy2_pr126.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/StanfordVLSI_dragonphy2_pr126
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/StanfordVLSI_dragonphy2_pr126
StanfordVLSI_dragonphy2_pr141
# Remove combo logic loop in qr_4t1_mux_top - Source URL: https://github.com/StanfordVLSI/dragonphy2/issues/140 There is currently a combo logic loop in ``qr_4t1_mux_top``, where ``data`` appears on both the ``RHS`` and ``LHS`` of an ``assign`` statement: https://github.com/StanfordVLSI/dragonphy2/blob/1f1c97ba5f5244...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/StanfordVLSI_dragonphy2_pr141
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/StanfordVLSI_dragonphy2_pr141.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/StanfordVLSI_dragonphy2_pr141
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/StanfordVLSI_dragonphy2_pr141
StanfordVLSI_dragonphy2_pr90
# Update handling of Vcal net - Source URL: https://github.com/StanfordVLSI/dragonphy2/issues/32 In ButterPHY, we used a custom nettype for modeling the Vcal net, which can be driven externally or internally by a bias generator. In DragonPHY, we're trying to support Xcelium and Vivado for most simulations, so this f...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/StanfordVLSI_dragonphy2_pr90
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/StanfordVLSI_dragonphy2_pr90.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/StanfordVLSI_dragonphy2_pr90
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/StanfordVLSI_dragonphy2_pr90
StanfordVLSI_dragonphy2_pr94
# Add integration test for MDLL - Source URL: https://github.com/StanfordVLSI/dragonphy2/issues/93 It does not appear that we have a test of the MDLL integration, since ``sel_clk_source`` defaults to ``0``, which selects ``in`` (``ext_clk``) rather than ``in_mdll``: https://github.com/StanfordVLSI/dragonphy2/blob/da6...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/StanfordVLSI_dragonphy2_pr94
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/StanfordVLSI_dragonphy2_pr94.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/StanfordVLSI_dragonphy2_pr94
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/StanfordVLSI_dragonphy2_pr94
UTOSS_risc-v_pr107
# Set up basic execution environment for running on DE1-SoC Instance: UTOSS_risc-v_pr107 Source: https://github.com/UTOSS/risc-v/pull/107 Fetched: 2026-05-03 Repository: UTOSS/risc-v Pull request: #107 Author: TheDeepestSpace State: closed Base branch: main Head branch: boris/basic-execution-environment Created: 2025-...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/UTOSS_risc-v_pr107
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/UTOSS_risc-v_pr107.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/UTOSS_risc-v_pr107
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/UTOSS_risc-v_pr107
UTOSS_risc-v_pr114
# Implement structured logging - Source URL: https://github.com/UTOSS/risc-v/issues/60 As the core gets bigger and more complicated, VCD diagrams will become harder to read especially at the top level. I think it would be good to have some sort of logging capability built into processor at least during development st...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/UTOSS_risc-v_pr114
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/UTOSS_risc-v_pr114.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/UTOSS_risc-v_pr114
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/UTOSS_risc-v_pr114
UTOSS_risc-v_pr115
# some basic simplification for the decode module Instance: UTOSS_risc-v_pr115 Source: https://github.com/UTOSS/risc-v/pull/115 Fetched: 2026-05-03 Repository: UTOSS/risc-v Pull request: #115 Author: Invisipac State: closed Base branch: main Head branch: simplify-decode Created: 2025-11-08 Updated: 2025-11-30 Closed: ...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/UTOSS_risc-v_pr115
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/UTOSS_risc-v_pr115.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/UTOSS_risc-v_pr115
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/UTOSS_risc-v_pr115
UTOSS_risc-v_pr127
# Fence added, and all riscof passed Instance: UTOSS_risc-v_pr127 Source: https://github.com/UTOSS/risc-v/pull/127 Fetched: 2026-05-03 Repository: UTOSS/risc-v Pull request: #127 Author: RunzeZhu28 State: closed Base branch: main Head branch: tony-fence Created: 2025-11-14 Updated: 2025-11-16 Closed: 2025-11-16 Merged...
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/issues/UTOSS_risc-v_pr127
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/resolve/957dca0fb6d4316f0c298a5589f65795b38eeee6/patches/UTOSS_risc-v_pr127.patch
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/snapshots/UTOSS_risc-v_pr127
https://huggingface.co/datasets/OvertureMMXXI/Phoenix-Bench/tree/957dca0fb6d4316f0c298a5589f65795b38eeee6/testbench/UTOSS_risc-v_pr127
End of preview. Expand in Data Studio

Phoenix-Bench

Phoenix-Bench is a collection of 511 hardware-engineering issue-resolution instances. Each instance connects an issue description, a source snapshot, a developer patch, and a testbench directory through the same instance identifier.

Contents and layout

Path Contents
issues/<instance_id> Released issue text; some records include PR text or reproducer notes.
snapshots/<instance_id>/ Source snapshot associated with the task.
patches/<instance_id>.patch Reference developer patch; evaluation material, not an agent input.
testbench/<instance_id>/ Per-instance verification scripts, test sources, and available logs.
testbench/_* Shared verification helpers.
data/test.jsonl 511-row index explicitly selected by the dataset viewer.
examples/ Three small inspection examples, copied from the evaluation corpus.
f2p_full_sweep_2026-05-27.csv Historical verification sweep; its date identifies the run, not a guarantee for later toolchain versions.

The viewer contains a lightweight index, not all repository sources. The full artifact directories remain available under Files and versions. The explicit JSONL configuration prevents unrelated CSV, source, and metadata files from being inferred as incompatible dataset splits.

Schema and split

There is one configuration, default, and one evaluation split, test, containing all 511 instances. No training or validation partition is defined. The examples are a subset of test, not additional independent evaluation instances.

Field Type Meaning
instance_id string Shared identifier connecting the four artifact locations.
issue_text string Full released issue text, without rewriting or truncation.
issue_url string Revision-pinned download URL for the original issue text.
developer_patch_url string Revision-pinned download URL for the reference patch.
snapshot_url string Revision-pinned source-directory browser URL.
testbench_url string Revision-pinned verification-directory browser URL.

The index follows the 511-instance record set in the published Croissant file. Issue bytes were checked against its SHA-256 values. Artifact links retain that metadata's fixed revision, 957dca0fb6d4316f0c298a5589f65795b38eeee6; adding this index does not modify task content or evaluation outcomes.

Load and inspect

from datasets import load_dataset

tasks = load_dataset("OvertureMMXXI/Phoenix-Bench", split="test")
assert len(tasks) == 511
print(tasks[0]["instance_id"])
print(tasks[0]["issue_text"])

To download just the three small inspection examples:

from huggingface_hub import snapshot_download

snapshot_download(
    repo_id="OvertureMMXXI/Phoenix-Bench",
    repo_type="dataset",
    allow_patterns=["examples/**"],
    local_dir="phoenix-sample",
)

These samples contain issue descriptions, developer patches, and links to the associated source/testbench directories. They support inspecting data quality without downloading the full dataset; they are not self-contained runnable environments or a representative performance subset.

To retrieve one instance's artifacts, retain their relative directory structure:

from huggingface_hub import snapshot_download

case = "AUCOHL_Lighter_pr16"
snapshot_download(
    repo_id="OvertureMMXXI/Phoenix-Bench",
    repo_type="dataset",
    revision="957dca0fb6d4316f0c298a5589f65795b38eeee6",
    allow_patterns=[
        f"issues/{case}", f"patches/{case}.patch",
        f"snapshots/{case}/**", f"testbench/{case}/**", "testbench/_*",
    ],
    local_dir="phoenix-data",
)

Follow the code repository for toolchain setup and evaluation commands. Runner requirements vary by instance; loading the JSONL index does not execute verification. Pin both the dataset revision and code commit when reporting results. Keep reference patches and verification internals separate from the agent's editable workspace.

Collection, intended use, and limitations

Instances originate from public hardware repositories and associated issue/PR material. Use the corpus to evaluate repository-level hardware maintenance and repair under the released verification conditions. It covers Verilog/SystemVerilog and open-source EDA workflows; it does not establish performance on proprietary industrial IP, every HDL, or complete physical-design/sign-off flows.

Public-source selection and filtering can bias coverage toward particular projects and task types. Issue descriptions vary in completeness, and some include reference PR content that may expose repair information. Inspect and document prompt construction; do not assume every raw text field is leakage-free. Public repository material may also have appeared in model training data. Passing the provided checks is not proof of unrestricted hardware correctness or deployment safety.

Better evaluation can support more reliable hardware maintenance, but incorrectly accepted patches can introduce functional or security defects. Use independent review and appropriate engineering verification before deployment. Source material may retain public contributor names, usernames, emails, and attribution. Detailed collection provenance, bias, use-case, and social-impact notes are provided in the Croissant RAI fields; any synthetic-data classification there should be interpreted in conjunction with the construction of verification artifacts described in the paper.

Licensing

The published Croissant file lists MIT for Phoenix-Bench's own contribution. Redistributed repository snapshots, patches, and attribution material retain their respective upstream terms; this is not a blanket MIT relicensing of upstream sources. Inspect the license and NOTICE files associated with each source repository before reuse. A consolidated per-instance upstream-license inventory has not been added by this viewer/documentation update.

Maintenance

Report dataset access or packaging issues through the dataset discussions, and code issues through the public GitHub repository. Include the instance identifier and dataset/code revisions.

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