repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
intel-xpu-backend-for-triton | github_2023 | python | 3,604 | intel | whitneywhtsang | @@ -0,0 +1,157 @@
+import torch
+import triton
+import triton.language as tl
+
+import triton_kernels_benchmark as benchmark_suit
+
+
+@triton.jit
+def dot_scale_kernel(a_base, stride_a0, stride_a1, a_scale, b_base, stride_b0, stride_b1, b_scale, out,
+ BLOCK_M: tl.constexpr, BLOCK_N: tl.constexpr, ... | ```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,538 | intel | chengjunlu | @@ -69,7 +69,7 @@ class DecomposeScaledBlocked : public OpRewritePattern<DotScaledOp> {
}
TypedValue<RankedTensorType> scaleTo16(PatternRewriter &rewriter,
- TypedValue<RankedTensorType> scale,
+ TypedValue<RankedTensorType> &scale, | Why do we need return the updated scale in this function specific? Is it required for AMD or NV as well? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,538 | intel | chengjunlu | @@ -0,0 +1,261 @@
+#include "Dialect/TritonIntelGPU/Transforms/DecomposeScaledBlocked.h"
+
+#include "mlir/IR/Types.h"
+#include "mlir/IR/Value.h"
+#include "mlir/Support/LogicalResult.h"
+#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
+
+#include "triton/Dialect/Triton/IR/Dialect.h"
+#include "triton/Dialect/... | There is no change to make the `scale` to be a reference. So why we need to change it on common code? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,508 | intel | alexbaden | @@ -1,6 +1,7 @@
#ifndef TRITON_CONVERSION_TRITONGPU_TO_ELEMENTWISE_OP_H
#define TRITON_CONVERSION_TRITONGPU_TO_ELEMENTWISE_OP_H
+#include "intel/include/Dialect/TritonIntelGPU/IR/Attributes.h" | It is probably better to duplicate this code than to introduce the cross-dialect include. Is the call site for this function w/in the Intel dialect? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,508 | intel | alexbaden | @@ -86,7 +87,8 @@ class ElementwiseOpConversionBase : public ConvertOpToLLVMPattern<SourceOp> {
return resultVals;
while (auto sliced = dyn_cast<SliceEncodingAttr>(baseEncoding))
baseEncoding = sliced.getParent();
- if (isa<LinearEncodingAttr, DotOperandEncodingAttr>(baseEncoding)) {
+ if (isa<... | Can you add the problematic branches below to this PR, so we understand why we have to take the early out here? |
intel-xpu-backend-for-triton | github_2023 | others | 3,547 | intel | anmyachev | @@ -8,7 +8,7 @@ on:
type: string
default: ""
suite:
- description: Space separated lists of test suites, all if empty
+ description: Space separated lists of test suites or "all"
type: string
default: "" | ```suggestion
default: "all"
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,516 | intel | whitneywhtsang | @@ -0,0 +1,94 @@
+ | remove |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,516 | intel | whitneywhtsang | @@ -0,0 +1,316 @@
+#include "intel/include/Dialect/Triton/Transforms/Passes.h"
+#include "intel/include/Utils/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/SCF/IR/SCF.h"
+#include "mlir/IR/Verifier.h"
+// #include "mlir/Pass/Pass.h" | remove |
intel-xpu-backend-for-triton | github_2023 | others | 3,534 | intel | anmyachev | @@ -59,17 +59,29 @@ endif()
# used conditionally in this file and by lit tests
# Customized release build type with assertions: TritonRelBuildWithAsserts
-if(NOT MSVC) | Shouldn't `icx` have gone through this branch? |
intel-xpu-backend-for-triton | github_2023 | others | 3,515 | intel | etiotto | @@ -1,4 +1,5 @@
// RUN: triton-opt %s -split-input-file --intel-allocate-shared-memory --convert-triton-intel-gpu-to-llvm --cse -canonicalize | FileCheck %s
+// XFAIL: * | I think the test should be changed according to the new codegen. Can be done in a separate PR, just open an issue to track it. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,507 | intel | whitneywhtsang | @@ -216,15 +216,19 @@ void init_triton_intel(py::module &&m) {
});
// May do this after llvm ir according to user fmath flag.
- m.def("set_fast_math", [](mlir::ModuleOp mod) {
- using namespace mlir;
- MLIRContext *ctx = mod.getContext();
- mod.walk([&](Operation *op) {
- if (auto fmIf = dyn_cast... | use a walker on `FPMathOperator`? |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,507 | intel | whitneywhtsang | @@ -216,15 +216,19 @@ void init_triton_intel(py::module &&m) {
});
// May do this after llvm ir according to user fmath flag. | Since this PR moves it to LLVMIR, we can remove this comment. |
intel-xpu-backend-for-triton | github_2023 | others | 3,315 | intel | mfrancepillois | @@ -16,7 +14,9 @@ module {
%4:2 = scf.for %arg3 = %c0_i32 to %c4_i32 step %c1_i32 iter_args(%arg4 = %0, %arg5 = %0) -> (tensor<4xi32>, tensor<4xi32>) : i32 {
%5 = arith.cmpi slt, %arg4, %1 : tensor<4xi32>
%6 = tt.addptr %2, %arg4 : tensor<4x!tt.ptr<f32>>, tensor<4xi32>
- %7 = tt.load %6, %5, %c... | Not sure to understand what is this point of removing the mask here.
As I understand it, the purpose of the test is to test the pass's ability to handle load/store with masks. So, if we remove the mask because masks are not handled yet, not sure it makes sense to keep the test. |
intel-xpu-backend-for-triton | github_2023 | others | 3,315 | intel | mfrancepillois | @@ -56,18 +54,13 @@ module {
}
// CHECK: tt.func @kernel([[PARAM_0_:%.+]]: !tt.ptr<bf16>) {
-// CHECK-DAG: [[CST_2_:%.+]] = arith.constant 2 : index
-// CHECK-DAG: [[CST_3_:%.+]] = arith.constant 3 : index
-// CHECK-DAG: [[CST_1024_:%.+]] = arith.constant 1024 : index
-// CHECK-DAG: ... | Does that mean that we do not plan to support case when we have an `expandDimOp` in the loop soon-ish? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,476 | intel | whitneywhtsang | @@ -489,6 +489,235 @@ static llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
}
#endif
+// Utility class aggregating information required to create a versioning
+// condition.
+class VersioningCondition {
+public:
+ VersioningCondition(Value S, Value BS) : S(S), BS(BS) {
+ assert(isValid() && "Invalid value... | wonder if something like below would work
```suggestion
if (!isa<IntegerType>(SType, BSType))
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,476 | intel | whitneywhtsang | @@ -489,6 +489,235 @@ static llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
}
#endif
+// Utility class aggregating information required to create a versioning
+// condition.
+class VersioningCondition {
+public:
+ VersioningCondition(Value S, Value BS) : S(S), BS(BS) {
+ assert(isValid() && "Invalid value... | maybe return a Boolean to indicate if versioning happened? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,476 | intel | whitneywhtsang | @@ -489,6 +489,235 @@ static llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
}
#endif
+// Utility class aggregating information required to create a versioning
+// condition.
+class VersioningCondition {
+public:
+ VersioningCondition(Value S, Value BS) : S(S), BS(BS) {
+ assert(isValid() && "Invalid value... | Why the first part of the condition is not covered by the second part of the condition?
```suggestion
if (forOp->getParentOp()->template getParentOfType<scf::ForOp>())
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,476 | intel | whitneywhtsang | @@ -489,6 +489,235 @@ static llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
}
#endif
+// Utility class aggregating information required to create a versioning
+// condition.
+class VersioningCondition {
+public:
+ VersioningCondition(Value S, Value BS) : S(S), BS(BS) {
+ assert(isValid() && "Invalid value... | remove commended out code |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,476 | intel | mfrancepillois | @@ -489,6 +489,232 @@ static llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
}
#endif
+// Utility class aggregating information required to create a versioning
+// condition.
+class VersioningCondition {
+public:
+ VersioningCondition(Value S, Value BS) : S(S), BS(BS) {
+ assert(isValid() && "Invalid value... | Does the order of the operands really matter here?
both `i*END` or `END*i` are valid, no? |
intel-xpu-backend-for-triton | github_2023 | python | 3,467 | intel | whitneywhtsang | @@ -334,9 +345,9 @@ def benchmark(B, M, N, K, dtype, provider):
if not dtype.is_floating_point:
# Torch does not support integer calculation in matmul
torch_fn = lambda: torch.matmul(a.to(device='cpu', dtype=res_dtype), b.to(device='cpu', dtype=res_dtype)
- ... | Do you know if there is any performance impact? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,428 | intel | chengjunlu | @@ -2240,11 +2240,14 @@ SmallVector<unsigned> DotOperandEncodingAttr::getRepOrder() const {
SmallVector<unsigned> DotOperandEncodingAttr::getThreadsPerWarp() const {
if (auto mma = mlir::dyn_cast<MmaEncodingTrait>(getParent())) {
return mma.getThreadsPerWarpForOperand(getOpIdx());
+ } else if (auto dpas = mli... | The DPAS inherits the `MmaEncodingTrait`. There is no need to add this extra branch. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,428 | intel | chengjunlu | @@ -159,9 +159,10 @@ DpasEncodingAttr::getRepOrderForOperand(OpIdx opIdx) const {
SmallVector<unsigned>
DpasEncodingAttr::getThreadsPerWarpForOperand(int opIdx) const {
- llvm::report_fatal_error(
- "getThreadsPerWarpForOperand not implemented for DpasEncodingAttr");
- return {};
+ size_t rank = getWarpsPer... | We need to implement this as the DPAS documentation. In case, need to support `threadsPerWarp=32` case. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,428 | intel | chengjunlu | @@ -133,55 +133,10 @@ struct LocalLoadOpConversion : public ConvertOpToLLVMPattern<LocalLoadOp> {
ConversionPatternRewriter &rewriter) const override {
RankedTensorType dstTy = op.getType();
Attribute dstLayout = dstTy.getEncoding();
- if (isa<DotOperandEncodingAttr>(dstLayout)) { | It has been a long time to sync the lowering code to the upstream code.
Is the `MemoryOpToLLVM.cpp` same to the one of upstream?
if it is the same, we can remove the Intel's copy and reuse the upstream one. (Since we have support the LL already. )
|
intel-xpu-backend-for-triton | github_2023 | cpp | 3,428 | intel | chengjunlu | @@ -159,9 +159,7 @@ DpasEncodingAttr::getRepOrderForOperand(OpIdx opIdx) const {
SmallVector<unsigned>
DpasEncodingAttr::getThreadsPerWarpForOperand(int opIdx) const {
- llvm::report_fatal_error(
- "getThreadsPerWarpForOperand not implemented for DpasEncodingAttr");
- return {};
+ return getThreadsPerWarp()... | The `getThreadsPerWarp` returns the ranked threadPerWarp size for the C and D.
It maybe aligned to the operand B.
But maybe in-correct for the operand A in some case: `systolic_depth=8`, `ops_per_chan=1`. The rank 2 threadsPerWarp for A operand maybe [32/8, 8] |
intel-xpu-backend-for-triton | github_2023 | others | 3,428 | intel | whitneywhtsang | @@ -5,3 +5,5 @@ test/unit/language/test_core.py::test_scaled_dot[128-32-64-True-True-True-e4m3-b
test/unit/language/test_core.py::test_scaled_dot[32-64-128-False-False-True-e5m2-bf16-4-16-1]
test/unit/language/test_core.py::test_scaled_dot[64-32-64-False-False-True-e4m3-fp16-4-16-1]
test/unit/language/test_core.py::... | Why are there additional scaled_dot failures? Are they passing with LLVM Opt at O0? |
intel-xpu-backend-for-triton | github_2023 | others | 3,468 | intel | anmyachev | @@ -15,23 +29,20 @@ on:
paths:
- third_party/intel/backend/driver.py
- schedule:
- - cron: "3 5 * * *"
-
permissions: read-all
env:
PYTHONIOENCODING: utf-8
NEW_WORKSPACE: C:\gh${{ github.run_id }}
ZE_PATH: C:\level_zero
PYTEST_MAX_PROCESSES: 8
- SKIPLIST: --skip-list scripts/skiplist/... | Why do you delete `a770` in one file and add `a770` in another? |
intel-xpu-backend-for-triton | github_2023 | others | 3,397 | intel | whitneywhtsang | @@ -6,21 +6,29 @@ llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_
// CHECK: llvm.func @triton_gen.2Dblockload(%arg0: !llvm.ptr<1>, %arg1: i32, %arg2: i32, %arg3: i32, %arg4: i32, %arg5: i32) {
// CHECK: [[EIGHT:%.*]] = llvm.mlir.constant(8 : i32) : i32
// CHECK-NEXT: [[DE... | as `ADD_0` is not defined, suggested to
```suggestion
// CHECK: llvm.call spir_funccc @_Z41intel_sub_group_2d_block_read_8b_16r32x1cPU3AS1viiiDv2_iPt(%arg0, %{{.*}}, %arg2, %arg3, {{.*}}, [[DEST:%.*]]) {{.*}} : (!llvm.ptr<1>{{.*}}, i32, i32, i32, vector<2xi32>, !llvm.ptr{{.*}}) -> ()
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,397 | intel | whitneywhtsang | @@ -444,16 +444,27 @@ struct TritonMatrix2DBlockLoadLowering
fnName = "_Z" + std::to_string(fnName.size()) + fnName + "PU3AS1viiiDv2_iP";
fnName +=
intel::getTypeMangling(resType.getElementType(), /*isUnsigned=*/true);
+
+ // compensate the non-64 byte aligned base.
+ Value baseAddr = op.getPtr... | Please check, if it doesn't, let's replace to codegen to use `shr` directly. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,452 | intel | alexbaden | @@ -693,6 +693,23 @@ OpFoldResult ExpandDimsOp::fold(FoldAdaptor adaptor) {
}
//-- ReshapeOp --
+
+void ReshapeOp::build(OpBuilder &builder, OperationState &state,
+ ArrayRef<int64_t> shape,
+ TypedValue<RankedTensorType> src) {
+ auto srcTy = src.getType();
+ auto srcEnc... | This is not implemented for the Intel dialect. How does this call succeed? |
intel-xpu-backend-for-triton | github_2023 | others | 3,444 | intel | anmyachev | @@ -47,11 +58,15 @@ jobs:
run:
python -m venv .venv
- # FIXME: the runner has PyTorch wheels pre-compiled from sources in a specific location
- name: Install PyTorch (source)
run: |
.venv\Scripts\activate.ps1
- pip install (Get-Item C:\pytorch\dist\*.whl)
+... | What is the error without this flag? |
intel-xpu-backend-for-triton | github_2023 | others | 3,444 | intel | anmyachev | @@ -125,50 +134,83 @@ fi
############################################################################
# Configure, build and install PyTorch from source.
+BASE=$(cd "$ROOT/.." && pwd)
SCRIPTS_DIR=$ROOT/scripts
-BASE=$ROOT/.scripts_cache | This will complicate resource cleanup. |
intel-xpu-backend-for-triton | github_2023 | others | 3,444 | intel | anmyachev | @@ -125,50 +134,83 @@ fi
############################################################################
# Configure, build and install PyTorch from source.
+BASE=$(cd "$ROOT/.." && pwd)
SCRIPTS_DIR=$ROOT/scripts
-BASE=$ROOT/.scripts_cache
-PYTORCH_PROJ=$BASE/pytorch
+PYTORCH_PROJ=${PYTORCH_PROJ:-$BASE/pytorch}
+BASE... | It seems more expected to return 1 if the file exists and zero if it doesn't. Why did you decide to do it this way? |
intel-xpu-backend-for-triton | github_2023 | python | 3,441 | intel | anmyachev | @@ -6653,7 +6654,7 @@ def loop_kernel(Z, N: tl.constexpr, step: tl.constexpr):
@pytest.mark.interpreter
-def test_tl_range(device): | Let's remove it from mtl skiplist |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,387 | intel | etiotto | @@ -46,6 +47,16 @@ inline unsigned getNumElementsPerThread(
inline bool applyTransposedReduction() {
return tools::getBoolEnv("TRITON_INTEL_REDUCE_TRANSPOSE");
}
+
+// Check if module's target arch is SPIRV.
+inline bool hasSpirvTargetArch(Operation *op) {
+ if (!isa<ModuleOp>(op))
+ op = op->getParentOfType<M... | Add an assert message pls. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,387 | intel | etiotto | @@ -46,6 +47,16 @@ inline unsigned getNumElementsPerThread(
inline bool applyTransposedReduction() {
return tools::getBoolEnv("TRITON_INTEL_REDUCE_TRANSPOSE");
}
+
+// Check if module's target arch is SPIRV.
+inline bool hasSpirvTargetArch(Operation *op) { | Should we require the user to pass a `ModuleOp` rather than a generic operation ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,416 | intel | whitneywhtsang | @@ -572,8 +577,12 @@ struct TritonRaiseBlockPointer
auto canBeRewrittenUsingBlockPtr = [&](Operation *op) {
return TypeSwitch<Operation *, bool>(op)
- .Case<tt::AddPtrOp, tt::LoadOp, tt::StoreOp>(
- [](auto) { return true; })
+ .Case<tt::AddPtrOp>([](auto) { return true; })
... | These two cases can likely be combined. |
intel-xpu-backend-for-triton | github_2023 | others | 3,229 | intel | whitneywhtsang | @@ -132,6 +132,7 @@ build_llvm() {
-DCMAKE_BUILD_TYPE=Release \
-DLLVM_ENABLE_ASSERTIONS=true \
-DLLVM_ENABLE_PROJECTS="mlir" \
+ -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=SPIRV \ | Given that SPIRV backend is no longer an experimental target, and LLVM commit is updated recently https://github.com/intel/intel-xpu-backend-for-triton/blob/main/cmake/llvm-hash.txt, do we still need this change? |
intel-xpu-backend-for-triton | github_2023 | others | 3,229 | intel | whitneywhtsang | @@ -1,17 +1,38 @@
# SPIRV-LLVM-Translator is required.
find_package(SPIRVToLLVMTranslator)
-add_mlir_translation_library(TritonSPIRV
- SPIRVTranslation.cpp
+# Check if there is the LLVM SPIR-V backend.
+is_llvm_target_library("SPIRV" spirv_present_result INCLUDED_TARGETS) | When would SPIRV backend not exists after SPIRV backend moved out of experimental? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,229 | intel | jopperm | @@ -11,6 +11,83 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/Triple.h"
+
+#if defined(LLVM_SPIRV_BACKEND_TARGET_PRESENT)
+namespace llvm {
+
+using namespace llvm;
+using namespace SPIRV;
+
+extern "C" bool
+SPIRVT... | I stumbled over this during review. It makes sense after finding https://github.com/llvm/llvm-project/pull/107216, but maybe you could also add a short comment here to explain the situation. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,229 | intel | jopperm | @@ -11,6 +11,83 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/Triple.h"
+
+#if defined(LLVM_SPIRV_BACKEND_TARGET_PRESENT)
+namespace llvm {
+
+using namespace llvm;
+using namespace SPIRV;
+
+extern "C" bool
+SPIRVT... | Do we need to enable all extensions? |
intel-xpu-backend-for-triton | github_2023 | others | 3,229 | intel | jopperm | @@ -1,17 +1,38 @@
# SPIRV-LLVM-Translator is required.
find_package(SPIRVToLLVMTranslator)
-add_mlir_translation_library(TritonSPIRV
- SPIRVTranslation.cpp
+# Check if there is the LLVM SPIR-V backend.
+is_llvm_target_library("SPIRV" spirv_present_result INCLUDED_TARGETS)
- LINK_COMPONENTS
- ... | Nit: Indentation looks off. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,229 | intel | etiotto | @@ -11,6 +11,98 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/Triple.h"
+
+#if defined(LLVM_SPIRV_BACKEND_TARGET_PRESENT)
+namespace llvm {
+
+using namespace llvm;
+using namespace SPIRV;
+
+// TODO: The LLVM SPIR-... | ```suggestion
"--spirv-ext=all", "-O3"};
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,229 | intel | etiotto | @@ -11,6 +11,98 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/Triple.h"
+
+#if defined(LLVM_SPIRV_BACKEND_TARGET_PRESENT)
+namespace llvm {
+
+using namespace llvm;
+using namespace SPIRV;
+
+// TODO: The LLVM SPIR-... | Can you pass OS by reference so that at line 98 you do not need to check if the ptr is valid ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,229 | intel | whitneywhtsang | @@ -11,6 +11,98 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/TargetParser/Triple.h"
+
+#if defined(LLVM_SPIRV_BACKEND_TARGET_PRESENT)
+namespace llvm {
+
+using namespace llvm;
+using namespace SPIRV;
+
+// TODO: The LLVM SPIR-... | @VyacheslavLevytskyy #3378 updated LLVM hash, it now includes https://github.com/llvm/llvm-project/pull/124745. Please update this PR accordingly. |
intel-xpu-backend-for-triton | github_2023 | python | 3,394 | intel | whitneywhtsang | @@ -13,6 +13,12 @@
from triton.backends.compiler import GPUTarget
from triton.backends.driver import DriverBase
+# A hard-coded cache version that can be updated when we know that the cached file is no valid and | ```suggestion
# A hard-coded cache version that can be updated when we know that the cached file is invalid and
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,411 | intel | alexbaden | @@ -286,7 +287,9 @@ def compile(src, target=None, options=None):
if (fn_override_manager is not None and (full_name := fn_override_manager.get_file(ir_filename)) is not None):
print(f"\nOverriding kernel with file {full_name}")
next_module = parse(full_name, ext, context)
- met... | Should we add `spv` here? |
intel-xpu-backend-for-triton | github_2023 | python | 2,898 | intel | anmyachev | @@ -291,10 +292,10 @@ def benchmark(B, M, N, K, provider):
elif provider == 'triton':
assert len(a.shape) == len(b.shape), 'Incompatible sizes'
if len(a.shape) == 3:
- c = torch.empty((B, M, N), device='xpu', dtype=torch.float32)
+ c = torch.zeros((B, M, N), device='xpu', dt... | @whitneywhtsang should we do the same for other gemm benchmarks? |
intel-xpu-backend-for-triton | github_2023 | others | 3,377 | intel | whitneywhtsang | @@ -244,6 +244,8 @@ run_tutorial_tests() {
run_tutorial_test "01-vector-add"
run_tutorial_test "02-fused-softmax"
run_tutorial_test "03-matrix-multiplication"
+ TRITON_INTEL_RAISE_BLOCK_POINTER=true \
+ run_tutorial_test "03-matrix-multiplication" "TRITON_INTEL_RAISE_BLOCK_POINTER" | Could now remove `"TRITON_INTEL_RAISE_BLOCK_POINTER"`, as it is no longer used. |
intel-xpu-backend-for-triton | github_2023 | others | 3,377 | intel | anmyachev | @@ -55,6 +56,10 @@ pytest() {
run_tutorial_test() {
echo
echo "****** Running $1 test ******"
+ if [[ $TRITON_INTEL_RAISE_BLOCK_POINTER = true ]]; then
+ echo "****** With: INTEL_RAISE_BLOCK_POINTER ******"
+ TRITON_TEST_REPORTS=false | It is very likely that this broke the correct loading of results for tutorials. |
intel-xpu-backend-for-triton | github_2023 | python | 3,337 | intel | pbchekin | @@ -20,6 +20,51 @@ def pytest_addoption(parser):
parser.addoption("--forked", action="store_true")
+def pytest_pyfunc_call(pyfuncitem: pytest.Function):
+
+ if os.name == "nt" and "forked" in pyfuncitem.keywords:
+ # Avoid recursion
+ if os.getenv("_PYTEST_SUBPROCESS_RUNNING"):
+ ... | Do we need `os.getcwd()`? I think `pathlib.Path()` should work for the current directory (please double check)
```suggestion
pos = pyfuncitem.nodeid.find(str(pyfuncitem.path.relative_to(pathlib.Path())))
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,337 | intel | pbchekin | @@ -20,6 +20,51 @@ def pytest_addoption(parser):
parser.addoption("--forked", action="store_true")
+def pytest_pyfunc_call(pyfuncitem: pytest.Function):
+
+ if os.name == "nt" and "forked" in pyfuncitem.keywords:
+ # Avoid recursion
+ if os.getenv("_PYTEST_SUBPROCESS_RUNNING"):
+ ... | If we anyway write the subprocess stdout and stderr to the system stdout and stderr respectively, then why do we want capture the output? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,371 | intel | whitneywhtsang | @@ -100,10 +102,17 @@ Value findOrCreateMakeTensorPtr(Location loc, Value source, ValueRange shape,
return false;
});
+ // Note: We are forcing an unknown shape to allow us to do pointer increments | ```suggestion
// Note: We are forcing on unknown shape to allow us to do pointer increments
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,371 | intel | whitneywhtsang | @@ -372,14 +381,64 @@ struct PtrState {
newOffsets, order, sizes, builder);
}
- Value createTTAdvanceOp(Value ptr, tt::MakeTensorPtrOp makeTPtrOp,
- OpBuilder &builder, Location loc) const {
+ std::optional<Value> createTTAdvanceOp(Value ptr,
+ ... | when bothOffsetNotZero, can we do `tt.advance ptr, (0, off0*str0 + off1)`? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,371 | intel | whitneywhtsang | @@ -372,14 +381,68 @@ struct PtrState {
newOffsets, order, sizes, builder);
}
- Value createTTAdvanceOp(Value ptr, tt::MakeTensorPtrOp makeTPtrOp,
- OpBuilder &builder, Location loc) const {
+ std::optional<Value> createTTAdvanceOp(Value ptr,
+ ... | [optional]
```suggestion
bool zeroIdx = !ttgi::isConstant(getFinalValue(offsets[0]), 0);
Value nonZeroOffset = offsets[!zeroIdx];
Value zeroOffset = offsets[zeroIdx];
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,371 | intel | whitneywhtsang | @@ -448,24 +511,30 @@ struct TritonRaiseBlockPointer
assert(succeeded(verify(moduleOp)) && "Module verification failed");
}
- LogicalResult rewriteOp(Operation *rootOp) {
+ LogicalResult rewriteOp(Operation *rootOp, bool isNested = false) {
assert(rootOp && "Expected a valid operation");
- rootOp-... | Why you changed to define `res`? |
intel-xpu-backend-for-triton | github_2023 | others | 3,371 | intel | whitneywhtsang | @@ -1,143 +1,130 @@
// RUN: triton-opt %s -triton-raise-block-pointer -canonicalize | FileCheck %s
+// TODO: change to out tutorial 03
module {
- tt.func public @matmul_kernel_0123456789101112131415(%arg0: !tt.ptr<bf16>, %arg1: !tt.ptr<bf16>, %arg2: !tt.ptr<bf16>, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %a... | so that the store can be raised as well.
```suggestion
// TODO: add back once masked stores are supported
// tt.store %59, %50, %66 : tensor<64x128x!tt.ptr<f16>>
tt.store %59, %50 : tensor<64x128x!tt.ptr<f16>>
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,371 | intel | whitneywhtsang | @@ -1,143 +1,130 @@
// RUN: triton-opt %s -triton-raise-block-pointer -canonicalize | FileCheck %s
+// TODO: change to out tutorial 03 | ```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,343 | intel | ienkovich | @@ -84,7 +90,7 @@ fi
if [ ! -d "$TRITON_PROJ" ]; then
echo "****** Cloning $TRITON_PROJ ******"
cd $BASE
- git clone https://github.com/intel/intel-xpu-backend-for-triton.git
+ git clone https://github.com/intel/$TRITON_PROJ_NAME.git | With this change, it's hard to work with multiple forks of the same repo (which is useful sometimes) and dir name has to match the original repo name (which is another unnecessary restriction). I'd suggest
```
git clone https://github.com/intel/intel-xpu-backend-for-triton.git $TRITON_PROJ_NAME
```
|
intel-xpu-backend-for-triton | github_2023 | python | 3,333 | intel | pbchekin | @@ -0,0 +1,82 @@
+import pytest
+import subprocess
+import os
+
+# Path to the SPIRVRunner executable
+SPIRV_RUNNER_PATH = os.getenv("SPIRV_RUNNER_PATH")
+SPIRV_RUNNER_TESTS = os.getenv("SPIRV_RUNNER_TESTS")
+
+# Check if SPIRV_RUNNER_TESTS is set
+if not SPIRV_RUNNER_TESTS: | Nit: it is better to avoid import-time logic (move to a function and call when `__name__ == "__main__"`). |
intel-xpu-backend-for-triton | github_2023 | python | 3,333 | intel | pbchekin | @@ -0,0 +1,33 @@
+# conftest.py | Do we need conftest.py here? Standard pytest provides a summary report. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,354 | intel | LiyangLingIntel | @@ -208,107 +208,6 @@ void LayoutRematerialization::cleanup() {
op->erase();
}
-// Look ahead to at the transitive uses and see if there is a convert to mma
-// operations.
-bool hasConvertToMMATransisitiveUse(Operation *op, Attribute encoding) {
- SmallVector<Value> queue = {op->getResult(0)};
- SetVector<Op... | This piece of code aimed to fix the `out of resource: shared memory` issue for GEMM + Atomic fusing kernels, which is https://github.com/intel/intel-xpu-backend-for-triton/issues/1716.
Can you try like `python gemm_splitk_benchmark.py` to see if this change breaks that fix? |
intel-xpu-backend-for-triton | github_2023 | others | 3,354 | intel | whitneywhtsang | @@ -1,3 +1,6 @@
# https://github.com/intel/intel-xpu-backend-for-triton/issues/2968
test/unit/language/test_core.py::test_scaled_dot[128-64-64-False-False-True-e5m2-fp16-4-16-1]
test/unit/language/test_core.py::test_scaled_dot[32-64-128-False-False-True-e5m2-bf16-4-16-1] | Please help check if they still fail. |
intel-xpu-backend-for-triton | github_2023 | python | 3,361 | intel | anmyachev | @@ -5920,6 +5920,75 @@ def test_local_load_store(M, N, K, dist_layout, shared_layout, device, tmp_path:
assert torch.equal(z, x)
+dot_layouts = [
+ DotOperandLayout(parent=MmaLayout([2, 0], [4, 1], [1, 1], [1, 1], [1, 0], [16, 8]), op_idx=0, k_width=4),
+ DotOperandLayout(parent=MmaLayout([2, 0], [4, 1],... | Should we add our layout for this test? |
intel-xpu-backend-for-triton | github_2023 | python | 3,348 | intel | whitneywhtsang | @@ -318,9 +318,11 @@ def download_and_copy(name, src_func, dst_path, variable, version, url_func):
system = platform.system()
arch = platform.machine()
# NOTE: This might be wrong for jetson if both grace chips and jetson chips return aarch64
- arch = {"arm64": "sbsa", "aarch64": "sbsa"}.get(arch, arc... | Why this change `"AMD64": "x86_64"` is needed? |
intel-xpu-backend-for-triton | github_2023 | others | 3,346 | intel | pbchekin | @@ -117,13 +120,13 @@ jobs:
cd ${{ env.NEW_WORKSPACE }}
${{ env.TRITON_TEST_CMD }} --instrumentation
# so that it is correctly taken into account while calculating pass rate | We don't need this comment anymore, do we? |
intel-xpu-backend-for-triton | github_2023 | python | 3,238 | intel | AndreyPavlenko | @@ -344,6 +346,151 @@ def download_and_copy(name, src_path, dst_path, variable, version, url_func):
shutil.copy(src_path, dst_path)
+# ---- populate 'third_party/intel/backend/include' ----
+
+
+def sycl_include_from_conda() -> Optional[str]:
+ """Get path for sycl headers from 'CONDA_PREFIX' if availab... | ```suggestion
oneapi_root = "/opt/intel/oneapi"
```
Maybe also check the default installation folder if the env var is not set? |
intel-xpu-backend-for-triton | github_2023 | others | 3,238 | intel | AndreyPavlenko | @@ -80,7 +80,7 @@ runs:
shell: bash
run: |
cd python
- pip install wheel pybind11
+ pip install wheel pybind11 zstandard | I think it would be great to separate the build and the dependencies installation. Ideally, if the project could be built with cmake only, it would improve integration with IDEs. |
intel-xpu-backend-for-triton | github_2023 | python | 3,304 | intel | whitneywhtsang | @@ -38,7 +38,11 @@ def transform_df(df, param_cols, tflops_col, hbm_col, benchmark, compiler, tag):
check_cols([tflops_col] + [] if hbm_col is None else [hbm_col], df.columns)
# Build json with parameters
df_results = pd.DataFrame()
- df_results["params"] = [json.dumps(j) for j in df[param_cols].to_di... | I am fine with this change, but curious why we don't change database instead to match the new type? |
intel-xpu-backend-for-triton | github_2023 | python | 3,293 | intel | whitneywhtsang | @@ -3,22 +3,49 @@
import argparse
import torch
+import triton
-from triton_kernels_benchmark.flash_attention_benchmark import _attention
+from triton_kernels_benchmark.flash_attention_benchmark import _attention, tune_attn_fwd
def get_options():
"""Gather CL options."""
parser = argparse.ArgumentPa... | can be the other way around, just for consistency.
```suggestion
config.add_argument('-BLOCK-N', action='extend', nargs='+', type=int, help='Sizes of n')
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,297 | intel | etiotto | @@ -26,17 +26,17 @@
{'BLOCK_SIZE_M': 256, 'BLOCK_SIZE_N': 256, 'BLOCK_SIZE_K': 32, 'GROUP_SIZE_M': 4, 'grf_mode': 'large'},
num_stages=s, num_warps=32) for s in [1, 2, 3]
] + [
- triton.Config(
- {'BLOCK_SIZE_M': 256, 'BLOCK_SIZE_N': 128, 'BLOCK_SIZE_K': 32, 'GROUP_SIZE_... | We will want to cleanup this once we remove the "advanced" path. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,282 | intel | mfrancepillois | @@ -810,7 +800,8 @@ struct TritonRaiseBlockPointer
loc, builder.getIndexType(), makeTPtrOp.getStrides()[i]);
auto offsetCst = builder.createOrFold<arith::IndexCastOp>(
loc, builder.getIndexType(), makeTPtrOp.getOffsets()[i]);
- auto scaledOffset = mulOrFold(offsetCst, strideCst, abuild... | ```suggestion
loc, getFinalValue(scaledOffset), builder.getIntegerType(offsetBitwidth), builder));
```
? |
intel-xpu-backend-for-triton | github_2023 | others | 3,256 | intel | anmyachev | @@ -8,25 +8,25 @@ BUILD_LATEST=false
FORCE_REINSTALL=false
PYTORCH_CURRENT_COMMIT=""
VENV=false
+NO_CLEAN=false | Let's use the opposite, it's easier to read:
```suggestion
CLEAN=true
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,256 | intel | pbchekin | @@ -134,24 +134,34 @@ if [ ! -d "$BASE" ]; then
mkdir $BASE
fi
-echo "**** Cleaning $PYTORCH_PROJ before build ****"
-rm -rf $PYTORCH_PROJ
-
-echo "**** Cloning $PYTORCH_PROJ ****"
-cd $BASE
-git clone --single-branch -b main --recurse-submodules https://github.com/pytorch/pytorch.git
-
-cd $PYTORCH_PROJ
+if [ "$... | ```suggestion
if [ -d "$PYTORCH_PROJ" ]; then
cd "$PYTORCH_PROJ" && \
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,256 | intel | pbchekin | @@ -134,24 +134,34 @@ if [ ! -d "$BASE" ]; then
mkdir $BASE
fi
-echo "**** Cleaning $PYTORCH_PROJ before build ****"
-rm -rf $PYTORCH_PROJ
-
-echo "**** Cloning $PYTORCH_PROJ ****"
-cd $BASE
-git clone --single-branch -b main --recurse-submodules https://github.com/pytorch/pytorch.git
-
-cd $PYTORCH_PROJ
+if [ "$... | No need to use `&&`, just place every command on a new line. |
intel-xpu-backend-for-triton | github_2023 | others | 3,256 | intel | pbchekin | @@ -134,24 +134,34 @@ if [ ! -d "$BASE" ]; then
mkdir $BASE
fi
-echo "**** Cleaning $PYTORCH_PROJ before build ****"
-rm -rf $PYTORCH_PROJ
-
-echo "**** Cloning $PYTORCH_PROJ ****"
-cd $BASE
-git clone --single-branch -b main --recurse-submodules https://github.com/pytorch/pytorch.git
-
-cd $PYTORCH_PROJ
+if [ "$... | Is it a typo?
```suggestion
git clean -xfd; then
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,217 | intel | gshimansky | @@ -131,15 +131,7 @@ def put(self, data, filename, binary=True) -> str:
f.write(data)
# Replace is guaranteed to be atomic on POSIX systems if it succeeds
# so filepath cannot see a partial write
- try:
- os.replace(temp_path, filepath)
- except PermissionError:
-... | This change was necessary if multiple processes compile the same kernel and try to put files (not only .pyd) into the same cache directory. It happens when you run tests with xdist and all workers use the same triton cache directory. A user program might behave in the same way too. |
intel-xpu-backend-for-triton | github_2023 | python | 3,251 | intel | alexbaden | @@ -635,15 +649,14 @@ def __init__(self, src, metadata):
self.constants = {arg_idx(idx): value for idx, value in constants.items()}
self.signature = {idx: value for idx, value in src.signature.items()}
src = make_launcher(self.constants, self.signature)
- mod = compile_module_from_src(... | Previously, the code unpacked both args and kwargs into a single dictionary and passed that to the launcher - now it looks like we're passing the `args` dict which seems incorrect as any values in `kwargs` would be ignored. Could we create a new dictionary that contains both `args` and `kwargs` and pass that to maintai... |
intel-xpu-backend-for-triton | github_2023 | python | 3,226 | intel | whitneywhtsang | @@ -159,7 +159,9 @@ def extract_kernels(funcs):
# For details: https://github.com/pytorch/pytorch/issues/144778
kernels = [kernel for kernel in kernels if kernel != []]
# FIXME: relaxation for new agama release
- assert len(kernels) >= n_repeat - 1, "the profiling number not match"
+ assert len(ker... | `len(kernels) == n_repeat` with current agama driver.
```suggestion
assert len(kernels) >= n_repeat - 1, (
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,182 | intel | etiotto | @@ -250,7 +250,7 @@ void set_argument(sycl::handler &cgh, int index, ordered_json &item) {
} else if (type == "u64") {
auto val = item.at("value").get<uint64_t>();
set_scalar_arg<uint64_t>(cgh, index, &val);
- } else if (type == "fp32" || type == "fp32" || type == "f32") {
+ } else if (type == "fp32" || ... | shouldn't the type here be always fp32 ? This seems special, looking few lines the 'fp64' doesn't need also a check for 'f64' so what is the reason for the asymmetry ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,219 | intel | mfrancepillois | @@ -1095,6 +1103,28 @@ LogicalResult TritonRaiseBlockPointer::visitAddPointerOperand(
return visitAddPointerRemOperand(remOp, state, loc, builder);
}
+template <
+ typename OpTy,
+ std::enable_if_t<
+ llvm::is_one_of<OpTy, arith::ExtSIOp, arith::ExtUIOp>::value, bool>>
+LogicalResult TritonRaiseBlock... | Nit:
```suggestion
arith::ExtSIOp extOp, PtrState &state, Location loc, OpBuilder &builder) {
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,219 | intel | mfrancepillois | @@ -1095,6 +1103,28 @@ LogicalResult TritonRaiseBlockPointer::visitAddPointerOperand(
return visitAddPointerRemOperand(remOp, state, loc, builder);
}
+template <
+ typename OpTy,
+ std::enable_if_t<
+ llvm::is_one_of<OpTy, arith::ExtSIOp, arith::ExtUIOp>::value, bool>>
+LogicalResult TritonRaiseBlock... | same
```suggestion
arith::ExtUIOp extOp, PtrState &state, Location loc, OpBuilder &builder) {
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,940 | intel | chengjunlu | @@ -80,9 +80,17 @@ static cl::opt<std::string> TensorStr(
//===--------------------------------------------------------------------===//
LogicalResult layoutPrint(RankedTensorType tensorType, raw_ostream &os) {
+ StringRef dialectName = tensorType.getEncoding().getDialect().getNamespace();
+
// Dispatch to the ... | No, this code wouldn't work for us.
We need to PR the changes to upstream to enable this tool work for third party dialect. |
intel-xpu-backend-for-triton | github_2023 | cpp | 2,940 | intel | quintinwang5 | @@ -24,8 +24,8 @@ void decomposeSplatOpToSharedLayoutConversion(ModuleOp module) {
int threadsPerWarp = triton::gpu::TritonGPUDialect::getThreadsPerWarp(module);
module.walk([&](triton::SplatOp splatOp) -> void {
auto dstType = cast<RankedTensorType>(splatOp.getType());
- auto shared = dyn_cast_or_null<tr... | Submitted [something ](https://github.com/triton-lang/triton/pull/4663/)like this. They told me `in ttgir every tensor must have a layout`. So I think this is also unreasonable. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,172 | intel | mfrancepillois | @@ -391,20 +415,13 @@ struct TritonRaiseBlockPointer
.Case([this](tt::AddPtrOp addptr) {
if (failed(rewriteAddPtrOp(addptr)))
addptr->emitRemark(
- "TritonRaiseToBlockPointer: Failed to rewrite");
- return WalkResult::advance();
- })
- ... | This case was needed when `tt.make_tensor_ptr` was added inside the loop body.
Since `MakeTensorOp` have been hoisted out of the loop body.
I agree that this case should no longer be necessary. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,172 | intel | whitneywhtsang | @@ -444,65 +461,23 @@ struct TritonRaiseBlockPointer
return failure();
}
- PtrState state;
- if (succeeded(visitOperandMakeTensorPtr(
- makeTensorPtrOp, state, op.getLoc(), builder, true))) {
- newInitArgs.push_back(mappedV);
- // Record... | ```suggestion
llvm_unreachable("Unexpected mapped value");
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,172 | intel | whitneywhtsang | @@ -837,13 +663,83 @@ struct TritonRaiseBlockPointer
OpBuilder builder(op);
Location loc = op.getLoc();
+ auto ptr = op.getPtr();
+
+ auto fillOffsets = [&](Value offset, unsigned rank,
+ SmallVector<Value> &offsets) {
+ switch (rank) {
+ case 1:
+ offsets.pu... | ```suggestion
llvm_unreachable("Did not find tt::MakeTensorPtrOp");
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,212 | intel | whitneywhtsang | @@ -156,7 +156,7 @@ def parse_target(self, tgt_prop) -> dict:
dev_prop['has_bfloat16_conversions'] = tgt_prop.get('has_bfloat16_conversions', True)
device_arch = self.parse_device_arch(tgt_prop.get('architecture', 0))
- if device_arch:
+ if device_arch and shutil.which('ocloc'): | let's do the same change for https://github.com/intel/intel-xpu-backend-for-triton/blob/main/third_party/intel/backend/compiler.py#L354. |
intel-xpu-backend-for-triton | github_2023 | others | 3,202 | intel | pbchekin | @@ -159,137 +159,220 @@ test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float16-float16]
test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float16-float32]
test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float32-float32]
test/unit/language/test_core.py::test_dot3d[8-8-64-64... | You need to update https://github.com/intel/intel-xpu-backend-for-triton/blob/97ba60e5ae902b4f0edb86c3ee9959478a6da958/scripts/pytest-utils.sh#L38 to
```
sed -e '/^#/d' -e '/^\s*$/d' ...
```
To remove empty lines from the skip list. |
intel-xpu-backend-for-triton | github_2023 | others | 3,202 | intel | whitneywhtsang | @@ -159,137 +159,220 @@ test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float16-float16]
test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float16-float32]
test/unit/language/test_core.py::test_dot3d[8-8-64-64-64-32-32-float32-float32]
test/unit/language/test_core.py::test_dot3d[8-8-64-64... | [nit] consistency
```suggestion
# test_dot_max_num_imprecise_acc
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,204 | intel | anmyachev | @@ -0,0 +1,141 @@
+name: Test with pip on Windows
+
+on:
+ workflow_dispatch:
+
+ # run workflow on changes to the driver, which handles the libraries logic
+ pull_request:
+ branches:
+ - main
+# FIXME: uncomment before merging
+# paths:
+# - third_party/intel/backend/driver.py
+ push:
+ bran... | Judging by the logs, the tests are run with the python that is installed on the system (instead of the virtual environment). Perhaps we need to activate the environment inside of ` scripts/test-triton.sh`? |
intel-xpu-backend-for-triton | github_2023 | others | 3,204 | intel | anmyachev | @@ -0,0 +1,139 @@
+name: Test with pip on Windows
+
+on:
+ workflow_dispatch:
+
+ # run workflow on changes to the driver, which handles the libraries logic
+ pull_request:
+ branches:
+ - main
+# FIXME: uncomment before merging
+# paths:
+# - third_party/intel/backend/driver.py
+ push:
+ bran... | `cd ${{ env.NEW_WORKSPACE }}` ?
```suggestion
Invoke-BatchFile "C:\Program Files\Microsoft Visual Studio\2022\Community\VC\Auxiliary\Build\vcvarsall.bat" x64
cd ${{ env.NEW_WORKSPACE }}
${{ env.TRITON_TEST_CMD }} --core
- name: Run interpreter tests
run: |
... |
intel-xpu-backend-for-triton | github_2023 | others | 3,204 | intel | anmyachev | @@ -0,0 +1,139 @@
+name: Test with pip on Windows
+
+on:
+ workflow_dispatch:
+
+ # run workflow on changes to the driver, which handles the libraries logic
+ pull_request:
+ branches:
+ - main
+# FIXME: uncomment before merging
+# paths:
+# - third_party/intel/backend/driver.py
+ push:
+ bran... | ```suggestion
cd ${{ env.NEW_WORKSPACE }}
pip install defusedxml
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,185 | intel | pbchekin | @@ -78,6 +78,7 @@ jobs:
cd python
pip install -U wheel pybind11 cython cmake 'setuptools>=65.6.1'
pip install -v --no-build-isolation '.[build,tests,tutorials]'
+ pip install intel-sycl-rt intel-pti | > We probably need Test with pip workflow also for windows.
Yes, #3176 is for that. |
intel-xpu-backend-for-triton | github_2023 | cpp | 3,158 | intel | victor-eds | @@ -104,10 +103,17 @@ void init_triton_intel_passes_ttgpuir(py::module &&m) {
gpu::intel::createTritonIntelGPUOptimizeReductionLocality);
}
+void init_triton_intel_passes_arith(py::module &&m) {
+ ADD_PASS_WRAPPER_OPT_2("add_arith_emulate_unsupported_floats",
+ mlir::ar... | ```suggestion
void init_triton_intel_passes_arith(py::module &&m) {
ADD_PASS_WRAPPER_OPT_2("add_arith_emulate_unsupported_floats",
mlir::arith::createArithEmulateUnsupportedFloats,
const std::vector<std::string> &, const std::string &);
}
```
I think using `s... |
intel-xpu-backend-for-triton | github_2023 | python | 3,158 | intel | victor-eds | @@ -255,7 +255,6 @@ def make_ttgir(mod, metadata, opt, properties):
# optimize TTGIR
intel.passes.ttgpuir.add_coalesce(pm)
intel.passes.ttgpuir.add_remove_layout_conversions(pm)
- | Put new line back |
intel-xpu-backend-for-triton | github_2023 | python | 3,036 | intel | whitneywhtsang | @@ -116,6 +117,7 @@ def matmul_kernel_with_block_pointers(
num_stages=s, num_warps=4) for s in [2]
],
key=['M', 'N', 'K'],
+ do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers'), | ```suggestion
do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers_batched'),
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,036 | intel | whitneywhtsang | @@ -109,6 +110,7 @@ def matmul_kernel_with_block_pointers(
num_stages=2, num_warps=4),
],
key=['M', 'N', 'K'],
+ do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers'), | ```suggestion
do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers_batched'),
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,036 | intel | whitneywhtsang | @@ -122,6 +123,7 @@ def matmul_kernel_with_block_pointers(
num_stages=2, num_warps=4),
],
key=['M', 'N', 'K'],
+ do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers'), | ```suggestion
do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers_batched'),
``` |
intel-xpu-backend-for-triton | github_2023 | python | 3,036 | intel | whitneywhtsang | @@ -107,6 +108,7 @@ def matmul_kernel_with_block_pointers(
num_stages=2, num_warps=4),
],
key=['M', 'N', 'K'],
+ do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers'), | ```suggestion
do_bench=benchmark_suit.make_do_bench_for_autotune(kernel_name='matmul_kernel_with_block_pointers_batched'),
``` |
intel-xpu-backend-for-triton | github_2023 | others | 3,168 | intel | whitneywhtsang | @@ -218,6 +218,10 @@ jobs:
AGAMA_VERSION=$AGAMA_VERSION
EOF
+ - name: Run model scripts | Can we move this step after `Run Tutorials`? |
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