repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
intel-xpu-backend-for-triton | github_2023 | cpp | 1,572 | intel | victor-eds | @@ -2174,10 +2174,9 @@ struct IndexCastOpLowering
if (targetBits == sourceBits)
return {operands[0][0]};
if (targetBits < sourceBits)
- return {rewriter.replaceOpWithNewOp<LLVM::TruncOp>(op, elemTy,
- operands[0][0])};
- return {
- ... | We can use `mlir::getValueOrCreateCastToIndexLike` in `mlir/Dialect/Arith/Utils/Utils.h` for this |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,572 | intel | victor-eds | @@ -811,19 +811,10 @@ struct FuncCallLowering {
auto argType = rewriter.getIntegerType(32);
auto arg = LLVM::createConstantI32(op->getLoc(), rewriter, dim);
- intel::AttributeList attrs = createFunctionAttributes(
- {{llvm::Attribute::NoUnwind, std::nullopt},
- {llvm::Attribute::WillReturn... | I am not sure about removing the attributes. I'd say we have to do quite the opposite: make the GPU to LLVM-SPV pass add the attributes expressing function semantics. We're running some LLVM optimization passes after this, so adding the attributes may enable optimization opportunities. |
intel-xpu-backend-for-triton | github_2023 | others | 1,572 | intel | whitneywhtsang | @@ -83,7 +83,9 @@ module attributes {"triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-war
// CHECK: %[[VAL_80:.*]] = llvm.insertvalue %[[CST_1]], %[[VAL_79]][5] : !llvm.struct<(i32, i32, i64, i64, i64, i64, ptr<1>)>
// CHECK: %[[BLOCK_PTR:.*]] = llvm.insertvalue %[[base]], %[[VAL_... | How about changing triton_gen.subgroup.id to return indextype? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,572 | intel | whitneywhtsang | @@ -606,14 +606,10 @@ struct FuncCallLowering {
{llvm::Attribute::WillReturn, std::nullopt},
{llvm::Attribute::Memory, llvm::MemoryEffects::none().toIntValue()}},
ctx);
+
LLVM::CallOp callOp = createDeviceFunctionCall(rewriter, funcName, retType, | Should we change `retType` from `i64` to `index` type? |
intel-xpu-backend-for-triton | github_2023 | others | 1,922 | intel | pbchekin | @@ -216,24 +224,24 @@ build_ipex() {
if [ ! -d "$IPEX_PROJ" ]; then
echo "**** Cloning $IPEX_PROJ ****"
cd $BASE
- if [ "$FAKE_IPEX" = true ]; then
+ if [ "$NO_OP_IPEX" = true ]; then
mkdir intel-extension-for-pytorch
cd intel-extension-for-pytorch
cat > setup.py <<EOF
from setu... | Per https://peps.python.org/pep-0440/#local-version-identifiers Python local version identifier can contain only:
* ASCII letters ([a-zA-Z])
* ASCII digits ([0-9])
* periods (.)
I would recommend replacing
```suggestion
version = "2.4.0+noop"
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,922 | intel | vlad-penkin | @@ -49,7 +49,7 @@ for arg in "$@"; do
shift
;;
--help)
- echo "Example usage: ./compile-pytorch-ipex.sh [--pytorch | --upstream-pytorch | --ipex | --fake-ipex | --pinned | --source | --clean | --venv]"
+ echo "Example usage: ./compile-pytorch-ipex.sh [--pytorch | --upstream-pytorch | --ipex... | @anmyachev to continue your line of thought - do we need two separate options `--pytorch` and `--ipex`? |
intel-xpu-backend-for-triton | github_2023 | others | 1,875 | intel | etiotto | @@ -799,6 +799,21 @@ def MmaEncodingTrait : AttrInterface<"MmaEncodingTrait"> {
];
}
+//===----------------------------------------------------------------------===// | Adding this change downstream will cause us to deviate from upstream code more. Please post a PR upstream to introduce this change. |
intel-xpu-backend-for-triton | github_2023 | others | 1,875 | intel | victor-eds | @@ -799,6 +799,21 @@ def MmaEncodingTrait : AttrInterface<"MmaEncodingTrait"> {
];
}
+//===----------------------------------------------------------------------===//
+// LinearLayout Conversion Interface
+//===----------------------------------------------------------------------===//
+def LinearLayoutTrait : At... | ```suggestion
(ins "ArrayRef<int64_t>":$shape,
"std::optional<int32_t>":$elemBitWidth)>
```
NIT |
intel-xpu-backend-for-triton | github_2023 | others | 1,875 | intel | victor-eds | @@ -11,46 +11,32 @@ module attributes {"triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 :
// CHECK-DAG: %[[CST_4:.*]] = llvm.mlir.constant(4 : i32) : i32
// CHECK-DAG: %[[CST_8:.*]] = llvm.mlir.constant(8 : i32) : i32
// CHECK-DAG: %[[CST_16:.*]] = llvm.mlir.const... | NIT: I think we can remove `-DAG` to simplify the tests as we know the operation generation order here. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,875 | intel | victor-eds | @@ -1,6 +1,7 @@
#ifndef TRITON_DIALECT_TRITON_INTEL_GPU_IR_ATTRIBUTES_H
#define TRITON_DIALECT_TRITON_INTEL_GPU_IR_ATTRIBUTES_H
+#include "triton/Dialect/TritonGPU/IR/Attributes.h"
#define GET_ATTRDEF_CLASSES
#include "intel/include/Dialect/TritonIntelGPU/IR/TritonIntelGPUAttrDefs.h.inc" | ```suggestion
#include "triton/Dialect/TritonGPU/IR/Attributes.h"
#define GET_ATTRDEF_CLASSES
#include "intel/include/Dialect/TritonIntelGPU/IR/TritonIntelGPUAttrDefs.h.inc"
```
NIT |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,875 | intel | victor-eds | @@ -415,6 +416,12 @@ void DpasEncodingAttr::print(AsmPrinter &printer) const {
<< "}>";
}
+LinearLayout
+DpasEncodingAttr::toLinearLayout(ArrayRef<int64_t> shape,
+ std::optional<int32_t> elemBitWidth) const {
+ return DPAStoLinearLayout(shape, *this, 2 /*opIdx*/);
+} | ```suggestion
LinearLayout
DpasEncodingAttr::toLinearLayout(ArrayRef<int64_t> shape,
std::optional<int32_t> elemBitWidth) const {
return DPAStoLinearLayout(shape, *this);
}
```
NIT: Can we exploit default value? If not, I think `/*opIdx=*/2` is preferred (at least clang-forma... |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,875 | intel | victor-eds | @@ -547,36 +558,26 @@ DPAStoLinearLayout(ArrayRef<int64_t> shape, Attribute layout, unsigned opIdx) {
LinearLayout::identity1D(repCluster[1], kRegister, outDimNames[1]);
tileLayout *=
LinearLayout::identity1D(repCluster[0], kRegister, outDimNames[0]);
+
+ // The identical layout is repeated am... | ```suggestion
ArrayRef<int64_t> numReps = dpas.getDPASRepetitions(shape, opIdx);
```
NIT |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -92,9 +97,28 @@ jobs:
IGC_DisableLoopUnroll=1 \
SYCL_PROGRAM_COMPILE_OPTIONS=" -vc-codegen -vc-disable-indvars-opt -doubleGRF -Xfinalizer ' -printregusage -enableBCR -DPASTokenReduction ' " \
python gemm_benchmark.py --reports $REPORTS
+
+ TAG=${{ inputs.tag || 'ci' }}
+ ... | ```suggestion
- name: Run Triton GEMM kernel benchmark - default path
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -92,9 +97,28 @@ jobs:
IGC_DisableLoopUnroll=1 \
SYCL_PROGRAM_COMPILE_OPTIONS=" -vc-codegen -vc-disable-indvars-opt -doubleGRF -Xfinalizer ' -printregusage -enableBCR -DPASTokenReduction ' " \
python gemm_benchmark.py --reports $REPORTS
+
+ TAG=${{ inputs.tag || 'ci' }}
+ ... | ```suggestion
TAG=${{ inputs.tag || 'ci' }}
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -92,9 +97,28 @@ jobs:
IGC_DisableLoopUnroll=1 \
SYCL_PROGRAM_COMPILE_OPTIONS=" -vc-codegen -vc-disable-indvars-opt -doubleGRF -Xfinalizer ' -printregusage -enableBCR -DPASTokenReduction ' " \
python gemm_benchmark.py --reports $REPORTS
+
+ TAG=${{ inputs.tag || 'ci' }} | ```suggestion
TAG=${{ inputs.tag || 'ci' }}-advanced
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -92,9 +97,28 @@ jobs:
IGC_DisableLoopUnroll=1 \
SYCL_PROGRAM_COMPILE_OPTIONS=" -vc-codegen -vc-disable-indvars-opt -doubleGRF -Xfinalizer ' -printregusage -enableBCR -DPASTokenReduction ' " \
python gemm_benchmark.py --reports $REPORTS
+
+ TAG=${{ inputs.tag || 'ci' }}
+ ... | ```suggestion
python ../../scripts/build_report.py $REPORTS/matmul-performance.csv $REPORTS/gemm-triton-advanced-report.csv --benchmark gemm --compiler triton --param_cols "B,M,K,N" --tflops_col Triton-TFlops --hbm_col "Triton-GB/s" --tag $TAG
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -92,9 +97,28 @@ jobs:
IGC_DisableLoopUnroll=1 \
SYCL_PROGRAM_COMPILE_OPTIONS=" -vc-codegen -vc-disable-indvars-opt -doubleGRF -Xfinalizer ' -printregusage -enableBCR -DPASTokenReduction ' " \
python gemm_benchmark.py --reports $REPORTS
+
+ TAG=${{ inputs.tag || 'ci' }}
+ ... | ```suggestion
python ../../scripts/build_report.py $REPORTS/matmul-performance.csv $REPORTS/gemm-triton-report.csv --benchmark gemm --compiler triton --param_cols "B,M,K,N" --tflops_col Triton-TFlops --hbm_col "Triton-GB/s" --tag $TAG
python ../../scripts/build_report.py $REPORTS/matmul-performanc... |
intel-xpu-backend-for-triton | github_2023 | others | 1,881 | intel | whitneywhtsang | @@ -188,12 +211,16 @@ jobs:
- name: Run flash attention benchmarks
run: |
cd python/tutorials
+ # We need latest build report
+ # wget https://raw.githubusercontent.com/intel/intel-xpu-backend-for-triton/llvm-target/scripts/build_report.py
+ wget https://raw.githubu... | What is this change about? |
intel-xpu-backend-for-triton | github_2023 | c | 1,884 | intel | sommerlukas | @@ -104,8 +103,15 @@ static PyObject *getDeviceProperties(PyObject *self, PyObject *args) {
mem_bus_width, "max_work_group_size", max_group_size,
"sub_group_sizes", subgroup_sizes);
}
+void freeKernel(PyObject *p) {
+ delete reinterpret_cast<sycl::kernel *>(PyCapsule_Ge... | What is the reason to store `sycl::kernel` and `sycl::kernel_bundle` as a pointer? Both classes have common reference semantics, so storing them by value will work: https://registry.khronos.org/SYCL/specs/sycl-2020/html/sycl-2020.html#sec:reference-semantics |
intel-xpu-backend-for-triton | github_2023 | c | 1,884 | intel | sommerlukas | @@ -227,20 +225,19 @@ static PyObject *initContext(PyObject *self, PyObject *args) {
if (!(queue = PyLong_AsVoidPtr(cap)))
return NULL;
sycl::queue *sycl_queue = static_cast<sycl::queue *>(queue); | `queue` also has common reference semantics. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -216,30 +230,140 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
+ break;
+ }
+ case Workload::Attention: {
+ ... | Is it guaranteed that `chainOpsA/B/C` are disjoint? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -216,30 +230,140 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
+ break;
+ }
+ case Workload::Attention: {
+ ... | Nit: Add curly braces here as well. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -216,30 +230,140 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
+ break;
+ }
+ case Workload::Attention: {
+ ... | I think this style is hard to follow, would be preferable to return early for all cases you don't want to handle. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -216,30 +230,140 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
+ break;
+ }
+ case Workload::Attention: {
+ ... | Can you generalise this somehow?
|
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -249,6 +373,9 @@ class ConvertTritonToTritonGPUWarp
transformScfForOp(loop);
} else if (auto store = dyn_cast<tt::StoreOp>(op)) {
transformStoreOp(store);
+ } else if (auto convert = dyn_cast<ttg::ConvertLayoutOp>(op)) {
+ ;
+ // arith, math, tt::ExpandDimsOp, ... | Same as above. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -462,6 +615,89 @@ class ConvertTritonToTritonGPUWarp
else if (op->getDialect() == arithDialect ||
op->getDialect() == mathDialect)
ops.push_back(op->getResults()[0]);
+ else if (isa<tt::ReduceOp, tt::ExpandDimsOp, tt::BroadcastOp>(op))
+ ;
+ else if (auto dot1 = dyn_c... | If you iterate here over the uses (instead of users) ... |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | jopperm | @@ -462,6 +615,89 @@ class ConvertTritonToTritonGPUWarp
else if (op->getDialect() == arithDialect ||
op->getDialect() == mathDialect)
ops.push_back(op->getResults()[0]);
+ else if (isa<tt::ReduceOp, tt::ExpandDimsOp, tt::BroadcastOp>(op))
+ ;
+ else if (auto dot1 = dyn_c... | ... you can just query the result num `use.getOperandNumber()` here and drop the loop to compute `resNum` above. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -136,6 +137,19 @@ class ConvertTritonToTritonGPUWarp
ConvertTritonToTritonGPUWarp() = default;
ConvertTritonToTritonGPUWarp(unsigned numWarps) { this->numWarps = numWarps; }
+private:
+ DenseMap<Value, Attribute> valueAttrMap;
+ Dialect *arithDialect;
+ Dialect *mathDialect;
+
+public:
+ LogicalResult in... | Is this called anywhere? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -216,39 +230,153 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
break;
}
+ case Workload::Attention: {
+ ... | Use static type instead of auto (unless RHS of assignment makes the type obvious). |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -216,39 +230,153 @@ class ConvertTritonToTritonGPUWarp
LDBG("\n");
return;
case Workload::ElementWise:
- case Workload::Reduction:
- case Workload::Attention:
+ case Workload::Reduction: {
break;
}
+ case Workload::Attention: {
+ ... | asserts should have a message: `assert(cond && "...")` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -462,6 +616,80 @@ class ConvertTritonToTritonGPUWarp
else if (op->getDialect() == arithDialect ||
op->getDialect() == mathDialect)
ops.push_back(op->getResults()[0]);
+ else if (isa<tt::ReduceOp, tt::ExpandDimsOp, tt::BroadcastOp>(op))
+ ;
+ else if (auto dot1 = dyn_c... | Would this work?
```suggestion
if (op->getDialect() == arithDialect || op->getDialect() == mathDialect) {
Value result = op->getResults()[0];
if (chainedVals.count(result) == 0) {
chainedVals.insert(result);
expandUseChain(result, chainedVals);
}
for (... |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -462,6 +616,80 @@ class ConvertTritonToTritonGPUWarp
else if (op->getDialect() == arithDialect ||
op->getDialect() == mathDialect)
ops.push_back(op->getResults()[0]);
+ else if (isa<tt::ReduceOp, tt::ExpandDimsOp, tt::BroadcastOp>(op))
+ ;
+ else if (auto dot1 = dyn_c... | ```suggestion
auto loop = cast<scf::ForOp>(arg.getOwner()->getParentOp());
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -136,6 +137,19 @@ class ConvertTritonToTritonGPUWarp
ConvertTritonToTritonGPUWarp() = default;
ConvertTritonToTritonGPUWarp(unsigned numWarps) { this->numWarps = numWarps; }
+private:
+ DenseMap<Value, Attribute> valueAttrMap;
+ Dialect *arithDialect;
+ Dialect *mathDialect; | ```suggestion
Dialect *arithDialect = nullptr;
Dialect *mathDialect = nullptr;
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,866 | intel | etiotto | @@ -136,6 +137,19 @@ class ConvertTritonToTritonGPUWarp
ConvertTritonToTritonGPUWarp() = default;
ConvertTritonToTritonGPUWarp(unsigned numWarps) { this->numWarps = numWarps; }
+private:
+ DenseMap<Value, Attribute> valueAttrMap;
+ Dialect *arithDialect;
+ Dialect *mathDialect;
+
+public:
+ LogicalResult in... | I think this function could just return void. |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | etiotto | @@ -0,0 +1,47 @@
+// RUN: triton-opt %s -split-input-file --tritonintelgpu-materialize-block-pointer | FileCheck %s
+
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 16], warpsPerCTA = [2, 4], order = [1, 0]}> | not used |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | etiotto | @@ -0,0 +1,47 @@
+// RUN: triton-opt %s -split-input-file --tritonintelgpu-materialize-block-pointer | FileCheck %s
+
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 16], warpsPerCTA = [2, 4], order = [1, 0]}>
+#mma = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSiz... | Some of the module annotations aren't required for this test case to run (correctly). |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | etiotto | @@ -270,4 +270,16 @@ def TritonIntelGPUScheduleLoad : Pass<"tritonintelgpu-schedule-load", "mlir::Mod
"mlir::triton::gpu::TritonGPUDialect"];
}
+def TritonIntelGPUMaterializeBlockPointer : Pass<"tritonintelgpu-materialize-block-pointer", "mlir::ModuleOp"> {
+ let summary = "Intel GPU mat... | Need a description of the pass here |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | `v.getDefiningOp()` will fail when `v` is a function argument (no defining operation in that case). |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | [nit]: Triton::gpu -> ttg (given that there is a namespace alias at the top of this file). |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | etiotto | @@ -0,0 +1,47 @@
+// RUN: triton-opt %s -split-input-file --tritonintelgpu-materialize-block-pointer | FileCheck %s
+
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 16], warpsPerCTA = [2, 4], order = [1, 0]}>
+#mma = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSiz... | Instead of extending the `i32` arguments to `i64` we can just pass in an i64 argument. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | Several of the include statements aren't necessary and can be removed. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | After returning from a block the next else or else if isn't necessary. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | Already defined at line 76 |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | auto -> Value |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,133 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Utility.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/Dialect/Tensor/IR/Tensor.h"
+#include "trit... | Would be cleaner to early exit here. |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | etiotto | @@ -0,0 +1,45 @@
+// RUN: triton-opt %s --tritonintelgpu-materialize-block-pointer | FileCheck %s
+
+#dpas = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSize = 16, opsPerChan = 2, threadsPerWarp = 16, warpsPerCTA = [4, 2], repCluster = [1, 1], A = [8, 16], B = [16, 16], C = [8, 16]}>
+#dot_a = ... | remove |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,130 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | v.getDefiningOp()->getOperand(0) --> op |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,130 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | loadOp->getResult(0) ==> loadOp.getResult(). |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,130 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | For Intel XPU a dot operand will always have parent DPAS layout. This can just become an assert. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | etiotto | @@ -0,0 +1,130 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | Actually why do we care whether the loaded value feeds a dot operation ? This pass just annotates the load operation and it doesn't need to know that the value loaded is used by a tt.dot operation. |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | whitneywhtsang | @@ -270,4 +270,21 @@ def TritonIntelGPUScheduleLoad : Pass<"tritonintelgpu-schedule-load", "mlir::Mod
"mlir::triton::gpu::TritonGPUDialect"];
}
+def TritonIntelGPUMaterializeBlockPointer : Pass<"tritonintelgpu-materialize-block-pointer", "mlir::ModuleOp"> {
+ let summary = "annotate the ... | ```suggestion
by the Intel block IO while it is much easier deduced at TTGIR optimization phase.
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,889 | intel | whitneywhtsang | @@ -4,6 +4,7 @@ add_triton_library(TritonIntelGPUTransforms
MatchTargetSize.cpp
Pipeliner/MatmulLoopPipeline.cpp
Pipeliner/SoftwarePipeliner.cpp
+ MaterializeBlockPointer.cpp | alphabetical |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -85,6 +85,8 @@ void init_triton_intel_passes_ttgpuir(py::module &&m) {
bool, unsigned);
ADD_PASS_WRAPPER_0("add_reduce_data_duplication",
gpu::intel::createTritonIntelGPUReduceDataDuplication);
+ ADD_PASS_WRAPPER_0("add_materialize_block_pointer", | alphabetical |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | IIRC, we have this function in RewriteTensorPointer, can we common them? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | does return mean interrupt or advance the walk? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | since we already early exit for not isTensorPointerType, we can change this to a cast and remove the if block. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | [optional] since the only user of isConstantExp is here is check if it is one, for simplicity I would name the function isOne and remove the second arg. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | is isConstantVal a better name? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,889 | intel | whitneywhtsang | @@ -0,0 +1,121 @@
+#include "intel/include/Dialect/TritonIntelGPU/IR/Dialect.h"
+#include "intel/include/Dialect/TritonIntelGPU/Transforms/Passes.h"
+#include "mlir/Dialect/Arith/IR/Arith.h"
+#include "mlir/IR/Visitors.h"
+#include "triton/Analysis/Utility.h"
+#include "triton/Dialect/TritonGPU/Transforms/Utility.h"
+
... | Since https://github.com/intel/intel-xpu-backend-for-triton/pull/1834, can we change this to OWord(128 bits)? |
intel-xpu-backend-for-triton | github_2023 | python | 1,861 | intel | pbchekin | @@ -5,15 +5,35 @@
from contextlib import contextmanager
from typing import Any, Dict, List
from . import language as tl
+import torch.xpu
+import logging
-if "intel_extension_for_pytorch" in sys.modules:
+
+def _support_elapsed_time(): | I would recommend adding cache (for example, `@functools.cache`). |
intel-xpu-backend-for-triton | github_2023 | python | 1,861 | intel | alexbaden | @@ -5,15 +5,36 @@
from contextlib import contextmanager
from typing import Any, Dict, List
from . import language as tl
+import torch.xpu
+import logging
-if "intel_extension_for_pytorch" in sys.modules:
+
+@functools.cache
+def _support_elapsed_time():
+ e1 = torch.xpu.Event(enable_timing=True)
+ e1.record(... | Why not just return true here? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,888 | intel | victor-eds | @@ -74,22 +76,31 @@ namespace mlir::triton::intel {
Value convertBf16ToFp32(Location loc, ConversionPatternRewriter &rewriter,
Value v) {
auto moduleOp = v.getDefiningOp()->getParentWithTrait<OpTrait::SymbolTable>();
- constexpr StringLiteral baseName = "__spirv_ConvertBF16ToFINTEL";
- Ty... | Do we wanna support vectors here too as the builtin path does? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,888 | intel | victor-eds | @@ -112,6 +123,13 @@ Value convertFp32ToBf16(Location loc, ConversionPatternRewriter &rewriter,
auto exponent_not_all1s = icmp_ne(check_exponent, i32_val(0));
auto exponent_all1s = icmp_eq(check_exponent, i32_val(0));
Value rounded = as_uint32;
+ if (rounding == RoundingMode::RTNE) {
+ rounded =
+ a... | Complex stuff |
intel-xpu-backend-for-triton | github_2023 | python | 1,888 | intel | vlad-penkin | @@ -137,6 +137,7 @@ def parse_target(self, tgt_prop) -> dict:
dev_prop['has_subgroup_matrix_multiply_accumulate_tensor_float32'] = tgt_prop.get(
'has_subgroup_matrix_multiply_accumulate_tensor_float32', False)
dev_prop['has_subgroup_2d_block_io'] = tgt_prop.get('has_subgroup_2d_block_io',... | `has_bf16_conversion` property value is the derivative of the device architecture. I suggest to set it explicitly to False for MTL only. |
intel-xpu-backend-for-triton | github_2023 | python | 1,888 | intel | vlad-penkin | @@ -185,7 +186,7 @@ def make_ttgir(mod, metadata, opt, properties):
intel.passes.ttgpuir.add_triton_annotate_module(pm, min(properties["sub_group_sizes"]),
properties["has_subgroup_2d_block_io"],
p... | For consistency please move `opt.threads_per_warp)` to the next line. |
intel-xpu-backend-for-triton | github_2023 | others | 1,846 | intel | FMarno | @@ -0,0 +1,151 @@
+# Comparing CI Runs
+
+This script can be used to compare the results of two runs of the
+"Performance E2E" CI workflow.
+
+## Prerequisites
+
+To evaluate the data from CI runs, the Python packages `pandas` and `numpy` and
+their corresponding dependencies are required.
+
+If you also plan to plot t... | ```suggestion
* `-p`/`--path`: The output path, `DIR`. Per default, the script would store all intermediate data and
```
This description takes a while to get to the point. |
intel-xpu-backend-for-triton | github_2023 | others | 1,846 | intel | FMarno | @@ -0,0 +1,151 @@
+# Comparing CI Runs
+
+This script can be used to compare the results of two runs of the
+"Performance E2E" CI workflow.
+
+## Prerequisites
+
+To evaluate the data from CI runs, the Python packages `pandas` and `numpy` and
+their corresponding dependencies are required.
+
+If you also plan to plot t... | ```suggestion
* `--no-plot`: Disable plotting. Per default, the script will also visualize the output in a plot.
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,846 | intel | FMarno | @@ -0,0 +1,151 @@
+# Comparing CI Runs
+
+This script can be used to compare the results of two runs of the
+"Performance E2E" CI workflow.
+
+## Prerequisites
+
+To evaluate the data from CI runs, the Python packages `pandas` and `numpy` and
+their corresponding dependencies are required.
+
+If you also plan to plot t... | ```suggestion
The evaluation mode can be used by adding the `-e`/`--eval-only` option.
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | FMarno | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | what about eval? |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | Nit: is it more reasonable to use `subprocess.check_call` (https://docs.python.org/3/library/subprocess.html#subprocess.check_call) in this context?. It throws an exception if process exit code is not 0 and prints process output to stdout/stderr. |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | ```suggestion
["gh", "run", "download", "-R", "intel/intel-xpu-backend-for-triton", "-D", name, run],
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | Nit:
```suggestion
path = Path(file).absolute
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | ```suggestion
for file in Path(directory).glob("**/*performance.csv"):
df = parse_data(config, df, file)
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | ```suggestion
f" relative difference > 0.0 means {numerator} performs better,"
f" relative difference < 0.0 means {denominator} performs better")
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | vlad-penkin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | I suggest to print the rows which are skipped. |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | vlad-penkin | @@ -0,0 +1,235 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+import re
+from pathlib import Path
+
+
+def get_config(ident):
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def download(ident):
+ if not shutil.whic... | Do we want to show / print rows which are present in current results only? |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name""" | Nit:
```suggestion
"""Retrieve configuration name."""
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | Nit:
```suggestion
"""Download artifacts for given configuration and CI run ID from GitHub."""
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | ```suggestion
def get_raw_data(args: argparse.Namespace) -> tuple[Optional[Path], Optional[Path]]:
```
This will also require
```
from typing import Optional
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | ```suggestion
def parse_directory(config: str, previous: pd.DataFrame, directory: Path) -> pd.DataFrame:
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | Is it expected to be in the previous loop? To merge all data frames for all csv files. |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | I think `Path()` creates a path relative to the current directory, `os.getcwd()` is not required.
```suggestion
numDir = Path(get_config(args.numerator))
denomDir = Path(get_config(args.denominator)).
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,846 | intel | pbchekin | @@ -0,0 +1,241 @@
+#! /usr/bin/env python3
+
+import argparse
+import shutil
+import subprocess
+import os
+import pandas as pd
+from pathlib import Path
+
+
+def get_config(ident: str) -> str:
+ """Retrieve configuration name"""
+ if ":" in ident:
+ return ident.split(":")[0]
+
+ return ident
+
+
+def ... | Not used |
intel-xpu-backend-for-triton | github_2023 | others | 1,846 | intel | whitneywhtsang | @@ -0,0 +1,153 @@
+# Comparing CI Runs
+
+This script can be used to compare the results of two runs of the
+"Performance E2E" CI workflow.
+
+## Prerequisites
+
+To evaluate the data from CI runs, the Python packages `pandas` and its
+corresponding dependencies are required.
+
+If you also plan to plot the performance... | ```suggestion
the script are independent from the mode of execution and will be explained
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -206,24 +209,29 @@ LogicalResult TritonGEN::Matrix2DBlockLoadOp::verify() {
}
assert(!getVnniTransform() && "Expecting vnni_transform should be false");
- switch (getElemSizeInBits()) {
- case 8:
- if (tileWidth != 32)
- return emitOpError("tile_width for 8 bit elements when vnni_transform is "
- ... | Wait a sec. When we use GenISA there will be some limitations still on the element size right ? We should have code to diagnose invalid element sizes also when GenISA APIs are used. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -399,14 +399,36 @@ struct LoadOpConversion
Type unpackedDPASOperandType = LLVM::getFixedVectorType(
typeConverter->convertType(eltTy), elemsPerLanePerDPASInst);
- // pack scalars for operand A and B.
- Type elemType = (isOperandA && eltTy != f32_ty) ? i16_ty : i32_ty;
+ // If the element typ... | The "DPAS type" to me means the result of the DPAS instruction. Please add a better description here.
Also "opaque packed type" is confusing because there is nothing opaque in a packed type (to me packed type means packing elements into a larger data type which doesn't make the larger data type opaque). |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -69,11 +70,21 @@ bool shouldRemove(tt::MakeTensorPtrOp &op, bool isUsedByStoreOp) {
!(isUsedByStoreOp && ttgi::hasDpasEncoding(tensorType)))
return true;
- // FIXME: Temporary workaround to avoid
- // compile error on fp8 2d block read
- Type eltType = tensorType.getElementType();
- if (eltType.isF... | Can you add a comment to explain why this code is needed ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | whitneywhtsang | @@ -69,11 +70,21 @@ bool shouldRemove(tt::MakeTensorPtrOp &op, bool isUsedByStoreOp) {
!(isUsedByStoreOp && ttgi::hasDpasEncoding(tensorType)))
return true;
- // FIXME: Temporary workaround to avoid
- // compile error on fp8 2d block read
- Type eltType = tensorType.getElementType();
- if (eltType.isF... | Why do we need to check dotLayout?
Didn't we already check that earlier? |
intel-xpu-backend-for-triton | github_2023 | others | 1,818 | intel | etiotto | @@ -333,3 +333,84 @@ llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_
%0 = triton_gen.2Dblockload %ptr, %base_width, %base_height, %base_pitch, %x, %y {elem_size_in_bits=8, tile_width=32, tile_height=8, v_blocks=2, transpose=false, vnni_transform=false, cache_control=Default} : (!llvm... | [nit]: For consistency with other tests in this file can we "sink" the `%` inside the `[[...]]` ? So:
`%[[ELEM_SIZE_IN_BITS:.*]]` --> `[[ELEM_SIZE_IN_BITS:%.*]]` |
intel-xpu-backend-for-triton | github_2023 | others | 1,818 | intel | etiotto | @@ -284,37 +284,13 @@ llvm.func @matrix_2Dblockload(%ptr : !llvm.ptr, %base_width : i32, %base_height
// -----
llvm.func @matrix_2Dblockload(%ptr : !llvm.ptr, %base_width : i32, %base_height : i32, %base_pitch : i32, %x : i32, %y : i32) {
- // expected-error @+1 {{'triton_gen.2Dblockload' op tile_width when vnni_t... | Hmmm. This test doesn't contain any tt.dot operation (lowered to DPAS instructions). So referring to DPAS execution size in the message is out of context. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -331,40 +331,17 @@ LogicalResult TritonGEN::Matrix2DBlockLoadOp::verify() {
if (getElemSizeInBits() == 32 || getVnniTransform()) {
if (resElemTySize != 32)
return emitOpError() << "expecting result element type to be 32 bits";
- } else if (resElemTySize != 16) {
- return emitOpError() << "expectin... | Referring to DPAS execution size in the message is not general enough because we will want to lower `Matrix2DBlockLoadOp` to use 2B block reads even when the load doesn't "feed" a tt.dot operation. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -399,14 +399,45 @@ struct LoadOpConversion
Type unpackedDPASOperandType = LLVM::getFixedVectorType(
typeConverter->convertType(eltTy), elemsPerLanePerDPASInst);
- // pack scalars for operand A and B.
- Type elemType = (isOperandA && eltTy != f32_ty) ? i16_ty : i32_ty;
+ Type loadResultElemTy... | [nit]: remove empty line |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -200,6 +200,38 @@ loadCacheControlToCacheControls(Builder &builder,
return builder.getAttr<TritonGEN::DecorationCacheControlAttr>(decorations);
}
+static bool isOCLBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
+ VectorType resTy = op.getRes().getType();
+ unsigned resElemTySize = resTy.getElementType... | ```suggestion
bool needsResElemSizeEqualTo32 =
op.getElemSizeInBits() == 32 || op.getVnniTransform();
assert((!needsResElemSizeEqualTo32 || resElemTySize == 32) &&
"Expecting 32-bit element type");
if (!needsResElemSizeEqualTo32 && resElemTySize != 16)
return false;
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,818 | intel | etiotto | @@ -200,6 +200,38 @@ loadCacheControlToCacheControls(Builder &builder,
return builder.getAttr<TritonGEN::DecorationCacheControlAttr>(decorations);
}
+static bool isOCLBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
+ VectorType resTy = op.getRes().getType();
+ unsigned resElemTySize = resTy.getElementType... | ```suggestion
if (op.getVnniTransform())
return true;
uint32_t tileWidth = op.getTileWidth();
switch (op.getElemSizeInBits()) {
case 8:
return (tileWidth == 32);
case 16:
return (tileWidth == 16);
case 32:
return (tileWidth == 8 || tileWidth == 16);
default:
llvm_unreacha... |
intel-xpu-backend-for-triton | github_2023 | others | 1,870 | intel | etiotto | @@ -1072,18 +1070,6 @@ module attributes {"triton_gpu.target" = "xpu", "triton_gpu.num-ctas" = 1 : i32,
// CHECK-NEXT: llvm.br ^bb2([[CMPXCHG_RES]] : i32)
// CHECK-NEXT: ^bb2([[RES:%.*]]: i32):
// CHECK-NEXT: [[RES_CAST:%.*]] = llvm.bitcast [[RES]] : i32 to f32
- // CHECK: llvm.call spir_fu... | Why removing the checks for the store and the barrier after the store ? Too many unnecessary changes |
intel-xpu-backend-for-triton | github_2023 | others | 1,870 | intel | etiotto | @@ -1142,21 +1129,14 @@ module attributes {"triton_gpu.target" = "xpu", "triton_gpu.num-ctas" = 1 : i32,
// CHECK: [[IE1:%.*]] = llvm.insertelement %arg2, [[UNDEF1]][{{.*}} : i32] : vector<1xf32>
// CHECK: [[PRED:%.*]] = llvm.and [[AND1]], %arg1 : i1
// CHECK-NEXT: [[ZERO:%.*]] = llvm.mlir.con... | Please add back this section of checks |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,870 | intel | chengjunlu | @@ -1200,6 +1200,8 @@ struct AtomicRMWOpConversion
emulateFp16AtomicRmw(rewriter, loc, atomicRmwAttr, valueElemTy,
rmwPtr, rmwVal, rmwMask, {zero});
} else {
+ if (!atomicNeedsSharedMemory(op.getResult())) | Can we move the code closer to the AtomicRMWOp and add more comments about why it is required?
|
intel-xpu-backend-for-triton | github_2023 | cpp | 1,859 | intel | whitneywhtsang | @@ -387,9 +387,97 @@ createBlock2DReadWithAddressPayloadUpdate(TritonGEN::Matrix2DBlockLoadOp op,
attrs);
};
+ auto createBlock2DReadGenIsa = [&](Value ptr,
+ TritonGEN::Matrix2DBlockLoadOp op) {
+ assert(isa<LLVM::LLVMPointerType>(ptr.ge... | can we use `getGenISATypeMangling`? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,859 | intel | whitneywhtsang | @@ -387,9 +387,97 @@ createBlock2DReadWithAddressPayloadUpdate(TritonGEN::Matrix2DBlockLoadOp op,
attrs);
};
+ auto createBlock2DReadGenIsa = [&](Value ptr,
+ TritonGEN::Matrix2DBlockLoadOp op) {
+ assert(isa<LLVM::LLVMPointerType>(ptr.ge... | can we use utilities in utility.h? like `i32_val(op.getElemSizeInBits())` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,859 | intel | whitneywhtsang | @@ -387,9 +387,97 @@ createBlock2DReadWithAddressPayloadUpdate(TritonGEN::Matrix2DBlockLoadOp op,
attrs);
};
+ auto createBlock2DReadGenIsa = [&](Value ptr, | [nit]
```suggestion
auto createBlock2DReadGenISA = [&](Value ptr,
``` |
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