repo stringclasses 3
values | commit stringlengths 40 40 | date stringdate 2023-04-02 02:30:17-0500 2026-10-18 07:42:16-0500 | pr_number int64 20 61.9k ⌀ | pr_url stringlengths 44 53 ⌀ | title stringlengths 8 263 | message stringlengths 8 8k | path stringlengths 10 155 | language stringclasses 4
values | license stringclasses 4
values | before_code stringlengths 160 118k | after_code stringlengths 340 120k | diff stringlengths 149 51k | lines_added int64 0 729 | lines_removed int64 0 488 | files_in_commit int64 1 10 | models_mentioned listlengths 0 4 | hardware_mentioned listlengths 0 16 | speedup_claims listlengths 0 10 | prompt stringlengths 569 119k | pr_body stringlengths 0 24k | gains stringlengths 2 197k | kernel_speedup float64 0.78 150 ⌀ | e2e_speedup float64 0.76 136 ⌀ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
vllm | 0b0aa874e85431a0f08a0d1fad95ae673e034392 | 2025-11-26T11:38:52-05:00 | 29,345 | https://github.com/vllm-project/vllm/pull/29345 | [Perf] Optimize batch invariant BMM, 18.1% Throughput improvement, 10.7% TTFT improvement (#29345) | [Perf] Optimize batch invariant BMM, 18.1% Throughput improvement, 10.7% TTFT improvement (#29345)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.co... | vllm/model_executor/layers/batch_invariant.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import os
from collections.abc import Callable
from typing import Any
import torch
import vllm.envs as envs
from vllm.logger import init_logger
from vllm.platforms import current_platform
from vllm.triton_utils ... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import os
from collections.abc import Callable
from typing import Any
import torch
import vllm.envs as envs
from vllm.logger import init_logger
from vllm.platforms import current_platform
from vllm.triton_utils ... | --- vllm/model_executor/layers/batch_invariant.py
+++ vllm/model_executor/layers/batch_invariant.py
@@ -216,6 +216,139 @@
@triton.jit
+def bmm_kernel(
+ a_ptr, # (*, ) pointer to A, (B, M, K)
+ b_ptr, # (*, ) pointer to B, (B, K, N)
+ c_ptr, # (*, ) pointer to C, (B, M, N)
+ B, # int, batch size
+ ... | 213 | 12 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/batch_invariant.py).
Goal: [Perf] Optimize batch invariant BMM, 18.1% Throughput improvement, 10.7% TTFT improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileC... | <!-- markdownlint-disable -->
## Purpose
From issue https://github.com/vllm-project/vllm/issues/27433, optimization for the triton kernel.
BMM is the most time-consuming kernel so small optimization could have large speed-ups
## Test
### Performance
```bash
export VLLM_BATCH_INVARIANT=1
export VLLM_DEEP_GEMM_WARM... | [{"scope": "e2e", "hardware": null, "model": "DeepSeek-V3.1", "shape": null, "batch_size": 256, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 18.65, "optimized": 22.04, "stated_speedup": null, "speedup": 1.1818}, {"scope": "e2e", "hardware": null, "model": "DeepSeek-V3.1", "shap... | null | 1.1818 |
vllm | d9d342d214b8c13f71215318a6d9252cc4a5ca47 | 2025-11-26T12:45:28+08:00 | 27,457 | https://github.com/vllm-project/vllm/pull/27457 | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457) | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457)
Signed-off-by: ganyi <ygan@amd.com> | csrc/attention/merge_attn_states.cu | cuda | Apache-2.0 | #include <optional>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <algorithm>
#include "attention_dtypes.h"
#include "attention_utils.cuh"
namespace vllm {
// Implements section 2.2 of https://www.arxiv.org/pdf/2501.01005
// can be used to combine partial attentio... | #include <optional>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <algorithm>
#include "attention_dtypes.h"
#include "attention_utils.cuh"
namespace vllm {
// Implements section 2.2 of https://www.arxiv.org/pdf/2501.01005
// can be used to combine partial attentio... | --- csrc/attention/merge_attn_states.cu
+++ csrc/attention/merge_attn_states.cu
@@ -16,7 +16,8 @@
scalar_t* output, float* output_lse, const scalar_t* prefix_output,
const float* prefix_lse, const scalar_t* suffix_output,
const float* suffix_lse, const uint num_tokens, const uint num_heads,
- const ui... | 12 | 15 | 5 | [
"deepseek"
] | [
"ROCM"
] | [] | Optimize this cuda kernel file from vllm (csrc/attention/merge_attn_states.cu).
Goal: [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek
Target hardware: ROCM
Target models: deepseek
Current file:
```cuda
#include <optional>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDA... |
## Purpose
We found there are two redundant D2D copy in deepseek, which can be removed by in-place write inside the kernel.
Before
<img width="1451" height="51" alt="image" src="https://github.com/user-attachments/assets/9d6a14e1-2e20-47ab-9111-1967644894f8" />
<img width="1463" height="62" alt="image" src="https://... | [{"scope": "e2e", "hardware": "AMD Mi300", "model": "deepseek", "shape": "3.5k/1k inputs", "batch_size": null, "metric": "Output token throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 1012.31, "optimized": 1039.81, "stated_speedup": null, "speedup": 1.0272}, {"scope": "e2e", "hardware": "AMD Mi300", ... | null | 1.0286 |
vllm | d9d342d214b8c13f71215318a6d9252cc4a5ca47 | 2025-11-26T12:45:28+08:00 | 27,457 | https://github.com/vllm-project/vllm/pull/27457 | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457) | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457)
Signed-off-by: ganyi <ygan@amd.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -52,14 +52,13 @@
const int64_t blocksparse_vert_stride, const int64_t blocksparse_block_size,
const int64_t blocksparse_head_sliding_step);
-#ifndef USE_ROCM
void merge_attn_states(torch::Tensor& output,
std::optional<torch::Tensor> output_lse,
... | 1 | 2 | 5 | [
"deepseek"
] | [
"ROCM"
] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek
Target hardware: ROCM
Target models: deepseek
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor ... |
## Purpose
We found there are two redundant D2D copy in deepseek, which can be removed by in-place write inside the kernel.
Before
<img width="1451" height="51" alt="image" src="https://github.com/user-attachments/assets/9d6a14e1-2e20-47ab-9111-1967644894f8" />
<img width="1463" height="62" alt="image" src="https://... | [{"scope": "e2e", "hardware": "AMD Mi300", "model": "deepseek", "shape": "3.5k/1k inputs", "batch_size": null, "metric": "Output token throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 1012.31, "optimized": 1039.81, "stated_speedup": null, "speedup": 1.0272}, {"scope": "e2e", "hardware": "AMD Mi300", ... | null | 1.0286 |
vllm | d9d342d214b8c13f71215318a6d9252cc4a5ca47 | 2025-11-26T12:45:28+08:00 | 27,457 | https://github.com/vllm-project/vllm/pull/27457 | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457) | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457)
Signed-off-by: ganyi <ygan@amd.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -63,7 +63,6 @@
" int blocksparse_head_sliding_step) -> ()");
ops.impl("paged_attention_v2", torch::kCUDA, &paged_attention_v2);
-#ifndef USE_ROCM
// Merge attn states
// Implements section 2.2 of https://www.arxiv.org/pdf/2501.01005
// c... | 1 | 2 | 5 | [
"deepseek"
] | [
"ROCM"
] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek
Target hardware: ROCM
Target models: deepseek
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library... |
## Purpose
We found there are two redundant D2D copy in deepseek, which can be removed by in-place write inside the kernel.
Before
<img width="1451" height="51" alt="image" src="https://github.com/user-attachments/assets/9d6a14e1-2e20-47ab-9111-1967644894f8" />
<img width="1463" height="62" alt="image" src="https://... | [{"scope": "e2e", "hardware": "AMD Mi300", "model": "deepseek", "shape": "3.5k/1k inputs", "batch_size": null, "metric": "Output token throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 1012.31, "optimized": 1039.81, "stated_speedup": null, "speedup": 1.0272}, {"scope": "e2e", "hardware": "AMD Mi300", ... | null | 1.0286 |
vllm | d9d342d214b8c13f71215318a6d9252cc4a5ca47 | 2025-11-26T12:45:28+08:00 | 27,457 | https://github.com/vllm-project/vllm/pull/27457 | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457) | [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek (#27457)
Signed-off-by: ganyi <ygan@amd.com> | vllm/attention/ops/triton_merge_attn_states.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
from vllm.triton_utils import tl, triton
# Implements section 2.2 of https://www.arxiv.org/pdf/2501.01005
# can be used to combine partial attention results (in the split-KV case)
def merge_attn_s... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
from vllm.triton_utils import tl, triton
# Implements section 2.2 of https://www.arxiv.org/pdf/2501.01005
# can be used to combine partial attention results (in the split-KV case)
def merge_attn_s... | --- vllm/attention/ops/triton_merge_attn_states.py
+++ vllm/attention/ops/triton_merge_attn_states.py
@@ -20,7 +20,11 @@
num_query_heads = output.shape[1]
head_size = output.shape[2]
padded_head_size = triton.next_power_of_2(head_size)
-
+ # We assume the output stride on num_head is not always as sam... | 17 | 6 | 5 | [
"deepseek"
] | [
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_merge_attn_states.py).
Goal: [Performance][MLA][ROCm] Remove redundant D2D copy in deepseek
Target hardware: ROCM
Target models: deepseek
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors... |
## Purpose
We found there are two redundant D2D copy in deepseek, which can be removed by in-place write inside the kernel.
Before
<img width="1451" height="51" alt="image" src="https://github.com/user-attachments/assets/9d6a14e1-2e20-47ab-9111-1967644894f8" />
<img width="1463" height="62" alt="image" src="https://... | [{"scope": "e2e", "hardware": "AMD Mi300", "model": "deepseek", "shape": "3.5k/1k inputs", "batch_size": null, "metric": "Output token throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 1012.31, "optimized": 1039.81, "stated_speedup": null, "speedup": 1.0272}, {"scope": "e2e", "hardware": "AMD Mi300", ... | null | 1.0286 |
vllm | 77e10c9cab751c83de0b2200977212922cc3776f | 2025-11-25T10:05:46+08:00 | 28,029 | https://github.com/vllm-project/vllm/pull/28029 | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029) | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029)
Signed-off-by: ganyi <ygan@amd.com> | csrc/cache.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | --- csrc/cache.h
+++ csrc/cache.h
@@ -41,11 +41,12 @@
const double scale, const std::string& kv_cache_dtype);
void gather_and_maybe_dequant_cache(
- torch::Tensor const& src_cache, // [NUM_BLOCKS, BLOCK_SIZE, ENTRIES...]
- torch::Tensor const& dst, // [TOT_TOKENS, ENTRIES...]
- ... | 6 | 5 | 4 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.h).
Goal: [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_b... | <!-- markdownlint-disable -->
## Purpose
We found the `gather_and_maybe_dequant_cache` kernel can be the performance bottle neck on the extremely long sequence case, In our private test branch, this kernel takes 2.12ms in a single layer when operating on a 57k prefix caching case, and that count to almost 30% time of ... | [{"scope": "kernel", "hardware": "MI308", "model": null, "shape": "context_length=65536", "batch_size": 3, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 1.92, "optimized": 0.31, "stated_speedup": null, "speedup": 6.1935}, {"scope": "kernel", "hardware": "MI308", "model": null, "shape": "cont... | 3.2023 | null |
vllm | 77e10c9cab751c83de0b2200977212922cc3776f | 2025-11-25T10:05:46+08:00 | 28,029 | https://github.com/vllm-project/vllm/pull/28029 | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029) | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029)
Signed-off-by: ganyi <ygan@amd.com> | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/w8a8/fp8/amd/quant_utils.c... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/w8a8/fp8/amd/quant_utils.c... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -905,91 +905,79 @@
namespace vllm {
// grid is launched with dimensions (batch, num_splits)
-template <typename scalar_t, typename cache_t, Fp8KVCacheDataType kv_dt>
+template <typename scalar_t, typename cache_t, Fp8KVCacheDataType kv_dt,
+ int ENTRY_... | 88 | 94 | 4 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/... | <!-- markdownlint-disable -->
## Purpose
We found the `gather_and_maybe_dequant_cache` kernel can be the performance bottle neck on the extremely long sequence case, In our private test branch, this kernel takes 2.12ms in a single layer when operating on a 57k prefix caching case, and that count to almost 30% time of ... | [{"scope": "kernel", "hardware": "MI308", "model": null, "shape": "context_length=65536", "batch_size": 3, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 1.92, "optimized": 0.31, "stated_speedup": null, "speedup": 6.1935}, {"scope": "kernel", "hardware": "MI308", "model": null, "shape": "cont... | 3.2023 | null |
vllm | 77e10c9cab751c83de0b2200977212922cc3776f | 2025-11-25T10:05:46+08:00 | 28,029 | https://github.com/vllm-project/vllm/pull/28029 | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029) | [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence (#28029)
Signed-off-by: ganyi <ygan@amd.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -695,7 +695,8 @@
cache_ops.def(
"gather_and_maybe_dequant_cache(Tensor src_cache, Tensor! dst, "
" Tensor block_table, Tensor cu_seq_lens, "
- " int batch_size, "
+ " ... | 2 | 1 | 4 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Perf][Deepseek] optimize gather_and_maybe_dequant_cache kernel's perf for extremely long sequence
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "co... | <!-- markdownlint-disable -->
## Purpose
We found the `gather_and_maybe_dequant_cache` kernel can be the performance bottle neck on the extremely long sequence case, In our private test branch, this kernel takes 2.12ms in a single layer when operating on a 57k prefix caching case, and that count to almost 30% time of ... | [{"scope": "kernel", "hardware": "MI308", "model": null, "shape": "context_length=65536", "batch_size": 3, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 1.92, "optimized": 0.31, "stated_speedup": null, "speedup": 6.1935}, {"scope": "kernel", "hardware": "MI308", "model": null, "shape": "cont... | 3.2023 | null |
vllm | 730bd35378bf2a5b56b6d3a45be28b3092d26519 | 2025-11-22T17:04:36Z | 29,193 | https://github.com/vllm-project/vllm/pull/29193 | [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193) | [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com> | csrc/cpu/cpu_attn.cpp | cpp | Apache-2.0 | #include "cpu_attn_vec.hpp"
#include "cpu_attn_vec16.hpp"
#ifdef CPU_CAPABILITY_AMXBF16
#include "cpu_attn_amx.hpp"
#define AMX_DISPATCH(...) \
case cpu_attention::ISA::AMX: { \
using attn_impl = cpu_attention::At... | #include "cpu_attn_vec.hpp"
#include "cpu_attn_vec16.hpp"
#ifdef CPU_CAPABILITY_AMXBF16
#include "cpu_attn_amx.hpp"
#define AMX_DISPATCH(...) \
case cpu_attention::ISA::AMX: { \
using attn_impl = cpu_attention::At... | --- csrc/cpu/cpu_attn.cpp
+++ csrc/cpu/cpu_attn.cpp
@@ -12,6 +12,18 @@
#else
#define AMX_DISPATCH(...) case cpu_attention::ISA::AMX:
#endif
+
+#ifdef __aarch64__
+ #include "cpu_attn_neon.hpp"
+ #define NEON_DISPATCH(...) \
+ case cpu_attention::ISA::NEON: { ... | 17 | 0 | 3 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/cpu_attn.cpp).
Goal: [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include "cpu_attn_vec.hpp"
#include "cpu_attn_vec16.hpp"
#ifdef CPU_CAPABILITY_AMXBF16
#include "c... | <!-- markdownlint-disable -->
[perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON
NEON is an Arm SIMD instruction set extension, compulsory since `armv8-a`
## Purpose
Fixes #28981 for Arm CPUs
Related to #23934 (since it enables attention sinks for Arm)
PR #27954 added `cpu_attention_with_k... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "batch size = 64, query tokens = kv tokens = 512, q heads = 32, kv heads = 8, head size = 128, block size = 128", "batch_size": 64, "metric": "latency", "unit": null, "higher_is_better": false, "baseline": null, "optimized": null, "stated_speedup": 2.0, "sp... | 2 | 1.13 |
vllm | 730bd35378bf2a5b56b6d3a45be28b3092d26519 | 2025-11-22T17:04:36Z | 29,193 | https://github.com/vllm-project/vllm/pull/29193 | [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193) | [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com> | csrc/cpu/cpu_attn_impl.hpp | cpp | Apache-2.0 | #ifndef CPU_ATTN_HPP
#define CPU_ATTN_HPP
#include <type_traits>
#include <cstddef>
#if defined(__APPLE__)
#include <sys/sysctl.h>
#endif
#include "cpu_types.hpp"
#include "scratchpad_manager.h"
#include "cpu_attn_macros.h"
#include "utils.hpp"
namespace cpu_attention {
enum class ISA { AMX, VEC, VEC16 };
templa... | #ifndef CPU_ATTN_HPP
#define CPU_ATTN_HPP
#include <type_traits>
#include <cstddef>
#if defined(__APPLE__)
#include <sys/sysctl.h>
#endif
#include "cpu_types.hpp"
#include "scratchpad_manager.h"
#include "cpu_attn_macros.h"
#include "utils.hpp"
namespace cpu_attention {
enum class ISA { AMX, VEC, VEC16, NEON };
... | --- csrc/cpu/cpu_attn_impl.hpp
+++ csrc/cpu/cpu_attn_impl.hpp
@@ -14,7 +14,7 @@
#include "utils.hpp"
namespace cpu_attention {
-enum class ISA { AMX, VEC, VEC16 };
+enum class ISA { AMX, VEC, VEC16, NEON };
template <ISA isa, typename scalar_t, int64_t head_dim>
class AttentionImpl {};
@@ -142,6 +142,12 @@
... | 7 | 1 | 3 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/cpu_attn_impl.hpp).
Goal: [perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#ifndef CPU_ATTN_HPP
#define CPU_ATTN_HPP
#include <type_traits>
#include <cstddef>
#if defined... | <!-- markdownlint-disable -->
[perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON
NEON is an Arm SIMD instruction set extension, compulsory since `armv8-a`
## Purpose
Fixes #28981 for Arm CPUs
Related to #23934 (since it enables attention sinks for Arm)
PR #27954 added `cpu_attention_with_k... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "batch size = 64, query tokens = kv tokens = 512, q heads = 32, kv heads = 8, head size = 128, block size = 128", "batch_size": 64, "metric": "latency", "unit": null, "higher_is_better": false, "baseline": null, "optimized": null, "stated_speedup": 2.0, "sp... | 2 | 1.13 |
vllm | a42ab317acff8c4b7d4808bb34548a530ee04f0f | 2025-11-21T11:46:20-05:00 | 28,948 | https://github.com/vllm-project/vllm/pull/28948 | [Log] Optimize startup log (#28948) | [Log] Optimize startup log (#28948)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: Nick Hill <nhill@redhat.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -872,8 +872,10 @@
for config_file_path in config_file_paths:
if os.path.exists(config_file_path):
with open(config_file_path) as f:
- logger.info(
- ... | 4 | 2 | 2 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Log] Optimize startup log
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
""... | ## Purpose
Reduce duplicate logs when using dp/tp
| [] | null | null |
vllm | f1805db1a671ffb1c99b2eae98e1b1b729fbcc65 | 2025-11-21T19:43:52+05:30 | 25,559 | https://github.com/vllm-project/vllm/pull/25559 | [Perf] These changes enhance the NUMA functionality of vllm for systems with more than one NUMA nodes per socket (#25559) | [Perf] These changes enhance the NUMA functionality of vllm for systems with more than one NUMA nodes per socket (#25559)
Signed-off-by: Siddappa Karabannavar <siddappa.karabannavar@amd.com> | csrc/cpu/utils.cpp | cpp | Apache-2.0 | #ifndef VLLM_NUMA_DISABLED
#include <numa.h>
#include <unistd.h>
#include <string>
#include <sched.h>
#endif
#if __GLIBC__ == 2 && __GLIBC_MINOR__ < 30
#include <unistd.h>
#include <sys/syscall.h>
#define gettid() syscall(SYS_gettid)
#endif
#include "cpu_types.hpp"
#ifdef VLLM_NUMA_DISABLED
std::string ... | #ifndef VLLM_NUMA_DISABLED
#include <numa.h>
#include <unistd.h>
#include <string>
#include <sched.h>
#endif
#if __GLIBC__ == 2 && __GLIBC_MINOR__ < 30
#include <unistd.h>
#include <sys/syscall.h>
#define gettid() syscall(SYS_gettid)
#endif
#include "cpu_types.hpp"
#ifdef VLLM_NUMA_DISABLED
std::string ... | --- csrc/cpu/utils.cpp
+++ csrc/cpu/utils.cpp
@@ -45,31 +45,54 @@
// Memory node binding
if (numa_available() != -1) {
int mem_node_id = numa_node_of_cpu(omp_cpu_ids.front());
- // Verify all CPUs are on the same NUMA node
- for (size_t i = 1; i < omp_cpu_ids.size(); ++i) {
- int node_id = numa_no... | 44 | 21 | 1 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/utils.cpp).
Goal: [Perf] These changes enhance the NUMA functionality of vllm for systems with more than one NUMA nodes per socket
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#ifndef VLLM_NUMA_DISABLED
#include <numa.h>
#include <unistd.h>... | This PR enhances NUMA memory placement for CPU executions. Previously, all memory allocations were pinned to NUMA node 0 regardless of how many NUMA nodes are getting used in the workload, leading to excessive remote memory accesses and degraded performance. With this change, allocations follow the active NUMA topology... | [] | null | null |
vllm | a982f5b5ea4a1932424927ea357b532d0e45caf1 | 2025-11-21T11:39:09+08:00 | 28,103 | https://github.com/vllm-project/vllm/pull/28103 | [kernel][perf] support uncontiguous input for rms_norm kernel (#28103) | [kernel][perf] support uncontiguous input for rms_norm kernel (#28103)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/dispatch_utils.h | cpp | Apache-2.0 | /*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma once
#include <torch/all.h>
// Need a special dispatch case macro since we will nest the FP8 dispatch.
// Instead of the usual 'scalar_t', this names the dispatched type 'fp8_t'.
#define AT_DISPATCH_FP8_CASE(enum... | /*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma once
#include <torch/all.h>
// Need a special dispatch case macro since we will nest the FP8 dispatch.
// Instead of the usual 'scalar_t', this names the dispatched type 'fp8_t'.
#define AT_DISPATCH_FP8_CASE(enum... | --- csrc/dispatch_utils.h
+++ csrc/dispatch_utils.h
@@ -117,3 +117,24 @@
break; \
} \
}
+
+#define VLLM_DISPATCH_RANK234(NUM_DIMS, ...) \
+ switch (NUM_DIMS) { ... | 21 | 0 | 2 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/dispatch_utils.h).
Goal: [kernel][perf] support uncontiguous input for rms_norm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
/*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma on... | ## Purpose
currently, main branch has a todo:
https://github.com/vllm-project/vllm/blob/14a125a06df7275923fe9748f67e27e449412d1f/vllm/_custom_ops.py#L331-L332
As titiled, this pr support uncontiguous input for norm kernel and solve this todo, which is introduced by #17735 .
Previously, the RMS norm kernel required `... | [{"scope": "e2e", "hardware": null, "model": "qwen3-0.6b", "shape": "in_len=1024,out_len=1024", "batch_size": 8, "metric": "TTFT", "unit": "ms", "higher_is_better": false, "baseline": 86.76, "optimized": 85.73, "stated_speedup": null, "speedup": 1.012}, {"scope": "e2e", "hardware": null, "model": "qwen3-0.6b", "shape":... | null | 1.0419 |
vllm | a982f5b5ea4a1932424927ea357b532d0e45caf1 | 2025-11-21T11:39:09+08:00 | 28,103 | https://github.com/vllm-project/vllm/pull/28103 | [kernel][perf] support uncontiguous input for rms_norm kernel (#28103) | [kernel][perf] support uncontiguous input for rms_norm kernel (#28103)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/layernorm_kernels.cu | cuda | Apache-2.0 | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_invariant.hpp"
#include "quantization/vectorization_utils.cuh"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t, int... | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_invariant.hpp"
#include "quantization/vectorization_utils.cuh"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t, int... | --- csrc/layernorm_kernels.cu
+++ csrc/layernorm_kernels.cu
@@ -10,16 +10,38 @@
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
-template <typename scalar_t, int VEC_SIZE>
+template <typename scalar_t, int VEC_SIZE, int NUM_DIMS>
__global__ void rms_norm_kernel(
- scalar_t* __restrict__ out, ... | 54 | 26 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_kernels.cu).
Goal: [kernel][perf] support uncontiguous input for rms_norm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_... | ## Purpose
currently, main branch has a todo:
https://github.com/vllm-project/vllm/blob/14a125a06df7275923fe9748f67e27e449412d1f/vllm/_custom_ops.py#L331-L332
As titiled, this pr support uncontiguous input for norm kernel and solve this todo, which is introduced by #17735 .
Previously, the RMS norm kernel required `... | [{"scope": "e2e", "hardware": null, "model": "qwen3-0.6b", "shape": "in_len=1024,out_len=1024", "batch_size": 8, "metric": "TTFT", "unit": "ms", "higher_is_better": false, "baseline": 86.76, "optimized": 85.73, "stated_speedup": null, "speedup": 1.012}, {"scope": "e2e", "hardware": null, "model": "qwen3-0.6b", "shape":... | null | 1.0419 |
vllm | 5031cd5d55ad99e8f9b31dd0020a06b346f6e493 | 2025-11-19T18:53:15-05:00 | 28,069 | https://github.com/vllm-project/vllm/pull/28069 | [Refactor] Optimize `select_experts` (#28069) | [Refactor] Optimize `select_experts` (#28069)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -1246,7 +1246,6 @@
expert_load_view: torch.Tensor,
logical_to_physical_map: torch.Tensor,
logical_replica_count: torch.Tensor,
- indices_type: torch.dtype | None = None,
) -> torch.Tensor:
... | 0 | 5 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Refactor] Optimize `select_experts`
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM ... | ## Purpose
Several small optimizations including:
- avoid mul if `routed_scaling_factor==1`
- avoid duplicate dtype cast when eplb is enabled
## Test
I don't see too much e2e perf improvement since these are small optimizations
Doesn't hurt accuracy:
```bash
lm_eval --model local-completions --model_args "base_ur... | [] | null | null |
vllm | 6965ef436fb398bfbbdce5b6f88dd842c5944771 | 2025-11-15T00:52:14-05:00 | 28,694 | https://github.com/vllm-project/vllm/pull/28694 | [Performance][DeepGEMM] Estimate expected_m (#28694) | [Performance][DeepGEMM] Estimate expected_m (#28694)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuantConfig
from vllm.model_exec... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.forward_context import get_forward_context, is_forward_context_available
from vllm.logger import init_logger
from vllm.mod... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -5,6 +5,7 @@
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
+from vllm.forward_context import get_forward_context, is_forward_context_available
from ... | 35 | 5 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Performance][DeepGEMM] Estimate expected_m
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contri... | ## Purpose
The DeepGEMM `fp8_m_grouped_gemm_nt_masked` kernel inputs an `expected_m` parameter. This parameter is an hint to the DeepGEMM kernel that indicates the estimated number of tokens per expert. on `main` we simply set it to the maximum number to tokens an expert can have. This PR, updates that estimation logic... | [{"scope": "e2e", "hardware": null, "model": "Qwen/Qwen3-30B-A3B-FP8", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.11, "speedup": 1.11}] | null | 1.11 |
vllm | fe1cd7704ddd3266ddc97181ab24a167b3c9223c | 2025-11-13T13:16:55-05:00 | 28,358 | https://github.com/vllm-project/vllm/pull/28358 | [Performance][B200] silu_mul_quant: pack scales in int32 (#28358) | [Performance][B200] silu_mul_quant: pack scales in int32 (#28358)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | csrc/quantization/activation_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "core/math.hpp"
#include "../cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/w8a8/fp8/common.cuh"
#include <c10/util/Float8_e4m3fn.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#inc... | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "core/math.hpp"
#include "../cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/w8a8/fp8/common.cuh"
#include <c10/util/Float8_e4m3fn.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#inc... | --- csrc/quantization/activation_kernels.cu
+++ csrc/quantization/activation_kernels.cu
@@ -279,17 +279,17 @@
}
template <int BLOCK_COUNT, int SMEM_SIZE_BYTES_Y, typename fp8_type,
- int THREADS, typename Idx_t, bool USE_UE8M0, int GROUP_SIZE = 128,
- int NUM_STAGES = 3>
+ typename scale_... | 125 | 47 | 2 | [] | [
"B200"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/activation_kernels.cu).
Goal: [Performance][B200] silu_mul_quant: pack scales in int32
Target hardware: B200
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include ... | ## Purpose
This PR focuses on the deepep_low_latency All2All code path.
DeepGEMM expects the activation scales to be packed in int32 format. Given unpacked scales, DeepGEMM performs scale transformation itself. This transformation by DeepGEMM is slow and delays the kernel execution unnecessarily.
This PR fuses the ... | [] | null | null |
vllm | fe1cd7704ddd3266ddc97181ab24a167b3c9223c | 2025-11-13T13:16:55-05:00 | 28,358 | https://github.com/vllm-project/vllm/pull/28358 | [Performance][B200] silu_mul_quant: pack scales in int32 (#28358) | [Performance][B200] silu_mul_quant: pack scales in int32 (#28358)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuantConfig
from vllm.model_execu... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuantConfig
from vllm.model_exec... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
+
import torch
@@ -13,12 +14,31 @@
from vllm.platforms im... | 58 | 20 | 2 | [] | [
"B200"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Performance][B200] silu_mul_quant: pack scales in int32
Target hardware: B200
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright ... | ## Purpose
This PR focuses on the deepep_low_latency All2All code path.
DeepGEMM expects the activation scales to be packed in int32 format. Given unpacked scales, DeepGEMM performs scale transformation itself. This transformation by DeepGEMM is slow and delays the kernel execution unnecessarily.
This PR fuses the ... | [] | null | null |
vllm | 74a9a9faad062e6fe90f7d238b5fad7e2f3da237 | 2025-11-12T16:13:03-05:00 | 27,897 | https://github.com/vllm-project/vllm/pull/27897 | [Performance][B200] Fix deepgemm prologue (#27897) | [Performance][B200] Fix deepgemm prologue (#27897)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuantConfig
from vllm.model_execu... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuantConfig
from vllm.model_execu... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -232,6 +232,7 @@
"""
super().__init__(quant_config)
assert self.block_shape == get_mk_alignment_for_contiguous_layout()
+ assert self.quant_config.use_... | 7 | 0 | 5 | [] | [
"B200"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Performance][B200] Fix deepgemm prologue
Target hardware: B200
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to... | ## Purpose
DeepGEMM requires the activation and weights scales to be in a specific format. When the scales are not provided in the desired format, DeepGEMM transforms the scales itself. This is usually very slow.
On H100, DeepGEMM needs the scales to be ColumnMajor and in float32.
On B200, DeepGEMM needs the scales ... | [] | null | null |
vllm | 74a9a9faad062e6fe90f7d238b5fad7e2f3da237 | 2025-11-12T16:13:03-05:00 | 27,897 | https://github.com/vllm-project/vllm/pull/27897 | [Performance][B200] Fix deepgemm prologue (#27897) | [Performance][B200] Fix deepgemm prologue (#27897)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Callable, Sequence
from typing import Any
import torch
import vllm.envs as envs
... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Callable, Sequence
from typing import Any
import torch
import vllm.envs as envs
... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -34,6 +34,7 @@
is_deep_gemm_e8m0_used,
is_deep_gemm_supported,
should_use_deepgemm_for_fp8_linear,
+ transform_sf_into_required_layout,
)
from vllm.utils.torch_utils impor... | 54 | 5 | 5 | [] | [
"B200"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Performance][B200] Fix deepgemm prologue
Target hardware: B200
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to th... | ## Purpose
DeepGEMM requires the activation and weights scales to be in a specific format. When the scales are not provided in the desired format, DeepGEMM transforms the scales itself. This is usually very slow.
On H100, DeepGEMM needs the scales to be ColumnMajor and in float32.
On B200, DeepGEMM needs the scales ... | [] | null | null |
vllm | f76e85c29984df2b0312efa5bfb80218689b9e17 | 2025-11-12T10:51:43-05:00 | 28,492 | https://github.com/vllm-project/vllm/pull/28492 | [Performance][Hopper] Avoid M dim padding to 4x for most cases (due to cuda graphs paddings) (#28492) | [Performance][Hopper] Avoid M dim padding to 4x for most cases (due to cuda graphs paddings) (#28492)
Signed-off-by: Alexander Matveev <amatveev@redhat.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Callable, Sequence
from typing import Any
import torch
import vllm.envs as envs
... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Callable, Sequence
from typing import Any
import torch
import vllm.envs as envs
... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -115,20 +115,27 @@
dim if dim % pad_multiple == 0 else dim + pad_multiple - (dim % pad_multiple)
)
- padded_shape = [padded, *qx.shape[1:]]
- padded_qx = torch.zeros(pad... | 21 | 14 | 1 | [] | [
"HOPPER"
] | [
"4x"
] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Performance][Hopper] Avoid M dim padding to 4x for most cases (due to cuda graphs paddings)
Target hardware: HOPPER
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
#... | This PR avoids the M dimensions (num_tokens) padding to 4x (that is required by Hopper CUTLASS) in most cases due to padding of cuda graphs and their capture sizes.
For DSR1-FP8 running on 8xH200 GPUs with batch size 32:
**Before PR:**
Mean TPOT (ms): 31.41
**After PR**
Mean TPOT (ms): ... | [{"scope": "e2e", "hardware": "H200", "model": "DSR1-FP8", "shape": null, "batch_size": 32, "metric": "TPOT", "unit": "ms", "higher_is_better": false, "baseline": 31.41, "optimized": 30.4, "stated_speedup": null, "speedup": 1.0332}] | null | 1.0332 |
vllm | 6c3c0f8235cacce28982687e362b80d953ea7617 | 2025-11-11T10:02:23-08:00 | 27,931 | https://github.com/vllm-project/vllm/pull/27931 | [Kernel] Optimize rms_norm kernel (#27931) | [Kernel] Optimize rms_norm kernel (#27931)
Signed-off-by: Xin Yang <xyangx@amazon.com> | csrc/dispatch_utils.h | cpp | Apache-2.0 | /*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma once
#include <torch/all.h>
// Need a special dispatch case macro since we will nest the FP8 dispatch.
// Instead of the usual 'scalar_t', this names the dispatched type 'fp8_t'.
#define AT_DISPATCH_FP8_CASE(enum... | /*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma once
#include <torch/all.h>
// Need a special dispatch case macro since we will nest the FP8 dispatch.
// Instead of the usual 'scalar_t', this names the dispatched type 'fp8_t'.
#define AT_DISPATCH_FP8_CASE(enum... | --- csrc/dispatch_utils.h
+++ csrc/dispatch_utils.h
@@ -88,3 +88,32 @@
#define VLLM_DISPATCH_INTEGRAL_AND_UNSIGNED_TYPES(TYPE, NAME, ...) \
AT_DISPATCH_SWITCH( \
TYPE, NAME, VLLM_DISPATCH_CASE_INTEGRAL_AND_UNSIGNED_TYPES(__VA_ARGS__))
+
+#define VLLM_DISPATCH_VEC_... | 29 | 0 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/dispatch_utils.h).
Goal: [Kernel] Optimize rms_norm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
/*
* Adapted from
* https://github.com/pytorch/pytorch/blob/v2.0.1/aten/src/ATen/Dispatch.h
*/
#pragma once
#include <torch/all.h>
... | <!-- markdownlint-disable -->
## Purpose
Optimize rms_norm kernel:
* Do vectorized load and store using `vec_n_t<scalar_t, VEC_SIZE>`.
* Since input, weight, output tensors are the same dtype, and all of their last dimension are hidden_size, we can get the largest safe vec_size by calculating the number that can divi... | [] | null | null |
vllm | 6c3c0f8235cacce28982687e362b80d953ea7617 | 2025-11-11T10:02:23-08:00 | 27,931 | https://github.com/vllm-project/vllm/pull/27931 | [Kernel] Optimize rms_norm kernel (#27931) | [Kernel] Optimize rms_norm kernel (#27931)
Signed-off-by: Xin Yang <xyangx@amazon.com> | csrc/layernorm_kernels.cu | cuda | Apache-2.0 | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_invariant.hpp"
#include "quantization/vectorization_utils.cuh"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t>
__g... | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_invariant.hpp"
#include "quantization/vectorization_utils.cuh"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t, int... | --- csrc/layernorm_kernels.cu
+++ csrc/layernorm_kernels.cu
@@ -10,7 +10,7 @@
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
-template <typename scalar_t>
+template <typename scalar_t, int VEC_SIZE>
__global__ void rms_norm_kernel(
scalar_t* __restrict__ out, // [..., hidden_size]
... | 28 | 11 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_kernels.cu).
Goal: [Kernel] Optimize rms_norm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include "type_convert.cuh"
#include "dispatch_utils.h"
#include "cub_helpers.h"
#include "core/batch_invariant.hpp"
#include "qua... | <!-- markdownlint-disable -->
## Purpose
Optimize rms_norm kernel:
* Do vectorized load and store using `vec_n_t<scalar_t, VEC_SIZE>`.
* Since input, weight, output tensors are the same dtype, and all of their last dimension are hidden_size, we can get the largest safe vec_size by calculating the number that can divi... | [] | null | null |
vllm | 6c3c0f8235cacce28982687e362b80d953ea7617 | 2025-11-11T10:02:23-08:00 | 27,931 | https://github.com/vllm-project/vllm/pull/27931 | [Kernel] Optimize rms_norm kernel (#27931) | [Kernel] Optimize rms_norm kernel (#27931)
Signed-off-by: Xin Yang <xyangx@amazon.com> | csrc/layernorm_quant_kernels.cu | cuda | Apache-2.0 | /*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels in layernorm_kernels.cu, except they
* also produce quantized output directly.
* Currently, only static fp8 quantization is supported.
*/
#include "type_convert.cuh"
#include "quantization/w8a8/fp8/... | /*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels in layernorm_kernels.cu, except they
* also produce quantized output directly.
* Currently, only static fp8 quantization is supported.
*/
#include "type_convert.cuh"
#include "quantization/w8a8/fp8/... | --- csrc/layernorm_quant_kernels.cu
+++ csrc/layernorm_quant_kernels.cu
@@ -18,7 +18,7 @@
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
-template <typename scalar_t, typename fp8_type>
+template <typename scalar_t, typename fp8_type, int VEC_SIZE>
__global__ void rms_norm_static_fp8_quant_kernel(... | 29 | 14 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_quant_kernels.cu).
Goal: [Kernel] Optimize rms_norm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels in lay... | <!-- markdownlint-disable -->
## Purpose
Optimize rms_norm kernel:
* Do vectorized load and store using `vec_n_t<scalar_t, VEC_SIZE>`.
* Since input, weight, output tensors are the same dtype, and all of their last dimension are hidden_size, we can get the largest safe vec_size by calculating the number that can divi... | [] | null | null |
vllm | 68c09efc37e87032640cf8db571eaf486bd744ac | 2025-11-12T01:00:31+08:00 | 27,165 | https://github.com/vllm-project/vllm/pull/27165 | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165) | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -91,6 +91,12 @@
void fused_add_rms_norm(torch::Tensor& input, torch::Tensor& residual,
torch::Tensor& weight, double epsilon);
+
+void fused_qk_norm_rope(torch::Tensor& qkv, int64_t num_heads_q,
+ int64_t num_heads_k, int64_t num_heads_... | 6 | 0 | 4 | [
"qwen"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model
Target hardware: unspecified
Target models: qwen
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
t... | ## Purpose
Inspired by TensorRT-LLM. This PR is a follow PR about #27018 , and fuses QNorm, KNorm, and RoPE into a single CUDA kernel for the Qwen3 model, improving inference performance. We convert this fusion into a custom torch.compile pass, users can enable it by:
```
--compilation-config='{"use_inductor": 1, "... | [] | null | null |
vllm | 68c09efc37e87032640cf8db571eaf486bd744ac | 2025-11-12T01:00:31+08:00 | 27,165 | https://github.com/vllm-project/vllm/pull/27165 | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165) | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -174,6 +174,16 @@
"fused_add_rms_norm(Tensor! input, Tensor! residual, Tensor weight, "
"float epsilon) -> ()");
ops.impl("fused_add_rms_norm", torch::kCUDA, &fused_add_rms_norm);
+
+#ifndef USE_ROCM
+ // Function for fused QK Norm and RoPE
+ ... | 10 | 0 | 4 | [
"qwen"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model
Target hardware: unspecified
Target models: qwen
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <... | ## Purpose
Inspired by TensorRT-LLM. This PR is a follow PR about #27018 , and fuses QNorm, KNorm, and RoPE into a single CUDA kernel for the Qwen3 model, improving inference performance. We convert this fusion into a custom torch.compile pass, users can enable it by:
```
--compilation-config='{"use_inductor": 1, "... | [] | null | null |
vllm | 68c09efc37e87032640cf8db571eaf486bd744ac | 2025-11-12T01:00:31+08:00 | 27,165 | https://github.com/vllm-project/vllm/pull/27165 | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165) | [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model (#27165)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com> | csrc/type_convert.cuh | cuda | Apache-2.0 | #pragma once
#include <torch/all.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#include <cuda_fp16.h>
#else
#include <hip/hip_bf16.h>
#include <hip/hip_fp16.h>
using __nv_bfloat16 = __hip_bfloat16;
using __nv_bfloat162 = __hip_bfloat162;
#endif
namespace vllm {
/* Converter structs for the conversion from torc... | #pragma once
#include <torch/all.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#include <cuda_fp16.h>
#else
#include <hip/hip_bf16.h>
#include <hip/hip_fp16.h>
using __nv_bfloat16 = __hip_bfloat16;
using __nv_bfloat162 = __hip_bfloat162;
#endif
namespace vllm {
/* Converter structs for the conversion from torc... | --- csrc/type_convert.cuh
+++ csrc/type_convert.cuh
@@ -29,6 +29,22 @@
static constexpr bool exists = false;
};
+template <>
+struct _typeConvert<float> {
+ static constexpr bool exists = true;
+ using hip_type = float;
+ using packed_hip_type = float2;
+ using packed_hip_type4 = float4; // For 128-bit vecto... | 44 | 16 | 4 | [
"qwen"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/type_convert.cuh).
Goal: [Kernel][Perf] fuse QK Norm and RoPE into one cuda kernel for Qwen Model
Target hardware: unspecified
Target models: qwen
Current file:
```cuda
#pragma once
#include <torch/all.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#include <cuda_fp16.... | ## Purpose
Inspired by TensorRT-LLM. This PR is a follow PR about #27018 , and fuses QNorm, KNorm, and RoPE into a single CUDA kernel for the Qwen3 model, improving inference performance. We convert this fusion into a custom torch.compile pass, users can enable it by:
```
--compilation-config='{"use_inductor": 1, "... | [] | null | null |
vllm | 085252764710fdb42ac180983ef4c37da0ed72d3 | 2025-11-08T10:20:55+08:00 | 28,124 | https://github.com/vllm-project/vllm/pull/28124 | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124) | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/moe/grouped_topk_kernels.cu | cuda | Apache-2.0 | /*
* Adapted from
* https://github.com/NVIDIA/TensorRT-LLM/blob/v0.21.0/cpp/tensorrt_llm/kernels/noAuxTcKernels.cu
* Copyright (c) 2025, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION &
* AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
*
* Licensed under ... | /*
* Adapted from
* https://github.com/NVIDIA/TensorRT-LLM/blob/v0.21.0/cpp/tensorrt_llm/kernels/noAuxTcKernels.cu
* Copyright (c) 2025, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION &
* AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
*
* Licensed under ... | --- csrc/moe/grouped_topk_kernels.cu
+++ csrc/moe/grouped_topk_kernels.cu
@@ -427,11 +427,29 @@
#endif
}
+// Scoring function enums
+enum ScoringFunc {
+ SCORING_NONE = 0, // no activation function
+ SCORING_SIGMOID = 1 // apply sigmoid
+};
+
+// Efficient sigmoid approximation from TensorRT-LLM
+__device__ i... | 99 | 54 | 4 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/grouped_topk_kernels.cu).
Goal: [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
/*
* Adapted from
* https://github.com/NVIDIA/TensorRT-LLM/blob/v0.21.0/cpp/tensorr... | <!-- markdownlint-disable -->
## Purpose
FIX https://github.com/vllm-project/vllm/issues/28086
Inspired from [TRTLLM](https://github.com/NVIDIA/TensorRT-LLM/blob/eeb56c2848a23bb60acd82c158d086c4305b249b/cpp/tensorrt_llm/thop/noAuxTcOp.cpp#L37), we add the sigmoid, e_score_correction_bias, and 32bit output cast into ... | [{"scope": "e2e", "hardware": "B200", "model": "DeepSeek-V3-0324-FP4", "shape": "input_len=512, output_len=128", "batch_size": 32, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 5.88, "optimized": 6.14, "stated_speedup": null, "speedup": 1.0442}, {"scope": "e2e", "hardware": "B20... | 1.045 | 1.0449 |
vllm | 085252764710fdb42ac180983ef4c37da0ed72d3 | 2025-11-08T10:20:55+08:00 | 28,124 | https://github.com/vllm-project/vllm/pull/28124 | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124) | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/moe/moe_ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output, bool renormalize);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_si... | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output, bool renormalize);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_si... | --- csrc/moe/moe_ops.h
+++ csrc/moe/moe_ops.h
@@ -39,9 +39,9 @@
int64_t BLOCK_SIZE_K, int64_t bit);
std::tuple<torch::Tensor, torch::Tensor> grouped_topk(
- torch::Tensor const& scores, torch::Tensor const& scores_with_bias,
- int64_t n_group, int64_t topk_group, int64_t topk, boo... | 3 | 3 | 4 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/moe_ops.h).
Goal: [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& t... | <!-- markdownlint-disable -->
## Purpose
FIX https://github.com/vllm-project/vllm/issues/28086
Inspired from [TRTLLM](https://github.com/NVIDIA/TensorRT-LLM/blob/eeb56c2848a23bb60acd82c158d086c4305b249b/cpp/tensorrt_llm/thop/noAuxTcOp.cpp#L37), we add the sigmoid, e_score_correction_bias, and 32bit output cast into ... | [{"scope": "e2e", "hardware": "B200", "model": "DeepSeek-V3-0324-FP4", "shape": "input_len=512, output_len=128", "batch_size": 32, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 5.88, "optimized": 6.14, "stated_speedup": null, "speedup": 1.0442}, {"scope": "e2e", "hardware": "B20... | 1.045 | 1.0449 |
vllm | 085252764710fdb42ac180983ef4c37da0ed72d3 | 2025-11-08T10:20:55+08:00 | 28,124 | https://github.com/vllm-project/vllm/pull/28124 | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124) | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output, bool renormalize) -> ()");
m.impl("t... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output, bool renormalize) -> ()");
m.impl("t... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -107,9 +107,10 @@
// Apply grouped topk routing to select experts.
m.def(
- "grouped_topk(Tensor scores, Tensor scores_with_bias, int n_group, int "
+ "grouped_topk(Tensor scores, int n_group, int "
"topk_group, int topk, bool r... | 3 | 2 | 4 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NA... | <!-- markdownlint-disable -->
## Purpose
FIX https://github.com/vllm-project/vllm/issues/28086
Inspired from [TRTLLM](https://github.com/NVIDIA/TensorRT-LLM/blob/eeb56c2848a23bb60acd82c158d086c4305b249b/cpp/tensorrt_llm/thop/noAuxTcOp.cpp#L37), we add the sigmoid, e_score_correction_bias, and 32bit output cast into ... | [{"scope": "e2e", "hardware": "B200", "model": "DeepSeek-V3-0324-FP4", "shape": "input_len=512, output_len=128", "batch_size": 32, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 5.88, "optimized": 6.14, "stated_speedup": null, "speedup": 1.0442}, {"scope": "e2e", "hardware": "B20... | 1.045 | 1.0449 |
vllm | 085252764710fdb42ac180983ef4c37da0ed72d3 | 2025-11-08T10:20:55+08:00 | 28,124 | https://github.com/vllm-project/vllm/pull/28124 | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124) | [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM (#28124)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -1330,24 +1330,37 @@
) -> tuple[torch.Tensor, torch.Tensor]:
assert hidden_states.size(0) == gating_output.size(0), "Number of tokens mismatch"
- if scoring_func == "softmax":
+ if scoring_func =... | 27 | 14 | 4 | [
"deepseek"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Perf][DeepSeek] Add sigmoid+bias fusion to fused_grouped_topk from TRTLLM
Target hardware: unspecified
Target models: deepseek
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: ... | <!-- markdownlint-disable -->
## Purpose
FIX https://github.com/vllm-project/vllm/issues/28086
Inspired from [TRTLLM](https://github.com/NVIDIA/TensorRT-LLM/blob/eeb56c2848a23bb60acd82c158d086c4305b249b/cpp/tensorrt_llm/thop/noAuxTcOp.cpp#L37), we add the sigmoid, e_score_correction_bias, and 32bit output cast into ... | [{"scope": "e2e", "hardware": "B200", "model": "DeepSeek-V3-0324-FP4", "shape": "input_len=512, output_len=128", "batch_size": 32, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 5.88, "optimized": 6.14, "stated_speedup": null, "speedup": 1.0442}, {"scope": "e2e", "hardware": "B20... | 1.045 | 1.0449 |
vllm | 72b1c2ae2c2d2782ef1850ca1b96a21f797f7af6 | 2025-11-07T04:18:39-08:00 | 27,439 | https://github.com/vllm-project/vllm/pull/27439 | [Bugfix] Use latency MOE backend as default for Flashinfer and other misc fixes (#27439) | [Bugfix] Use latency MOE backend as default for Flashinfer and other misc fixes (#27439)
Signed-off-by: Pavani Majety <pmajety@nvidia.com> | csrc/quantization/fp4/nvfp4_quant_kernels.cu | cuda | Apache-2.0 | /*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless requi... | /*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless requi... | --- csrc/quantization/fp4/nvfp4_quant_kernels.cu
+++ csrc/quantization/fp4/nvfp4_quant_kernels.cu
@@ -31,6 +31,13 @@
namespace vllm {
+template <typename Int>
+__host__ __device__ inline Int round_up(Int x, Int y) {
+ static_assert(std::is_integral_v<Int>,
+ "round_up argument must be integral type... | 20 | 2 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp4/nvfp4_quant_kernels.cu).
Goal: [Bugfix] Use latency MOE backend as default for Flashinfer and other misc fixes
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserve... | ## Purpose
This PR switches the default MOE backend to use Flashinfer TRTLLM MOE kernels which are optimized for the latency scenarios.
Additionally, I address a few more issues -
1. Move the zero initialization for fp4 quantization in the padded scenarios to kernel to avoid extra kernel call for the whole tensor (in... | [{"scope": "e2e", "hardware": null, "model": "nvidia/NVIDIA-Nemotron-Nano-9B-v2", "shape": null, "batch_size": null, "metric": "Total latency", "unit": "s", "higher_is_better": false, "baseline": 91.735, "optimized": 91.362, "stated_speedup": null, "speedup": 1.0041}, {"scope": "e2e", "hardware": null, "model": "nvidia... | null | 1.0442 |
vllm | 97e3dda84ba79100509fafb58d651bde25e3f32f | 2025-11-04T07:49:25-08:00 | 27,284 | https://github.com/vllm-project/vllm/pull/27284 | [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM (#27284) | [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM (#27284)
Signed-off-by: Faqin Zhong <faqin.zhong@gmail.com>
Co-authored-by: Faqin Zhong <zhofaqin@amazon.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com> | csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8.cu | cuda | Apache-2.0 | #include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm100_fp8_dispatch.cuh"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
namespace vllm {
void cutlass_scaled_mm_sm100_fp8(torch::Tensor& out, torch::Tensor const& a,
torch::Tensor const& b,
... | #include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm100_fp8_dispatch.cuh"
namespace vllm {
void cutlass_scaled_mm_sm100_fp8(torch::Tensor& out, torch::Tensor const& a,
torch::Tensor const& b,
torch::Tensor const& a_scales,
... | --- csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8.cu
+++ csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8.cu
@@ -1,6 +1,5 @@
#include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm100_fp8_dispatch.cuh"
-#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
namespace vllm {
@@ -13,11 +... | 4 | 5 | 2 | [] | [
"SM100"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8.cu).
Goal: [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM
Target hardware: SM100
Target models: unspecified
Current file:
```cuda
#include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm100_fp8_dispatch.cuh"
#... | <!-- markdownlint-disable -->
## Purpose
1. Added swap AB optimization to CUTLASS FP8 GEMM on B200 (SM100) to improve performance for small batch size - M <=64 cases
2. Tuned kernel configs by leveraging nvMatmulHeuristics
**Context on Swap-AB Optimization**
For the 5th-generation Tensor Core (tcgen05.mma) instruct... | [{"scope": "kernel", "hardware": "B200", "model": "Llama 450B", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.05, "speedup": 1.05}, {"scope": "kernel", "hardware": "B200", "model": "Llama 450B", "shape": null,... | 1.15 | null |
vllm | 97e3dda84ba79100509fafb58d651bde25e3f32f | 2025-11-04T07:49:25-08:00 | 27,284 | https://github.com/vllm-project/vllm/pull/27284 | [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM (#27284) | [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM (#27284)
Signed-off-by: Faqin Zhong <faqin.zhong@gmail.com>
Co-authored-by: Faqin Zhong <zhofaqin@amazon.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com> | csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename Element... | --- csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8_dispatch.cuh
+++ csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8_dispatch.cuh
@@ -2,6 +2,7 @@
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
+#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
/**
* This file defines... | 238 | 56 | 2 | [] | [
"SM100"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/w8a8/cutlass/c3x/scaled_mm_sm100_fp8_dispatch.cuh).
Goal: [Perf] SM100 - add swap AB optimization to CUTLASS FP8 GEMM
Target hardware: SM100
Target models: unspecified
Current file:
```cuda
#pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller... | <!-- markdownlint-disable -->
## Purpose
1. Added swap AB optimization to CUTLASS FP8 GEMM on B200 (SM100) to improve performance for small batch size - M <=64 cases
2. Tuned kernel configs by leveraging nvMatmulHeuristics
**Context on Swap-AB Optimization**
For the 5th-generation Tensor Core (tcgen05.mma) instruct... | [{"scope": "kernel", "hardware": "B200", "model": "Llama 450B", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.05, "speedup": 1.05}, {"scope": "kernel", "hardware": "B200", "model": "Llama 450B", "shape": null,... | 1.15 | null |
vllm | f32cbc9a0c456966df300076a3a9f2889151b024 | 2025-11-04T14:33:23+08:00 | 27,240 | https://github.com/vllm-project/vllm/pull/27240 | [CPU]Improve dynamic 4bit moe performance (#27240) | [CPU]Improve dynamic 4bit moe performance (#27240)
Signed-off-by: Zhang Xiangze <Xiangze.Zhang@arm.com> | csrc/moe/dynamic_4bit_int_moe_cpu.cpp | cpp | Apache-2.0 | #include <ATen/ATen.h>
#include <ATen/Parallel.h>
#include <torch/all.h>
// _dyn_quant_matmul_4bit is only available on AArch64.
#if defined(__aarch64__)
#include <ATen/ops/_dyn_quant_matmul_4bit.h>
#endif
inline torch::Tensor mm(const torch::Tensor& a, const torch::Tensor& packed_w,
int64_t... | #include <ATen/ATen.h>
#include <ATen/Parallel.h>
#include <torch/all.h>
// _dyn_quant_matmul_4bit is only available on AArch64.
#if defined(__aarch64__)
#include <ATen/ops/_dyn_quant_matmul_4bit.h>
#endif
inline torch::Tensor mm(const torch::Tensor& a, const torch::Tensor& packed_w,
int64_t... | --- csrc/moe/dynamic_4bit_int_moe_cpu.cpp
+++ csrc/moe/dynamic_4bit_int_moe_cpu.cpp
@@ -87,30 +87,23 @@
const int64_t g_eff_13 = (group_size != -1) ? group_size : H;
const int64_t g_eff_2 = (group_size != -1) ? group_size : I;
- // Per-expert outputs filled in parallel
- std::vector<torch::Tensor> y_list(E);
... | 12 | 21 | 1 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/moe/dynamic_4bit_int_moe_cpu.cpp).
Goal: [CPU]Improve dynamic 4bit moe performance
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include <ATen/ATen.h>
#include <ATen/Parallel.h>
#include <torch/all.h>
// _dyn_quant_matmul_4bit is only available on... | Improve dynamic 4bit moe performance by avoid tensor concat
## Purpose
Improve dynamic 4bit moe performance on Arm CPU
## Test Plan
Tested locally with Qwen3-30B-A3B w4a8 model quantized with llmcompressor
## Test Result
See performance improvements, especially for small batch sizes.
## Performance
With this PR, on... | [{"scope": "e2e", "hardware": "32 Neoverse-N2 cores", "model": "Qwen3-30B-A3B 4bit", "shape": null, "batch_size": 64, "metric": "throughput", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.08, "speedup": 1.08}, {"scope": "e2e", "hardware": "32 Neoverse-N2 cores", "model... | null | 1.1 |
vllm | 80e94529845d78284047e52f6253889c534bce13 | 2025-10-21T10:30:07+02:00 | 26,763 | https://github.com/vllm-project/vllm/pull/26763 | [Deepseek v3.2] Optimize top_k_per_row (#26763) | [Deepseek v3.2] Optimize top_k_per_row (#26763)
Signed-off-by: Daniel Campora <961215+dcampora@users.noreply.github.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -99,8 +99,7 @@
void top_k_per_row(const torch::Tensor& logits, const torch::Tensor& rowStarts,
const torch::Tensor& rowEnds, torch::Tensor& indices,
- torch::Tensor& values, int64_t numRows, int64_t stride0,
- int64_t stride1);
... | 1 | 2 | 3 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Deepseek v3.2] Optimize top_k_per_row
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(t... |
## Purpose
This PR optimizes kernel top_k_per_row. Local testing shows it is about 2.5x from its previous version.
## Test Plan
## Test Result
---
<details>
<summary> Essential Elements of an Effective PR Description Checklist </summary>
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues t... | [{"scope": "kernel", "hardware": null, "model": "DeepSeek-V3", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 2.5, "speedup": 2.5}] | 2.5 | null |
vllm | 80e94529845d78284047e52f6253889c534bce13 | 2025-10-21T10:30:07+02:00 | 26,763 | https://github.com/vllm-project/vllm/pull/26763 | [Deepseek v3.2] Optimize top_k_per_row (#26763) | [Deepseek v3.2] Optimize top_k_per_row (#26763)
Signed-off-by: Daniel Campora <961215+dcampora@users.noreply.github.com> | csrc/sampler.cu | cuda | Apache-2.0 | #include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t>
__global__ void apply_repetition_penalties_kernel(
scalar_t* __restrict__ logits, // [nu... | #include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t>
__global__ void apply_repetition_penalties_kernel(
scalar_t* __restrict__ logits, // [nu... | --- csrc/sampler.cu
+++ csrc/sampler.cu
@@ -57,7 +57,7 @@
template <int kNumThreadsPerBlock = 512>
static __global__ void topKPerRow(const float* logits, const int* rowStarts,
const int* rowEnds, int* outIndices,
- float* outLogits, int stride0, int ... | 6 | 31 | 3 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/sampler.cu).
Goal: [Deepseek v3.2] Optimize top_k_per_row
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
#include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#i... |
## Purpose
This PR optimizes kernel top_k_per_row. Local testing shows it is about 2.5x from its previous version.
## Test Plan
## Test Result
---
<details>
<summary> Essential Elements of an Effective PR Description Checklist </summary>
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues t... | [{"scope": "kernel", "hardware": null, "model": "DeepSeek-V3", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 2.5, "speedup": 2.5}] | 2.5 | null |
vllm | 80e94529845d78284047e52f6253889c534bce13 | 2025-10-21T10:30:07+02:00 | 26,763 | https://github.com/vllm-project/vllm/pull/26763 | [Deepseek v3.2] Optimize top_k_per_row (#26763) | [Deepseek v3.2] Optimize top_k_per_row (#26763)
Signed-off-by: Daniel Campora <961215+dcampora@users.noreply.github.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -185,7 +185,7 @@
// Optimized top-k per row operation
ops.def(
"top_k_per_row(Tensor logits, Tensor rowStarts, Tensor rowEnds, "
- "Tensor! indices, Tensor! values, int numRows, int stride0, "
+ "Tensor! indices, int numRows, int stride0,... | 1 | 1 | 3 | [
"deepseek"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Deepseek v3.2] Optimize top_k_per_row
Target hardware: unspecified
Target models: deepseek
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <tor... |
## Purpose
This PR optimizes kernel top_k_per_row. Local testing shows it is about 2.5x from its previous version.
## Test Plan
## Test Result
---
<details>
<summary> Essential Elements of an Effective PR Description Checklist </summary>
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues t... | [{"scope": "kernel", "hardware": null, "model": "DeepSeek-V3", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 2.5, "speedup": 2.5}] | 2.5 | null |
vllm | 9fce7bee745230d61c60ad467966790553b0ba48 | 2025-10-20T13:39:02+08:00 | 26,746 | https://github.com/vllm-project/vllm/pull/26746 | [Kernel] Accelerate solve_tril with TMA (#26746) | [Kernel] Accelerate solve_tril with TMA (#26746)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com> | vllm/model_executor/layers/fla/ops/op.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Songlin Yang, Yu Zhang
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the followi... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Songlin Yang, Yu Zhang
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the followi... | --- vllm/model_executor/layers/fla/ops/op.py
+++ vllm/model_executor/layers/fla/ops/op.py
@@ -11,29 +11,50 @@
from vllm.triton_utils import tl, tldevice, triton
+from .utils import is_gather_supported
+
if os.environ.get("FLA_USE_FAST_OPS", "0") == "1":
- div = tldevice.fast_dividef
exp = tldevice.fast_ex... | 32 | 11 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fla/ops/op.py).
Goal: [Kernel] Accelerate solve_tril with TMA
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM projec... | ## Purpose
cherry-pick the optimization from https://github.com/fla-org/flash-linear-attention/pull/550: accelerate solve_tril with TMA
## Test Plan
```
vllm serve Qwen/Qwen3-Next-80B-A3B-Instruct -tp 4 --served-model-name qwen3-next
```
```
vllm bench serve \
--model qwen3-next \
--dataset-name random \
--tokenizer ... | [] | null | null |
vllm | 9fce7bee745230d61c60ad467966790553b0ba48 | 2025-10-20T13:39:02+08:00 | 26,746 | https://github.com/vllm-project/vllm/pull/26746 | [Kernel] Accelerate solve_tril with TMA (#26746) | [Kernel] Accelerate solve_tril with TMA (#26746)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com> | vllm/model_executor/layers/fla/ops/solve_tril.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Songlin Yang, Yu Zhang
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the followi... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Songlin Yang, Yu Zhang
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the followi... | --- vllm/model_executor/layers/fla/ops/solve_tril.py
+++ vllm/model_executor/layers/fla/ops/solve_tril.py
@@ -8,12 +8,21 @@
# Copyright (c) 2023-2025, Songlin Yang, Yu Zhang
# ruff: noqa: E501
+import os
+
import torch
from vllm.triton_utils import tl, triton
from .index import prepare_chunk_indices
-from .u... | 390 | 305 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fla/ops/solve_tril.py).
Goal: [Kernel] Accelerate solve_tril with TMA
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLL... | ## Purpose
cherry-pick the optimization from https://github.com/fla-org/flash-linear-attention/pull/550: accelerate solve_tril with TMA
## Test Plan
```
vllm serve Qwen/Qwen3-Next-80B-A3B-Instruct -tp 4 --served-model-name qwen3-next
```
```
vllm bench serve \
--model qwen3-next \
--dataset-name random \
--tokenizer ... | [] | null | null |
vllm | 75c7ad9918c7fa6d16323db963c19b5f7c45fcfd | 2025-10-17T15:30:35+08:00 | 26,717 | https://github.com/vllm-project/vllm/pull/26717 | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717) | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com> | csrc/moe/moe_ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output, bool renormalize);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_si... | --- csrc/moe/moe_ops.h
+++ csrc/moe/moe_ops.h
@@ -4,7 +4,7 @@
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
- torch::Tensor& gating_output);
+ torch::Tensor& gating_output, bool renormalize);
vo... | 1 | 1 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/moe_ops.h).
Goal: [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tens... | ## Purpose
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1099
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1061-L1062
Currently, there is a ... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 10.4, "optimized": 4.0, "stated_speedup": null, "speedup": 2.6}, {"scope": "e2e", "hardware": null, "model": "qwen3-30b-a3b", "shape": null, "batch_size": 32... | 2.6 | 1.0425 |
vllm | 75c7ad9918c7fa6d16323db963c19b5f7c45fcfd | 2025-10-17T15:30:35+08:00 | 26,717 | https://github.com/vllm-project/vllm/pull/26717 | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717) | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com> | csrc/moe/topk_softmax_kernels.cu | cuda | Apache-2.0 | /*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensorrt_llm/kernels/mixtureOfExperts/moe_kernels.cu
* Copyright (c) 2024, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licen... | /*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensorrt_llm/kernels/mixtureOfExperts/moe_kernels.cu
* Copyright (c) 2024, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licen... | --- csrc/moe/topk_softmax_kernels.cu
+++ csrc/moe/topk_softmax_kernels.cu
@@ -16,11 +16,22 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
+#include <type_traits>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.... | 217 | 88 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/topk_softmax_kernels.cu).
Goal: [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensor... | ## Purpose
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1099
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1061-L1062
Currently, there is a ... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 10.4, "optimized": 4.0, "stated_speedup": null, "speedup": 2.6}, {"scope": "e2e", "hardware": null, "model": "qwen3-30b-a3b", "shape": null, "batch_size": 32... | 2.6 | 1.0425 |
vllm | 75c7ad9918c7fa6d16323db963c19b5f7c45fcfd | 2025-10-17T15:30:35+08:00 | 26,717 | https://github.com/vllm-project/vllm/pull/26717 | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717) | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output, bool renormalize) -> ()");
m.impl("t... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -5,7 +5,7 @@
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
- "token_expert_indices, Tensor gating_output) -> ()");
+ "token_expert_indices, Tensor gating_ou... | 1 | 1 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSI... | ## Purpose
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1099
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1061-L1062
Currently, there is a ... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 10.4, "optimized": 4.0, "stated_speedup": null, "speedup": 2.6}, {"scope": "e2e", "hardware": null, "model": "qwen3-30b-a3b", "shape": null, "batch_size": 32... | 2.6 | 1.0425 |
vllm | 75c7ad9918c7fa6d16323db963c19b5f7c45fcfd | 2025-10-17T15:30:35+08:00 | 26,717 | https://github.com/vllm-project/vllm/pull/26717 | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717) | [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel (#26717)
Signed-off-by: zhuhaoran <zhuhaoran.zhr@alibaba-inc.com>
Signed-off-by: izhuhaoran <izhuhaoran@qq.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE Triton kernels."""
import functools
import json
import os
from collections.abc import Callable
from typing import Any
import torch
import torch.nn.functional as F
import vllm.envs as envs
import vl... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -1074,9 +1074,8 @@
topk_indices,
token_expert_indices,
gating_output,
- )
- if renormalize:
- topk_weights = topk_weights / topk_weights.sum(dim=-1, keepdim=True)
+ ... | 3 | 6 | 4 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Kernel][Performance] Fuse float cast and renormalize to topk softmax kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightT... | ## Purpose
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1099
https://github.com/vllm-project/vllm/blob/5c7fe25491825b95936c011a43337c7d4fb7e472/vllm/model_executor/layers/fused_moe/fused_moe.py#L1061-L1062
Currently, there is a ... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 10.4, "optimized": 4.0, "stated_speedup": null, "speedup": 2.6}, {"scope": "e2e", "hardware": null, "model": "qwen3-30b-a3b", "shape": null, "batch_size": 32... | 2.6 | 1.0425 |
vllm | 314fa8abbf9d4f6dc89eba1d8fdf80e6cd4432ed | 2025-10-16T09:36:09-04:00 | 26,846 | https://github.com/vllm-project/vllm/pull/26846 | [Attention] Tune CUTLASS MLA num_splits (#26846) | [Attention] Tune CUTLASS MLA num_splits (#26846)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com> | csrc/attention/mla/cutlass_sm100_mla/device/sm100_mla.hpp | cpp | BSD-3-Clause | /***************************************************************************************************
* Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: BSD-3-Clause
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitte... | /***************************************************************************************************
* Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: BSD-3-Clause
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitte... | --- csrc/attention/mla/cutlass_sm100_mla/device/sm100_mla.hpp
+++ csrc/attention/mla/cutlass_sm100_mla/device/sm100_mla.hpp
@@ -125,32 +125,37 @@
}
static void set_split_kv (KernelArguments& args) {
- // printf("set_split_kv start");
if (args.split_kv >= 1) return;
auto [H, K, D, B] = args.problem_... | 22 | 17 | 1 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/attention/mla/cutlass_sm100_mla/device/sm100_mla.hpp).
Goal: [Attention] Tune CUTLASS MLA num_splits
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
/*********************************************************************************************... | <!-- markdownlint-disable -->
## Purpose
Tune the num_splits heuristic for CUTLASS_MLA to achieve some speedup now that #26026 has fixed the hang. Based on experiments performed using the tools introduced in #26835, this is the optimal num_splits policy:
<img width="3331" height="2363" alt="numsplits_heatmap" src="ht... | [] | null | null |
vllm | 82e64c7a204671423c2c7914cbabdf06bc89c0c8 | 2025-10-12T12:27:50+04:00 | 26,207 | https://github.com/vllm-project/vllm/pull/26207 | [PERF] [Qwen3-next] Speed up gated RMSNorm (#26207) | [PERF] [Qwen3-next] Speed up gated RMSNorm (#26207)
Signed-off-by: Vadim Gimpelson <vadim.gimpelson@gmail.com>
Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> | vllm/model_executor/layers/fla/ops/layernorm_guard.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Tri Dao
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the following copyright no... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# SPDX-FileCopyrightText: Tri Dao
#
# This file contains code copied from the flash-linear-attention project.
# The original source code was licensed under the MIT license and included
# the following copyright no... | --- vllm/model_executor/layers/fla/ops/layernorm_guard.py
+++ vllm/model_executor/layers/fla/ops/layernorm_guard.py
@@ -13,6 +13,7 @@
# This backward pass is faster for dimensions up to 8k, but after that it's much slower due to register spilling.
# The models we train have hidden dim up to 8k anyway (e.g. Llama 70B)... | 89 | 35 | 1 | [
"qwen"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fla/ops/layernorm_guard.py).
Goal: [PERF] [Qwen3-next] Speed up gated RMSNorm
Target hardware: unspecified
Target models: qwen
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vL... | ## Purpose
Qwen3-next GDN attn contains a bit different version of RMSNorm - Gated RMSNorm (additionally multiply by `SiLU(y)`).
It is implemented in triton and previous implementation didn't extract enough parallelism due to small hidden size (128).
Add processing of several row in one block thread to speed up.
#... | [{"scope": "kernel", "hardware": "B200", "model": null, "shape": "N=128", "batch_size": 256, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 1.76, "optimized": 1.76, "stated_speedup": null, "speedup": 1.0}, {"scope": "kernel", "hardware": "B200", "model": null, "shape": "N=128", "batch_size": ... | 1.9284 | 1.0095 |
vllm | 9705fba7b727a3b9c275b012258608531e2223d1 | 2025-10-04T05:16:38+01:00 | 25,948 | https://github.com/vllm-project/vllm/pull/25948 | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948) | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com> | csrc/cpu/dnnl_helper.cpp | cpp | Apache-2.0 | #include <list>
#include <optional>
#include "common/memory_desc.hpp"
#include "common/memory.hpp"
#include "dnnl_helper.h"
static dnnl::engine& default_engine() {
static dnnl::engine engine(dnnl::engine::kind::cpu, 0);
return engine;
}
static dnnl::stream& default_stream() {
static dnnl::stream stream(defaul... | #include <list>
#include <optional>
#include "common/memory_desc.hpp"
#include "common/memory.hpp"
#include "dnnl_helper.h"
static dnnl::engine& default_engine() {
static dnnl::engine engine(dnnl::engine::kind::cpu, 0);
return engine;
}
static dnnl::stream& default_stream() {
static dnnl::stream stream(defaul... | --- csrc/cpu/dnnl_helper.cpp
+++ csrc/cpu/dnnl_helper.cpp
@@ -137,9 +137,8 @@
}
void DNNLMatMulPrimitiveHandler::prepack_weight(
- void* original_b_ptr, dnnl::memory::desc b_target_mem_desc) {
- dnnl::memory::desc original_b_md({b_k_size_, b_n_size_}, b_type_,
- {b_k_stride_, b... | 69 | 11 | 5 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/dnnl_helper.cpp).
Goal: [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include <list>
#include <optional>
#include "common/memory_desc.hpp"
#include "co... | ## Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
https://github.com/vllm-project/vllm/pull/24150 introduced weight prepack and a diect oneDNN path for linear ops.
This path is not currently active for AArch64 - i.e. linears are dispatched to PyTorch and as a result we have to pack we... | [{"scope": "e2e", "hardware": "Neoverse-V2", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": "max-model-len=4096", "batch_size": 64, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.78, "speedup": 1.78}] | null | 1.78 |
vllm | 9705fba7b727a3b9c275b012258608531e2223d1 | 2025-10-04T05:16:38+01:00 | 25,948 | https://github.com/vllm-project/vllm/pull/25948 | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948) | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com> | csrc/cpu/dnnl_helper.h | cpp | Apache-2.0 | #ifndef DNNL_HELPER_H
#define DNNL_HELPER_H
#include <optional>
#include <cassert>
#include "oneapi/dnnl/dnnl.hpp"
namespace c10 {
struct BFloat16;
struct Half;
} // namespace c10
namespace dnnl {
namespace impl {
struct memory_storage_t;
struct matmul_pd_t;
struct matmul_desc_t;
} // namespace impl
} // namespa... | #ifndef DNNL_HELPER_H
#define DNNL_HELPER_H
#include <optional>
#include <cassert>
#include "oneapi/dnnl/dnnl.hpp"
namespace c10 {
struct BFloat16;
struct Half;
} // namespace c10
namespace dnnl {
namespace impl {
struct memory_storage_t;
struct matmul_pd_t;
struct matmul_desc_t;
} // namespace impl
} // namespa... | --- csrc/cpu/dnnl_helper.h
+++ csrc/cpu/dnnl_helper.h
@@ -101,7 +101,7 @@
protected:
DNNLMatMulPrimitiveHandler(const Args& args, dnnl::memory::data_type b_type);
- void prepack_weight(void* original_b_ptr,
+ void prepack_weight(void* original_b_ptr, dnnl::memory::desc original_b_md,
dnn... | 1 | 1 | 5 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/dnnl_helper.h).
Goal: [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#ifndef DNNL_HELPER_H
#define DNNL_HELPER_H
#include <optional>
#include <cassert>
... | ## Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
https://github.com/vllm-project/vllm/pull/24150 introduced weight prepack and a diect oneDNN path for linear ops.
This path is not currently active for AArch64 - i.e. linears are dispatched to PyTorch and as a result we have to pack we... | [{"scope": "e2e", "hardware": "Neoverse-V2", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": "max-model-len=4096", "batch_size": 64, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.78, "speedup": 1.78}] | null | 1.78 |
vllm | 9705fba7b727a3b9c275b012258608531e2223d1 | 2025-10-04T05:16:38+01:00 | 25,948 | https://github.com/vllm-project/vllm/pull/25948 | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948) | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com> | csrc/cpu/dnnl_kernels.cpp | cpp | Apache-2.0 | #include "cpu_types.hpp"
#include "dnnl_helper.h"
namespace {
template <typename scalar_t>
struct KernelVecType {
using load_vec_type = void;
using cvt_vec_type = void;
};
template <>
struct KernelVecType<float> {
using load_vec_type = vec_op::FP32Vec16;
using cvt_vec_type = vec_op::FP32Vec16;
};
#if !define... | #include "cpu_types.hpp"
#include "dnnl_helper.h"
namespace {
template <typename scalar_t>
struct KernelVecType {
using load_vec_type = void;
using cvt_vec_type = void;
};
template <>
struct KernelVecType<float> {
using load_vec_type = vec_op::FP32Vec16;
using cvt_vec_type = vec_op::FP32Vec16;
};
#if !define... | --- csrc/cpu/dnnl_kernels.cpp
+++ csrc/cpu/dnnl_kernels.cpp
@@ -527,21 +527,42 @@
MatMulPrimitiveHandler* ptr =
reinterpret_cast<MatMulPrimitiveHandler*>(handler);
+// ACL matmuls expect contiguous source tensors
+#ifdef VLLM_USE_ACL
+ torch::Tensor a_contig = a.contiguous();
+#endif
+
MatMulPrimitiveHa... | 22 | 1 | 5 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/dnnl_kernels.cpp).
Goal: [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include "cpu_types.hpp"
#include "dnnl_helper.h"
namespace {
template <typename ... | ## Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
https://github.com/vllm-project/vllm/pull/24150 introduced weight prepack and a diect oneDNN path for linear ops.
This path is not currently active for AArch64 - i.e. linears are dispatched to PyTorch and as a result we have to pack we... | [{"scope": "e2e", "hardware": "Neoverse-V2", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": "max-model-len=4096", "batch_size": 64, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.78, "speedup": 1.78}] | null | 1.78 |
vllm | 9705fba7b727a3b9c275b012258608531e2223d1 | 2025-10-04T05:16:38+01:00 | 25,948 | https://github.com/vllm-project/vllm/pull/25948 | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948) | [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com> | csrc/cpu/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
std::string init_cpu_threads_env(const std::string& cpu_ids);
void release_dnnl_matmul_handler(int64_t handler);
int64_t create_onednn_scaled_mm_handler(const torch::Tensor& b,
const... | #include "cache.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
std::string init_cpu_threads_env(const std::string& cpu_ids);
void release_dnnl_matmul_handler(int64_t handler);
int64_t create_onednn_scaled_mm_handler(const torch::Tensor& b,
const... | --- csrc/cpu/torch_bindings.cpp
+++ csrc/cpu/torch_bindings.cpp
@@ -26,6 +26,8 @@
void onednn_mm(torch::Tensor& c, const torch::Tensor& a,
const std::optional<torch::Tensor>& bias, int64_t handler);
+
+bool is_onednn_acl_supported();
void mla_decode_kvcache(torch::Tensor& out, torch::Tensor& query... | 5 | 0 | 5 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/torch_bindings.cpp).
Goal: [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "ops.h"
#include "core/registration.h"
#include <to... | ## Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack
https://github.com/vllm-project/vllm/pull/24150 introduced weight prepack and a diect oneDNN path for linear ops.
This path is not currently active for AArch64 - i.e. linears are dispatched to PyTorch and as a result we have to pack we... | [{"scope": "e2e", "hardware": "Neoverse-V2", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": "max-model-len=4096", "batch_size": 64, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.78, "speedup": 1.78}] | null | 1.78 |
vllm | eb0fa43868cf77e8eb2bdd563f8370b3c6bb00e2 | 2025-10-03T16:33:46+08:00 | 25,955 | https://github.com/vllm-project/vllm/pull/25955 | [Perf] Optimize `reshape_and_cache` CUDA Kernel (#25955) | [Perf] Optimize `reshape_and_cache` CUDA Kernel (#25955)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Liu-congo <1502632128@qq.com> | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -16,8 +16,7 @@
#include <algorithm>
#include <cassert>
-#include <map>
-#include <vector>
+#include <cfloat> // FLT_MIN
#ifdef USE_ROCM
#include <hip/hip_bf16.h>
@@ -209,6 +208,20 @@
namespace vllm {
+// Used to copy/convert one element
+template <t... | 56 | 50 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Perf] Optimize `reshape_and_cache` CUDA Kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAExcepti... | ## Purpose
FIX https://github.com/vllm-project/vllm/issues/25705
Optimize `reshape_and_cache` CUDA Kernel.
Separate key/value loops - Allows specialized indexing for each
## Test
```
pytest -s tests/kernels/attention/test_cache.py::test_reshape_and_cache
passed
```
gsm8k
```
vllm (pretrained=/data/datasets/models-hf/... | [{"scope": "kernel", "hardware": "L40", "model": null, "shape": "num_tokens=2", "batch_size": 2, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 19.359, "optimized": 12.62, "stated_speedup": null, "speedup": 1.534}, {"scope": "kernel", "hardware": "L40", "model": null, "shape": "num_tokens=4",... | 3.8864 | null |
vllm | 47b93395463d9d2ddc2c1176d6815fdc8e505afc | 2025-10-02T23:35:47-04:00 | 26,132 | https://github.com/vllm-project/vllm/pull/26132 | [DeepSeek] Improve performance of DS MLA cache kernel (#26132) | [DeepSeek] Improve performance of DS MLA cache kernel (#26132)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com> | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -16,7 +16,6 @@
#include <algorithm>
#include <cassert>
-#include <cfloat> // FLT_MIN
#include <map>
#include <vector>
@@ -424,84 +423,80 @@
const int64_t dst_idx_start =
block_idx * block_stride + block_offset * entry_stride;
- // Create 4 til... | 67 | 73 | 1 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [DeepSeek] Improve performance of DS MLA cache kernel
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAExce... | ## Purpose
Improve the performance of the `concat_and_cache_ds_mla_kernel` by having each thread handle either 8 NoPE elements or 2 RoPE elements. Roughly 60% best-case speedup.
## Correctness
`pytest tests/kernels/attention/test_cache.py::test_concat_and_cache_ds_mla` (Passes)
## Performance
### Before
```
concat... | [{"scope": "kernel", "hardware": "NVIDIA H100 80GB HBM3", "model": null, "shape": "tokens=42,kv_lora_rank=512,qk_rope_head_dim=64", "batch_size": 42, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.012, "optimized": 0.011, "stated_speedup": null, "speedup": 1.0909}, {"scope": "kernel", "hard... | 1.1463 | null |
vllm | 502640c3f944f8b9702989bd45f8add970b67ea0 | 2025-10-02T21:35:13+02:00 | 25,696 | https://github.com/vllm-project/vllm/pull/25696 | [Perf] Fix and reapply move apply w8a8 block fp8 linear to class (#25696) | [Perf] Fix and reapply move apply w8a8 block fp8 linear to class (#25696)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: ElizaWszola <elizaw.9289@gmail.com>
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Luka Govedi... | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -13,8 +13,9 @@
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
+from vllm.model_executor.layers.quantization.input_quant_fp8 import QuantFP... | 247 | 124 | 5 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Perf] Fix and reapply move apply w8a8 block fp8 linear to class
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText... | This PR resolves the issue (#25623) raised in https://github.com/vllm-project/vllm/pull/25607 by using a single padding-cutlass custom op on Hopper.
We are waiting to merge this after v0.11.0 release out of an abundance of caution.
| [] | null | null |
vllm | 5e25b122366a639f6da9fa568b532d6932c45aff | 2025-09-24T01:23:30+02:00 | 25,197 | https://github.com/vllm-project/vllm/pull/25197 | [Kernel] [Mamba] Remove BLOCK_H=1 from list of tuneable configurations for `_chunk_cumsum_fwd_kernel` (#25197) | [Kernel] [Mamba] Remove BLOCK_H=1 from list of tuneable configurations for `_chunk_cumsum_fwd_kernel` (#25197)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
Co-authored-by: Chih-Chieh-Yang <chih.chieh.yang@ibm.com> | vllm/model_executor/layers/mamba/ops/ssd_chunk_state.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Copyright (c) 2024, Tri Dao, Albert Gu.
# Adapted from https://github.com/state-spaces/mamba/blob/v2.2.4/mamba_ssm/ops/triton/ssd_chunk_state.py
# ruff: noqa: E501
import math
import torch
from vllm.triton_... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Copyright (c) 2024, Tri Dao, Albert Gu.
# Adapted from https://github.com/state-spaces/mamba/blob/v2.2.4/mamba_ssm/ops/triton/ssd_chunk_state.py
# ruff: noqa: E501
import math
import torch
from vllm.triton_... | --- vllm/model_executor/layers/mamba/ops/ssd_chunk_state.py
+++ vllm/model_executor/layers/mamba/ops/ssd_chunk_state.py
@@ -17,7 +17,6 @@
@triton.autotune(
configs=[
- triton.Config({'BLOCK_SIZE_H': 1}),
triton.Config({'BLOCK_SIZE_H': 2}),
triton.Config({'BLOCK_SIZE_H': 4}),
tr... | 0 | 1 | 1 | [
"mamba"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/mamba/ops/ssd_chunk_state.py).
Goal: [Kernel] [Mamba] Remove BLOCK_H=1 from list of tuneable configurations for `_chunk_cumsum_fwd_kernel`
Target hardware: unspecified
Target models: mamba
Current file:
```python
# SPDX-License-Identifier: Apache-... |
## Purpose
Resolves #25194
The call to `tl.cumsum` in `_chunk_cumsum_fwd_kernel` produces numerically different output depending on whether `BLOCK_H=1` vs. `BLOCK_H>1`. We suspect it is using a different implementation in the former case (e.g., parallel reduction in sequence dimension) whereas in the latter case it ... | [] | null | null |
vllm | 63400259d05485330fb23635af892b3fce160dea | 2025-09-23T21:03:10+02:00 | 24,666 | https://github.com/vllm-project/vllm/pull/24666 | [Performance] Move apply_w8a8_block_fp8_linear to an op class (#24666) | [Performance] Move apply_w8a8_block_fp8_linear to an op class (#24666)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: ElizaWszola <elizaw.9289@gmail.com>
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Luka Govedič <... | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -13,8 +13,9 @@
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
+from vllm.model_executor.layers.quantization.input_quant_fp8 import QuantFP... | 181 | 127 | 6 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Performance] Move apply_w8a8_block_fp8_linear to an op class
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: C... | This PR unwraps `apply_w8a8_block_fp8_linear` custom op by implementing a class that we can instantiate and run from `Fp8LinearMethod`. Part of work outlined in https://github.com/vllm-project/vllm/issues/24629
#### Testing:
E2E tested with on Blackwell and Hopper
```
llm = LLM(model="Qwen/Qwen3-30B-A3B-FP8")
llm = LL... | [] | null | null |
vllm | 48ecb4438b2845f757edf228c5455ca6095938af | 2025-09-19T16:06:49-04:00 | 21,126 | https://github.com/vllm-project/vllm/pull/21126 | [Perf] Use FlashInfer RoPE for RotaryEmbedding.forward_cuda when available (#21126) | [Perf] Use FlashInfer RoPE for RotaryEmbedding.forward_cuda when available (#21126)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com> | vllm/model_executor/layers/rotary_embedding/mrope.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from vllm.triton_utils import tl, triton
from .base import RotaryEmbedding
from .co... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from vllm.triton_utils import tl, triton
from .base import RotaryEmbedding
from .co... | --- vllm/model_executor/layers/rotary_embedding/mrope.py
+++ vllm/model_executor/layers/rotary_embedding/mrope.py
@@ -245,6 +245,7 @@
assert positions.ndim == 1 or positions.ndim == 2
assert key is not None
+ self._match_cos_sin_cache_dtype(query)
num_tokens = positions.shape[-1]
... | 2 | 0 | 5 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/rotary_embedding/mrope.py).
Goal: [Perf] Use FlashInfer RoPE for RotaryEmbedding.forward_cuda when available
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyright... | ## Purpose
Enables FlashInfer RoPE for the cuda forward impl when custom op is set.
Microbenchmarks show ~2x speedup vs our custom op, but haven't seen noticeable end-to-end results yet.
## Test Plan
lm-eval with llama 8b
## Test Result
I found no noticeable performance difference so leaving this not enabled by d... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": null, "higher_is_better": false, "baseline": null, "optimized": null, "stated_speedup": 2.0, "speedup": 2.0}] | 2 | null |
vllm | a2a5f79e09075f50943750a2376b3b5d95a47ac5 | 2025-09-19T12:07:26-07:00 | 24,390 | https://github.com/vllm-project/vllm/pull/24390 | Optimize triton unified attention performance for sliding window attention (#24390) | Optimize triton unified attention performance for sliding window attention (#24390)
Signed-off-by: zixi-qi <qizixi@meta.com> | vllm/attention/ops/triton_unified_attention.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import torch
from vllm.l... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import torch
from vllm.l... | --- vllm/attention/ops/triton_unified_attention.py
+++ vllm/attention/ops/triton_unified_attention.py
@@ -184,8 +184,30 @@
# this prefix can be skipped)
num_tiles = cdiv_fn(max_seq_prefix_len, TILE_SIZE)
- # iterate through tiles
- for j in range(0, num_tiles):
+ # ---- Sliding-window tile pruning ... | 24 | 2 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_unified_attention.py).
Goal: Optimize triton unified attention performance for sliding window attention
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: ... | Summary:
Optimize kernel_unified_attention_2d attention performance for sliding window attention by pruning unused tiles
Before this change, GPT-OSS + triton attention backend was spending equal amount of time between global and local attention due to attn score still calculated by masked out sequences
<img width="1... | [] | null | null |
vllm | cea91a32f2364d19d5e708026e84ce21a450c53d | 2025-09-19T18:27:49+08:00 | 25,055 | https://github.com/vllm-project/vllm/pull/25055 | [Kernel][Performance] Add Triton kernel for Qwen3-VL interleaved MRoPE (#25055) | [Kernel][Performance] Add Triton kernel for Qwen3-VL interleaved MRoPE (#25055)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn> | vllm/model_executor/layers/rotary_embedding/mrope.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from vllm.triton_utils import tl, triton
from .base import RotaryEmbedding
from .co... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from vllm.triton_utils import tl, triton
from .base import RotaryEmbedding
from .co... | --- vllm/model_executor/layers/rotary_embedding/mrope.py
+++ vllm/model_executor/layers/rotary_embedding/mrope.py
@@ -15,7 +15,7 @@
@triton.jit
-def _triton_qwen2vl_mrope_forward(
+def _triton_mrope_forward(
q_ptr,
k_ptr,
cos,
@@ -30,12 +30,14 @@
pad_hd: tl.constexpr,
mrope_section_t: tl.c... | 22 | 14 | 1 | [
"qwen"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/rotary_embedding/mrope.py).
Goal: [Kernel][Performance] Add Triton kernel for Qwen3-VL interleaved MRoPE
Target hardware: unspecified
Target models: qwen
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyr... | ## Purpose
- Following PR for #24727, implement corresponding Triton kernel for interleaved MRoPE.
## Test Plan
```
pytest -s -v tests/kernels/core/test_mrope.py
```
## Test Result
Test should pass
---
<details>
<summary> Essential Elements of an Effective PR Description Checklist </summary>
- [x] The purpose of th... | [] | null | null |
vllm | 3c068c637b9b1f945d5aa572da40553ab1691896 | 2025-09-17T17:35:32-04:00 | 23,972 | https://github.com/vllm-project/vllm/pull/23972 | [Kernel] Faster pre-processing time for W4A8 (#23972) | [Kernel] Faster pre-processing time for W4A8 (#23972)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com> | csrc/quantization/cutlass_w4a8/w4a8_mm_entry.cu | cuda | Apache-2.0 | //
// Based off of:
// https://github.com/NVIDIA/cutlass/blob/main/examples/55_hopper_mixed_dtype_gemm/55_hopper_int4_fp8_gemm.cu
//
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass_extensions/torch_utils.hpp"
#include "core/registration.h"
#include "cutla... | //
// Based off of:
// https://github.com/NVIDIA/cutlass/blob/main/examples/55_hopper_mixed_dtype_gemm/55_hopper_int4_fp8_gemm.cu
//
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass_extensions/torch_utils.hpp"
#include "core/registration.h"
#include "cutla... | --- csrc/quantization/cutlass_w4a8/w4a8_mm_entry.cu
+++ csrc/quantization/cutlass_w4a8/w4a8_mm_entry.cu
@@ -24,6 +24,8 @@
#include "cutlass_extensions/common.hpp"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
+
+#include <cuda_runtime.h>
namespace vllm::cutlass_w4a8 {
@@ -393,6 +395,71 @@
... | 71 | 1 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w4a8/w4a8_mm_entry.cu).
Goal: [Kernel] Faster pre-processing time for W4A8
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
//
// Based off of:
// https://github.com/NVIDIA/cutlass/blob/main/examples/55_hopper_mixed_dty... | <!-- markdownlint-disable -->
## Purpose
The W4A8 kernels require a special encoding/pre-processing step (one for weights, one for scales). The [current CUTLASS implementation](https://github.com/NVIDIA/cutlass/blob/main/tools/util/include/cutlass/util/mixed_dtype_utils.hpp#L272) walks the values 1-by-1 on CPU which i... | [{"scope": "e2e", "hardware": null, "model": "Command A (111B params)", "shape": null, "batch_size": null, "metric": "latency", "unit": "seconds", "higher_is_better": false, "baseline": 558.104425, "optimized": 44.892353, "stated_speedup": null, "speedup": 12.4321}] | null | 12.4321 |
vllm | 04ad0dc275ca38f2890b7dd21a9fa75311128aa2 | 2025-09-16T14:10:54+08:00 | 24,769 | https://github.com/vllm-project/vllm/pull/24769 | [benchmark] Add triton version in the moe tuned config (#24769) | [benchmark] Add triton version in the moe tuned config (#24769)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
# torch.compile needs typing.List. It will fail torch.library.infer_schema
# otherwise
from typing import List # noqa: UP035
from typing import Any, ... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
# torch.compile needs typing.List. It will fail torch.library.infer_schema
# otherwise
from typing import List # noqa: UP035
from typing import Any, ... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -720,7 +720,10 @@
logger.info("Using configuration from %s for MoE layer.",
config_file_path)
# If a configuration has been found, return it
- ... | 4 | 1 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [benchmark] Add triton version in the moe tuned config
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contrib... | <!-- markdownlint-disable -->
## Purpose
See: https://github.com/vllm-project/vllm/issues/24112#issuecomment-3275953242
The tuned configuration will include the triton_version, like:
```python
{ "triton_version": "3.4.0",
"1": {
"BLOCK_SIZE_M": 16,
"BLOCK_SIZE_N": 32,
"BLOCK_SIZE_K": 64,
... | [] | null | null |
vllm | 98229db2444b016d572bfd36e685960b3352d900 | 2025-09-13T09:17:27+02:00 | 24,054 | https://github.com/vllm-project/vllm/pull/24054 | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054) | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054)
Signed-off-by: elvircrn <elvircrn@gmail.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -133,6 +133,12 @@
torch::Tensor& input,
torch::Tensor& input_global_scale);
#endif
+void silu_mul_fp8_quant_deep_gemm_cuda(
+ const at::Tensor& input, // (E, T, 2*H)
+ const at::Tensor& counts, // (E)
+ at::Tenso... | 6 | 0 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Kernels][DP/EP] Optimize Silu Kernel for R1
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref... | ## Purpose
The purpose of this PR is to replace the triton silu implementation with a faster cuda version.
Here's a benchmark slice:
<img width="8362" height="5307" alt="silu_benchmark_total_tokens_10" src="https://github.com/user-attachments/assets/8a7db637-ba63-46e2-9849-591dd03d1689" />
This was achieved by laun... | [] | null | null |
vllm | 98229db2444b016d572bfd36e685960b3352d900 | 2025-09-13T09:17:27+02:00 | 24,054 | https://github.com/vllm-project/vllm/pull/24054 | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054) | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054)
Signed-off-by: elvircrn <elvircrn@gmail.com> | csrc/quantization/activation_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "core/math.hpp"
#include "../cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/fp8/common.cuh"
namespace vllm {
template <typename T>
__device__ __forceinline__ T silu_kernel(const T& ... | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "core/math.hpp"
#include "../cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/fp8/common.cuh"
#include <c10/util/Float8_e4m3fn.h>
#ifndef USE_ROCM
#include <cuda_bf16.h>
#include ... | --- csrc/quantization/activation_kernels.cu
+++ csrc/quantization/activation_kernels.cu
@@ -9,6 +9,26 @@
#include "quantization/fp8/common.cuh"
+#include <c10/util/Float8_e4m3fn.h>
+
+#ifndef USE_ROCM
+ #include <cuda_bf16.h>
+ #include <cuda_fp16.h>
+ #include <cuda_fp8.h>
+#else
+ #include <hip/hip_bf16.h>
+... | 465 | 0 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/activation_kernels.cu).
Goal: [Kernels][DP/EP] Optimize Silu Kernel for R1
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmat... | ## Purpose
The purpose of this PR is to replace the triton silu implementation with a faster cuda version.
Here's a benchmark slice:
<img width="8362" height="5307" alt="silu_benchmark_total_tokens_10" src="https://github.com/user-attachments/assets/8a7db637-ba63-46e2-9849-591dd03d1689" />
This was achieved by laun... | [] | null | null |
vllm | 98229db2444b016d572bfd36e685960b3352d900 | 2025-09-13T09:17:27+02:00 | 24,054 | https://github.com/vllm-project/vllm/pull/24054 | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054) | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054)
Signed-off-by: elvircrn <elvircrn@gmail.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -31,6 +31,13 @@
#else
#define stride_tag
#endif
+
+ ops.def(
+ "silu_mul_fp8_quant_deep_gemm_cuda(Tensor input, Tensor counts, Tensor! "
+ "y_q, Tensor! y_s, int group_size, "
+ "bool use_ue8m0, int num_parallel_tokens) -> ()");
+ ops.impl... | 7 | 0 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Kernels][DP/EP] Optimize Silu Kernel for R1
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#inc... | ## Purpose
The purpose of this PR is to replace the triton silu implementation with a faster cuda version.
Here's a benchmark slice:
<img width="8362" height="5307" alt="silu_benchmark_total_tokens_10" src="https://github.com/user-attachments/assets/8a7db637-ba63-46e2-9849-591dd03d1689" />
This was achieved by laun... | [] | null | null |
vllm | 98229db2444b016d572bfd36e685960b3352d900 | 2025-09-13T09:17:27+02:00 | 24,054 | https://github.com/vllm-project/vllm/pull/24054 | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054) | [Kernels][DP/EP] Optimize Silu Kernel for R1 (#24054)
Signed-off-by: elvircrn <elvircrn@gmail.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuant... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from math import log2
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.confi... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
+from math import log2
from typing import Optional
import t... | 87 | 60 | 4 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Kernels][DP/EP] Optimize Silu Kernel for R1
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contr... | ## Purpose
The purpose of this PR is to replace the triton silu implementation with a faster cuda version.
Here's a benchmark slice:
<img width="8362" height="5307" alt="silu_benchmark_total_tokens_10" src="https://github.com/user-attachments/assets/8a7db637-ba63-46e2-9849-591dd03d1689" />
This was achieved by laun... | [] | null | null |
vllm | dbeee3844cf93278e18e736ea7f177648de2d6aa | 2025-09-13T15:16:24+08:00 | 24,757 | https://github.com/vllm-project/vllm/pull/24757 | [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization (#24757) | [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization (#24757)
Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com> | csrc/quantization/fp8/common.cuh | cuda | Apache-2.0 | #pragma once
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include <cmath>
#ifdef USE_ROCM
#include "amd/quant_utils.cuh"
#endif
// Determines the preferred FP8 type for the current platform.
// Note that for CUDA this just returns true,
// but on ROCm it will check device props.
st... | #pragma once
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include <cmath>
#ifndef USE_ROCM
#include "nvidia/quant_utils.cuh"
#else
#include "amd/quant_utils.cuh"
#endif
// Determines the preferred FP8 type for the current platform.
// Note that for CUDA this just returns true,
//... | --- csrc/quantization/fp8/common.cuh
+++ csrc/quantization/fp8/common.cuh
@@ -5,7 +5,9 @@
#include <cmath>
-#ifdef USE_ROCM
+#ifndef USE_ROCM
+ #include "nvidia/quant_utils.cuh"
+#else
#include "amd/quant_utils.cuh"
#endif
@@ -48,7 +50,9 @@
float r =
fmaxf(-quant_type_max_v<fp8_type>, fminf(x, qua... | 6 | 2 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/common.cuh).
Goal: [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
#include "quantization/vectorization.cuh"
#include "quant... | <!-- markdownlint-disable -->
## Purpose
Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization.
## Test Plan && Test Result
Unit test:
`tests/kernels/quantization/test_fp8_quant.py`
```
===== 109 passed, 1 warning in 15.71s =====
```
E2E accuracy test:
```
vllm ({'pretrained': 'nvidia/Llama-... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 3.488, "optimized": 2.464, "stated_speedup": null, "speedup": 1.4156}, {"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null... | 1.4521 | 1.0262 |
vllm | dbeee3844cf93278e18e736ea7f177648de2d6aa | 2025-09-13T15:16:24+08:00 | 24,757 | https://github.com/vllm-project/vllm/pull/24757 | [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization (#24757) | [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization (#24757)
Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com> | csrc/quantization/fp8/nvidia/quant_utils.cuh | cuda | Apache-2.0 | #pragma once
#include "../../../attention/attention_dtypes.h"
#include <assert.h>
#include <float.h>
#include <stdint.h>
#include <type_traits>
namespace vllm {
#ifndef USE_ROCM
namespace fp8 {
#ifdef ENABLE_FP8
#if 0 // Disable the following code to reduce the binary size.
template <typename Tout, typename ... | #pragma once
#include "../../../attention/attention_dtypes.h"
#include <assert.h>
#include <float.h>
#include <stdint.h>
#include <type_traits>
namespace vllm {
#ifndef USE_ROCM
namespace fp8 {
#ifdef ENABLE_FP8
template <typename Tout, typename Tin>
__inline__ __device__ Tout vec_conversion(
const Tin& x, co... | --- csrc/quantization/fp8/nvidia/quant_utils.cuh
+++ csrc/quantization/fp8/nvidia/quant_utils.cuh
@@ -12,13 +12,26 @@
namespace fp8 {
#ifdef ENABLE_FP8
+template <typename Tout, typename Tin>
+__inline__ __device__ Tout vec_conversion(
+ const Tin& x, const __nv_fp8_interpretation_t fp8_type = __NV_E4M3) {
+ ... | 19 | 6 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/nvidia/quant_utils.cuh).
Goal: [Perf] Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
#include "../../../attention/attention_dtypes... | <!-- markdownlint-disable -->
## Purpose
Use NVIDIA hardware-accelerated instruction for float to fp8_e4m3 quantization.
## Test Plan && Test Result
Unit test:
`tests/kernels/quantization/test_fp8_quant.py`
```
===== 109 passed, 1 warning in 15.71s =====
```
E2E accuracy test:
```
vllm ({'pretrained': 'nvidia/Llama-... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 3.488, "optimized": 2.464, "stated_speedup": null, "speedup": 1.4156}, {"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null... | 1.4521 | 1.0262 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/cutlass_extensions/vllm_collective_builder.cuh | cuda | Apache-2.0 | #pragma once
#include "cutlass_extensions/gemm/collective/collective_builder.hpp"
namespace cutlass::gemm::collective {
using namespace cute;
//
// VLLMCollectiveBuilder is a wrapper around CollectiveBuilder that allows for
// for custom kernel tags, allowing you to build custom collectives. Without
// touching the ... | #pragma once
#include "cutlass/gemm/collective/collective_builder.hpp"
namespace cutlass::gemm::collective {
using namespace cute;
//
// VLLMCollectiveBuilder is a wrapper around CollectiveBuilder that allows for
// for custom kernel tags, allowing you to build custom collectives. Without
// touching the cutlass lib... | --- csrc/cutlass_extensions/vllm_collective_builder.cuh
+++ csrc/cutlass_extensions/vllm_collective_builder.cuh
@@ -1,6 +1,6 @@
#pragma once
-#include "cutlass_extensions/gemm/collective/collective_builder.hpp"
+#include "cutlass/gemm/collective/collective_builder.hpp"
namespace cutlass::gemm::collective {
using... | 1 | 1 | 7 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/cutlass_extensions/vllm_collective_builder.cuh).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "cutlass_extensions/gemm/collective/collective_builder.hpp"
namespa... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm100_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
... | #pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm100_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm100_fp8_dispatch.cuh
@@ -13,9 +13,6 @@
#include "cutlass/gemm/kernel/tile_scheduler_params.h"
#include "cutlass/epilogue/dispatch_policy.hpp"
#include "cutlass/epilogue/colle... | 0 | 3 | 7 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm100_fp8_dispatch.cuh).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm120_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
... | #pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm120_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm120_fp8_dispatch.cuh
@@ -13,9 +13,6 @@
#include "cutlass/gemm/kernel/tile_scheduler_params.h"
#include "cutlass/epilogue/dispatch_policy.hpp"
#include "cutlass/epilogue/colle... | 0 | 3 | 7 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm120_fp8_dispatch.cuh).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "cuda_utils.h"
#include "cutlass/cutlass.h... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm90_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
#include "cutlass/gemm/k... | #pragma once
#include "cutlass/cutlass.h"
#include "cutlass/numeric_types.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/gemm/dispatch_policy.hpp"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
#include "cutlass/gemm/k... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm90_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm90_fp8_dispatch.cuh
@@ -13,27 +13,18 @@
#include "cutlass/epilogue/dispatch_policy.hpp"
#include "cutlass/epilogue/collective/collective_builder.hpp"
-#include "cutlass_exten... | 88 | 110 | 7 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_blockwise_sm90_fp8_dispatch.cuh).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "cutlass/cutlass.h"
#include "cutlass/numer... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_helper.hpp | cpp | Apache-2.0 | #include <torch/all.h>
#include "cuda_utils.h"
#include "cutlass_extensions/common.hpp"
template <typename Fp8Func, typename Int8Func, typename BlockwiseFunc>
void dispatch_scaled_mm(torch::Tensor& c, torch::Tensor const& a,
torch::Tensor const& b, torch::Tensor const& a_scales,
... | #include <torch/all.h>
#include "cuda_utils.h"
#include "cutlass_extensions/common.hpp"
template <typename Fp8Func, typename Int8Func, typename BlockwiseFunc>
void dispatch_scaled_mm(torch::Tensor& c, torch::Tensor const& a,
torch::Tensor const& b, torch::Tensor const& a_scales,
... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_helper.hpp
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_helper.hpp
@@ -32,7 +32,7 @@
TORCH_CHECK(a_scales.dim() == 2, "a scale must be 2d tensor.");
TORCH_CHECK(b_scales.dim() == 2, "b scale must be 2d tensor.");
int32_t version_num = get_sm_version_nu... | 1 | 27 | 7 | [] | [
"SM90"
] | [] | Optimize this cpp kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_helper.hpp).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```cpp
#include <torch/all.h>
#include "cuda_utils.h"
#include "cutlass_extensions/common.hpp"
... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | c3aea10dc8b83645523843a27999a95340020ddf | 2025-09-11T18:43:14-04:00 | 23,280 | https://github.com/vllm-project/vllm/pull/23280 | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280) | [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel (#23280)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -40,11 +40,14 @@
block_size: list[int],
output_dtype: torch.dtype = torch.float16,
) -> torch.Tensor:
- return ops.cutlass_scaled_mm(A,
- B.T,
- ... | 25 | 25 | 7 | [] | [
"SM90"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Perf] Use upstream CUTLASS for SM90 Block FP8 kernel
Target hardware: SM90
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contri... | ## Purpose
The `weight.shape % 128 != 0` limitation of the SM90 CUTLASS implementation was a product of our custom implementation and works now on modern CUTLASS. We can completely remove `csrc/cutlass_extensions/gemm/` and migrate to using CUTLASS directly.
Caveats with the current support in CUTLASS is that there i... | [{"scope": "e2e", "hardware": "Hopper", "model": "DeepSeek-V3", "shape": null, "batch_size": 4, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 620.56, "optimized": 750.68, "stated_speedup": null, "speedup": 1.2097}, {"scope": "kernel", "hardware": "H100", "model": null, "shape": "N=576,K... | 1.1357 | 1.2097 |
vllm | fba785658170e8723ccba762654f30c54b0217a4 | 2025-09-10T18:03:17-04:00 | 23,439 | https://github.com/vllm-project/vllm/pull/23439 | [Perf] Warmup FlashInfer attention during startup (#23439) | [Perf] Warmup FlashInfer attention during startup (#23439)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Co-authored-by: Luka Govedič <lgovedic@redhat.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
... | vllm/v1/attention/backends/flashinfer.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Attention layer with FlashInfer."""
from __future__ import annotations
from dataclasses import dataclass
from typing import ClassVar, Optional, Union
import numpy as np
import torch
from flashinfer import (Ba... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Attention layer with FlashInfer."""
from __future__ import annotations
from dataclasses import dataclass
from typing import ClassVar, Optional, Union
import numpy as np
import torch
from flashinfer import (Ba... | --- vllm/v1/attention/backends/flashinfer.py
+++ vllm/v1/attention/backends/flashinfer.py
@@ -549,22 +549,6 @@
)
return attn_metadata
- def build_for_cudagraph_capture(
- self, common_attn_metadata: CommonAttentionMetadata):
- """
- This method builds the meta... | 0 | 16 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/v1/attention/backends/flashinfer.py).
Goal: [Perf] Warmup FlashInfer attention during startup
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the v... |
## Purpose
Make sure to run a dummy run with mixed batch attention included when flashinfer is used to trigger JIT/download/load from disk before real requests. Without this, flashinfer attention kernels are loaded on the first real inference which is unexpected for users.
This required adding a flag to make a mixed... | [] | null | null |
vllm | 6578e873655859462758c5c51e51f876f2aa24a3 | 2025-08-27T02:52:45-07:00 | 23,174 | https://github.com/vllm-project/vllm/pull/23174 | Optimize input preparation for FlashInfer [2/N] (#23174) | Optimize input preparation for FlashInfer [2/N] (#23174)
Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu> | vllm/v1/attention/backends/flashinfer.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Attention layer with FlashInfer."""
from __future__ import annotations
from dataclasses import dataclass
from typing import ClassVar, Optional, Union
import torch
from flashinfer import (BatchDecodeWithPagedK... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Attention layer with FlashInfer."""
from __future__ import annotations
from dataclasses import dataclass
from typing import ClassVar, Optional, Union
import numpy as np
import torch
from flashinfer import (Ba... | --- vllm/v1/attention/backends/flashinfer.py
+++ vllm/v1/attention/backends/flashinfer.py
@@ -6,6 +6,7 @@
from dataclasses import dataclass
from typing import ClassVar, Optional, Union
+import numpy as np
import torch
from flashinfer import (BatchDecodeWithPagedKVCacheWrapper,
BatchPrefil... | 55 | 27 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/v1/attention/backends/flashinfer.py).
Goal: Optimize input preparation for FlashInfer [2/N]
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLL... | Should be merged after #23147
| [] | null | null |
vllm | 394591e34371e4a1ad23a85401148df31d8de451 | 2025-08-22T00:01:08-04:00 | 23,351 | https://github.com/vllm-project/vllm/pull/23351 | [Feature] Enable DeepGEMM Linear on B200; 1.5% E2E throughput improvement (#23351) | [Feature] Enable DeepGEMM Linear on B200; 1.5% E2E throughput improvement (#23351)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -19,8 +19,9 @@
CUTLASS_BLOCK_FP8_SUPPORTED)
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton
-from vllm.utils import cdiv, direct_register_custom_op... | 6 | 16 | 1 | [] | [
"B200"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Feature] Enable DeepGEMM Linear on B200; 1.5% E2E throughput improvement
Target hardware: B200
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightTe... | ## Purpose
Enable DeepGEMM Linear on B200
This should also fix some cutlass linear acc error since the weight is quantized to e8m0
## Test
```bash
VLLM_USE_DEEP_GEMM=1 lm_eval --model vllm --model_args "pretrained=Qwen/Qwen3-30B-A3B-FP8,max_model_len=32768,enforce_eager=True" --trust_remote_code --tasks gsm... | [] | null | null |
vllm | 3bbe11cc136373bd4f6c12912dc094dba086fa11 | 2025-08-21T17:56:15-04:00 | 23,265 | https://github.com/vllm-project/vllm/pull/23265 | [Perf] Small optimizations for silu_mul_fp8_quant_deep_gemm (#23265) | [Perf] Small optimizations for silu_mul_fp8_quant_deep_gemm (#23265)
Signed-off-by: mgoin <mgoin64@gmail.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuant... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuant... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -70,53 +70,51 @@
# number of valid tokens for this expert
n_tokens = tl.load(counts_ptr + e * stride_counts_e).to(tl.int64)
- cols = tl.arange(0, BLOCK)
- cols = cols.... | 30 | 32 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Perf] Small optimizations for silu_mul_fp8_quant_deep_gemm
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: ... | ## Purpose
Reorder some stride calculation and operations, rename to more descriptive variables, and decrease num_stages to 4 to help with expert token imbalance. Not a big deal but should help a bit.
```
python benchmarks/kernels/benchmark_silu_mul_fp8_quant.py
# main
GPU: NVIDIA H100 80GB HBM3
Config ... | [] | null | null |
vllm | 98deac3879860b829dd9a30b19bbb2adb9c96e7f | 2025-08-13T20:27:25+08:00 | 22,791 | https://github.com/vllm-project/vllm/pull/22791 | [FEATURE] support custom vllm tuned config path for fused moe triton kernels (#22791) | [FEATURE] support custom vllm tuned config path for fused moe triton kernels (#22791)
Signed-off-by: Chi Zhang <zhangchi.usc1992@bytedance.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
# torch.compile needs typing.List. It will fail torch.library.infer_schema
# otherwise
from typing import List # noqa: UP035
from typing import Any, ... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
# torch.compile needs typing.List. It will fail torch.library.infer_schema
# otherwise
from typing import List # noqa: UP035
from typing import Any, ... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -701,20 +701,32 @@
block_shape = [block_n, block_k] if block_n and block_k else None
json_file_name = get_config_file_name(E, N, dtype, block_shape)
- config_file_path = os.path.join(
+ confi... | 20 | 8 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [FEATURE] support custom vllm tuned config path for fused moe triton kernels
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightT... | # Essential Elements of an Effective PR Description Checklist
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [ ] The test plan, such as providing test command.
- [ ] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [] | null | null |
vllm | 4c558cf62ed69fbd8c031809b0a7f8b12afa980b | 2025-08-12T21:34:47-07:00 | 22,211 | https://github.com/vllm-project/vllm/pull/22211 | [Perf] Support topk softmax fused kernel for broader num_experts (#22211) | [Perf] Support topk softmax fused kernel for broader num_experts (#22211)
Signed-off-by: Shixian Cui <shixian@amazon.com>
Co-authored-by: Shixian Cui <shixian@amazon.com> | csrc/moe/topk_softmax_kernels.cu | cuda | Apache-2.0 | /*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensorrt_llm/kernels/mixtureOfExperts/moe_kernels.cu
* Copyright (c) 2024, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licen... | /*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensorrt_llm/kernels/mixtureOfExperts/moe_kernels.cu
* Copyright (c) 2024, The vLLM team.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licen... | --- csrc/moe/topk_softmax_kernels.cu
+++ csrc/moe/topk_softmax_kernels.cu
@@ -188,7 +188,9 @@
It fuses the softmax, max and argmax into a single kernel.
Limitations:
- 1) This implementation is intended for when the number of experts is a small power of 2.
+ 1) This implementation is optimized for when the nu... | 46 | 33 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/topk_softmax_kernels.cu).
Goal: [Perf] Support topk softmax fused kernel for broader num_experts
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Adapted from https://github.com/NVIDIA/TensorRT-LLM/blob/v0.7.1/cpp/tensorrt_llm/kerne... | # Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "576-top8", "batch_size": 1, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 16.77, "optimized": 8.77, "stated_speedup": null, "speedup": 1.9122}, {"scope": "kernel", "hardware": null, "model": null, "shape": "576-top1", "batch_siz... | 1.9304 | null |
vllm | 42172ad18fbc22c89d0063184e4570cc84186e16 | 2025-08-09T11:50:03-07:00 | 22,375 | https://github.com/vllm-project/vllm/pull/22375 | [FEAT] [Performance] Add triton mrope to replace the torch code path (#22375) | [FEAT] [Performance] Add triton mrope to replace the torch code path (#22375)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com> | vllm/model_executor/layers/rotary_embedding/mrope.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from .base import RotaryEmbedding
from .common import apply_rotary_emb_dispatch
cl... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
import itertools
from typing import Optional, Union
import numpy as np
import torch
from transformers import PretrainedConfig
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton... | --- vllm/model_executor/layers/rotary_embedding/mrope.py
+++ vllm/model_executor/layers/rotary_embedding/mrope.py
@@ -8,8 +8,171 @@
import torch
from transformers import PretrainedConfig
+from vllm.platforms import current_platform
+from vllm.triton_utils import tl, triton
+
from .base import RotaryEmbedding
from... | 231 | 0 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/rotary_embedding/mrope.py).
Goal: [FEAT] [Performance] Add triton mrope to replace the torch code path
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: ... | # Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 2.0, "speedup": 2.0}, {"scope": "kernel", "hardware": null, "model": null, "shape": null, "batch_size": null, "... | 2.5 | 1.0136 |
vllm | eefbf4a68b7b0a5b8364a59647906be1b7f043e2 | 2025-08-01T19:18:51-04:00 | 22,036 | https://github.com/vllm-project/vllm/pull/22036 | [Perf] Optimize `reshape_and_cache_flash` CUDA Kernel (#22036) | [Perf] Optimize `reshape_and_cache_flash` CUDA Kernel (#22036)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nvidia/quant_utils.cuh"
#endif
#include <algorith... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nv... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -5,6 +5,7 @@
#include "cuda_utils.h"
#include "cuda_compat.h"
#include "dispatch_utils.h"
+#include "quantization/vectorization_utils.cuh"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
@@ -261,14 +262,26 @@
}
}
+// Used by vectoriza... | 69 | 23 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Perf] Optimize `reshape_and_cache_flash` CUDA Kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_utils.h"... | ## Purpose
Using vectorization utils to `reshape_and_cache_flash` and get performance improvement
## Test
### Acc
```bash
lm_eval --model vllm --model_args "pretrained=Qwen/Qwen3-30B-A3B-FP8,max_model_len=32768,enforce_eager=True" --trust_remote_code --tasks gsm8k --num_fewshot 5 --batch_size auto
|Tas... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "layout=HND", "batch_size": 2, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 10.326, "optimized": 8.323, "stated_speedup": null, "speedup": 1.2407}, {"scope": "kernel", "hardware": null, "model": null, "shape": "layout=HND", "bat... | 1.3744 | null |
vllm | 1b0a15553420e5459d9a8512a3f1bd7d4117db08 | 2025-07-29T23:50:46-04:00 | 21,867 | https://github.com/vllm-project/vllm/pull/21867 | [Perf] Using `__nv_fp8_e4m3` instead of `c10::e4m3` for `per_token_group_quant` (#21867) | [Perf] Using `__nv_fp8_e4m3` instead of `c10::e4m3` for `per_token_group_quant` (#21867)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/fp8/per_token_group_quant.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4m3fn.h>
#include "../per_token_group_quant_8bit.h"
#include <cmath>
#include <cuda_fp16.h>
#include <cuda_bf16.h>
#include <torch/all.h>
#include "../vectorization.cuh"
#include "../vectorization_utils.cuh"
#include "../../dispatch_utils.h"
__device__... | #include <ATen/cuda/CUDAContext.h>
#include "../per_token_group_quant_8bit.h"
#include <cmath>
#include <cuda_fp8.h>
#include <torch/all.h>
#include "../vectorization.cuh"
#include "../vectorization_utils.cuh"
#include "../../dispatch_utils.h"
__device__ __forceinline__ float GroupReduceMax(float val, const int t... | --- csrc/quantization/fp8/per_token_group_quant.cu
+++ csrc/quantization/fp8/per_token_group_quant.cu
@@ -1,12 +1,10 @@
#include <ATen/cuda/CUDAContext.h>
-#include <c10/util/Float8_e4m3fn.h>
#include "../per_token_group_quant_8bit.h"
#include <cmath>
-#include <cuda_fp16.h>
-#include <cuda_bf16.h>
+#include <... | 2 | 4 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/per_token_group_quant.cu).
Goal: [Perf] Using `__nv_fp8_e4m3` instead of `c10::e4m3` for `per_token_group_quant`
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4... | ## Purpose
https://github.com/sgl-project/sglang/pull/8499 shows we can get performance improvement through `__nv_fp8_e4m3`
This PR does that, doesn't change `dynamic/static fp8 quant` yet since we will update it together in https://github.com/vllm-project/vllm/issues/19630
## Test
`(vllm-user-6) vllm-user-6@centra... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "(2,8192)", "batch_size": null, "metric": "latency", "unit": "\u00b5s", "higher_is_better": false, "baseline": 13.731, "optimized": 13.53, "stated_speedup": null, "speedup": 1.0149}, {"scope": "kernel", "hardware": null, "model": null, "shape": "(2,8192)", ... | 1.0315 | null |
vllm | c6c9122d50a836046a0bd5360bd98f29f4e70667 | 2025-07-28T16:13:58-07:00 | 20,396 | https://github.com/vllm-project/vllm/pull/20396 | [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning (#20396) | [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning (#20396)
Signed-off-by: Faqin Zhong <faqin.zhong@gmail.com>
Co-authored-by: Duncan Moss <djm.moss@gmail.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8.cu | cuda | Apache-2.0 | #include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm90_fp8_dispatch.cuh"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
namespace vllm {
void cutlass_scaled_mm_sm90_fp8(torch::Tensor& out, torch::Tensor const& a,
torch::Tensor const& b,
... | #include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm90_fp8_dispatch.cuh"
namespace vllm {
void cutlass_scaled_mm_sm90_fp8(torch::Tensor& out, torch::Tensor const& a,
torch::Tensor const& b,
torch::Tensor const& a_scales,
... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8.cu
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8.cu
@@ -1,6 +1,5 @@
#include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm90_fp8_dispatch.cuh"
-#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
namespace vllm {
@@ -13,11 +12,... | 4 | 5 | 2 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8.cu).
Goal: [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#include "scaled_mm_kernels.hpp"
#include "scaled_mm_sm90_fp8_dispat... | ## Essential Elements of an Effective PR Description Checklist
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [ ] The test plan, such as providing test command.
- [ ] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "kernel", "hardware": null, "model": "Mistral-7B-v0.1", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.05, "speedup": 1.05}, {"scope": "kernel", "hardware": null, "model": "Mistral-7B-v0.1", "shape":... | 1.15 | null |
vllm | c6c9122d50a836046a0bd5360bd98f29f4e70667 | 2025-07-28T16:13:58-07:00 | 20,396 | https://github.com/vllm-project/vllm/pull/20396 | [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning (#20396) | [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning (#20396)
Signed-off-by: Faqin Zhong <faqin.zhong@gmail.com>
Co-authored-by: Duncan Moss <djm.moss@gmail.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM90 (fp8) based on the Gemm
* shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename>... | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
/**
* This file defines Gemm kernel configurations for SM90 (fp8) based on the Gemm
* shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename ElementA... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8_dispatch.cuh
@@ -2,6 +2,7 @@
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
+#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
/**
* This file defines G... | 280 | 54 | 2 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm90_fp8_dispatch.cuh).
Goal: [Kernel] SM90 CUTLASS FP8 GEMM: add support for swap AB + kernel tuning
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "scaled_mm.cuh"
#include "cutlass_g... | ## Essential Elements of an Effective PR Description Checklist
- [ ] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [ ] The test plan, such as providing test command.
- [ ] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "kernel", "hardware": null, "model": "Mistral-7B-v0.1", "shape": null, "batch_size": null, "metric": "performance", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.05, "speedup": 1.05}, {"scope": "kernel", "hardware": null, "model": "Mistral-7B-v0.1", "shape":... | 1.15 | null |
vllm | 75d29cf4e1d7e950c2308b12e944b507fb3e1916 | 2025-07-25T20:07:07-04:00 | 21,476 | https://github.com/vllm-project/vllm/pull/21476 | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476) | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -292,6 +292,11 @@
torch::Tensor& output_q, torch::Tensor& output_s,
int64_t group_size, double eps, double fp8_min,
double fp8_max, bool scale_ue8m0);
+
+void per_token_group_quant_int8(const... | 5 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Perf] Cuda Kernel for Int8 Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor wea... | ## Purpose
Add support for int8 per-token group quant CUDA kernel
Follow up pr for https://github.com/vllm-project/vllm/pull/21083
## Test
Unit test:
```bash
(wentao) wentao@H100-GPU17:~/vllm/tests/kernels/quantization$ pytest test_per_token_group_quant.py
==========================================================... | [{"scope": "kernel", "hardware": "H100", "model": null, "shape": "M=32,N=128,gs=64,col_major=0,ue8m0=0,dtype=fp8", "batch_size": 32, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.169, "optimized": 0.011, "stated_speedup": 15.73, "speedup": 15.3636}, {"scope": "kernel", "hardware": "H100", ... | 14.3636 | 1.06 |
vllm | 75d29cf4e1d7e950c2308b12e944b507fb3e1916 | 2025-07-25T20:07:07-04:00 | 21,476 | https://github.com/vllm-project/vllm/pull/21476 | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476) | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/compressed_tensors/int8_quant_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#include "../../dispatch_utils.h"
#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#include <cub/util_type.cuh>
#else
#include <hipcub/hipcub.hpp>
#include <hipcub/util_type.hpp>
#endif
static inline __de... | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include "../per_token_group_quant_8bit.h"
#include <cmath>
#include "../../dispatch_utils.h"
#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#include <cub/util_type.cuh>
#else
#include <hipcub/hipcub.hpp>
#include <hipc... | --- csrc/quantization/compressed_tensors/int8_quant_kernels.cu
+++ csrc/quantization/compressed_tensors/int8_quant_kernels.cu
@@ -1,5 +1,7 @@
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
+
+#include "../per_token_group_quant_8bit.h"
#include <cmath>
@@ -336,3 +338,11 @@
}
});
}
+
+v... | 10 | 0 | 5 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/compressed_tensors/int8_quant_kernels.cu).
Goal: [Perf] Cuda Kernel for Int8 Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#inc... | ## Purpose
Add support for int8 per-token group quant CUDA kernel
Follow up pr for https://github.com/vllm-project/vllm/pull/21083
## Test
Unit test:
```bash
(wentao) wentao@H100-GPU17:~/vllm/tests/kernels/quantization$ pytest test_per_token_group_quant.py
==========================================================... | [{"scope": "kernel", "hardware": "H100", "model": null, "shape": "M=32,N=128,gs=64,col_major=0,ue8m0=0,dtype=fp8", "batch_size": 32, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.169, "optimized": 0.011, "stated_speedup": 15.73, "speedup": 15.3636}, {"scope": "kernel", "hardware": "H100", ... | 14.3636 | 1.06 |
vllm | 75d29cf4e1d7e950c2308b12e944b507fb3e1916 | 2025-07-25T20:07:07-04:00 | 21,476 | https://github.com/vllm-project/vllm/pull/21476 | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476) | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/fp8/per_token_group_quant.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4m3fn.h>
#include <cmath>
#include <cuda_fp16.h>
#include <cuda_bf16.h>
#include <torch/all.h>
#include "../vectorization.cuh"
#include "../vectorization_utils.cuh"
#include "../../dispatch_utils.h"
__device__ __forceinline__ float GroupReduceMax(float ... | #include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4m3fn.h>
#include "../per_token_group_quant_8bit.h"
#include <cmath>
#include <cuda_fp16.h>
#include <cuda_bf16.h>
#include <torch/all.h>
#include "../vectorization.cuh"
#include "../vectorization_utils.cuh"
#include "../../dispatch_utils.h"
__device__... | --- csrc/quantization/fp8/per_token_group_quant.cu
+++ csrc/quantization/fp8/per_token_group_quant.cu
@@ -1,5 +1,7 @@
#include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4m3fn.h>
+
+#include "../per_token_group_quant_8bit.h"
#include <cmath>
@@ -120,7 +122,7 @@
torch::T... | 5 | 1 | 5 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/per_token_group_quant.cu).
Goal: [Perf] Cuda Kernel for Int8 Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <c10/util/Float8_e4m3fn.h>
#include <cmath>
#in... | ## Purpose
Add support for int8 per-token group quant CUDA kernel
Follow up pr for https://github.com/vllm-project/vllm/pull/21083
## Test
Unit test:
```bash
(wentao) wentao@H100-GPU17:~/vllm/tests/kernels/quantization$ pytest test_per_token_group_quant.py
==========================================================... | [{"scope": "kernel", "hardware": "H100", "model": null, "shape": "M=32,N=128,gs=64,col_major=0,ue8m0=0,dtype=fp8", "batch_size": 32, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.169, "optimized": 0.011, "stated_speedup": 15.73, "speedup": 15.3636}, {"scope": "kernel", "hardware": "H100", ... | 14.3636 | 1.06 |
vllm | 75d29cf4e1d7e950c2308b12e944b507fb3e1916 | 2025-07-25T20:07:07-04:00 | 21,476 | https://github.com/vllm-project/vllm/pull/21476 | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476) | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -624,6 +624,14 @@
ops.impl("per_token_group_fp8_quant", torch::kCUDA,
&per_token_group_quant_fp8);
+ // Compute per-token-group INT8 quantized tensor and scaling factor.
+ ops.def(
+ "per_token_group_quant_int8(Tensor input, Tensor! outp... | 8 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Perf] Cuda Kernel for Int8 Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>... | ## Purpose
Add support for int8 per-token group quant CUDA kernel
Follow up pr for https://github.com/vllm-project/vllm/pull/21083
## Test
Unit test:
```bash
(wentao) wentao@H100-GPU17:~/vllm/tests/kernels/quantization$ pytest test_per_token_group_quant.py
==========================================================... | [{"scope": "kernel", "hardware": "H100", "model": null, "shape": "M=32,N=128,gs=64,col_major=0,ue8m0=0,dtype=fp8", "batch_size": 32, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.169, "optimized": 0.011, "stated_speedup": 15.73, "speedup": 15.3636}, {"scope": "kernel", "hardware": "H100", ... | 14.3636 | 1.06 |
vllm | 75d29cf4e1d7e950c2308b12e944b507fb3e1916 | 2025-07-25T20:07:07-04:00 | 21,476 | https://github.com/vllm-project/vllm/pull/21476 | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476) | [Perf] Cuda Kernel for Int8 Per Token Group Quant (#21476)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/quantization/utils/int8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/blob/4cb53ecd0cffceb6dee5c011a58f65997a86f151/python/sglang/srt/layers/quantization/int8_kernel.py
import functools
import json
import logging
import os
from t... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/blob/4cb53ecd0cffceb6dee5c011a58f65997a86f151/python/sglang/srt/layers/quantization/int8_kernel.py
import functools
import json
import logging
import os
from t... | --- vllm/model_executor/layers/quantization/utils/int8_utils.py
+++ vllm/model_executor/layers/quantization/utils/int8_utils.py
@@ -238,13 +238,20 @@
int8_min = iinfo.min
x_q = torch.empty_like(x, device=x.device, dtype=dtype)
- M = x.numel() // group_size
- N = group_size
x_s = torch.empty(
... | 9 | 2 | 5 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/int8_utils.py).
Goal: [Perf] Cuda Kernel for Int8 Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright co... | ## Purpose
Add support for int8 per-token group quant CUDA kernel
Follow up pr for https://github.com/vllm-project/vllm/pull/21083
## Test
Unit test:
```bash
(wentao) wentao@H100-GPU17:~/vllm/tests/kernels/quantization$ pytest test_per_token_group_quant.py
==========================================================... | [{"scope": "kernel", "hardware": "H100", "model": null, "shape": "M=32,N=128,gs=64,col_major=0,ue8m0=0,dtype=fp8", "batch_size": 32, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.169, "optimized": 0.011, "stated_speedup": 15.73, "speedup": 15.3636}, {"scope": "kernel", "hardware": "H100", ... | 14.3636 | 1.06 |
vllm | 136d750f5f421ca5be2e24b0a913e813d99bb831 | 2025-07-25T06:53:21-07:00 | 21,556 | https://github.com/vllm-project/vllm/pull/21556 | [Kernel] Improve machete memory bound perf (#21556) | [Kernel] Improve machete memory bound perf (#21556)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com> | csrc/quantization/machete/machete_prepacked_layout.cuh | cuda | Apache-2.0 | #pragma once
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
// clang-format off
// The cutlass include order matters (annoyingly)
#include "cutlass/cutlass.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/epilogue/collective/default_epilogue.... | #pragma once
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
// clang-format off
// The cutlass include order matters (annoyingly)
#include "cutlass/cutlass.h"
#include "cute/tensor.hpp"
#include "cutlass/tensor_ref.h"
#include "cutlass/epilogue/collective/default_epilogue.... | --- csrc/quantization/machete/machete_prepacked_layout.cuh
+++ csrc/quantization/machete/machete_prepacked_layout.cuh
@@ -187,8 +187,12 @@
CUTE_HOST_DEVICE static constexpr auto TVbNbKL_to_offset_copy(
Shape_NKL shape_mkl) {
auto layout = TVbNbKL_to_offset(shape_mkl);
- return make_layout(coalesce(get... | 6 | 2 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/machete/machete_prepacked_layout.cuh).
Goal: [Kernel] Improve machete memory bound perf
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <t... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "MKN=(1x12288x36864), L=1", "batch_size": 1, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 132.8, "optimized": 103.5, "stated_speedup": 1.28, "speedup": 1.2831}, {"scope": "kernel", "hardware": null, "model": null, "shape": "MKN=... | 1.0563 | null |
vllm | 774d0c014b8699d244ba2889d872591ca535b80f | 2025-07-22T10:27:15-04:00 | 21,083 | https://github.com/vllm-project/vllm/pull/21083 | [Perf] Cuda Kernel for Per Token Group Quant (#21083) | [Perf] Cuda Kernel for Per Token Group Quant (#21083)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -296,6 +296,11 @@
void dynamic_scaled_int8_quant(torch::Tensor& out, torch::Tensor const& input,
torch::Tensor& scales,
std::optional<torch::Tensor> const& azp);
+
+void per_token_group_quant_fp8(const torch::Tensor& input... | 5 | 0 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Perf] Cuda Kernel for Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref... | ## Purpose
Add cuda kernel for per-token-group-quant instead of triton
Modified from SGL, https://github.com/sgl-project/sglang/blob/570d33437bf0b4ac42e00ad468ddc43f9e0b376f/sgl-kernel/csrc/gemm/per_token_group_quant_8bit.cu, thanks for the code!
Add support for row-major E8M0, float32 scale tensor, and optimized th... | [] | null | null |
vllm | 774d0c014b8699d244ba2889d872591ca535b80f | 2025-07-22T10:27:15-04:00 | 21,083 | https://github.com/vllm-project/vllm/pull/21083 | [Perf] Cuda Kernel for Per Token Group Quant (#21083) | [Perf] Cuda Kernel for Per Token Group Quant (#21083)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -601,6 +601,15 @@
ops.impl("dynamic_scaled_int8_quant", torch::kCUDA,
&dynamic_scaled_int8_quant);
+ // Compute per-token-group FP8 quantized tensor and scaling factor.
+ ops.def(
+ "per_token_group_fp8_quant(Tensor input, Tensor! output... | 9 | 0 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Perf] Cuda Kernel for Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#inc... | ## Purpose
Add cuda kernel for per-token-group-quant instead of triton
Modified from SGL, https://github.com/sgl-project/sglang/blob/570d33437bf0b4ac42e00ad468ddc43f9e0b376f/sgl-kernel/csrc/gemm/per_token_group_quant_8bit.cu, thanks for the code!
Add support for row-major E8M0, float32 scale tensor, and optimized th... | [] | null | null |
vllm | 774d0c014b8699d244ba2889d872591ca535b80f | 2025-07-22T10:27:15-04:00 | 21,083 | https://github.com/vllm-project/vllm/pull/21083 | [Perf] Cuda Kernel for Per Token Group Quant (#21083) | [Perf] Cuda Kernel for Per Token Group Quant (#21083)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -366,6 +366,7 @@
dtype: Optional[torch.dtype] = None,
column_major_scales: bool = False,
out_q: Optional[torch.Tensor] = None,
+ use_ue8m0: bool = is_blackwell_deep_gemm_use... | 13 | 4 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Perf] Cuda Kernel for Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contribu... | ## Purpose
Add cuda kernel for per-token-group-quant instead of triton
Modified from SGL, https://github.com/sgl-project/sglang/blob/570d33437bf0b4ac42e00ad468ddc43f9e0b376f/sgl-kernel/csrc/gemm/per_token_group_quant_8bit.cu, thanks for the code!
Add support for row-major E8M0, float32 scale tensor, and optimized th... | [] | null | null |
vllm | 4fb56914c5f27ef062e10d44a0f79c6ceab382f9 | 2025-07-22T16:07:44+02:00 | 21,116 | https://github.com/vllm-project/vllm/pull/21116 | [perf] Add fused MLA QKV + strided layernorm (#21116) | [perf] Add fused MLA QKV + strided layernorm (#21116)
Signed-off-by: Mickael Seznec <mickael@mistral.ai>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/layernorm_kernels.cu | cuda | Apache-2.0 | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t>
__global__ void rms_norm_... | #include "type_convert.cuh"
#include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t>
__global__ void rms_norm_... | --- csrc/layernorm_kernels.cu
+++ csrc/layernorm_kernels.cu
@@ -15,15 +15,16 @@
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t>
__global__ void rms_norm_kernel(
- scalar_t* __restrict__ out, // [..., hidden_size]
- const scalar_t* __restrict__ input, // [..., hidden_size... | 40 | 23 | 5 | [
"mistral"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_kernels.cu).
Goal: [perf] Add fused MLA QKV + strided layernorm
Target hardware: unspecified
Target models: mistral
Current file:
```cuda
#include "type_convert.cuh"
#include "dispatch_utils.h"
#include <torch/cuda.h>
#include <c10/cuda/CUDAGuard.h>
#ifndef U... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", "shape": null, "batch_size": null, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 17.1, "optimized": 17.63, "stated_speedup": null, "speedup": 1.031}, {"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", ... | null | 1.0385 |
vllm | 4fb56914c5f27ef062e10d44a0f79c6ceab382f9 | 2025-07-22T16:07:44+02:00 | 21,116 | https://github.com/vllm-project/vllm/pull/21116 | [perf] Add fused MLA QKV + strided layernorm (#21116) | [perf] Add fused MLA QKV + strided layernorm (#21116)
Signed-off-by: Mickael Seznec <mickael@mistral.ai>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/layernorm_quant_kernels.cu | cuda | Apache-2.0 | /*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels in layernorm_kernels.cu, except they
* also produce quantized output directly.
* Currently, only static fp8 quantization is supported.
*/
#include "type_convert.cuh"
#include "quantization/fp8/commo... | /*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels in layernorm_kernels.cu, except they
* also produce quantized output directly.
* Currently, only static fp8 quantization is supported.
*/
#include "type_convert.cuh"
#include "quantization/fp8/commo... | --- csrc/layernorm_quant_kernels.cu
+++ csrc/layernorm_quant_kernels.cu
@@ -23,8 +23,9 @@
// TODO(woosuk): Further optimize this kernel.
template <typename scalar_t, typename fp8_type>
__global__ void rms_norm_static_fp8_quant_kernel(
- fp8_type* __restrict__ out, // [..., hidden_size]
- const scalar... | 25 | 14 | 5 | [
"mistral"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_quant_kernels.cu).
Goal: [perf] Add fused MLA QKV + strided layernorm
Target hardware: unspecified
Target models: mistral
Current file:
```cuda
/*
* This file contains the CUDA kernels for the fused quantized layernorm.
* The kernels correspond to the kernels... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", "shape": null, "batch_size": null, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 17.1, "optimized": 17.63, "stated_speedup": null, "speedup": 1.031}, {"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", ... | null | 1.0385 |
vllm | 4fb56914c5f27ef062e10d44a0f79c6ceab382f9 | 2025-07-22T16:07:44+02:00 | 21,116 | https://github.com/vllm-project/vllm/pull/21116 | [perf] Add fused MLA QKV + strided layernorm (#21116) | [perf] Add fused MLA QKV + strided layernorm (#21116)
Signed-off-by: Mickael Seznec <mickael@mistral.ai>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/quantization/fp8/common.cu | cuda | Apache-2.0 | #include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t, typename fp8_type>
__global__ void scaled_fp8_quant_kernel(fp8_type* __restrict__ out,
... | #include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t, typename fp8_type>
__global__ void scaled_fp8_quant_kernel(fp8_type* __restrict__ out,
... | --- csrc/quantization/fp8/common.cu
+++ csrc/quantization/fp8/common.cu
@@ -88,6 +88,8 @@
torch::Tensor const& input, // [..., d]
torch::Tensor const& scale) // [1]
{
+ TORCH_CHECK(input.is_contiguous());
+ TORCH_CHECK(out.is_contiguous());
int const b... | 4 | 0 | 5 | [
"mistral"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/common.cu).
Goal: [perf] Add fused MLA QKV + strided layernorm
Target hardware: unspecified
Target models: mistral
Current file:
```cuda
#include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", "shape": null, "batch_size": null, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 17.1, "optimized": 17.63, "stated_speedup": null, "speedup": 1.031}, {"scope": "e2e", "hardware": null, "model": "DeepSeek-V3-0324", ... | null | 1.0385 |
vllm | 0ec82edda59aaf5cf3b07aadf4ecce1aa1131add | 2025-07-21T19:19:23+01:00 | 21,079 | https://github.com/vllm-project/vllm/pull/21079 | [perf] Speed up align sum kernels (#21079) | [perf] Speed up align sum kernels (#21079)
Signed-off-by: Himanshu Jaju <hj@mistral.ai> | csrc/moe/moe_align_sum_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
template <typename scalar_t>
__g... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <cub/cub.cuh>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
template ... | --- csrc/moe/moe_align_sum_kernels.cu
+++ csrc/moe/moe_align_sum_kernels.cu
@@ -1,6 +1,7 @@
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
+#include <cub/cub.cuh>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
@@ -19,8 +20,13 @@
int32_t* __restrict__ sorted... | 56 | 17 | 2 | [
"mistral"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_align_sum_kernels.cu).
Goal: [perf] Speed up align sum kernels
Target hardware: unspecified
Target models: mistral
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <AT... | ## Purpose
- Move fill ops inside align sum kernel to reduce bubbles.
- cumsum buffer does not need to be filled with zero.
- we can use blockscan to do the prefix sum
This PR also moves the triton inits into the kernel to make it a fair comparison and also ensure the kernel is usable in the future as a fallback if re... | [] | null | null |
vllm | 0ec82edda59aaf5cf3b07aadf4ecce1aa1131add | 2025-07-21T19:19:23+01:00 | 21,079 | https://github.com/vllm-project/vllm/pull/21079 | [perf] Speed up align sum kernels (#21079) | [perf] Speed up align sum kernels (#21079)
Signed-off-by: Himanshu Jaju <hj@mistral.ai> | vllm/model_executor/layers/fused_moe/moe_align_block_size.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
from vllm import _custom_ops as ops
from vllm.triton_utils import tl, triton
from vllm.utils import cdiv, round_up
@triton.jit
def moe_align_block_size_stage1(
topk... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
from vllm import _custom_ops as ops
from vllm.triton_utils import tl, triton
from vllm.utils import cdiv, round_up
@triton.jit
def moe_align_block_size_stage1(
topk... | --- vllm/model_executor/layers/fused_moe/moe_align_block_size.py
+++ vllm/model_executor/layers/fused_moe/moe_align_block_size.py
@@ -111,6 +111,8 @@
dtype=torch.int32,
device=topk_ids.device)
tokens_per_thread = cdiv(numel, num_experts)
+ sorted_token_ids.fil... | 3 | 4 | 2 | [
"mistral"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/moe_align_block_size.py).
Goal: [perf] Speed up align sum kernels
Target hardware: unspecified
Target models: mistral
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the v... | ## Purpose
- Move fill ops inside align sum kernel to reduce bubbles.
- cumsum buffer does not need to be filled with zero.
- we can use blockscan to do the prefix sum
This PR also moves the triton inits into the kernel to make it a fair comparison and also ensure the kernel is usable in the future as a fallback if re... | [] | null | null |
vllm | 6d0734c562e759fdb7076d762222b3881e62ab1f | 2025-07-19T02:33:01-07:00 | 20,645 | https://github.com/vllm-project/vllm/pull/20645 | [NVIDIA] Add SM100 Flashinfer MoE blockscale fp8 backend for low latency (#20645) | [NVIDIA] Add SM100 Flashinfer MoE blockscale fp8 backend for low latency (#20645)
Signed-off-by: kaixih <kaixih@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Optional
import torch
import vllm.envs as envs
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
fr... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Optional
import torch
import vllm.envs as envs
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
fr... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -28,7 +28,7 @@
from vllm.model_executor.layers.fused_moe.topk_weight_and_reduce import (
TopKWeightAndReduceNoOP)
from vllm.model_executor.layers.fused_moe.utils import (
- _resize_cache, moe_kernel_... | 99 | 1 | 4 | [] | [
"SM100"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [NVIDIA] Add SM100 Flashinfer MoE blockscale fp8 backend for low latency
Target hardware: SM100
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyr... | For [this PR](https://github.com/flashinfer-ai/flashinfer/pull/1212), Flashinfer introduces a new backend for block-wise scaled FP8.
This PR adds support for that backend.
cc. @kushanam @wenscarl @pavanimajety
| [] | null | null |
vllm | dcc6cfb991cd76369aad96e04424f29c8fecdbd8 | 2025-07-19T11:39:51+05:30 | 21,193 | https://github.com/vllm-project/vllm/pull/21193 | [Kernel][Performance] Tweak MoE Batched silu_mul_fp8_quant_deep_gemm kernel (#21193) | [Kernel][Performance] Tweak MoE Batched silu_mul_fp8_quant_deep_gemm kernel (#21193)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Any, Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoE... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Any, Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoE... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -55,6 +55,7 @@
# Meta ---------------------------------------------------------------
BLOCK: tl.constexpr,
+ NUM_STAGES: tl.constexpr,
):
G = H // GROUP_SIZE
@@ -... | 4 | 5 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Kernel][Performance] Tweak MoE Batched silu_mul_fp8_quant_deep_gemm kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-Fil... | ## Purpose
Tweak the `num_warps` and `NUM_STAGES` (num pipeline stages for prefetching) values of the kernel.
Local micro-benchmark numbers:
main:
```
Benchmark: E=256, T=2048, H=7168, group_size=128, repeat=200
tokens=4: quant_silu_mul 0.030ms
tokens=8: quant_silu_mul 0.056ms
tokens=16: quant_silu_mul 0.106m... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "E=256,T=2048,H=7168,group_size=128", "batch_size": 4, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.03, "optimized": 0.017, "stated_speedup": null, "speedup": 1.7647}, {"scope": "kernel", "hardware": null, "model": null, "shap... | 1.9052 | 1.0587 |
vllm | 5780121c95bcba6c3abf45d1a7f3a33b2cb70c23 | 2025-07-17T21:34:43-07:00 | 20,911 | https://github.com/vllm-project/vllm/pull/20911 | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911) | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911)
Signed-off-by: Shixian Cui <shixian@amazon.com>
Co-authored-by: Shixian Cui <shixian@amazon.com> | csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cu | cuda | Apache-2.0 | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "grouped_mm_c3x.cuh"
using namespace cute;
namespace {
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
struct sm90_fp8_config_defa... | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "grouped_mm_c3x.cuh"
using namespace cute;
namespace {
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
struct sm90_fp8_config_defa... | --- csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cu
+++ csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cu
@@ -29,19 +29,36 @@
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
-struct sm90_fp8_config_M16 {
- // M in [1, 16]
+struct sm90_fp8_co... | 37 | 12 | 3 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cu).
Goal: [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "Qwen3-235B", "shape": null, "batch_size": 1, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 111.29, "optimized": 98.36, "stated_speedup": null, "speedup": 1.1315}, {"scope": "e2e", "hardware": null, "model": "Qwen3-30B", "shape": null, "batch_size... | null | 1.0573 |
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