repo stringclasses 3
values | commit stringlengths 40 40 | date stringdate 2023-04-02 02:30:17-0500 2026-10-18 07:42:16-0500 | pr_number int64 20 61.9k ⌀ | pr_url stringlengths 44 53 ⌀ | title stringlengths 8 263 | message stringlengths 8 8k | path stringlengths 10 155 | language stringclasses 4
values | license stringclasses 4
values | before_code stringlengths 160 118k | after_code stringlengths 340 120k | diff stringlengths 149 51k | lines_added int64 0 729 | lines_removed int64 0 488 | files_in_commit int64 1 10 | models_mentioned listlengths 0 4 | hardware_mentioned listlengths 0 16 | speedup_claims listlengths 0 10 | prompt stringlengths 569 119k | pr_body stringlengths 0 24k | gains stringlengths 2 197k | kernel_speedup float64 0.78 150 ⌀ | e2e_speedup float64 0.76 136 ⌀ |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
vllm | 5780121c95bcba6c3abf45d1a7f3a33b2cb70c23 | 2025-07-17T21:34:43-07:00 | 20,911 | https://github.com/vllm-project/vllm/pull/20911 | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911) | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911)
Signed-off-by: Shixian Cui <shixian@amazon.com>
Co-authored-by: Shixian Cui <shixian@amazon.com> | csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cuh | cuda | Apache-2.0 | #pragma once
#include "cutlass/cutlass.h"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/epilogue/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
#include "cutlass_extensions/com... | #pragma once
#include "cutlass/cutlass.h"
#include "cutlass/gemm/collective/collective_builder.hpp"
#include "cutlass/epilogue/collective/collective_builder.hpp"
#include "cutlass/gemm/device/gemm_universal_adapter.h"
#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
#include "cutlass_extensions/com... | --- csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cuh
+++ csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cuh
@@ -22,23 +22,29 @@
using OperatorClass = cutlass::arch::OpClassTensorOp;
using LayoutA = cutlass::layout::RowMajor;
+using LayoutA_Transpose =
+ typename cutlass::layout::LayoutTranspose<LayoutA>:... | 48 | 19 | 3 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/moe/grouped_mm_c3x.cuh).
Goal: [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#pragma once
#include "cutlass/cutlass.h"
#include "cutlass/gemm/collective... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "Qwen3-235B", "shape": null, "batch_size": 1, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 111.29, "optimized": 98.36, "stated_speedup": null, "speedup": 1.1315}, {"scope": "e2e", "hardware": null, "model": "Qwen3-30B", "shape": null, "batch_size... | null | 1.0573 |
vllm | 5780121c95bcba6c3abf45d1a7f3a33b2cb70c23 | 2025-07-17T21:34:43-07:00 | 20,911 | https://github.com/vllm-project/vllm/pull/20911 | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911) | [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm (#20911)
Signed-off-by: Shixian Cui <shixian@amazon.com>
Co-authored-by: Shixian Cui <shixian@amazon.com> | csrc/quantization/cutlass_w8a8/moe/moe_data.cu | cuda | Apache-2.0 | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include <iostream>
constexpr uint64_t THREADS_PER_EXPERT = 512;
__global__ void compute_problem_sizes(const int32_t* __restrict__ topk_ids,
int32_t* problem_sizes1,
... | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include <iostream>
constexpr uint64_t THREADS_PER_EXPERT = 512;
// threshold must match the dispatch logic in run_cutlass_moe_mm_sm90()
constexpr int SWAP_AB_THRESHOLD = 64;
template <bool SWAP_AB>
__global__ void compute_problem_size... | --- csrc/quantization/cutlass_w8a8/moe/moe_data.cu
+++ csrc/quantization/cutlass_w8a8/moe/moe_data.cu
@@ -6,7 +6,10 @@
#include <iostream>
constexpr uint64_t THREADS_PER_EXPERT = 512;
+// threshold must match the dispatch logic in run_cutlass_moe_mm_sm90()
+constexpr int SWAP_AB_THRESHOLD = 64;
+template <bool SW... | 49 | 19 | 3 | [] | [
"SM90"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/moe/moe_data.cu).
Goal: [Perf] Add swap_ab to SM90 FP8 non-block CUTLASS moe grouped gemm
Target hardware: SM90
Target models: unspecified
Current file:
```cuda
#include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
- [ ] (Op... | [{"scope": "e2e", "hardware": null, "model": "Qwen3-235B", "shape": null, "batch_size": 1, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 111.29, "optimized": 98.36, "stated_speedup": null, "speedup": 1.1315}, {"scope": "e2e", "hardware": null, "model": "Qwen3-30B", "shape": null, "batch_size... | null | 1.0573 |
vllm | 9fb2d22032cee577a189f8c4cddd88a3c190cb0c | 2025-07-17T15:56:44+02:00 | 20,762 | https://github.com/vllm-project/vllm/pull/20762 | [Performance] Performance improvements in non-blockwise fp8 CUTLASS MoE (#20762) | [Performance] Performance improvements in non-blockwise fp8 CUTLASS MoE (#20762)
Signed-off-by: ElizaWszola <ewszola@redhat.com> | csrc/moe/moe_permute_unpermute_op.cu | cuda | Apache-2.0 | #include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include "permute_unpermute_kernels/moe_permute_unpermute_kernel.h"
#include "permute_unpermute_kernels/dispatch.h"
#include "core/registration.h"
// moe_permute kernels require at least CUDA 12.0
#if defined(CUDA_VERSION) && (C... | #include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include "permute_unpermute_kernels/moe_permute_unpermute_kernel.h"
#include "permute_unpermute_kernels/dispatch.h"
#include "core/registration.h"
// moe_permute kernels require at least CUDA 12.0
#if defined(CUDA_VERSION) && (C... | --- csrc/moe/moe_permute_unpermute_op.cu
+++ csrc/moe/moe_permute_unpermute_op.cu
@@ -160,6 +160,30 @@
}
}
+template <typename T>
+__global__ void shuffleInputRowsKernelSlow(const T* input,
+ const int32_t* dst2src_map,
+ T* outpu... | 42 | 11 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_permute_unpermute_op.cu).
Goal: [Performance] Performance improvements in non-blockwise fp8 CUTLASS MoE
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAC... | This PR introduces a couple performance improvements to non-blockwise fp8 CUTLASS MoE. The improvements are:
- Bringing back pre-calculation of `ab_strides` and `c_strides`. It had been disabled due to PPLX codepath compatibility issues which are now resolved.
- Faster kernels for shuffling `hidden_states`, input scale... | [] | null | null |
vllm | 42d440c22bc85a95dc457d4a0970507f8e66f0da | 2025-07-12T22:38:45-04:00 | 20,841 | https://github.com/vllm-project/vllm/pull/20841 | [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant (#20841) | [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant (#20841)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/fused_moe/utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from math import prod
from typing import Optional, Union
import torch
from vllm import _custom_ops as ops
from vllm.model_executor.layers.quantization.utils.fp8_utils import (
per_token_group_quant_fp8)
from... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from math import prod
from typing import Optional, Union
import torch
from vllm import _custom_ops as ops
from vllm.model_executor.layers.quantization.utils.fp8_utils import (
per_token_group_quant_fp8)
from... | --- vllm/model_executor/layers/fused_moe/utils.py
+++ vllm/model_executor/layers/fused_moe/utils.py
@@ -15,8 +15,6 @@
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton
from vllm.utils import cdiv
-from vllm.utils.deep_gemm import (is_blackwell_deep_gemm_used,
- ... | 1 | 6 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/utils.py).
Goal: [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyri... | ## Purpose
Follow up for https://github.com/vllm-project/vllm/pull/20087
Use Triton instead of Torch for Per Token Group Quant
## Test
### Accuracy
```bash
VLLM_USE_DEEP_GEMM=1 lm_eval --model vllm --model_args "pretrained=Qwen/Qwen3-30B-A3B-FP8,max_model_len=32768,enforce_eager=True" --trust_remote_code -... | [{"scope": "e2e", "hardware": null, "model": "Qwen3-30B-A3B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 20.7, "optimized": 23.85, "stated_speedup": null, "speedup": 1.1522}, {"scope": "e2e", "hardware": null, "mo... | null | 1.1522 |
vllm | 42d440c22bc85a95dc457d4a0970507f8e66f0da | 2025-07-12T22:38:45-04:00 | 20,841 | https://github.com/vllm-project/vllm/pull/20841 | [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant (#20841) | [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant (#20841)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/quantization/utils/fp8_utils.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Adapted from https://github.com/sgl-project/sglang/pull/2575
import functools
import json
import os
from collections.abc import Sequence
from typing import Any, Callable, Optional, Union
import torch
import v... | --- vllm/model_executor/layers/quantization/utils/fp8_utils.py
+++ vllm/model_executor/layers/quantization/utils/fp8_utils.py
@@ -20,6 +20,7 @@
from vllm.platforms import current_platform
from vllm.triton_utils import tl, triton
from vllm.utils import cdiv, direct_register_custom_op, has_deep_gemm
+from vllm.utils.d... | 12 | 3 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/utils/fp8_utils.py).
Goal: [Perf] Use Triton instead of Torch for DeepGEMM Per Token Group Quant
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrigh... | ## Purpose
Follow up for https://github.com/vllm-project/vllm/pull/20087
Use Triton instead of Torch for Per Token Group Quant
## Test
### Accuracy
```bash
VLLM_USE_DEEP_GEMM=1 lm_eval --model vllm --model_args "pretrained=Qwen/Qwen3-30B-A3B-FP8,max_model_len=32768,enforce_eager=True" --trust_remote_code -... | [{"scope": "e2e", "hardware": null, "model": "Qwen3-30B-A3B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 20.7, "optimized": 23.85, "stated_speedup": null, "speedup": 1.1522}, {"scope": "e2e", "hardware": null, "mo... | null | 1.1522 |
vllm | 0d4891cd03aea5cbc9fe5f0a9ea33b8e32dfee09 | 2025-07-12T02:05:12-04:00 | 20,833 | https://github.com/vllm-project/vllm/pull/20833 | [Bug] Fix DeepGemm for EP low latency case (#20833) | [Bug] Fix DeepGemm for EP low latency case (#20833)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuant... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.config import FusedMoEQuant... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -11,7 +11,8 @@
TopKWeightAndReduceDelegate)
from vllm.model_executor.layers.fused_moe.utils import _resize_cache
from vllm.triton_utils import tl, triton
-from vllm.utils.deep_ge... | 10 | 9 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [Bug] Fix DeepGemm for EP low latency case
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contrib... | ## Purpose
Fix DeepGemm for EP low latency case
## Test
Original:
```bash
(EngineCore_7 pid=1248) File "/app/vllm/vllm/model_executor/layers/fused_moe/modular_kernel.py", line 717, in forward
(EngineCore_7 pid=1248) fused_out = self._maybe_chunk_fused_experts(
(EngineCore_7 pid=1248) ^^^^^^^^^... | [] | null | null |
vllm | d47661f0cd6ce28504a2c03d2d2105521a591f28 | 2025-07-12T01:05:33+09:00 | 20,646 | https://github.com/vllm-project/vllm/pull/20646 | [Kernel] Basic tuned configs for NVFP4 CUTLASS dense GEMM (#20646) | [Kernel] Basic tuned configs for NVFP4 CUTLASS dense GEMM (#20646)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/fp4/nvfp4_scaled_mm_kernels.cu | cuda | Apache-2.0 | /*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless requi... | /*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless requi... | --- csrc/quantization/fp4/nvfp4_scaled_mm_kernels.cu
+++ csrc/quantization/fp4/nvfp4_scaled_mm_kernels.cu
@@ -30,35 +30,40 @@
#include "cutlass/util/packed_stride.hpp"
+#include "core/math.hpp"
+
using namespace cute;
#if defined(CUTLASS_ARCH_MMA_SM100_SUPPORTED)
-// Kernel Perf config
-template <typename T>
-... | 89 | 54 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp4/nvfp4_scaled_mm_kernels.cu).
Goal: [Kernel] Basic tuned configs for NVFP4 CUTLASS dense GEMM
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
*
* Licensed ... | ## Purpose
Refactor the NVFP4 CUTLASS kernel to make it easy to specify new configs and use a few made by running the cutlass profiler. We can certainly do better than this, but it is a starting point.
## Test Plan
Use GEMM bench script from https://github.com/vllm-project/vllm/pull/20578 and manual lm-eval tests
#... | [] | null | null |
vllm | 22dd9c2730dc1124b9d0ac15fff223d0b8d9020b | 2025-07-07T21:08:12+02:00 | 20,308 | https://github.com/vllm-project/vllm/pull/20308 | [Kernel] Optimize Prefill Attention in Unified Triton Attention Kernel (#20308) | [Kernel] Optimize Prefill Attention in Unified Triton Attention Kernel (#20308)
Signed-off-by: Jan van Lunteren <jvl@zurich.ibm.com> | vllm/attention/ops/triton_unified_attention.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import torch
import trito... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import torch
import trito... | --- vllm/attention/ops/triton_unified_attention.py
+++ vllm/attention/ops/triton_unified_attention.py
@@ -145,7 +145,19 @@
mask=query_mask_1,
other=0.0)
- num_blocks = cdiv_fn(seq_len, BLOCK_SIZE)
+ # compute the length of the longest sequence prefix... | 13 | 1 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_unified_attention.py).
Goal: [Kernel] Optimize Prefill Attention in Unified Triton Attention Kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copy... | This PR introduces an optimization to the unified triton attention kernel (#16828 and #19152) that enhances prefill attention performance. The key improvement involves reducing the number of tiles processed during the prefill phase by leveraging the causal mask to skip unnecessary computations. This results in more eff... | [{"scope": "e2e", "hardware": "NVIDIA H100", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": null, "batch_size": 1, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 3874.12, "optimized": 3588.36, "stated_speedup": null, "speedup": 1.0796}, {"scope": "e2e", "hardware": "NVIDIA H100", "mode... | 1.75 | 1.0561 |
vllm | 783921d889f942d6ec121e84d8eaa4704e5e0f27 | 2025-07-04T03:06:24-04:00 | 20,331 | https://github.com/vllm-project/vllm/pull/20331 | [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels (#20331) | [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels (#20331)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/compressed_tensors/int8_quant_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#include "../../dispatch_utils.h"
#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#include <cub/util_type.cuh>
#else
#include <hipcub/hipcub.hpp>
#include <hipcub/util_type.hpp>
#endif
static inline __de... | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#include "../../dispatch_utils.h"
#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#include <cub/util_type.cuh>
#else
#include <hipcub/hipcub.hpp>
#include <hipcub/util_type.hpp>
#endif
static inline __de... | --- csrc/quantization/compressed_tensors/int8_quant_kernels.cu
+++ csrc/quantization/compressed_tensors/int8_quant_kernels.cu
@@ -162,10 +162,11 @@
// calculate for absmax
float thread_max = 0.f;
- for (int i = tid; i < hidden_size; i += stride) {
- const auto v = fabsf(static_cast<float>(row_in[i]));
- ... | 9 | 7 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/compressed_tensors/int8_quant_kernels.cu).
Goal: [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#incl... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/20327
## Test
Tested on H100:
Performance (3% E2E throughput gain):
```bash
vllm bench throughput --model RedHatAI/Meta-Llama-3.1-8B-Instruct-quantized.w8a8 --load-format dummy --input-len 1000 --output-len 100 --max-model-len 32768
# Main
Throughput: 37... | [{"scope": "e2e", "hardware": "H100", "model": "RedHatAI/Meta-Llama-3.1-8B-Instruct-quantized.w8a8", "shape": "input-len=1000,output-len=100,max-model-len=32768", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 37.24, "optimized": 38.38, "stated_speedup": null, "s... | null | 1.0302 |
vllm | 783921d889f942d6ec121e84d8eaa4704e5e0f27 | 2025-07-04T03:06:24-04:00 | 20,331 | https://github.com/vllm-project/vllm/pull/20331 | [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels (#20331) | [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels (#20331)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/vectorization_utils.cuh | cuda | Apache-2.0 | #pragma once
#include "vectorization.cuh"
namespace vllm {
template <int VEC_SIZE, typename InT, typename OutT, typename ScaOp>
struct DefaultVecOp {
ScaOp scalar_op;
__device__ __forceinline__ void operator()(
vec_n_t<OutT, VEC_SIZE>& dst, const vec_n_t<InT, VEC_SIZE>& src) const {
#pragma unroll
for ... | #pragma once
#include "vectorization.cuh"
namespace vllm {
template <int VEC_SIZE, typename InT, typename OutT, typename ScaOp>
struct DefaultVecOp {
ScaOp scalar_op;
__device__ __forceinline__ void operator()(
vec_n_t<OutT, VEC_SIZE>& dst, const vec_n_t<InT, VEC_SIZE>& src) const {
#pragma unroll
for ... | --- csrc/quantization/vectorization_utils.cuh
+++ csrc/quantization/vectorization_utils.cuh
@@ -26,6 +26,26 @@
"VEC_SIZE must be a positive power-of-two");
constexpr int WIDTH = VEC_SIZE * sizeof(InT); // eg: 64 B
uintptr_t addr = reinterpret_cast<uintptr_t>(in);
+
+ // fast path when the whole... | 97 | 0 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/vectorization_utils.cuh).
Goal: [Perf] Optimize Vectorization Utils for Int 8 Quantization Kernels
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
#include "vectorization.cuh"
namespace vllm {
template <int VEC_SI... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/20327
## Test
Tested on H100:
Performance (3% E2E throughput gain):
```bash
vllm bench throughput --model RedHatAI/Meta-Llama-3.1-8B-Instruct-quantized.w8a8 --load-format dummy --input-len 1000 --output-len 100 --max-model-len 32768
# Main
Throughput: 37... | [{"scope": "e2e", "hardware": "H100", "model": "RedHatAI/Meta-Llama-3.1-8B-Instruct-quantized.w8a8", "shape": "input-len=1000,output-len=100,max-model-len=32768", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 37.24, "optimized": 38.38, "stated_speedup": null, "s... | null | 1.0302 |
vllm | 2d7779f888f6443c067e0c36bab808ef6b368221 | 2025-06-27T05:50:09+02:00 | 20,071 | https://github.com/vllm-project/vllm/pull/20071 | [Perf] SM100 FP8 GEMM Optimizations after cutlass_profiler (#20071) | [Perf] SM100 FP8 GEMM Optimizations after cutlass_profiler (#20071)
Signed-off-by: ilmarkov <imarkov@redhat.com>
Co-authored-by: ilmarkov <imarkov@redhat.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
@@ -29,26 +29,12 @@
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
struct sm100_fp8_config_M256 {
- // M ... | 29 | 29 | 1 | [] | [
"SM100"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh).
Goal: [Perf] SM100 FP8 GEMM Optimizations after cutlass_profiler
Target hardware: SM100
Target models: unspecified
Current file:
```cuda
#pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.... | Additional performance optimizations after #19566
Tune CUTLASS configs for M <= 256 using cutlass_profiler insights.
The PR allows to get from 1.12x to 1.5x speedup for certain NxK pairs without affecting performance for the other NxK.
## Cutlass profiler results.
We pick the best configuration that has best perform... | [{"scope": "kernel", "hardware": null, "model": null, "shape": "N=2560,K=8192", "batch_size": 16, "metric": "GFLOPs", "unit": null, "higher_is_better": true, "baseline": 54489.5, "optimized": 54492.3, "stated_speedup": null, "speedup": 1.0001}, {"scope": "kernel", "hardware": null, "model": null, "shape": "N=28672,K=40... | 1.369 | 1.0099 |
vllm | 68aaeb3749eac62d723f2a75c31b65e04ab9fbe6 | 2025-06-23T14:07:47-04:00 | 19,885 | https://github.com/vllm-project/vllm/pull/19885 | [EP+DP] Optimize the little operations in the DeepGEMM + DeepEP low latency case (#19885) | [EP+DP] Optimize the little operations in the DeepGEMM + DeepEP low latency case (#19885)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Signed-off-by: Tyler Michael Smith <tysmith@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com> | vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
import importlib.util
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.utils import (
_resize_cache, per_token_group_quant_fp8)
logger = ini... | # SPDX-License-Identifier: Apache-2.0
import importlib.util
from typing import Optional
import torch
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
from vllm.model_executor.layers.fused_moe.utils import _resize_cache
from vllm.triton_utils import tl, triton
logge... | --- vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
+++ vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py
@@ -6,12 +6,177 @@
import vllm.model_executor.layers.fused_moe.modular_kernel as mk
from vllm.logger import init_logger
-from vllm.model_executor.layers.fused_moe.utils import (
- _... | 170 | 16 | 2 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/batched_deep_gemm_moe.py).
Goal: [EP+DP] Optimize the little operations in the DeepGEMM + DeepEP low latency case
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
impor... | ## Summary
Optimizations when using DeepGEMM + DeepEP (for the decode worker in a P/D setup). On current main, the majority of time is spent in quantize ops, silu-and-mul, and copy operations to put the scales in the layout needed for DeepGEMM.
This PR has two pieces:
1. Set `use_fp8_dispatch` to `True` in DeepEP's ... | [] | null | null |
vllm | ffb2cd6b5441af28da22694a19838a19507a15e1 | 2025-06-17T14:49:26-04:00 | 19,572 | https://github.com/vllm-project/vllm/pull/19572 | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572) | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/moe/moe_align_sum_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
namespace {
__device__ __forcein... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
template <typename scalar_t>
__g... | --- csrc/moe/moe_align_sum_kernels.cu
+++ csrc/moe/moe_align_sum_kernels.cu
@@ -13,232 +13,45 @@
namespace vllm {
namespace moe {
-namespace {
-__device__ __forceinline__ int32_t index(int32_t total_col, int32_t row,
- int32_t col) {
- // don't worry about overflow because n... | 145 | 329 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_align_sum_kernels.cu).
Goal: [Perf] Optimize `moe_align_block_size` CUDA kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/19517
The implementation is taken from https://github.com/sgl-project/sglang/blob/8b5f83ed3b7d2a49ad5c5cd5aa61c5d502f47dbc
Specially thanks to SGL developers!
Notes:
- Only one `moe_align_block_size` kernel now.
- Mark `moe_align_block_size_triton` and `... | [] | null | null |
vllm | ffb2cd6b5441af28da22694a19838a19507a15e1 | 2025-06-17T14:49:26-04:00 | 19,572 | https://github.com/vllm-project/vllm/pull/19572 | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572) | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/moe/moe_ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | --- csrc/moe/moe_ops.h
+++ csrc/moe/moe_ops.h
@@ -12,12 +12,6 @@
int64_t block_size, torch::Tensor sorted_token_ids,
torch::Tensor experts_ids,
torch::Tensor num_tokens_post_pad);
-
-void sgl_moe_align_block_size(torch::Tensor topk_ids, in... | 0 | 6 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/moe_ops.h).
Goal: [Perf] Optimize `moe_align_block_size` CUDA kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/19517
The implementation is taken from https://github.com/sgl-project/sglang/blob/8b5f83ed3b7d2a49ad5c5cd5aa61c5d502f47dbc
Specially thanks to SGL developers!
Notes:
- Only one `moe_align_block_size` kernel now.
- Mark `moe_align_block_size_triton` and `... | [] | null | null |
vllm | ffb2cd6b5441af28da22694a19838a19507a15e1 | 2025-06-17T14:49:26-04:00 | 19,572 | https://github.com/vllm-project/vllm/pull/19572 | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572) | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -21,15 +21,6 @@
" Tensor! experts_ids,"
" Tensor! num_tokens_post_pad) -> ()");
m.impl("moe_align_block_size", torch::kCUDA, &moe_align_block_size);
-
- // temporarily adapted from
- // https://... | 0 | 9 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: [Perf] Optimize `moe_align_block_size` CUDA kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply t... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/19517
The implementation is taken from https://github.com/sgl-project/sglang/blob/8b5f83ed3b7d2a49ad5c5cd5aa61c5d502f47dbc
Specially thanks to SGL developers!
Notes:
- Only one `moe_align_block_size` kernel now.
- Mark `moe_align_block_size_triton` and `... | [] | null | null |
vllm | ffb2cd6b5441af28da22694a19838a19507a15e1 | 2025-06-17T14:49:26-04:00 | 19,572 | https://github.com/vllm-project/vllm/pull/19572 | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572) | [Perf] Optimize `moe_align_block_size` CUDA kernel (#19572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mgoin <mgoin64@gmail.com> | vllm/model_executor/layers/fused_moe/moe_align_block_size.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.triton_utils import tl, triton
from vllm.utils import round_up
def ceil_div(a, b):
return (a ... | # SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
from typing import Optional
import torch
from vllm import _custom_ops as ops
from vllm.triton_utils import tl, triton
from vllm.utils import round_up
def ceil_div(a, b):
return (a + b - 1) // b
@triton.j... | --- vllm/model_executor/layers/fused_moe/moe_align_block_size.py
+++ vllm/model_executor/layers/fused_moe/moe_align_block_size.py
@@ -4,7 +4,6 @@
import torch
-import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.triton_utils import tl, triton
from vllm.utils import round_up
@@ -99,6 +98,7 @@
... | 4 | 24 | 4 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/moe_align_block_size.py).
Goal: [Perf] Optimize `moe_align_block_size` CUDA kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# SPDX-FileCopyrightText: Copyright ... | ## Purpose
Fixes https://github.com/vllm-project/vllm/issues/19517
The implementation is taken from https://github.com/sgl-project/sglang/blob/8b5f83ed3b7d2a49ad5c5cd5aa61c5d502f47dbc
Specially thanks to SGL developers!
Notes:
- Only one `moe_align_block_size` kernel now.
- Mark `moe_align_block_size_triton` and `... | [] | null | null |
vllm | e13945f9dd60260ae8ed42d8d316d48401fe850b | 2025-06-15T02:25:10+02:00 | 19,566 | https://github.com/vllm-project/vllm/pull/19566 | [Perf] Further tunings for SM100 FP8 CUTLASS kernel (#19566) | [Perf] Further tunings for SM100 FP8 CUTLASS kernel (#19566) | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
@@ -15,11 +15,25 @@
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
struct sm100_fp8_config_default {
- //... | 25 | 5 | 1 | [] | [
"SM100"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh).
Goal: [Perf] Further tunings for SM100 FP8 CUTLASS kernel
Target hardware: SM100
Target models: unspecified
Current file:
```cuda
#pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/... | Additional performance optimizations after #18778
Tune CUTLASS configs for M >= 128.
For Llama 8B on B200, these tunings offer a GEMM improvement of:
- 1.13 to 1.32x speedup for M= 128
- up to 1.4x speedup for M=256
- up to 1.2x speedup for M>=512
Kernel benchmarks using #17126 on B200.
`python benchmarks/kernels/b... | [{"scope": "kernel", "hardware": "B200", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": "N=6144,K=4096", "batch_size": 128, "metric": "throughput", "unit": "TFLOP/s", "higher_is_better": true, "baseline": 915.05, "optimized": 1045.85, "stated_speedup": 1.14, "speedup": 1.1429}, {"scope": "kernel", "hardware": "B... | 1.0986 | null |
vllm | 294fc1e2c90a7fc71575c9c9bb1b12cd2b92b495 | 2025-06-14T09:34:28-07:00 | 19,500 | https://github.com/vllm-project/vllm/pull/19500 | [Hardware][NVIDIA][kernel] Fp4 MOE quant kernel optimization (#19500) | [Hardware][NVIDIA][kernel] Fp4 MOE quant kernel optimization (#19500) | csrc/quantization/fp4/nvfp4_experts_quant.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <cuda_runtime.h>
#include <cuda_fp8.h>
template <typename T>
struct TypeConverter {
using Type = half2;
}; // keep for generality
template <>
struct TypeConverter<half2> {
using Type = half;
};
template <>
struc... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <cuda_runtime.h>
#include <cuda_fp8.h>
template <typename T>
struct TypeConverter {
using Type = half2;
}; // keep for generality
template <>
struct TypeConverter<half2> {
using Type = half;
};
template <>
struc... | --- csrc/quantization/fp4/nvfp4_experts_quant.cu
+++ csrc/quantization/fp4/nvfp4_experts_quant.cu
@@ -231,7 +231,7 @@
}
// Use UE4M3 by default.
-template <class Type, bool UE8M0_SF = false>
+template <class Type, bool UE8M0_SF = false, bool SMALL_NUM_EXPERTS = false>
__global__ void
#if defined(__CUDA_ARCH__) &&... | 228 | 50 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp4/nvfp4_experts_quant.cu).
Goal: [Hardware][NVIDIA][kernel] Fp4 MOE quant kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGu... | ## Purpose
Optimize FP4 Quant Kernel in MOE performance on NVIDIA Blackwell GPU
1. Use grid stride layout instead of reach block process 1 row to have better parallelism.
2. If grid size < num of SMs and block size large enough, double grid size and half block size for better parallelism.
3. For small problem size that... | [] | null | null |
vllm | b6efafd9e43fb2ecc18e7789206f11754a50c7d1 | 2025-06-12T09:51:41-04:00 | 19,233 | https://github.com/vllm-project/vllm/pull/19233 | [Perf] Vectorize static / dynamic INT8 quant kernels (#19233) | [Perf] Vectorize static / dynamic INT8 quant kernels (#19233)
Signed-off-by: yewentao256 <zhyanwentao@126.com> | csrc/quantization/compressed_tensors/int8_quant_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#include "../../dispatch_utils.h"
#ifndef USE_ROCM
#include <cub/util_type.cuh>
#include <cub/cub.cuh>
#else
#include <hipcub/util_type.hpp>
#include <hipcub/hipcub.hpp>
#endif
static inline __device__ int8_t float_to_int8_rn(float x)... | #include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#include "../../dispatch_utils.h"
#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#include <cub/util_type.cuh>
#else
#include <hipcub/hipcub.hpp>
#include <hipcub/util_type.hpp>
#endif
static inline __de... | --- csrc/quantization/compressed_tensors/int8_quant_kernels.cu
+++ csrc/quantization/compressed_tensors/int8_quant_kernels.cu
@@ -1,15 +1,17 @@
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
+
#include <cmath>
#include "../../dispatch_utils.h"
+#include "../vectorization_utils.cuh"
#ifndef USE_ROCM
... | 152 | 114 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/compressed_tensors/int8_quant_kernels.cu).
Goal: [Perf] Vectorize static / dynamic INT8 quant kernels
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/all.h>
#include <cmath>
#i... | ## Essential Elements of an Effective PR Description Checklist
- [x] The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
- [x] The test plan, such as providing test command.
- [x] The test results, such as pasting the results comparison before and after, or e2e results
## Motiv... | [{"scope": "e2e", "hardware": "H100", "model": "RedHatAI/Meta-Llama-3.1-8B-Instruct-quantized.w8a8", "shape": "input-len=1000, output-len=100", "batch_size": null, "metric": "total tokens/s", "unit": "tok/s", "higher_is_better": true, "baseline": 38822.03, "optimized": 41685.29, "stated_speedup": null, "speedup": 1.073... | 1.0789 | 1.0941 |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/moe/moe_ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | --- csrc/moe/moe_ops.h
+++ csrc/moe/moe_ops.h
@@ -31,3 +31,7 @@
#endif
bool moe_permute_unpermute_supported();
+
+void shuffle_rows(const torch::Tensor& input_tensor,
+ const torch::Tensor& dst2src_map,
+ torch::Tensor& output_tensor); | 4 | 0 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/moe_ops.h).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/moe/moe_permute_unpermute_op.cu | cuda | Apache-2.0 | #include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include "permute_unpermute_kernels/moe_permute_unpermute_kernel.h"
#include "permute_unpermute_kernels/dispatch.h"
#include "core/registration.h"
// moe_permute kernels require at least CUDA 12.0
#if defined(CUDA_VERSION) && (C... | #include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include "permute_unpermute_kernels/moe_permute_unpermute_kernel.h"
#include "permute_unpermute_kernels/dispatch.h"
#include "core/registration.h"
// moe_permute kernels require at least CUDA 12.0
#if defined(CUDA_VERSION) && (C... | --- csrc/moe/moe_permute_unpermute_op.cu
+++ csrc/moe/moe_permute_unpermute_op.cu
@@ -130,6 +130,62 @@
});
}
+template <typename T>
+__global__ void shuffleInputRowsKernel(const T* input,
+ const int32_t* dst2src_map, T* output,
+ int64_t... | 56 | 0 | 9 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_permute_unpermute_op.cu).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <c10/core/ScalarType.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include "permu... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/moe/permute_unpermute_kernels/dispatch.h | cpp | Apache-2.0 | #pragma once
#include <cuda_fp8.h>
#define MOE_SWITCH(TYPE, ...) \
at::ScalarType _st = ::detail::scalar_type(TYPE); \
switch (_st) { \
__VA_ARGS__ \
default: ... | #pragma once
#include <cuda_fp8.h>
#define MOE_SWITCH(TYPE, ...) \
at::ScalarType _st = ::detail::scalar_type(TYPE); \
switch (_st) { \
__VA_ARGS__ \
default: ... | --- csrc/moe/permute_unpermute_kernels/dispatch.h
+++ csrc/moe/permute_unpermute_kernels/dispatch.h
@@ -14,12 +14,13 @@
__VA_ARGS__(); \
break; \
}
-#define MOE_DISPATCH_FLOAT_CASE(...) \
- MOE... | 12 | 6 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/permute_unpermute_kernels/dispatch.h).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <cuda_fp8.h>
#define MOE_SWITCH(TYPE, ...) ... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -81,6 +81,12 @@
m.def("moe_permute_unpermute_supported() -> bool");
m.impl("moe_permute_unpermute_supported", &moe_permute_unpermute_supported);
+ // Row shuffle for MoE
+ m.def(
+ "shuffle_rows(Tensor input_tensor, Tensor dst2src_map, Te... | 6 | 0 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk ... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -248,7 +248,8 @@
const torch::Tensor& topk_ids, torch::Tensor& expert_offsets,
torch::Tensor& problem_sizes1, torch::Tensor& problem_sizes2,
torch::Tensor& input_permutation, torch::Tensor& output_permutation,
- const int64_t num_experts, const int64_t n, const int64_t... | 2 | 1 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_r... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/quantization/cutlass_w8a8/moe/moe_data.cu | cuda | Apache-2.0 | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include <iostream>
constexpr uint64_t THREADS_PER_EXPERT = 512;
__global__ void compute_problem_sizes(const int* __restrict__ topk_ids,
int32_t* problem_sizes1,
... | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include <iostream>
constexpr uint64_t THREADS_PER_EXPERT = 512;
__global__ void compute_problem_sizes(const int* __restrict__ topk_ids,
int32_t* problem_sizes1,
... | --- csrc/quantization/cutlass_w8a8/moe/moe_data.cu
+++ csrc/quantization/cutlass_w8a8/moe/moe_data.cu
@@ -45,6 +45,23 @@
}
}
+__global__ void compute_expert_blockscale_offsets(
+ const int32_t* __restrict__ problem_sizes1, int32_t* expert_offsets,
+ int32_t* blockscale_offsets, int32_t* atomic_buffer,
+ ... | 31 | 5 | 9 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/moe/moe_data.cu).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include <ios... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/quantization/cutlass_w8a8/scaled_mm_entry.cu | cuda | Apache-2.0 | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass_extensions/common.hpp"
void cutlass_scaled_mm_sm75(torch::Tensor& c, torch::Tensor const& a,
torch::Tensor const& b,
torch::Tensor const& a_scales,
... | #include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "cutlass_extensions/common.hpp"
void cutlass_scaled_mm_sm75(torch::Tensor& c, torch::Tensor const& a,
torch::Tensor const& b,
torch::Tensor const& a_scales,
... | --- csrc/quantization/cutlass_w8a8/scaled_mm_entry.cu
+++ csrc/quantization/cutlass_w8a8/scaled_mm_entry.cu
@@ -54,7 +54,8 @@
const torch::Tensor& topk_ids, torch::Tensor& expert_offsets,
torch::Tensor& problem_sizes1, torch::Tensor& problem_sizes2,
torch::Tensor& input_permutation, torch::Tensor& output... | 6 | 3 | 9 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/scaled_mm_entry.cu).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <cudaTypedefs.h>
#include <c10/cuda/CUDAGuard.h>
#include <torch/all.h>
#include "... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 61059bee40511b6f6c044053cf921da81cf89985 | 2025-06-05T09:48:26-07:00 | 19,110 | https://github.com/vllm-project/vllm/pull/19110 | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110) | [Hardware][NVIDIA] FP4 MoE kernel optimization (#19110)
Signed-off-by: Chiyue Wei <chiyuew@nvidia.com>
Co-authored-by: Chiyue Wei <chiyuew@nvidia.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -450,7 +450,7 @@
" Tensor! problem_sizes1, Tensor! problem_sizes2, "
" Tensor! input_permutation, "
" Tensor! output_permutation, int num_experts, "
- " ... | 1 | 1 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Hardware][NVIDIA] FP4 MoE kernel optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#i... | ## FP4 MoE Kernel Optimization
## Purpose
Optimize FP4 MOE kernel performance on NVIDIA Blackwell GPU via data preparation optimization
- Row shuffle for MoE permute and unpermute: change to CUDA implementation
- Blockscale offset computation: integrate into `get_cutlass_moe_mm_data function` with CUDA implementation
... | [] | null | null |
vllm | 53a5a0ce30dd623808ebd02947e5183f918b6c2f | 2025-06-04T13:46:28-04:00 | 18,778 | https://github.com/vllm-project/vllm/pull/18778 | [Perf] Tunings for SM100 FP8 CUTLASS kernel (#18778) | [Perf] Tunings for SM100 FP8 CUTLASS kernel (#18778)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh | cuda | Apache-2.0 | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | #pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* This file defines Gemm kernel configurations for SM100 (fp8) based on the
* Gemm shape.
*/
namespace vllm {
using c3x::cutlass_gemm_caller;
template <typename InType, typename OutType,
template <typename, typename, typename... | --- csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
+++ csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh
@@ -15,11 +15,40 @@
template <typename InType, typename OutType,
template <typename, typename, typename> typename Epilogue>
struct sm100_fp8_config_default {
+ //... | 51 | 2 | 1 | [] | [
"SM100"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/c3x/scaled_mm_sm100_fp8_dispatch.cuh).
Goal: [Perf] Tunings for SM100 FP8 CUTLASS kernel
Target hardware: SM100
Target models: unspecified
Current file:
```cuda
#pragma once
#include "scaled_mm.cuh"
#include "cutlass_gemm_caller.cuh"
/**
* Th... | I noticed that the FP8 CUTLASS kernel for Blackwell only had one default set of configs. This PR adds new configs for small M < 128.
For Llama 8B on B200, these tunings offer a GEMM improvement of:
* 1.7 to 2.5x speedup at M<64
* 1.1 to 1.3x speedup at 64<=M<128
Accuracy eval:
```
lm_eval --model vllm --model_args pr... | [{"scope": "kernel", "hardware": "B200", "model": "Llama 8B", "shape": "M<64", "batch_size": null, "metric": "speedup", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.7, "speedup": 1.7}, {"scope": "kernel", "hardware": "B200", "model": "Llama 8B", "shape": "M<64", "batc... | 1.6856 | null |
vllm | e31446b6c8d887cdca031abf8527555adee46058 | 2025-06-03T16:48:25-04:00 | 18,844 | https://github.com/vllm-project/vllm/pull/18844 | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844) | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/fp8/common.cu | cuda | Apache-2.0 | #include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t, typename fp8_type>
__global__ void scaled_fp8_quant_kernel(fp8_type* __restrict__ out,
... | #include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
template <typename scalar_t, typename fp8_type>
__global__ void scaled_fp8_quant_kernel(fp8_type* __restrict__ out,
... | --- csrc/quantization/fp8/common.cu
+++ csrc/quantization/fp8/common.cu
@@ -39,8 +39,8 @@
fp8_type* __restrict__ token_output = &out[offset];
// For vectorization, token_input and token_output pointers need to be
- // aligned at 8-byte and 4-byte addresses respectively.
- bool const can_vectorize = hidden_siz... | 19 | 16 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/common.cu).
Goal: [Perf] Tune `scaled_fp8_quant` by increasing vectorization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include "common.cuh"
#include "dispatch_utils.h"
#include <c10/cuda/CUDAGuard.h>
#ifndef USE_ROC... | Increase the vectorization from 4 to 16 elements and decrease the block_size to launch for kernel for the per-tensor and per-token fp8 quantization CUDA kernels. The improvements are visible on H100 and obvious on B200.
### Evaluations
```
# Command for static per-tensor quantization
lm_eval --model vllm --model_args... | [{"scope": "e2e", "hardware": "B200", "model": "Meta-Llama-3.1-8B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 69.24, "optimized": 73.78, "stated_speedup": null, "speedup": 1.0656}, {"scope": "e2e", "hardware": "B... | 1.695 | 1.0673 |
vllm | e31446b6c8d887cdca031abf8527555adee46058 | 2025-06-03T16:48:25-04:00 | 18,844 | https://github.com/vllm-project/vllm/pull/18844 | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844) | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/fp8/common.cuh | cuda | Apache-2.0 | #pragma once
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include <cmath>
#ifdef USE_ROCM
#include "amd/quant_utils.cuh"
#endif
// Determines the preferred FP8 type for the current platform.
// Note that for CUDA this just returns true,
// but on ROCm it will check device props.
st... | #pragma once
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include <cmath>
#ifdef USE_ROCM
#include "amd/quant_utils.cuh"
#endif
// Determines the preferred FP8 type for the current platform.
// Note that for CUDA this just returns true,
// but on ROCm it will check device props.
st... | --- csrc/quantization/fp8/common.cuh
+++ csrc/quantization/fp8/common.cuh
@@ -46,7 +46,7 @@
}
float r =
- fmax(-quant_type_max_v<fp8_type>, fmin(x, quant_type_max_v<fp8_type>));
+ fmaxf(-quant_type_max_v<fp8_type>, fminf(x, quant_type_max_v<fp8_type>));
#ifndef USE_ROCM
return static_cast<fp8_type... | 34 | 32 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/common.cuh).
Goal: [Perf] Tune `scaled_fp8_quant` by increasing vectorization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#includ... | Increase the vectorization from 4 to 16 elements and decrease the block_size to launch for kernel for the per-tensor and per-token fp8 quantization CUDA kernels. The improvements are visible on H100 and obvious on B200.
### Evaluations
```
# Command for static per-tensor quantization
lm_eval --model vllm --model_args... | [{"scope": "e2e", "hardware": "B200", "model": "Meta-Llama-3.1-8B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 69.24, "optimized": 73.78, "stated_speedup": null, "speedup": 1.0656}, {"scope": "e2e", "hardware": "B... | 1.695 | 1.0673 |
vllm | e31446b6c8d887cdca031abf8527555adee46058 | 2025-06-03T16:48:25-04:00 | 18,844 | https://github.com/vllm-project/vllm/pull/18844 | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844) | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/fused_kernels/layernorm_utils.cuh | cuda | Apache-2.0 | #pragma once
/**
* __device__ layernorm utilities.
*/
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include "quant_conversions.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
// has_residual must be true, if residual is no... | #pragma once
/**
* __device__ layernorm utilities.
*/
#include "quantization/vectorization.cuh"
#include "quantization/utils.cuh"
#include "quant_conversions.cuh"
#ifndef USE_ROCM
#include <cub/cub.cuh>
#else
#include <hipcub/hipcub.hpp>
#endif
namespace vllm {
// has_residual must be true, if residual is no... | --- csrc/quantization/fused_kernels/layernorm_utils.cuh
+++ csrc/quantization/fused_kernels/layernorm_utils.cuh
@@ -140,6 +140,7 @@
// sum of squares
float ss = 0.0f;
+ const int VEC_SIZE = 4;
int32_t const num_vec_elems = hidden_size >> 2;
#pragma unroll 4
@@ -147,22 +148,23 @@
vec4_t<scalar_t> in ... | 54 | 53 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fused_kernels/layernorm_utils.cuh).
Goal: [Perf] Tune `scaled_fp8_quant` by increasing vectorization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
/**
* __device__ layernorm utilities.
*/
#include "quantizatio... | Increase the vectorization from 4 to 16 elements and decrease the block_size to launch for kernel for the per-tensor and per-token fp8 quantization CUDA kernels. The improvements are visible on H100 and obvious on B200.
### Evaluations
```
# Command for static per-tensor quantization
lm_eval --model vllm --model_args... | [{"scope": "e2e", "hardware": "B200", "model": "Meta-Llama-3.1-8B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 69.24, "optimized": 73.78, "stated_speedup": null, "speedup": 1.0656}, {"scope": "e2e", "hardware": "B... | 1.695 | 1.0673 |
vllm | e31446b6c8d887cdca031abf8527555adee46058 | 2025-06-03T16:48:25-04:00 | 18,844 | https://github.com/vllm-project/vllm/pull/18844 | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844) | [Perf] Tune `scaled_fp8_quant` by increasing vectorization (#18844)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/quantization/vectorization.cuh | cuda | Apache-2.0 | #pragma once
/**
* __device__ datatypes vectorized by 4
*/
// Include both AMD and NVIDIA fp8 types to avoid circular import
#include <c10/util/Float8_e4m3fnuz.h>
#include <c10/util/Float8_e4m3fn.h>
namespace vllm {
// Vectorization containers
template <typename scalar_t>
struct __align__(8) vec4_t {
scalar_t x;... | #pragma once
/**
* __device__ datatypes vectorized by 4
*/
// Include both AMD and NVIDIA fp8 types to avoid circular import
#include <c10/util/Float8_e4m3fnuz.h>
#include <c10/util/Float8_e4m3fn.h>
namespace vllm {
// Vectorization containers
template <typename scalar_t, size_t vec_size>
struct __align__(vec_size... | --- csrc/quantization/vectorization.cuh
+++ csrc/quantization/vectorization.cuh
@@ -10,23 +10,22 @@
namespace vllm {
// Vectorization containers
-template <typename scalar_t>
-struct __align__(8) vec4_t {
- scalar_t x;
- scalar_t y;
- scalar_t z;
- scalar_t w;
+template <typename scalar_t, size_t vec_size>
+str... | 11 | 12 | 4 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/vectorization.cuh).
Goal: [Perf] Tune `scaled_fp8_quant` by increasing vectorization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#pragma once
/**
* __device__ datatypes vectorized by 4
*/
// Include both AMD and NVIDIA fp... | Increase the vectorization from 4 to 16 elements and decrease the block_size to launch for kernel for the per-tensor and per-token fp8 quantization CUDA kernels. The improvements are visible on H100 and obvious on B200.
### Evaluations
```
# Command for static per-tensor quantization
lm_eval --model vllm --model_args... | [{"scope": "e2e", "hardware": "B200", "model": "Meta-Llama-3.1-8B-FP8", "shape": "input-len=1000,output-len=100", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 69.24, "optimized": 73.78, "stated_speedup": null, "speedup": 1.0656}, {"scope": "e2e", "hardware": "B... | 1.695 | 1.0673 |
vllm | 01c22335baa03dbbc3ae662c76a089ff1c5b5742 | 2025-05-15T15:39:00+02:00 | 18,161 | https://github.com/vllm-project/vllm/pull/18161 | [Kernel] [V1] Fix performance regression for triton unified attention (#18161) | [Kernel] [V1] Fix performance regression for triton unified attention (#18161)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com> | vllm/attention/ops/triton_unified_attention.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import triton
import triton.language as tl
from vllm.logger import init_logger
logger = init... | # SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import triton
import triton.language as tl
from vllm.logger import init_logger
logger = init... | --- vllm/attention/ops/triton_unified_attention.py
+++ vllm/attention/ops/triton_unified_attention.py
@@ -56,11 +56,11 @@
stride_k_cache_0: tl.int64, # int
stride_k_cache_1: tl.int64, # int
stride_k_cache_2: tl.int64, # int
- stride_k_cache_3: tl.int64, # int
+ stride_k_cache_3: tl.constexpr, ... | 2 | 2 | 2 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_unified_attention.py).
Goal: [Kernel] [V1] Fix performance regression for triton unified attention
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burkhard Ringl... | We have observed a pretty severe (~40%) performance regression for the `triton_unified_attention` kernel when moving from triton 3.2 to triton 3.3.
After a lot of investigation, I was able to figure out that it came from [this](https://github.com/triton-lang/triton/pull/5512) commit to Triton. This change reworked th... | [{"scope": "e2e", "hardware": null, "model": null, "shape": null, "batch_size": null, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 37.62, "optimized": 53.64, "stated_speedup": null, "speedup": 1.4258}, {"scope": "e2e", "hardware": null, "model": null, "shape": null, "batch_size... | null | 1.4181 |
vllm | 3e887d2e0c1fcd65efbfe02db8a824c761fe4d41 | 2025-05-03T02:31:55+08:00 | 14,568 | https://github.com/vllm-project/vllm/pull/14568 | permute/unpermute kernel for moe optimization (#14568) | permute/unpermute kernel for moe optimization (#14568)
Signed-off-by: Caleb_Du <Caleb_Du@zju.edu.cn> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -53,7 +53,29 @@
"int size_m, int size_n, int size_k,"
"bool is_full_k, bool use_atomic_add,"
"bool use_fp32_reduce, bool is_zp_float) -> Tensor");
+ m.def(
+ "marlin_gemm_moe(Tensor! a, Tensor! b_q_weights, Tensor! sorted_ids,... | 22 | 0 | 4 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: permute/unpermute kernel for moe optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk s... | `moe_permute` kernel expands and oreders token in activation to gather uncontinuous tokens for each expert. And then call grouped-gemm for moe speedup.
`moe_unpermute` kernel reduces expanded grouped-gemm output and scales with `topk_weight`.
<img width="646" alt="image" src="https://github.com/user-attachments/assets... | [] | null | null |
vllm | 3e887d2e0c1fcd65efbfe02db8a824c761fe4d41 | 2025-05-03T02:31:55+08:00 | 14,568 | https://github.com/vllm-project/vllm/pull/14568 | permute/unpermute kernel for moe optimization (#14568) | permute/unpermute kernel for moe optimization (#14568)
Signed-off-by: Caleb_Du <Caleb_Du@zju.edu.cn> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -854,7 +854,7 @@
gating_output: torch.Tensor,
topk: int,
renormalize: bool,
-) -> Tuple[torch.Tensor, torch.Tensor]:
+) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor]:
assert hidden_sta... | 9 | 10 | 4 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: permute/unpermute kernel for moe optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json... | `moe_permute` kernel expands and oreders token in activation to gather uncontinuous tokens for each expert. And then call grouped-gemm for moe speedup.
`moe_unpermute` kernel reduces expanded grouped-gemm output and scales with `topk_weight`.
<img width="646" alt="image" src="https://github.com/user-attachments/assets... | [] | null | null |
vllm | 188b7f9b8c30b09afb507beca480a1ee7d41c154 | 2025-04-21T22:46:22-05:00 | 15,830 | https://github.com/vllm-project/vllm/pull/15830 | [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830) | [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830)
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com> | csrc/rocm/ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void paged_attention(torch::Tensor& out, torch::Tensor& exp_sums,
torch::Tensor& max_logits, torch::Tensor& tmp_out,
torch::Tensor& query, torch::Tensor& key_cache,
torch::Tensor& value_cache, int64_t num_kv_heads,
... | #pragma once
#include <torch/all.h>
torch::Tensor LLMM1(at::Tensor& in_a, at::Tensor& in_b,
const int64_t rows_per_block);
torch::Tensor wvSplitK(at::Tensor& in_a, at::Tensor& in_b,
const int64_t CuCount);
void wvSplitKQ(at::Tensor& in_a, at::Tensor& in_b, at::Tensor& out_... | --- csrc/rocm/ops.h
+++ csrc/rocm/ops.h
@@ -1,6 +1,15 @@
#pragma once
#include <torch/all.h>
+
+torch::Tensor LLMM1(at::Tensor& in_a, at::Tensor& in_b,
+ const int64_t rows_per_block);
+
+torch::Tensor wvSplitK(at::Tensor& in_a, at::Tensor& in_b,
+ const int64_t CuCount);
+
... | 9 | 0 | 5 | [] | [
"ROCM"
] | [] | Optimize this cpp kernel file from vllm (csrc/rocm/ops.h).
Goal: [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm
Target hardware: ROCM
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
void paged_attention(torch::Tensor& out, torch::Tensor& exp_sums,
... | This PR adds skinny gemms for unquantized linear (bf16 and fp16) op on ROCm to achieve better performance when the batch size is <= 2.
| | bs=2,in=32,out=128,tp=8 | bs=1,in=32,out=128,tp=8 |
| ------------- | --------------- | ----------------- |
| VLLM_USE_ROCM_SKINNY_GEMM=0 | 1.4460096444313726 seconds | 1.411846... | [] | null | null |
vllm | 188b7f9b8c30b09afb507beca480a1ee7d41c154 | 2025-04-21T22:46:22-05:00 | 15,830 | https://github.com/vllm-project/vllm/pull/15830 | [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830) | [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830)
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com> | csrc/rocm/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "rocm/ops.h"
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Tensors require a meta function.
//
// See the following links for de... | #include "core/registration.h"
#include "rocm/ops.h"
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Tensors require a meta function.
//
// See the following links for de... | --- csrc/rocm/torch_bindings.cpp
+++ csrc/rocm/torch_bindings.cpp
@@ -13,6 +13,24 @@
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, rocm_ops) {
// vLLM custom ops for rocm
+
+ // Custom gemm op for matrix-vector multiplication
+ rocm_ops.def(
+ "LLMM1(Tensor in_a, Tensor in_b, int rows_per_block) -> "
+ "... | 18 | 0 | 5 | [] | [
"ROCM"
] | [] | Optimize this cpp kernel file from vllm (csrc/rocm/torch_bindings.cpp).
Goal: [Performance][ROCm] Add skinny gemms for unquantized linear on ROCm
Target hardware: ROCM
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "rocm/ops.h"
// Note on op signatures:
// The X_meta signatur... | This PR adds skinny gemms for unquantized linear (bf16 and fp16) op on ROCm to achieve better performance when the batch size is <= 2.
| | bs=2,in=32,out=128,tp=8 | bs=1,in=32,out=128,tp=8 |
| ------------- | --------------- | ----------------- |
| VLLM_USE_ROCM_SKINNY_GEMM=0 | 1.4460096444313726 seconds | 1.411846... | [] | null | null |
vllm | e9528f6dc614879952aa871fae8df296adcfc559 | 2025-04-11T20:50:50+08:00 | 16,173 | https://github.com/vllm-project/vllm/pull/16173 | [Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173) | [Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173)
Signed-off-by: DefTruth <qiustudent_r@163.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::Tensor weak_ref_tensor(torch::Tensor& tensor) {
// Ensure tensor is on CUDA
if (!tensor.is_cuda()) {
throw std::runtime_error("Tensor must be on CUDA device");
}
// Get the raw data poin... | --- csrc/ops.h
+++ csrc/ops.h
@@ -51,6 +51,15 @@
const int64_t blocksparse_local_blocks,
const int64_t blocksparse_vert_stride, const int64_t blocksparse_block_size,
const int64_t blocksparse_head_sliding_step);
+
+#ifndef USE_ROCM
+void merge_attn_states(torch::Tensor& output,
+ st... | 9 | 0 | 5 | [] | [] | [
"3x"
] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Kernel] support merge_attn_states CUDA kernel, 3x speedup
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
#include <vector>
torch::T... | base on [vllm/attention/ops/triton_merge_attn_states.py](https://github.com/vllm-project/vllm/blob/main/vllm/attention/ops/triton_merge_attn_states.py)
Use CUDA kernel instead of Triton to minimize CPU overhead. Compared to the Triton kernel, the CUDA kernel implemented in this PR can achieve a maximum speedup of over... | [{"scope": "kernel", "hardware": "L20", "model": null, "shape": "tokens=256,heads=16,headsize=128", "batch_size": 256, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.05647, "optimized": 0.01638, "stated_speedup": 3.4475, "speedup": 3.4475}, {"scope": "kernel", "hardware": "L20", "model": nu... | 3.4838 | 1.0084 |
vllm | e9528f6dc614879952aa871fae8df296adcfc559 | 2025-04-11T20:50:50+08:00 | 16,173 | https://github.com/vllm-project/vllm/pull/16173 | [Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173) | [Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173)
Signed-off-by: DefTruth <qiustudent_r@163.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -63,6 +63,21 @@
" int blocksparse_vert_stride, int blocksparse_block_size,"
" int blocksparse_head_sliding_step) -> ()");
ops.impl("paged_attention_v2", torch::kCUDA, &paged_attention_v2);
+
+#ifndef USE_ROCM
+ // Merge attn states
+ //... | 15 | 0 | 5 | [] | [] | [
"3x"
] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Kernel] support merge_attn_states CUDA kernel, 3x speedup
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/l... | base on [vllm/attention/ops/triton_merge_attn_states.py](https://github.com/vllm-project/vllm/blob/main/vllm/attention/ops/triton_merge_attn_states.py)
Use CUDA kernel instead of Triton to minimize CPU overhead. Compared to the Triton kernel, the CUDA kernel implemented in this PR can achieve a maximum speedup of over... | [{"scope": "kernel", "hardware": "L20", "model": null, "shape": "tokens=256,heads=16,headsize=128", "batch_size": 256, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 0.05647, "optimized": 0.01638, "stated_speedup": 3.4475, "speedup": 3.4475}, {"scope": "kernel", "hardware": "L20", "model": nu... | 3.4838 | 1.0084 |
vllm | fb4c7f8ef0163cd12a3368a34691464271c0274d | 2025-03-14T04:42:27+01:00 | 14,431 | https://github.com/vllm-project/vllm/pull/14431 | [Kernel] [V1] Further optimizations to ROCm (Triton) Backend to better handle GQA. (#14431) | [Kernel] [V1] Further optimizations to ROCm (Triton) Backend to better handle GQA. (#14431)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
Co-authored-by: Jan van Lunteren <jvl@zurich.ibm.com>
Co-authored-by: Burkhard Ringlein <ngl@zurich.ibm.com>
Co-authored-by: Chih-Chieh Yang <chih.chieh.yang@ibm.com> | vllm/attention/ops/chunked_prefill_paged_decode.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burkhard Ringlein
# - Jan van Lunteren
# - Thomas Parnell
import torch
import triton
import triton.language as tl
from .prefix_prefill import context_attention_fwd
@triton.jit
def cdiv_fn(x, y):
return (x + y - 1) // y
@triton.jit
def kernel_paged_atten... | # SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burkhard Ringlein <ngl@zurich.ibm.com>
# - Jan van Lunteren <jvl@zurich.ibm.com>
# - Chih-Chieh Yang <chih.chieh.yang@ibm.com>
# - Thomas Parnell <tpa@zurich.ibm.com>
import torch
import triton
import triton.language as tl
from .prefix_prefill import context_a... | --- vllm/attention/ops/chunked_prefill_paged_decode.py
+++ vllm/attention/ops/chunked_prefill_paged_decode.py
@@ -1,9 +1,10 @@
# SPDX-License-Identifier: Apache-2.0
# Authors:
-# - Burkhard Ringlein
-# - Jan van Lunteren
-# - Thomas Parnell
+# - Burkhard Ringlein <ngl@zurich.ibm.com>
+# - Jan van Lunteren <jvl... | 66 | 43 | 1 | [] | [
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/chunked_prefill_paged_decode.py).
Goal: [Kernel] [V1] Further optimizations to ROCm (Triton) Backend to better handle GQA.
Target hardware: ROCM
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# Authors:
# - Burk... | **TLDR:** This PR adds some further optimizations to `chunked_prefill_paged_decode` op to better handle models with GQA. Serving benchmarks using V1 indicate that with these changes, we see a **25% improvement in throughput** for `llama3.1-8b` on an H100 vs. the current Triton implementation. With these changes, the th... | [{"scope": "e2e", "hardware": "H100", "model": "llama3.1-8b", "shape": null, "batch_size": null, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 6991.12, "optimized": 8711.51, "stated_speedup": null, "speedup": 1.2461}, {"scope": "e2e", "hardware": "H100", "model": "llama3.1-8b", "shape":... | null | 1.2465 |
vllm | d0feea31c70f9540a8993c4e96103a03cd935416 | 2025-03-08T00:53:38+08:00 | 14,138 | https://github.com/vllm-project/vllm/pull/14138 | [Kernel] optimize performance of gptq marlin kernel when n is small (#14138) | [Kernel] optimize performance of gptq marlin kernel when n is small (#14138)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com> | csrc/quantization/gptq_marlin/gptq_marlin.cu | cuda | Apache-2.0 | /*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Un... | /*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Un... | --- csrc/quantization/gptq_marlin/gptq_marlin.cu
+++ csrc/quantization/gptq_marlin/gptq_marlin.cu
@@ -538,6 +538,7 @@
int prob_n, // output dimension n
int prob_k, // reduction dimension k
int* locks, // extra global storage for barrier synchronization
+ bool use_atomic_a... | 47 | 17 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/gptq_marlin/gptq_marlin.cu).
Goal: [Kernel] optimize performance of gptq marlin kernel when n is small
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
... | The performance of gptq/awq marlin kernel is low when n is small. The reason is that when n is small, the `barrier_acquire` and `barrier_release` cost too many time.
The case where n is small often occurs during inference using larger tensor parallelism or in some special models. For example, in deepseek-v3 model, th... | [] | null | null |
vllm | d0feea31c70f9540a8993c4e96103a03cd935416 | 2025-03-08T00:53:38+08:00 | 14,138 | https://github.com/vllm-project/vllm/pull/14138 | [Kernel] optimize performance of gptq marlin kernel when n is small (#14138) | [Kernel] optimize performance of gptq marlin kernel when n is small (#14138)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
#include <torch/version.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
/... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -272,7 +272,8 @@
"Tensor b_zeros, Tensor g_idx, Tensor perm, Tensor workspace, "
"int b_q_type, "
"SymInt size_m, SymInt size_n, SymInt size_k, bool is_k_full, "
- "bool has_zp, bool use_fp32_reduce, bool is_zp_float) -> Tensor",
+ ... | 2 | 1 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Kernel] optimize performance of gptq marlin kernel when n is small
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include... | The performance of gptq/awq marlin kernel is low when n is small. The reason is that when n is small, the `barrier_acquire` and `barrier_release` cost too many time.
The case where n is small often occurs during inference using larger tensor parallelism or in some special models. For example, in deepseek-v3 model, th... | [] | null | null |
vllm | 6bd1dd9d2625ac0ac81e8b5c740aa855399990b9 | 2025-03-06T16:39:16+01:00 | 14,152 | https://github.com/vllm-project/vllm/pull/14152 | [Kernel] [V1] Improved performance for V1 Triton (ROCm) backend (#14152) | [Kernel] [V1] Improved performance for V1 Triton (ROCm) backend (#14152) | vllm/attention/ops/prefix_prefill.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# The kernels in this file are adapted from LightLLM's context_attention_fwd:
# https://github.com/ModelTC/lightllm/blob/main/lightllm/models/llama/triton_kernel/context_flashattention_nopad.py
import torch
import triton
import triton.language as tl
from vllm.platforms import cu... | # SPDX-License-Identifier: Apache-2.0
# The kernels in this file are adapted from LightLLM's context_attention_fwd:
# https://github.com/ModelTC/lightllm/blob/main/lightllm/models/llama/triton_kernel/context_flashattention_nopad.py
import torch
import triton
import triton.language as tl
from vllm.platforms import cu... | --- vllm/attention/ops/prefix_prefill.py
+++ vllm/attention/ops/prefix_prefill.py
@@ -64,7 +64,9 @@
BLOCK_DMODEL_PADDED: tl.constexpr, # head size padded to a power of 2
BLOCK_N: tl.constexpr,
SLIDING_WINDOW: tl.constexpr,
+ SKIP_DECODE: tl.constexpr,
):
+
cur_batch = tl... | 13 | 1 | 2 | [] | [
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/prefix_prefill.py).
Goal: [Kernel] [V1] Improved performance for V1 Triton (ROCm) backend
Target hardware: ROCM
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# The kernels in this file are adapted from LightLLM'... | In this PR we target performance improvement for the V1 `ROCmAttentionBackend` (which should be renamed `TritonAttentionBackend` once [this](https://github.com/vllm-project/vllm/pull/14071) PR is merged).
cc @SageMoore
### Performance
All of the below results are for `meta-llama/Llama-3.1-8B-Instruct` on an NVIDI... | [{"scope": "e2e", "hardware": "H100", "model": "meta-llama/Llama-3.1-8B-Instruct", "shape": null, "batch_size": null, "metric": "Request throughput", "unit": "req/s", "higher_is_better": true, "baseline": 9.32, "optimized": 34.03, "stated_speedup": null, "speedup": 3.6513}, {"scope": "e2e", "hardware": "H100", "model":... | null | 3.6527 |
vllm | 19d98e0c7db96713f0e2201649159431177a56e2 | 2025-03-03T16:29:53-05:00 | 13,625 | https://github.com/vllm-project/vllm/pull/13625 | [Kernel] Optimize moe intermediate_cache usage (#13625) | [Kernel] Optimize moe intermediate_cache usage (#13625)
Signed-off-by: mgoin <mgoin64@gmail.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -1240,13 +1240,18 @@
config = get_config_func(M)
- intermediate_cache1 = torch.empty((M, top_k_num, N),
- device=hidden_states.device,
- ... | 11 | 6 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Kernel] Optimize moe intermediate_cache usage
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import jso... | I'm running into OOM issues at long sequence lengths with deepseek r1, so exploring options here (see [o3-mini chat](https://chatgpt.com/share/67b7970b-6858-8009-ab03-288cd37fffdf)). First I tried moving the silu+mul to be an inplace operation via a new kernel `torch.ops._C.silu_and_mul_inplace(intermediate_cache1.view... | [] | null | null |
vllm | 8294773e48a2d5cde4bb48b8607a10c14de6afbf | 2025-02-27T16:14:30-06:00 | 13,718 | https://github.com/vllm-project/vllm/pull/13718 | [core] Perf improvement for DSv3 on AMD GPUs (#13718) | [core] Perf improvement for DSv3 on AMD GPUs (#13718)
Signed-off-by: qli88 <qiang.li2@amd.com> | vllm/attention/ops/triton_decode_attention.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.com/sgl-project/sglang/blob/9f635ea50de920aa507f486daafba26a5b837574/python/sglang/srt/layers/attention/triton_ops/decode_attention.py
# which was originally adapted from
# https://github.com/ModelTC/lightllm/blob/96353e868a840db4d103138caf15ed9dbea... | # SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.com/sgl-project/sglang/blob/9f635ea50de920aa507f486daafba26a5b837574/python/sglang/srt/layers/attention/triton_ops/decode_attention.py
# which was originally adapted from
# https://github.com/ModelTC/lightllm/blob/96353e868a840db4d103138caf15ed9dbea... | --- vllm/attention/ops/triton_decode_attention.py
+++ vllm/attention/ops/triton_decode_attention.py
@@ -178,7 +178,8 @@
page_size,
logit_cap,
):
- BLOCK = 64
+ BLOCK = 64 if not is_hip_ else 8
+
NUM_KV_SPLITS = num_kv_splits
Lk = k_buffer.shape[-1]
Lv = v_buffer.shape[-1]
@@ -188,7 +189,... | 10 | 5 | 2 | [
"deepseek"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_decode_attention.py).
Goal: [core] Perf improvement for DSv3 on AMD GPUs
Target hardware: unspecified
Target models: deepseek
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.com/sgl-project/sglang/blob... | 1. Add GPUs tweaks for AMD; 2. Allow triton-fa for prefill stage in MLA path; 3. Add MoE config for MI300X
| [] | null | null |
vllm | 2344192a55022d84ba3bb8d33b1ec38724f54fed | 2025-02-13T18:43:37-05:00 | 12,850 | https://github.com/vllm-project/vllm/pull/12850 | Optimize moe_align_block_size for deepseek_v3 (#12850) | Optimize moe_align_block_size for deepseek_v3 (#12850)
Signed-off-by: mgoin <mgoin64@gmail.com> | csrc/moe/moe_align_sum_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
namespace {
__device__ __forcein... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <ATen/cuda/Atomic.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
namespace {
__device__ __forcein... | --- csrc/moe/moe_align_sum_kernels.cu
+++ csrc/moe/moe_align_sum_kernels.cu
@@ -198,25 +198,26 @@
}
// taken from
-// https://github.com/sgl-project/sglang/commit/ded9fcd09a43d5e7d5bb31a2bc3e9fc21bf65d2a
+// https://github.com/sgl-project/sglang/commit/cdae77b03dfc6fec3863630550b45bbfc789f957
template <typename sc... | 40 | 18 | 2 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_align_sum_kernels.cu).
Goal: Optimize moe_align_block_size for deepseek_v3
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>... | Ported from https://github.com/sgl-project/sglang/commit/cdae77b03dfc6fec3863630550b45bbfc789f957
Evaluation seems good
```
lm_eval --model vllm --model_args pretrained=/home/vllm-dev/DeepSeek-R1,tensor_parallel_size=8 --trust_remote_code --tasks gsm8k --num_fewshot 5 --batch_size auto
...
vllm (pretrained=/home/vllm-... | [] | null | null |
vllm | 2344192a55022d84ba3bb8d33b1ec38724f54fed | 2025-02-13T18:43:37-05:00 | 12,850 | https://github.com/vllm-project/vllm/pull/12850 | Optimize moe_align_block_size for deepseek_v3 (#12850) | Optimize moe_align_block_size for deepseek_v3 (#12850)
Signed-off-by: mgoin <mgoin64@gmail.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | # SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
fr... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -596,7 +596,7 @@
dtype=torch.int32,
device=topk_ids.device)
if num_experts >= 224:
- if envs.VLLM_ENABLE_MOE_ALIGN_BLOC... | 2 | 1 | 2 | [
"deepseek"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: Optimize moe_align_block_size for deepseek_v3
Target hardware: unspecified
Target models: deepseek
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
"""Fused MoE kernel."""
import functools
import json
im... | Ported from https://github.com/sgl-project/sglang/commit/cdae77b03dfc6fec3863630550b45bbfc789f957
Evaluation seems good
```
lm_eval --model vllm --model_args pretrained=/home/vllm-dev/DeepSeek-R1,tensor_parallel_size=8 --trust_remote_code --tasks gsm8k --num_fewshot 5 --batch_size auto
...
vllm (pretrained=/home/vllm-... | [] | null | null |
vllm | 75e94309e8d8919e0daea041f6cd81a4b8c09060 | 2025-02-04T21:22:24-05:00 | 12,676 | https://github.com/vllm-project/vllm/pull/12676 | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676) | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676)
Signed-off-by: simon-mo <xmo@berkeley.edu>
Signed-off-by: Lucas Wilkinson <lcwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: simon-mo <xmo@ber... | csrc/cache.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | --- csrc/cache.h
+++ csrc/cache.h
@@ -14,6 +14,9 @@
void copy_blocks(std::vector<torch::Tensor> const& key_caches,
std::vector<torch::Tensor> const& value_caches,
const torch::Tensor& block_mapping);
+
+void copy_blocks_mla(std::vector<torch::Tensor> const& kv_caches,
+ ... | 3 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.h).
Goal: [Perf] Mem align KV caches for CUDA devices (MLA perf improvement)
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, tor... | Generally Nvidia hardware likes 256 byte alignment (reasons is foggy due to the blackbox nature of Nvidia hardware), but memory allocated via the CUDA Runtime ensure 256 byte alignment (see https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/#a-sequential-but-misaligned-access-pattern).
This PR aligns KV cache en... | [{"scope": "e2e", "hardware": "H200", "model": "DeepSeek-R1", "shape": "max-model-len=8000,input-len=2000,output-len=1000", "batch_size": 100, "metric": "total tokens/s", "unit": "tok/s", "higher_is_better": true, "baseline": 2289.1, "optimized": 3287.09, "stated_speedup": null, "speedup": 1.436}, {"scope": "e2e", "har... | null | 1.436 |
vllm | 75e94309e8d8919e0daea041f6cd81a4b8c09060 | 2025-02-04T21:22:24-05:00 | 12,676 | https://github.com/vllm-project/vllm/pull/12676 | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676) | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676)
Signed-off-by: simon-mo <xmo@berkeley.edu>
Signed-off-by: Lucas Wilkinson <lcwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: simon-mo <xmo@ber... | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nvidia/quant_utils.cuh"
#endif
#include <algorithm>
#include <cassert>
#i... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nvidia/quant_utils.cuh"
#endif
#include <algorithm>
#include <cassert>
#i... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -46,7 +46,10 @@
char* src_ptr = static_cast<char*>(src.data_ptr());
char* dst_ptr = static_cast<char*>(dst.data_ptr());
- const int64_t block_size_in_bytes = src.element_size() * src[0].numel();
+ // We use the stride instead of numel in case the cache is... | 70 | 12 | 5 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Perf] Mem align KV caches for CUDA devices (MLA perf improvement)
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "... | Generally Nvidia hardware likes 256 byte alignment (reasons is foggy due to the blackbox nature of Nvidia hardware), but memory allocated via the CUDA Runtime ensure 256 byte alignment (see https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/#a-sequential-but-misaligned-access-pattern).
This PR aligns KV cache en... | [{"scope": "e2e", "hardware": "H200", "model": "DeepSeek-R1", "shape": "max-model-len=8000,input-len=2000,output-len=1000", "batch_size": 100, "metric": "total tokens/s", "unit": "tok/s", "higher_is_better": true, "baseline": 2289.1, "optimized": 3287.09, "stated_speedup": null, "speedup": 1.436}, {"scope": "e2e", "har... | null | 1.436 |
vllm | 75e94309e8d8919e0daea041f6cd81a4b8c09060 | 2025-02-04T21:22:24-05:00 | 12,676 | https://github.com/vllm-project/vllm/pull/12676 | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676) | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676)
Signed-off-by: simon-mo <xmo@berkeley.edu>
Signed-off-by: Lucas Wilkinson <lcwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: simon-mo <xmo@ber... | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -450,6 +450,10 @@
"Tensor block_mapping) -> ()");
cache_ops.impl("copy_blocks", torch::kCUDA, ©_blocks);
+ cache_ops.def(
+ "copy_blocks_mla(Tensor(a!)[] kv_caches, Tensor block_mapping) -> ()");
+ cache_ops.impl("copy_blocks_mla", torch:... | 4 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Perf] Mem align KV caches for CUDA devices (MLA perf improvement)
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include ... | Generally Nvidia hardware likes 256 byte alignment (reasons is foggy due to the blackbox nature of Nvidia hardware), but memory allocated via the CUDA Runtime ensure 256 byte alignment (see https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/#a-sequential-but-misaligned-access-pattern).
This PR aligns KV cache en... | [{"scope": "e2e", "hardware": "H200", "model": "DeepSeek-R1", "shape": "max-model-len=8000,input-len=2000,output-len=1000", "batch_size": 100, "metric": "total tokens/s", "unit": "tok/s", "higher_is_better": true, "baseline": 2289.1, "optimized": 3287.09, "stated_speedup": null, "speedup": 1.436}, {"scope": "e2e", "har... | null | 1.436 |
vllm | 75e94309e8d8919e0daea041f6cd81a4b8c09060 | 2025-02-04T21:22:24-05:00 | 12,676 | https://github.com/vllm-project/vllm/pull/12676 | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676) | [Perf] Mem align KV caches for CUDA devices (MLA perf improvement) (#12676)
Signed-off-by: simon-mo <xmo@berkeley.edu>
Signed-off-by: Lucas Wilkinson <lcwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: simon-mo <xmo@ber... | vllm/attention/ops/triton_decode_attention.py | triton | Apache-2.0 | # SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.com/sgl-project/sglang/blob/9f635ea50de920aa507f486daafba26a5b837574/python/sglang/srt/layers/attention/triton_ops/decode_attention.py
# which was originally adapted from
# https://github.com/ModelTC/lightllm/blob/96353e868a840db4d103138caf15ed9dbea... | # SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.com/sgl-project/sglang/blob/9f635ea50de920aa507f486daafba26a5b837574/python/sglang/srt/layers/attention/triton_ops/decode_attention.py
# which was originally adapted from
# https://github.com/ModelTC/lightllm/blob/96353e868a840db4d103138caf15ed9dbea... | --- vllm/attention/ops/triton_decode_attention.py
+++ vllm/attention/ops/triton_decode_attention.py
@@ -204,10 +204,10 @@
Req_to_tokens.stride(0),
q.stride(0),
q.stride(1),
- k_buffer.stride(-2),
- k_buffer.stride(-1),
- v_buffer.stride(-2),
- v_buffer.stride(-1),
... | 8 | 8 | 5 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_decode_attention.py).
Goal: [Perf] Mem align KV caches for CUDA devices (MLA perf improvement)
Target hardware: unspecified
Target models: unspecified
Current file:
```python
# SPDX-License-Identifier: Apache-2.0
# Adapted from
# https://github.co... | Generally Nvidia hardware likes 256 byte alignment (reasons is foggy due to the blackbox nature of Nvidia hardware), but memory allocated via the CUDA Runtime ensure 256 byte alignment (see https://docs.nvidia.com/cuda/cuda-c-best-practices-guide/#a-sequential-but-misaligned-access-pattern).
This PR aligns KV cache en... | [{"scope": "e2e", "hardware": "H200", "model": "DeepSeek-R1", "shape": "max-model-len=8000,input-len=2000,output-len=1000", "batch_size": 100, "metric": "total tokens/s", "unit": "tok/s", "higher_is_better": true, "baseline": 2289.1, "optimized": 3287.09, "stated_speedup": null, "speedup": 1.436}, {"scope": "e2e", "har... | null | 1.436 |
vllm | cabaf4eff3c7df30d785769d5a0a1fa1a1c48a8a | 2025-01-31T02:49:37-05:00 | 12,528 | https://github.com/vllm-project/vllm/pull/12528 | [Attention] MLA decode optimizations (#12528) | [Attention] MLA decode optimizations (#12528)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: simon-mo <xmo@berkeley.edu>
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Co-authored-by: simon-mo <simon.mo@hey.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Zhuoha... | csrc/cache.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | #pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
const torch::Tensor& block_mapping);
// Note: the key_caches and value_caches vectors are constant but
// not the Tensors they contain. The vectors need to be const refs
// ... | --- csrc/cache.h
+++ csrc/cache.h
@@ -28,6 +28,11 @@
const std::string& kv_cache_dtype,
torch::Tensor& k_scale, torch::Tensor& v_scale);
+void concat_and_cache_mla(torch::Tensor& kv_c, torch::Tensor& k_pe,
+ torch::Tensor& kv_cache, ... | 5 | 0 | 7 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.h).
Goal: [Attention] MLA decode optimizations
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
#include <map>
#include <vector>
void swap_blocks(torch::Tensor& src, torch::Tensor& dst,
... | Implements MLA decode optimizations, i.e. computing MQA using latent vectors instead of MHA
Shout-out to @simon-mo for the initial PR: https://github.com/vllm-project/vllm/pull/10927
Shout-out to @tsu-bin for the handy reference: https://github.com/flashinfer-ai/flashinfer/pull/551
Shout-out to [sglang](https://github... | [] | null | null |
vllm | cabaf4eff3c7df30d785769d5a0a1fa1a1c48a8a | 2025-01-31T02:49:37-05:00 | 12,528 | https://github.com/vllm-project/vllm/pull/12528 | [Attention] MLA decode optimizations (#12528) | [Attention] MLA decode optimizations (#12528)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: simon-mo <xmo@berkeley.edu>
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Co-authored-by: simon-mo <simon.mo@hey.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Zhuoha... | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nvidia/quant_utils.cuh"
#endif
#include <algorithm>
#include <cassert>
#i... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#ifdef USE_ROCM
#include "quantization/fp8/amd/quant_utils.cuh"
#else
#include "quantization/fp8/nvidia/quant_utils.cuh"
#endif
#include <algorithm>
#include <cassert>
#i... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -245,6 +245,51 @@
}
}
}
+
+template <typename scalar_t, typename cache_t, Fp8KVCacheDataType kv_dt>
+__global__ void concat_and_cache_mla_kernel(
+ const scalar_t* __restrict__ kv_c, // [num_tokens, kv_lora_rank]
+ const scalar_t* __restrict__ k_pe,... | 95 | 0 | 7 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Attention] MLA decode optimizations
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispa... | Implements MLA decode optimizations, i.e. computing MQA using latent vectors instead of MHA
Shout-out to @simon-mo for the initial PR: https://github.com/vllm-project/vllm/pull/10927
Shout-out to @tsu-bin for the handy reference: https://github.com/flashinfer-ai/flashinfer/pull/551
Shout-out to [sglang](https://github... | [] | null | null |
vllm | cabaf4eff3c7df30d785769d5a0a1fa1a1c48a8a | 2025-01-31T02:49:37-05:00 | 12,528 | https://github.com/vllm-project/vllm/pull/12528 | [Attention] MLA decode optimizations (#12528) | [Attention] MLA decode optimizations (#12528)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: simon-mo <xmo@berkeley.edu>
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Co-authored-by: simon-mo <simon.mo@hey.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Zhuoha... | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -463,6 +463,15 @@
cache_ops.impl("reshape_and_cache_flash", torch::kCUDA,
&reshape_and_cache_flash);
+ // Concat kv_c and k_pe and cache them.
+ cache_ops.def(
+ "concat_and_cache_mla(Tensor kv_c, Tensor k_pe,"
+ " ... | 9 | 0 | 7 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Attention] MLA decode optimizations
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on ... | Implements MLA decode optimizations, i.e. computing MQA using latent vectors instead of MHA
Shout-out to @simon-mo for the initial PR: https://github.com/vllm-project/vllm/pull/10927
Shout-out to @tsu-bin for the handy reference: https://github.com/flashinfer-ai/flashinfer/pull/551
Shout-out to [sglang](https://github... | [] | null | null |
vllm | 750f4cabfac4bfed679d95074d9550b043e3f8d5 | 2025-01-21T08:42:16+08:00 | 12,222 | https://github.com/vllm-project/vllm/pull/12222 | [Kernel] optimize moe_align_block_size for cuda graph and large num_experts (e.g. DeepSeek-V3) (#12222) | [Kernel] optimize moe_align_block_size for cuda graph and large num_experts (e.g. DeepSeek-V3) (#12222)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: Michael Goin <mgoin@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com> | csrc/moe/moe_align_sum_kernels.cu | cuda | Apache-2.0 | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <THC/THCAtomics.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
namespace {
__device__ __forceinli... | #include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <ATen/ATen.h>
#include <THC/THCAtomics.cuh>
#include "../cuda_compat.h"
#include "../dispatch_utils.h"
#define CEILDIV(x, y) (((x) + (y) - 1) / (y))
namespace vllm {
namespace moe {
namespace {
__device__ __forceinli... | --- csrc/moe/moe_align_sum_kernels.cu
+++ csrc/moe/moe_align_sum_kernels.cu
@@ -21,7 +21,7 @@
}
} // namespace
-template <typename scalar_t>
+template <typename scalar_t, typename token_cnts_t>
__global__ void moe_align_block_size_kernel(scalar_t* __restrict__ topk_ids,
... | 57 | 36 | 1 | [
"deepseek"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/moe/moe_align_sum_kernels.cu).
Goal: [Kernel] optimize moe_align_block_size for cuda graph and large num_experts (e.g. DeepSeek-V3)
Target hardware: unspecified
Target models: deepseek
Current file:
```cuda
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
#inclu... | The `moe_align_block_size` is used by many moe models (e.g. DeepSeek-V3) but it is not compliable with cuda graph now, and its efficiency is relatively low when `num_experts` is high.
This PR optimizes `moe_align_block_size` from three aspects:
1. Replace `cudaMalloc` with `torch::empty`, so that we can enable cuda g... | [{"scope": "e2e", "hardware": null, "model": "DeepSeek-V3", "shape": null, "batch_size": null, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 5.4, "optimized": 10.5, "stated_speedup": null, "speedup": 1.9444}, {"scope": "e2e", "hardware": null, "model": "DeepSeek-V3", "shape": null, "bat... | null | 1.5572 |
vllm | 526de822d501c792b051c864ba873a836d78d5bf | 2025-01-08T14:23:15-06:00 | 11,698 | https://github.com/vllm-project/vllm/pull/11698 | [Kernel][Triton][AMD] Use block size heuristic for avg 2.8x speedup for int8 models (#11698) | [Kernel][Triton][AMD] Use block size heuristic for avg 2.8x speedup for int8 models (#11698)
Signed-off-by: Randall Smith <Randall.Smith@amd.com> | vllm/model_executor/layers/quantization/compressed_tensors/triton_scaled_mm.py | triton | Apache-2.0 | from typing import Optional, Type
import torch
import triton
import triton.language as tl
def is_weak_contiguous(x: torch.Tensor):
strides = x.stride()
sizes = x.shape
is_not_transpose = strides[0] == 1 and (strides[1] >= max(1, sizes[0]))
is_transpose = strides[1] == 1 and (strides[0] >= max(1, size... | from typing import Optional, Type
import torch
import triton
import triton.language as tl
def is_weak_contiguous(x: torch.Tensor):
strides = x.stride()
sizes = x.shape
is_not_transpose = strides[0] == 1 and (strides[1] >= max(1, sizes[0]))
is_transpose = strides[1] == 1 and (strides[0] >= max(1, size... | --- vllm/model_executor/layers/quantization/compressed_tensors/triton_scaled_mm.py
+++ vllm/model_executor/layers/quantization/compressed_tensors/triton_scaled_mm.py
@@ -128,7 +128,8 @@
bias: Optional[torch.Tensor] = None,
block_size_m: int = 32,
block_s... | 16 | 1 | 1 | [] | [] | [
"2.8x"
] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/compressed_tensors/triton_scaled_mm.py).
Goal: [Kernel][Triton][AMD] Use block size heuristic for avg 2.8x speedup for int8 models
Target hardware: unspecified
Target models: unspecified
Current file:
```python
from typing import Opti... | Use the heuristic from scaled_mm_c3x_sm90_int8_dispatch.cuh:116 to choose block-size for triton_scaled_mm instead of always using 32x32x32 for better performance. This results in average 2.8x speedup.
I ran:
python benchmarks/benchmark_latency.py --dtype bfloat16 --enable-chunked-prefill False --load-format dummy --... | [{"scope": "kernel", "hardware": null, "model": "Qwen2-7B-Instruct-quantized.w8a8", "shape": "input_len=128,output_len=128", "batch_size": 1, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 1.4206, "optimized": 0.9828, "stated_speedup": 1.4453, "speedup": 1.4455}, {"scope": "kernel", "hardware... | 2.1307 | null |
vllm | 869579a702cb086cca6bd6ec4500f954a9adec1c | 2025-01-08T01:04:28+08:00 | 11,750 | https://github.com/vllm-project/vllm/pull/11750 | [optimization] remove python function call for custom op (#11750) | [optimization] remove python function call for custom op (#11750)
Signed-off-by: youkaichao <youkaichao@gmail.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.model_executor.layers.quantiza... | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, List, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.model_executor.layers.quantiza... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -753,7 +753,8 @@
use_int8_w8a16=use_int8_w8a16,
block_shape=block_shape)
- ops.silu_and_mul(intermediate_cache2, intermediate_cache1.v... | 2 | 1 | 3 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [optimization] remove python function call for custom op
Target hardware: unspecified
Target models: unspecified
Current file:
```python
"""Fused MoE kernel."""
import functools
import json
import os
from typing impo... | in eager mode, every layer needs to call the `silu_and_mul` python function, and it seems redundant. we can bypass the function call directly to reduce overhead.
| [] | null | null |
vllm | 59449095ab536febe9ff341b2a88a4fed572a70f | 2024-10-24T17:37:52-05:00 | 9,384 | https://github.com/vllm-project/vllm/pull/9384 | [Performance][Kernel] Fused_moe Performance Improvement (#9384) | [Performance][Kernel] Fused_moe Performance Improvement (#9384)
Signed-off-by: charlifu <charlifu@amd.com> | csrc/moe/moe_ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
| #pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
void moe_sum(torch::Tensor& input, torch::Tensor& output);
void moe_align_block_size(torch::Tensor t... | --- csrc/moe/moe_ops.h
+++ csrc/moe/moe_ops.h
@@ -5,3 +5,10 @@
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
torch::Tensor& token_expert_indices,
torch::Tensor& gating_output);
+
+void moe_sum(torch::Tensor& input, torch::Tensor& output);
+
+void moe_... | 7 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/moe_ops.h).
Goal: [Performance][Kernel] Fused_moe Performance Improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/all.h>
void topk_softmax(torch::Tensor& topk_weights, torch::Tensor& topk_indices,
... | This PR tries to improve the performance of vllm fuse moe layer by:
- Increase the thread number of `moe_align_block_size_kernel` to warp size.
- Replace `torch.sum` with customized `moe_sum`.
- Move `moe_align_block_size_kernels.cu` to `moe/moe_align_sum_kernels.cu`.
Motivations:
- `moe_align_block_size_kernel` only ... | [] | null | null |
vllm | 59449095ab536febe9ff341b2a88a4fed572a70f | 2024-10-24T17:37:52-05:00 | 9,384 | https://github.com/vllm-project/vllm/pull/9384 | [Performance][Kernel] Fused_moe Performance Improvement (#9384) | [Performance][Kernel] Fused_moe Performance Improvement (#9384)
Signed-off-by: charlifu <charlifu@amd.com> | csrc/moe/torch_bindings.cpp | cpp | Apache-2.0 | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | #include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Apply topk softmax to the gating outputs.
m.def(
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torc... | --- csrc/moe/torch_bindings.cpp
+++ csrc/moe/torch_bindings.cpp
@@ -7,6 +7,20 @@
"topk_softmax(Tensor! topk_weights, Tensor! topk_indices, Tensor! "
"token_expert_indices, Tensor gating_output) -> ()");
m.impl("topk_softmax", torch::kCUDA, &topk_softmax);
+
+ // Calculate the result of moe by summing ... | 14 | 0 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/moe/torch_bindings.cpp).
Goal: [Performance][Kernel] Fused_moe Performance Improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "core/registration.h"
#include "moe_ops.h"
TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, m) {
// Ap... | This PR tries to improve the performance of vllm fuse moe layer by:
- Increase the thread number of `moe_align_block_size_kernel` to warp size.
- Replace `torch.sum` with customized `moe_sum`.
- Move `moe_align_block_size_kernels.cu` to `moe/moe_align_sum_kernels.cu`.
Motivations:
- `moe_align_block_size_kernel` only ... | [] | null | null |
vllm | 59449095ab536febe9ff341b2a88a4fed572a70f | 2024-10-24T17:37:52-05:00 | 9,384 | https://github.com/vllm-project/vllm/pull/9384 | [Performance][Kernel] Fused_moe Performance Improvement (#9384) | [Performance][Kernel] Fused_moe Performance Improvement (#9384)
Signed-off-by: charlifu <charlifu@amd.com> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attention_v1(
torch::Tensor& out, torch::Tensor& query, torch::Tensor& key_cache,
torch::Tensor& value_cache, int64_t num_kv_heads, double scale,
torch::Tensor& block_tables, torch::Tensor& seq_lens, in... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attention_v1(
torch::Tensor& out, torch::Tensor& query, torch::Tensor& key_cache,
torch::Tensor& value_cache, int64_t num_kv_heads, double scale,
torch::Tensor& block_tables, torch::Tensor& seq_lens, in... | --- csrc/ops.h
+++ csrc/ops.h
@@ -145,11 +145,6 @@
torch::Tensor& out, torch::Tensor const& input, torch::Tensor& scale,
c10::optional<torch::Tensor> const& scale_ub);
-void moe_align_block_size(torch::Tensor topk_ids, int64_t num_experts,
- int64_t block_size, torch::Tensor sorted_... | 0 | 5 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Performance][Kernel] Fused_moe Performance Improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attention_v1(
t... | This PR tries to improve the performance of vllm fuse moe layer by:
- Increase the thread number of `moe_align_block_size_kernel` to warp size.
- Replace `torch.sum` with customized `moe_sum`.
- Move `moe_align_block_size_kernels.cu` to `moe/moe_align_sum_kernels.cu`.
Motivations:
- `moe_align_block_size_kernel` only ... | [] | null | null |
vllm | 59449095ab536febe9ff341b2a88a4fed572a70f | 2024-10-24T17:37:52-05:00 | 9,384 | https://github.com/vllm-project/vllm/pull/9384 | [Performance][Kernel] Fused_moe Performance Improvement (#9384) | [Performance][Kernel] Fused_moe Performance Improvement (#9384)
Signed-off-by: charlifu <charlifu@amd.com> | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -336,15 +336,6 @@
ops.impl("dynamic_per_token_scaled_fp8_quant", torch::kCUDA,
&dynamic_per_token_scaled_fp8_quant);
- // Aligning the number of tokens to be processed by each expert such
- // that it is divisible by the block size.
- ops.de... | 0 | 9 | 5 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Performance][Kernel] Fused_moe Performance Improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/libr... | This PR tries to improve the performance of vllm fuse moe layer by:
- Increase the thread number of `moe_align_block_size_kernel` to warp size.
- Replace `torch.sum` with customized `moe_sum`.
- Move `moe_align_block_size_kernels.cu` to `moe/moe_align_sum_kernels.cu`.
Motivations:
- `moe_align_block_size_kernel` only ... | [] | null | null |
vllm | 59449095ab536febe9ff341b2a88a4fed572a70f | 2024-10-24T17:37:52-05:00 | 9,384 | https://github.com/vllm-project/vllm/pull/9384 | [Performance][Kernel] Fused_moe Performance Improvement (#9384) | [Performance][Kernel] Fused_moe Performance Improvement (#9384)
Signed-off-by: charlifu <charlifu@amd.com> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.platforms import current_platform
l... | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Callable, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm.envs as envs
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.platforms import current_platform
l... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -589,9 +589,8 @@
use_fp8_w8a8=use_fp8_w8a8,
use_int8_w8a16=use_int8_w8a16)
- torch.sum(intermediate_cache3.view(*intermediate_cache3.s... | 2 | 3 | 5 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Performance][Kernel] Fused_moe Performance Improvement
Target hardware: unspecified
Target models: unspecified
Current file:
```python
"""Fused MoE kernel."""
import functools
import json
import os
from typing impor... | This PR tries to improve the performance of vllm fuse moe layer by:
- Increase the thread number of `moe_align_block_size_kernel` to warp size.
- Replace `torch.sum` with customized `moe_sum`.
- Move `moe_align_block_size_kernels.cu` to `moe/moe_align_sum_kernels.cu`.
Motivations:
- `moe_align_block_size_kernel` only ... | [] | null | null |
vllm | ec4aaad8124baadc7954e30c612ca9444b22d7e7 | 2024-09-21T04:20:54-05:00 | 8,646 | https://github.com/vllm-project/vllm/pull/8646 | [Kernel][Triton][AMD] Remove tl.atomic_add from awq_gemm_kernel, 2-5x speedup MI300, minor improvement for MI250 (#8646) | [Kernel][Triton][AMD] Remove tl.atomic_add from awq_gemm_kernel, 2-5x speedup MI300, minor improvement for MI250 (#8646) | vllm/model_executor/layers/quantization/awq_triton.py | triton | Apache-2.0 | import torch
import triton
import triton.language as tl
AWQ_TRITON_SUPPORTED_GROUP_SIZES = [-1, 32, 64, 128]
@triton.jit
def awq_dequantize_kernel(
qweight_ptr, # quantized matrix
scales_ptr, # scales, per group
zeros_ptr, # zeros, per group
group_size, # Should always be one of t... | import torch
import triton
import triton.language as tl
AWQ_TRITON_SUPPORTED_GROUP_SIZES = [-1, 32, 64, 128]
@triton.jit
def awq_dequantize_kernel(
qweight_ptr, # quantized matrix
scales_ptr, # scales, per group
zeros_ptr, # zeros, per group
group_size, # Should always be one of t... | --- vllm/model_executor/layers/quantization/awq_triton.py
+++ vllm/model_executor/layers/quantization/awq_triton.py
@@ -209,12 +209,9 @@
c = accumulator.to(c_ptr.type.element_ty)
offs_cm = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
offs_cn = pid_n * BLOCK_SIZE_N + tl.arange(0, BLOCK_SIZE_N)
- c... | 7 | 6 | 1 | [] | [
"MI300"
] | [
"5x"
] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/awq_triton.py).
Goal: [Kernel][Triton][AMD] Remove tl.atomic_add from awq_gemm_kernel, 2-5x speedup MI300, minor improvement for MI250
Target hardware: MI300
Target models: unspecified
Current file:
```python
import torch
import trito... | The use of tl.atomic_add in the awq_gemm kernel causes massive slow-down on MI300. Removing the use of tl.atomic_add improves performance significantly for MI300. Very minor improvement for MI250. No slow-downs anywhere else.
python benchmarks/benchmark_throughput.py --input-len 2048 --output-len 128 --quantizatio... | [{"scope": "e2e", "hardware": "MI300", "model": "Qwen2-7B-Instruct-AWQ", "shape": "input-len=2048,output-len=128", "batch_size": 64, "metric": "latency", "unit": "seconds", "higher_is_better": false, "baseline": 45.12445065683375, "optimized": 9.295287762085596, "stated_speedup": null, "speedup": 4.8546}, {"scope": "e2... | null | 1.7195 |
vllm | 9db52eab3dc0b7b2cf30fa4399d569131e90c2d4 | 2024-09-06T17:26:09-05:00 | 8,248 | https://github.com/vllm-project/vllm/pull/8248 | [Kernel] [Triton] Memory optimization for awq_gemm and awq_dequantize, 2x throughput (#8248) | [Kernel] [Triton] Memory optimization for awq_gemm and awq_dequantize, 2x throughput (#8248) | vllm/model_executor/layers/quantization/awq_triton.py | triton | Apache-2.0 | import torch
import triton
import triton.language as tl
AWQ_TRITON_SUPPORTED_GROUP_SIZES = [-1, 32, 64, 128]
@triton.jit
def awq_dequantize_kernel(
qweight_ptr, # quantized matrix
scales_ptr, # scales, per group
zeros_ptr, # zeros, per group
group_size, # Should always be one of t... | import torch
import triton
import triton.language as tl
AWQ_TRITON_SUPPORTED_GROUP_SIZES = [-1, 32, 64, 128]
@triton.jit
def awq_dequantize_kernel(
qweight_ptr, # quantized matrix
scales_ptr, # scales, per group
zeros_ptr, # zeros, per group
group_size, # Should always be one of t... | --- vllm/model_executor/layers/quantization/awq_triton.py
+++ vllm/model_executor/layers/quantization/awq_triton.py
@@ -22,7 +22,7 @@
# Compute offsets and masks for qweight_ptr.
offsets_y = pid_y * BLOCK_SIZE_Y + tl.arange(0, BLOCK_SIZE_Y)
- offsets_x = pid_x * BLOCK_SIZE_X + tl.arange(0, BLOCK_SIZE_X *... | 23 | 11 | 1 | [] | [] | [
"2x"
] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/quantization/awq_triton.py).
Goal: [Kernel] [Triton] Memory optimization for awq_gemm and awq_dequantize, 2x throughput
Target hardware: unspecified
Target models: unspecified
Current file:
```python
import torch
import triton
import triton.langua... | This optimization reduces the number of loads from memory that the awq_gemm and awq_dequantize need to do, resulting in 2x throughput from previous implementation. The following benchmark is attached:
python benchmarks/benchmark_throughput.py --input-len 2048 --output-len 128 --quantization awq --model /models/Qwen/Qw... | [{"scope": "e2e", "hardware": null, "model": "Qwen2-7B-Instruct-AWQ", "shape": "input-len=2048, output-len=128", "batch_size": null, "metric": "throughput", "unit": "requests/s", "higher_is_better": true, "baseline": 6.14, "optimized": 12.77, "stated_speedup": null, "speedup": 2.0798}, {"scope": "e2e", "hardware": null... | null | 2.081 |
vllm | 5288c06aa03b100eab4f873452b65da941a1a232 | 2024-08-20T09:09:33-04:00 | 7,174 | https://github.com/vllm-project/vllm/pull/7174 | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | csrc/cuda_utils.h | cpp | Apache-2.0 | #pragma once
int64_t get_device_attribute(int64_t attribute, int64_t device_id);
int64_t get_max_shared_memory_per_block_device_attribute(int64_t device_id);
| #pragma once
#if defined(__CUDACC__) || defined(_NVHPC_CUDA)
#define HOST_DEVICE_INLINE __forceinline__ __host__ __device__
#define DEVICE_INLINE __forceinline__ __device__
#define HOST_INLINE __forceinline__ __host__
#else
#define HOST_DEVICE_INLINE inline
#define DEVICE_INLINE inline
#define HOST_INLINE ... | --- csrc/cuda_utils.h
+++ csrc/cuda_utils.h
@@ -1,4 +1,14 @@
#pragma once
+
+#if defined(__CUDACC__) || defined(_NVHPC_CUDA)
+ #define HOST_DEVICE_INLINE __forceinline__ __host__ __device__
+ #define DEVICE_INLINE __forceinline__ __device__
+ #define HOST_INLINE __forceinline__ __host__
+#else
+ #define HOST_DEVIC... | 10 | 0 | 4 | [] | [
"HOPPER"
] | [] | Optimize this cpp kernel file from vllm (csrc/cuda_utils.h).
Goal: [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel
Target hardware: HOPPER
Target models: unspecified
Current file:
```cpp
#pragma once
int64_t get_device_attribute(int64_t attribute, int64_t device_id);
int64_t get_max_shared_m... | ## Description
This PR introduces a spiritual successor to the Marlin kernel but optimized for Hopper architectures and based off of cutlass. This PR just adds the kernel implementation, unit tests and benchmarking scripts. End2end integration will come in a future PR.
## Motivation
The motivation for this kernel is... | [] | null | null |
vllm | 5288c06aa03b100eab4f873452b65da941a1a232 | 2024-08-20T09:09:33-04:00 | 7,174 | https://github.com/vllm-project/vllm/pull/7174 | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attention_v1(
torch::Tensor& out, torch::Tensor& query, torch::Tensor& key_cache,
torch::Tensor& value_cache, int64_t num_kv_heads, double scale,
torch::Tensor& block_tables, torch::Tensor& seq_lens, in... | #pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attention_v1(
torch::Tensor& out, torch::Tensor& query, torch::Tensor& key_cache,
torch::Tensor& value_cache, int64_t num_kv_heads, double scale,
torch::Tensor& block_tables, torch::Tensor& seq_lens, in... | --- csrc/ops.h
+++ csrc/ops.h
@@ -82,6 +82,25 @@
torch::Tensor marlin_gemm(torch::Tensor& a, torch::Tensor& b_q_weight,
torch::Tensor& b_scales, torch::Tensor& workspace,
int64_t size_m, int64_t size_n, int64_t size_k);
+
+namespace machete {
+
+std::vector<std::st... | 19 | 0 | 4 | [] | [
"HOPPER"
] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel
Target hardware: HOPPER
Target models: unspecified
Current file:
```cpp
#pragma once
#include <optional>
#include <torch/library.h>
#include "core/scalar_type.hpp"
void paged_attentio... | ## Description
This PR introduces a spiritual successor to the Marlin kernel but optimized for Hopper architectures and based off of cutlass. This PR just adds the kernel implementation, unit tests and benchmarking scripts. End2end integration will come in a future PR.
## Motivation
The motivation for this kernel is... | [] | null | null |
vllm | 5288c06aa03b100eab4f873452b65da941a1a232 | 2024-08-20T09:09:33-04:00 | 7,174 | https://github.com/vllm-project/vllm/pull/7174 | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel (#7174) | csrc/torch_bindings.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include <torch/library.h>
// Note on op signatures:
// The X_meta signatures are for the meta functions corresponding to op X.
// They must be kept in sync with the signature for X. Generally, only
// functions that return Ten... | --- csrc/torch_bindings.cpp
+++ csrc/torch_bindings.cpp
@@ -133,6 +133,21 @@
ops.def("gptq_marlin_24_gemm", &gptq_marlin_24_gemm);
ops.impl("gptq_marlin_24_gemm", torch::kCUDA, &gptq_marlin_24_gemm);
+ // Machete (Dense) Optimized Mixed Precision GEMM for Hopper.
+ ops.def("machete_supported_schedules", &mach... | 15 | 0 | 4 | [] | [
"HOPPER"
] | [] | Optimize this cpp kernel file from vllm (csrc/torch_bindings.cpp).
Goal: [Kernel] (1/N) Machete - Hopper Optimized Mixed Precision Linear Kernel
Target hardware: HOPPER
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include "core/registration.h"
#include ... | ## Description
This PR introduces a spiritual successor to the Marlin kernel but optimized for Hopper architectures and based off of cutlass. This PR just adds the kernel implementation, unit tests and benchmarking scripts. End2end integration will come in a future PR.
## Motivation
The motivation for this kernel is... | [] | null | null |
vllm | 35e9c12bfaf8f273281af897b7208dfba53f103c | 2024-07-31T17:40:32-04:00 | 6,996 | https://github.com/vllm-project/vllm/pull/6996 | [Kernel] Tuned int8 Cutlass Kernels for SM75 (T4) (#6996) | [Kernel] Tuned int8 Cutlass Kernels for SM75 (T4) (#6996)
Co-authored-by: Varun Sundar Rabindranath <varun@neuralmagic.com> | csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu | cuda | Apache-2.0 | #include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_fp8_dispatch.cuh"
#include "scaled_mm_c2x_sm89_int8_dispatch.cuh"
/*
This file defines quantized GEMM operations using the CUTLASS 2.x API, fo... | #include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm75_dispatch.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_fp8_dispatch.cuh"
#include "scaled_mm_c2x_sm89_int8_dispatch.cuh"
/*
This file defines quantized GE... | --- csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
+++ csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
@@ -3,6 +3,7 @@
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
+#include "scaled_mm_c2x_sm75_dispatch.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_fp8_dispatch.cuh"
#... | 4 | 11 | 1 | [] | [
"SM75"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu).
Goal: [Kernel] Tuned int8 Cutlass Kernels for SM75 (T4)
Target hardware: SM75
Target models: unspecified
Current file:
```cuda
#include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cu... | Add tuned Int8 kernels for SM75 (T4)
- Added 4 unique Gemm configs to stratify Gemm shapes along the M dimensions.
- Perf. Takeaways:
- M in [1, 64] - 20% speedup
- M in (64, 128] - Same as main
- M in (128, 256] - You will see upto 3% perf. drop for some Gemm shapes. But the PR chooses a better holistic c... | [{"scope": "kernel", "hardware": "T4", "model": "meta-llama/Llama-2-7b-hf-TP1", "shape": "MKN=(1x4096x12288)", "batch_size": null, "metric": "latency", "unit": "us", "higher_is_better": false, "baseline": 349.3, "optimized": 276.7, "stated_speedup": null, "speedup": 1.2624}, {"scope": "kernel", "hardware": "T4", "model... | 1.1572 | null |
vllm | af647fb8b3ea9d910f7d1bc104af8986d048a8e2 | 2024-07-29T22:24:58-04:00 | 6,848 | https://github.com/vllm-project/vllm/pull/6848 | [Kernel] Tuned int8 kernels for Ada Lovelace (#6848) | [Kernel] Tuned int8 kernels for Ada Lovelace (#6848)
Co-authored-by: Varun Sundar Rabindranath <varun@neuralmagic.com> | csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu | cuda | Apache-2.0 | #include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_dispatch.cuh"
/*
This file defines quantized GEMM operations using the CUTLASS 2.x API, for
NVIDIA GPUs with SM versions prior to sm90 (Hop... | #include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_fp8_dispatch.cuh"
#include "scaled_mm_c2x_sm89_int8_dispatch.cuh"
/*
This file defines quantized GEMM operations using the CUTLASS 2.x API, fo... | --- csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
+++ csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
@@ -4,7 +4,8 @@
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
-#include "scaled_mm_c2x_sm89_dispatch.cuh"
+#include "scaled_mm_c2x_sm89_fp8_dispatch.cuh"
+#include "scaled_mm_c2x_sm89_in... | 10 | 17 | 1 | [] | [
"ADA"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu).
Goal: [Kernel] Tuned int8 kernels for Ada Lovelace
Target hardware: ADA
Target models: unspecified
Current file:
```cuda
#include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#in... | Add tuned Int8 kernels for Ada Lovelace
- Added 8 unique Gemm configs to stratify Gemm shapes along the M and N dimensions.
Numbers:
GPU : L40S x 1
Command : `python3 benchmarks/cutlass_benchmarks/w8a8_benchmarks.py --dtype int8 model_bench --batch-size {1,16,32,64,128,256,512}`
<google-sheets-html-origin><style t... | [] | null | null |
vllm | 766435e660a786933392eb8ef0a873bc38cf0c8b | 2024-07-29T11:42:35-04:00 | 6,677 | https://github.com/vllm-project/vllm/pull/6677 | [Kernel] Tuned FP8 Kernels for Ada Lovelace (#6677) | [Kernel] Tuned FP8 Kernels for Ada Lovelace (#6677)
Co-authored-by: Varun Sundar Rabindranath <varun@neuralmagic.com> | csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu | cuda | Apache-2.0 | #include <stddef.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
// clang-format will break include orders
// clang-format off
#include "cute/tensor.hpp"
#include "cute/atom/mma_atom.hpp"
#include "cutlass/numeric_types.h"
#include "cutlass/util/device_memory.h"
#include "cutlass/cutlass.h"
#include "c... | #include <stddef.h>
#include <torch/all.h>
#include "cutlass/cutlass.h"
#include "scaled_mm_c2x.cuh"
#include "scaled_mm_c2x_sm80_dispatch.cuh"
#include "scaled_mm_c2x_sm89_dispatch.cuh"
/*
This file defines quantized GEMM operations using the CUTLASS 2.x API, for
NVIDIA GPUs with SM versions prior to sm90 (Hop... | --- csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
+++ csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu
@@ -1,469 +1,15 @@
#include <stddef.h>
#include <torch/all.h>
+#include "cutlass/cutlass.h"
-#include <ATen/cuda/CUDAContext.h>
-
-// clang-format will break include orders
-// clang-format off
-#include "cute/te... | 34 | 488 | 1 | [] | [
"ADA"
] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/cutlass_w8a8/scaled_mm_c2x.cu).
Goal: [Kernel] Tuned FP8 Kernels for Ada Lovelace
Target hardware: ADA
Target models: unspecified
Current file:
```cuda
#include <stddef.h>
#include <torch/all.h>
#include <ATen/cuda/CUDAContext.h>
// clang-format will break... | - Tune SM89 cutlass FP8 kernels for performance.
- Refactor/Cleanup cutlass2x kernel code.
- High-level performance takeaways
- Good performance speedups for M <= 16
- `llama2-7b` :
- min speedup 0.77x. max speed up 4.8x.
- Number of Gemm shapes with perf. under 1.0x - 11 / 28
- Number of Gemm s... | [{"scope": "e2e", "hardware": "L40S", "model": "Meta-Llama-3-8B-Instruct-FP8", "shape": null, "batch_size": null, "metric": "output token throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 201.95, "optimized": 200.13, "stated_speedup": null, "speedup": 0.991}, {"scope": "e2e", "hardware": "L40S", "mode... | 1.049 | 1.0644 |
vllm | 3a434b07edc42a7466fb1ac536f3beb9470f9416 | 2024-06-03T20:06:59-07:00 | 4,921 | https://github.com/vllm-project/vllm/pull/4921 | [Kernel] Enhance MoE benchmarking & tuning script (#4921) | [Kernel] Enhance MoE benchmarking & tuning script (#4921) | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm._moe_C as moe_kernels
from vllm import _custom_ops as ops
from vllm.logger import init_logger
logger = init_logger(__name__)
@triton.jit
d... | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
import vllm._moe_C as moe_kernels
from vllm import _custom_ops as ops
from vllm.logger import init_logger
logger = init_logger(__name__)
@triton.jit
d... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -308,6 +308,30 @@
return None
+def get_default_config(
+ M: int,
+ E: int,
+ N: int,
+ K: int,
+ topk: int,
+ dtype: Optional[str],
+) -> Dict[str, int]:
+ config = {
+ 'BL... | 27 | 14 | 1 | [] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Kernel] Enhance MoE benchmarking & tuning script
Target hardware: unspecified
Target models: unspecified
Current file:
```python
"""Fused MoE kernel."""
import functools
import json
import os
from typing import Any,... | This PR is to enhance the MoE tuning & benchmarking script which is a bit hacky at the moment. Also, the PR enables using multiple GPUs for benchmarking via Ray.
| [] | null | null |
vllm | 606625329648e6eff1883e23040adfad82f219cf | 2024-05-23T02:39:27-04:00 | 4,983 | https://github.com/vllm-project/vllm/pull/4983 | Marlin 24 prefill performance improvement (about 25% better on average) (#4983) | Marlin 24 prefill performance improvement (about 25% better on average) (#4983) | csrc/quantization/marlin/sparse/marlin_24_cuda_kernel.cu | cuda | Apache-2.0 | /*
* Notice: This file was modified by Neuralmagic inc to include 8-bit support
*
* Copyright (C) 2024 Roberto Lopez Castro (roberto.lopez.castro@udc.es). All
* Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
... | /*
* Notice: This file was modified by Neuralmagic inc to include 8-bit support
*
* Copyright (C) 2024 Roberto Lopez Castro (roberto.lopez.castro@udc.es). All
* Rights Reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
... | --- csrc/quantization/marlin/sparse/marlin_24_cuda_kernel.cu
+++ csrc/quantization/marlin/sparse/marlin_24_cuda_kernel.cu
@@ -48,12 +48,12 @@
// than 1 warp per schedule allows some more latency hiding. At the same time,
// we want relatively few warps to have many registers per warp and small tiles.
static constexp... | 40 | 15 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/marlin/sparse/marlin_24_cuda_kernel.cu).
Goal: Marlin 24 prefill performance improvement (about 25% better on average)
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Notice: This file was modified by Neuralmagic inc to in... | This PR introduces performance improvement to marlin_24's prefill (large batch) performance. The key fix is to ensure that the matmul instructions happen concurrently with the async global => shared memory load phase. Before that, the code was first waiting for the async stage to finish and only then ran the matmul, wh... | [] | null | null |
vllm | b5853f99639afd82cb18f131dce7f8c41eda74bd | 2024-05-16T13:46:52-04:00 | 4,845 | https://github.com/vllm-project/vllm/pull/4845 | [ROCm][AMD][Bugfix] adding a missing triton autotune config (#4845) | [ROCm][AMD][Bugfix] adding a missing triton autotune config (#4845) | vllm/attention/ops/triton_flash_attention.py | triton | Apache-2.0 | #!/usr/bin/env python
"""
Fused Attention
===============
This is a Triton implementation of the Flash Attention v2 algorithm from Tri Dao
(https://tridao.me/publications/flash2/flash2.pdf)
Credits: OpenAI kernel team, AMD ML Frameworks Triton team
Features supported:
1) Fwd with causal masking
2) Any sequence lengt... | #!/usr/bin/env python
"""
Fused Attention
===============
This is a Triton implementation of the Flash Attention v2 algorithm from Tri Dao
(https://tridao.me/publications/flash2/flash2.pdf)
Credits: OpenAI kernel team, AMD ML Frameworks Triton team
Features supported:
1) Fwd with causal masking
2) Any sequence lengt... | --- vllm/attention/ops/triton_flash_attention.py
+++ vllm/attention/ops/triton_flash_attention.py
@@ -238,6 +238,16 @@
},
num_stages=1,
num_warps=8,
+ ),
+ triton.Config(
+ {
+ "BLOCK_M": 128,
+ "BLOCK_N": 64,
+ ... | 10 | 0 | 1 | [] | [
"ROCM"
] | [] | Optimize this triton kernel file from vllm (vllm/attention/ops/triton_flash_attention.py).
Goal: [ROCm][AMD][Bugfix] adding a missing triton autotune config
Target hardware: ROCM
Target models: unspecified
Current file:
```python
#!/usr/bin/env python
"""
Fused Attention
===============
This is a Triton implementati... | Vinayak Gokhale @vgokhale found that there is a missing triton autotune config in vllm, but was added to triton repo at some point of time.
This small change however causes a series of cascading events which results in autotune picking a different config - the one that didn't exist in vllm. Without it, vllm's autotune... | [] | null | null |
vllm | e288df0632d5bdde76c20bed8310b46d35b8e5ac | 2024-05-08T20:14:31-04:00 | 4,626 | https://github.com/vllm-project/vllm/pull/4626 | [Bugfix] Fine-tune gptq_marlin configs to be more similar to marlin (#4626) | [Bugfix] Fine-tune gptq_marlin configs to be more similar to marlin (#4626) | csrc/quantization/gptq_marlin/gptq_marlin.cu | cuda | Apache-2.0 | /*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Un... | /*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Un... | --- csrc/quantization/gptq_marlin/gptq_marlin.cu
+++ csrc/quantization/gptq_marlin/gptq_marlin.cu
@@ -115,7 +115,8 @@
return res;
}
-// Constructs destination register by taking bytes from 2 sources (based on mask)
+// Constructs destination register by taking bytes from 2 sources (based on
+// mask)
template <i... | 35 | 13 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/gptq_marlin/gptq_marlin.cu).
Goal: [Bugfix] Fine-tune gptq_marlin configs to be more similar to marlin
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Modified by Neural Magic
* Copyright (C) Marlin.2024 Elias Frantar
*
... | test_gptq_marlin.py compares "gptq" outputs vs "gptq_marlin" outputs. However, sometimes, they can diverge a bit in their outputs. This PR ensures gptq_marlin uses more similar K/N breakdown configs to the original marlin to make the output more similar to gptq.
| [] | null | null |
vllm | 20cfcdec998b39f5dbb0dc89efe4122f95f5cb16 | 2024-05-08T12:07:05-07:00 | 4,659 | https://github.com/vllm-project/vllm/pull/4659 | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | csrc/cache.h | cpp | Apache-2.0 | #pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
torch::Tensor& block_... | #pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const torch::Tensor& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
const torch::Tensor& block_mapping... | --- csrc/cache.h
+++ csrc/cache.h
@@ -8,12 +8,12 @@
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
- const std::map<int64_t, int64_t>& block_mapping);
+ const torch::Tensor& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
-... | 2 | 2 | 9 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.h).
Goal: [Core][Optimization] change python dict to pytorch tensor for blocks to swap
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torc... | Continue after https://github.com/vllm-project/vllm/pull/4607 .
| [] | null | null |
vllm | 20cfcdec998b39f5dbb0dc89efe4122f95f5cb16 | 2024-05-08T12:07:05-07:00 | 4,659 | https://github.com/vllm-project/vllm/pull/4659 | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#if defined(ENABLE_FP8_E5M2)
#include "quantization/fp8_e5m2_kvcache/quant_utils.cuh"
#elif defined(ENABLE_FP8_E4M3)
#include "quantization/fp8/amd_detail/quant_utils.cuh... | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#if defined(ENABLE_FP8_E5M2)
#include "quantization/fp8_e5m2_kvcache/quant_utils.cuh"
#elif defined(ENABLE_FP8_E4M3)
#include "quantization/fp8/amd_detail/quant_utils.cuh... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -23,7 +23,7 @@
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
- const std::map<int64_t, int64_t>& block_mapping) {
+ const torch::Tensor& block_mapping) {
torch::Device src_device = src.device();
torch::Device dst_device = dst.device();
... | 11 | 5 | 9 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Core][Optimization] change python dict to pytorch tensor for blocks to swap
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuar... | Continue after https://github.com/vllm-project/vllm/pull/4607 .
| [] | null | null |
vllm | 20cfcdec998b39f5dbb0dc89efe4122f95f5cb16 | 2024-05-08T12:07:05-07:00 | 4,659 | https://github.com/vllm-project/vllm/pull/4659 | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | [Core][Optimization] change python dict to pytorch tensor for blocks to swap (#4659) | csrc/cpu/cache.cpp | cpp | Apache-2.0 | #include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
void copy_blocks_cpu_impl(
std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
const torch::Tensor& mapping_pairs,
const int element_num_per_block, const int layer_num) {
... | #include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
void copy_blocks_cpu_impl(
std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
const torch::Tensor& mapping_pairs,
const int element_num_per_block, const int layer_num) {
... | --- csrc/cpu/cache.cpp
+++ csrc/cpu/cache.cpp
@@ -83,7 +83,7 @@
void copy_blocks(std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
- torch::Tensor& block_mapping) {
+ const torch::Tensor& block_mapping) {
int num_layers = key_caches... | 2 | 2 | 9 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/cache.cpp).
Goal: [Core][Optimization] change python dict to pytorch tensor for blocks to swap
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
voi... | Continue after https://github.com/vllm-project/vllm/pull/4607 .
| [] | null | null |
vllm | 63575bc2e197b85ce1c911421ff30c5459e35e9c | 2024-05-06T21:30:27-07:00 | 4,607 | https://github.com/vllm-project/vllm/pull/4607 | [Core][Optimization] change python dict to pytorch tensor (#4607) | [Core][Optimization] change python dict to pytorch tensor (#4607) | csrc/cache.h | cpp | Apache-2.0 | #pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
const std::map<int64_... | #pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
torch::Tensor& block_... | --- csrc/cache.h
+++ csrc/cache.h
@@ -13,7 +13,7 @@
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
- const std::map<int64_t, std::vector<int64_t>>& block_mapping);
+ torch::Tensor& block_mapping);
void reshape_and_cache(
torch::Tensor& key, | 1 | 1 | 10 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.h).
Goal: [Core][Optimization] change python dict to pytorch tensor
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
t... | Prior to this PR, `blocks_to_copy` uses `Dict[int, List[int]]` type in Python, and convert to `std::map<int64_t, std::vector<int64_t>>&` in c++ . Although the type contains a reference `&` , it is actually a copy. Inside the cpp code, we convert the data into pytorch array.
In distributed setting, the cost is even lar... | [] | null | null |
vllm | 63575bc2e197b85ce1c911421ff30c5459e35e9c | 2024-05-06T21:30:27-07:00 | 4,607 | https://github.com/vllm-project/vllm/pull/4607 | [Core][Optimization] change python dict to pytorch tensor (#4607) | [Core][Optimization] change python dict to pytorch tensor (#4607) | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#if defined(ENABLE_FP8_E5M2)
#include "quantization/fp8_e5m2_kvcache/quant_utils.cuh"
#elif defined(ENABLE_FP8_E4M3)
#include "quantization/fp8/amd_detail/quant_utils.cuh... | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
#if defined(ENABLE_FP8_E5M2)
#include "quantization/fp8_e5m2_kvcache/quant_utils.cuh"
#elif defined(ENABLE_FP8_E4M3)
#include "quantization/fp8/amd_detail/quant_utils.cuh... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -97,7 +97,7 @@
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
- const std::map<int64_t, std::vector<int64_t>>& block_mapping) {
+ torch::Tensor& block_mapping) {
int num_layers = key_caches.size();
... | 5 | 15 | 10 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: [Core][Optimization] change python dict to pytorch tensor
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "cud... | Prior to this PR, `blocks_to_copy` uses `Dict[int, List[int]]` type in Python, and convert to `std::map<int64_t, std::vector<int64_t>>&` in c++ . Although the type contains a reference `&` , it is actually a copy. Inside the cpp code, we convert the data into pytorch array.
In distributed setting, the cost is even lar... | [] | null | null |
vllm | 63575bc2e197b85ce1c911421ff30c5459e35e9c | 2024-05-06T21:30:27-07:00 | 4,607 | https://github.com/vllm-project/vllm/pull/4607 | [Core][Optimization] change python dict to pytorch tensor (#4607) | [Core][Optimization] change python dict to pytorch tensor (#4607) | csrc/cpu/cache.cpp | cpp | Apache-2.0 | #include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
void copy_blocks_cpu_impl(
std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
const std::vector<std::pair<int64_t, int64_t>> mapping_pairs,
const int element_num_per_block,... | #include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
void copy_blocks_cpu_impl(
std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
const torch::Tensor& mapping_pairs,
const int element_num_per_block, const int layer_num) {
... | --- csrc/cpu/cache.cpp
+++ csrc/cpu/cache.cpp
@@ -8,16 +8,16 @@
void copy_blocks_cpu_impl(
std::vector<torch::Tensor> &key_caches,
std::vector<torch::Tensor> &value_caches,
- const std::vector<std::pair<int64_t, int64_t>> mapping_pairs,
+ const torch::Tensor& mapping_pairs,
const int element_num_p... | 6 | 14 | 10 | [] | [
"CPU"
] | [] | Optimize this cpp kernel file from vllm (csrc/cpu/cache.cpp).
Goal: [Core][Optimization] change python dict to pytorch tensor
Target hardware: CPU
Target models: unspecified
Current file:
```cpp
#include <map>
#include <vector>
#include "cpu_types.hpp"
namespace {
template <typename scalar_t>
void copy_blocks_cpu_i... | Prior to this PR, `blocks_to_copy` uses `Dict[int, List[int]]` type in Python, and convert to `std::map<int64_t, std::vector<int64_t>>&` in c++ . Although the type contains a reference `&` , it is actually a copy. Inside the cpp code, we convert the data into pytorch array.
In distributed setting, the cost is even lar... | [] | null | null |
vllm | 12628d3c787efd3483aaa74b5ae4175b28fd5805 | 2024-04-26T21:49:59-07:00 | 4,343 | https://github.com/vllm-project/vllm/pull/4343 | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343) | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343)
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu> | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | --- csrc/ops.h
+++ csrc/ops.h
@@ -146,7 +146,12 @@
torch::Tensor q_perm,
int bit);
-void scaled_fp8_quant(
+void static_scaled_fp8_quant(
+ torch::Tensor& out,
+ torch::Tensor& input,
+ torch::Tensor& scale);
+
+void dynamic_scaled_fp8_quant(
torch::Tensor& out,
torch::Tensor& input,
torch::Tensor& ... | 6 | 1 | 5 | [
"mixtral"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales
Target hardware: unspecified
Target models: mixtral
Current file:
```cpp
#pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& quer... | This PR contains the performance improvements mentioned in https://github.com/vllm-project/vllm/pull/4244
The performance numbers are as follows (TP2, H100) -- with mistralai/Mixtral-8x7B-Instruct-v0.1:
<img width="681" alt="Screenshot 2024-04-24 at 3 18 31 PM" src="https://github.com/vllm-project/vllm/assets/113316/... | [] | null | null |
vllm | 12628d3c787efd3483aaa74b5ae4175b28fd5805 | 2024-04-26T21:49:59-07:00 | 4,343 | https://github.com/vllm-project/vllm/pull/4343 | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343) | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343)
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu> | csrc/pybind.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | --- csrc/pybind.cpp
+++ csrc/pybind.cpp
@@ -73,7 +73,8 @@
ops.def("gptq_gemm", &gptq_gemm, "Quantized GEMM for GPTQ");
ops.def("gptq_shuffle", &gptq_shuffle, "Post processing for GPTQ");
ops.def("squeezellm_gemm", &squeezellm_gemm, "Quantized GEMM for SqueezeLLM");
- ops.def("scaled_fp8_quant", &scaled_fp8_qu... | 2 | 1 | 5 | [
"mixtral"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/pybind.cpp).
Goal: [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales
Target hardware: unspecified
Target models: mixtral
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(T... | This PR contains the performance improvements mentioned in https://github.com/vllm-project/vllm/pull/4244
The performance numbers are as follows (TP2, H100) -- with mistralai/Mixtral-8x7B-Instruct-v0.1:
<img width="681" alt="Screenshot 2024-04-24 at 3 18 31 PM" src="https://github.com/vllm-project/vllm/assets/113316/... | [] | null | null |
vllm | 12628d3c787efd3483aaa74b5ae4175b28fd5805 | 2024-04-26T21:49:59-07:00 | 4,343 | https://github.com/vllm-project/vllm/pull/4343 | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343) | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343)
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu> | csrc/quantization/fp8/fp8_cuda_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "cuda_compat.h"
#include "dispatch_utils.h"
namespace vllm {
__device__ __forceinline__ float atomicMaxFloat(float* addr, float value) {
float old;
old = (value >= 0) ? __int_as_float(at... | #include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "cuda_compat.h"
#include "dispatch_utils.h"
namespace vllm {
__device__ __forceinline__ float atomicMaxFloat(float* addr, float value) {
float old;
old = (value >= 0) ? __int_as_float(at... | --- csrc/quantization/fp8/fp8_cuda_kernels.cu
+++ csrc/quantization/fp8/fp8_cuda_kernels.cu
@@ -74,7 +74,30 @@
} // namespace vllm
-void scaled_fp8_quant(
+void static_scaled_fp8_quant(
+ torch::Tensor& out, // [..., d]
+ torch::Tensor& input, // [..., d]
+ torch::Tensor& scale) // [1]
+{
+ int64_t ... | 24 | 1 | 5 | [
"mixtral"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/quantization/fp8/fp8_cuda_kernels.cu).
Goal: [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales
Target hardware: unspecified
Target models: mixtral
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/c... | This PR contains the performance improvements mentioned in https://github.com/vllm-project/vllm/pull/4244
The performance numbers are as follows (TP2, H100) -- with mistralai/Mixtral-8x7B-Instruct-v0.1:
<img width="681" alt="Screenshot 2024-04-24 at 3 18 31 PM" src="https://github.com/vllm-project/vllm/assets/113316/... | [] | null | null |
vllm | 12628d3c787efd3483aaa74b5ae4175b28fd5805 | 2024-04-26T21:49:59-07:00 | 4,343 | https://github.com/vllm-project/vllm/pull/4343 | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343) | [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales (#4343)
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu> | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.utils import is_hip
logger = init_logger(__name__)
@triton.jit
def f... | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
from vllm import _custom_ops as ops
from vllm.logger import init_logger
from vllm.utils import is_hip
logger = init_logger(__name__)
@triton.jit
def f... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -220,8 +220,9 @@
def invoke_fused_moe_kernel(A: torch.Tensor, B: torch.Tensor, C: torch.Tensor,
- B_scale: torch.Tensor, topk_weights: torch.Tensor,
- ... | 9 | 4 | 5 | [
"mixtral"
] | [] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Kernel] Optimize FP8 support for MoE kernel / Mixtral via static scales
Target hardware: unspecified
Target models: mixtral
Current file:
```python
"""Fused MoE kernel."""
import functools
import json
import os
from... | This PR contains the performance improvements mentioned in https://github.com/vllm-project/vllm/pull/4244
The performance numbers are as follows (TP2, H100) -- with mistralai/Mixtral-8x7B-Instruct-v0.1:
<img width="681" alt="Screenshot 2024-04-24 at 3 18 31 PM" src="https://github.com/vllm-project/vllm/assets/113316/... | [] | null | null |
vllm | b6d103542c654fb63013a1e45a586d654ae36a2a | 2024-03-30T14:26:38-07:00 | 3,662 | https://github.com/vllm-project/vllm/pull/3662 | [Kernel] Layernorm performance optimization (#3662) | [Kernel] Layernorm performance optimization (#3662) | csrc/layernorm_kernels.cu | cuda | Apache-2.0 | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "dispatch_utils.h"
#include "reduction_utils.cuh"
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template<typename scalar_t>
__global__ void rms_norm_kernel(
scalar_t* __restrict__ out, ... | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "dispatch_utils.h"
#include "reduction_utils.cuh"
#ifndef USE_ROCM
#include <cuda_bf16.h>
#include <cuda_fp16.h>
#else
#include <hip/hip_bf16.h>
#include <hip/hip_fp16.h>
using __nv_bfloat16 = __hip_bflo... | --- csrc/layernorm_kernels.cu
+++ csrc/layernorm_kernels.cu
@@ -4,6 +4,16 @@
#include "dispatch_utils.h"
#include "reduction_utils.cuh"
+#ifndef USE_ROCM
+ #include <cuda_bf16.h>
+ #include <cuda_fp16.h>
+#else
+ #include <hip/hip_bf16.h>
+ #include <hip/hip_fp16.h>
+
+ using __nv_bfloat16 = __hip_bfloat16;
+ ... | 252 | 22 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_kernels.cu).
Goal: [Kernel] Layernorm performance optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include "dispatch_util... | This PR primarily creates optimized specializations of fused_add_rms_norm_kernel, used in many layernorms. It also includes a slightly optimized version of blockReduceSum/warpReduceSum which slightly reduce the number of shuffles done when the max block size is <=512 and known at compile time.
It is observed that fuse... | [{"scope": "e2e", "hardware": "MI300X", "model": "Llama2-70B", "shape": "hidden=8192", "batch_size": 128, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 440, "optimized": 305, "stated_speedup": null, "speedup": 1.4426}, {"scope": "e2e", "hardware": "MI300X", "model": "Llama2-70B", "shape": "h... | null | 1.5714 |
vllm | b6d103542c654fb63013a1e45a586d654ae36a2a | 2024-03-30T14:26:38-07:00 | 3,662 | https://github.com/vllm-project/vllm/pull/3662 | [Kernel] Layernorm performance optimization (#3662) | [Kernel] Layernorm performance optimization (#3662) | csrc/reduction_utils.cuh | cuda | Apache-2.0 | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/reduce_kernel_utils.cuh
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* ... | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/reduce_kernel_utils.cuh
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* ... | --- csrc/reduction_utils.cuh
+++ csrc/reduction_utils.cuh
@@ -20,43 +20,45 @@
#include "cuda_compat.h"
namespace vllm {
-
-template<typename T>
+template<typename T, int numLanes = WARP_SIZE>
__inline__ __device__ T warpReduceSum(T val) {
-#pragma unroll
- for (int mask = WARP_SIZE/2; mask > 0; mask >>= 1)
+ sta... | 28 | 26 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/reduction_utils.cuh).
Goal: [Kernel] Layernorm performance optimization
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/reduce... | This PR primarily creates optimized specializations of fused_add_rms_norm_kernel, used in many layernorms. It also includes a slightly optimized version of blockReduceSum/warpReduceSum which slightly reduce the number of shuffles done when the max block size is <=512 and known at compile time.
It is observed that fuse... | [{"scope": "e2e", "hardware": "MI300X", "model": "Llama2-70B", "shape": "hidden=8192", "batch_size": 128, "metric": "latency", "unit": "ms", "higher_is_better": false, "baseline": 440, "optimized": 305, "stated_speedup": null, "speedup": 1.4426}, {"scope": "e2e", "hardware": "MI300X", "model": "Llama2-70B", "shape": "h... | null | 1.5714 |
vllm | 8fe838659164b415d7f3044ec6b7e5bc52c6b6a5 | 2024-03-14T01:11:48-07:00 | 3,389 | https://github.com/vllm-project/vllm/pull/3389 | [Kernel] change benchmark script so that result can be directly used; tune moe kernel in A100/H100 with tp=2,4,8 (#3389) | [Kernel] change benchmark script so that result can be directly used; tune moe kernel in A100/H100 with tp=2,4,8 (#3389) | vllm/model_executor/layers/fused_moe/fused_moe.py | triton | Apache-2.0 | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
from vllm._C import ops
from vllm.logger import init_logger
from vllm.utils import is_hip
logger = init_logger(__name__)
@triton.jit
def fused_moe_ker... | """Fused MoE kernel."""
import functools
import json
import os
from typing import Any, Dict, Optional, Tuple
import torch
import triton
import triton.language as tl
from vllm._C import ops
from vllm.logger import init_logger
from vllm.utils import is_hip
logger = init_logger(__name__)
@triton.jit
def fused_moe_ker... | --- vllm/model_executor/layers/fused_moe/fused_moe.py
+++ vllm/model_executor/layers/fused_moe/fused_moe.py
@@ -245,6 +245,11 @@
)
+def get_config_file_name(E: int, N: int) -> str:
+ device_name = torch.cuda.get_device_name().replace(" ", "_")
+ return f"E={E},N={N},device_name={device_name}.json"
+
+
@... | 7 | 3 | 2 | [] | [
"A100",
"H100"
] | [] | Optimize this triton kernel file from vllm (vllm/model_executor/layers/fused_moe/fused_moe.py).
Goal: [Kernel] change benchmark script so that result can be directly used; tune moe kernel in A100/H100 with tp=2,4,8
Target hardware: A100, H100
Target models: unspecified
Current file:
```python
"""Fused MoE kernel."""
... | cc @WoosukKwon
| [] | null | null |
vllm | fd5dcc5c816b7392821d3d4c02b13a7cf820d962 | 2024-02-21T20:17:52-08:00 | 2,975 | https://github.com/vllm-project/vllm/pull/2975 | Optimize GeGLU layer in Gemma (#2975) | Optimize GeGLU layer in Gemma (#2975) | csrc/activation_kernels.cu | cuda | Apache-2.0 | #include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatch_utils.h"
namespace vllm {
template<typename T>
__device__ __forceinline__ T silu(const T& x) {
// x * sigmoid(x)
return (T) (((float) x) / (1.0f + expf((float) -x)));
}
tem... | #include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
#include <cmath>
#include "cuda_compat.h"
#include "dispatch_utils.h"
namespace vllm {
// Activation and gating kernel template.
template<typename scalar_t, scalar_t (*ACT_FN)(const scalar_t&)>
__global__ void act_and_mu... | --- csrc/activation_kernels.cu
+++ csrc/activation_kernels.cu
@@ -1,20 +1,17 @@
#include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
+
+#include <cmath>
#include "cuda_compat.h"
#include "dispatch_utils.h"
namespace vllm {
-template<typename T>
-__device__ __forcei... | 47 | 24 | 4 | [
"gemma"
] | [] | [] | Optimize this cuda kernel file from vllm (csrc/activation_kernels.cu).
Goal: Optimize GeGLU layer in Gemma
Target hardware: unspecified
Target models: gemma
Current file:
```cuda
#include <ATen/cuda/CUDAContext.h>
#include <torch/extension.h>
#include <c10/cuda/CUDAGuard.h>
#include "cuda_compat.h"
#include "dispatc... | This PR optimizes the GeGLU layer in Gemma by merging the linear layers and introducing the `gelu_and_mul` kernel, similarly to how we optimized SwiGLU in Llama.
| [] | null | null |
vllm | fd5dcc5c816b7392821d3d4c02b13a7cf820d962 | 2024-02-21T20:17:52-08:00 | 2,975 | https://github.com/vllm-project/vllm/pull/2975 | Optimize GeGLU layer in Gemma (#2975) | Optimize GeGLU layer in Gemma (#2975) | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | --- csrc/ops.h
+++ csrc/ops.h
@@ -54,6 +54,10 @@
bool is_neox);
void silu_and_mul(
+ torch::Tensor& out,
+ torch::Tensor& input);
+
+void gelu_and_mul(
torch::Tensor& out,
torch::Tensor& input);
| 4 | 0 | 4 | [
"gemma"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: Optimize GeGLU layer in Gemma
Target hardware: unspecified
Target models: gemma
Current file:
```cpp
#pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tenso... | This PR optimizes the GeGLU layer in Gemma by merging the linear layers and introducing the `gelu_and_mul` kernel, similarly to how we optimized SwiGLU in Llama.
| [] | null | null |
vllm | fd5dcc5c816b7392821d3d4c02b13a7cf820d962 | 2024-02-21T20:17:52-08:00 | 2,975 | https://github.com/vllm-project/vllm/pull/2975 | Optimize GeGLU layer in Gemma (#2975) | Optimize GeGLU layer in Gemma (#2975) | csrc/pybind.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | --- csrc/pybind.cpp
+++ csrc/pybind.cpp
@@ -22,6 +22,10 @@
"silu_and_mul",
&silu_and_mul,
"Activation function used in SwiGLU.");
+ ops.def(
+ "gelu_and_mul",
+ &gelu_and_mul,
+ "Activation function used in GeGLU.");
ops.def(
"gelu_new",
&gelu_new, | 4 | 0 | 4 | [
"gemma"
] | [] | [] | Optimize this cpp kernel file from vllm (csrc/pybind.cpp).
Goal: Optimize GeGLU layer in Gemma
Target hardware: unspecified
Target models: gemma
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom op... | This PR optimizes the GeGLU layer in Gemma by merging the linear layers and introducing the `gelu_and_mul` kernel, similarly to how we optimized SwiGLU in Llama.
| [] | null | null |
vllm | beb89f68b448a43ac112b48e3834f80a2df626cb | 2024-01-27T08:53:17+01:00 | 2,566 | https://github.com/vllm-project/vllm/pull/2566 | AWQ: Up to 2.66x higher throughput (#2566) | AWQ: Up to 2.66x higher throughput (#2566) | csrc/ops.h | cpp | Apache-2.0 | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | #pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
int num_kv_heads,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len,
const c... | --- csrc/ops.h
+++ csrc/ops.h
@@ -70,6 +70,14 @@
torch::Tensor _scaling_factors,
torch::Tensor _zeros,
int split_k_iters);
+
+torch::Tensor awq_dequantize(
+ torch::Tensor _kernel,
+ torch::Tensor _scaling_factors,
+ torch::Tensor _zeros,
+ int split_k_iters,
+ int thx,
+ int thy);
#endif
... | 8 | 0 | 4 | [] | [] | [
"2.66x"
] | Optimize this cpp kernel file from vllm (csrc/ops.h).
Goal: AWQ: Up to 2.66x higher throughput
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#pragma once
#include <torch/extension.h>
void paged_attention_v1(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
t... | The strategy is to dequantize and run FP16 matmul for longer sequences. This could probably be faster if we just used cublas instead of `torch.matmul`.
EDIT: It seems throughput can be over 2x in vLLM because context processing is such a crucial part of the framework.
```
python benchmarks/benchmark_throughput.py --i... | [{"scope": "e2e", "hardware": "A100", "model": "TheBloke/Mistral-7B-Instruct-v0.2-AWQ", "shape": "input_len=16384", "batch_size": 100, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 3138.15, "optimized": 8879.04, "stated_speedup": 2.84, "speedup": 2.8294}, {"scope": "e2e", "hardware": "A... | null | 2.0416 |
vllm | beb89f68b448a43ac112b48e3834f80a2df626cb | 2024-01-27T08:53:17+01:00 | 2,566 | https://github.com/vllm-project/vllm/pull/2566 | AWQ: Up to 2.66x higher throughput (#2566) | AWQ: Up to 2.66x higher throughput (#2566) | csrc/pybind.cpp | cpp | Apache-2.0 | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | #include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLLM custom ops
pybind11::module ops = m.def_submodule("ops", "vLLM custom operators");
// Attention ops
ops.def(
"paged_attention_v1",
&paged_attention_v1,
"Compu... | --- csrc/pybind.cpp
+++ csrc/pybind.cpp
@@ -51,6 +51,7 @@
#ifndef USE_ROCM
// Quantization ops
ops.def("awq_gemm", &awq_gemm, "Quantized GEMM for AWQ");
+ ops.def("awq_dequantize", &awq_dequantize, "Dequantization for AWQ");
#endif
ops.def("gptq_gemm", &gptq_gemm, "Quantized GEMM for GPTQ");
ops.def("gpt... | 1 | 0 | 4 | [] | [] | [
"2.66x"
] | Optimize this cpp kernel file from vllm (csrc/pybind.cpp).
Goal: AWQ: Up to 2.66x higher throughput
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include "cache.h"
#include "cuda_utils.h"
#include "ops.h"
#include <torch/extension.h>
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
// vLL... | The strategy is to dequantize and run FP16 matmul for longer sequences. This could probably be faster if we just used cublas instead of `torch.matmul`.
EDIT: It seems throughput can be over 2x in vLLM because context processing is such a crucial part of the framework.
```
python benchmarks/benchmark_throughput.py --i... | [{"scope": "e2e", "hardware": "A100", "model": "TheBloke/Mistral-7B-Instruct-v0.2-AWQ", "shape": "input_len=16384", "batch_size": 100, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 3138.15, "optimized": 8879.04, "stated_speedup": 2.84, "speedup": 2.8294}, {"scope": "e2e", "hardware": "A... | null | 2.0416 |
vllm | beb89f68b448a43ac112b48e3834f80a2df626cb | 2024-01-27T08:53:17+01:00 | 2,566 | https://github.com/vllm-project/vllm/pull/2566 | AWQ: Up to 2.66x higher throughput (#2566) | AWQ: Up to 2.66x higher throughput (#2566) | csrc/quantization/awq/gemm_kernels.cu | cuda | Apache-2.0 | /*
Adapted from https://github.com/mit-han-lab/llm-awq
@article{lin2023awq,
title={AWQ: Activation-aware Weight Quantization for LLM Compression and Acceleration},
author={Lin, Ji and Tang, Jiaming and Tang, Haotian and Yang, Shang and Dang, Xingyu and Han, Song},
journal={arXiv},
year={2023}
}
*/
#include <... | /*
Adapted from https://github.com/mit-han-lab/llm-awq
@article{lin2023awq,
title={AWQ: Activation-aware Weight Quantization for LLM Compression and Acceleration},
author={Lin, Ji and Tang, Jiaming and Tang, Haotian and Yang, Shang and Dang, Xingyu and Han, Song},
journal={arXiv},
year={2023}
}
*/
#include <... | --- csrc/quantization/awq/gemm_kernels.cu
+++ csrc/quantization/awq/gemm_kernels.cu
@@ -493,8 +493,116 @@
#endif
}
+__global__ void __launch_bounds__(64) dequantize_weights(
+ int* __restrict__ B,
+ half* __restrict__ scaling_factors,
+ int* __restrict__ zeros,
+ half* __restrict__ C,
+ int G
+)
+{
+... | 108 | 0 | 4 | [] | [] | [
"2.66x"
] | Optimize this cuda kernel file from vllm (csrc/quantization/awq/gemm_kernels.cu).
Goal: AWQ: Up to 2.66x higher throughput
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
Adapted from https://github.com/mit-han-lab/llm-awq
@article{lin2023awq,
title={AWQ: Activation-aware Weight Qua... | The strategy is to dequantize and run FP16 matmul for longer sequences. This could probably be faster if we just used cublas instead of `torch.matmul`.
EDIT: It seems throughput can be over 2x in vLLM because context processing is such a crucial part of the framework.
```
python benchmarks/benchmark_throughput.py --i... | [{"scope": "e2e", "hardware": "A100", "model": "TheBloke/Mistral-7B-Instruct-v0.2-AWQ", "shape": "input_len=16384", "batch_size": 100, "metric": "throughput", "unit": "tok/s", "higher_is_better": true, "baseline": 3138.15, "optimized": 8879.04, "stated_speedup": 2.84, "speedup": 2.8294}, {"scope": "e2e", "hardware": "A... | null | 2.0416 |
vllm | e1054247ba28aed104a1a26bbca86bac70d642af | 2023-11-19T10:18:02+08:00 | 1,667 | https://github.com/vllm-project/vllm/pull/1667 | [Optimization] Implement fused add rmsnorm (#1667) | [Optimization] Implement fused add rmsnorm (#1667) | csrc/layernorm.cpp | cpp | Apache-2.0 | #include <torch/extension.h>
void rms_norm(
torch::Tensor& out,
torch::Tensor& input,
torch::Tensor& weight,
float epsilon);
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def(
"rms_norm",
&rms_norm,
"Apply Root Mean Square (RMS) Normalization to the input tensor.");
}
| #include <torch/extension.h>
void rms_norm(
torch::Tensor& out,
torch::Tensor& input,
torch::Tensor& weight,
float epsilon);
void fused_add_rms_norm(
torch::Tensor& input,
torch::Tensor& residual,
torch::Tensor& weight,
float epsilon);
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def(
"rms_norm... | --- csrc/layernorm.cpp
+++ csrc/layernorm.cpp
@@ -6,9 +6,19 @@
torch::Tensor& weight,
float epsilon);
+void fused_add_rms_norm(
+ torch::Tensor& input,
+ torch::Tensor& residual,
+ torch::Tensor& weight,
+ float epsilon);
+
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.def(
"rms_norm",
&rms_nor... | 10 | 0 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/layernorm.cpp).
Goal: [Optimization] Implement fused add rmsnorm
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include <torch/extension.h>
void rms_norm(
torch::Tensor& out,
torch::Tensor& input,
torch::Tensor& weight,
float epsilo... | This PR reduces CPU overhead, increasing the end-to-end token generation speed in LLaMA by 10%.
| [{"scope": "e2e", "hardware": null, "model": "LLaMA", "shape": null, "batch_size": null, "metric": "token generation speed", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.1, "speedup": 1.1}] | null | 1.1 |
vllm | e1054247ba28aed104a1a26bbca86bac70d642af | 2023-11-19T10:18:02+08:00 | 1,667 | https://github.com/vllm-project/vllm/pull/1667 | [Optimization] Implement fused add rmsnorm (#1667) | [Optimization] Implement fused add rmsnorm (#1667) | csrc/layernorm_kernels.cu | cuda | Apache-2.0 | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include "dispatch_utils.h"
#include "reduction_utils.cuh"
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template<typename scalar_t>
__global__ void rms_norm_kernel(
scalar_t* __restrict__ out, // [..., hidden_size]
con... | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include "dispatch_utils.h"
#include "reduction_utils.cuh"
namespace vllm {
// TODO(woosuk): Further optimize this kernel.
template<typename scalar_t>
__global__ void rms_norm_kernel(
scalar_t* __restrict__ out, // [..., hidden_size]
con... | --- csrc/layernorm_kernels.cu
+++ csrc/layernorm_kernels.cu
@@ -34,6 +34,36 @@
}
}
+// TODO: Further optimize this kernel.
+template<typename scalar_t>
+__global__ void fused_add_rms_norm_kernel(
+ scalar_t* __restrict__ input, // [..., hidden_size]
+ scalar_t* __restrict__ residual, // [..., h... | 55 | 0 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/layernorm_kernels.cu).
Goal: [Optimization] Implement fused add rmsnorm
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include "dispatch_utils.h"
#include "reduction_utils.cu... | This PR reduces CPU overhead, increasing the end-to-end token generation speed in LLaMA by 10%.
| [{"scope": "e2e", "hardware": null, "model": "LLaMA", "shape": null, "batch_size": null, "metric": "token generation speed", "unit": "tok/s", "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.1, "speedup": 1.1}] | null | 1.1 |
vllm | 79af7e96a0e2fc9f340d1939192122c3ae38ff17 | 2023-08-04T20:57:29+03:00 | 420 | https://github.com/vllm-project/vllm/pull/420 | [OPTIMIZATION] Optimizes the single_query_cached_kv_attention kernel (#420) | [OPTIMIZATION] Optimizes the single_query_cached_kv_attention kernel (#420) | csrc/attention/attention_kernels.cu | cuda | Apache-2.0 | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed... | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed... | --- csrc/attention/attention_kernels.cu
+++ csrc/attention/attention_kernels.cu
@@ -86,6 +86,8 @@
const int kv_block_stride,
const int kv_head_stride) {
constexpr int THREAD_GROUP_SIZE = MAX(WARP_SIZE / BLOCK_SIZE, 1);
+ constexpr int NUM_THREAD_GROUPS = NUM_THREADS / THREAD_GROUP_SIZE; // Note: This assumes ... | 9 | 6 | 1 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/attention/attention_kernels.cu).
Goal: [OPTIMIZATION] Optimizes the single_query_cached_kv_attention kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/... | Instead of having each thread group fetch the query head (which causes 64x memory to be read), we have all threads in the block share the task of loading the query head. On the benchmark of running 1000 sequences through LLaMA13B on an A100 (80GB), this improves the throughput by 1.10x.
| [{"scope": "e2e", "hardware": "A100", "model": "LLaMA13B", "shape": null, "batch_size": 1000, "metric": "throughput", "unit": null, "higher_is_better": true, "baseline": null, "optimized": null, "stated_speedup": 1.1, "speedup": 1.1}] | null | 1.1 |
vllm | 96853af5a830d42496aa6cfd5c670d073d6a0209 | 2023-07-14T20:06:40-04:00 | 452 | https://github.com/vllm-project/vllm/pull/452 | Optimize MQA Kernel (#452) | Optimize MQA Kernel (#452) | csrc/attention.cpp | cpp | Apache-2.0 | #include <torch/extension.h>
#include <c10/util/Optional.h>
void single_query_cached_kv_attention(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int block_size,
int max_context_len... | #include <torch/extension.h>
#include <c10/util/Optional.h>
void single_query_cached_kv_attention(
torch::Tensor& out,
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
torch::Tensor& head_mapping,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens,
int bl... | --- csrc/attention.cpp
+++ csrc/attention.cpp
@@ -6,6 +6,7 @@
torch::Tensor& query,
torch::Tensor& key_cache,
torch::Tensor& value_cache,
+ torch::Tensor& head_mapping,
float scale,
torch::Tensor& block_tables,
torch::Tensor& context_lens, | 1 | 0 | 3 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/attention.cpp).
Goal: Optimize MQA Kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include <torch/extension.h>
#include <c10/util/Optional.h>
void single_query_cached_kv_attention(
torch::Tensor& out,
torch::Tensor& query,
torch... | This PR implements the MQA paged attention kernel and modifies the GPT Bigcode model to utilize the optimized MQA kernel.
TODO: Check performance gain.
| [] | null | null |
vllm | 96853af5a830d42496aa6cfd5c670d073d6a0209 | 2023-07-14T20:06:40-04:00 | 452 | https://github.com/vllm-project/vllm/pull/452 | Optimize MQA Kernel (#452) | Optimize MQA Kernel (#452) | csrc/attention/attention_kernels.cu | cuda | Apache-2.0 | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed... | /*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/decoder_masked_multihead_attention/decoder_masked_multihead_attention_template.hpp
* Copyright (c) 2023, The vLLM team.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Licensed... | --- csrc/attention/attention_kernels.cu
+++ csrc/attention/attention_kernels.cu
@@ -74,14 +74,17 @@
__global__ void single_query_cached_kv_attention_kernel(
scalar_t* __restrict__ out, // [num_seqs, num_heads, head_size]
const scalar_t* __restrict__ q, // [num_seqs, num_heads, head_size]
- c... | 22 | 9 | 3 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/attention/attention_kernels.cu).
Goal: Optimize MQA Kernel
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
/*
* Adapted from https://github.com/NVIDIA/FasterTransformer/blob/release/v5.3_tag/src/fastertransformer/kernels/decoder_masked_mult... | This PR implements the MQA paged attention kernel and modifies the GPT Bigcode model to utilize the optimized MQA kernel.
TODO: Check performance gain.
| [] | null | null |
vllm | 0f40557af6141ced118b81f2a04e651a0c6c9dbd | 2023-04-07T17:45:07-07:00 | 32 | https://github.com/vllm-project/vllm/pull/32 | Implement block copy kernel to optimize beam search (#32) | Implement block copy kernel to optimize beam search (#32) | csrc/cache.cpp | cpp | Apache-2.0 | #include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, std::vector<int64_t>>& block_mapping);
void reshape_... | #include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
std::vector<torch::Tensor>& key_caches,
std::vector<torch::Tensor>& value_caches,
const std::map<int64_t, std::vector... | --- csrc/cache.cpp
+++ csrc/cache.cpp
@@ -9,8 +9,8 @@
const std::map<int64_t, int64_t>& block_mapping);
void copy_blocks(
- torch::Tensor& src,
- torch::Tensor& dst,
+ std::vector<torch::Tensor>& key_caches,
+ std::vector<torch::Tensor>& value_caches,
const std::map<int64_t, std::vector<int64_t>>& block_ma... | 2 | 2 | 2 | [] | [] | [] | Optimize this cpp kernel file from vllm (csrc/cache.cpp).
Goal: Implement block copy kernel to optimize beam search
Target hardware: unspecified
Target models: unspecified
Current file:
```cpp
#include <torch/extension.h>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,... | This PR implements a block copy kernel. By using this kernel, we can reduce the number of kernel invocations from `2 * num_layers * num_copying_blocks` to 1.
| [] | null | null |
vllm | 0f40557af6141ced118b81f2a04e651a0c6c9dbd | 2023-04-07T17:45:07-07:00 | 32 | https://github.com/vllm-project/vllm/pull/32 | Implement block copy kernel to optimize beam search (#32) | Implement block copy kernel to optimize beam search (#32) | csrc/cache_kernels.cu | cuda | Apache-2.0 | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <algorithm>
#include <cassert>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping) {
torch::Device src_device = src.device();
torch::Device dst_dev... | #include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <algorithm>
#include <cassert>
#include <map>
#include <vector>
void swap_blocks(
torch::Tensor& src,
torch::Tensor& dst,
const std::map<int64_t, int64_t>& block_mapping) {
torch::Device src_device = src.device();
torch::Device dst_dev... | --- csrc/cache_kernels.cu
+++ csrc/cache_kernels.cu
@@ -43,33 +43,93 @@
}
}
+namespace cacheflow {
+
+// Grid: (num_layers, num_pairs)
+template<typename scalar_t>
+__global__ void copy_blocks_kernel(
+ int64_t* key_cache_ptrs,
+ int64_t* value_cache_ptrs,
+ const int* __restrict__ block_mapping,
+ const int ... | 84 | 24 | 2 | [] | [] | [] | Optimize this cuda kernel file from vllm (csrc/cache_kernels.cu).
Goal: Implement block copy kernel to optimize beam search
Target hardware: unspecified
Target models: unspecified
Current file:
```cuda
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <algorithm>
#include <cassert>
#include <m... | This PR implements a block copy kernel. By using this kernel, we can reduce the number of kernel invocations from `2 * num_layers * num_copying_blocks` to 1.
| [] | null | null |
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