repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
intel-xpu-backend-for-triton | github_2023 | others | 1,693 | intel | pbchekin | @@ -20,19 +20,28 @@ This is the development repository of Intel® XPU Backend for Triton\*, a new [T
# Install from source
```
-git clone https://github.com/intel/intel-xpu-backend-for-triton.git -b llvm-target
-cd intel-xpu-backend-for-triton
-scripts/compile-triton.sh
+git clone https://github.com/intel/intel-xpu-... | > Note that I on purpose drop `-b llvm-target` from clone cmdline because otherwise this instruction will be confusing from the release branches and require adjustment each time you branch out.
Yes, without `-b llvm-target` git will clone the default branch, I assume, which is currently llvm-target. Later we will ma... |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,86 @@
+name: Get the latest commit from SPIRV-LLVM-Translator
+
+on:
+# schedule:
+# - cron: "0 0 * * *"
+ pull_request:
+ branches:
+ - lijunhui/translator_cid
+ push:
+ branches:
+ - lijunhui/translator_cid
+# env:
+# TORCH_XPU_OPS_COMMIT: 39522db63ce045f52c9d61a286018c266cd00479 | The comment is not needed. |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,86 @@
+name: Get the latest commit from SPIRV-LLVM-Translator
+
+on:
+# schedule:
+# - cron: "0 0 * * *"
+ pull_request:
+ branches:
+ - lijunhui/translator_cid
+ push:
+ branches:
+ - lijunhui/translator_cid
+# env:
+# TORCH_XPU_OPS_COMMIT: 39522db63ce045f52c9d61a286018c266cd00479
... | The comment is not needed. |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,86 @@
+name: Get the latest commit from SPIRV-LLVM-Translator
+
+on:
+# schedule:
+# - cron: "0 0 * * *"
+ pull_request:
+ branches:
+ - lijunhui/translator_cid
+ push:
+ branches:
+ - lijunhui/translator_cid
+# env:
+# TORCH_XPU_OPS_COMMIT: 39522db63ce045f52c9d61a286018c266cd00479
... | The comment is not needed. |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,47 @@
+#!/usr/bin/env bash
+
+set -euo pipefail
+
+# $1 is the latest commit id from SPIRV-LLVM-Translator
+# $2 is the commit id from Triton's spirv-llvm-translator.conf
+
+if [ "$#" -ne 2 ]; then
+ echo "Please provide commit id from Translator and from spirv-llvm-translator.conf. Usage: $0 cid1 cid2"
+... | ```suggestion
if ! ./scripts/compile-triton.sh --clean; then
echo "Compile failed for translator commit $cid"
continue
fi
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,47 @@
+#!/usr/bin/env bash
+
+set -euo pipefail
+
+# $1 is the latest commit id from SPIRV-LLVM-Translator
+# $2 is the commit id from Triton's spirv-llvm-translator.conf
+
+if [ "$#" -ne 2 ]; then
+ echo "Please provide commit id from Translator and from spirv-llvm-translator.conf. Usage: $0 cid1 cid2"
+... | ```suggestion
if ./scripts/test-triton.sh --skip-deps; then
echo "Tests passed for translator commit $cid"
echo "A newer commit found: $cid"
break
else
echo "Tests failed for translator commit $cid"
fi
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,651 | intel | pbchekin | @@ -0,0 +1,72 @@
+name: Get the latest commit from SPIRV-LLVM-Translator
+
+on:
+# schedule:
+# - cron: "0 0 * * *"
+ pull_request:
+ branches:
+ - lijunhui/translator_cid
+ push:
+ branches:
+ - lijunhui/translator_cid
+
+jobs:
+ update-translator-commit:
+ runs-on:
+ - rolling | You need more labels to select a runner: "rolling" can be on Max 1100 or A770. At least, you need to add "max1100". |
intel-xpu-backend-for-triton | github_2023 | others | 1,690 | intel | anmyachev | @@ -472,3 +472,8 @@ test/unit/language/test_core.py::test_dot[1-128-128-64-4-False-True-none-tf32-fl
test/unit/language/test_core.py::test_dot[1-128-128-64-4-False-True-none-tf32-float16-float16-1_1]
test/unit/language/test_core.py::test_dot[1-128-128-64-4-False-False-none-tf32-float16-float16-1_0]
test/unit/languag... | These are the same tests that were enabled there: https://github.com/intel/intel-xpu-backend-for-triton/pull/1667/files |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,670 | intel | whitneywhtsang | @@ -247,18 +233,47 @@ struct PrefetchOpConversion
SmallVector<unsigned, 2> shapePerWarp =
get2DPrefetchShapePerWarp(tensorType);
+
SmallVector<unsigned, 2> warpsPerCTA =
getWarpsPerCTA(tensorShape, shapePerWarp, numWarps);
+ // To adjust the row shape per warp to fit the tensor shape ... | ```suggestion
unsigned vBlocks = 1;
switch (elemSizeInBits) {
case 8:
if (tileWidthInElem == 64) {
// OCL interface supports 8b_?r32x2c for 64 bytes per row of 8 bits
// element.
vBlocks = 2;
tileWidthInElem = 32;
}
break;
case 16:
if (... |
intel-xpu-backend-for-triton | github_2023 | python | 1,597 | intel | chengjunlu | @@ -376,27 +378,30 @@ def benchmark(B, M, N, K, provider):
quantiles = [0.5, 0.0, 1.0]
- # calculate tflops for oneDNN kernel
- def calculate_tflops(ms):
- return 2 * M * N * K * 1e-12 / (ms * 1e-3)
-
if provider == 'onednn':
- ms, min_ms, max_ms = triton.testing.do_bench(lambda: torch... | Can we add the `assert_close` to check the XeTLA output? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,597 | intel | chengjunlu | @@ -118,33 +99,33 @@ sycl::event bgemm_run(void *_A, void *_B, void *_C, void *_Acc, void *_Cnt,
auto e_esimd = queue.submit([&](sycl::handler &cgh) {
cgh.use_kernel_bundle(exeBundle);
cgh.parallel_for<Test>(nd_range, [=](sycl::nd_item<3> item) KERNEL_MAIN {
- constexpr uint32_t barrier_count ... | We can remove the print inside the c++. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,663 | intel | victor-eds | @@ -0,0 +1,29 @@
+//===- SLPVectorizer.h ------------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---... | ```suggestion
//===----------------------------------------------------------------------===//
//
// This pass implements the Bottom Up SLP vectorizer. It detects consecutive
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,215 | intel | kballeda | @@ -0,0 +1,353 @@
+#include <level_zero/ze_api.h>
+#include <sycl/sycl.hpp>
+#include <torch/torch.h>
+
+#include <fstream>
+#include <iostream>
+#include <string>
+
+#include "sycl_functions.h"
+
+// Create an exception handler for asynchronous SYCL exceptions
+static auto exception_handler = [](sycl::exception_list e... | file operations done at line-25 (load_tensor) and read_spirv can be clubbed to make it generic. I have similar version here for reference - https://github.com/kballeda/intel-xpu-backend-for-triton/blob/0523ae9ef227ee6d380f89be45b28bf8e28661e0/scripts/triton_reproducer/src/wrapper_sycl.cpp#L27 |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,215 | intel | kballeda | @@ -0,0 +1,353 @@
+#include <level_zero/ze_api.h>
+#include <sycl/sycl.hpp>
+#include <torch/torch.h>
+
+#include <fstream>
+#include <iostream>
+#include <string>
+
+#include "sycl_functions.h"
+
+// Create an exception handler for asynchronous SYCL exceptions
+static auto exception_handler = [](sycl::exception_list e... | This module is restricting it to a particular case due to hardcoded values in this PR, in future if we want to use the sycl_kernel_launcher from __triton_launcher.so we need to configure the device buffer creation/copy prior to calling sycl_kernel_launcher or pass cgh from outside or modify the sycl_kernel_launcher at ... |
intel-xpu-backend-for-triton | github_2023 | c | 1,215 | intel | ienkovich | @@ -36,26 +29,24 @@ static std::vector<std::pair<sycl::device, ze_device_handle_t>>
static inline void gpuAssert(ze_result_t code, const char *file, int line) {
if (code != ZE_RESULT_SUCCESS) {
- const char *prefix = "Triton Error [ZE]: ";
- std::stringstream ss;
- ss << "0x" << std::hex << code;
- st... | With no macro, this __LINE__ becomes quite useless. |
intel-xpu-backend-for-triton | github_2023 | others | 730 | intel | pbchekin | @@ -142,29 +152,29 @@ jobs:
- name: Setup PyTorch
uses: ./.github/actions/setup-pytorch
+ | ```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,219 | intel | pbchekin | @@ -0,0 +1,169 @@
+name: E2E | Change the name please |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | I think the script needs to fail rather than print this to `triton_commit_id.txt`. |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | I think the script needs to fail rather than print this to `triton_commit_id.txt`. |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | I think the script needs to fail rather than print this to `triton_version.txt`. |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | What about
```
python -c 'import triton; print(triton.__version__)' > $TRITON_TEST_REPORTS_DIR/triton_version.txt
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | What about
```
python -c 'import torch; print(torch.__version__)'
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -42,3 +42,44 @@ pytest() {
python3 -u -m pytest "${pytest_extra_args[@]}" "$@" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version... | What about
```
python -c 'import torch;import intel_extension_for_pytorch as ipex;print(ipex.__version__)'
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | Using `find` is not necessary
```suggestion
WHEEL="${SCRIPTS_DIR}/../python/dist/*.whl"
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | In my case i have the following wheel: `python/dist/triton-3.0.0-cp310-cp310-linux_x86_64.whl`
This will generate empty `triton_commit_id.txt`:
```
echo "python/dist/triton-3.0.0-cp310-cp310-linux_x86_64.whl" | sed -n 's/.*git\([a-zA-Z0-9]*\)[^a-zA-Z0-9].*/\1/p'
```
|
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | If you want to test is a bash variable is not empty
```suggestion
if [[ -n "$WHEEL" ]]; then
```
or better (works in bash only):
```suggestion
if [[ $WHEEL ]]; then
```
|
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | ```suggestion
elif [[ $TRITON_PROJ ]]; then
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | No need to run `which python`, with `set -e` if python not found this will terminate the script:
```suggestion
python -c 'import platform; print(platform.python_version())' > $TRITON_TEST_REPORTS_DIR/triton_version.txt
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | ```suggestion
python -c 'import triton; print(triton.__version__)' > $TRITON_TEST_REPORTS_DIR/triton_version.txt
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | ```suggestion
python -c 'import torch; print(torch.__version__)' > $TRITON_TEST_REPORTS_DIR/pytorch_version.txt
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,52 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | ```suggestion
python -c 'import intel_extension_for_pytorch as ipex; print(ipex.__version__)' > $TRITON_TEST_REPORTS_DIR/IPEX_version.txt
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,33 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | This is simpler and also handles a case when there is more than one *.whl file (possible in a development environment):
```suggestion
WHEEL=$SCRIPTS_DIR/../python/dist/*.whl
if [[ -f "$WHEEL" ]]; then
TRITON_COMMIT=$(echo "$WHEEL" | sed -n 's/.*git\([a-zA-Z0-9]*\)[^a-zA-Z0-9].*/\1/p')
fi
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,42 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | What about
```suggestion
if [[ $TRITON_PROJ && ! $TRITON_COMMIT ]]; then
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,42 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | ```suggestion
if [[ ! $TRITON_COMMIT ]]; then
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -49,3 +49,42 @@ run_tutorial_test() {
echo
python3 -u "$1.py" || $TRITON_TEST_IGNORE_ERRORS
}
+
+capture_runtime_env() {
+ mkdir -p "$TRITON_TEST_REPORTS_DIR"
+
+ echo "$CMPLR_ROOT" > $TRITON_TEST_REPORTS_DIR/cmplr_version.txt
+ echo "$MKLROOT" > $TRITON_TEST_REPORTS_DIR/mkl_version.txt
+
+ # Exit... | If there is no *.whl files, then the array has 1 element, you still need to check that the file exists |
intel-xpu-backend-for-triton | github_2023 | others | 1,072 | intel | pbchekin | @@ -86,6 +86,15 @@ if [ "$TRITON_TEST_WARNING_REPORTS" == true ]; then
fi
source $SCRIPTS_DIR/pytest-utils.sh
+if [ "$TRITON_TEST_REPORTS" == true ]; then
+ capture_runtime_env
+ source $SCRIPTS_DIR/capture-hw-details.sh --quiet
+ echo "$LIBIGC1_VERSION" > $TRITON_TEST_REPORTS_DIR/libigc1_version.txt
+ ... | What about moving this to `capture_runtime_env`? We need a single entry point that can be used in CI workflows as well, so it would be convenient to do this:
```
source scripts/pytest-utils.sh
capture_runtime_env
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,222 | intel | pbchekin | @@ -114,12 +118,26 @@ jobs:
LLVM_COMMIT_ID=$(<cmake/llvm-hash.txt)
echo "LLVM_COMMIT_ID=$LLVM_COMMIT_ID" >> $GITHUB_ENV
- - name: Setup PyTorch
+ - name: Setup PyTorch with IPEX
+ if: ${{ inputs.install_ipex }} | When the workflow is triggered by pull request / push then `install_ipex` is null. You need to handle both `null` and `true` as default values. |
intel-xpu-backend-for-triton | github_2023 | others | 1,243 | intel | pbchekin | @@ -1,6 +1,7 @@
#!/usr/bin/env bash
set -euo pipefail
+set -vx | Leftover from debugging? |
intel-xpu-backend-for-triton | github_2023 | others | 1,243 | intel | pbchekin | @@ -85,7 +86,8 @@ export TRITON_PROJ=$BASE/intel-xpu-backend-for-triton
export TRITON_PROJ_BUILD=$TRITON_PROJ/python/build
export SCRIPTS_DIR=$(cd $(dirname "$0") && pwd)
-python3 -m pip install lit pytest pytest-xdist pytest-rerunfailures pytest-select
+python3 -m pip install lit pytest pytest-xdist pytest-rerunfa... | I think we do not need `pip list` in the script. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,275 | intel | etiotto | @@ -952,10 +952,12 @@ void LayoutRematerialization::rewriteSlice(SetVector<Value> &slice,
auto layoutIt = layout.find(v);
assert(layoutIt != layout.end());
// If we already have a remat value for this value, use it.
+#if 0 // FIXME: Fails on LTS driver | AS discussed offline I think we should compile this code conditionally based on the target environment (e.g. driver version). |
intel-xpu-backend-for-triton | github_2023 | python | 1,275 | intel | vlad-penkin | @@ -160,23 +160,26 @@ def make_ttgir(mod, metadata, opt, device_arch):
pm.enable_debug()
passes.ttir.add_convert_to_ttgpuir(pm, f"xpu:{device_arch}", opt.num_warps, opt.threads_per_warp, opt.num_ctas)
+ is_lts_driver = Version(metadata["target"].arch['driver_version']) == Version("1.3.27642") | NIT: Be consistent with string quote character within a file. |
intel-xpu-backend-for-triton | github_2023 | others | 1,545 | intel | pbchekin | @@ -0,0 +1,299 @@
+name: E2E accuracy reusable workflow
+
+on:
+ workflow_call:
+ inputs:
+ install_ipex:
+ description: Install Intel PyTorch Extension
+ type: boolean
+ default: true
+ suite:
+ description: Test suite
+ type: string
+ default: all
+ mode:
+... | Do you want to print inputs for each job in matrix? |
intel-xpu-backend-for-triton | github_2023 | others | 1,545 | intel | pbchekin | @@ -0,0 +1,299 @@
+name: E2E accuracy reusable workflow
+
+on:
+ workflow_call:
+ inputs:
+ install_ipex:
+ description: Install Intel PyTorch Extension
+ type: boolean
+ default: true
+ suite:
+ description: Test suite
+ type: string
+ default: all
+ mode:
+... | This generate a name like this:
```
logs-float16-true-inference-all-huggingface-accuracy---
```
It would be better to have a name like this (the only requirements is uniqueness in one run):
```
logs-huggingface-float16-inference-accuracy
```
|
intel-xpu-backend-for-triton | github_2023 | others | 1,545 | intel | pbchekin | @@ -0,0 +1,295 @@
+name: E2E accuracy reusable workflow | ```suggestion
name: E2E reusable workflow
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,624 | intel | whitneywhtsang | @@ -71,17 +71,25 @@ def TTIG_GlueOp : TTIG_Op<"glue", [Pure]> {
def TTIG_ExtractOp : TTIG_Op<"extract", [Pure]> {
let summary = "Tensor extract operation";
let description = [{
- The `extract` operation extracts a subtensor (or ptr to subtensor) from an
- input tensor (or ptr to tensor) as specified by the... | ```suggestion
// Partition tensor<32x32xf16> into 4 16x16xf16 subtensors and extract the
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,624 | intel | whitneywhtsang | @@ -145,16 +145,20 @@ LogicalResult ExtractOp::verify() {
unsigned resultRank = getRank(resultType);
unsigned operandRank = getRank(operandType);
- if (operandRank != resultRank)
- return success();
-
- /// FIXME: the check below works for tensors with same rank, try to simplify
- /// it later.
+ if (res... | ```suggestion
++resultRank;
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,624 | intel | whitneywhtsang | @@ -49,6 +49,7 @@ class XPUOptions:
max_num_imprecise_acc_default: int = 0 # `max_num_imprecise_acc` only applies to fp8 -> fp32 dot on sm_90 for cuda
extern_libs: dict = None
debug: bool = False
+ large_grf: bool = False | Please remove this
```suggestion
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,624 | intel | Dewei-Wang-sh | @@ -71,17 +71,25 @@ def TTIG_GlueOp : TTIG_Op<"glue", [Pure]> {
def TTIG_ExtractOp : TTIG_Op<"extract", [Pure]> {
let summary = "Tensor extract operation";
let description = [{
- The `extract` operation extracts a subtensor (or ptr to subtensor) from an
- input tensor (or ptr to tensor) as specified by the... | nit: subtensor or scalar,
|
intel-xpu-backend-for-triton | github_2023 | others | 1,427 | intel | whitneywhtsang | @@ -174,8 +174,14 @@ llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_
// -----
llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_height : i32, %base_pitch : i32, %x : i32, %y : i32) {
- // CHECK: llvm.call spir_funccc @_Z40intel_sub_group_2d_block_... | No need to check for codegen, it is already checked earlier.
```suggestion
// CHECK: llvm.call spir_funccc @llvm.genx.GenISA.LSC2DBlockRead.v8i32
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,582 | intel | etiotto | @@ -15,6 +15,14 @@
namespace mlir::triton::gpu::intel {
+// Used by Triton runtime
+struct ClusterInfo {
+ ClusterInfo() : clusterDimX(1), clusterDimY(1), clusterDimZ(1) {}
+ int clusterDimX;
+ int clusterDimY;
+ int clusterDimZ;
+}; | ```suggestion
struct ClusterInfo {
ClusterInfo() = default;
unsigned dimX = 1u;
unsigned dimY = 1u;
unsigned dimZ = 1u;
};
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,582 | intel | etiotto | @@ -84,6 +84,19 @@ void init_triton_intel(py::module &&m) {
init_triton_intel_passes_ttir(passes.def_submodule("ttir"));
init_triton_intel_passes_ttgpuir(passes.def_submodule("ttgpuir"));
+ // cluster info
+ py::class_<gpu::intel::ClusterInfo>(m, "ClusterInfo")
+ .def(py::init<>())
+ .def_readwrite(... | clusterDimX --> dimX etc ... |
intel-xpu-backend-for-triton | github_2023 | python | 1,650 | intel | whitneywhtsang | @@ -66,6 +66,17 @@ def hash(self):
return hashlib.md5(key.encode("utf-8")).hexdigest()
+def min_dot_size(device_props: dict):
+ # (M, N, K)
+ def is_16bits_float_dot(lhs_type, rhs_type): | dot is also supported for other types like tf32 or int8, can we handle those as well? |
intel-xpu-backend-for-triton | github_2023 | python | 1,650 | intel | whitneywhtsang | @@ -66,6 +66,37 @@ def hash(self):
return hashlib.md5(key.encode("utf-8")).hexdigest()
+def min_dot_size(device_props: dict):
+ # (M, N, K)
+ # M: repeatCount. 1,2,4,8
+ # N: executionSize. 16 for PVC, 8 for ATS
+ # K: systolicDepth x opsPerChan. systolicDepth must be 8
+
+ # default 8 becau... | can we set exec_size equals to min subgroup size, and remove dependency to device arch? |
intel-xpu-backend-for-triton | github_2023 | python | 1,650 | intel | whitneywhtsang | @@ -66,6 +66,37 @@ def hash(self):
return hashlib.md5(key.encode("utf-8")).hexdigest()
+def min_dot_size(device_props: dict):
+ # (M, N, K)
+ # M: repeatCount. 1,2,4,8
+ # N: executionSize. 16 for PVC, 8 for ATS
+ # K: systolicDepth x opsPerChan. systolicDepth must be 8
+
+ # default 8 becau... | should we assert l_type equals to r_type? and then simplify the checks. |
intel-xpu-backend-for-triton | github_2023 | others | 1,596 | intel | pbchekin | @@ -0,0 +1,46 @@
+#!/usr/bin/env bash
+
+PLATFORM=$1 # the platform of this script
+
+if [ "$#" -ne 1 ]; then
+ echo "Please provide the platform name. Usage: $0 arg"
+ exit 1
+fi
+
+BASE=$(cd $(dirname "$0")/../.. && pwd)
+TRITON_PROJ=${BASE}/intel-xpu-backend-for-triton
+
+TEST_UNSKIP=true
+TRITON_TEST_REPORTS=tr... | Is it possible to use the existing `test-triton.sh` to run the tests? It would be nice to have it in one place (actually, we have another similar code in the CI workflow, but having it in 3 places it would be overkill, IMHO). |
intel-xpu-backend-for-triton | github_2023 | python | 1,634 | intel | ESI-SYD | @@ -358,19 +358,19 @@ def calculate_tflops(ms):
return 2 * M * N * K * 1e-12 / (ms * 1e-3)
if provider == 'onednn':
- ms, min_ms, max_ms = triton.testing.do_bench(lambda: torch.matmul(a, b), warmup=10, rep=10, quantiles=quantiles,
- fast_flush=F... | ```suggestion
c = torch.empty((M, N), device='xpu', dtype=torch.bfloat16)
d = torch.empty((M, N), device='xpu', dtype=torch.bfloat16)
``` |
intel-xpu-backend-for-triton | github_2023 | others | 1,634 | intel | etiotto | @@ -99,7 +99,7 @@ def TTIG_ExtractOp : TTIG_Op<"extract", [Pure]> {
let hasFolder = 1;
}
-def TTIG_PrefetchOp : TTIG_Op<"prefetch"> {
+def TTIG_PrefetchOp : TTIG_Op<"prefetch", [MemoryEffects<[MemWrite, MemRead]>]> { | The prefetch operation only reads memory. Can you try removing the MemWrite effect ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,409 | intel | etiotto | @@ -292,132 +269,55 @@ static Value createGenISA2DBlockRead(TritonGEN::Matrix2DBlockLoadOp op,
VectorType resType = op.getRes().getType();
Location loc = op->getLoc();
- // FIXME: Use the OpenCL API also for all other variants.
- if (isOCLBuiltinAvailable(op)) { | I think it would be good to have an env. variable to use the genISA builtins for now (until we finish productization of the POCs branches). For prefetch only. |
intel-xpu-backend-for-triton | github_2023 | others | 1,604 | intel | etiotto | @@ -1,6 +1,7 @@
// RUN: triton-opt %s -split-input-file --tritonintelgpu-accelerate-matmul | FileCheck %s
-// CHECK: #[[MMA:.+]] = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSize = 16, opsPerChan = 2, threadsPerWarp = 16, warpsPerCTA = [4, 1], repCluster = [1, 1], A = [8, 16], B = [16, 16],... | [nit] MMA -> DPAS |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,604 | intel | etiotto | @@ -150,6 +150,33 @@ class BlockedToDPAS : public RewritePattern {
dpasCap.executionSize, opsPerChan, warpsPerTile, {1, 1},
threadsPerWarp);
+ if (arch == intel::DeviceArch::PVC) {
+ // Enlarge the repCluster size to use the large 2D load for A and B
+ // operands.
+ auto repA = dp... | ```suggestion
SmallVector<int64_t> repA =
dpasEnc.getDPASRepetitions(oldAType.getShape(), 0);
unsigned repClusterDimM = std::min(4u, static_cast<unsigned>(repA[0]));
SmallVector<int64_t> repB =
dpasEnc.getDPASRepetitions(oldBType.getShape(), 1);
unsigned repClusterDim... |
intel-xpu-backend-for-triton | github_2023 | others | 1,604 | intel | etiotto | @@ -131,3 +132,60 @@ module attributes {"triton_gpu.target" = "xpu:DEVICE_ARCH.PVC", "triton_gpu.num-
tt.return %r : tensor<64x128xf32, #blocked1>
}
}
+
+// -----
+
+// CHECK: #mma = #triton_intel_gpu.dpas<{repeatCount = 8, systolicDepth = 8, executionSize = 16, opsPerChan = 2, threadsPerWarp = 16, warpsPerCTA... | These next tests do not have any CHECK in the function body. Can we add some key CHECKS ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,604 | intel | victor-eds | @@ -152,6 +152,23 @@ class BlockedToDPAS : public RewritePattern {
dpasCap.executionSize, opsPerChan, warpsPerTile, {1, 1},
threadsPerWarp);
+ if (arch == intel::DeviceArch::PVC) {
+ // Enlarge the repCluster size to use the large 2D load for A and B
+ // operands.
+ SmallVector<in... | Can we name `4u` and `2u` here to see where they come from? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,604 | intel | victor-eds | @@ -10,6 +10,9 @@
#include "triton/Dialect/TritonGPU/IR/Dialect.h"
#include "llvm/ADT/TypeSwitch.h"
+#define PVC_2D_LOAD_MAXIMUM_NUMBER_OF_ROWS 32
+#define PVC_2D_LOAD_MAXIMUM_BYTES_OF_COLS 64 | ```suggestion
static constexpr unsigned pvc2DLoadMaximumNumberOfRows = 32;
static constexpr unsigned pvc2DLoadMaximumBytesOfCols = 64;
```
What does "bytes of cols" mean? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,604 | intel | victor-eds | @@ -149,6 +152,30 @@ class BlockedToDPAS : public RewritePattern {
dpasCap.executionSize, opsPerChan, warpsPerTile, {1, 1},
threadsPerWarp);
+ if (dpasCap.executionSize == 16 /* PVC */) { | Can we make 16 a constant somewhere? Also, is this branch only reachable on PVC arch? |
intel-xpu-backend-for-triton | github_2023 | python | 1,488 | intel | YarShev | @@ -38,6 +41,8 @@ def is_interpreter():
("device_print_pointer", "int32"),
])
def test_print(func_type: str, data_type: str):
+ if data_type == "float64" and not tr.driver.active.get_current_target().arch['has_fp64']: | ```suggestion
if device == "xpu" and data_type == "float64" and not tr.driver.active.get_current_target().arch['has_fp64']:
``` |
intel-xpu-backend-for-triton | github_2023 | python | 1,488 | intel | whitneywhtsang | @@ -116,6 +116,10 @@ def test_print(func: str, data_type: str):
else:
assert f"Unknown kernel: {func}"
+ # FIXME: remove trigger to get output from kernel for xpu | According to the original investigation, the problem can also be workaround by waiting for the event explicitly, should we do that instead? @quintinwang5 |
intel-xpu-backend-for-triton | github_2023 | python | 1,488 | intel | whitneywhtsang | @@ -37,8 +40,11 @@ def is_interpreter():
("device_print_hex", "int64"),
("device_print_pointer", "int32"),
])
-def test_print(func_type: str, data_type: str):
- proc = subprocess.Popen([sys.executable, print_path, func_type, data_type], stdout=subprocess.PIPE,
+@pytest.mark.parametrize("device", ['xpu']) | Does it work with this line removed?
As device can be given by https://github.com/intel/intel-xpu-backend-for-triton/blob/llvm-target/python/test/unit/conftest.py. |
intel-xpu-backend-for-triton | github_2023 | python | 1,488 | intel | whitneywhtsang | @@ -116,11 +116,16 @@ def test_print(func: str, data_type: str):
else:
assert f"Unknown kernel: {func}"
+ if device == "xpu":
+ # FIXME: remove trigger to get output from kernel
+ repr(x)
+ repr(y) | Please add a comment in https://github.com/intel/intel-xpu-backend-for-triton/issues/800 to remove this once the original problem is resolved. |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | etiotto | @@ -0,0 +1,272 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Copyright 2024 Intel Corporation | I think we should use the LLVM copyright. |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | etiotto | @@ -14,4 +14,21 @@ include "mlir/Interfaces/InferTypeOpInterface.td" // SameOperandsAndResultType
class TTIG_Op<string mnemonic, list<Trait> traits = []> :
Op<TritonIntelGPU_Dialect, mnemonic, traits>;
+def TTIG_PrefetchOp : TTIG_Op<"prefetch",
+ [MemoryEffects<[MemWrite, MemRead]> | I do not think the operation has any write memory effects. |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | etiotto | @@ -39,4 +39,24 @@ def TritonIntelGPUAccelerateMatmul
];
}
+def TritonIntelGPUPrefetchBlock : Pass<"tritonintelgpu-prefetch-block", "mlir::ModuleOp"> {
+ let summary = "prefetch a tensor block around loop";
+ let description = [{
+ This pass match pattern of certain scf.loop with tt.load and then
+ add pr... | The triton module containing the gpu kernel will already have `"triton_gpu.num-warps"`. Can't we reuse that attribute instead of providing an option for this pass ? |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | whitneywhtsang | @@ -14,4 +14,21 @@ include "mlir/Interfaces/InferTypeOpInterface.td" // SameOperandsAndResultType
class TTIG_Op<string mnemonic, list<Trait> traits = []> :
Op<TritonIntelGPU_Dialect, mnemonic, traits>;
+def TTIG_PrefetchOp : TTIG_Op<"prefetch",
+ [MemoryEffects<[MemWrite, MemRead]>
+ ... | can we just remove this line if there is no canonicalizer? |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | whitneywhtsang | @@ -39,4 +39,24 @@ def TritonIntelGPUAccelerateMatmul
];
}
+def TritonIntelGPUPrefetchBlock : Pass<"tritonintelgpu-prefetch-block", "mlir::ModuleOp"> {
+ let summary = "prefetch a tensor block around loop";
+ let description = [{
+ This pass match pattern of certain scf.loop with tt.load and then
+ add pr... | What is the reason to pick 3 as the prefetch distance? |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | whitneywhtsang | @@ -39,4 +39,20 @@ def TritonIntelGPUAccelerateMatmul
];
}
+def TritonIntelGPUPrefetchBlock : Pass<"tritonintelgpu-prefetch-block", "mlir::ModuleOp"> {
+ let summary = "prefetch a tensor block around loop";
+ let description = [{
+ This pass match pattern of certain scf.loop with tt.load and then
+ add pr... | Do we need this? It is not creating any operations in mlir::triton::gpu::TritonGPUDialect. |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,269 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | ```suggestion
/// This pass should be run after convert-triton-to-tritongpu-warp.
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,269 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | ```suggestion
/// This pass also add layout attribute to newly created ops.
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,269 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | a reviewer suggested this in another PR
```suggestion
namespace ttgi = mlir::triton::gpu::intel;
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,269 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | Looks like we added a new `tt.make_tensor_ptr` from this example, which seems not to be the case. |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | etiotto | @@ -0,0 +1,49 @@
+// RUN: triton-opt %s -split-input-file -tritonintelgpu-prefetch-block | FileCheck %s
+#blocked = #triton_gpu.blocked<{sizePerThread = [32, 64], threadsPerWarp = [1, 1], warpsPerCTA = [8, 4], order = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 90 : i32, "triton_gpu.num-ctas" = 1 : i... | This CHECKS aren't really sufficient to test that the code is generated correctly IMO. I will had more details. |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | etiotto | @@ -0,0 +1,289 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | I rather be conservative initially and allow this pass to prefetch only if the loads in the loop feed a dot operation. We know that in the case of a dot operation (that can be lowered to DPAS) prefetching yields good performance, but AFAIK we do not have evidence this is going to benefit other scenarios. We could exte... |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | etiotto | @@ -0,0 +1,289 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | we should split these large function into smaller pieces. I think it will improve readability. |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | ienkovich | @@ -0,0 +1,406 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | `tt.advance` is not a load user, it is a block pointer user. Also, where is it checked that the load user is `tt.dot`? I only see pointer users check. |
intel-xpu-backend-for-triton | github_2023 | others | 678 | intel | etiotto | @@ -60,11 +60,11 @@ export SCRIPTS_DIR=$(dirname "$0")
python3 -m pip install lit
python3 -m pip install pytest pytest-xdist pytest-rerunfailures
-$SCRIPTS_DIR/compile-pytorch-ipex.sh --pinned $ARGS
-if [ $? -ne 0 ]; then
- echo "FAILED: return code $?"
- exit $?
-fi
+#$SCRIPTS_DIR/compile-pytorch-ipex.sh --pinne... | Good catch! I will undo it. |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,415 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | missing tt.advance after this tt.prefetch |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,415 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | preheader -> body |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,415 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | emty -> empty |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,415 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | and a the -> and the |
intel-xpu-backend-for-triton | github_2023 | cpp | 678 | intel | whitneywhtsang | @@ -0,0 +1,415 @@
+//===-------------- PrefetchBlock.cpp - ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--... | tt.AdvanceOp -> tt.advance |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,499 | intel | whitneywhtsang | @@ -207,10 +207,16 @@ LogicalResult TritonGEN::Matrix2DBlockLoadOp::verify() {
return success();
}
+ bool isFP8 = (resTy.getElementType().isFloat8E5M2() ||
+ resTy.getElementType().isFloat8E4M3FNUZ());
assert(!getVnniTransform() && "Expecting vnni_transform should be false");
switch (get... | ```suggestion
return emitOpError("tile_width for fp8 element type when vnni_transform "
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,499 | intel | whitneywhtsang | @@ -231,6 +231,12 @@ static bool isOCLBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
op.getTileWidth() == 32 && op.getVBlocks() == 1)
return false;
+ // Missing intel_sub_group_2d_block_read_8b_8r16x1c and | Do we also need `32r16x1c`, `8r16x2c`, `16r16x2c`, and `32r16x2c`?
Please add lit tests for all needed variants in `test/TritonGEN/tritongen-2Dblockload-to-llvm.mlir` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,499 | intel | whitneywhtsang | @@ -231,6 +231,12 @@ static bool isOCLBuiltinAvailable(TritonGEN::Matrix2DBlockLoadOp op) {
op.getTileWidth() == 32 && op.getVBlocks() == 1)
return false;
+ // Missing intel_sub_group_2d_block_read_8b_8r16x and
+ // intel_sub_group_2d_block_read_8b_16r16x | If we plan to only request `8r16x1c` and `16r16x1c`, then
```suggestion
// Missing intel_sub_group_2d_block_read_8b_8r16x1c and
// intel_sub_group_2d_block_read_8b_16r16x1c
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -731,18 +959,20 @@ void MatchTargetSizePass::transformGenericOp(Operation *op) {
case 2: {
for (unsigned j = 0; j < shape[0]; j += subSize[0]) {
SmallVector<Value> newOperands;
- llvm::transform(op->getOperands(), std::back_inserter(newOperands),
- [&](Value operand... | [style]: Can remove the last else and just return (all other branches return). |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -693,6 +889,38 @@ void MatchTargetSizePass::transformDotOp(tt::DotOp dot) {
dot->erase();
}
+void MatchTargetSizePass::transformBroadcastOp(tt::BroadcastOp op) {
+ OpBuilder b(op);
+ auto loc = op->getLoc();
+ RankedTensorType resType = op.getResult().getType();
+ auto [shape, subType, subSize] = getSubTyp... | These 3 statements can be placed after the loop to avoid duplication in the else branch. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -693,6 +889,38 @@ void MatchTargetSizePass::transformDotOp(tt::DotOp dot) {
dot->erase();
}
+void MatchTargetSizePass::transformBroadcastOp(tt::BroadcastOp op) {
+ OpBuilder b(op);
+ auto loc = op->getLoc();
+ RankedTensorType resType = op.getResult().getType();
+ auto [shape, subType, subSize] = getSubTyp... | Add assert message |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -93,24 +90,30 @@ LogicalResult GlueOp::verify() {
SmallVector<Type> inputTypes;
for (auto input : getOperands())
inputTypes.push_back(input.getType());
-
+ Type inputType = inputTypes[0];
Type resultType = getRes().getType();
- unsigned resultRank = getRank(resultType);
- if (llvm::any_of(inputTypes... | Add "FIXME" here ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -133,30 +135,37 @@ LogicalResult GlueOp::verify() {
// Verify that the composition of the input operands covers the output tensor
// shape.
+ SmallVector<int64_t> inputShape = getShape(inputTypes[0]);
SmallVector<int64_t> resultShape = getShape(resultType);
unsigned numResultElems = product(resultShap... | [Style]: drop the else after the "then" branch returns. |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -133,30 +135,37 @@ LogicalResult GlueOp::verify() {
// Verify that the composition of the input operands covers the output tensor
// shape.
+ SmallVector<int64_t> inputShape = getShape(inputTypes[0]);
SmallVector<int64_t> resultShape = getShape(resultType);
unsigned numResultElems = product(resultShap... | add "FIXME" here ? |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -146,6 +146,13 @@ class MatchTargetSizePass
dotAttrs.insert(resultType.getEncoding());
});
+ auto hasSliceAttr = [](Type type) {
+ auto tType = dyn_cast<RankedTensorType>(type);
+ if (tType && isa<ttg::SliceEncodingAttr>(tType.getEncoding()))
+ return true;
+ return false; |
```suggestion
return (tType && isa<ttg::SliceEncodingAttr>(tType.getEncoding()));
``` |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -155,34 +162,39 @@ class MatchTargetSizePass
types.append(resultTypes);
if (llvm::none_of(types, [this](Type type) { return isCandidate(type); })) | Needs restructuring |
intel-xpu-backend-for-triton | github_2023 | cpp | 1,540 | intel | etiotto | @@ -258,6 +274,97 @@ class ArithRemPattern : public OpRewritePattern<arith::RemSIOp> {
}
};
+class ScfPattern : public OpRewritePattern<scf::ForOp> {
+public:
+ using OpRewritePattern<scf::ForOp>::OpRewritePattern;
+ LogicalResult matchAndRewrite(scf::ForOp op,
+ PatternRewriter &... | auto -> unsigned |
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